Circuit board and semiconductor package

Abstract

This circuit board comprises: an insulating layer including a plurality of fillers; and a wiring layer disposed on the insulating layer, wherein each of the fillers of the insulating layer includes a contact member which is in contact with the wiring layer and in which a curvature of one surface thereof facing the bottom surface of the insulating layer and a curvature of the other surface thereof facing the wiring layer are different from each other, the upper surface of the insulating layer includes a concave surface that is concave toward the lower surface thereof, and at least a portion of the contact member vertically overlaps the concave surface.

Description

Circuit boards and semiconductor packages

[0001] This embodiment relates to a circuit board and a semiconductor package.

[0002]

[0003] Recently, electronic product technology has been moving toward multifunctionality and high-speed operation, and to respond to this trend, semiconductor chip manufacturing technology is also developing at a rapid pace.

[0004] In particular, the thickness of circuit boards applied for miniaturization of finished electronic products is also decreasing, and as the number of I / Os of semiconductor chips increases, the spacing and size of terminals on circuit boards are getting smaller, and technologies related to high-layer, large-area circuit boards with more circuit layers within the circuit board are being actively researched.

[0005] A circuit board is a substrate made by printing a circuit line pattern with a conductive material, such as copper, onto an electrically insulating substrate. It is a general term for a board immediately before electronic components are mounted. To densely mount numerous electronic components on a flat surface, the mounting locations of each component are determined, and the circuit patterns connecting the components are printed and secured onto the flat surface.

[0006] A circuit board includes a build-up structure, and the build-up structure includes a plurality of insulating layers stacked along a vertical direction. In addition, the circuit board includes a wiring layer arranged on one surface of each of the plurality of insulating layers, and a via electrode penetrating at least a portion of each of the plurality of insulating layers to connect the wiring layers arranged on one surface of different insulating layers. In this case, each of the plurality of insulating layers may include a via hole for arranging the via electrode.

[0007] In circuit boards, bonding between the wiring and insulation layers is a crucial consideration. If the bonding between the wiring and insulation layers is inadequate due to voids or other reasons, it can lead to structural and functional reliability issues in the circuit board.

[0008]

[0009] The present embodiment provides a circuit board and semiconductor package having improved structural and functional stability by improving bonding between an insulating layer and a wiring layer.

[0010]

[0011] A circuit board according to the present embodiment comprises an insulating layer including a plurality of fillers; and a wiring layer disposed on the insulating layer, wherein the filler of the insulating layer contacts the wiring layer and includes a contact member having a curvature of one surface facing a lower surface of the insulating layer and a curvature of the other surface facing the wiring layer different from each other, and wherein an upper surface of the insulating layer includes a concave surface concave toward a lower surface, and at least a portion of the contact member vertically overlaps the concave surface.

[0012] The above wiring layer includes a first layer in contact with the insulating layer, and a second layer disposed on the first layer, and the size of crystal grains of the first layer may be smaller than the size of crystal grains of the second layer.

[0013] The first layer may include a plurality of crystal grains having different crystal directions.

[0014] The first layer in contact with the contact member may include a plurality of crystals arranged in a plurality of different crystal directions.

[0015] The crystal grains of the first layer in contact with the concave surface may include a plurality of crystals arranged in a plurality of different crystal directions.

[0016] The above contact member may include a first filler and a second filler made of different materials, and the first layer may include a first portion in contact with the first filler and a second portion in contact with the second filler.

[0017] The first filler may be non-spherical, and the second filler may be spherical or oval.

[0018] At least one of the crystals in contact with the first portion and at least one of the crystals in contact with the second portion may have the same crystal orientation.

[0019] The above contact member may include a first filler and a second filler made of different materials.

[0020] A semiconductor package according to the present embodiment comprises: an insulating layer including a plurality of fillers; a wiring layer disposed on the insulating layer; and a semiconductor chip coupled to the wiring layer, wherein the filler of the insulating layer contacts the wiring layer and includes a contact member having a curvature of one surface facing a bottom surface of the insulating layer and a curvature of the other surface facing the wiring layer different from each other, and an upper surface of the insulating layer includes a concave surface concave toward a lower surface, and at least a portion of the contact member vertically overlaps the concave surface.

[0021]

[0022] This embodiment has the advantage of improving the bonding strength with the wiring layer through multiple fillers with different shapes within the insulating layer.

[0023] In particular, there is an advantage in that the interfacial bonding between the insulating layer and the wiring layer can be maximized by controlling the particle crystal size, crystal orientation, and shape of the filler at the interface with the wiring layer.

[0024]

[0025] Figure 1 is a cross-sectional view of a circuit board according to an embodiment of the present invention.

[0026] Figure 2 is a cross-sectional view showing a combined structure of an insulating layer and a wiring layer according to an embodiment of the present invention.

[0027] FIGS. 3 to 8 are drawings showing a filler of an insulating layer combined with a wiring layer according to an embodiment of the present invention.

[0028] FIGS. 9 and 10 are diagrams showing crystals within a wiring layer combined with an insulating layer according to an embodiment of the present invention.

[0029] Figure 11 is a table showing the shape of the filler in the insulating layer according to the composition of an embodiment of the present invention.

[0030] Figures 12 to 15 are drawings illustrating a manufacturing process of a circuit board according to an embodiment of the present invention.

[0031] Fig. 16 is a drawing comparing the surface of an insulating layer according to an embodiment of the present invention with the surface of an insulating layer according to a comparative example.

[0032] FIG. 17 is a drawing for explaining changes in the surface of an insulating layer according to a plasma process treatment according to an embodiment of the present invention.

[0033] FIG. 18 is a drawing illustrating a semiconductor package according to an embodiment of the present invention.

[0034]

[0035] Hereinafter, a preferred embodiment of the present invention will be described in detail with reference to the attached drawings.

[0036] However, the technical idea of ​​the present invention is not limited to some of the embodiments described, but can be implemented in various different forms, and within the scope of the technical idea of ​​the present invention, one or more of the components between the embodiments can be selectively combined or substituted for use.

[0037] In addition, terms (including technical and scientific terms) used in the embodiments of the present invention may be interpreted as having a meaning that can be generally understood by a person of ordinary skill in the technical field to which the present invention belongs, unless explicitly and specifically defined and described, and terms that are commonly used, such as terms defined in a dictionary, may be interpreted in consideration of the contextual meaning of the relevant technology.

[0038] In addition, the terms used in the embodiments of the present invention are for the purpose of describing the embodiments and are not intended to limit the present invention. In this specification, the singular may also include the plural unless specifically stated in the phrase, and when it is described as "A and / or at least one (or more) of B, C," it may include one or more of all combinations that can be combined with A, B, and C.

[0039] Additionally, in describing components of embodiments of the present invention, terms such as first, second, A, B, (a), (b), etc. may be used.

[0040] These terms are intended only to distinguish one component from another, and are not intended to limit the nature, order, or sequence of the component.

[0041] And, when a component is described as being 'connected', 'coupled' or 'connected' to another component, it may include not only cases where the component is directly connected, coupled or connected to the other component, but also cases where the component is 'connected', 'coupled' or 'connected' by another component between the component and the other component.

[0042] Furthermore, when a component is described as being "exposed," it should not only mean that it is exposed to the exterior of the invention as defined in the present invention, but also that it is exposed to another component other than that component. That is, when it is described that B contained in A is exposed from A, it should not only mean that B is exposed to the exterior of the invention as defined in the present invention, but also that it is covered by another component, C, unless there are special circumstances.

[0043] Additionally, when it is described as being formed or arranged "above or below" each component, "above" or "below" includes not only cases where the two components are in direct contact with each other, but also cases where one or more other components are formed or arranged between the two components. Also, when it is expressed as "above" or "below", it can include the meaning of the downward direction as well as the upward direction based on one component.

[0044] Additionally, the expression that configuration A is positioned between configurations B and C should also include the meaning that configuration A is positioned so that it overlaps configurations B and C at least partially in the horizontal and / or vertical directions.

[0045] Expressions referring to directions include horizontal directions, vertical directions, and include a first horizontal direction and a second horizontal direction perpendicular to the first horizontal direction. These are referred to as a first horizontal direction (X-axis), a second horizontal direction (Y-axis), and a vertical direction (Z-axis) according to the Cartesian coordinate system, and the meaning of overlapping along the horizontal direction should also include the meaning of overlapping along the first horizontal direction and / or overlapping along the second horizontal direction.

[0046] Additionally, with respect to one component, the first and second sides should mean the upper and lower sides, respectively, or should include the lower and upper sides.

[0047] FIG. 1 is a cross-sectional view of a circuit board according to an embodiment of the present invention, FIG. 2 is a cross-sectional view showing a combined structure of an insulating layer and a wiring layer according to an embodiment of the present invention, FIGS. 3 to 8 are drawings showing fillers of an insulating layer combined with a wiring layer according to an embodiment of the present invention, FIGS. 9 and 10 are drawings showing crystals in a wiring layer combined with an insulating layer according to an embodiment of the present invention, and FIG. 11 is a table showing the shapes of fillers in an insulating layer according to an embodiment of the present invention according to their compositions.

[0048] Referring to FIGS. 1 and 2, a circuit board (10) according to an embodiment of the present invention may include a core layer (100), a first build-up layer, a second build-up layer, a first protective layer (140), a second protective layer (190), a plurality of wiring layers, and a plurality of vias. With respect to the core layer (100), a first build-up layer may be arranged on one surface of the core layer (100), and a second build-up layer may be arranged on the other surface of the core layer (100). The core layer (100), the first build-up layer, the second build-up layer, the first protective layer (140), and the second protective layer (190) may be arranged along a vertical direction. The core layer (100), the first build-up layer, and the second build-up layer may form a build-up structure of the circuit board (10).

[0049] The core layer (100) may be a member forming the basis of the circuit board (10). The core layer (100) may be provided as an insulating layer. For example, the core layer (100) may have a structure in which glass fibers are laminated in a plurality of layers along a vertical direction, and may have a structure in which prepreg (PPG) having one or more layers of glass fibers embedded therein is laminated in a plurality of layers. In addition, the core layer (100) may be provided as a glass substrate. The core layer (100) may be provided as an insulating layer having higher rigidity than an insulating layer provided in the first build-up layer and / or the second build-up layer, and may have a function of preventing warping of the circuit board (10) during the process or after the process. Therefore, the core layer (100) may be arranged to have a thickness thicker than an insulating layer provided in the upper build-up layer and / or the lower build-up layer.

[0050] The first build-up layer may be disposed on the core layer (100). The first build-up layer may include a plurality of insulating layers. For example, the first build-up layer may include a first insulating layer (111), a second insulating layer (112), and a third insulating layer (113). The first insulating layer (111) may be disposed on the core layer (100). The second insulating layer (112) may be disposed on the first insulating layer (111). The third insulating layer (113) may be disposed on the second insulating layer (112). The number of insulating layers constituting the first build-up layer is exemplary, and the first build-up layer may include a greater or lesser number of insulating layers disposed on the core layer (100).

[0051] The second build-up layer may be arranged under the core layer (100). The second build-up layer may include a plurality of insulating layers. The second build-up layer may include a fourth insulating layer (114) and a fifth insulating layer (115). Although not shown, the second build-up layer may include a sixth insulating layer, and the first and second build-up layers may have the same number of insulating layers arranged in a vertical direction based on the core layer (100). The fourth insulating layer (114) may be arranged on the lower surface of the core layer (100). The fifth insulating layer (115) may be arranged on the lower surface of the fourth insulating layer (114). In order to suppress warpage of the circuit board and to ensure the integrity of signal and / or power transmission, the number of stacked insulating layers of the first build-up layer and the number of stacked insulating layers of the second build-up layer may be the same, but is not limited thereto and may be different from each other.

[0052] The first to fifth insulating layers (111, 112, 113, 114, 115) may each be any insulator, such as photocurable and / or thermosetting. As the thermosetting insulator, an insulator in which inorganic and / or organic fillers are dispersed in a resin, such as ABF (Ajinomoto Build-up Film), a product released by Ajinomoto Co., Ltd., may be used, and a prepreg (PPG) including glass fibers in a resin may be used. In addition, the resin described above may be, for example, an epoxy resin, a bismaleimide triazine resin (BT resin), a phenol resin, etc., and the inorganic and / or organic fillers may be provided with a material such as silica or plastic. When an insulating resin is used as a core, a reinforcing material provided with glass fibers or aramid fibers may be included. When the first to fifth insulating layers (111, 112, 113, 114, 115) are photocurable insulators, the first to fifth insulating layers (111, 112, 113, 114, 115) may each be a PID (Photo Imageable Dielectric). In addition, at least one of the plurality of insulating layers may be formed of the same material as the protective layer (140, 190) described below.

[0053] The first to fifth insulating layers (111, 112, 113, 114, 115) may each include a resin and a plurality of fillers arranged within the resin.

[0054] The circuit board (10) may include a protective layer. The protective layer may include a first protective layer (140) and a second protective layer (190). The first protective layer (140) and the second protective layer (190) may both be referred to as protective layers. The first protective layer (140) may be disposed on the first build-up layer. The first protective layer (140) may be disposed on the upper surface of the third insulating layer (113). The second protective layer (190) may be disposed on the lower surface of the second build-up layer. The second protective layer (190) may be disposed on the lower surface of the fifth insulating layer (115). The first protective layer (140) and the second protective layer (190) can prevent short circuits between solders due to low wettability with solder when semiconductor elements are arranged on the surface of the circuit board (10) using a material such as solder, and can prevent external contaminants from penetrating into the build-up structure and lowering reliability. The first protective layer (140) and the second protective layer (190) can each use a photocurable insulating material. For example, the first protective layer (140) and the second protective layer (190) can be a solder resist or a PID (Photo Imageable Dielectric).

[0055] The first protective layer (140) and the second protective layer (190) may each be an insulator in which inorganic and / or organic fillers are dispersed within the resin. Accordingly, the first protective layer (140) and the second protective layer (190) may also be referred to as insulating layers. The first protective layer (140) and the second protective layer (190) may each include a resin and a plurality of fillers disposed within the resin.

[0056] A circuit board (10) may include a circuit portion. The circuit portion may have a plurality of wiring layers and a plurality of via portions arranged therein. Each of the plurality of wiring layers may also be referred to as a wiring portion.

[0057] A plurality of wiring layers may be disposed on the surfaces of the core layer (110) and the plurality of insulating layers, respectively. Here, being disposed on the surfaces may also include the meaning that at least a portion of the plurality of wiring layers is embedded in the core layer (110), the plurality of insulating layers, and the protective layer, respectively, and is exposed to the outside from the surface. The wiring layers may be referred to as metal layers. In addition, the surfaces of the plurality of insulating layers each include one side, the other side, and a side surface between the one side and the other side. Here, being disposed on the surfaces means that the wiring layers are disposed on at least one of the one side, the other side, and the side surface of the plurality of insulating layers. For example, the core layer (110) may have a structure in which wiring layers are disposed on one side and the other side, respectively, and the plurality of insulating layers of the first and / or second build-up layers have a structure in which wiring layers are disposed on only one side, respectively.

[0058] The plurality of wiring layers may include a first wiring layer (121) disposed on the upper surface of the core layer (100), a second wiring layer (122) disposed on the upper surface of the first insulating layer (111), a third wiring layer (123) disposed on the upper surface of the second insulating layer (112), a fourth wiring layer (124) disposed on the upper surface of the third insulating layer (113), a fifth wiring layer (160) disposed on the upper surface of the first protective layer (140), a sixth wiring layer (125) disposed on the lower surface of the core layer (100), a seventh wiring layer (126) disposed on the lower surface of the fourth insulating layer (114), and an eighth wiring layer (127) disposed on the lower surface of the fifth insulating layer (115). Here, the fifth wiring layer (160) disposed on the first protective layer (140) and the eighth wiring layer (127) disposed on the lower surface of the fifth insulating layer (115) may be named as any one of a bonding portion, a bump portion, and a pad portion, respectively. The bonding portion functions to electrically and mechanically connect with other components to be connected to a circuit board such as a semiconductor chip and / or a main board, and the connection here may include not only an indirect connection through an adhesive member, but also a direct connection through a metal-to-metal bond. In addition, the adhesive member may be provided with a conductive adhesive material, and solder may be used as an example. A hole (192) may be formed in the second protective layer (190) to expose the eighth wiring layer (127) downward.

[0059] A via may be a metal material placed in a via hole formed in a core layer (100) or a plurality of insulating layers to vertically connect a plurality of adjacent wiring layers. Here, the via hole may have a shape that vertically penetrates the core layer (100) or each of the plurality of insulating layers. The via may be referred to as a connection part.

[0060] The via portion may include a first via portion (131) penetrating the core layer (100), a second via portion (132) penetrating the first insulating layer (111), a third via portion (133) penetrating the second insulating layer (112), a fourth via portion (134) penetrating the third insulating layer (113), a fifth via portion (135) penetrating the fourth insulating layer (114), and a sixth via portion (136) penetrating the fifth insulating layer (115).

[0061] The first via portion (131) can electrically connect the first wiring layer (121) and the fifth wiring layer (125). The first via portion (131) has a hollow portion formed on the inside, and the hollow portion can be filled with a filling material (108). Accordingly, the bonding state of the first via portion (131) within the via hole of the core layer (100) can be firmly maintained.

[0062] The second via portion (132) can electrically connect the first wiring layer (121) and the second wiring layer (122). The third via portion (133) can electrically connect the second wiring layer (122) and the third wiring layer (123). The fourth via portion (134) can electrically connect the third wiring layer (123) and the fourth wiring layer (124).

[0063] The second via section (133), the third via section (133), and the fourth via section (134) may each have a shape in which the horizontal width becomes narrower as it goes downward.

[0064] The fifth via portion (135) can electrically connect the fifth wiring layer (125) and the sixth wiring layer (126). The sixth via portion (136) can electrically connect the sixth wiring layer (126) and the seventh wiring layer (127). The fifth via portion (135) and the sixth via portion (136) can each have a shape in which the horizontal width increases as they go downward.

[0065] The circuit board (10) may include a seventh via (180) penetrating the first protective layer (140), and the via (180) may be referred to as a connection. The seventh via (180) may be embedded in the first protective layer (140). The seventh via (180) may have a shape in which the horizontal width becomes smaller as it goes downward. The fifth wiring layer (160) and the fourth wiring layer (124) may be electrically connected through the seventh via (180).

[0066] Hereinafter, the bonding structure between the insulating layer, the wiring layer, and the via portion within the circuit board (10) will be described. The bonding structure between the insulating layer and the wiring layer within the circuit board (10) will be described based on the first protective layer (140), the fifth wiring layer (160), and the seventh via portion (180), but is not limited thereto. It should be understood that the bonding structure between the insulating layer and the wiring layer described below can also be applied to the bonding structure between any one of the first to fifth insulating layers (111, 112, 113, 114, 115), the first protective layer (140), and the second protective layer (190), and any one of the first to eighth wiring layers (121, 122, 123, 124, 160, 125, 126, 127) disposed thereon. In addition, as described above, the fifth wiring layer (160) may also be called a bonding portion or a bump portion, and accordingly, the bonding structure between the insulating layer and the wiring layer described below may be a concept that includes the bonding structure of the first protective layer (140), the bonding portion, and the bump portion.

[0067] For convenience of explanation, the first protective layer (140) is referred to as an insulating layer, the fifth wiring layer (160) is referred to as a wiring layer, and the seventh via portion (180) is referred to as a connecting portion.

[0068] Referring to FIG. 2, the wiring layer (160) may be disposed on the insulating layer (140). The wiring layer (160) may include a first layer (164) and a second layer (162) disposed on the first layer (164). Here, the first layer (164) may be a surface of the wiring layer (160) that contacts the insulating layer (140). The first layer (164) may be a surface that forms a lower surface of the wiring layer (160). The first layer (164) may form an interface where the insulating layer (140) and the wiring layer (160) are combined. Based on the first layer (164), the second layer (162) and the insulating layer (140) may be vertically divided.

[0069] FIG. 9 and FIG. 10 are images taken of area A of FIG. 2 using EBSD (Electron Backscatter - Diffraction) and TEM (Transmission Electron Microscope), respectively. Referring to these images, the size of the crystal grains forming the first layer (164) in the wiring layer (160) may be smaller than the size of the crystal grains forming the second layer (162). Accordingly, at the interface where the wiring layer (160) and the insulating layer (140) are bonded, the wiring layer (160) and the insulating layer (140) may be bonded more densely to each other through the first layer (164) having a relatively small crystal grain size.

[0070] Referring to FIG. 9, the first layer (164) may include a plurality of crystal grains. The first layer (164) may include a plurality of crystal grains having different crystal directions. Referring to the Electron Backcatter Diffraction (EBSD) illustrated in FIG. 9, each of the plurality of crystal grains constituting the first layer (164) may have various crystal directions, such as (001), (101), and (111). Accordingly, at the bonding interface between the insulating layer (140) and the wiring layer (160), a denser bonding structure may be implemented through the plurality of crystal grains having different crystal directions.

[0071] Fig. 3 is a drawing showing the joint surface between the insulating layer (140) and the wiring layer (160), and Figs. 4 to 8 are enlarged drawings of each area in Fig. 3.

[0072] Referring to FIGS. 3 to 8, as described above, the insulating layer (140) may include a resin and a plurality of fillers disposed within the resin. The fillers of the insulating layer (140) may include contact members (300, 400) that come into contact with the wiring layer (160). At least a portion of the contact members (300, 400) may be exposed to the outside from the surface of the resin constituting the insulating layer (140). Here, being exposed to the outside may not only mean being exposed to the outside of the circuit board as described above, but may also mean being exposed from other components other than the resin constituting the insulating layer (140).

[0073] The contact member (300, 400) may be formed such that at least some of the plurality of fillers included in the insulating layer (140) protrude from the surface of the resin constituting the insulating layer (140) to the outside of the surface of the resin, or may be vertically separated from the surface of the resin to come into contact with the wiring layer (160). When the surface of the insulating layer (140) is modified through a process to improve wettability with the wiring layer (160), a part of the surface of the insulating layer (140) may come into contact with the wiring layer (160), or another insulating material may come into contact with another part of the surface of the insulating layer (140). Therefore, the surface of the insulating layer (140) should be considered from various perspectives, such as not only adhesive strength with the wiring layer (160), but also bonding strength with other insulating materials, penetration of contaminants such as moisture, and permittivity for electrical characteristics.

[0074] According to the present embodiment, by controlling the shape of the contact member (300, 400) constituting the insulating layer (140), the bonding force with the wiring layer (160) can be made more solid. That is, the contact member (300, 400) is in contact with the wiring layer (160), and the surface modification of the resin layer constituting the insulating layer (140) is improved to improve the wettability with the metal material constituting the wiring layer (160), thereby improving the adhesive force between the wiring layer (160) and the insulating layer (140). Here, the meaning of being in contact includes that another material is provided between the contact member (300, 400) and the wiring layer (160) to indirectly contact them.

[0075] Therefore, unless the meaning of direct contact is explicitly stated, the meaning of contact between the contact member (300, 400) and the wiring layer (160) should be understood to include not only direct contact but also indirect contact. According to the present embodiment, the contact member (300, 400) is in direct contact with the wiring layer (160), so that the gap created by the separation from the resin of the insulating layer (140) is densely filled by the wiring layer (160), and the surface of the contact member (300, 400) is provided to include spherical and non-spherical shapes, thereby controlling the stress between the wiring layer (160) and the contact member (300, 400), thereby improving contact reliability.

[0076] The first layer (164) of the wiring layer (160) can be in contact with the contact members (300, 400). As illustrated in FIG. 9, a plurality of crystals in the first layer (164) of the wiring layer (160) that are in contact with the contact members (300, 400) can have different crystal orientations. According to an embodiment, the surface of the insulating layer (140) is improved to improve wettability with the wiring layer (160) through a process such as plasma, and at this time, the shape and size of the contact members (300, 400) can be variously changed. According to an embodiment of the present invention, dense crystal grains of the first layer (164) having different crystal directions are provided to densely surround the contact member (300, 400) having a spherical and aspherical surface shape, and the first layer (164) is densely filled so that no gap occurs between the contact member (300, 400) and the resin of the insulating layer (140), thereby improving the bonding strength between the wiring layer (160) and the insulating layer (140), and improving the contact reliability by controlling the stress between the contact member (300, 400) and the wiring layer (160).

[0077] The filler of the contact member (300, 400) may include a first filler (300) and a second filler (400). Here, the contact member (300, 400) is classified according to the area arranged on the bonding surface of the insulating layer (140) and the wiring layer (160), and the first filler (300) and the second filler (400) may include a configuration embedded in the resin of the insulating layer (140) in addition to the configuration of the contact member (300, 400).

[0078] As illustrated in FIG. 11, the first filler (300) and the second filler (400) may be different materials. For example, the first filler (300) may include at least one of Ba, Mg, and / or an oxide thereof. For example, the first filler (300) may be BaSO4, and the second filler (400) may be a material including at least one of carbon (C), oxygen (O), and silica (Si). The second filler (400) may be silicon oxide (SiO4).

[0079] As illustrated in FIGS. 4 to 8 and 11, the first filler (300) may be non-spherical. The first filler (300) may have a cross-sectional shape in which the vertical length and the horizontal length are different from each other. The second filler (400) may be spherical or oval.

[0080] The curvature of the surface of the first filler (300) may be different from the curvature of the surface of the second filler (400). The curvature of the surface of the first filler (300) facing the wiring layer (160) may be different from the curvature of the surface of the second filler (400) facing the wiring layer (160). Accordingly, by arranging a plurality of fillers having different materials and shapes within the insulating layer (140), the strength of the insulating layer (140) can be improved. In addition, by arranging a plurality of fillers at the joint surface of the insulating layer (140) and the wiring layer (160), the joint strength between the insulating layer (140) and the wiring layer (160) can be improved.

[0081] According to the present embodiment, the etching rates of the first filler (300) and the second filler (400) having different components can be controlled to have different shapes through a process of changing the surface modification of the insulating layer (140) through a plasma process, thereby controlling the stress between the wiring layer (160) and the contact member (300, 400) to improve reliability. In addition, by improving the overall wettability of the surface of the insulating layer (140) including the contact member (300, 400) and the resin with the wiring layer (160), the adhesion and reliability can be improved.

[0082] Referring to FIG. 4 and FIG. 8, the first filler (300) may include one side (302) facing the wiring layer (160) and the other side (304) facing the insulating layer (140) and opposite the one side (302). The curvature of the one side (302) of the first filler (300) and the curvature of the other side (304) may be different from each other.

[0083] For example, the curvature of one side (302) of the first filler may be smaller than the curvature of the other side (304) of the first filler, and the one side (302) of the first filler may be flat. Here, the meaning that the one side of the first filler is flat may also mean that at least a portion of the one side (302) of the first filler may be flat. Therefore, when arranging the wiring layer (160), when arranging the seed layer using a device such as a sputter, the step coverage can be improved.

[0084] In addition, as a modified example, as illustrated in FIG. 4, two curved surfaces having relatively large curvatures may be arranged on one surface (302) of the first filler (300), and a single gentle curved surface (304) having relatively small curvature may be arranged on the other surface (304) of the first filler (300). Accordingly, due to the difference in curvature between the one surface (302) and the other surface (304) of the first filler (300) which are bonded to the insulating layer (140) and the wiring layer (160), it may be easy to control the stress between the insulating layer (140) and the wiring layer (160), and reliability may be improved. In addition, by improving the overall wettability of the surface of the insulating layer (140) including the contact member (300, 400) and the resin with the wiring layer (160), adhesion and reliability may be improved.

[0085] Some of the plurality of first fillers (300) may have a shape in which the horizontal length is longer than the vertical length. Accordingly, a wider bonding area can be formed through the first fillers (300) at the joint surface of the insulating layer (140) and the wiring layer (160), and adhesion and reliability can be improved by improving vertical stress.

[0086] A concave surface (141) on which a first filler (300) is disposed may be formed on the upper surface of the insulating layer (140) facing the wiring layer (160). The concave surface (141) may be disposed to vertically overlap at least a portion of the first filler (300). The concave surface (141) may have a concave shape that is concave downwards compared to other regions from the upper surface of the insulating layer (140). The concave surface (141) may be formed on the surface of the resin constituting the insulating layer (140). The concave surface (141) may be disposed to face the other surface (304) of the first filler (300). A portion of the concave surface (141) may have a curvature corresponding to the curvature of the other surface (304) of the first filler (300). Accordingly, the first filler (300) can form a bonding structure with the wiring layer (160) and the insulating layer (140), thereby strengthening the bonding strength at the interface between the wiring layer (160) and the insulating layer (140).

[0087] A concave surface (142, see FIG. 5) on which a second filler (400) is disposed may be disposed on the upper surface of the insulating layer (140) facing the wiring layer (160). The concave surface (142) may be disposed to vertically overlap at least a portion of the second filler (400). The concave surface (142) may have a shape that is concave downwards more than other areas from the upper surface of the insulating layer (140). The concave surface (142) may be formed on the surface of the resin constituting the insulating layer (140). The concave surface (142) may have a shape that surrounds the second filler (400). At least one area of ​​the concave surface (142) may have a curvature that is the same as the curvature of the outer surface of the second filler (400).

[0088] The concave surface (141) on which the first filler (300) is placed can be named the first concave surface, and the concave surface (142) on which the second filler (400) is placed can be named the second concave surface.

[0089] As illustrated in FIG. 5, the wiring layer (160) may include a protruding region (169) protruding toward the insulating layer (140). The protruding region (169) may surround the first filler (300) and the second filler (400), and referring to FIG. 5, the protruding region (169) may be provided to surround the second filler (400). The protruding region (169) may have a shape that protrudes toward the first concave surface (141) and the second concave surface (142). The protruding region (169) may form a part of the first layer (164). By the bonding structure with the plurality of fillers and the concave surfaces (141, 142) through the protruding region (169), the bonding strength of the wiring layer (160) and the insulating layer (140) may be increased.

[0090] As illustrated in FIG. 3, the concave surfaces (141, 142) of the insulating layer (140) may have a region where at least a portion is spaced apart from the first filler (300) or the second filler (400). The first layer (164) of the wiring layer (160) may be in contact with the concave surfaces (141, 142) of the insulating layer (140). Accordingly, due to the structure in which the first layer (164) of the wiring layer (160) is bonded to the spaced regions formed between the first filler (300) and the concave surface (141) and between the second filler (400) and the concave surface (142), the wiring layer (160) and the insulating layer (140) may be more firmly bonded.

[0091] As illustrated in FIG. 2, the first layer (164) and the outer region (184), which function as seed layers for implementing the wiring layer (160), may include a plurality of layers having different crystal grain sizes. Specifically, the circuit board (10) may be implemented as a seed layer by plating dense crystal grains on the surface of the insulating layer (140) through electroless plating, and then plating relatively large crystal grains again through electrolytic plating. Considering cracks and productivity, a seed layer having a large crystal grain size is advantageous, but since a route for electricity to be plated is required for electrolytic plating, a seed layer for implementing the wiring portion and the wiring layer (160) may be formed by the above structure.

[0092] Among the plurality of crystal grains forming the first layer (164), the plurality of crystal grains in contact with the concave surface (141, 142) of the insulating layer (140) may include crystals arranged in multiple different crystal directions.

[0093] Meanwhile, the first layer (164) of the wiring layer (160) in contact with the first filler (300) and the second filler (400) can be divided into a first part in contact with the first filler (300) and a second part in contact with the second filler (400), depending on the fillers in contact. In this case, one of the plurality of crystal grains forming the first part may have the same crystal direction as or different from one of the plurality of crystal grains forming the second part. Accordingly, bonding strength with the plurality of fillers can be uniformly formed in different regions within the first layer (164).

[0094] As described above, the circuit board (10) may include a connecting portion (180, see FIG. 2) coupled to a via hole of the insulating layer (140). The connecting portion (180) may include an inner region (182) and an outer region (184) disposed outside the inner region (182). The outer region (184) may be disposed at an interface between the insulating layer (140) and the connecting portion (180). The outer region (184) may be connected to the first layer (164).

[0095] The size of the crystal grains constituting the outer region (184) may be smaller than the size of the crystal grains constituting the inner region (182). It can be understood that the bonding structure of the wiring layer (160) and the insulating layer (140) through the first filler (300) and the second filler (400) in the aforementioned contact member (300, 400) is also applicable to the bonding of the connecting portion (180) and the insulating layer (160). Accordingly, the first filler (300) and the second filler (400) of the aforementioned structure are also arranged on the surface of the via hole facing the outer region (184) in the horizontal direction, so that the connecting portion (180) and the insulating layer (140) can be firmly bonded to each other.

[0096] Below, a process for manufacturing a circuit board according to an embodiment of the present invention will be described.

[0097] FIGS. 12 to 15 are drawings illustrating a manufacturing process of a circuit board according to an embodiment of the present invention, FIG. 16 is a drawing comparing the surface of an insulating layer according to an embodiment of the present invention with the surface of an insulating layer according to a comparative example, and FIG. 17 is a drawing for explaining a change in the surface of an insulating layer according to a plasma process treatment according to an embodiment of the present invention.

[0098] Referring to FIG. 12, the insulating layer (140) may include a resin and a plurality of fillers (300, 400) disposed within the resin. The plurality of fillers (300, 400) include a first filler (300) and a second filler (400) and may be embedded within the resin.

[0099] Referring to Fig. 13, the surface of the insulating layer (140) to which the wiring layer (160) is bonded can have its surface roughness changed through etching. That is, in order to improve the bonding strength with the wiring layer (160), the surface of the insulating layer (140) can have its roughness increased through etching.

[0100] Next, in order to control the shape of the filler in the insulating layer (140), the insulating layer (140) may be subjected to plasma treatment as illustrated in FIG. 14. The plasma process may be performed in a gaseous atmosphere containing CF4 or the like at a vacuum of less than 0.01 Torr. In this case, the contact members (300, 400) may be implemented by deformation of the shape of the filler protruding from the surface of the insulating layer (140). That is, on the surface of the insulating layer (140) in contact with the wiring layer (160), at least a portion of the first filler (300) and the second filler (400) having different shapes may protrude outward, or may be separated from the resin layer of the insulating layer (140) to the outside.

[0101] Next, a wiring layer (160) can be plated on the surface of the insulating layer (140) after plasma treatment under low vacuum using O2. Accordingly, a bonding structure through the first filler (300) and the second filler (400) can be implemented at the joint surface of the insulating layer (140) and the wiring layer (160).

[0102] Referring to (a) of FIG. 16, the surface treatment of the conventional insulating layer (140) was performed only by isotropic etching with irregular recesses on the surface, but according to the present embodiment, as shown in (b) of FIG. 16, by performing isotropic etching in addition to isotropic etching through the aforementioned process pressure and plasma treatment, the bonding strength and / or reliability with the wiring layer (160) can be further improved, and the deterioration of the function of protecting the wiring layer (160) from contaminants can be prevented.

[0103] In addition, as illustrated in FIG. 17, by surface treatment of the insulating layer (140) using plasma, the angle between the particles placed on the surface of the insulating layer (140) and the surface is formed low so that it is closer to hydrophilicity than hydrophobicity, thereby further increasing wettability with the wiring layer (160).

[0104] According to the above structure, there is an advantage in that the bonding strength with the wiring layer can be improved through a plurality of fillers with different shapes within the insulating layer.

[0105] In particular, there is an advantage in that the interfacial bonding between the insulating layer and the wiring layer can be maximized by controlling the particle crystal size, crystal orientation, and shape of the filler at the interface with the wiring layer.

[0106] FIG. 18 is a drawing illustrating a semiconductor package according to an embodiment of the present invention.

[0107] Referring to FIG. 18, a semiconductor package according to an embodiment of the present invention may include semiconductor chips (1000, 2000) coupled to the circuit board (10) described above. The semiconductor chips (1000, 2000) may be provided in plurality, and may include a first semiconductor chip (1000) and a second semiconductor chip (2000). The first semiconductor chip (1000) and the second semiconductor chip (2000) may each be coupled to a wiring layer (160) disposed on a first protective layer (140). In this case, due to the structures of the insulating layer (140) and the wiring layer (160) described above, the concave surfaces (141, 142) of the semiconductor chips (1000, 2000) and the insulating layer (140) may be disposed to face each other in the vertical direction. That is, by the bonding structure between the insulating layer (140) and the wiring layer (160) in the area where the semiconductor chip (1000, 2000) is bonded, the circuit board (10) can be electrically and physically bonded more firmly with the semiconductor chip (1000, 2000).

[0108] Although all components constituting the embodiments of the present invention have been described above as being combined or operating in combination, the present invention is not necessarily limited to these embodiments. That is, within the scope of the purpose of the present invention, all components may be selectively combined and operated one or more times. In addition, terms such as "include," "comprise," or "have" described above, unless specifically stated to the contrary, mean that the corresponding component may be inherent, and therefore should be interpreted as including other components rather than excluding other components. All terms, including technical or scientific terms, have the same meaning as generally understood by a person of ordinary skill in the art to which the present invention pertains, unless otherwise defined. Commonly used terms, such as terms defined in a dictionary, should be interpreted as being consistent with the contextual meaning of the related technology, and shall not be interpreted in an ideal or excessively formal meaning unless explicitly defined in the present invention.

[0109] The above description is merely an illustrative illustration of the technical idea of ​​the present invention, and those skilled in the art will appreciate that various modifications and variations may be made without departing from the essential characteristics of the present invention. Therefore, the embodiments disclosed in the present invention are intended to illustrate, rather than limit, the technical idea of ​​the present invention, and the scope of the technical idea of ​​the present invention is not limited by these embodiments. The scope of protection of the present invention should be interpreted by the following claims, and all technical ideas within a scope equivalent thereto should be interpreted as being included in the scope of the rights of the present invention.

[0110] Meanwhile, when a circuit board having the characteristics of the invention described above is used in IT devices such as smartphones, server computers, TVs, or home appliances, it can stably perform functions such as signal transmission or power supply. For example, when a circuit board having the characteristics of the invention performs a semiconductor package function, it can safely protect semiconductor chips from external moisture or contaminants, and can solve problems such as leakage current or electrical shorts between terminals, or electrical open circuits in terminals supplying semiconductor chips. Furthermore, when it performs a signal transmission function, it can solve noise problems. Through this, the circuit board having the characteristics of the invention described above can maintain the stable function of IT devices or home appliances, thereby enabling the entire product and the circuit board to which the invention is applied to achieve functional integration or technical interoperability with each other.

[0111] When a circuit board having the characteristics of the invention described above is used in a transportation device such as a vehicle, it can solve the problem of signal distortion transmitted to the transportation device, safely protect the semiconductor chip controlling the transportation device from external sources, and solve the problem of leakage current or electrical short circuit between terminals, or electrical open of the terminal supplying the semiconductor chip, thereby further improving the stability of the transportation device. Accordingly, the transportation device and the circuit board to which the present invention is applied can achieve functional integration or technical interoperability with each other.

Claims

1. An insulating layer including multiple fillers; and Including a wiring layer disposed on the above insulating layer, The filler of the above insulating layer includes a contact member that is in contact with the wiring layer and has a curvature of one side facing the bottom surface of the insulating layer and a curvature of the other side facing the wiring layer that are different from each other. The upper surface of the above insulating layer includes a concave surface facing the lower surface, The above contact member is a circuit board that vertically overlaps at least a portion of the above concave surface.

2. In paragraph 1, The wiring layer includes a first layer in contact with the insulating layer and a second layer disposed on the first layer, A circuit board in which the size of the crystal grains of the first layer is smaller than the size of the crystal grains of the second layer.

3. In paragraph 2, The above first layer is a circuit board including a plurality of crystal grains having different crystal directions.

4. In paragraph 3, A circuit board in which the first layer in contact with the contact member includes a plurality of crystals arranged in different crystal directions.

5. In paragraph 3, A circuit board in which the crystal grains of the first layer in contact with the concave surface include a plurality of crystals arranged in a plurality of different crystal directions.

6. In paragraph 3, The above contact member includes a first filler and a second filler made of different materials, A circuit board including a first portion in contact with a first filler and a second portion in contact with a second filler, wherein the first layer is a first layer.

7. In paragraph 6, The above first filler is non-spherical, The above second filler is a circuit board having a spherical or oval shape.

8. In paragraph 6, A circuit board in which at least one of the crystals in contact with the first section and at least one of the crystals in contact with the second section have the same crystal orientation.

9. In paragraph 1, The above contact member is a circuit board including a first filler and a second filler made of different materials.

10. Insulating layer including multiple fillers; A wiring layer disposed on the insulating layer; and Includes a semiconductor chip coupled to the above wiring layer, The filler of the above insulating layer includes a contact member that is in contact with the wiring layer and has a curvature of one side facing the bottom surface of the insulating layer and a curvature of the other side facing the wiring layer that are different from each other. The upper surface of the above insulating layer includes a concave surface facing the lower surface, A semiconductor package in which the above contact member vertically overlaps at least a portion of the above concave surface.

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