Controlling a dual-amplifier power amplifier circuit in a power management circuit
The dual-amplifier power amplifier circuit in power management circuits addresses inefficiencies by activating a second amplifier at a lower threshold and using impedance modulation, achieving improved efficiency by ensuring both amplifiers operate in full compression, thus enhancing performance across varying power levels.
Patent Information
- Application Number
- PCT/US2025/033449
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2024-08-23
- Filing Date
- 2025-06-13
- Publication Date
- 2026-01-29
AI Technical Summary
Existing power management circuits in mobile communication devices face inefficiencies in amplifying RF signals due to the activation thresholds of power amplifiers, which do not allow both amplifiers to operate in full compression, leading to suboptimal efficiency and performance.
A dual-amplifier power amplifier circuit with a first power amplifier always active and a second power amplifier activated at a significantly lower threshold, coupled with an impedance modulation circuit to modulate load impedance, improving efficiency by allowing both amplifiers to operate in full compression across varying power levels.
The dual-amplifier power amplifier circuit enhances overall efficiency by reducing the dynamic range of supply voltage and load impedance modulation, outperforming conventional Doherty circuits by maintaining amplifier efficiency throughout the entire power range.
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Figure US2025033449_29012026_PF_FP_ABST
Abstract
Description
CONTROLLING A DUAL-AMPLIFIER POWER AMPLIFIER CIRCUIT IN A POWER MANAGEMENT CIRCUITRelated Applications
[0001] This application claims the benefit of U.S. provisional patent application serial number 63 / 674,422, filed on July 23, 2024, and U.S. provisional patent application serial number 63 / 686,235, filed on August 23, 2024, the disclosures of which are hereby incorporated herein by reference in their entireties.Field of the Disclosure
[0002] The present disclosure is related to various methods for controlling a dual-amplifier power amplifier circuit in a power management circuit.Background
[0003] Mobile communication devices have become increasingly common in current society for providing wireless communication services. The prevalence of these mobile communication devices is driven in part by the many functions that are now enabled on such devices. Increased processing capabilities in such devices means that mobile communication devices have evolved from being pure communication tools into sophisticated mobile multimedia centers that enable enhanced user experiences.
[0004] The redefined user experience requires higher data rates offered by advanced wireless communication technologies such as fifth-generation new- radio (5G-NR). To achieve higher data rates, a mobile communication device is required to amplify a radio frequency (RF) transmission signal to a desired power level to help overcome potential propagation losses and / or interferences. As such, the mobile communication device typically includes a transceiver circuit, a power amplifier circuit, and a power management circuit. Specifically, the transceiver circuit modulates the RF transmission signal to an intended transmission frequency, the power amplifier circuit amplifies the RF transmission signal to the desired power level, and the power management circuit supplies anenvelope tracking (ET) voltage to the power amplifier circuit for amplifying the RF transmission signal. Understandably, to achieve the best-possible efficiency and performance, the power management circuit must adapt the ET voltage in accordance with a modulation bandwidth of the RF transmission signal.Summary
[0005] Embodiments of the disclosure relate to controlling a dual-amplifier power amplifier circuit in a power management circuit. The dual-amplifier power amplifier circuit includes a first power amplifier that is always active to amplify a radio frequency (RF) signal and a second power amplifier that is only activated to further amplify the RF signal when an instantaneous power level of the RF signal is above a specific power threshold. The dual-amplifier power amplifier circuit is notably different from a Doherty power amplifier circuit in that the power threshold for activating the second power amplifier is significantly lower than a corresponding power threshold used in the Doherty power amplifier circuit. By activating the second power amplifier at a significantly lower power threshold, the first power amplifier and the second power amplifier can each operate in full compression in a respective power region, thus helping to improve overall efficiency of the power management circuit.
[0006] In one aspect, a power management circuit is provided. The power management circuit includes a power management integrated circuit (PMIC). The PMIC is configured to generate a supply voltage based on a target voltage. The power management circuit also includes a dual-amplifier power amplifier circuit. The dual-amplifier power amplifier circuit includes a first power amplifier. The first power amplifier is always activated to amplify an RF signal based on the supply voltage. The dual-amplifier power amplifier circuit also includes a second power amplifier. The second power amplifier is activated when an instantaneous power level of the RF signal is higher than or equal to a first power threshold that is lower than one-half of a peak power level of the RF signal to further amplify the RF signal based on the supply voltage. The dual-amplifier power amplifier circuit also includes an impedance modulation circuit. The impedance modulationcircuit is coupled between a respective output of the first power amplifier and a respective output of the second power amplifier. The impedance modulation circuit is configured to modulate a load impedance at the respective output of the first power amplifier when the instantaneous power level of the RF signal is higher than or equal to the first power threshold but lower than a second power threshold that is also lower than one-half of the peak power level of the RF signal.
[0007] In another aspect, a method for controlling a dual-amplifier power amplifier circuit in a power management circuit is provided. The method includes activating a first power amplifier at all times to amplify an RF signal based on a supply voltage. The method also includes activating a second power amplifier when an instantaneous power level of the RF signal is higher than or equal to a first power threshold that is lower than one-half of a peak power level of the RF signal to further amplify the RF signal based on the supply voltage. The method also includes modulating a load impedance at a respective output of the first power amplifier when the instantaneous power level of the RF signal is higher than or equal to the first power threshold but lower than a second power threshold that is also lower than one-half of the peak power level of the RF signal.
[0008] In another aspect, a wireless device is provided. The wireless device includes a power management circuit. The power management circuit includes a power management integrated circuit (PMIC). The PMIC is configured to generate a supply voltage based on a target voltage. The power management circuit also includes a dual-amplifier power amplifier circuit. The dual-amplifier power amplifier circuit includes a first power amplifier. The first power amplifier is always activated to amplify an RF signal based on the supply voltage. The dualamplifier power amplifier circuit also includes a second power amplifier. The second power amplifier is activated when an instantaneous power level of the RF signal is higher than or equal to a first power threshold that is lower than one-half of a peak power level of the RF signal to further amplify the RF signal based on the supply voltage. The dual-amplifier power amplifier circuit also includes animpedance modulation circuit. The impedance modulation circuit is coupled between a respective output of the first power amplifier and a respective output of the second power amplifier. The impedance modulation circuit is configured to modulate a load impedance at the respective output of the first power amplifier when the instantaneous power level of the RF signal is higher than or equal to the first power threshold but lower than a second power threshold that is also lower than one-half of the peak power level of the RF signal.
[0009] Those skilled in the art will appreciate the scope of the present disclosure and realize additional aspects thereof after reading the following detailed description of the preferred embodiments in association with the accompanying drawing figures.Brief Description of the Drawing Figures
[0010] The accompanying drawing figures incorporated in and forming a part of this specification illustrate several aspects of the disclosure and, together with the description, serve to explain the principles of the disclosure.
[0011] Figure 1 is a schematic diagram of an exemplary power management circuit wherein a dual-amplifier power amplifier circuit can be controlled according to embodiments of the present disclosure to help improve overall efficiency of the power management circuit;
[0012] Figure 2 is a graphic diagram providing an exemplary illustration as to how the power management circuit of Figure 1 can be configured to operate based on load modulation;
[0013] Figure 3 is a schematic diagram of an equivalent electrical model of the dual-amplifier power amplifier circuit in Figure 1 ;
[0014] Figures 4A-4D are graphic diagrams illustrating how a conventional Doherty power amplifier circuit operates;
[0015] Figures 5A-5D are graphic diagrams illustrating how the dual-amplifier power amplifier circuit in Figure 1 operates according to one embodiment of the present disclosure;
[0016] Figures 6A-6D are graphic diagrams illustrating how the dual-amplifier power amplifier circuit in Figure 1 operates according to another embodiment of the present disclosure;
[0017] Figure 7 is a schematic diagram of an exemplary communication device wherein the power management circuit of Figure 1 can be provided; and
[0018] Figure 8 is a flowchart of an exemplary process for controlling the dualamplifier power amplifier circuit in the power management circuit of Figure 1 .Detailed Description
[0019] The embodiments set forth below represent the necessary information to enable those skilled in the art to practice the embodiments and illustrate the best mode of practicing the embodiments. Upon reading the following description in light of the accompanying drawing figures, those skilled in the art will understand the concepts of the disclosure and will recognize applications of these concepts not particularly addressed herein. It should be understood that these concepts and applications fall within the scope of the disclosure and the accompanying claims.
[0020] It will be understood that, although the terms first, second, etc. may be used herein to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another. For example, a first element could be termed a second element, and, similarly, a second element could be termed a first element, without departing from the scope of the present disclosure. As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items.
[0021] It will be understood that when an element such as a layer, region, or substrate is referred to as being "on" or extending "onto" another element, it can be directly on or extend directly onto the other element or intervening elements may also be present. In contrast, when an element is referred to as being "directly on" or extending "directly onto" another element, there are no intervening elements present. Likewise, it will be understood that when an element such as a layer, region, or substrate is referred to as being "over" orextending "over" another element, it can be directly over or extend directly over the other element or intervening elements may also be present. In contrast, when an element is referred to as being "directly over" or extending "directly over" another element, there are no intervening elements present. It will also be understood that when an element is referred to as being "connected" or "coupled" to another element, it can be directly connected or coupled to the other element or intervening elements may be present. In contrast, when an element is referred to as being "directly connected" or "directly coupled" to another element, there are no intervening elements present.
[0022] Relative terms such as "below" or "above" or "upper" or "lower" or "horizontal" or "vertical" may be used herein to describe a relationship of one element, layer, or region to another element, layer, or region as illustrated in the Figures. It will be understood that these terms and those discussed above are intended to encompass different orientations of the device in addition to the orientation depicted in the Figures.
[0023] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the disclosure. As used herein, the singular forms "a," "an," and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms "comprises," "comprising," "includes," and / or "including" when used herein specify the presence of stated features, integers, steps, operations, elements, and / or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups thereof.
[0024] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure belongs. It will be further understood that terms used herein should be interpreted as having a meaning that is consistent with their meaning in the context of this specification and the relevant art and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein.
[0025] Embodiments are described herein with reference to controlling a dualamplifier power amplifier circuit in a power management circuit. The dualamplifier power amplifier circuit includes a first power amplifier that is always active to amplify a radio frequency (RF) signal and a second power amplifier that is only activated to further amplify the RF signal when an instantaneous power level of the RF signal is above a specific power threshold. The dual-amplifier power amplifier circuit is notably different from a Doherty power amplifier circuit in that the power threshold for activating the second power amplifier is significantly lower than a corresponding power threshold used in the Doherty power amplifier circuit. By activating the second power amplifier at a significantly lower power threshold, the first power amplifier and the second power amplifier can each operate in full compression in a respective power region, thus helping to improve overall efficiency of the power management circuit.
[0026] Figure 1 is a schematic diagram of an exemplary power management circuit 10 wherein a dual-amplifier power amplifier circuit 12 can be controlled according to embodiments of the present disclosure to help improve overall efficiency of the power management circuit 10. Herein, the power management circuit 10 also includes a transceiver circuit 14 and a power management integrated circuit (PMIC) 16. The transceiver circuit 14 is configured to generate an RF signal 18 having a time-variant input power PIN and a target voltage VTGT that tracks the time-variant input power PIN of the RF signal 18. The PMIC 16 is configured to generate a supply voltage Vcc based on the target voltage VTGT. In one embodiment, the PMIC 16 can modulate the supply voltage Vcc as an envelope tracking (ET) voltage to track the time-variant input power PIN of the RF signal 18. In another embodiment, the PMIC 16 may generate the supply voltage Vcc as an average power tracking (APT) voltage in accordance with an average of the time-variant input power PIN of the RF signal 18.
[0027] Herein, the dual-amplifier power amplifier circuit 12 is configured to amplify the RF signal 18 from the time-variant input power PIN to a time-variant output power POUT based on the supply voltage Vcc. Specifically, the dualamplifier power amplifier circuit 12 includes a first power amplifier 20 and asecond power amplifier 22. The first power amplifier 20 is active all the time to amplify the RF signal 18 based on the supply voltage Vcc, whereas the second power amplifier 22 is activated only when an instantaneous power level of the time-variant input power PIN is above a specific power threshold. As described in detail below, the power threshold for activating the second power amplifier 22 is significantly lower than a corresponding power threshold for activating a peaking power amplifier in a Doherty power amplifier circuit, thus making the dualamplifier power amplifier circuit 12 notably different from the Doherty power amplifier circuit.
[0028] The dual-amplifier power amplifier circuit 12 also differs from the Doherty power amplifier circuit in that the dual-amplifier power amplifier circuit 12 further includes an impedance modulation circuit 24, which is coupled between a respective output 26 of the first power amplifier 20 and a respective output 28 of the second power amplifier 22. Herein, the impedance modulation circuit 24 is configured to modulate a load impedance ZIN at the respective output 26 of the first power amplifier 20. In an embodiment, the impedance modulation circuit 24 can be configured to receive a load modulation signal 30 from the PMIC 16 and modulate the load impedance ZIN to a specific value as indicated in the load modulation signal 30.
[0029] Figure 2 is a graphic diagram providing an exemplary illustration as to how the power management circuit 10 of Figure 1 can be configured to operate by modulating the load impedance ZIN. Herein, the time-variant input power PIN and / or the time-variant output power POUT is represented by a horizontal axis 32, the supply voltage Vcc is represent by a first vertical axis 34, and the modulated load impedance ZIN is represented by a second vertical axis 36.
[0030] The power management circuit 10 can be configured to operate based on multiple power thresholds PMAX, PI , and Po. Herein, PMAX represents a peak power threshold, Pi represents an upper power threshold below the peak power threshold PMAX (PI < PMAX) and Po represents a lower power threshold below the upper power threshold Pi (Po < Pi < PMAX).
[0031] When an instantaneous power of the RF signal 18 is higher than or equal to the upper power threshold Pi (e.g., PIN / POUT Pi), the power management circuit 10 operates in a higher power region 38 in which the power management circuit 10 is configured to operate based on supply modulation. Accordingly, the power management circuit 10 will maintain the modulated load impedance ZIN (as illustrated by line 40) and increase the supply voltage Vcc (as illustrated by line 42) toward a maximum supply voltage VCC-MAX.
[0032] In contrast, when the instantaneous power of the RF signal 18 is below the upper power threshold Pi and above the lower power threshold Po (e.g., Po < PIN / POUT < Pi), the power management circuit 10 operates in a lower power region 44 in which the power management circuit 10 is configured to operate based on load modulation. Accordingly, the power management circuit 10 will reduce the modulated load impedance ZIN (as illustrated by line 46) and maintain the supply voltage Vcc (as illustrated by line 48) at a minimum supply voltage VCC- IN. Alternatively, the power management circuit 10 may also operate based on a combination of the load modulation and the supply modulation. In this regard, the power management circuit 10 may slightly increase the supply voltage Vcc by performing both the load modulation and the supply modulation. Understandably, by performing the load modulation in the lower power region 44, it is possible to reduce a dynamic range VCC-RANGE (VCC-RANGE = VCC-MAX - VCC-MIN) of the supply voltage Vcc to thereby help improve the efficiency of the PMIC 16.
[0033] With reference back to Figure 1 , the impedance modulation circuit 24 can be configured to modulate the load impedance ZIN as a function of a load impedance ZL presented by a load circuit 50 (e.g., an RF frontend circuit) configured to receive the RF signal 18. Specifically, the load impedance ZIN can be expressed in equation (Eq. 1 ) below.ZIN = -K2 / ZL (Eq. 1 )
[0034] In the equation (Eq. 1), K represents a configurable modulation term of the impedance modulation circuit 24, which can be manipulated based on theload modulation signal 30 to thereby change the load impedance ZIN. For an in- depth description as to how the PMIC 16 can generate the load modulation signal 30 and how the impedance modulation circuit 24 can modulate the load impedance ZIN, please refer to U.S. Provisional Patent Application Number 63 / 684,919, filed on August 20, 2024, and entitled “DYNAMIC IMPEDANCE MODULATION IN A POWER MANAGEMENT CIRCUIT.”
[0035] The operating principles of the dual-amplifier power amplifier circuit 12 can be further explained based on an equivalent electrical model of the dualamplifier power amplifier circuit 12. In this regard, Figure 3 is a schematic diagram of an equivalent electrical model 52 of the dual-amplifier power amplifier circuit 12 in Figure 1. Common elements between Figures 1 and 3 are shown therein with common element numbers and will not be re-described herein.
[0036] In the equivalent electrical model 52, each of the first power amplifier 20 and the second power amplifier 22 is modeled as a current source. The first power amplifier 20 is coupled to a first load-line transfer function 54 and the second power amplifier 22 is coupled to a second load-line transfer function 56. In a non-limiting example, each of the first load-line transfer function 54 and the second load-line transfer function 56 can be a transformer. For the sake of simplicity, each of the first load-line transfer function 54 and the second load-line transfer function 56 is assumed to be equal to one (1 ).
[0037] Before the second power amplifier 22 is activated, the first power amplifier 20 will generate a first current IM to thereby amplify the RF signal 18 from the time-variant input power PIN to the time-variant output power POUT. When the load circuit 50, which has an inherent impedance ZLOAD, receives the RF signal 18, the load circuit 50 produces a load current ILOAD. Since the second power amplifier 22 is inactive, the load current ILOAD is thus identical to another load current I’LOAD that flows into the impedance modulation circuit 24. As such, the first power amplifier 20 sees a first voltage VM (VM = K*I’LOAD).
[0038] When the second power amplifier 22 is activated, the second power amplifier 22 will generate a second current j*lp to thereby further amplify the RF signal 18 from the time-variant input power PIN to the time-variant output powerPOUT. AS such, the load current ILOAD will now equal a sum of the load current I’LOAD and the second current Ip (ILOAD = I’LOAD + j*lp). As such, the second power amplifier 22 sees a second voltage Vp (Vp = -K*IM).
[0039] The equivalent electrical model 52 can be used to explain the operating principles of a conventional Doherty power amplifier circuit. Figures 4A-4D are graphic diagrams illustrating how a conventional Doherty power amplifier circuit operates based on the equivalent electrical model of Figure 3.
[0040] Figure 4A illustrates how the first voltage VM and the second voltage j*Vp change in accordance with the time-variant input power PIN and / or the timevariant output power POUT of the RF signal 18. Understandably the conventional Doherty power amplifier circuit includes a carrier power amplifier that is active all the time and a peaking power amplifier that is only activated when an instantaneous power level of the RF signal 18 becomes higher than a power threshold PTH. In a typical Doherty power amplifier circuit, the power threshold PTH is equal to one-half ( ) of a peak power level PMAX of the RF signal 18 (PTH =1 / 2PMAX = PMAX - 6dB).
[0041] The first voltage VM increases when the instantaneous power level of the RF signal 18 is below the power threshold PTH and stays constant when the instantaneous power level of the RF signal 18 is above the power threshold PTH. In other words, the carrier power amplifier operates in compression when the instantaneous power level of the RF signal 18 is above the power threshold PTH.
[0042] The peaking power amplifier, on the other hand, is activated when the instantaneous power level of the RF signal 18 is above the power threshold PTH. Accordingly, the second voltage j*Vp increases as the instantaneous power level of the RF signal 18 increases toward the peak power level PMAX. AS such, the peaking power amplifier will only operate in compression at the peak power level PMAX.
[0043] Figure 4B illustrates how the modulated load impedance ZIN changes in accordance with the time-variant input power PIN and / or the time-variant output power POUT of the RF signal 18. In the Doherty power amplifier circuit, the modulated load impedance ZIN is kept constant when the instantaneous powerlevel of the RF signal 18 is below the power threshold PTH and decreases when the instantaneous power level of the RF signal 18 is above the power threshold PTH.
[0044] Figure 4C illustrates how the first current IM and the second current j*lp change in accordance with the time-variant input power PIN and / or the timevariant output power POUT of the RF signal 18. When the instantaneous power level of the RF signal 18 is below the power threshold PTH, the carrier power amplifier increases the first current IM as the instantaneous power level of the RF signal 18 increases. When the instantaneous power level of the RF signal 18 is above the power threshold PTH, the peaking power amplifier is activated to supply the second current j*lp as the instantaneous power level of the RF signal 18 increases.
[0045] Figure 4D illustrates how the supply voltage Vcc changes in accordance with the time-variant input power PIN and / or the time-variant output power POUT of the RF signal 18. The supply voltage Vcc increases when the instantaneous power level of the RF signal 18 is below the power threshold PTH and stays constant at a maximum supply voltage VCC-MAX when the instantaneous power level of the RF signal 18 is above the power threshold PTH. The peaking power amplifier, on the other hand, is activated when the instantaneous power level of the RF signal 18 is above the power threshold PTH. Since the peaking power amplifier is providing the second current j*lp when the instantaneous power level of the RF signal 18 increases, the supply voltage Vcc can be maintained at the maximum supply voltage VCC-MAX. AS such, the supply voltage Vcc can vary in a dynamic range CC-RANGE that is defined by the maximum supply voltage VCC-MAX and a minimum supply voltage VCC-MIN.
[0046] The equivalent electrical model 52 can also be used to explain the operating principles of the dual-amplifier power amplifier circuit 12 of the present disclosure. Moreover, the equivalent electrical model 52 can help explain how the dual-amplifier power amplifier circuit 12 operates differently from the Doherty power amplifier circuit in Figures 4A-4D.
[0047] Figures 5A-5D are graphic diagrams illustrating how the dual-amplifier power amplifier circuit 12 operates according to one embodiment of the present disclosure. Common elements between Figures 1 , 3, and 5A-5D are shown therein with common element numbers and will not be re-described herein.
[0048] Figure 5A illustrates how the first voltage VM and the second voltage j*Vp change in accordance with the time-variant input power PIN and / or the timevariant output power POUT of the RF signal 18. Herein, the dual-amplifier power amplifier circuit 12 is configured to operate based on the first power threshold Po and the second power threshold Pi (as illustrated in Figure 2), which are both lower than the power threshold PTH in Figures 4A-4D (Po < PTH and Pi < PTH). In an embodiment, the first power threshold Po can be 10 to 16 dB below the peak power level PMAX and the second power threshold Pi is equal to two times the first power threshold Po (Po = V2P1). Accordingly, the load current ILOAD at the first power threshold Po, the second power threshold Pi, and the peak power level PMAX are referred to hereinafter as ILOADO, ILOADI , and ILOADMAX, respectively.
[0049] The first power amplifier 20 is always active to amplify the RF signal 18. Accordingly, the first voltage V increases when the instantaneous power level of the RF signal 18 is below the first power threshold Po (PIN / POUT < Po).The first voltage VM stays constant when the instantaneous power level of the RF signal 18 is above the first power threshold Po and below the second power threshold Pi (Po PIN / POUT Pi) and starts increasing again when the instantaneous power level of the RF signal 18 is above the second power threshold Pi (PIN / POUT > Pi). More specifically, the first voltage VM is equal to K*I’LOAD when the instantaneous power level of the RF signal 18 is below the first power threshold Po. The first voltage VM will be maintained at j*2*Zi_oAD*lLOADo when the instantaneous power level of the RF signal 18 is above the first power threshold Po and below the second power threshold Pi. The first voltage VM will be equal to K*ILOAD / 2 when the instantaneous power level of the RF signal 18 is above the second power threshold Pi and below the peak power level PMAX (PI < PIN / POUT 2 PMAX). In this regard, the first power amplifier 20 can operate in full compression when the instantaneous power level of the RF signal 18 is abovethe first power threshold Po. Notably, since the first power threshold Po is significantly lower than the power threshold PTH, the first power amplifier 20 will enter full compression earlier than the carrier power amplifier in the Doherty power amplifier circuit does. As a result, the first power amplifier 20 will have a higher efficiency than the carrier power amplifier in the Doherty power amplifier circuit.
[0050] The second power amplifier 22, on the other hand, is activated when the instantaneous power level of the RF signal 18 is above the first power threshold Po (PIN / POUT > Po). When the second power amplifier 22 is activated, the second voltage j*Vp increases as the instantaneous power level of the RF signal 18 increases toward the peak power level PMAX. More specifically, the second voltage j*Vp is equal to ZLOAD*ILOAD when the instantaneous power level of the RF signal 18 is above the first power threshold Po and below the second power threshold Pi (Po < PIN / POUT < Pi). The second voltage j*Vp will also be equal to K*ILOAD / 2 when the instantaneous power level of the RF signal 18 is above the second power threshold Pi and below the peak power level PMAX (PI < PIN / POUT < PMAX). In this regard, the second power amplifier 22 can operate in full compression when the instantaneous power level of the RF signal 18 is above the second power threshold Pi . Notably, since the second power threshold Pi is also lower than the power threshold PTH, the second power amplifier 22 will enter full compression earlier than the peaking power amplifier in the Doherty power amplifier circuit does. As a result, the second power amplifier 22 will have a higher efficiency than the peaking power amplifier in the Doherty power amplifier circuit.
[0051] Between the second power threshold Pi and the peak power level PMAX, each of the first power amplifier 20 and the second power amplifier 22 will deliver one-half C! ) of the peak power level PMAX. Due to respective efficiency improvement in the first power amplifier 20 and the second power amplifier 22, the dual-amplifier power amplifier circuit 12 will therefore achieve a higher overall efficiency than the conventional Doherty power amplifier circuit.
[0052] Figure 5B illustrates how the modulated load impedance ZIN changes in accordance with the time-variant input power PIN and / or the time-variant output power POUT of the RF signal 18. Herein, the modulated load impedance ZIN is kept constant when the instantaneous power level of the RF signal 18 is below the first power threshold Po (PIN / POUT < Po) and above the second power threshold Pi (PIN / POUT > Pi). Between the first power threshold Po and the second power threshold Pi, the dual-amplifier power amplifier circuit 12 operates based on load modulation, wherein the impedance modulation circuit 24 modulates the load impedance ZIN based on the load modulation signal 30.
[0053] Figure 5C illustrates how the first current IM and the second current j*lp change in accordance with the time-variant input power PIN and / or the timevariant output power POUT of the RF signal 18. When the instantaneous power level of the RF signal 18 is below the first power threshold Po, the first power amplifier 20 increases the first current IM as the instantaneous power level of the RF signal 18 increases. Specifically, the first current IM is equal to - ILOAD / 2.
[0054] When the instantaneous power level of the RF signal 18 is above the first power threshold Po, the second power amplifier 22 is activated to supply the second current j*lp as the instantaneous power level of the RF signal 18 increases. Specifically, the second current -j*lp is equal to ILOAD - ILOADO. Beyond the second power threshold Pi , each of the first current IM and the second current -j*lp is equal to one-half (1 ) of the load current ILOAD.
[0055] Figure 5D illustrates how the supply voltage Vcc changes in accordance with the time-variant input power PIN and / or the time-variant output power POUT of the RF signal 18. The supply voltage Vcc is equivalent to the first voltage VM, which increases when the instantaneous power level of the RF signal 18 is below the first power threshold Po. When the instantaneous power level of the RF signal 18 is above the first power threshold Po, the second power amplifier 22 is activated to deliver increased load current needed to drive the time-variant input power PIN and / or the time-variant output power POUT toward the peak power level PMAX. Accordingly, the supply voltage Vcc is maintained constantly to establish a minimum supply voltage VCC-MIN at J*2*ZLOAD*ILOADO.
[0056] The second power amplifier 22, when activated, provides the second current j*lp needed to drive the instantaneous power level of the RF signal 18 toward the peak power level PMAX. The supply voltage Vcc reaches the maximum supply voltage VCC-MAX (VCC-MAX = j*Zi_0AD*l LOADMAX) at the peak power level P AX. AS such, the supply voltage Vcc will vary in a reduced dynamic range VCC-RANGE (equivalent to the dynamic range VCC-RANGE in Figure 2) that can be expressed as ZLOAD*( I LOADMAX - 2*ILOADO). Notably, the dynamic range VCC-RANGE of the supply voltage Vcc is reduced from the dynamic range V’CC-RANGE in the Doherty power amplifier circuit, thus helping to improve efficiency of the PMIC 16.
[0057] Figures 6A-6D are graphic diagrams illustrating how the dual-amplifier power amplifier circuit 12 operates according to another embodiment of the present disclosure. Common elements between Figures 5A-5D and 6A-6D are shown therein with common element numbers and will not be re-described herein.
[0058] Figure 6A illustrates how the first voltage VM and the second voltage j*Vp change in accordance with the time-variant input power PIN and / or the timevariant output power POUT of the RF signal 18. Herein, the first power threshold Po can be 10 to 16 dB below the peak power level PMAX and the second power threshold Pi is more than two times the first power threshold Po (Po < V2P1). In this regard, the second current j*lp delivered by the second power amplifier 22 does not make up for the additional current needed to drive the instantaneous power level of the RF signal 18 toward the peak power level PMAX. AS a result, the first voltage VM illustrated herein will be lower than the first voltage VM shown in Figure 5A at the first power threshold Po. As shown in Figure 6D, the drop of the first voltage VM at the first power threshold Po in Figure 6A will produce a lower minimum supply voltage V’CC-MIN compared to the minimum supply voltage in Figure 5D. As a result, a dynamic range V”CC-RANGE (V”CC-RANGE = VCC-MAX - V’CC-MIN) will increase slightly from the reduced dynamic range VCC-RANGE (VCC- RANGE = VCC-MAX - VCC-MIN) in Figure 5D as well (V”CC-RANGE > VCC-RANGE).Nevertheless, the dynamic range V”CC-RANGE as shown herein is still smaller thanthe dynamic range V’CC-RANGE of the Doherty power amplifier circuit, as illustrated in Figure 4D, to thereby improve efficiency of the PMIC 16. Figures 6B and 6C are similar to Figures 5B and 5C, respectively. As such, Figures 6B and 6C are not redescribed herein for the sake of simplicity.
[0059] Moreover, when the supply voltage Vcc is an ET voltage modulated according to the time-variant input power PIN, the first power amplifier 20 will be in full compression between the first power threshold Po and the peak power level PMAX, whereas the second power amplifier 22 is in full compression between the second power threshold Pi and the peak power level PMAX. AS such, the dual-amplifier power amplifier circuit 12 can still achieve a higher overall efficiency than the conventional Doherty power amplifier circuit.
[0060] With reference back to Figure 1 , the dual-amplifier power amplifier circuit 12 can include a control circuit 58, a peak detector 60, and a phase shifter 62. The peak detector 60 is configured to detect the instantaneous power level of the RF signal 18. The phase shifter 62 is configured to provide a negative ninety-degree (-90°) phase shift of the RF signal 18 for the second power amplifier 22. The control circuit 58 receives the load modulation signal 30 from the PMIC 16 and the detected instantaneous power level of the RF signal 18. Accordingly, the control circuit 58 can bias the first power amplifier 20 and the second power amplifier 22 via a bias signal 64. As an example, the control circuit 58 can use the bias signal 64 to activate the second power amplifier 22 when the instantaneous power level of the RF signal 18 is above the first power threshold Po.
[0061] The power management circuit 10 of Figure 1 can be provided in a communication device to support the embodiments described above. In this regard, Figure 7 is a schematic diagram of an exemplary communication device 100 wherein the power management circuit 10 of Figure 1 can be provided.
[0062] Herein, the communication device 100 can be any type of communication devices, such as mobile terminals, smart watches, tablets, computers, navigation devices, access points, base stations (e.g., eNB, gNB, etc.), and like wireless communication devices that support wirelesscommunications, such as cellular, wireless local area network (WLAN), Ultra- wideband (UWB), Bluetooth, and near-field communications. The communication device 100 will generally include a control system 102, a baseband processor 104, transmit circuitry 106, receive circuitry 108, antenna switching circuitry 110, multiple antennas 112, and user interface circuitry 11 . In a non-limiting example, the control system 102 can be a field-programmable gate array (FPGA), as an example. In this regard, the control system 102 can include at least a microprocessor, an embedded memory circuit, and a communication bus interface. The receive circuitry 108 receives radio frequency signals via the antennas 112 and through the antenna switching circuitry 110 from one or more base stations. A low-noise amplifier and a filter cooperate to amplify and remove broadband interference from the received signal for processing.Downconversion and digitization circuitry (not shown) will then downconvert the filtered, received signal to an intermediate or baseband frequency signal, which is then digitized into one or more digital streams using analog-to-digital converters (ADCs).
[0063] The baseband processor 104 processes the digitized received signal to extract the information or data bits conveyed in the received signal. This processing typically comprises demodulation, decoding, and error correction operations, as will be discussed in greater detail below. The baseband processor 104 is generally implemented in one or more digital signal processors (DSPs) and application-specific integrated circuits (ASICs).
[0064] For transmission, the baseband processor 104 receives digitized data, which may represent voice, data, or control information, from the control system 102, which it encodes for transmission. The encoded data is output to the transmit circuitry 106, where a digital-to-analog converter (DAC) converts the digitally encoded data into an analog signal and a modulator modulates the analog signal onto a carrier signal that is at a desired transmit frequency or frequencies. A power amplifier will amplify the modulated carrier signal to a level appropriate for transmission and deliver the modulated carrier signal to the antennas 112 through the antenna switching circuitry 110. The multiple antennas112 and the replicated transmit 106 and receive circuitry 108 may provide spatial diversity. Modulation and processing details will be understood by those skilled in the art.
[0065] In an embodiment, the transmit circuitry 106 and the receive circuitry 108 can function as a transceiver circuit. Accordingly, the power management circuit 10 can be provided between the transmit circuitry 106 and the antenna switching circuitry 110.
[0066] In an embodiment, the dual-amplifier power amplifier circuit 12 in the power management circuit 10 of Figure 1 can be controlled in accordance with a process. In this regard, Figure 8 is a flowchart of an exemplary process 200 for controlling the dual-amplifier power amplifier circuit 12 in the power management circuit 10 of Figure 1.
[0067] Herein, the process 200 includes activating the first power amplifier 20 at all times to amplify the RF signal 18 based on the supply voltage Vcc (step 202). The process 200 also includes activating the second power amplifier 22 when the instantaneous power level of the RF signal 18 is higher than or equal to the first power threshold Po that is lower than one-half of the peak power level PMAX of the RF signal 18 to further amplify the RF signal 18 based on the supply voltage Vcc (step 204). The process 200 also includes modulating the load impedance ZIN at the respective output 26 of the first power amplifier 20 when the instantaneous power level of the RF signal 18 is higher than or equal to the first power threshold Po but lower than the second power threshold Pi that is also lower than one-half of the peak power level PMAX of the RF signal 18 (step 206).
[0068] Those skilled in the art will recognize improvements and modifications to the preferred embodiments of the present disclosure. All such improvements and modifications are considered within the scope of the concepts disclosed herein and the claims that follow.
Claims
ClaimsWhat is claimed is:1 . A power management circuit comprising: a power management integrated circuit (PMIC) configured to generate a supply voltage based on a target voltage; and a dual-amplifier power amplifier circuit comprising: a first power amplifier always activated to amplify a radio frequency (RF) signal based on the supply voltage; a second power amplifier activated when an instantaneous power level of the RF signal is higher than or equal to a first power threshold that is lower than one-half of a peak power level of the RF signal to further amplify the RF signal based on the supply voltage; and an impedance modulation circuit coupled between a respective output of the first power amplifier and a respective output of the second power amplifier and configured to modulate a load impedance at the respective output of the first power amplifier when the instantaneous power level of the RF signal is higher than or equal to the first power threshold but lower than a second power threshold that is also lower than one-half of the peak power level of the RF signal.
2. The power management circuit of claim 1 , wherein the second power amplifier is deactivated when the instantaneous power level of the RF signal is below the first power threshold.
3. The power management circuit of claim 1 , wherein the impedance modulation circuit is further configured to stop modulating the load impedance when the instantaneous power level of the RF signal is higher than or equal to the second power threshold.
4. The power management circuit of claim 1 , wherein each of the first power amplifier and the second power amplifier is further configured to amplify the RF signal to one-half of the instantaneous power level when the instantaneous power level of the RF signal is higher than or equal to the second power threshold.
5. The power management circuit of claim 1 , wherein: the first power amplifier is further configured to operate in full compression when the instantaneous power level of the RF signal is above the first power threshold; and the second power amplifier is further configured to operate in full compression when the instantaneous power level of the RF signal is above the second power threshold.
6. The power management circuit of claim 1 , wherein the second power threshold is equal to two times the first power threshold.
7. The power management circuit of claim 6, wherein the PMIC is further configured to maintain the supply voltage at a constant level when the instantaneous power level of the RF signal is between the first power threshold and the second power threshold.
8. The power management circuit of claim 1 , wherein the second power threshold is less than two times the first power threshold.
9. The power management circuit of claim 8, wherein the PMIC is further configured to increase the supply voltage when the instantaneous power level of the RF signal is between the first power threshold and the second power threshold.
10. The power management circuit of claim 1 , wherein one or more of the first power amplifier and the second power amplifier is a differential power amplifier.
11. A method for controlling a dual-amplifier power amplifier circuit in a power management circuit comprising: activating a first power amplifier at all times to amplify a radio frequency (RF) signal based on a supply voltage; activating a second power amplifier when an instantaneous power level of the RF signal is higher than or equal to a first power threshold that is lower than one-half of a peak power level of the RF signal to further amplify the RF signal based on the supply voltage; and modulating a load impedance at a respective output of the first power amplifier when the instantaneous power level of the RF signal is higher than or equal to the first power threshold but lower than a second power threshold that is also lower than one-half of the peak power level of the RF signal.
12. The method of claim 11 , further comprising deactivating the second power amplifier when the instantaneous power level of the RF signal is below the first power threshold.
13. The method of claim 11 , further comprising stopping modulation of the load impedance when the instantaneous power level of the RF signal is higher than or equal to the second power threshold.
14. The method of claim 11 , further comprising amplifying the RF signal by each of the first power amplifier and the second power amplifier to one-half of the instantaneous power level when the instantaneous power level of the RF signal is higher than or equal to the second power threshold.
15. The method of claim 11 , further comprising: operating the first power amplifier in full compression when the instantaneous power level of the RF signal is above the first power threshold; and operating the second power amplifier in full compression when the instantaneous power level of the RF signal is above the second power threshold.
16. The method of claim 11 , further comprising setting the second power threshold to be equal to two times the first power threshold.
17. The method of claim 16, further comprising maintaining the supply voltage at a constant level when the instantaneous power level of the RF signal is between the first power threshold and the second power threshold.
18. The method of claim 11 , further comprising setting the second power threshold to be less than two times the first power threshold.
19. The method of claim 18, further comprising increasing the supply voltage when the instantaneous power level of the RF signal is between the first power threshold and the second power threshold.
20. A wireless device comprising a power management circuit, the power management circuit comprises: a power management integrated circuit (PMIC) configured to generate a supply voltage based on a target voltage; and a dual-amplifier power amplifier circuit comprising: a first power amplifier always activated to amplify a radio frequency (RF) signal based on the supply voltage; a second power amplifier activated when an instantaneous power level of the RF signal is higher than or equal to a first powerthreshold that is lower than one-half of a peak power level of the RF signal to further amplify the RF signal based on the supply voltage; and an impedance modulation circuit coupled between a respective output of the first power amplifier and a respective output of the second power amplifier and configured to modulate a load impedance at the respective output of the first power amplifier when the instantaneous power level of the RF signal is higher than or equal to the first power threshold but lower than a second power threshold that is also lower than one-half of the peak power level of the RF signal.
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