Memory processing method and apparatus, multi-host system, and electronic device

Abstract

Provided in embodiments of the present disclosure are a memory processing method and apparatus, a multi-host system, and an electronic device. The method comprises: in response to a memory application request sent by a host, allocating a first memory area to the host in a first memory device in a memory pool, wherein the memory application request comprises copy indication information, the copy indication information is used for indicating whether to create a copy, and the first memory area is a primary memory area of the host; and if the copy indication information indicates that a copy could be created, allocating a second memory area to the host in a second memory device in the memory pool, wherein the second memory area is a backup memory area of the host, and the backup memory area is used for data backup of the primary memory area. The impact of memory device failures is reduced.

Description

Memory processing methods, devices, multi-host systems and electronic devices

[0001] This disclosure claims priority to Chinese Patent Application No. 202411054223.6, filed with the China Patent Office on August 1, 2024, entitled “Memory Processing Method, Apparatus, Multi-Host System and Electronic Device”, the entire contents of which are incorporated herein by reference. Technical Field

[0002] This disclosure relates to the field of cloud computing, and more specifically, to memory processing methods, apparatus, multi-host systems, and electronic devices. Background Technology

[0003] Memory pooling is a memory management technique used to optimize memory allocation and deallocation efficiency, reduce memory fragmentation, and improve system performance. A memory pool can include multiple memory devices, each of which can be divided into multiple segments, and each segment can be allocated to a host.

[0004] With this memory pooling system, a memory device can be accessed by multiple hosts simultaneously, but failure of that memory device can also have a wide-ranging impact. Summary of the Invention

[0005] This disclosure provides memory processing methods, apparatus, multi-host systems, and electronic devices that reduce the impact of memory device failures.

[0006] In a first aspect, this disclosure provides a memory processing method, including:

[0007] In response to a memory request sent by the host, a first memory region is allocated for the host in a first memory device in the memory pool, wherein the memory request includes replica indication information, the replica indication information is used to indicate whether to create a replica, and the first memory region is the host's main memory region;

[0008] If the replica indication information indicates the creation of a replica, a second memory region is allocated for the host in the second memory device in the memory pool. The second memory region is the host's backup memory region, which is used to back up data from the main memory region.

[0009] Secondly, this disclosure provides a memory processing method, including:

[0010] In response to a memory request sent by the host, a first logical device is allocated for the host in a first multi-logical device memory device in the memory pool, wherein the memory request includes replica indication information, the replica indication information is used to indicate whether to create a replica, and the first logical device is the host's main memory region;

[0011] If the replica indication information indicates the creation of a replica, a second logical device is allocated for the host in the second multi-logical device memory device in the memory pool. The second logical device is a backup memory area for the host and is used to back up data from the first logical device.

[0012] Thirdly, this disclosure provides a memory processing apparatus, comprising:

[0013] The first allocation module is configured to allocate a first memory region for the host in a first memory device in response to a memory request sent by the host, wherein the memory request includes replica indication information, the replica indication information is used to indicate whether to create a replica, and the first memory region is the host's main memory region;

[0014] The second allocation module is used to allocate a second memory region for the host in a second memory device if the replica indication information indicates the creation of a replica. The second memory region is a backup memory region for the host and is used to back up data in the main memory region.

[0015] Fourthly, this disclosure provides a multi-host system, including: multiple hosts, a memory pool, and communication and management components;

[0016] The communication and management component is used to perform the methods described in the first or second aspect, allocating memory for the host in the memory pool.

[0017] Fifthly, this disclosure provides an electronic device, including: a memory and a processor;

[0018] The memory is used to store computer programs;

[0019] The processor is configured to execute a computer program stored in the memory, wherein the computer program, when executed, causes the processor to perform the method described in the first aspect or the second aspect.

[0020] In a sixth aspect, this disclosure provides a computer-readable storage medium storing a computer program that, when executed by a processor, causes the processor to perform the method as described in the first or second aspect.

[0021] In a seventh aspect, this disclosure provides a computer program product, including a computer program that, when executed by a processor, implements the method described in the first aspect.

[0022] In the memory processing method, apparatus, multi-host system, and electronic device provided in this disclosure, based on the host's memory request, if the host needs a memory copy, when allocating memory for the host in the memory pool, in addition to allocating a main memory area for the host, a backup memory area is also allocated for the host. The main memory area and the backup memory area are located in different memory devices in the memory pool. In this case, when the host writes data to memory, it will be written to both the main memory area and the backup memory area, realizing redundant backup of memory. Furthermore, if one of the memory devices fails, it will not affect the host. Attached Figure Description

[0023] To more clearly illustrate the technical solutions in the embodiments of this disclosure or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of this disclosure. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0024] Figure 1 is a schematic diagram of the structure of a multi-host system provided in an embodiment of this disclosure;

[0025] Figure 2 is a schematic flowchart of a memory processing method provided in an embodiment of this disclosure;

[0026] Figure 3 is a schematic diagram of the structure of a multi-host system provided in an embodiment of this disclosure;

[0027] Figure 4 is a schematic diagram of the structure of an address translation table provided in an embodiment of this disclosure;

[0028] Figure 5 is a schematic diagram of the structure of a memory processing device provided in an embodiment of this disclosure;

[0029] Figure 6 is a schematic block diagram of an electronic device provided in an embodiment of this disclosure. Detailed Implementation

[0030] To make the objectives, technical solutions, and advantages of the embodiments of this disclosure clearer, the technical solutions of the embodiments of this disclosure will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this disclosure, and not all embodiments. Based on the embodiments of this disclosure, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this disclosure.

[0031] The technical terms used in the embodiments of this disclosure will be introduced.

[0032] Compute Express Link (CXL): A cache-coherent interconnect protocol for processors, memory extensions, and accelerators, consisting of multiple sub-protocols.

[0033] CXL memory: A device that includes Double Data Rate (DDR) memory and a memory controller, and provides a CXL interface and cache row-level memory access capabilities.

[0034] CXL switch: A switch designed for the CXL protocol, which enables components connected to it to communicate using the CXL protocol.

[0035] Fabric Manager: A management software responsible for managing device allocation, switch routing, and other system operational status.

[0036] Single Logic Device (SLD): A device containing a single logic unit or logic circuit that can be connected to a host.

[0037] Multiple Logic Device (MLD): A device that contains multiple logic units or logic circuits and can be connected to multiple hosts. Each logic device in a multiple logic device can be connected to one host.

[0038] CXL Memory Pool: A memory system containing multiple CXL memory devices connected to the downstream port of a CXL switch, providing memory expansion for multiple hosts. CXL memory devices can be SLD or MLD memory devices.

[0039] Redundant memory system: A memory system with data backup. It prevents data loss, reduces the impact of memory failures, and provides better reliability, availability, and serviceability (RAS).

[0040] Transparent Data Recovery (TDR): A data protection and recovery technology designed to make the data recovery process as transparent and seamless as possible to users and applications. When data is lost or corrupted, the system can automatically recover the data without significantly impacting user operations or the normal functioning of applications.

[0041] In a memory pooling system, a memory device can be accessed by multiple hosts simultaneously. Taking the CXL memory pool as an example, the CXL memory pool includes multiple MLD memory devices, and each MLD memory device can be connected to multiple hosts. If an MLD memory device fails, all the hosts connected to it will be affected.

[0042] To address this, this disclosure proposes a memory redundancy mechanism. When allocating memory for a host in a memory pool, in addition to allocating a primary memory region for the host, if the host requests to create a replica, a backup memory region is also allocated to the host. The primary memory region and the backup memory region are located in different memory devices within the memory pool. In this case, when the host writes data to memory, it will be written to both the primary memory region and the backup memory region, achieving memory redundancy backup. Thus, in the event of a failure of one of the memory devices, the redundancy backup can prevent the host from being affected.

[0043] The solution disclosed in this embodiment can be applied to a multi-host system. As shown in Figure 1, the multi-host system includes multiple hosts, a memory pool, and a communication and management component. Each host can request memory from the memory pool, which includes multiple memory devices. Different memory regions within each memory device can be used by different hosts. The hosts and the memory pool communicate through the communication and management component, which manages memory allocation and routes read / write requests from the hosts. It should be noted that the communication and management component can specifically consist of one or more components. For example, communication and management functions can be integrated into one component; alternatively, the communication and management component can include a communication component and a management component.

[0044] Figure 2 is a flowchart illustrating a memory processing method according to an embodiment of this disclosure. The execution entity of this method is a memory processing device, which may optionally be the aforementioned communication and management component. As shown in Figure 2, the method includes:

[0045] S201. In response to a memory request sent by the host, allocate a first memory region for the host in a first memory device in the memory pool, wherein the memory request includes replica indication information, which is used to indicate whether to create a replica, and the first memory region is the host's main memory region.

[0046] The memory request sent by the host includes the size of the memory it requests. Based on this requested size, the memory processing device allocates a matching first memory region to the host. Since the memory pool includes multiple memory devices, each with different states and memory sizes, the memory processing device can first check the states of each memory device to identify those in a normal state, and then further select the first memory device from these that can satisfy the host's memory request to allocate the first memory region. Optionally, if there are multiple memory devices in a normal state that can satisfy the host's memory request, they can be allocated according to a pre-set scheduling strategy, such as random selection, sequential selection, or round-robin selection.

[0047] The memory allocation request carries replica indication information to indicate whether the host requests to create a replica. For example, the replica indication information can be a replica indication bit, meaning that a single bit in the memory allocation request indicates whether to create a replica. If the replica indication information indicates that the host does not request to create a replica, then only a first memory region needs to be allocated to the host; this first memory region is the host's main memory region. If the replica indication information indicates that the host requests to create a replica, then in addition to the first memory region (the main memory region), a backup memory region also needs to be allocated to the host, which means proceeding to the subsequent step S202.

[0048] S202. If the replica instruction information indicates that a replica should be created, a second memory region is allocated for the host in the second memory device in the memory pool. The second memory region is the host's backup memory region, which is used to back up data from the main memory region.

[0049] The step of allocating the second memory region to the host in this step is similar to the step of allocating the first memory region to the host in S201. Furthermore, to avoid the impact of a single memory device failure on the host, the backup memory region and the main memory region are located in different memory devices. That is, the memory processing device selects a second memory device from the memory devices in normal working order that can meet the memory size requested by the host, and allocates the second memory region from the second memory device. In this way, the host has two memory regions, a main and a backup, located in different memory devices. When the host writes data to the memory region, the data is not only written to the main memory region but also copied to the backup memory region, achieving data backup.

[0050] In the memory processing method provided in this embodiment, based on the host's memory request, if the host needs a memory copy, when allocating memory for the host in the memory pool, in addition to allocating a main memory area for the host, a backup memory area is also allocated for the host. The main memory area and the backup memory area are located in different memory devices in the memory pool. In this case, when the host writes data to memory, it will be written to both the main memory area and the backup memory area, realizing redundant backup of memory. Furthermore, if one of the memory devices fails, it will not affect the host.

[0051] In this embodiment, the host can specify whether to create a copy or not in the copy instruction information of the memory request. The memory processing device can allocate the corresponding memory area according to the host's instruction. Thus, when the host writes data to the memory area, the memory processing device can determine how to write the data based on whether the host's memory area has a copy. That is, in response to the host's write request, the memory processing device writes the data in the write request to the first memory area; if it is determined that the first memory area has a copy, the data in the write request is written to the second memory area. In other words, if the first memory area has a copy, meaning the host specified the creation of a copy when requesting memory, then the data in the write request needs to be written to both the first and second memory areas to achieve data backup; if the first memory area does not have a copy, meaning the host did not specify the creation of a copy when requesting memory, then the host only has the first memory area, and writing the data in the write request to the first memory area completes the data writing. Whether each host in a multi-host system specifies the creation of a copy when requesting memory can be done according to the actual needs of the host's business, and is not limited in this embodiment.

[0052] Based on the above embodiments, the method by which the memory processing device allocates a memory region to the host is further described. Optionally, after allocating a first memory region to the host in the first memory device in the memory pool, the method may further include: adding a record corresponding to the host in the Address Translation Table, and adding the identifier of the first memory device and the identifier of the first memory region to the main memory region information in the host-corresponding record. Allocating a second memory region with the same size as the first memory region to the host in the second memory device in the memory pool includes: adding the identifier of the second memory device and the identifier of the second memory region to the backup memory region information in the host-corresponding record, and adding a replica identifier to the host-corresponding record.

[0053] An address translation table (ATC) is a record table stored in the host processing device to record the host's memory allocation, facilitating the determination of routes for forwarding read / write requests during subsequent host data read / write operations. Each record in the ATC table corresponding to a host may include host information, main memory region information, and backup memory region information. Host information may include the host's identifier, the host's starting physical address, and the requested memory size. Main memory region information may include the identifier of the first memory device and the identifier of the first memory region. Backup memory region information may include the identifier of the second memory device and the identifier of the second memory region. Optionally, the identifier of the first memory device may be its identifier in the memory pool, its physical address, or the port number connected to it. The identifier of the first memory region may be its physical address or its identifier within the first memory device. Similarly, the identifier of the second memory device may be its identifier in the memory pool, its physical address, or the port number connected to it. The identifier of the second memory region may be its physical address or its identifier within the second memory device.

[0054] The record for each host in the address translation table can also include a replica identifier. When a host requests to create a replica, the memory processing allocates a primary and secondary memory region for the host and writes an identifier indicating the existence of a replica to the replica identifier position in the address translation table. When a host requests not to create a replica, the memory processing allocates a primary memory region for the host and writes an identifier indicating the absence of a replica to the replica identifier position in the address translation table. For example, the replica identifier can use different values ​​to represent the presence or absence of a replica. If the host has no memory replica, the secondary memory region information is empty and the replica identifier indicates that there is no replica.

[0055] When allocating a first memory region to the host, the memory allocation device adds a record corresponding to the host to the address translation table, writes the host information in the record, and writes the identifier of the first memory device and the identifier of the first memory region in the position used to record the information of the main memory region. When allocating a second memory region to the host, the identifier of the second memory device and the identifier of the second memory region are written in the position used to record the information of the backup memory region.

[0056] The memory processing device can route write requests from the host based on the aforementioned address translation table. Specifically, in response to a host's write request, it looks up the identifier of the first memory device and the identifier of the first memory region corresponding to the host in the address translation table, and writes the data in the write request into the first memory region of the first memory device. It also looks up the replica identifier corresponding to the host in the address translation table. If, based on the replica identifier, it determines that the first memory region has a replica, it looks up the identifier of the second memory device and the identifier of the second memory region corresponding to the host in the address translation table, and writes the data in the write request into the second memory region of the second memory device. Alternatively, based on the host's write request, the memory processing device looks up the record corresponding to that host in the address translation table, sends the write request to the first memory device based on the identifier of the first memory device corresponding to that host, and the first memory device writes the data into the first memory region. Similarly, based on the identifier of the second memory device corresponding to that host, the write request is sent to the second memory device, and the second memory device writes the data into the second memory region.

[0057] The above embodiments describe the process of allocating memory regions for the host and writing data. Based on this, if the host's memory region fails, such as due to data loss or a memory device malfunction, data recovery and reallocation of memory regions can be performed.

[0058] In one scenario, if the first memory region fails, a third memory region is allocated to the host in the third memory device; the second memory region is designated as the new main memory region, and the third memory region is designated as the new backup memory region; the data in the second memory region is copied to the third memory region.

[0059] If the first memory region fails, which is the main memory region, then the original backup memory region, which is the second memory region, needs to be designated as the new main memory region. The third memory region, which is reassigned to the host in the third memory device, needs to be designated as the new backup memory region. The data in the second memory region needs to be copied to the third memory region to achieve data backup.

[0060] In this scenario, the processing based on the aforementioned address translation table includes modifying the information of the main memory region in the host's corresponding record to the identifier of the second memory device and the identifier of the second memory region; and modifying the information of the backup memory region in the host's corresponding record to the identifier of the third memory device and the identifier of the third memory region. By modifying the address translation table, the host's main memory region is changed from the first memory region to the second memory region, and the host's backup memory region is changed from the second memory region to the third memory region. Subsequent host reads and writes to the memory regions are based on the modified address translation table. Since the data in the second memory region remains normal even if the first memory region fails, it will not affect host access. Furthermore, by reallocating the third memory region and copying the data from the second memory region to the third memory region, data backup is achieved again.

[0061] In another scenario, in the event of a failure in the second memory region, a fourth memory region is allocated to the host in the fourth memory device; the fourth memory region is designated as the new backup memory region; and the data in the first memory region is copied to the fourth memory region.

[0062] If the second memory region fails, also known as the backup memory region fails, a new backup memory region, or fourth memory region, needs to be allocated to the host in another memory device. The data in the first memory region is then copied to the fourth memory region to achieve data backup.

[0063] In this scenario, the processing based on the aforementioned address translation table includes modifying the information of the backup memory region in the host's corresponding record to include the identifier of the fourth memory device and the identifier of the fourth memory region. By modifying the address translation table, the host's backup memory region is changed from the second memory region to the fourth memory region. Subsequent host reads and writes to the memory region are based on the modified address translation table. Since the data in the first memory region remains normal even if the second memory region fails, it will not affect host access. Furthermore, by reallocating the fourth memory region and copying the data from the first memory region to the fourth memory region, data backup is achieved again.

[0064] In this embodiment of the disclosure, the host only needs to request memory during the memory allocation phase. Data backup and replication, consistency maintenance, and data recovery in fault scenarios do not require the host's participation and are automatically completed by the memory processing device and memory pool without the user's awareness, thus achieving transparent data recovery.

[0065] The above embodiments describe the allocation of primary and backup memory regions for the host in the memory pool, and the processes of writing data and performing data recovery in the scenario of primary and backup memory regions. In the scenario where the memory device is an MLD memory device, a memory region is allocated to the host within the memory device, which is equivalent to allocating a logical device (LD) within the MLD memory device. Specifically, in response to a memory request sent by the host, a first LD is allocated to the host in the first MLD memory device in the memory pool. The memory request includes replica indication information, which indicates whether to create a replica. The first LD is the host's primary memory region. If the replica indication information indicates to create a replica, a second LD is allocated to the host in the second MLD memory device in the memory pool. The second LD is the host's backup memory region and is used to back up data from the first LD.

[0066] Taking a CXL memory pool, which includes multiple MLD memory devices, as an example, the solution of this embodiment will be described. Figure 3 is a schematic diagram of a multi-host system provided by this embodiment. As shown in Figure 3, the multi-host system includes multiple hosts, a CXL memory pool, a CXL switch, and a management component. The CXL switch and the management component together constitute the communication and management component in the aforementioned embodiment. Figure 3 illustrates this by dividing the communication and management component into two modules: the CXL switch and the management component. The hosts and the management component are connected to the upstream port of the CXL switch, and the MLD memory devices in the CXL memory pool are connected to the downstream port of the CXL switch. In addition, the hosts and the management component are connected through a non-CXL network (e.g., Ethernet or IP network). The CXL switch includes an address translation table and a replication engine.

[0067] Figure 4 illustrates the structure of an address translation table. As shown in Figure 4, the address translation table can include multiple records, each corresponding to a host. The host information section includes the host's identifier, starting address, and size. The number of regions serves as a replica identifier; a region count of 1 indicates one memory region (no memory replicas), while a region count of 2 indicates two memory regions (with memory replicas). The information for the primary memory region, i.e., the first mapped region, includes the port number of the CXL switch connecting to the first MLD memory device (the first MLD port) and the identifier of the first LD within the first MLD memory device (the first LD identifier). The information for the backup memory region, i.e., the second mapped region, includes the port number of the CXL switch connecting to the second MLD memory device (the second MLD port) and the identifier of the second LD within the second MLD memory device (the second LD identifier).

[0068] The host communicates with the management component via a non-CXL network, sending a memory allocation request. The host's starting address and the requested memory size are included in the request. Upon receiving the request, the management component checks the current status of each MLD memory device in the memory pool and selects the first LD from the first MLD. It then adds a memory allocation record for the host to the CXL switch's address translation table via the Peripheral Component Interconnect Express (PCIe) interface. This record includes the port number of the CXL switch connected to the first MLD and the identifier of the first LD within that MLD. Next, the management component checks the replication indication information in the memory allocation request. If the replication indication indicates the creation of a replica, the management component determines the second LD in the second MLD. Optionally, this second LD can have the same size as the first LD. The management component then increases the number of zones from 1 to 2 in the CXL switch's address translation table via the PCIe interface and adds the port number of the CXL switch connected to the second MLD and the identifier of the second LD within the second MLD to the address translation table.

[0069] The host sends a read or write request based on the address it requested. The CXL switch looks up its address translation table, determines the port number of the corresponding MLD memory device, and sends the read or write request to the downstream port. The memory controller in the MLD memory device completes the read or write operation and sends the required data or response back to the CXL switch, which then forwards the data or response to the host.

[0070] When a CXL switch receives a write request from a host, it looks up the address translation table to obtain information about the mapped MLD memory device. Then, it sends the write request to the corresponding first MLD memory device. After the first MLD memory device completes the write, the CXL switch sends a completion response to the host. Next, the CXL switch checks the number of regions in the address translation table. If the number of regions is 2, it indicates that the memory region has a replica. The CXL switch then generates a new request containing information about the backup memory region and places it in the replication engine. The replication engine then handles the write operations to the backup memory region.

[0071] Whenever a memory error or CXL link error occurs, the MLD memory device reports the error information to the management component via the PCIe interrupt mechanism. The management component's interrupt service is awakened, the error information is processed, and the accumulated errors are checked to see if they meet the data recovery criteria. These criteria can be determined based on the actual scenario and are not limited in this embodiment. Once the criteria are met, the management component initiates the data recovery process. Taking a primary memory region failure as an example, the management component searches for another memory region as a new backup region and then updates the CXL switch's address translation table through the following steps: replacing the information of the original primary memory region with the information of the original backup memory region; replacing the information of the original backup memory region with the information of the newly selected memory region. In this way, host read or write requests will be directed to the original backup memory region, and the original primary memory region will no longer be accessed. Furthermore, the management component sends a migration request to the replication engine. The migration request contains information about the new backup memory region, used to copy data from the new primary memory region to the new backup memory region. When a host's write request conflicts with a request to copy to the backup memory region (i.e., the two requests have the same address), the replication request must be completed before the host's write request to ensure data consistency between the primary and backup memory regions. During the migration process, write requests from the host need to be written normally to both the new backup memory area and the new backup memory area.

[0072] Figure 5 is a schematic diagram of a memory processing device provided in an embodiment of this disclosure. As shown in Figure 5, the fault diagnosis device 500 includes:

[0073] The first allocation module 501 is used to allocate a first memory region for the host in the first memory device in response to a memory request sent by the host. The memory request includes replica indication information, which is used to indicate whether to create a replica. The first memory region is the host's main memory region.

[0074] The second allocation module 502 is used to allocate a second memory region for the host in the second memory device if the replica indication information indicates that a replica should be created. The second memory region is the host's backup memory region, which is used to back up data from the main memory region.

[0075] One implementation also includes: a write module, used for:

[0076] In response to a write request from the host, the data in the write request is written to the first memory area;

[0077] If it is determined that the first memory region has a copy, the data in the write request is written to the second memory region.

[0078] In one implementation, it further includes: a first data recovery module, used for:

[0079] In the event of a failure in the first memory region, a third memory region is allocated to the host in the third memory device;

[0080] The second memory region is designated as the new main memory region, and the third memory region is designated as the new backup memory region.

[0081] Copy the data from the second memory region to the third memory region.

[0082] In one implementation, it further includes: a first data recovery module, used for:

[0083] In the event of a failure in the second memory region, a fourth memory region is allocated to the host in the fourth memory device;

[0084] The fourth memory region is designated as the new backup memory region;

[0085] Copy the data from the first memory region to the fourth memory region.

[0086] In one implementation, the first allocation module 501 is used for:

[0087] Add a record corresponding to the host in the address translation table, and add the identifier of the first memory device and the identifier of the first memory region in the main memory region information of the record corresponding to the host.

[0088] The second allocation module 502 is used for:

[0089] In the backup memory area information in the record corresponding to the host, add the identifier of the second memory device and the identifier of the second memory area, and add the replica identifier in the record corresponding to the host.

[0090] In one implementation, a module is written for:

[0091] In response to a write request from the host, the identifier of the first memory device and the identifier of the first memory region corresponding to the host are looked up in the address translation table, so as to write the data in the write request into the first memory region of the first memory device;

[0092] The address translation table is searched for the replica identifier corresponding to the host. If it is determined that the first memory region has a replica based on the replica identifier, the address translation table is searched for the identifier of the second memory device and the identifier of the second memory region corresponding to the host, so that the data in the write request can be written to the second memory region in the second memory device.

[0093] In one implementation, the record corresponding to the host includes the host's identifier, the host's starting physical address, and the requested memory size. The identifier of the first memory device is the identifier of the first memory device in the memory pool, the physical address of the first memory device, or the port number connected to the first memory device. The identifier of the first memory region is the physical address of the first memory region or the identifier of the first memory region within the first memory device. The identifier of the second memory device is the identifier of the second memory device in the memory pool, the physical address of the second memory device, or the port number connected to the second memory device. The identifier of the second memory region is the physical address of the second memory region or the identifier of the second memory region within the second memory device.

[0094] The memory processing apparatus of this disclosure can be used to implement the memory processing method of any of the foregoing embodiments, and its implementation principle and technical effect are similar, so they will not be described again here.

[0095] Figure 6 is a schematic block diagram of an electronic device provided in an embodiment of this disclosure. As shown in Figure 6, the electronic device 600 may include at least one processor 601 for implementing the memory processing method provided in an embodiment of this disclosure.

[0096] Optionally, the electronic device 600 further includes at least one memory 602 for storing program instructions and / or data. The memory 602 is coupled to the processor 601. The coupling in this embodiment is an indirect coupling or communication connection between devices, units, or modules, and can be electrical, mechanical, or other forms, for information exchange between devices, units, or modules. The processor 601 may operate in conjunction with the memory 602. The processor 601 may execute program instructions stored in the memory 602. At least one of the at least one memory may be included in the processor.

[0097] Optionally, the electronic device 600 further includes a communication interface 603 for communicating with other devices via a transmission medium, thereby enabling the electronic device 600 to communicate with other devices. The communication interface 603 may be, for example, a transceiver, interface, bus, circuit, or a device capable of transmitting and receiving functions. The processor 601 can utilize the communication interface 603 to transmit and receive data and / or information, and to implement the methods provided in the embodiments of this disclosure. See the detailed description in the foregoing embodiments for further details, which will not be repeated here.

[0098] This embodiment of the present disclosure does not limit the specific connection medium between the processor 601, memory 602, and communication interface 603. In FIG. 6, the processor 601, memory 602, and communication interface 603 are connected via a bus 604. The bus 604 is represented by a thick line in FIG. 6. The connection methods between other components are only illustrative and not intended to be limiting. This bus can be divided into address bus, data bus, control bus, etc. For ease of illustration, only one thick line is used in FIG. 6, but this does not indicate that there is only one bus or one type of bus.

[0099] It should be understood that the processor in the embodiments of this disclosure can be an integrated circuit chip with signal processing capabilities. In implementation, each step of the above method embodiments can be completed by the integrated logic circuitry in the processor's hardware or by instructions in software form. The processor can be a general-purpose processor, a digital signal processor (DSP), an application-specific integrated circuit (ASIC), a field-programmable gate array (FPGA), or other programmable logic devices, discrete gate or transistor logic devices, or discrete hardware components. It can implement or execute the methods, steps, and logic block diagrams disclosed in the embodiments of this disclosure. The general-purpose processor can be a microprocessor or any conventional processor. The steps of the methods disclosed in the embodiments of this disclosure can be directly embodied in the execution of a hardware decoding processor, or by a combination of hardware and software modules in the decoding processor. The software modules can be located in random access memory, flash memory, read-only memory, programmable read-only memory, electrically erasable programmable memory, registers, or other mature storage media in the art. This storage medium is located in memory, and the processor reads the information in the memory and, in conjunction with its hardware, completes the steps of the above method.

[0100] It should also be understood that the memory in the embodiments of this disclosure may be volatile memory or non-volatile memory, or may include both volatile and non-volatile memory. The non-volatile memory may be read-only memory (ROM), programmable read-only memory (PROM), erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), or flash memory. The volatile memory may be random access memory (RAM), which is used as an external cache. By way of example, but not limitation, many forms of RAM are available, such as Static Random Access Memory (SRAM), Dynamic Random Access Memory (DRAM), Synchronous DRAM (SDRAM), Double Data Rate SDRAM (DDR SDRAM), Enhanced Synchronous DRAM (ESDRAM), Sync Link DRAM (SLDRAM), and Direct Rambus RAM (DR RAM). It should be noted that the memory used in the systems and methods described herein is intended to include, but is not limited to, these and any other suitable types of memory.

[0101] This disclosure also provides a computer-readable storage medium storing a computer program (also referred to as code or instructions). When the computer program is run by a processor, it causes the computer to perform the methods as described in any of the foregoing embodiments.

[0102] This disclosure also provides a computer program product, including a computer program that, when executed by a processor, implements the methods in any of the foregoing embodiments.

[0103] As used in this disclosure, the terms “unit”, “module”, etc., can be used to refer to computer-related entities, hardware, firmware, combinations of hardware and software, software, or software in execution.

[0104] Those skilled in the art will recognize that the various illustrative logical blocks and steps described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this disclosure. In the several embodiments provided in this disclosure, it should be understood that the disclosed apparatus, devices, and methods can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative; for example, the division of units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the shown or discussed mutual couplings or direct couplings or communication connections may be through some interfaces; indirect couplings or communication connections between devices or units may be electrical, mechanical, or other forms.

[0105] The unit described as a separate component may or may not be physically separate. The component shown as a unit may or may not be a physical unit; that is, it may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0106] In addition, the functional units in the various embodiments of this disclosure can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit.

[0107] In the above embodiments, the functions of each functional unit can be implemented entirely or partially through software, hardware, firmware, or any combination thereof. When implemented using software, it can be implemented entirely or partially in the form of a computer program product. This computer program product includes one or more computer instructions (programs). When the computer program instructions (programs) are loaded and executed on a computer, all or part of the flow or function according to the embodiments of this disclosure is generated. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device. The computer instructions can be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another. For example, the computer instructions can be transmitted from one website, computer, server, or data center to another via wired (e.g., coaxial cable, fiber optic, Digital Subscriber Line, DSL) or wireless (e.g., infrared, wireless, microwave, etc.) means. The computer-readable storage medium can be any available medium that a computer can access or a data storage device such as a server or data center that integrates one or more available media. The available medium can be magnetic media (e.g., floppy disks, hard disks, magnetic tapes), optical media (e.g., Digital Video Discs, DVDs), or semiconductor media (e.g., Solid State Disks, SSDs), etc.

[0108] If this function is implemented as a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this disclosure, in essence, or the part that contributes to the prior art, or a part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods of the various embodiments of this disclosure. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, ROM, RAM, magnetic disks, or optical disks.

[0109] The user information (including but not limited to user device information, user personal information, etc.) and data (including but not limited to data used for analysis, data stored, data displayed, etc.) involved in this disclosure are all information and data authorized by the user or fully authorized by all parties. Furthermore, the collection, use and processing of the relevant data shall comply with the relevant laws, regulations and standards of the relevant countries and regions, and corresponding operation entry points shall be provided for users to choose to authorize or refuse.

[0110] The above description is merely a specific embodiment of this disclosure, but the scope of protection of this disclosure is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this disclosure should be included within the scope of protection of this disclosure. Therefore, the scope of protection of this disclosure should be determined by the scope of the claims.

Claims

1. A memory processing method, wherein, The method comprises: allocating a first memory region for the host in a first memory device in a memory pool in response to a memory application request sent by the host, wherein the memory application request comprises copy indication information, the copy indication information is used to indicate whether to create a copy, and the first memory region is a primary memory region of the host; if the copy indication information indicates to create a copy, allocating a second memory region for the host in a second memory device in the memory pool, the second memory region being a backup memory region of the host, and the backup memory region being used for data backup of the primary memory region.

2. The method of claim 1, wherein, The method further comprises: writing data in the write request to the first memory region in response to the write request of the host; writing data in the write request to the second memory region in the case of determining that the first memory region has a copy.

3. The method of claim 1 or 2, wherein, The method further comprises: allocating a third memory region for the host in a third memory device in the case of failure of the first memory region; determining the second memory region as a new primary memory region and determining the third memory region as a new backup memory region; copying data in the second memory region to the third memory region.

4. The method of any one of claims 1-3, wherein, The method further comprises: allocating a fourth memory region for the host in a fourth memory device in the case of failure of the second memory region; determining the fourth memory region as a new backup memory region; copying data in the first memory region to the fourth memory region.

5. The method of any one of claims 2-4, wherein, After the first memory region is allocated for the host in the first memory device in the memory pool, the method further comprises: adding a record corresponding to the host in an address translation table, and adding an identifier of the first memory device and an identifier of the first memory region in primary memory region information in the record corresponding to the host; After the second memory region is allocated for the host in the second memory device in the memory pool, the method further comprises: adding an identifier of the second memory device and an identifier of the second memory region in backup memory region information in the record corresponding to the host, and adding a copy identifier in the record corresponding to the host.

6. The method of claim 5, wherein, The method of writing data in the write request to the first memory region in response to the write request of the host comprises: in response to the write request of the host, searching for an identifier of the first memory device and an identifier of the first memory region corresponding to the host in the address translation table, so as to write data in the write request to the first memory region in the first memory device; The method of writing data in the write request to the second memory region in the case of determining that the first memory region has a copy comprises: searching for a copy identifier corresponding to the host in the address translation table, and if it is determined that the first memory region has a copy based on the copy identifier, searching for an identifier of the second memory device and an identifier of the second memory region corresponding to the host in the address translation table, so as to write data in the write request to the second memory region in the second memory device.

7. The method of claim 5 or 6, wherein, The record corresponding to the host comprises an identifier of the host, a starting physical address of the host, and a requested memory size, an identifier of the first memory device is an identifier of the first memory device in the memory pool, a physical address of the first memory device, or a port number connected to the first memory device, and an identifier of the first memory region is a physical address of the first memory region or an identifier of the first memory region in the first memory device; An identifier of the second memory device is an identifier of the second memory device in the memory pool, a physical address of the second memory device, or a port number connected to the second memory device, and an identifier of the second memory region is a physical address of the second memory region or an identifier of the second memory region in the second memory device.

8. A memory processing method, wherein, Comprise: In response to a memory application request sent by a host, a first logical device is allocated to the host in a first multi-logical device memory device in a memory pool, wherein the memory application request comprises copy indication information, the copy indication information is used to indicate whether to create a copy, and the first logical device is a primary memory region of the host; If the copy indication information indicates to create a copy, a second logical device is allocated to the host in a second multi-logical device memory device in the memory pool, the second logical device is a backup memory region of the host, and the second logical device is used to backup data of the first logical device.

9. A memory processing device, wherein, Comprise: A first allocation module is configured to allocate a first memory region to a host in a first memory device in response to a memory application request sent by the host, wherein the memory application request comprises copy indication information, the copy indication information is used to indicate whether to create a copy, and the first memory region is a primary memory region of the host; A second allocation module is configured to allocate a second memory region to the host in a second memory device if the copy indication information indicates to create a copy, the second memory region is a backup memory region of the host, and the backup memory region is used to backup data of the primary memory region.

10. A multi-host system, wherein, Comprise: A plurality of hosts, a memory pool, and a communication and management component; The communication and management component is configured to execute the method of any one of claims 1-8 to allocate memory to the host in the memory pool.

11. An electronic device, comprising: Comprise: A memory and a processor; The memory is configured to store a computer program; The processor is configured to execute the computer program stored in the memory, and the computer program runs to make the processor execute the method of any one of claims 1-8.

12. A computer readable storage medium, wherein, The computer readable storage medium stores a computer program, and when the computer program is executed by a processor, the processor executes the method of any one of claims 1-8.

13. A computer program product, wherein, The computer program is executed by a processor to implement the method of any one of claims 1-8.

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