Communication method and apparatus

Abstract

Provided in the embodiments of the present application are a communication method and apparatus, which are used for reducing the computational complexity of PTRS estimation and improving the estimation accuracy. In the present application, a cyclic prefix and a cyclic suffix are constructed in a reference signal block, so that a receiving side can construct an ICI signal matrix on the basis of a signal received on one OFDM symbol; and a plurality of reference signal blocks are sent, so that an operation can be performed on the ICI signal matrix on the basis of reference signal sequences corresponding to different reference signal blocks, so as to estimate an ICI coefficient. Compared with a method for estimating an ICI coefficient on the basis of signals on a plurality of OFDM symbols, the present application involves a low algorithm complexity and a relatively small amount of calculation, and makes it possible to estimate an ICI coefficient by means of a signal on one OFDM symbol, so that the effect of different phase noises on different OFDM symbols on ICI coefficient estimation can be avoided. Therefore, in the present application, estimating an ICI coefficient by means of a signal on one OFDM symbol achieves a relatively higher accuracy.

Description

A communication method and apparatus

[0001] Cross-references to related applications

[0002] This application claims priority to Chinese Patent Application No. 202411063064.6, filed on August 2, 2024, entitled "A Communication Method and Apparatus", the entire contents of which are incorporated herein by reference. Technical Field

[0003] This application relates to the field of communication technology, and in particular to a communication method and apparatus. Background Technology

[0004] In new radio (NR), both uplink and downlink can use demodulation reference signal (DMRS) and phase tracking reference signal (PTRS) to perform channel estimation, phase noise estimation, and data demodulation. DMRS is used for channel estimation and data demodulation, while PTRS is used for phase noise estimation.

[0005] Currently, estimating or calibrating phase noise-induced inter-carrier interference (ICI) based on PTRS requires using received signals from multiple orthogonal frequency division multiplex (OFDM) symbols. This approach results in significant computational complexity and high algorithm inefficiency. Furthermore, because phase noise changes rapidly at high frequencies—meaning the phase noise differs across OFDM symbols—the accuracy of PTRS estimation based on received signals from multiple OFDM symbols is relatively low. Summary of the Invention

[0006] This application provides a communication method and apparatus for reducing the computational complexity of estimating phase noise via PTRS while improving estimation accuracy.

[0007] Firstly, this application provides a communication method. The execution subject of the method can be a communication device, or a chip or circuit on the communication device side. The communication device can be a terminal device or a network device. Taking a communication device as an example, the method includes: generating at least one first reference signal block; transmitting at least one first reference signal block, wherein the at least one first reference signal block includes: a reference signal sequence, a prefix, and a suffix; wherein the at least one first reference signal block is discretely mapped in the frequency domain.

[0008] This application constructs a cyclic prefix and cyclic suffix in the reference signal block, enabling the receiver to construct an ICI signal matrix based on the signal received on a single OFDM symbol. By transmitting multiple reference signal blocks, the ICI signal matrix can be calculated using the reference signal sequences corresponding to different reference signal blocks to estimate the ICI coefficients. Compared to estimating ICI coefficients based on signals from multiple OFDM symbols, this application has lower algorithm complexity and less computational cost. Furthermore, by estimating ICI coefficients from a single OFDM symbol, it avoids the influence of different phase noise levels on ICI coefficient estimation across different OFDM symbols. Therefore, this application achieves higher accuracy in estimating ICI coefficients from a single OFDM symbol.

[0009] In one possible design, the prefix represents a portion of the reference signal sequence; and / or, the suffix represents a portion of the reference signal sequence. This design facilitates the construction of an ICI signal matrix based on the signal received on an OFDM symbol.

[0010] In one possible design, the prefix is ​​a cyclic shift of a portion of the elements in the reference signal sequence; and / or, the suffix is ​​a cyclic shift of a portion of the elements in the reference signal sequence. This design facilitates the construction of an ICI signal matrix based on the signal received on an OFDM symbol.

[0011] In one possible design, at least one first reference signal block occupies the same frequency domain resources, or at least one first reference signal block occupies the same number of subcarriers. This design allows the first reference signal blocks to have the same sequence length, thereby ensuring that the number of phase noise figures obtained from the first reference signal blocks at different frequency domain positions is the same, which helps to construct an ICI signal matrix based on the signal received on an OFDM symbol.

[0012] In one possible design, at least one first reference signal block is mapped at equal intervals onto the scheduling bandwidth.

[0013] In one possible design, transmitting at least one first reference signal block includes: transmitting at least one first reference signal block on at least one first reference signal port.

[0014] In one possible design, the method further includes transmitting at least one second reference signal block at at least one second reference signal port, the at least one second reference signal block comprising: a reference signal sequence, a prefix, and a suffix; wherein the at least one second reference signal block is discretely mapped in the frequency domain. This design facilitates the construction of an ICI signal matrix by a second device, thereby estimating ICI coefficients based on the ICI signal matrix.

[0015] In one possible design, the first reference signal port and the second reference signal port correspond to different data streams, and at least one first reference signal block and at least one second reference signal block occupy the same time-frequency resources.

[0016] In one possible design, the length of the reference signal sequence in the first or second reference signal block is 4; the reference signal sequence comes from a first sequence set or a sequence set obtained by multiplying the first sequence set by a cyclic shift value or a sequence set obtained by multiplying the first sequence set by a constant term: {(1,1,1,-1),(1,1,-1,1),(1,-1,1,1),(1,-1,-1,-1), (1,1,j,j),(1,1,-j,-j),(1,-1,j,-j),(1,-1,-j,j),(1,j,1,j),(1,-j,1,-j),(1,-j,-1,j),(1,-j,-1,j),(1,j,j,1),(1,j,-j,-1),(1,-j,-j,1)}.

[0017] In one possible design, the length of the reference signal sequence in the first or second reference signal block is 4; the reference signal sequence comes from the second sequence set or from the sequence set obtained by multiplying the second sequence set by the cyclic shift value or from the sequence set obtained by multiplying the second sequence set by the constant term: {(1,1,1,1),(1,1,-1,-1),(1,-1,-1,1),(1,-1,1,-1), (1,-1,-j,-j),(1,-1,j,j),(1,1,j,-j),(1,1,-j,j), (1,-j,-j,-1),(1,-j,j,1),(1,j,j,-1),(1,j,-j,1),(1,-j,-1,j),(1,j,-1,j),(1,j,1,-j)}.

[0018] In one possible design, the constant term is 0.5.

[0019] In one possible design, the length of the reference signal sequence in the first or second reference signal block is 3; the reference signal sequence comes from a third sequence set, or from a sequence set obtained by multiplying the third sequence set by a cyclic shift value, or from a sequence set obtained by multiplying the third sequence set by a constant term: {(1,1,1),(1,w,w} 2 ),(1,w 2 ,w), (1,w,w),(1,w) 2 ,1),(1,1,w 2 ), (1,w 2 ,w2 ),(1,w,1),(1,1,w)};

[0020] Where w = e 2πj / d.

[0021] In one possible design, the constant term is

[0022] In one possible design, the length of the reference signal sequence in the first or second reference signal block is 5; the reference signal sequence comes from a fourth sequence set, or from a sequence set obtained by multiplying the fourth sequence set by a cyclic shift value, or from a sequence set obtained by multiplying the fourth sequence set by a constant term: {(1,1,1,1,1),(1,w,w} 2 ,w 3 ,w 4 ),(1,w 2 ,w 4 ,w,w 3 ),(1,w 3 ,w,w 4 ,w 2 ),(1,w 4 ,w 3 ,w 2 ,w), (1,w,w 4 ,w 4 ,w),(1,w 2 ,w,w 2 ,1),(1,w 3 ,w 3 ,1,w 4 ),(1,w 4 ,1,w 3 ,w 3 ),(1,1,w 2 ,w,w 2 ), (1,w 2 ,w 3 ,w 3 ,w 2 ),(1,w 3 ,1,w,w),(1,w 4 ,w 2 ,w 4 ,1),(1,1,w 4 ,w 2 ,w 4 ),(1,w,w,1,w 3 ), (1,w 3 ,w 2 ,w 2 ,w 3 ),(1,w 4 ,w4 ,1,w 2 ),(1,1,w,w 3 ,w),(1,w,w 3 ,w,1),(1,w 2 ,1,w 4 ,w 4 ), (1,w 4 ,w,w,w 4 ),(1,1,w 3 ,w 4 ,w 3 ),(1,w,1,w 2 ,w 2 ),(1,w 2 ,w 2 ,1,w),(1,w 3 ,w 4 ,w 3 ,1)};

[0023] Where w = e 2πj / d .

[0024] In one possible design, the constant term is

[0025] In one possible design, the length of the reference signal sequence in the first or second reference signal block is 7.

[0026] The reference signal sequence comes from the fifth sequence set, or from the fifth sequence set multiplied by a cyclic shift value, or from the fifth sequence set multiplied by a constant term: {v 0,0 ,v 0,1 ,v 0,2 ,v 0,3 ,v 0,4 ,v 0,5 ,v 0,6 v 1,0 ,v 1,1 ,v 1,2 ,v 1,3 ,v 1,4 ,v 1,5 ,v 1,6 v 2,0 ,v 2,1 ,v 2,2 ,v 2,3 ,v 2,4 ,v 2,5 ,v 2,6 v 3,0 ,v 3,1 ,v 3,2 ,v 3,3 ,v 3,4 ,v3,5 ,v 3,6 v 4,0 ,v 4,1 ,v 4,2 ,v 4,3 ,v 4,4 ,v 4,5 ,v 4,6 v 5,0 ,v 5,1 ,v 5,2 ,v 5,3 ,v 5,4 ,v 5,5 ,v 5,6 v 6,0 ,v 6,1 ,v 6,2 ,v 6,3 ,v 6,4 ,v 6,5 ,v 6,6};

[0027] Among them, v a,b =(w 0 ,w a+b ,w 4a+2b ,w 9a+3b ,w 16a+4b ,w 25a+5b ,w 36a+6b ), w = e 2πj / d .

[0028] In one possible design, the constant term is

[0029] In one possible design, the length of the reference signal sequence in the first or second reference signal block is 11; the reference signal sequence comes from the sixth sequence set, or from the sequence set obtained by multiplying the sixth sequence set by a cyclic shift value, or from the sequence set obtained by multiplying the sixth sequence set by a constant term: {v 0,0 ,v 0,1 ,v 0,2 ,v 0,3 ,v 0,4 ,v 0,5 ,v 0,6 ,v 0,7 ,v 0,8 ,v 0,9 ,v 0,10 v 1,0 ,v 1,1 ,v 1,2 ,v 1,3 ,v 1,4 ,v 1,5 ,v 1,6 ,v 1,7 ,v 1,8 ,v1,9 ,v 1,10 , v 2,0 ,v 2,1 ,v 2,2 ,v 2,3 ,v 2,4 ,v 2,5 ,v 2,6 ,v 2,7 ,v 2,8 ,v 2,9 ,v 2,10 , v 3,0 ,v 3,1 ,v 3,2 ,v 3,3 ,v 3,4 ,v 3,5 ,v 3,6 ,v 3,7 ,v 3,8 ,v 3,9 ,v 3,10 , v s,0 ,v 4,1 ,v 4,2 ,v 4,3 ,v 4,4 ,v 4,5 ,v 4,6 ,v 4,7 ,v 4,8 ,v 4,9 ,v 4,10 , v 5,0 ,v 5,1 ,v 5,2 ,v 5,3 ,v 5,4 ,v 5,5 ,v 5,6 ,v 5,7 ,v 5,8 ,v 5,9 ,v 5,10 , v 6,0 ,v 6,1 ,v 6,2 ,v 6,3 ,v 6,4 ,v 6,5 ,v 6,6 ,v 6,7 ,v 6,8 ,v 6,9 ,v 6,10 , v 7,0 ,v 7,1 ,v 7,2 ,v 7,3 ,v 7,4 ,v 7,5 ,v 7,6 ,v 7,7 ,v 7,8 ,v7,9 ,v 7,10 v 8,0 ,v 8,1 ,v 8,2 ,v 8,3 ,v 8,4 ,v 8,5 ,v 8,6 ,v 8,7 ,v 8,8 ,v 8,9 ,v 8,10 v 9,0 ,v 9,1 ,v 9,2 ,v 9,3 ,v 9,4 ,v 9,5 ,v 9,6 ,v 9,7 ,v 9,8 ,v 9,9 ,v 9,10 v 10,0 ,v 10,1 ,v 10,2 ,v 10,3 ,v 10,4 ,v 10,5 ,v 10,6 ,v 10,7 ,v 10,8 ,v 10,9 ,v 10,10};

[0030] Among them, v a,b =(w 0 ,w a+b ,w 4a+2b ,w 9a+3b ,w 16a+4b ,w 25a+5b ,w 36a+6b ,w 49a+7b ,w 64a+8b ,w 81a+9b w 100a+10b ), w = e 2πj / d .

[0031] In one possible design, the constant term is

[0032] In one possible design, the length of the reference signal sequence in the first or second reference signal block is 8; the reference signal sequence comes from the seventh sequence set, or from the seventh sequence set multiplied by a cyclic shift value, or from the seventh sequence set multiplied by a constant term: {(1+0i, 1+0i, 1+0i, 1+0i, 1+0i, 1+0i, 1+0i, 1+0i, 1+0i, 1+0i), (1+0i, -1+0i, 1+0i, -1+0i, 1+0i, -1+0i, 1+0i, -1+0i, -1+0i, -1+0i, -1+0i, -1+0i, -1+0i, -1+0i, (1+0i, -1+0i, -1+0i, 1+0i, 1+0i, -1+0i, -1+0i, -1+0i, ... (1+0i, 1+0i, 1+0i, 1+0i, -1+0i, -1+0i, -1+0i, -1+0i), (1+0i, -1+0i, 1+0i, -1+0i, -1+0i, 1+0i, -1+0i, 1+0i), (1+0i, 1+0i, -1+0i, -1+0i, -1+0i, -1+0i, 1+0i, 1+0i), (1+0i, -1+0i, -1+0i, 1+0i, -1+0i, 1+0i, 1+0i, -1+0i), (1+0i, 0+1i, 0+1i, -1+0i, 0+1i, -1+0i, -1+0i, 0-1i), (1+0i, 0-1i, 0+1i, 1+0i, 0+1i, 1+0i, -1+0i, 0+1i), (1+0i, 0+1i, 0-1i, 1+0i, 0+1i, -1+0i, 1+0i, 0+1i), (1+0i, 0-1i, 0-1i, -1+0i, 0+1i, 1+0i, 1+0i, 0-1i), (1+0i, 0+1i, 0+1i, -1+0i, 0-1i, 1-0i, 1-0i, 0+1i), (1+0i, 0-1i, 0+1i, 1+0i, 0-1i, -1+0i, 1-0i, 0-1i), (1+0i, 0+1i, 0-1i, 1+0i, 0-1i, 1-0i, -1+0i, 0-1i), (1+0i, 0-1i, 0-1i, -1+0i, 0-1i, -1+0i, -1+0i, 0+1i), (1+0i, 0+1i, 1+0i, 0+1i, 1+0i, 0-1i, -1+0i, 0+1i), (1+0i, 0-1i, 1+0i, 0-1i, 1+0i, 0+1i, -1+0i, 0-1i), (1+0i, 0+1i, -1+0i, 0-1i, 1+0i, 0-1i, 1+0i, 0-1i), (1+0i, 0-1i, -1+0i, 0+1i, 1+0i, 0+1i, 1+0i,0+1i), (1+0i,0+1i,1+0i,0+1i,-1+0i,0+1i,1+0i,0-1i), (1+0i,0-1i,1+0i,0-1i,-1+0i,0-1i,1+0i,0+1i), (1+0i,0+1i,-1+0i,0-1i,-1+0i,0+1i,-1+0i,0+1i), (1+0i,0-1i,-1+0i,0+1i,-1+0i,0-1i,-1+0i,0-1i), (1+0i,1+0i,0+1i,0+1i,0+1i,0-1i,1+0i,-1+0i), (1+0i,-1+0i,0+1i,0-1i,0+1i,0+1i,1+0i,1+0i), (1+0i,1+0i,0-1i,0-1i,0+1i,0-1i,-1+0i,1+0i), (1+0i,-1+0i,0-1i,0+1i,0+1i,0+1i,-1+0i,-1+0i), (1+0i,1+0i,0+1i,0+1i,0-1i,0+1i,-1+0i,1+0i), (1+0i,-1+0i,0+1i,0-1i,0-1i,0-1i,-1+0i,-1+0i), (1+0i,1+0i,0-1i,0-1i,0-1i,0+1i,1+0i,-1+0i), (1+0i,-1+0i,0-1i,0+1i,0-1i,0-1i,1+0i,1+0i), (1+0i,1+0i,0+1i,0-1i,1+0i,-1+0i,0+1i,0+1i), (1+0i,-1+0i,0+1i,0+1i,1+0i,1+0i,0+1i,0-1i), (1+0i,1+0i,0-1i,0+1i,1+0i,-1+0i,0-1i,0-1i), (1+0i,-1+0i,0-1i,0-1i,1+0i,1+0i,0-1i,0+1i), (1+0i,1+0i,0+1i,0-1i,-1+0i,1+0i,0-1i,0-1i), (1+0i,-1+0i,0+1i,0+1i,-1+0i,-1+0i,0-1i,0+1i), (1+0i,1+0i,0-1i,0+1i,-1+0i,1+0i,0+1i,0+1i), (1+0i,-1+0i,0-1i,0-1i,-1+0i,-1+0i,0+1i,0-1i), (1+0i,0+1i,1+0i,0-1i,0+1i,1+0i,0+1i,-1+0i), (1+0i,0-1i,1+0i,0+1i,0+1i,-1+0i,0+1i,1+0i), (1+0i,0+1i,-1+0i,0+1i,0+1i,1+0i,0-1i,1+0i), (1+0i,0-1i,-1+0i,0-1i,0+1i,-1+0i,0-1i,-1+0i), (1+0i,0+1i,1+0i,0-1i,0-1i,-1+0i,0-1i,1+0i), (1+0i,0-1i,1+0i,0+1i,0-1i,1+0i,0-1i,-1+0i), (1+0i,0+1i,-1+0i,0+1i,0-1i,-1+0i,0+1i,-1+0i), (1+0i,0-1i,-1+0i,0-1i,0-1i,1+0i,0+1i,1+0i), (1+0i,0+1i,0+1i,1+0i,1+0i,0+1i,0-1i,-1+0i), (1+0i,0-1i,0+1i,-1+0i,1+0i,0-1i,0-1i,1+0i), (1+0i,0+1i,0-1i,-1+0i,1+0i,0+1i,0+1i,1+0i), (1+0i,0-1i,0-1i,1+0i,1+0i,0-1i,0+1i,-1+0i), (1+0i,0+1i,0+1i,1+0i,-1+0i,0-1i,0+1i,1+0i), (1+0i,0-1i,0+1i,-1+0i,-1+0i,0+1i,0+1i,-1+0i), (1+0i,0+1i,0-1i,-1+0i,-1+0i,0-1i,0-1i,-1+0i), (1+0i,0-1i,0-1i,1+0i,-1+0i,0+1i,0-1i,1+0i), (1+0i,1+0i,0+1i,0-1i,0+1i,0+1i,1+0i,-1+0i), (1+0i,-1+0i,0+1i,0+1i,0+1i,0-1i,1+0i,1+0i), (1+0i,1+0i,0-1i,0+1i,0+1i,0+1i,-1+0i,1+0i), (1+0i,-1+0i,0-1i,0-1i,0+1i,0-1i,-1+0i,-1+0i), (1+0i,1+0i,0+1i,0-1i,0-1i,0-1i,-1+0i,1+0i), (1+0i,-1+0i,0+1i,0+1i,0-1i,0+1i,-1+0i,-1+0i), (1+0i,1+0i,0-1i,0+1i,0-1i,0-1i,1+0i,-1+0i), (1+0i,-1+0i,0-1i,0-1i,0-1i,0+1i,1+0i,1+0i)}。,

[0033] In one possible design, the constant term is

[0034] In one possible design, the cyclic shift value is e jα Or e -jα .

[0035] The different lengths described above allow the use of low cross-correlation sequences for the reference signal sequence, which helps to further improve the accuracy of estimating the ICI coefficients.

[0036] Secondly, this application provides a communication method. The execution subject of the method can be a communication device, or a chip or circuit on the communication device side. The communication device can be a terminal device or a network device. Taking a communication device as an example, the method includes: receiving at least one first reference signal block, wherein the at least one first reference signal block includes: a reference signal sequence, a prefix, and a suffix; wherein the at least one first reference signal block is discretely mapped in the frequency domain.

[0037] This application constructs a cyclic prefix and cyclic suffix in the reference signal block, enabling the receiver to construct an ICI signal matrix based on the signal received on a single OFDM symbol. By transmitting multiple reference signal blocks, the ICI signal matrix can be calculated using the reference signal sequences corresponding to different reference signal blocks to estimate the ICI coefficients. Compared to estimating ICI coefficients based on signals from multiple OFDM symbols, this application has lower algorithm complexity and less computational cost. Furthermore, by estimating ICI coefficients from a single OFDM symbol, it avoids the influence of different phase noise levels on ICI coefficient estimation across different OFDM symbols. Therefore, this application achieves higher accuracy in estimating ICI coefficients from a single OFDM symbol.

[0038] In one possible design, the prefix represents a portion of the reference signal sequence; and / or, the suffix represents a portion of the reference signal sequence. This design facilitates the construction of an ICI signal matrix based on the signal received on an OFDM symbol.

[0039] In one possible design, the prefix is ​​a cyclic shift of a portion of the elements in the reference signal sequence; and / or, the suffix is ​​a cyclic shift of a portion of the elements in the reference signal sequence. This design facilitates the construction of an ICI signal matrix based on the signal received on an OFDM symbol.

[0040] In one possible design, at least one first reference signal block occupies the same frequency domain resources, or at least one first reference signal block occupies the same number of subcarriers. This design allows the first reference signal blocks to have the same sequence length, thereby ensuring that the number of phase noise figures obtained from the first reference signal blocks at different frequency domain positions is the same, which helps to construct an ICI signal matrix based on the signal received on an OFDM symbol.

[0041] In one possible design, at least one first reference signal block is mapped at equal intervals onto the scheduling bandwidth.

[0042] In one possible design, receiving at least one first reference signal block includes: receiving at least one first reference signal block on at least one first reference signal port.

[0043] In one possible design, the method further includes: receiving at least one second reference signal block at at least one second reference signal port, the at least one second reference signal block comprising: a reference signal sequence, a prefix, and a suffix; estimating ICI coefficients based on at least one first reference signal block and at least one second reference signal block; wherein the at least one second reference signal block is discretely mapped in the frequency domain. This design facilitates the construction of an ICI signal matrix by a second device, thereby estimating ICI coefficients based on the ICI signal matrix.

[0044] In one possible design, the first reference signal port and the second reference signal port correspond to different data streams, and at least one first reference signal block and at least one second reference signal block occupy the same time-frequency resources.

[0045] In one possible design, the length of the reference signal sequence in the first or second reference signal block is 4; the reference signal sequence comes from a first sequence set or a sequence set obtained by multiplying the first sequence set by a cyclic shift value or a sequence set obtained by multiplying the first sequence set by a constant term: {(1,1,1,-1),(1,1,-1,1),(1,-1,1,1),(1,-1,-1,-1), (1,1,j,j),(1,1,-j,-j),(1,-1,j,-j),(1,-1,-j,j),(1,j,1,j),(1,-j,1,-j),(1,-j,-1,j),(1,-j,-1,j),(1,j,j,1),(1,j,-j,-1),(1,-j,-j,1)}.

[0046] In one possible design, the length of the reference signal sequence in the first or second reference signal block is 4; the reference signal sequence comes from the second sequence set or from the sequence set obtained by multiplying the second sequence set by the cyclic shift value or from the sequence set obtained by multiplying the second sequence set by the constant term: {(1,1,1,1),(1,1,-1,-1),(1,-1,-1,1),(1,-1,1,-1), (1,-1,-j,-j),(1,-1,j,j),(1,1,j,-j),(1,1,-j,j), (1,-j,-j,-1),(1,-j,j,1),(1,j,j,-1),(1,j,-j,1),(1,-j,-1,j),(1,j,-1,j),(1,j,1,-j)}.

[0047] In one possible design, the constant term is 0.5.

[0048] In one possible design, the length of the reference signal sequence in the first or second reference signal block is 3; the reference signal sequence comes from a third sequence set, or from a sequence set obtained by multiplying the third sequence set by a cyclic shift value, or from a sequence set obtained by multiplying the third sequence set by a constant term: {(1,1,1),(1,w,w} 2 ),(1,w 2 ,w), (1,w,w),(1,w) 2 ,1),(1,1,w 2 ), (1,w 2 ,w 2 ),(1,w,1),(1,1,w)};

[0049] Where w = e 2πj / d .

[0050] In one possible design, the constant term is

[0051] In one possible design, the length of the reference signal sequence in the first or second reference signal block is 5; the reference signal sequence comes from a fourth sequence set, or from a sequence set obtained by multiplying the fourth sequence set by a cyclic shift value, or from a sequence set obtained by multiplying the fourth sequence set by a constant term: {(1,1,1,1,1),(1,w,w} 2 ,w 3 ,w 4 ),(1,w 2 ,w 4 ,w,w 3 ),(1,w 3 ,w,w 4 ,w2 ),(1, w 4 , w 3 , w 2 , w), (1, w, w 4 , w 4 , w), (1, w 2 , w, w 2 , 1), (1, w 3 , w 3 , 1, w 4 ), (1, w 4 , 1, w 3 , w 3 ), (1, 1, w 2 , w, w 2 ), (1, w 2 , w 3 , w 3 , w 2 ), (1, w 3 , 1, w, w), (1, w 4 , w 2 , w<� 4 , 1), (1, 1, w 4 , w 2 , w 4 ), (1, w, w, 1, w 3 ), (1, w 3 , w 2 , w 2 , w 3 ), (1, w 4 , w 4 , 1, w<00�0312>), (1, 1, w, w<�000313>, w), (1, w, w 3 , w, 1), (1, w<00003-15>, 1, w 4 , w 4 ), (1, w 4 , w, w, w 4 ), (1, 1, w 3 [[ID=8,5]]), w 4 , w 3 ), (1, w, 1, w 2 , w 2 ), (1, w 2 , w 2 , 1, w), (1, w 3 , w 4 , w 3 , 1)};

[0052] [[ID=,06]]Where w = e 2πj / d .

[0053] In one possible design, the constant term is

[0054] In one possible design, the length of the reference signal sequence in the first or second reference signal block is 7.

[0055] The reference signal sequence comes from the fifth sequence set, or from the fifth sequence set multiplied by a cyclic shift value, or from the fifth sequence set multiplied by a constant term: {v 0,0 ,v 0,1 ,v 0,2 ,v 0,3 ,v 0,4 ,v 0,5 ,v 0,6 v 1,0 ,v 1,1 ,v 1,2 ,v 1,3 ,v 1,4 ,v 1,5 ,v 1,6 v 2,0 ,v 2,1 ,v 2,2 ,v 2,3 ,v 2,4 ,v 2,5 ,v 2,6 v 3,0 ,v 3,1 ,v 3,2 ,v 3,3 ,v 3,4 ,v 3,5 ,v 3,6 v 4,0 ,v 4,1 ,v 4,2 ,v 4,3 ,v 4,4 ,v 4,5 ,v 4,6 v 5,0 ,v 5,1 ,v 5,2 ,v 5,3 ,v 5,4 ,v 5,5 ,v 5,6 v 6,0 ,v 6,1 ,v 6,2 ,v 6,3 ,v 6,4 ,v 6,5 ,v 6,6};

[0056] Among them, v a,b =(w 0 ,wa+b ,w 4a+2b ,w 9a+3b ,w 16a+4b ,w 25a+5b ,w 36a+6b ), w = e 2πj / d .

[0057] In one possible design, the constant term is

[0058] In one possible design, the length of the reference signal sequence in the first or second reference signal block is 11; the reference signal sequence comes from the sixth sequence set, or from the sequence set obtained by multiplying the sixth sequence set by a cyclic shift value, or from the sequence set obtained by multiplying the sixth sequence set by a constant term: {v 0,0 ,v 0,1 ,v 0,2 ,v 0,3 ,v 0,4 ,v 0,5 ,v 0,6 ,v 0,7 ,v 0,8 ,v 0,9 ,v 0,10 v 1,0 ,v 1,1 ,v 1,2 ,v 1,3 ,v 1,4 ,v 1,5 ,v 1,6 ,v 1,7 ,v 1,8 ,v 1,9 ,v 1,10 v 2,0 ,v 2,1 ,v 2,2 ,v 2,3 ,v 2,4 ,v 2,5 ,v 2,6 ,v 2,7 ,v 2,8 ,v 2,9 ,v 2,10 v 3,0 ,v 3,1 ,v 3,2 ,v 3,3 ,v 3,4 ,v 3,5 ,v 3,6 ,v 3,7 ,v 3,8 ,v 3,9 ,v 3,10 v 4,0 ,v 4,1 ,v 4,2 ,v4,3 ,v 4,4 ,v 4,5 ,v 4,6 ,v 4,7 ,v 4,8 ,v 4,9 ,v 4,10 , v 5,0 ,v 5,1 ,v 5,2 ,v 5,3 ,v 5,4 ,v 5,5 ,v 5,6 ,v 5,7 ,v 5,8 ,v 5,9 ,v 5,10 , v 6,0 ,v 6,1 ,v 6,2 ,v 6,3 ,v 6,4 ,v 6,5 ,v 6,6 ,v 6,7 ,v 6,8 ,v 6,9 ,v 6,10 , v 7,0 ,v 7,1 ,v 7,2 ,v 7,3 ,v 7,4 ,v 7,5 ,v 7,6 ,v 7,7 ,v 7,8 ,v 7,9 ,v 7,10 , v 8,0 ,v 8,1 ,v 8,2 ,v 8,3 ,v 8,4 ,v 8,5 ,v 8,6 ,v 8,7 ,v 8,8 ,v 8,9 ,v 8,10 , v 9,0 ,v 9,1 ,v 9,2 ,v 9,3 ,v 9,4 ,v 9,5 ,v 9,6 ,v 9,7 ,v 9,8 ,v 9,9 ,v 9,10 , v 10,0 ,v 10,1 ,v 10,2 ,v10,3 ,v 10,4 ,v 10,5 ,v 10,6 ,v 10,7 ,v 10,8 ,v 10,9 ,v 10,10};

[0059] Among them, v a,b =(w 0 ,w a+b ,w 4a+2b ,w 9a+3b ,w 16a+4b ,w 25a+5b ,w 36a+6b ,w 49a+7b ,w 64a+8b ,w 81a+9b w 100a+10b ), w = e 2πj / d .

[0060] In one possible design, the constant term is

[0061] In one possible design, the length of the reference signal sequence in the first or second reference signal block is 8; the reference signal sequence comes from the seventh sequence set, or from the seventh sequence set multiplied by a cyclic shift value, or from the seventh sequence set multiplied by a constant term: {(1+0i, 1+0i, 1+0i, 1+0i, 1+0i, 1+0i, 1+0i, 1+0i, 1+0i, 1+0i), (1+0i, -1+0i, 1+0i, -1+0i, 1+0i, -1+0i, 1+0i, -1+0i, -1+0i, -1+0i, -1+0i, -1+0i, -1+0i, -1+0i, (1+0i, -1+0i, -1+0i, 1+0i, 1+0i, -1+0i, -1+0i, -1+0i, ... (1+0i, 1+0i, 1+0i, 1+0i, -1+0i, -1+0i, -1+0i, -1+0i), (1+0i, -1+0i, 1+0i, -1+0i, -1+0i, 1+0i, -1+0i, 1+0i), (1+0i, 1+0i, -1+0i, -1+0i, -1+0i, -1+0i, 1+0i, 1+0i), (1+0i, -1+0i, -1+0i, 1+0i, -1+0i, 1+0i, 1+0i, -1+0i), (1+0i, 0+1i, 0+1i, -1+0i, 0+1i, -1+0i, -1+0i, 0-1i), (1+0i, 0-1i, 0+1i, 1+0i, 0+1i, 1+0i, -1+0i, 0+1i), (1+0i, 0+1i, 0-1i, 1+0i, 0+1i, -1+0i, 1+0i, 0+1i), (1+0i, 0-1i, 0-1i, -1+0i, 0+1i, 1+0i, 1+0i, 0-1i), (1+0i, 0+1i, 0+1i, -1+0i, 0-1i, 1-0i, 1-0i, 0+1i), (1+0i, 0-1i, 0+1i, 1+0i, 0-1i, -1+0i, 1-0i, 0-1i), (1+0i, 0+1i, 0-1i, 1+0i, 0-1i, 1-0i, -1+0i, 0-1i), (1+0i, 0-1i, 0-1i, -1+0i, 0-1i, -1+0i, -1+0i, 0+1i), (1+0i, 0+1i, 1+0i, 0+1i, 1+0i, 0-1i, -1+0i, 0+1i), (1+0i, 0-1i, 1+0i, 0-1i, 1+0i, 0+1i, -1+0i, 0-1i), (1+0i, 0+1i, -1+0i, 0-1i, 1+0i, 0-1i, 1+0i, 0-1i), (1+0i, 0-1i, -1+0i, 0+1i, 1+0i, 0+1i, 1+0i,0+1i), (1+0i,0+1i,1+0i,0+1i,-1+0i,0+1i,1+0i,0-1i), (1+0i,0-1i,1+0i,0-1i,-1+0i,0-1i,1+0i,0+1i), (1+0i,0+1i,-1+0i,0-1i,-1+0i,0+1i,-1+0i,0+1i), (1+0i,0-1i,-1+0i,0+1i,-1+0i,0-1i,-1+0i,0-1i), (1+0i,1+0i,0+1i,0+1i,0+1i,0-1i,1+0i,-1+0i), (1+0i,-1+0i,0+1i,0-1i,0+1i,0+1i,1+0i,1+0i), (1+0i,1+0i,0-1i,0-1i,0+1i,0-1i,-1+0i,1+0i), (1+0i,-1+0i,0-1i,0+1i,0+1i,0+1i,-1+0i,-1+0i), (1+0i,1+0i,0+1i,0+1i,0-1i,0+1i,-1+0i,1+0i), (1+0i,-1+0i,0+1i,0-1i,0-1i,0-1i,-1+0i,-1+0i), (1+0i,1+0i,0-1i,0-1i,0-1i,0+1i,1+0i,-1+0i), (1+0i,-1+0i,0-1i,0+1i,0-1i,0-1i,1+0i,1+0i), (1+0i,1+0i,0+1i,0-1i,1+0i,-1+0i,0+1i,0+1i), (1+0i,-1+0i,0+1i,0+1i,1+0i,1+0i,0+1i,0-1i), (1+0i,1+0i,0-1i,0+1i,1+0i,-1+0i,0-1i,0-1i), (1+0i,-1+0i,0-1i,0-1i,1+0i,1+0i,0-1i,0+1i), (1+0i,1+0i,0+1i,0-1i,-1+0i,1+0i,0-1i,0-1i), (1+0i,-1+0i,0+1i,0+1i,-1+0i,-1+0i,0-1i,0+1i), (1+0i,1+0i,0-1i,0+1i,-1+0i,1+0i,0+1i,0+1i), (1+0i,-1+0i,0-1i,0-1i,-1+0i,-1+0i,0+1i,0-1i), (1+0i,0+1i,1+0i,0-1i,0+1i,1+0i,0+1i,-1+0i), (1+0i,0-1i,1+0i,0+1i,0+1i,-1+0i,0+1i,1+0i), (1+0i,0+1i,-1+0i,0+1i,0+1i,1+0i,0-1i,1+0i), (1+0i,0-1i,-1+0i,0-1i,0+1i,-1+0i,0-1i,-1+0i), (1+0i,0+1i,1+0i,0-1i,0-1i,-1+0i,0-1i,1+0i), (1+0i,0-1i,1+0i,0+1i,0-1i,1+0i,0-1i,-1+0i), (1+0i,0+1i,-1+0i,0+1i,0-1i,-1+0i,0+1i,-1+0i), (1+0i,0-1i,-1+0i,0-1i,0-1i,1+0i,0+1i,1+0i), (1+0i,0+1i,0+1i,1+0i,1+0i,0+1i,0-1i,-1+0i), (1+0i,0-1i,0+1i,-1+0i,1+0i,0-1i,0-1i,1+0i), (1+0i,0+1i,0-1i,-1+0i,1+0i,0+1i,0+1i,1+0i), (1+0i,0-1i,0-1i,1+0i,1+0i,0-1i,0+1i,-1+0i), (1+0i,0+1i,0+1i,1+0i,-1+0i,0-1i,0+1i,1+0i), (1+0i,0-1i,0+1i,-1+0i,-1+0i,0+1i,0+1i,-1+0i), (1+0i,0+1i,0-1i,-1+0i,-1+0i,0-1i,0-1i,-1+0i), (1+0i,0-1i,0-1i,1+0i,-1+0i,0+1i,0-1i,1+0i), (1+0i,1+0i,0+1i,0-1i,0+1i,0+1i,1+0i,-1+0i), (1+0i,-1+0i,0+1i,0+1i,0+1i,0-1i,1+0i,1+0i), (1+0i,1+0i,0-1i,0+1i,0+1i,0+1i,-1+0i,1+0i), (1+0i,-1+0i,0-1i,0-1i,0+1i,0-1i,-1+0i,-1+0i), (1+0i,1+0i,0+1i,0-1i,0-1i,0-1i,-1+0i,1+0i), (1+0i,-1+0i,0+1i,0+1i,0-1i,0+1i,-1+0i,-1+0i), (1+0i,1+0i,0-1i,0+1i,0-1i,0-1i,1+0i,-1+0i), (1+0i,-1+0i,0-1i,0-1i,0-1i,0+1i,1+0i,1+0i)}。,

[0062] In one possible design, the constant term is

[0063] In one possible design, the cyclic shift value is e jα Or e -jα .

[0064] The different lengths described above allow the use of low cross-correlation sequences for the reference signal sequence, which helps to further improve the accuracy of estimating the ICI coefficients.

[0065] Thirdly, this application also provides a communication device having any of the methods provided in any of the first aspects described above. This communication device can be implemented in hardware or by hardware executing corresponding software. The hardware or software includes one or more units or modules corresponding to the functions described above.

[0066] In one possible implementation, the communication device includes a processor configured to support the communication device in performing the corresponding functions of the communication device described above. The communication device may also include a memory coupled to the processor, which stores necessary program instructions and data for the communication device. Optionally, the communication device further includes interface circuitry for supporting communication between the communication device and devices such as receiving devices.

[0067] In one possible implementation, the communication device includes corresponding functional modules, each used to implement the steps in the above method. The functions can be implemented in hardware or by hardware executing corresponding software. The hardware or software includes one or more modules corresponding to the functions described above.

[0068] In one possible implementation, the communication device includes a processing unit and a communication unit, which can perform the corresponding functions in the above method examples, as described in the methods provided in any of the first aspects, and will not be repeated here.

[0069] Fourthly, this application also provides a communication device having any of the methods provided in any of the second aspects above. This communication device can be implemented in hardware or by hardware executing corresponding software. The hardware or software includes one or more units or modules corresponding to the functions described above.

[0070] In one possible implementation, the communication device includes a processor configured to support the communication device in performing corresponding functions of the communication device described above. The communication device may also include a memory coupled to the processor, which stores necessary program instructions and data for the communication device. Optionally, the communication device further includes interface circuitry for supporting communication between the communication device and devices such as transmitting devices.

[0071] In one possible implementation, the communication device includes corresponding functional modules, each used to implement the steps in the above method. The functions can be implemented in hardware or by hardware executing corresponding software. The hardware or software includes one or more modules corresponding to the functions described above.

[0072] In one possible implementation, the communication device includes a processing unit and a communication unit, which can perform the corresponding functions in the above method examples, as described in the method provided in the second aspect, and will not be repeated here.

[0073] Fifthly, a communication device is provided, including a processor and an interface circuit. The interface circuit is used to receive signals from other communication devices outside the communication device and transmit them to the processor, or to send signals from the processor to other communication devices outside the communication device. The processor is used to implement the methods of the first aspect and any possible design through logic circuits or execution code instructions.

[0074] In a sixth aspect, a communication device is provided, including a processor and an interface circuit. The interface circuit is configured to receive signals from other communication devices outside the communication device and transmit them to the processor, or to send signals from the processor to other communication devices outside the communication device. The processor is configured to implement the methods of the second aspect and any possible design described above through logic circuits or execution code instructions.

[0075] In a seventh aspect, a computer-readable storage medium is provided that stores a computer program or instructions which, when executed by a processor, implement the methods of the first or second aspect and any possible design of either aspect.

[0076] Eighthly, a chip system is provided, comprising a processor and potentially a memory, for implementing the methods of the first or second aspect and any possible design of either aspect. The chip system may be composed of chips or may include chips and other discrete devices.

[0077] Ninth aspect, a communication system is provided, the system comprising the apparatus described in the first aspect and the apparatus described in the second aspect.

[0078] The technical effects that can be achieved by any of the technical solutions in the third to ninth aspects mentioned above can be described with reference to the technical effects that can be achieved by the technical solution in the first aspect mentioned above, and the repeated parts will not be repeated. Attached Figure Description

[0079] Figure 1 is a schematic diagram of the architecture of a communication system according to an embodiment of this application;

[0080] Figure 2 is a schematic diagram of the protocol stack of a network device according to an embodiment of this application;

[0081] Figure 3 is a schematic diagram of the architecture of an O-RAN system according to an embodiment of this application;

[0082] Figure 4 is a diagram showing the network element function division and protocol layer structure of an O-RAN device according to an embodiment of this application;

[0083] Figure 5 is a flowchart illustrating a communication method according to an embodiment of this application;

[0084] Figure 6 is a schematic diagram of a reference signal block according to an embodiment of this application;

[0085] Figure 7 is a schematic diagram of a first reference signal port according to an embodiment of this application;

[0086] Figure 8 is a data flow diagram of an embodiment of this application;

[0087] Figure 9 is a schematic diagram of the structure of a communication device according to an embodiment of this application;

[0088] Figure 10 is a schematic diagram of the structure of a communication device according to an embodiment of this application. Detailed Implementation

[0089] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the embodiments of this application will be further described in detail below with reference to the accompanying drawings.

[0090] In the embodiments of this application, "at least one" refers to one or more, and "more than one" refers to two or more. "And / or" describes the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A alone, A and B simultaneously, or B alone, where A and B can be singular or plural. The character " / " generally indicates that the preceding and following related objects are in an "or" relationship. "At least one of the following" or similar expressions refer to any combination of these items, including any combination of single or plural items. For example, at least one of a, b, or c can represent: a, b, c, ab, ac, bc, or abc, where a, b, and c can be single or multiple.

[0091] Furthermore, unless otherwise stated, the ordinal numbers such as "first" and "second" mentioned in the embodiments of this application are used to distinguish multiple objects and are not used to limit the size, content, order, timing, priority, or importance of multiple objects.

[0092] The preceding text introduced some terms and concepts involved in the embodiments of this application. The following text introduces the technical background involved in the embodiments of this application.

[0093] In new radio (NR), both uplink and downlink can use demodulation reference signal (DMRS) and phase tracking reference signal (PTRS) to perform channel estimation, phase noise estimation, and data demodulation. DMRS is used for channel estimation and data demodulation, while PTRS is used for phase noise estimation.

[0094] Currently, estimating or calibrating phase noise-induced inter-carrier interference (ICI) based on PTRS requires using received signals from multiple orthogonal frequency division multiplex (OFDM) symbols. This approach results in significant computational complexity and high algorithm inefficiency. Furthermore, because phase noise changes rapidly at high frequencies—meaning the phase noise differs across OFDM symbols—the accuracy of PTRS estimation based on received signals from multiple OFDM symbols is relatively low.

[0095] In cyclic prefix orthogonal frequency division multiplexing (CP-OFDM) waveforms, the subcarriers affected by phase noise at the receiver can be denoted as:

[0096] Where Ψ0 represents the common phase error (CPE), Ψ1, ..., Ψ N-1 Represents inter-carrier interference (ICI), Z k Represents noise.

[0097] Phase noise can cause mutual interference between subcarriers in different frequency domains within an OFDM symbol. CPE and ICI cancellation rely on filtering of the received signal. Currently, ICI cancellation requires received signals from multiple orthogonal frequency division multiplexing (OFDM) symbols. This approach results in high computational complexity and algorithm inefficiency. Furthermore, because phase noise changes rapidly at high frequencies—meaning the phase noise differs across OFDM symbols—the accuracy of PTRS estimation based on received signals from multiple OFDM symbols is relatively low.

[0098] Based on this, embodiments of this application provide a communication method and apparatus to solve the problems of complex algorithms, high computational load, and inaccuracy in ICI elimination. The method and apparatus are based on the same technical concept. Since the principles underlying the problem-solving of the method and apparatus are similar, their implementations can be mutually referenced, and repeated details will not be elaborated further.

[0099] The communication method provided in this application can be applied to communication systems, which may be communication systems related to the 3rd Generation Partnership Project (3GPP). For example, the communication system may be a long-term evolution (LTE) or a sixth-generation (5G) mobile communication system (such as a new radio (NR) communication system), or it can also be applied to other next-generation mobile communication systems, or other similar communication systems. Other similar communication systems may include wireless fidelity (WIFI), vehicle-to-everything (V2X), internet of things (IoT) systems, narrowband internet of things (NB-IoT) systems, and so on.

[0100] Please refer to Figure 1, which illustrates a communication system applicable to an embodiment of this application. The communication system includes a wireless access network 100 and a core network 200. Optionally, the communication system may also include the Internet.

[0101] The wireless access network 100 may include at least one network device and at least one terminal device. For example, the wireless access network 100 includes two network devices, 110a and 110b, and terminal devices 120a to 120j. The network architecture shown in Figure 1 is only schematic; the number of terminal devices and / or network devices may be fewer or more. The communication system described in the embodiments of this application is for the purpose of more clearly illustrating the technical solutions of the embodiments of this application and does not constitute a limitation on the communication system to which the embodiments of this application are applicable. For example, the communication system may also include other devices, such as wireless relay devices and wireless backhaul devices, which are not shown in Figure 1. As those skilled in the art will know, with the evolution of network architecture, the technical solutions provided in the embodiments of this application are also applicable to similar technical problems. When applying the technical solutions of the embodiments of this application to other communication systems, the devices, components, modules, etc. in the embodiments can be replaced with corresponding devices, components, modules in other communication systems without limitation.

[0102] In this embodiment, the network device refers to a radio access network (RAN) device. The RAN can be a 3GPP-related cellular system, such as a 5G / new radio (NR) mobile communication system, or a future-oriented evolution system (e.g., a 6G mobile communication system). The RAN can also be an open RAN (O-RAN or ORAN), a cloud radio access network (CRAN), or a virtualized RAN (vRAN), etc. The RAN can also be a communication system that integrates two or more of the above systems. The RAN device can also be referred to as a RAN node, RAN entity, or access node, etc.

[0103] In one possible scenario, a RAN node can be a base station, an evolved NodeB (eNodeB), an access point (AP), a transmission reception point (TRP), a next-generation NodeB (gNB), a next-generation network device in a 6G mobile communication system, or a network device in a future mobile communication system. A RAN node can be a macro network device, a micro network device, an indoor station, a relay node, a donor / host node, or a radio controller. RAN nodes can also be servers, wearable devices, vehicles, or in-vehicle equipment. For example, in V2X technology, a RAN node can be a roadside unit (RSU).

[0104] In another possible scenario, a RAN node can be a module or unit that performs some functions of a network device; or multiple RAN nodes can collaborate to assist terminal devices in achieving wireless access, with different RAN nodes each performing some functions of the network device. For example, a RAN node can be a central unit (CU), a distributed unit (DU), or a radio unit (RU). The function of a CU can be implemented by a single entity or by different entities. For example, the function of a CU can be further divided, that is, the control plane and the user plane can be separated and implemented by different entities, namely the control plane CU entity (i.e., CU-control plane (CP) entity) and the user plane CU entity (i.e., CU-user plane (UP) entity). The CU-CP entity and the CU-UP entity can be coupled with the DU to jointly complete the function of the RAN node. The CU and DU can be set up separately or included in the same network element, such as in the baseband unit (BBU). Any of the units among the CU (or CU-CP, CU-UP), DU, and RU in this application can be implemented by software modules, hardware modules, or a combination of software modules and hardware modules.

[0105] In different systems, CU (or CU-CP and CU-UP), DU, or RU may have different names, but those skilled in the art will understand their meaning. For example, in an ORAN system, CU can also be called O-CU (open CU), DU can also be called O-DU, CU-CP can also be called O-CU-CP, CU-UP can also be called O-CU-UP, and RU can also be called O-RU. For ease of description, this application uses CU, CU-CP, CU-UP, DU, and RU as examples.

[0106] The CU and DU can be configured according to the protocol layer functions of the wireless network they implement: for example, the CU can be configured to implement the functions of the Packet Data Convergence Protocol (PDCP) layer and above (such as the Radio Resource Control (RRC) layer and / or the Service Data Adaptation Protocol (SDAP) layer); the DU can be configured to implement the functions of the protocol layers below the PDCP layer (such as the Radio Link Control (RLC) layer, the Media Access Control (MAC) layer, and / or the Physical (PHY) layer). For specific descriptions of the above protocol layers, please refer to the relevant 3GPP technical specifications or the technical specifications of other applicable communication protocols.

[0107] For example, please refer to Figure 2, which is a schematic diagram of two typical protocol stacks of the network device provided in the embodiments of this application. In network device (1), the network device is divided into CU and DU. CU is configured to implement the functions of protocol layers above PDCP (e.g., RRC layer and / or SDAP layer, etc.); DU is configured to implement the functions of protocol layers below PDCP (e.g., RLC layer, MAC layer, and / or PHY layer, etc.). CU and DU communicate with each other based on the F1 interface. In network device (2), the network device is divided into CU and DU. CU includes CU-CP and CU-UP. CU-CP is used to implement the control plane functions of CU, and CU-UP is used to implement the user plane functions of CU. CU-CP and CU-UP can communicate based on the E1 interface. CU-CP and DU communicate based on the F1 interface (also called F1-C) that supports the control plane. CU-UP and DU communicate based on the F1 interface (also called F1-U) that supports the user plane. CU-CP is configured to implement the control plane and RRC layer functions of the PDCP layer, and CU-UP is configured to implement the user plane and SDAP layer functions of the PDCP layer. DU is configured to implement the functions of protocol layers below the PDCP layer (such as RLC, MAC, and / or PHY layers).

[0108] The above division of the processing functions of CU and DU according to protocol layers is merely an example; other division methods are also possible, and this application does not limit this. For example, in one design, CU or DU can be further divided into processing functions with protocol layers. In one design, some functions of the RLC layer and the functions of the protocol layer above the RLC layer are located in the CU, while the remaining functions of the RLC layer and the functions of the protocol layer below the RLC layer are located in the DU.

[0109] In another possible design, the DU and RU collaborate to implement the PHY layer functionality, or, more specifically, a portion of the PHY layer functionality of the DU can be moved to the RU. A DU can be connected to one or more RUs. The functions of the DU and RU can be configured in various ways depending on the design. For example, the DU may be configured to implement baseband functions, and the RU may be configured to implement mid-RF functions. Alternatively, the DU may be configured to implement higher-level functions in the PHY layer, and the RU may be configured to implement lower-level functions in the PHY layer, or both lower-level and RF functions. Higher-level functions in the physical layer may include a portion of the physical layer's functionality closer to the MAC layer, and lower-level functions may include another portion of the physical layer's functionality closer to the mid-RF side. This application does not limit the specific functions of the DU and RU. The interface between the DU and RU can be called a fronthaul interface. In one design, the CU may not have a PDCP layer; for example, the CU may only include an RRC layer. The CU-CP may not have PDCP-C. The CU-UP may not have PDCP-U, or may not have a CU-UP. In one design, the DU may not have an RLC layer; for example, the DU may only have a MAC and a higher PHY layer.

[0110] When the RAN is O-RAN, it can also have artificial intelligence (AI) capabilities. For example, O-RAN includes an intelligent controller. The intelligent controller can be a non-real-time RAN intelligent controller (RIC / non-RT RIC / NRT RIC) or a near-real-time RAN intelligent controller (RIC / near-RT RIC / nRT RIC). A non-real-time RIC can be used to implement non-real-time intelligent management of RAN functions, enabling workflows including model training and model updates, and guiding applications / functions in the nRT RIC based on policies. A near-real-time RIC can be used to implement near-real-time intelligent management of the RAN. Through data collection and related operations on the E2 interface, near-real-time control and optimization of O-RAN modules and resources are achieved.

[0111] In the embodiments of this application, the means for implementing the functions of the network device can be the network device itself, or it can be a means that supports the network device in implementing the functions, such as a chip system or a combination of devices or components that can implement the functions of the network device. This means can be installed in the network device. The embodiments of this application do not limit the specific technology or specific device form used in the network device.

[0112] In this application embodiment, any device capable of data communication with network devices can be considered a terminal device. Terminal devices are also called terminals, terminal equipment, user equipment (UE), user devices, mobile stations, or mobile terminals, etc. Terminal devices can be widely used in various scenarios. For example, terminal devices can be: mobile phones, computers, mobile internet devices (MID), wearable devices, virtual reality (VR) devices, augmented reality (AR) devices, stations (STA), robotic arms, cameras, robots, vehicles, drones, helicopters, airplanes, ships, or smart home devices (such as televisions, air conditioners, robot vacuums, speakers, set-top boxes), relays, customer premises equipment (CPE), etc.

[0113] Furthermore, in this embodiment, the terminal device can also be a terminal device in an IoT system, such as a water meter or electricity meter. IoT is an important component of future information technology development. Its main technical characteristic is connecting objects to networks through communication technology, thereby realizing an intelligent network that enables human-machine interconnection and object-to-object interconnection.

[0114] When the terminal device is applied to V2X, it can also be called a V2X device, such as a smart car, digital car, unmanned car, driverless car, pilotless car, autonomous car, pure electric vehicle, hybrid electric vehicle (HEV), range-extended electric vehicle (REEV), plug-in hybrid electric vehicle (PHEV), new energy vehicle, and RSU.

[0115] The various terminal devices described above, if located on a vehicle (e.g., placed / installed inside the vehicle), can all be considered in-vehicle terminal devices. In-vehicle terminal devices can be built into a vehicle's in-vehicle module, in-vehicle component, in-vehicle chip, or in-vehicle unit as one or more components or units. The vehicle can implement the methods of this application through the built-in in-vehicle module, in-vehicle component, in-vehicle chip, or in-vehicle unit. In-vehicle terminal devices can be vehicle equipment, in-vehicle modules, vehicles, in-vehicle units (on-board units, OBUs), remote sensing units (RSUs), in-vehicle infotainment systems (or in-vehicle transmission units) (telematics boxes, T-boxes), chips, or systems on a chip (SOCs), etc. These chips or SOCs can be installed in the vehicle, OBU, RSU, or T-box.

[0116] Figure 3 illustrates an example of an O-RAN system. It should be understood that an O-RAN system may include components other than those shown in Figure 3, without specific limitations. As shown in Figure 3, access network equipment can communicate with the core network (CN) via a backhaul link and with terminal equipment via an air interface. For example, access network equipment may include a baseband unit (BBU) and a radio unit (RU). The BBU includes at least one core unit (CU) and at least one dual unit (DU), which can communicate via at least one midhaul link. The RU can implement lower physical layer (PHY) and radio frequency (RF) functions. In some examples, the RU may be a 3GPP transmission reception point (TRP), a remote radio head (RRH), or other similar entities. In some examples, the Low-PHY may include PHY processing functions such as Fast Fourier Transform (FFT), Inverse Fast Fourier Transform (IFFT), digital beamforming, and filtering. The BBU can communicate with the CN via the backhaul link, and the RU can communicate with at least one terminal device via the air interface. The BBU can also communicate with at least one RU via the fronthaul link. The BBU and RU can be co-located or not.

[0117] Figure 4 illustrates the network element function division and protocol layer structure of an O-RAN device. It should be noted that the CU and DU configurations shown in Figure 4 are merely examples; the functions of the CU and DU can be configured as needed. For instance, the CU or DU can be configured to have more protocol layer functions, or to have only partial protocol layer processing functions. The DU and RU can be co-located or not. The DU and RU can exchange control plane information and user plane information via the lower-layer split CUS-plane (LLS-CUS) interface through the fronthaul link. The LLS-CUS may include LLS-C and LLS-U interfaces that provide the control plane (C-Plane) and user plane (U-Plane), respectively. In some examples, the control plane (C-Plane) refers to real-time control between the DU and RU. The DU and RU exchange management information via the LLS-M interface of the fronthaul link; the management plane (M-Plane) refers to non-real-time management operations between the DU and RU.

[0118] DU and RU can cooperate to implement the functions of the PHY layer. A DU can be connected to one or more RUs. The functions of DU and RU can be configured in various ways depending on the design. For example, a DU can be configured to implement baseband functions, and an RU can be configured to implement mid-RF functions. Another example is that a DU can be configured to implement higher-level functions in the PHY layer, and an RU can be configured to implement lower-level functions in the PHY layer, or to implement both lower-level and RF functions. Higher-level functions in the physical layer can include a portion of the physical layer's functions that are closer to the MAC layer, while lower-level functions in the physical layer can include another portion of the physical layer's functions that are closer to the mid-RF side.

[0119] In the embodiments of this application, the device for implementing the functions of the terminal device can be the terminal device itself, or a device capable of supporting the terminal device in implementing the functions, such as a chip system or a combination of devices or components capable of implementing the functions of the terminal device. This device can be installed in the terminal device. The embodiments of this application do not limit the specific technology or specific device form used in the terminal device.

[0120] Taking a network device as an example and a UE as a terminal device, the network device and the UE can be fixed in location or mobile. The network device and the UE can be deployed on land, including indoors or outdoors, handheld or vehicle-mounted; they can also be deployed on water; and they can also be deployed on airplanes, balloons, and artificial satellites. The embodiments of this application do not limit the application scenarios of the network device and the UE.

[0121] The network architecture and business scenarios described in the embodiments of this application are for the purpose of more clearly illustrating the technical solutions of the embodiments of this application, and do not constitute a limitation on the technical solutions provided in the embodiments of this application. As those skilled in the art will know, with the evolution of network architecture and the emergence of new business scenarios, the technical solutions provided in the embodiments of this application are also applicable to similar technical problems.

[0122] In this application, the signal transmitter is referred to as the first device, and the signal receiver is referred to as the second device. Specifically, the first device can be a terminal device, and the second device can be a network device. Alternatively, the first device can also be a network device, and the second device can be a terminal device. Or, the first device can be a first terminal device, and the second device can be a second terminal device.

[0123] The signals involved in this application may be reference signals such as PTRS and DMRS.

[0124] The technical features involved in the embodiments of this application are described below.

[0125] Figure 5 shows a flowchart of a communication method provided in an embodiment of this application. This application constructs a cyclic prefix and cyclic suffix in a reference signal block, enabling the receiving side to construct an ICI signal matrix based on the signal received on a single OFDM symbol. By transmitting multiple reference signal blocks, the ICI signal matrix can be calculated based on the reference signal sequences corresponding to different reference signal blocks to estimate the ICI coefficients. Compared to estimating ICI coefficients based on signals from multiple OFDM symbols, this application has lower algorithm complexity and less computational load. Furthermore, by estimating ICI coefficients using signals from a single OFDM symbol, the influence of different phase noise levels on ICI coefficient estimation across different OFDM symbols can be avoided. Therefore, this application achieves higher accuracy in estimating ICI coefficients using signals from a single OFDM symbol.

[0126] The method includes:

[0127] S501, the first device generates at least one first reference signal block.

[0128] The reference signal block is a continuous frequency domain resource used to map reference signals / reference signal sequences. The reference signal block can be time-division multiplexed, frequency-division multiplexed, or space-division multiplexed with other signals.

[0129] At least one first reference signal block includes: a reference signal sequence, a prefix, and a suffix. The reference signal sequences in the at least one first reference signal block may be the same or different, or some of the first reference signal blocks may have the same reference signal sequence and some of the first reference signal blocks may have different reference signal sequences.

[0130] A prefix can be a subset of elements in a reference signal sequence; for example, a prefix can be a cyclic shift of a subset of elements in a reference signal sequence. A prefix can also be called a cyclic prefix, a prefix of the reference signal sequence, or a cyclic prefix of the reference signal, etc.

[0131] A suffix can be a subset of elements in a reference signal sequence. For example, a suffix can be a cyclic shift of a subset of elements in a reference signal sequence. A suffix can also be called a cyclic suffix, a suffix of the reference signal sequence, or a cyclic suffix of the reference signal.

[0132] The reference signal sequence will be described in detail below.

[0133] Taking a reference signal sequence of length 4 as an example, the first reference signal block can be as shown in Figure 6.

[0134] S502, the first device transmits at least one first reference signal block. Correspondingly, the second device receives at least one first reference signal block.

[0135] The at least one first reference signal block is discretely mapped in the frequency domain. For example, the at least one first reference signal block is mapped at equal intervals on the scheduling bandwidth, as shown in Figure 7.

[0136] Optionally, the at least one first reference signal block occupies the same frequency domain resources. Alternatively, the at least one first reference signal block occupies the same number of subcarriers. This method ensures that the sequence length of the first reference signal blocks is the same, thereby making the number of phase noise figures obtained from the first reference signal blocks at different frequency domain positions the same, which helps to construct an ICI signal matrix based on the signal received on an OFDM symbol.

[0137] In one implementation, the first device transmits the at least one first reference signal block on at least one first reference signal port.

[0138] Optionally, the first device may also transmit at least one second reference signal block on at least one second reference signal port. The at least one second reference signal block has a similar structure to the first reference signal block, comprising: a reference signal sequence, a prefix, and a suffix. The reference signal sequence, prefix, and suffix can be found in the description of the first reference signal block and will not be repeated here. The reference signal sequences in the at least one second reference signal block may be the same or different, or some second reference signal blocks may have the same reference signal sequence while others may have different reference signal sequences.

[0139] For example, when multiple reference signal ports are configured (including at least one first reference signal port and at least one second reference signal port), the first device can transmit the at least one first reference signal block on at least one first reference signal port and at least one second reference signal block on at least one second reference signal port.

[0140] The first reference signal port and the second reference signal port can correspond to different data streams (e.g., different PUSCH streams (layers)). The time-frequency resources occupied by at least one first reference signal block and at least one second reference signal block are the same. For example, assuming that the first reference signal port corresponds to the first data stream and the second reference signal port corresponds to the second data stream, the first data stream and the second data stream can be as shown in Figure 8.

[0141] In this application, after receiving at least one first reference signal block, the second device can estimate the ICI coefficients based on the at least one first reference signal block. This allows for ICI elimination based on the ICI coefficients. For example, the second device can estimate the ICI coefficients based on the at least one first reference signal block and the at least one second reference signal block. For instance, the second device determines the ICI signal matrix corresponding to the equalized signal and performs operations on the ICI signal matrix based on the reference signal sequences of the at least one first reference signal block and the at least one second reference signal block to calculate the ICI coefficients of the first data stream and the second data stream.

[0142] Taking a reference signal sequence length of 4 as an example, the first device sends reference signal block 1 and reference signal block 2 for the first data stream, wherein the reference signal sequences of reference signal block 1 and reference signal block 2 may be the same or different. For the second data stream, reference signal block 3 and reference signal block 4 are sent, wherein the reference signal sequences of reference signal block 3 and reference signal block 4 may be the same or different.

[0143] The ICI signal matrix corresponding to the signal after equalization by the second device can be represented as: Y = X i M Ψ,i +X j M Ψ,j +Z;

[0144] or

[0145] Among them, X i This can be the signal corresponding to the first data stream, X. j This is the signal corresponding to the second data stream. M Ψ,i =a i b i ci d i M represents the ICI coefficient for the first data stream. Ψ,j =a j b j c j d j Z represents the ICI coefficients of the second data stream. Z represents noise. Below, we denote i as 1 and j as 2.

[0146] Assume the reference signal sequence of reference signal block 1 is [1 1 1 -1] T The reference signal sequence for reference signal block 3 is [1 1 -1 1]. T The first equation is obtained by multiplying the ICI signal matrix by the reference signal sequence of reference signal block 1 and ignoring the noise term. The first equation can be expressed as:

[0147] Subtracting the second row from the first row in the first equation gives 2(b2-d2), subtracting the third row from the first row gives 2(a2+d2-b2-c2), subtracting the fourth row from the first row gives 2(a2-c2), and adding the fourth row to the second row gives 2(a1+b1+c1+d1).

[0148] The second equation is obtained by multiplying the ICI signal matrix by the reference signal sequence of reference signal block 3 and ignoring the noise term. The second equation can be expressed as:

[0149] Similar to the operation of the first equation, the second equation yields 2(b1-d1), 2(a1+d1-b1-c1), 2(a1-c1), and 2(a2+b2+c2+d2).

[0150] Assume the reference signal sequence of reference signal block 2 is [1 1 1 -1] T The reference signal sequence for reference signal block 3 is [1 -1 1 1]. T The third equation is obtained by multiplying the ICI signal matrix by the reference signal sequence of reference signal block 2 and ignoring the noise term. The third equation can be expressed as:

[0151] • indicates dot product operation.

[0152] Calculating the third equation, we can determine that 2(a² + c² - b² - d²) = 2(a² + c²) - 2(b² + d²) = 2m - 2n. Based on the second equation, we previously determined 2(a² + b² + c² + d²) = 2m + 2n, therefore we can determine m = a² + c². Based on the first equation, we previously determined a² - c², thus determining the values ​​of a² and c², and consequently b² and d². From this, we can determine the ICI coefficients of the second data stream. Similarly, we can determine the ICI coefficients of the first data stream.

[0153] This application constructs a cyclic prefix and cyclic suffix in the reference signal block, enabling the receiver to construct an ICI signal matrix based on the signal received on a single OFDM symbol. By transmitting multiple reference signal blocks, the ICI signal matrix can be calculated using the reference signal sequences corresponding to different reference signal blocks to estimate the ICI coefficients. Compared to estimating ICI coefficients based on signals from multiple OFDM symbols, this application has lower algorithm complexity and less computational cost. Furthermore, estimating ICI coefficients using signals from a single OFDM symbol avoids the impact of different phase noise levels on ICI coefficient estimation across different OFDM symbols. Therefore, this application achieves higher accuracy in estimating ICI coefficients.

[0154] In this application, the reference signal sequence in the first or second reference signal block can be a short sequence with low cross-correlation, which helps to further improve the accuracy of estimating ICI coefficients.

[0155] The reference signal sequence will be introduced below in conjunction with the reference signal sequence length d.

[0156] Example 1, d is 3.

[0157] Based on this example, the reference signal sequence can be derived from a third set of sequences: {(1,1,1),(1,w,w} 2 ),(1,w 2 ,w), (1,w,w),(1,w) 2 ,1),(1,1,w 2 ), (1,w 2 ,w 2 ),(1,w,1),(1,1,w)}.

[0158] Alternatively, the reference signal sequence can be derived from the set of sequences obtained by multiplying the third sequence set by the cyclic shift value k: {k·(1,1,1),k·(1,w,w)} 2 ),k·(1,w 2 ,w), k·(1,w,w),k·(1,w) 2 ,1),k·(1,1,w 2 ), k·(1,w2 ,w 2 ),k·(1,w,1),k·(1,1,w)}.

[0159] For example, the cyclic shift value is k = e jα Or e -jα .

[0160] Alternatively, the reference signal sequence can be derived from the sequence set obtained by multiplying the third sequence set by a constant term, with the constant term as... For example, the reference signal sequence can come from the following set:

[0161] In Example 1 above, w can be e 2πj / 3 .

[0162] Example 2, d is 5.

[0163] Based on this example, the reference signal sequence can be derived from the fourth sequence set: {(1,1,1,1,1),(1,w,w} 2 ,w 3 ,w 4 ),(1,w 2 ,w 4 ,w,w 3 ),(1,w 3 ,w,w 4 ,w 2 ),(1,w 4 ,w 3 ,w 2 ,w), (1,w,w 4 ,w 4 ,w),(1,w 2 ,w,w 2 ,1),(1,w 3 ,w 3 ,1,w 4 ),(1,w 4 ,1,w 3 ,w 3 ),(1,1,w 2 ,w,w 2 ), (1,w 2 ,w 3 ,w 3 ,w 2 ),(1,w 3 ,1,w,w),(1,w 4 ,w 2 ,w 4 ,1),(1,1,w 4 ,w 2 ,w 4),(1,w,w,1,w 3 ), (1,w 3 ,w 2 ,w 2 ,w 3 ),(1,w 4 ,w 4 ,1,w 2 ),(1,1,w,w 3 ,w),(1,w,w 3 ,w,1),(1,w 2 ,1,w 4 ,w 4 ), (1,w 4 ,w,w,w 4 ),(1,1,w 3 ,w 4 ,w 3 ),(1,w,1,w 2 ,w 2 ),(1,w 2 ,w 2 ,1,w),(1,w 3 ,w 4 ,w 3 ,1)};

[0164] Alternatively, the reference signal sequence can be derived from the set of sequences obtained by multiplying the fourth sequence set by the cyclic shift value k: {k·(1,1,1,1,1),k·(1,w,w)} 2 ,w 3 ,w 4 ),k·(1,w 2 ,w 4 ,w,w 3 ),k·(1,w 3 ,w,w 4 ,w 2 ),k· (1,w 4 ,w 3 ,w 2 ,w), k·(1,w,w 4 ,w 4 ,w),k·(1,w 2 ,w,w 2 ,1),k·(1,w 3 ,w 3 ,1,w 4 ),k·(1,w 4 ,1,w 3 ,w 3 ),k· (1,1,w 2 ,w,w 2 ), k·(1,w 2,w 3 ,w 3 ,w 2 ),k·(1,w 3 ,1,w,w),k·(1,w 4 ,w 2 ,w 4 ,1),k·(1,1,w 4 ,w 2 ,w 4 ),k· (1,w,w,1,w 3 ), k·(1,w 3 ,w 2 ,w 2 ,w 3 ),k·(1,w 4 ,w 4 ,1,w 2 ),k·(1,1,w,w 3 ,w),k·(1,w,w 3 ,w,1),k· (1,w 2 ,1,w 4 ,w 4 ), k·(1,w 4 ,w,w,w 4 ),k·(1,1,w 3 ,w 4 ,w 3 ),k·(1,w,1,w 2 ,w 2 ),k·(1,w 2 ,w 2 ,1,w),k· (1,w 3 ,w 4 ,w 3 ,1)}.

[0165] For example, the cyclic shift value is k = e jα Or e -jα .

[0166] Alternatively, the reference signal sequence can be derived from the sequence set obtained by multiplying the fourth sequence set by a constant term, with the constant term as... For example, the reference signal sequence can come from the following set of sequences:

[0167] In Example 2 above, w can be e 2πj / 5 .

[0168] Example 3, d is 7.

[0169] Based on this example, the reference signal sequence can be from the fifth sequence set: {(1,1,1,1,1),(1,w,w 2 ,w 3 ,w 4 ),(1,w 2 ,w 4 ,w,w 3 ),(1,w 3 ,w,w 4 ,w 2 ),(1,w 4 ,w 3 ,w 2 ,w), (1,w,w 4 ,w 4 ,w),(1,w 2 ,w,w 2 ,1),(1,w 3 ,w 3 ,1,w 4 ),(1,w 4 ,1,w 3 ,w 3 ),(1,1,w 2 ,w,w 2 ), (1,w 2 ,w 3 ,w 3 ,w 2 ),(1,w 3 [[ID=�8]],1,w,w),(1,w 4 ,w 2 ,w 4 ,1),(1,1,w 4 ,w 2 ,w 4 ),(1,w,w,1,w 3 ), (1,w 3 ,w 2 ,w 2 ,w 3 ),(1,w 4 ,w 4 ,1,w 2 ),(1,1,w,w 3 ,w),(1,w,w 3 ,w,1),(1,w 2 ,1,w 4 ,w 4 ), (1,w 4 ,w,w,w 4 ),(1,1,w 3 ,w 4 ,w 3 ),(1,w,1,w2 ,w 2 ),(1,w 2 ,w 2 ,1,w),(1,w 3 ,w 4 ,w 3 ,1)};

[0170] Alternatively, the reference signal sequence can be derived from the sequence set obtained by multiplying the fifth sequence set by the cyclic shift value k: {k·v 0,0 ,k·v 0,1 ,k·v 0,2 ,k·v 0,3 ,k·v 0,4 ,k·v 0,5 ,k·v 0,6 , k·v 1,0 ,k·v 1,1 ,k·v 1,2 ,k·v 1,3 ,k·v 1,4 ,k·v 1,5 ,k·v 1,6 , k·v 2,0 ,k·v 2,1 ,k·v 2,2 ,k·v 2,3 ,k·v 2,4 ,k·v 2,5 ,k·v 2,6 , k·v 3,0 ,k·v 3,1 ,k·v 3,2 ,k·v 3,3 ,k·v 3,4 ,k·v 3,5 ,k·v 3,6 , k·v 4,0 ,k·v 4,1 ,k·v 4,2 ,k·v 4,3 ,k·v 4,4 ,k·v 4,5 ,k·v 4,6 , k·v 5,0 ,k·v 5,1 ,k·v 5,2 ,k·v 5,3 ,k·v 5,4 ,k·v 5,5 ,k·v 5,6 , k·v 6,0 ,k·v 6,1 ,k·v 6,2 ,k·v 6,3 ,k·v 6,4， k·v 6,5,k·v 6,6};

[0171] Among them, v a,b =(w 0 ,w a+b ,w 4a+2b ,w 9a+3b ,w 16a+4b ,w 25a+5b ,w 36a+6b ).

[0172] For example, the cyclic shift value is k = e jα Or e -jα .

[0173] Alternatively, the reference signal sequence can be derived from the sequence set obtained by multiplying the fifth sequence set by a constant term, with the constant term as... For example, the reference signal sequence can come from the following set of sequences:

[0174] Among them, v a,b =(w 0 ,w a+b ,w 4a+2b ,w 9a+3b ,w 16a+4b ,w 25a+5b ,w 36a+6b ).

[0175] In Example 3 above, w can be e 2πj / 5 .

[0176] Example 4, d is 11.

[0177] Based on this example, the reference signal sequence can be derived from the sixth sequence set: {v 0,0 ,v 0,1 ,v 0,2 ,v 0,3 ,v 0,4 ,v 0,5 ,v 0,6 ,v 0,7 ,v 0,8 ,v 0,9 ,v 0,10 v 1,0 ,v 1,1 ,v 1,2 ,v 1,3 ,v 1,4 ,v 1,5 ,v 1,6 ,v 1,7 ,v 1,8 ,v 1,9 ,v 1,10 v 2,0 ,v2,1 ,v 2,2 ,v 2,3 ,v 2,4 ,v 2,5 ,v 2,6 ,v 2,7 ,v 2,8 ,v 2,9 ,v 2,10 , v 3,0 ,v 3,1 ,v 3,2 ,v 3,3 ,v 3,4 ,v 3,5 ,v 3,6 ,v 3,7 ,v 3,8 ,v 3,9 ,v 3,10 , v 4,0 ,v 4,1 ,v 4,2 ,v 4,3 ,v 4,4 ,v 4,5 ,v 4,6 ,v 4,7 ,v 4,8 ,v 4,9 ,v 4,10 , v 5,0 ,v 5,1 ,v 5,2 ,v 5,3 ,v 5,4 ,v 5,5 ,v 5,6 ,v 5,7 ,v 5,8 ,v 5,9 ,v 5,10 , v 6,0 ,v 6,1 ,v 6,2 ,v 6,3 ,v 6,4 ,v 6,5 ,v 6,6 ,v 6,7 ,v 6,8 ,v 6,9 ,v 6,10 , v 7,0 ,v 7,1 ,v 7,2 ,v 7,3 ,v 7,4 ,v 7,5 ,v 7,6 ,v 7,7 ,v 7,8 ,v 7,9 ,v 7,10 , v8,0,v 8,1 ,v8,2 ,v 8,3 ,v 8,4 ,v 8,5 ,v 8,6 ,v 8,7 ,v 8,8 ,v 8,9 ,v 8,10 v 9,0 ,v 9,1 ,v 9,2 ,v 9,3 ,v 9,4 ,v 9,5 ,v 9,6 ,v 9,7 ,v 9,8 ,v 9,9 ,v 9,10 v 10,0 ,v 10,1 ,v 10,2 ,v 10,3 ,v 10,4 ,v 10,5 ,v 10,6 ,v 10,7 ,v 10,8 ,v 10,9 ,v 10,10};

[0178] Among them, v a,b =(w 0 ,w a+b ,w 4a+2b ,w 9a+3b ,w 16a+4b ,w 25a+5b ,w 36a+6b ,w 49a+7b ,w 64a+8b ,w 81a+9b w 100a+10b ).

[0179] Alternatively, the reference signal sequence can be derived from the set of sequences obtained by multiplying the sixth sequence set by the cyclic shift value k: {{k·v 0,0 ,k·v 0,1 ,k·v 0,2 ,k·v 0,3 ,k·v 0,4 ,k·v 0,5 ,k·v 0,6 ,k·v 0,7 ,k·v 0,8 ,k·v 0,9 ,k·v 0,10 , k·v 1,0 ,k·v 1,1 ,k·v 1,2 ,k·v 1,3 ,k·v1,4 ,k·v 1,5 ,k·v 1,6 ,k·v 1,7 ,k·v 1,8 ,k·v 1,9 ,k·v 1,10 , k·v 2,0 ,k·v 2,1 ,k·v 2,2 ,k·v 2,3 ,k·v 2,4 ,k·v 2,5 ,k·v 2,6 ,k·v 2,7 ,k·v 2,8 ,k·v 2,9 ,k·v 2,10 , k·v 3,0 ,k·v 3,1 ,k·v 3,2 ,k·v 3,3 ,k·v 3,4 ,k·v 3,5 ,k·v 3,6 ,k·v 3,7 ,k·v 3,8 ,k·v 3,9 ,k·v 3,10 , k·v 4,0 ,k·v 4,1 ,k·v 4,2 ,k·v 4,3 ,k·v 4,4 ,k·v 4,5 ,k·v 4,6 ,k·v 4,7 ,k·v 4,8 ,k·v 4,9 ,k·v 4,10 , k·v 5,0 ,k·v 5,1 ,k·v 5,2 ,k·v 5,3 ,k·v 5,4 ,k·v 5,5 ,k·v 5,6 ,k·v 5,7 ,k·v 5,8 ,k·v 5,9 ,k·v 5,10 , k·v 6,0 ,k·v 6,1 ,k·v 6,2 ,k·v 6,3 ,k·v 6,4 ,k·v 6,5 ,k·v 6,6 ,k·v 6,7, k·v 6,8 , k·v 6,9 , k·v 6,10 , k·v 7,0 , k·v 7,1 , k·v 7,2 , k·v 7,3 , k·v 7,4 , k·v 7,5 , k·v 7,6 , k·v 7,7 , k·v 7,8 , k·v 7,9 , k·v 7,10 , k·v 8,0 , k·v 8,1 , k·v 8,2 , k·v 8,3 , k·v 8,4 , k·v 8,5 , k·v 8,6 , k·v 8,7 , k·v 8,8 , k·v 8,9 , k·v 8,10 , k·v 9,0 , k·v 9,1 , k·v 9,2 , k·v 9,3 , k·v 9,4 , k·v 9,5 , k·v 9,6 , k·v 9,7 , k·v 9,8 , k·v 9,9 , k·v 9,10 , k·v 10,0 , k·v 10,1 , k·v 10,2 , k·v 10,3 , k·v 10,4 , k·v 10,5 , k·v 10,6 , k·v 10,7 , k·v 10,8 , k·v 10,9 , k·v 10,10},

[0180] where v<00Q1066> = (w 0 , w a+b , w 4a+2b , w 9a+3b , w 16a+4b , w 25a+5b , w 36a+6b , w 49a+7b , w 64a+8b , w 81a+9b , w Note: There seems to be an error in the tag <00Q1066> in the original text, it should probably be a,b . This translation is based on the corrected understanding.100a+10b ).

[0181] For example, the cyclic shift value is k = e jα Or e -jα .

[0182] Alternatively, the reference signal sequence can be derived from the sequence set obtained by multiplying the sixth sequence set by a constant term, with the constant term as... For example, the reference signal sequence can come from the following set of sequences:

[0183] Among them, v a,b =(w 0 ,w a+b ,w 4a+2b ,w 9a+3b ,w 16a+4b ,w 25a+5b ,w 36a+6b ,w 49a+7b ,w 64a+8b ,w 81a+9b w 100a+10b ).

[0184] In Example 4 above, w can be e 2πj / 5 .

[0185] Example 5, d is 8.

[0186] Based on this example, the reference signal sequence can be derived from the seventh sequence set: {(1+0i, 1+0i, 1+0i, 1+0i, 1+0i, 1+0i, 1+0i, 1+0i, 1+0i), (1+0i, -1+0i, 1+0i, -1+0i, 1+0i, -1+0i, 1+0i, -1+0i), (1+0i, 1+0i, -1+0i, -1+0i, 1+0i, -1+0i, -1+0i, -1+0i, -1+0i, 1+0i, -1+0i, 1+0i, (1+0i, 1+0i, 1+0i, 1+0i, -1+0i, -1+0i, -1+0i, -1+0i, -1+0i)} (1+0i, -1+0i, 1+0i, -1+0i, -1+0i, 1+0i, -1+0i, 1+0i), (1+0i, 1+0i, -1+0i, -1+0i, -1+0i, -1+0i, 1+0i, 1+0i), (1+0i, -1+0i, -1+0i, 1+0i, -1+0i, 1+0i, 1+0i, -1+0i), (1+0i, 0+1i, 0+1i, -1+0i, 0+1i, -1+0i, -1+0i, 0-1i), (1+0i, 0-1i, 0+1i, 1+0i, 0+1i, 1+0i, -1+0i, 0+1i), (1+0i, 0+1i, 0-1i, 1+0i, 0+1i, -1+0i, 1+0i, 0+1i), (1+0i, 0-1i, 0-1i, -1+0i, 0+1i, 1+0i, 1+0i, 0-1i), (1+0i, 0+1i, 0+1i, -1+0i, 0-1i, 1-0i, 1-0i, 0+1i), (1+0i, 0-1i, 0+1i, 1+0i, 0-1i, -1+0i, 1-0i, 0-1i), (1+0i, 0+1i, 0-1i, 1+0i, 0-1i, 1-0i, -1+0i, 0-1i), (1+0i, 0-1i, 0-1i, -1+0i, 0-1i, -1+0i, -1+0i, 0+1i), (1+0i, 0+1i, 1+0i, 0+1i, 1+0i, 0-1i, -1+0i, 0+1i), (1+0i, 0-1i, 1+0i, 0-1i, 1+0i, 0+1i, -1+0i, 0-1i), (1+0i, 0+1i, -1+0i, 0-1i, 1+0i, 0-1i, 1+0i, 0-1i), (1+0i, 0-1i, -1+0i, 0+1i, 1+0i, 0+1i, 1+0i, 0+1i), (1+0i, 0+1i, 1+0i, 0+1i, -1+0i, 0+1i, 1+0i, 0-1i), (1+0i, 0-1i, 1+0i, 0-1i, -1+0i,0-1i,1+0i,0+1i), (1+0i,0+1i,-1+0i,0-1i,-1+0i,0+1i,-1+0i,0+1i), (1+0i,0-1i,-1+0i,0+1i,-1+0i,0-1i,-1+0i,0-1i), (1+0i,1+0i,0+1i,0+1i,0+1i,0-1i,1+0i,-1+0i), (1+0i,-1+0i,0+1i,0-1i,0+1i,0+1i,1+0i,1+0i), (1+0i,1+0i,0-1i,0-1i,0+1i,0-1i,-1+0i,1+0i), (1+0i,-1+0i,0-1i,0+1i,0+1i,0+1i,-1+0i,-1+0i), (1+0i,1+0i,0+1i,0+1i,0-1i,0+1i,-1+0i,1+0i), (1+0i,-1+0i,0+1i,0-1i,0-1i,0-1i,-1+0i,-1+0i), (1+0i,1+0i,0-1i,0-1i,0-1i,0+1i,1+0i,-1+0i), (1+0i,-1+0i,0-1i,0+1i,0-1i,0-1i,1+0i,1+0i), (1+0i,1+0i,0+1i,0-1i,1+0i,-1+0i,0+1i,0+1i), (1+0i,-1+0i,0+1i,0+1i,1+0i,1+0i,0+1i,0-1i), (1+0i,1+0i,0-1i,0+1i,1+0i,-1+0i,0-1i,0-1i), (1+0i,-1+0i,0-1i,0-1i,1+0i,1+0i,0-1i,0+1i), (1+0i,1+0i,0+1i,0-1i,-1+0i,1+0i,0-1i,0-1i), (1+0i,-1+0i,0+1i,0+1i,-1+0i,-1+0i,0-1i,0+1i), (1+0i,1+0i,0-1i,0+1i,-1+0i,1+0i,0+1i,0+1i), (1+0i,-1+0i,0-1i,0-1i,-1+0i,-1+0i,0+1i,0-1i), (1+0i,0+1i,1+0i,0-1i,0+1i,1+0i,0+1i,-1+0i), (1+0i,0-1i,1+0i,0+1i,0+1i,-1+0i,0+1i,1+0i), (1+0i,0+1i,-1+0i,0+1i,0+1i,1+0i,0-1i,1+0i), (1+0i,0-1i,-1+0i,0-1i,0+1i,-1+0i,0-1i,-1+0i),(1+0i,0+1i,1+0i,0-1i,0-1i,-1+0i,0-1i,1+0i), (1+0i,0-1i,1+0i,0+1i,0-1i,1+0i,0-1i,-1+0i), (1+0i,0+1i,-1+0i,0+1i,0-1i,-1+0i,0+1i,-1+0i), (1+0i,0-1i,-1+0i,0-1i,0-1i,1+0i,0+1i,1+0i), (1+0i,0+1i,0+1i,1+0i,1+0i,0+1i,0-1i,-1+0i), (1+0i,0-1i,0+1i,-1+0i,1+0i,0-1i,0-1i,1+0i), (1+0i,0+1i,0-1i,-1+0i,1+0i,0+1i,0+1i,1+0i), (1+0i,0-1i,0-1i,1+0i,1+0i,0-1i,0+1i,-1+0i), (1+0i,0+1i,0+1i,1+0i,-1+0i,0-1i,0+1i,1+0i), (1+0i,0-1i,0+1i,-1+0i,-1+0i,0+1i,0+1i,-1+0i), (1+0i,0+1i,0-1i,-1+0i,-1+0i,0-1i,0-1i,-1+0i), (1+0i,0-1i,0-1i,1+0i,-1+0i,0+1i,0-1i,1+0i), (1+0i,1+0i,0+1i,0-1i,0+1i,0+1i,1+0i,-1+0i), (1+0i,-1+0i,0+1i,0+1i,0+1i,0-1i,1+0i,1+0i), (1+0i,1+0i,0-1i,0+1i,0+1i,0+1i,-1+0i,1+0i), (1+0i,-1+0i,0-1i,0-1i,0+1i,0-1i,-1+0i,-1+0i), (1+0i,1+0i,0+1i,0-1i,0-1i,0-1i,-1+0i,1+0i), (1+0i,-1+0i,0+1i,0+1i,0-1i,0+1i,-1+0i,-1+0i), (1+0i,1+0i,0-1i,0+1i,0-1i,0-1i,1+0i,-1+0i), (1+0i,-1+0i,0-1i,0-1i,0-1i,0+1i,1+0i,1+0i)}。,

[0187] Alternatively, the reference signal sequence can be derived from the sequence set obtained by multiplying the seventh sequence set by the cyclic shift value k: {k·(1+0i, 1+0i, 1+0i, 1+0i, 1+0i, 1+0i, 1+0i, 1+0i, 1+0i), k·(1+0i, -1+0i, 1+0i, -1+0i, 1+0i, -1+0i, 1+0i, -1+0i, -1+0i, 1+0i, -1+0i, -1+0i, -1+0i, -1+0i, k·(1+0i, -1+0i, -1+0i, 1+0i, 1+0i, -1+0i, -1+0i, 1+0i, -1+0i, -1+0i, 1+0i)} k·(1+0i, 1+0i, 1+0i, 1+0i, -1+0i, -1+0i, -1+0i, -1+0i), k·(1+0i, -1+0i, 1+0i, -1+0i, -1+0i, 1+0i, -1+0i, 1+0i), k·(1+0i, 1+0i, -1+0i, -1+0i, -1+0i, -1+0i, 1+0i, 1+0i), k·(1+0i, -1+0i, -1+0i, 1+0i, -1+0i, 1+0i, 1+0i, -1+0i), k·(1+0i, 0+1i, 0+1i, -1+0i, 0+1i, -1+0i, -1+0i, 0-1i), k·(1+0i, 0-1i, 0+1i, 1+0i, 0+1i, 1+0i, -1+0i, 0+1i), k·(1+0i, 0+1i, 0-1i, 1+0i, 0+1i, -1+0i, 1+0i, 0+1i), k·(1+0i, 0-1i, 0-1i, -1+0i, 0+1i, 1+0i, 1+0i, 0-1i), k·(1+0i, 0+1i, 0+1i, -1+0i, 0-1i, 1-0i, 1-0i, 0+1i), k·(1+0i, 0-1i, 0+1i, 1+0i, 0-1i, -1+0i, 1-0i, 0-1i), k·(1+0i, 0+1i, 0-1i, 1+0i, 0-1i, 1-0i, -1+0i, 0-1i), k·(1+0i, 0-1i, 0-1i, -1+0i, 0-1i, -1+0i, -1+0i, 0+1i), k·(1+0i, 0+1i, 1+0i, 0+1i, 1+0i, 0-1i, -1+0i, 0+1i), k·(1+0i, 0-1i, 1+0i, 0-1i, 1+0i, 0+1i, -1+0i, 0-1i), k·(1+0i, 0+1i, -1+0i, 0-1i, 1+0i, 0-1i, 1+0i, 0-1i), k·(1+0i, 0-1i, -1+0i, 0+1i, 1+0i, 0+1i, 1+0i, 0+1i), k·(1+0i, 0+1i, 1+0i,0+1i,-1+0i,0+1i,1+0i,0-1i), k·(1+0i,0-1i,1+0i,0-1i,-1+0i,0-1i,1+0i,0+1i), k·(1+0i,0+1i,-1+0i,0-1i,-1+0i,0+1i,-1+0i,0+1i), k·(1+0i,0-1i,-1+0i,0+1i,-1+0i,0+1i,-1+0i,0-1i), k·(1+0i,1+0i,0+1i,0+1i,0+1i,0+1i,0-1i,1+0i,-1+0i), k·(1+0i,-1+0i,0+1i,0-1i,0+1i,0+1i,1+0i,1+0i), k·(1+0i,1+0i,0-1i,0-1i,0+1i,0-1i,-1+0i,1+0i), k·(1+0i,-1+0i,0-1i,0+1i,0+1i,0+1i,-1+0i,-1+0i), k·(1+0i,1+0i,0+1i,0+1i,0+1i,0-1i,0+1i,-1+0i,1+0i), k·(1+0i,-1+0i,0+1i,0-1i,0+1i,-1+0i,-1+0i), k·(1+0i,1+0i,0-1i,0-1i,0-1i,0+1i,1+0i,-1+0i), k·(1+0i,-1+0i,0-1i,0+1i,0-1i,0-1i,1+0i,1+0i), k·(1+0i,1+0i,0+1i,0-1i,1+0i,-1+0i,0+1i,0+1i,0+1i), k·(1+0i,-1+0i,0+1i,0+1i,1+0i,1+0i,0+1i,0-1i), k·(1+0i,1+0i,0-1i,0+1i,1+0i,-1+0i,0-1i,0-1i), k·(1+0i,-1+0i,0-1i,0-1i,1+0i,1+0i,0-1i,0+1i), k·(1+0i,1+0i,0+1i,0-1i,-1+0i,1+0i,0-1i,0-1i), k·(1+0i,-1+0i,0+1i,0+1i,-1+0i,-1+0i,0-1i,0+1i), k·(1+0i,1+0i,0-1i,0+1i,-1+0i,1+0i,0+1i,0+1i), k·(1+0i,-1+0i,0-1i,0+1i,-1+0i,1+0i,0+1i,0+1i), k·(1+0i,0+1i,1+0i,0-1i,0+1i,1+0i,0+1i,-1+0i), k·(1+0i,0-1i,1+0i,0+1i,0+1i,-1+0i,0+1i,1+0i), k·(1+0i,0+1i,-1+0i,0+1i,0+1i,1+0i,0-1i,1+0i), k·(1+0i,0-1i,-1+0i,0-1i,0+1i,-1+0i,0-1i,-1+0i), k·(1+0i,0+1i,1+0i,0-1i,0-1i,-1+0i,0-1i,1+0i), k·(1+0i,0-1i,1+0i,0+1i,0+1i,0-1i,1+0i,-1+0i), k·(1+0i,0-1i,1+0i,0+1i,0+1i,0-1i,1+0i,-1+0i), k·(1+0i,0-1i,-1+0i,0-1i,0-1i,1+0i,0+1i,1+0i), k·(1+0i,0+1i,0+1i,1+0i,1+0i,0+1i,0-1i,-1+0i), k·(1+0i,0-1i,0+1i,-1+0i,1+0i,0-1i,0-1i,1+0i), k·(1+0i,0+1i,0-1i,-1+0i,1+0i,0+1i,0+1i,1+0i), k·(1+0i,0+1i,0-1i,-1+0i,1+0i,0+1i,0+1i,1+0i), k·(1+0i,0+1i,0+1i,1+0i,-1+0i,0-1i,0+1i,1+0i), k·(1+0i,0-1i,0+1i,-1+0i,-1+0i,0+1i,0+1i,-1+0i), k·(1+0i,0+1i,0-1i,-1+0i,-1+0i,0-1i,0-1i,-1+0i), k·(1+0i,0-1i,0-1i,1+0i,-1+0i,0+1i,0-1i,1+0i), k·(1+0i,1+0i,0+1i,0-1i,0+1i,0+1i,1+0i,-1+0i), k·(1+0i,-1+0i,0+1i,0+1i,0+1i,0-1i,1+0i,1+0i), k·(1+0i,1+0i,0-1i,0+1i,0+1i,0+1i,-1+0i,1+0i), k·(1+0i,-1+0i,0-1i,0-1i,0+1i,0-1i,-1+0i,-1+0i), k·(1+0i,1+0i,0+1i,0-1i,0-1i,0-1i,-1+0i,1+0i), k·(1+0i,-1+0i,0+1i,0+1i,0-1i,0+1i,-1+0i,-1+0i), k·(1+0i,1+0i,0-1i,0+1i,0-1i,0-1i,1+0i,-1+0i), k·(1+0i,-1+0i,0-1i, 0-1i, 0-1i, 0+1i, 1+0i, 1+0i)}. ,

[0188] For example, the cyclic shift value is k = e jα Or e -jα .

[0189] Alternatively, the reference signal sequence can be derived from the sequence set obtained by multiplying the seventh sequence set by a constant term, with the constant term as... For example, the reference signal sequence can come from the following set of sequences:

[0190] In Example 5 above, w can be e 2πj / 5 .

[0191] Example 6, d is 4.

[0192] Based on this example, the reference signal sequence can be derived from the first sequence set: {(1,1,1,-1),(1,1,-1,1),(1,-1,1,1),(1,-1,-1,-1), (1,1,j,j),(1,1,-j,-j),(1,-1,j,-j),(1,-1,-j,j),(1,j,1,j),(1,j,-1,-j),(1,-j,-1,j),(1,-j,-1,j),(1,j,j,1),(1,j,-j,-1),(1,-j,-j,1)};

[0193] Alternatively, the reference signal sequence can be derived from the sequence set obtained by multiplying the first sequence set by the cyclic shift value k: {k·(1,1,1,-1),k·(1,1,-1,1),k·(1,-1,1,1),k·(1,-1,-1,-1), k·(1,1,j,j),k·(1,1,-j,-j),k·(1,-1,j,-j),k·(1,-1,-j,j),k·(1,j,1,j),k·(1,j,-1,-j),k·(1,-j,1,-j),k·(1,-j,-1,j),k·(1,-j,-1,j),k·(1,j,j,1),k·(1,j,-j,-1),k·(1,-j,-j,-1)};

[0194] For example, the cyclic shift value is k = e jα Or e -jα .

[0195] Alternatively, the reference signal sequence can be derived from the sequence set obtained by multiplying the first sequence set by a constant term, with the constant term as... For example, the reference signal sequence can come from the following set of sequences:

[0196] Example 7, d is 4.

[0197] Based on this example, the reference signal sequence can be derived from the second sequence set: {(1,1,1,1),(1,1,-1,-1),(1,-1,-1,1),(1,-1,1,-1), (1,-1,-j,-j),(1,-1,j,j),(1,1,j,-j),(1,1,-j,j), (1,-j,-j,-1),(1,-j,j,1),(1,j,j,-1),(1,j,-j,1), (1,-j,-j,1),(1,-j,-j,1),(1,j,-j,1)}.

[0198] Alternatively, the reference signal sequence can be derived from the sequence set obtained by multiplying the second sequence set by the cyclic shift value k: {k·(1,1,1,1),k·(1,1,-1,-1),k·(1,-1,-1,1),k·(1,-1,1,-1), k·(1,-1,-j,-j),k·(1,-1,j,j),k·(1,1,j,-j),k·(1,1,-j,j),k·(1,-j,-j,-1),k·(1,-j,j,1),k·(1,j,j,-1),k·(1,j,-j,1),k·(1,j,-j,1),k·(1,j,-j,1),k·(1,j,1,-j)}.

[0199] For example, the cyclic shift value is k = e jα Or e -jα .

[0200] Alternatively, the reference signal sequence can be derived from the sequence set obtained by multiplying the second sequence set by a constant term, with the constant term as... For example, the reference signal sequence can come from the following set of sequences:

[0201] In this application, the sequence set to which the reference signal sequence belongs may include all sequences in the aforementioned sequence set. Alternatively, the sequence set to which the reference signal sequence belongs may include a portion of the aforementioned sequence set, such as one, two, three, four, five, etc., sequences from the aforementioned sequence set. It is understood that since any two sequences (such as sequence A and sequence B) in the aforementioned sequence set are orthogonal, or the magnitude of the inner product of the dot product of sequence A and sequence B with a constant term is [value missing], [condition missing]. Right now Therefore, even if the set of sequences to which the reference signal sequence belongs includes some sequences from the aforementioned set, it can still have good cross-correlation.

[0202] Optionally, in addition to the sequences in the sequence set mentioned above, the sequence set to which the reference signal sequence belongs may also include other sequences, as long as the other sequences can make the reference signal have good cross-correlation.

[0203] This application constructs a cyclic prefix and cyclic suffix in the reference signal block, enabling the receiver to construct an ICI signal matrix based on the signal received on a single OFDM symbol. By transmitting multiple reference signal blocks, the ICI signal matrix can be calculated using the reference signal sequences corresponding to different reference signal blocks to estimate the ICI coefficients. Compared to estimating ICI coefficients based on signals from multiple OFDM symbols, this application has lower algorithm complexity and less computational cost. Furthermore, estimating ICI coefficients using signals from a single OFDM symbol avoids the impact of different phase noise levels on ICI coefficient estimation across different OFDM symbols. Therefore, this application achieves higher accuracy in estimating ICI coefficients.

[0204] Furthermore, the reference signal sequence of the reference signal block in this application can be a short sequence with low cross-correlation, which helps to further improve the accuracy of estimating the ICI coefficients.

[0205] Based on the same inventive concept as the method embodiment, this application provides a communication device, the structure of which can be as shown in FIG9, including a communication unit 901 and a processing unit 902.

[0206] In one embodiment, the communication device can specifically be used to implement the method executed by the first device in the embodiment of FIG5. The device can be the first device itself, or a chip or chipset within the first device, or a part of a chip for executing related method functions. Specifically, the processing unit 902 is used to generate at least one first reference signal block; the communication unit 901 is used to transmit the at least one first reference signal block, wherein the at least one first reference signal block includes: a reference signal sequence, a prefix, and a suffix; wherein the at least one first reference signal block is discretely mapped in the frequency domain.

[0207] Optionally, the communication unit 901 is specifically used to: transmit the at least one first reference signal block on at least one first reference signal port.

[0208] Optionally, the communication unit 901 is further configured to transmit at least one second reference signal block at at least one second reference signal port, the at least one second reference signal block comprising: a reference signal sequence, a prefix, and a suffix; wherein the at least one second reference signal block is discretely mapped in the frequency domain.

[0209] In one embodiment, the communication device can specifically be used to implement the method executed by the first device in the embodiment of FIG6. The device can be the first device itself, or a chip or chipset within the first device, or a part of a chip for performing related method functions. Specifically, the processing unit 902 is used to receive at least one first reference signal block via the communication unit 901. The at least one first reference signal block includes a reference signal sequence, a prefix, and a suffix; wherein the at least one first reference signal block is discretely mapped in the frequency domain.

[0210] Optionally, the processing unit 902 is specifically configured to: receive the at least one first reference signal block on at least one first reference signal port via the communication unit 901.

[0211] Optionally, the processing unit 902 is further configured to: receive at least one second reference signal block at at least one second reference signal port via the communication unit 901, the at least one second reference signal block comprising: a reference signal sequence, a prefix, and a suffix; and estimate inter-carrier interference (ICI) coefficients based on the at least one first reference signal block and the at least one second reference signal block; wherein the at least one second reference signal block is discretely mapped in the frequency domain.

[0212] The module division in this application embodiment is illustrative and represents only one logical functional division. In actual implementation, other division methods may be used. Furthermore, the functional modules in the various embodiments of this application can be integrated into a single processor, exist as separate physical entities, or be integrated into a single module. The integrated modules described above can be implemented in hardware or as software functional modules. It is understood that the functions or implementations of the modules in the embodiments of this application can be further described in the relevant descriptions of the method embodiments.

[0213] In one possible embodiment, the communication device can be as shown in FIG10. This device can be a communication apparatus or a chip within a communication apparatus, wherein the communication apparatus can be the first device described in the above embodiments. The device includes a processor 1001 and a communication interface 1002, and may also include a memory 1003. The processing unit 902 can be the processor 1001. The communication unit 901 can be the communication interface 1002. Optionally, the processor 1001 and the memory 1003 can also be integrated together.

[0214] The processor 1001 can be a CPU, a digital processing unit, or something similar. The communication interface 1002 can be a transceiver, an interface circuit such as a transceiver circuit, or a transceiver chip, etc. The device also includes a memory 1003 for storing the program executed by the processor 1001. The memory 1003 can be non-volatile memory, such as a hard disk drive (HDD) or a solid-state drive (SSD), or it can be volatile memory, such as random-access memory (RAM). The memory 1003 can be any other medium capable of carrying or storing desired program code in the form of instructions or data structures that can be accessed by a computer, but is not limited to this.

[0215] The processor 1001 is used to execute the program code stored in the memory 1003, specifically to perform the actions of the aforementioned processing unit 902, which will not be described in detail here. The communication interface 1002 is specifically used to perform the actions of the aforementioned communication unit 901, which will not be described in detail here.

[0216] This application embodiment does not limit the specific connection medium between the communication interface 1002, processor 1001, and memory 1003. In Figure 10, the memory 1003, processor 1001, and communication interface 1002 are connected via a bus 1004, which is represented by a thick line in Figure 10. The connection methods between other components are only illustrative and not intended to be limiting. Buses can be categorized as address buses, data buses, control buses, etc. For ease of illustration, only one thick line is used in Figure 10, but this does not indicate that there is only one bus or one type of bus.

[0217] This application also provides a computer-readable storage medium for storing computer software instructions required to execute the processor, including a program required to execute the processor.

[0218] This application also provides a communication system, including a communication device for implementing the function of a first device in the embodiment of FIG5 and a communication device for implementing the function of a second device in the embodiment of FIG5.

[0219] Those skilled in the art will understand that embodiments of this application can be provided as methods, systems, or computer program products. Therefore, this application can take the form of a completely hardware embodiment, a completely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, this application can take the form of a computer program product embodied on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.

[0220] This application is described with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to this application. It should be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions specified in one or more blocks of the flowchart illustrations and / or one or more blocks of the block diagrams.

[0221] These computer program instructions may also be stored in a computer-readable storage medium that can direct a computer or other programmable data processing device to function in a particular manner, such that the instructions stored in the computer-readable storage medium produce an article of manufacture including instruction means that implement the functions specified in one or more flowcharts and / or one or more block diagrams.

[0222] These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer-implemented process, such that the instructions, which execute on the computer or other programmable apparatus, provide steps for implementing the functions specified in one or more flowcharts and / or one or more block diagrams.

[0223] Obviously, those skilled in the art can make various modifications and variations to this application without departing from the scope and intent of this application. Therefore, if such modifications and variations fall within the scope of the claims of this application and their equivalents, this application is also intended to include such modifications and variations.

Claims

A communication method characterized by comprising: The method comprises: generating at least one first reference signal block; transmitting the at least one first reference signal block, the at least one first reference signal block comprising: a reference signal sequence, a prefix, and a postfix; wherein the at least one first reference signal block is discretely mapped in a frequency domain. The method of claim 1, wherein The prefix is part of the reference signal sequence. And / or, the postfix is part of the reference signal sequence. The method of claim 1 or 2, wherein The at least one first reference signal block occupies the same frequency domain resource, or the at least one first reference signal block occupies the same number of subcarriers. The method according to any one of claims 1 to 3, characterized in that The at least one first reference signal block is equally spaced mapped on a scheduling bandwidth. The method according to any one of claims 1 to 4, characterized in that The transmitting the at least one first reference signal block comprises: transmitting the at least one first reference signal block on at least one first reference signal port. The method of claim 5, wherein The method further comprises: transmitting at least one second reference signal block on at least one second reference signal port, the at least one second reference signal block comprising: a reference signal sequence, a prefix, and a postfix; wherein the at least one second reference signal block is discretely mapped in a frequency domain. The method of claim 6, wherein The first reference signal port corresponds to a different data stream than the second reference signal port, and the at least one first reference signal block occupies the same time-frequency resource as the at least one second reference signal block. A communication method characterized by comprising: The method comprises: receiving at least one first reference signal block, the at least one first reference signal block comprising: a reference signal sequence, a prefix, and a postfix; wherein the at least one first reference signal block is discretely mapped in a frequency domain. The method of claim 8 wherein The prefix is part of the reference signal sequence. And / or, the postfix is part of the reference signal sequence. The method of claim 8 or 9, wherein The at least one first reference signal block occupies the same frequency domain resource, or the at least one first reference signal block occupies the same number of subcarriers. The method according to any one of claims 8-10, characterized in that The at least one first reference signal block is mapped to frequency domain locations that are uniformly distributed on a scheduling bandwidth. The method according to any one of claims 8-11, characterized in that The receiving the at least one first reference signal block comprises: receiving the at least one first reference signal block on at least one first reference signal port. The method of claim 12, wherein The method further comprises: receiving at least one second reference signal block on at least one second reference signal port, the at least one second reference signal block comprising: a reference signal sequence, a prefix, and a postfix; estimating an inter-carrier interference (ICI) coefficient according to the at least one first reference signal block and the at least one second reference signal block; wherein the at least one second reference signal block is discretely mapped in a frequency domain. The method of claim 13, wherein The first reference signal port corresponds to a different data stream than the second reference signal port, and the at least one first reference signal block occupies the same time-frequency resource as the at least one second reference signal block. The method according to any one of claims 1 to 14, characterized in that The length of the reference signal sequence in the first reference signal block or the second reference signal block is 4. The reference signal sequence is from a first sequence set, or from a sequence set obtained by multiplying the first sequence set by a cyclic shift value, or from a sequence set obtained by multiplying the first sequence set by a constant term: {(1,1,1,-1),(1,1,-1,1),(1,-1,1,1),(1,-1,-1,-1)， (1, 1, j, j), (1, 1, -j, -j), (1, -1, j, -j), (1, -1, -j, j), (1, j, 1, j), (1, j, -1, -j), (1, -j, 1, -j), (1, -j, -1, j), (1, j, j, 1), (1, j, -j, -1), (1, -j, j, -1), (1, -j, -j, 1)}. Alternatively, the reference signal sequence is from a second sequence set or from a sequence set obtained by multiplying the second sequence set by a cyclic shift value or from a sequence set obtained by multiplying the second sequence set by a constant term: {(1,1,1,1),(1,1,-1,-1),(1,-1,-1,1),(1,-1,1,-1), (1, -1, -j, -j), (1, -1, j, j), (1, 1, j, -j), (1, 1, -j, j), (1, -j, -j, -1), (1, -j, j, 1), (1, j, j, -1), (1, j, -j, 1), (1, -j, -1, -j), (1, -j, 1, j), (1, j, -1, j), (1, j, 1, -j)}. The method according to any one of claims 1 to 14, characterized in that The length of the reference signal sequence in the first reference signal block or the second reference signal block is 3; The reference signal sequence is from a third sequence set or from a sequence set obtained by multiplying the third sequence set by a cyclic shift value or from a sequence set obtained by multiplying the third sequence set by a constant term: {(1,1,1),(1,w,w 2 ),(1,w 2 ,w), (1,w,w),(1,w 2 ,1),(1,1,in 2 ),(1,in 2 ,In 2 ),(1,in,1),(1,1,in)}; where w = e 2πj / d . The method according to any one of claims 1 to 14, characterized in that The length of the reference signal sequence in the first reference signal block or the second reference signal block is 5; The reference signal sequence is from a fourth sequence set or from a sequence set obtained by multiplying the fourth sequence set by a cyclic shift value or from a sequence set obtained by multiplying the fourth sequence set by a constant term: {(1, 1, 1, 1, 1), (1, w, w 2 ,w 3 ,w 4 ),(1, w 2 ,w 4 ,w,w 3 ),(1, w 3 ,w,w 4 ,w 2 ),(1, w 4 ,w 3 ,w 2 ,w), (1, w, w 4 ,w 4 ,w 2 ,w 2 ,w 3 ,w 3 ,w 4 ,w 4 ,w 3 ,w 3 ,w 2 ,w 2 ,w 2 ,w 3 ,w 3 ,w 2 ,w 3 ,w 4 ,w 2 ,w 4 ,w 4 ,w 2 ,w 4 ,w 3 ,w 3 ,w 2 ,w 2 ,w 3 ,w 4 ,w 4 ,w 2 ,w 3 ,w 3 ,w 2 ,w 4 ,w 4 ,w 4 ,w 4 ,w 3 ,w 4 ,w 3 ,w 2 ,w 2 ,w 2 ,w 2 ,w 3 ,w 4 ,w 3 ,w where w = e 2πj / d . The method according to any one of claims 1 to 14, characterized in that The length of the reference signal sequence in the first reference signal block or the second reference signal block is 7; The reference signal sequence is from a fifth sequence set or from a sequence set obtained by multiplying the fifth sequence set by a cyclic shift value or from a sequence set obtained by multiplying the fifth sequence set by a constant term: {v 0,0 ,v 0,1 ,v 0,2 ,v 0,3 ,v 0,4 ,v 0,5 ,v 0,6 , v 1,0 ,v 1,1 ,v 1,2 ,v 1,3 ,v 1,4 ,v 1,5 ,v 1,6 ,v 2,0 ,v 2,1 ,v 2,2 ,v 2,3 ,v 2,4 ,v 2,5 ,v 2,6 ,v 3,0 ,v 3,1 ,v 3,2 ,v 3,3 ,v 3,4 ,v 3,5 ,v 3,6 ,v 4,0 ,v 4,1 ,v 4,2 ,v 4,3 ,v 4,4 ,v 4,5 ,v 4,6 ,v 5,0 ,v 5,1 ,v 5,2 ,v 5,3 ,v 5,4 ,v 5,5 ,v 5,6 ,v 6,0 ,v 6,1 ,v 6,2 ,v 6,3 ,v 6,4 ,v 6,5 ,v 6,6} where v a,b = (w 0 , w a+b , w 4a+2b , w 9a+3b , w 16a+4b , w 25a+5b , w 36a+6b ), w = e 2πj / d . The method according to any one of claims 1 to 14, characterized in that The length of the reference signal sequence in the first reference signal block or the second reference signal block is 11; The reference signal sequence is from a sixth sequence set or from a sequence set obtained by multiplying the sixth sequence set by a cyclic shift value or from a sequence set obtained by multiplying the sixth sequence set by a constant term: {v 0,0 ,v 0,1 ,v 0,2 ,v 0,3 ,v 0,4 ,v 0,5 ,v 0,6 ,v 0,7 ,v 0,8 ,v 0,9 ,v 0,10 , v 1,0 ,v 1,1 ,v 1,2 ,v 1,3 ,v 1,4 ,v 1,5 ,v 1,6 ,v 1,7 ,v 1,8 ,v 1,9 ,v 1,10 ,v 2,0 ,v 2,1 ,v 2,2 ,v 2,3 ,v 2,4 ,v 2,5 ,v 2,6 ,v 2,7 ,v 2,8 ,v 2,9 ,v 2,10 ,v 3,0 ,v 3,1 ,v 3,2 ,v 3,3 ,v 3,4 ,v 3,5 ,v 3,6 ,v 3,7 ,v 3,8 ,v 3,9 ,v 3,10 ,v 4,0 ,v 4,1 ,v 4,2 ,v 4,3 ,v 4,4 ,v 4,5 ,v 4,6 ,v 4,7 ,v 4,8 ,v 4,9 ,v 4,10 ,v 5,0 ,v 5,1 ,v 5,2 ,v 5,3 ,v 5,4 ,v 5,5 ,v 5,6 ,v 5,7 ,v 5,8 ,v 5,9 ,v 5,10 ,v 6,0 ,v 6,1 ,v 6,2 ,v 6,3 ,v 6,4 ,v 6,5 ,v 6,6 ,v 6,7 ,v 6,8 ,v 6,9 ,v 6,10 ,v 7,0 7,1 7,2 7,3 7,4 7,5 7,6 7,7 7,8 7,9 7,10 8,0 8,1 8,2 8,3 8,4 8,5 8,6 8,7 8,8 8,9 8,10 9,0 9,1 9,2 9,3 9,4 9,5 9,6 9,7 9,8 9,9 9,10 10,0 10,1 10,2 10,3 10,4 10,5 10,6 10,7 10,8 10,9 10,10 ;​​​​​​​​​​​​​​​​​​​​​​​​​​​​​​​​​​​​​​​​​​​ where v a,b = (w 0 ,w a+b ,w 4a+2b ,w 9a+3b ,w 16a+4b ,w 25a+5b ,w 36a+6b ,w 49a+7b ,w 64a+8b ,w 81a+9b , w 100a+10b ), w = e 2πj / d . The method according to any one of claims 1 to 14, characterized in that The length of the reference signal sequence in the first reference signal block or the second reference signal block is 8; The reference signal sequence is from a seventh sequence set or from a sequence set obtained by multiplying the seventh sequence set by a cyclic shift value or from a sequence set obtained by multiplying the seventh sequence set by a constant term: {(1+0i, 1+0i, 1+0i, 1+0i, 1+0i, 1+0i, 1+0i, 1+0i), (1+0i, -1+0i, -1+0i, 1+0i, 1+0i, -1+0i, -1+0i, 1+0i), (1+0i, 1+0i, -1+0i, -1+0i, 1+0i, 1+0i, -1+0i, -1+0i), (1+0i, -1+0i, -1+0i, 1+0i, 1+0i, -1+0i, -1+0i, 1+0i), (1+0i, 1+0i, 1+0i, 1+0i, -1+0i, -1+0i, -1+0i, -1+0i), (1+0i, -1+0i, 1+0i, -1+0i, -1+0i, 1+0i, -1+0i, 1+0i), (1+0i, 1+0i, -1+0i, -1+0i, -1+0i, -1+0i, 1+0i, 1+0i), (1+0i, -1+0i, -1+0i, 1+0i, -1+0i, 1+0i, 1+0i, -1+0i), (1+0i, 0+1i, 0+1i, -1+0i, 0+1i, -1+0i, -1+0i, 0-1i), (1+0i, 0-1i, 0+1i, 1+0i, 0+1i, 1+0i, -1+0i, 0+1i), (1+0i, 0+1i, 0-1i, 1+0i, 0+1i, -1+0i, 1+0i, 0+1i), (1+0i, 0-1i, 0-1i, -1+0i, 0+1i, 1+0i, 1+0i, 0-1i), (1+0i, 0+1i, 0+1i, -1+0i, 0-1i, 1-0i, 1-0i, 0+1i), (1+0i, 0-1i, 0+1i, 1+0i, 0-1i, -1+0i, 1-0i, 0-1i), (1+0i, 0+1i, 0-1i, 1+0i, 0-1i, 1-0i, -1+0i, 0-1i), (1+0i, 0-1i, 0-1i, -1+0i, 0-1i, -1+0i, -1+0i, 0+1i), (1+0i, 0+1i, 1+0i, 0+1i, 1+0i, 0-1i, -1+0i, 0+1i), (1+0i, 0-1i, 1+0i, 0-1i, 1+0i, 0+1i, -1+0i, 0-1i), (1+0i, 0+1i, -1+0i, 0-1i, 1+0i, 0-1i, 1+0i, 0-1i), (1+0i, 0-1i, -1+0i, 0+1i, 1+0i, 0+1i, 1+0i, 0+1i), (1+0i, 0+1i, 1+0i, 0+1i, -1+0i, 0+1i, 1+0i, 0-1i), (1+0i, 0-1i, 1+0i, 0-1i, -1+0i, 0-1i, 1+0i, 0+1i), (1+0i, 0+1i, -1+0i, 0-1i, -1+0i, 0+1i, -1+0i, 0+1i), (1+0i, 0-1i, -1+0i, 0+1i, -1+0i,(1+0i, 1+0i, 0+1i, 0+1i, 0+1i, 0-1i, 1+0i, -1+0i), (1+0i, -1+0i, 0+1i, 0-1i, 0+1i, 0+1i, 1+0i, 1+0i), (1+0i, 1+0i, 0-1i, 0-1i, 0+1i, 0-1i, -1+0i, 1+0i), (1+0i, -1+0i, 0-1i, 0+1i, 0+1i, 0+1i, -1+0i, -1+0i), (1+0i, 1+0i, 0+1i, 0+1i, 0-1i, 0+1i, -1+0i, 1+0i), (1+0i, -1+0i, 0+1i, 0-1i, 0-1i, 0-1i, -1+0i, -1+0i), (1+0i, 1+0i, 0-1i, 0-1i, 0-1i, 0+1i, 1+0i, -1+0i), (1+0i, -1+0i, 0-1i, 0+1i, 0-1i, 0-1i, 1+0i, 1+0i), (1+0i, 1+0i, 0+1i, 0-1i, 1+0i, -1+0i, 0+1i, 0+1i), (1+0i, -1+0i, 0+1i, 0+1i, 1+0i, 1+0i, 0+1i, 0-1i), (1+0i, 1+0i, 0-1i, 0+1i, 1+0i, -1+0i, 0-1i, 0-1i), (1+0i, -1+0i, 0-1i, 0-1i, 1+0i, 1+0i, 0-1i, 0+1i), (1+0i, 1+0i, 0+1i, 0-1i, -1+0i, 1+0i, 0-1i, 0-1i), (1+0i, -1+0i, 0+1i, 0+1i, -1+0i, -1+0i, 0-1i, 0+1i), (1+0i, 1+0i, 0-1i, 0+1i, -1+0i, 1+0i, 0+1i, 0+1i), (1+0i, -1+0i, 0-1i, 0-1i, -1+0i, -1+0i, 0+1i, 0-1i), (1+0i, 0+1i, 1+0i, 0-1i, 0+1i, 1+0i, 0+1i, -1+0i), (1+0i, 0-1i, 1+0i, 0+1i, 0+1i, -1+0i, 0+1i, 1+0i), (1+0i, 0+1i, -1+0i, 0+1i, 0+1i, 1+0i, 0-1i, 1+0i), (1+0i, 0-1i, -1+0i, 0-1i, 0+1i, -1+0i, 0-1i, -1+0i), (1+0i, 0+1i, 1+0i, 0-1i, 0-1i, -1+0i, 0-1i, 1+0i), (1+0i, 0-1i, 1+0i, 0+1i, 0-1i, 1+0i, 0-1i, -1+0i), (1+0i, 0+1i, -1+0i, 0+1i, 0-1i,(1+0i, 0+1i, 0+1i, 1+0i, 1+0i, 0+1i, 0-1i, -1+0i), (1+0i, 0-1i, 0+1i, -1+0i, 1+0i, 0-1i, 0-1i, 1+0i), (1+0i, 0+1i, 0-1i, -1+0i, 1+0i, 0+1i, 0+1i, 1+0i), (1+0i, 0-1i, 0-1i, 1+0i, 1+0i, 0-1i, 0+1i, -1+0i), (1+0i, 0+1i, 0+1i, 1+0i, -1+0i, 0-1i, 0+1i, 1+0i), (1+0i, 0-1i, 0+1i, -1+0i, -1+0i, 0+1i, 0+1i, -1+0i), (1+0i, 0+1i, 0-1i, -1+0i, -1+0i, 0-1i, 0-1i, -1+0i), (1+0i, 0-1i, 0-1i, 1+0i, -1+0i, 0+1i, 0-1i, 1+0i), (1+0i, 1+0i, 0+1i, 0-1i, 0+1i, 0+1i, 1+0i, -1+0i), (1+0i, -1+0i, 0+1i, 0+1i, 0+1i, 0-1i, 1+0i, 1+0i), (1+0i, 1+0i, 0-1i, 0+1i, 0+1i, 0+1i, -1+0i, 1+0i), (1+0i, -1+0i, 0-1i, 0-1i, 0+1i, 0-1i, -1+0i, -1+0i), (1+0i, 1+0i, 0+1i, 0-1i, 0-1i, 0-1i, -1+0i, 1+0i), (1+0i, -1+0i, 0+1i, 0+1i, 0-1i, 0+1i, -1+0i, -1+0i), (1+0i, 1+0i, 0-1i, 0+1i, 0-1i, 0-1i, 1+0i, -1+0i), (1+0i, -1+0i, 0-1i, 0-1i, 0-1i, 0+1i, 1+0i, 1+0i)}., The method according to any one of claims 15 to 20, characterized in that The constant term is where d is the length of the reference signal sequence. The method according to any one of claims 15 to 20, characterized in that The cyclic shift value is e jα or e -jα . A communication device characterized by comprising: Comprising units or modules for performing the method as claimed in any of claims 1-7, 15-22. A communication device characterized by comprising: Comprising units or modules for performing the method as claimed in any of claims 8-22. A communication device, characterized by comprising a processor and a memory for storing program instructions which, when executed by the processor, cause the method of any of claims 1-7, 15-22 to be performed. A communication device, characterized by comprising a processor and a memory for storing program instructions which, when executed by the processor, cause the method of any of claims 8-22 to be performed. A computer-readable storage medium, characterized by, The computer readable storage medium has stored therein computer readable instructions which, when executed on a communications device, cause the method of any of claims 1-7, 15-22, or the method of any of claims 8-22 to be performed. A computer program product, characterized in that The computer program product, when executed on a device, causes the device to perform the method of any of claims 1-7, 15-22, or the method of any of claims 8-22.

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