Data transmission method, apparatus and system

Abstract

The present application relates to the technical field of communications, and provides a data transmission method, apparatus and system. The method comprises: acquiring a data frame comprising a plurality of subframes; and transmitting the data frame. In a polarization direction, each subframe comprises 226 pilot symbols. The values of the 226 pilot symbols in an X polarization direction and a Y polarization direction enable good correlation of pilot sequences, thereby facilitating improvement of the quality of signals recovered at a receiving end, and allowing effective application in various coherent transmission scenarios.

Description

Data transmission method, device and system

[0001] This application claims priority to the Chinese patent application No. 202411098027.9, filed on August 9, 2024, entitled "Data transmission method, device and system", the content of which is incorporated herein by reference in its entirety. TECHNICAL FIELD

[0002] The present application relates to the field of communication technology, in particular to a data transmission method, device and system. BACKGROUND

[0003] With the continuous promotion of 5G, cloud computing, big data and artificial intelligence, high-speed optical transmission networks are developing towards large capacity, packetization and intelligentization. Coherent optical communication systems use the amplitude, phase, polarization or frequency of light waves to carry information. In order to combat optical signal distortion caused by dispersion, polarization-dependent damage, noise, nonlinear effects and other factors during transmission and maintain long-distance transmission, coherent optical communication systems usually add some pre-designed preset symbol sequences in the transmission symbol sequence to facilitate the recovery of the sending symbol at the receiving end.

[0004] The existing transmission symbol sequence is mainly applied to 400Gbps or 800Gbps scenarios and cannot adapt to future scenarios above 800Gbps (including 1.2Tbps, 1.6Tbps, etc.). SUMMARY

[0005] The present application provides a data transmission method, device and system, which can make the transmission symbol sequence applicable to the 800Gbps scenario and reduce transmission redundancy.

[0006] In a first aspect, the present application provides a data transmission method, which comprises: obtaining a data frame comprising a plurality of subframes, and transmitting the data frame; wherein each subframe comprises 226 pilot symbols in one polarization direction, and the sequence of the 226 pilot symbols in the X polarization direction and the Y polarization direction is respectively:

[0007] In the scheme shown in the present application, the sequence of the pilot symbols described above is used, so that the normalized amplitude of the periodic autocorrelation function side lobe value of the pilot symbols in the same polarization direction is not greater than 0.4, and the normalized amplitude of the periodic cross-correlation function value of the pilot symbols in different polarization directions is not greater than 0.4. In this way, the sequence autocorrelation and cross-correlation characteristics of the pilot symbols are good, the training symbols and the pilot symbols combined together can also satisfy the direct current balance, which is beneficial to improve the possibility of recovering the signal at the receiving end and improve the quality of the recovered signal, so as to be applicable to scenarios above 800Gbps.

[0008] It should be understood that the 226 pilot symbols in the two polarization directions can also be as shown in Table 2 or Table 3, and the autocorrelation and cross-correlation characteristics of the sequence composed of each possible pilot symbol are good, and the combination of the training symbols and the pilot symbols can also satisfy the direct current balance, which is conducive to improving the possibility of recovering the signal at the receiving end and improving the quality of the recovered signal.

[0009] In an optional manner, A is equal to 3 or -3 when the data frame adopts 16QAM symbol mapping, and A is equal to 1 or -1 when the data frame adopts quadrature phase shift keying (QPSK) symbol mapping.

[0010] In the scheme shown in the present application, the value of A is different under different symbol mapping modes, and the value of A can make the sensitivity of the training symbol or the pilot symbol better.

[0011] In an optional manner, each subframe further includes 11 training symbols in one polarization direction.

[0012] The sequence of the training symbols is respectively as follows in the X and Y polarization directions:

[0013] In a second aspect, the present application provides a data transmission method, which comprises receiving a second data frame transmitted by a channel from a first data frame, the first data frame including a plurality of subframes, each subframe including 226 pilot symbols in one polarization direction, and the sequence of the 226 pilot symbols being respectively as follows in the X and Y polarization directions:

[0014] In the scheme shown in the present application, the sequence of the pilot symbols is used, so that the normalized amplitude of the sidelobe value of the periodic autocorrelation function of the pilot symbols in the same polarization direction is not greater than 0.4, and the normalized amplitude of the periodic cross-correlation function value of the pilot symbols in different polarization directions is not greater than 0.4. In this way, the autocorrelation and cross-correlation characteristics of the sequence of the pilot symbols are good, the combination of the training symbols and the pilot symbols can also satisfy the direct current balance, which is conducive to improving the possibility of recovering the signal at the receiving end and improving the quality of the recovered signal.

[0015] It should be understood that the 226 pilot symbols in the two polarization directions can also be as shown in Table 2 or Table 3, and the autocorrelation and cross-correlation characteristics of the sequence composed of each possible pilot symbol are good, and the combination of the training symbols and the pilot symbols can also satisfy the direct current balance, which is conducive to improving the possibility of recovering the signal at the receiving end and improving the quality of the recovered signal.

[0016] In an alternative, A is equal to 3 or -3 when the data frame is mapped with 16QAM symbols, and A is equal to 1 or -1 when the data frame is mapped with QPSK symbols.

[0017] In an alternative, each sub-frame further comprises 11 training symbols in one polarization direction.

[0018] The sequence of the training symbols is respectively:

[0019] In a third aspect, the present application provides a data transmission apparatus, comprising: a processing unit and a sending unit; the processing unit is configured to perform the processing of obtaining a data frame; the sending unit is configured to send the data frame.

[0020] In a fourth aspect, the present application provides a data transmission apparatus, comprising: a receiving unit; the receiving unit is configured to receive a second data frame transmitted by a first data frame through a channel.

[0021] In a fifth aspect, the present application provides a chip, which is configured to perform the method in the first aspect, the second aspect, the alternative of the first aspect or the alternative of the second aspect.

[0022] In a sixth aspect, the present application provides an optical module, comprising a processor and an interface, the interface is configured to transceive signals, and the processor is configured to perform the method in the first aspect or any alternative of the first aspect.

[0023] In a seventh aspect, the present application provides a sending device, comprising a host-side device and an optical module as described in the sixth aspect, the optical module is configured to convert an electrical signal from the host-side device into an optical signal, and send the optical signal.

[0024] In an eighth aspect, the present application provides an optical module, comprising a processor and an interface, the interface is configured to transceive signals, and the processor is configured to perform the method in the second aspect or any alternative of the second aspect.

[0025] In a ninth aspect, the present application provides a receiving device, comprising a host-side device and an optical module as described in the eighth aspect, the optical module is configured to convert a received optical signal into an electrical signal, and send the electrical signal to the host-side device.

[0026] In a tenth aspect, the present application provides a communication system, comprising a sending device as described in the seventh aspect and a receiving device as described in the ninth aspect, the sending device is configured to send a signal to the receiving device. BRIEF DESCRIPTION OF DRAWINGS

[0027] Figure 1 is a schematic diagram of a communication system according to an example embodiment of the application;

[0028] Figure 2(a) is a schematic diagram of an implementation of a transmitter DSP processor according to an example embodiment of the application;

[0029] Figure 2(b) is a schematic diagram of another implementation of a transmitter DSP processor according to an example embodiment of the application;

[0030] Figure 2(c) is a schematic diagram of yet another implementation of a transmitter DSP processor according to an example embodiment of the application;

[0031] Figure 2(d) is a schematic diagram of still another implementation of a transmitter DSP processor according to an example embodiment of the application;

[0032] Figure 3 is a schematic diagram of a data transmission method according to an example embodiment of the application;

[0033] Figure 4 is a schematic diagram of a structure of a data frame according to an example embodiment of the application;

[0034] Figure 5 is a schematic diagram of a structure of a sub-frame in a data frame according to an example embodiment of the application;

[0035] Figure 6 is a schematic diagram of constellation mapping according to an example embodiment of the application;

[0036] Figure 7(a) is a schematic diagram of a first pilot symbol generation structure according to an example embodiment of the application;

[0037] Figure 7(b) is a schematic diagram of a second pilot symbol generation structure according to an example embodiment of the application;

[0038] Figure 7(c) is a schematic diagram of a third pilot symbol generation structure according to an example embodiment of the application;

[0039] Figure 8 is a schematic diagram of determining pilot symbols according to an example embodiment of the application;

[0040] Figure 9 is another schematic diagram of determining pilot symbols according to an example embodiment of the application;

[0041] Figure 10 is a schematic diagram of a structure of a data transmission apparatus according to an example embodiment of the application;

[0042] Figure 11 is another schematic diagram of a structure of a data transmission apparatus according to an example embodiment of the application;

[0043] Figure 12 is a schematic diagram of a structure of an optical module according to an example embodiment of the application;

[0044] FIG. 13 is a structural schematic diagram of a sending device according to an example embodiment of the present application;

[0045] FIG. 14 is a structural schematic diagram of a receiving device according to an example embodiment of the present application. DETAILED DESCRIPTION

[0046] For the purpose, technical solutions and advantages of the present application to be clearer, the embodiments of the present application will be further described in detail below with reference to the drawings.

[0047] The embodiments of the present application provide a data transmission method, device and system, which has less redundancy and better preset symbol sequence correlation added, and is beneficial to improve the quality of recovered signal at the receiving end, and can be well applied to various coherent transmission scenarios.

[0048] It should be noted that the terms "first", "second", and the like in the specification of the present application, claims and above-described drawings are used to distinguish similar objects, and not to limit a specific order or sequence. It should be understood that the above terms can be interchanged as appropriate, so that the embodiments described in the present application can be implemented in an order other than that described in the present application. In addition, the terms "include" and "have" and any variations thereof are intended to cover non-exclusive inclusion. For example, a process, method, system, product or device including a series of steps or units need not be limited to only those steps or units clearly listed, but can include other steps or units not clearly listed or inherent to the process, method, product or device.

[0049] FIG. 1 is a schematic diagram of a communication system to which the embodiments of the present application are applied. As shown in FIG. 1, at the sending end, a data stream to be sent is provided by a source. A forward error correction (FEC) encoder receives the data stream and performs FEC encoding thereon. The FEC encoding obtains code word information of combined check bits and information bits, which is sent to a sending end digital signal processing (DSP) processor for framing. The framed data is transmitted through a channel to a receiving end. After receiving a distorted signal due to noise or other impairments in the channel, the receiving end sends the distorted signal to a receiving end DSP processor for dispersion compensation, synchronization, phase recovery and the like, and then decodes the distorted signal through an FEC decoder to recover the original data and send the original data to a sink. The above-described framing can also be referred to as DSP framing.

[0050] Figure 2(a) is a schematic diagram of an implementation of the transmitter DSP processor in the embodiments of the present application. As shown in Figure 2(a), in one possible implementation, the transmitter DSP processor performs dual-polarization symbol mapping on the received data sequence. Generally, the received data sequence is the information sequence and the check sequence obtained by FEC encoding. The dual-polarization symbol mapping includes symbol mapping and polarization distribution. The symbol mapping is Quadrature Amplitude Modulation (QAM). Generally, the QAM modulation (also referred to as symbol mapping) includes symbol mapping of input bits to obtain QAM symbols, and polarization distribution of the QAM symbols to obtain dual-polarization (DP) symbols, i.e., DP-QAM symbols, such as DP-4QAM (also referred to as dual-polarization quadrature phase shift keying, DP-QPSK), DP-16QAM, DP-32QAM, and DP-64QAM, etc. It should be understood that the symbol mapping generally uses gray mapping to map bits to a QAM symbol, and the symbol mapping is also simply referred to as gray mapping. For ease of introduction, hereinafter, two polarization directions are uniformly denoted as X polarization direction and Y polarization direction, wherein the X polarization direction and the Y polarization direction are orthogonal to each other. It should be understood that the X polarization direction and the Y polarization direction are not two specified polarization directions, but two arbitrary orthogonal polarization directions. Further, the transmitter DSP processor performs framing on a certain number of dual-polarization symbols as follows. Specifically, a dual-polarization symbol sequence before framing containing a plurality of dual-polarization symbols is obtained, at least one symbol sequence of a frame alignment word sequence (FAW Sequence), a training symbol sequence, a reserved symbol sequence, and a pilot symbol sequence is inserted in the X polarization direction and the Y polarization direction, respectively, to obtain a dual-polarization symbol sequence after framing. The inserted symbol sequence can also be referred to as a preset symbol sequence.

[0051] In this embodiment, the pre-framing dual polarization symbols are also called payload symbols, which include the FEC encoded information and check bits after symbol mapping to obtain the symbols (called information symbols and check symbols). The sequence of post-framing dual polarization symbols is called a data frame, which can also be called a frame or a DSP frame. For ease of introduction, the sequence of post-framing dual polarization symbols is uniformly called a data frame in the embodiments of the present application. The frame synchronization symbol is used for frame synchronization alignment, the training symbol is used for link training, the pilot symbol is used for carrier phase recovery, and the reserved symbol is used for future use and innovation. The value of the reserved symbol can be known and constant, or randomized. The value of the reserved symbol can also be called a pattern. In some specific embodiments, the DSP frame contains multiple subframes, and the DSP frame is called a super-frame. In other specific embodiments, the DSP frame can also be called a multi-frame, and the reserved symbol can also be called a fixed stuff (FS). The frame synchronization symbol can also be called a multi-frame alignment signal (MFAS).

[0052] It should be noted that the inserted symbol sequence is not exactly the same in the X polarization direction and the Y polarization direction. That is, the values of the inserted symbols in the X polarization direction and the Y polarization direction are different at least at one position, so as to avoid the problem that the receiving end cannot distinguish between the two polarization directions in actual transmission. For example, the sequence of 8 training symbols in the X polarization direction is -A-Aj, -A+Aj, A-Aj, A+Aj, -A-Aj, -A+Aj, A-Aj, A+Aj. Then, the sequence of 8 training symbols in the Y polarization direction cannot be exactly the same as the sequence in the X polarization direction, and can be -A+Aj, -A-Aj, A-Aj, A+Aj, -A-Aj, -A+Aj, A-Aj, A+Aj.

[0053] It should be understood that one dual-polarization symbol can be represented by two symbols, one of which is in the X polarization direction and the other of which is in the Y polarization direction. Each symbol can be represented by a complex number. For example, a symbol obtained by using 16QAM modulation can be represented by any one of the following 16 complex numbers: ±1±1j, ±1±3j, ±3±1j, and ±3±3j, where ± represents a positive value or a negative value, such as ±3 representing 3 or -3. Here, j represents an imaginary unit. For another example, a symbol obtained by using QPSK modulation can be represented by any one of the following 4 complex numbers: ±1±1j. In some scenarios, the imaginary unit can also be represented by other symbols such as i, which is not limited herein. In the embodiments of the present application, the imaginary unit is uniformly represented by j. In some specific applications, the real part and the imaginary part can be normalized, but the essence does not change.

[0054] It should be noted that a sequence of N0 dual-polarization symbols can be completely represented by two complex number sequences with a length of N0, one of which represents the symbols in the X polarization direction and the other of which represents the symbols in the Y polarization direction. Each complex number sequence with a length of N0 is represented by a real part sequence (also referred to as an I sequence) with a length of N0 and an imaginary part sequence (also referred to as a Q sequence) with a length of N0, where N0 is an integer greater than 1. Therefore, there are four different sequences, including an X polarization I sequence, an X polarization Q sequence, a Y polarization I sequence, and a Y polarization Q sequence. The X polarization I sequence is also referred to as an X I component, the X polarization Q sequence is also referred to as an X Q component, the Y polarization I sequence is also referred to as a Y I component, and the Y polarization Q sequence is also referred to as a Y Q component.

[0055] It should be noted that after the dual-polarization symbol mapping and framing operation, a dual-polarization symbol data stream to be transmitted is obtained. The dual-polarization symbol data stream to be transmitted can be represented by two symbol data streams, the first of which is a symbol data stream of the dual-polarization symbol data stream in the X polarization direction, and the second of which is a symbol data stream of the dual-polarization symbol data stream in the Y polarization direction. Alternatively, the dual-polarization symbol data stream to be transmitted can also be represented by four data streams, the first of which is a data stream of the I component of the dual-polarization symbol stream in the X polarization direction (referred to as an X I data stream), the second of which is a data stream of the Q component of the dual-polarization symbol stream in the X polarization direction (referred to as an X Q data stream), the third of which is a data stream of the I component of the dual-polarization symbol stream in the Y polarization direction (referred to as a Y Idata stream), the 4th one is the data stream corresponding to the Q component in Y polarization direction of the dual-polarization symbol stream (referred to as Y Q data stream).

[0056] It should be understood that in the dual-polarization symbol mapping and framing operation shown in FIG. 2(a), the framing (also referred to as DSP framing) is performed after the dual-polarization symbol mapping, that is, the framing is performed on the symbol. The following shows another possible implementation of the sending DSP processor, in which the framing is performed before the dual-polarization symbol mapping, that is, the framing is performed on the bit.

[0057] FIG. 2(b) is a schematic diagram of another implementation of the sending DSP processor in the embodiment of the present application. As shown in FIG. 2(b), the framing is performed before the dual-polarization symbol mapping. Specifically, a pre-framing bit sequence containing multiple bits is obtained, a preset bit sequence is inserted, and dual-polarization symbol mapping is performed to obtain a post-framing dual-polarization symbol sequence. The preset bit sequence is mapped to a preset symbol sequence through the dual-polarization symbol mapping, and the preset bit sequence is also referred to as the bit corresponding to the preset symbol sequence. It should be understood that the post-framing dual-polarization symbol sequence obtained by using the pre-framing bit sequence in the implementation shown in FIG. 2(b) is the same as the post-framing dual-polarization symbol sequence obtained by using the pre-framing bit sequence in the implementation shown in FIG. 2(a).

[0058] FIG. 2(c) is a schematic diagram of another implementation of the sending DSP processor in the embodiment of the present application. As shown in FIG. 2(c), the framing is performed before the dual-polarization symbol mapping. Specifically, two pre-framing bit sequences containing multiple bits are obtained respectively, a first preset bit sequence and a second preset bit sequence are inserted into the first pre-framing bit sequence and the second pre-framing bit sequence respectively, and dual-polarization symbol mapping is performed to obtain a post-framing dual-polarization symbol sequence. The first preset bit sequence is mapped to a preset symbol sequence in the X polarization direction through symbol mapping, and the second preset bit sequence is mapped to a preset symbol sequence in the Y polarization direction through symbol mapping. The first preset bit sequence is also referred to as the bit corresponding to the preset symbol sequence in the X polarization direction, and the second preset bit sequence is also referred to as the bit corresponding to the preset symbol sequence in the Y polarization direction. It should be understood that the post-framing dual-polarization symbol sequence obtained by using the pre-framing bit sequence in the implementation shown in FIG. 2(c) is the same as the post-framing dual-polarization symbol sequence obtained by using the pre-framing bit sequence in the implementation shown in FIG. 2(a).

[0059] Figure 2(d) is a schematic diagram of another embodiment of the transmitter DSP processor in the present application. As shown in Figure 2(d), framing is performed before dual polarization symbol mapping. Specifically, four framing pre-bit sequences each containing a plurality of bits are obtained, a first preset bit sequence, a second preset bit sequence, a third preset bit sequence and a fourth preset bit sequence are inserted into the first framing pre-bit sequence, the second framing pre-bit sequence, the third framing pre-bit sequence and the fourth framing pre-bit sequence respectively, and dual polarization symbol mapping is performed to obtain a framing post-dual polarization symbol sequence. The first preset bit sequence is mapped to a preset symbol sequence in the I component in the X polarization direction, the second preset bit sequence is mapped to a preset symbol sequence in the Q component in the X polarization direction, the third preset bit sequence is mapped to a preset symbol sequence in the I component in the Y polarization direction, and the fourth preset bit sequence is mapped to a preset symbol sequence in the Q component in the Y polarization direction. The first preset bit sequence is also referred to as the bit corresponding to the preset symbol sequence in the X I component, the second preset bit sequence is also referred to as the bit corresponding to the preset symbol sequence in the X Q component, the third preset bit sequence is also referred to as the bit corresponding to the preset symbol sequence in the Y I component, and the fourth preset bit sequence is also referred to as the bit corresponding to the preset symbol sequence in the Y Q component. It should be understood that the framing post-dual polarization symbol sequence obtained by using the embodiment shown in Figure 2(d) for the framing pre-bit sequence is the same as the framing post-dual polarization symbol sequence obtained by using the embodiment shown in Figure 2(a) for the framing pre-bit sequence.

[0060] It should be noted that the present application does not limit the specific framing method used by the transmitter DSP processor. In addition to the framing methods described above with reference to Figures 2(a), 2(b), 2(c) and 2(d), other similar framing methods are also applicable to the present application, and will not be described herein.

[0061] In some specific application modes, the subframe arranged in the first position in the data frame is a first type of subframe, and the first type of subframe includes a framing pre-symbol, a training symbol, a pilot symbol, a frame synchronization symbol and a reserved symbol. In the first type of subframe, typically, the training symbol is located before the frame synchronization symbol, the frame synchronization symbol is located before the reserved symbol, and the reserved symbol is located before the framing pre-symbol. The data frame includes at least one second type of subframe, and the second type of subframe includes a framing pre-symbol, a training symbol and a pilot symbol. In the second type of subframe, typically, the training symbol is located before the framing pre-symbol.

[0062] Figure 3 is a schematic diagram of a data transmission method in an embodiment of the present application. As shown in Figure 3, the data transmission method includes the following steps.

[0063] 101、sending end acquires data frame.

[0064] It should be noted that the present application does not limit the specific implementation of generating data frame, for example, the above-mentioned double polarization symbol mapping and framing manner introduced in FIG. 2(a), FIG. 2(b), FIG. 2(c) or FIG. 2(d) can be adopted, of course, other similar double polarization symbol mapping and framing manner is also applicable to the present scheme, which will not be introduced one by one here. It should be understood that the data frame includes symbols in two polarization directions, and the structure of the data frame in the two polarization directions is similar, for example, the data frame includes a symbol sequence in the X polarization direction and a symbol sequence in the Y polarization direction, and the structure of the data frame will be introduced below taking one of the polarization directions as an example.

[0065] FIG. 4 is a schematic diagram of a structure of a data frame in an embodiment of the present application. As shown in FIG. 4, the data frame includes N SF sub-frames, and each sub-frame includes N S symbols. Each sub-frame includes T training symbols and M pilot symbols, N SF , N S , T and M are all integers greater than 0. The training symbol sequence composed of the T training symbols is also simply referred to as a training sequence. The pilot symbol sequence composed of the M pilot symbols is also simply referred to as a pilot sequence. The sub-frames mainly include two types, one type of sub-frame includes a frame synchronization symbol, which is usually the first sub-frame, and the other type of sub-frame is a second type of sub-frame.

[0066] FIG. 5 is a schematic diagram of a structure of a sub-frame in a data frame in an embodiment of the present application. As shown in the example of FIG. 5(a), the first type of sub-frame includes T training symbols and M pilot symbols, and one symbol is both a training symbol and a pilot symbol. Here, T and M are integers greater than 0. The first T symbols in the first type of sub-frame are training symbols, which can be used for link training and sub-frame synchronization. Usually, the first symbol (the symbol at the starting position) of the sub-frame is both a training symbol and a pilot symbol, of course, it can also be any one of the first T symbols which is both a training symbol and a pilot symbol, which is not limited by the present application. In addition, in the first type of sub-frame, the symbol at a fixed position in every N g symbols is a pilot symbol, which is used for carrier phase recovery. For example, the first symbol in every N g symbols is a pilot symbol as shown in the example of FIG. 5(a). In some specific applications, the integer N g is 32, 64, 96 or 128. The T training symbols are followed by N FAW frame synchronization symbols, which are used for synchronization between super-frames (also referred to as multi-frames). In addition, after the N FAW frame synchronization symbols, there are usually N RESA reserved symbol can be reserved for future other use, and the reserved symbol can also be located in one of the multiple second-type subframes, which are not limited by the present application. Wherein, N g , N FAW , and N RES are all integers greater than 0.

[0067] As shown in the example of (b) of FIG. 5, the second-type subframe contains T training symbols and M pilot symbols, wherein one symbol is both a training symbol and a pilot symbol. In the second-type subframe, the first T symbols are training symbols, and the symbol at the fixed position in every N g symbols is a pilot symbol. Typically, in the second-type subframe, the remaining symbols other than the training symbols and the pilot symbols are pre- framing (payload) symbols.

[0068] It should be understood that, as shown in the data frame structure of FIG. 5, in one polarization direction, the total number of symbols combined together by the T training symbols and the M pilot symbols included in each of the subframes is not T+M, and the first symbol is both a pilot symbol and a training symbol, so the total number of symbols needs to be reduced by 1. That is, each of the subframes includes T training symbols and M pilot symbols combined together to form N TP =T+M-1 symbols. Each of the training symbols and each of the pilot symbols takes one of the four complex numbers -A-Aj, -A+Aj, A-Aj, and A+Aj, wherein A is a real number not equal to 0, and j represents an imaginary unit. Here, Aj can also be written as A×j. It should be noted that the data frame contains N SF subframes, and a total of N SF ×T training symbols and N SF ×M pilot symbols. The N SF ×T training symbols and the N SF ×M pilot symbols combined together form N SF ×N TP symbols satisfying direct current balance (DC balanced). That is, the sum of the N SF ×N TP symbols is 0. More specifically, in one polarization direction, the sum of the real parts of the complex numbers corresponding to the N SF ×N TP symbols is 0, and the sum of the imaginary parts is also 0, which can achieve DC balance, and is conducive to improving the quality of the recovered signal at the receiving end.

[0069] In some specific applications, 16QAM symbol mapping is adopted, and the values of the 16 constellation points (also referred to as symbols) on the corresponding 16QAM constellation diagram are {±1±1j, ±1±3j, ±3±1j, ±3±3j}. As shown in the (a) example of FIG. 6, the hollow circles represent the outermost 4 constellation points in the constellation diagram, i.e., the symbols -3-3j, -3+3j, 3-3j, and 3+3j, and the vertical line circles represent the innermost 4 constellation points in the constellation diagram, i.e., the symbols -1-1j, -1+1j, 1-1j, and 1+1j. The (b) example of FIG. 6 shows a specific 16QAM symbol mapping manner, and one 16QAM symbol in the X polarization direction or the Y polarization direction is obtained by mapping 4 bits, for example, 0000 is mapped to -3-3j, 0101 is mapped to -1-1j, 0010 is mapped to -3+3j, 0111 is mapped to -1+1j, 1010 is mapped to 3+3j, 1111 is mapped to 1+1j, 1000 is mapped to 3-3j, and 1101 is mapped to 1-1j.

[0070] Typically, for the 16QAM symbol mapping described above, A = 3 or -3 is selected to achieve better sensitivity of the training symbol or pilot symbol. For QPSK symbol mapping, the values of the 4 constellation points (also referred to as symbols) on the constellation diagram are {±1±1j}, and A = 1 or -1 is selected.

[0071] 102. The sending end sends a data frame to the receiving end.

[0072] The data frame sent by the sending end is transmitted to the receiving end through a channel. In some possible scenarios, the dual-polarization symbols in the data frame are converted into four analog signals after digital to analog conversion (DAC), which correspond to the I component signal in the X polarization direction, the Q component signal in the X polarization direction, the I component signal in the Y polarization direction, and the Q component signal in the Y polarization direction, respectively, and the signals are transmitted to the receiving end through an optical fiber.

[0073] 103. The receiving end performs signal processing on the received data frame.

[0074] It should be understood that the data frame received by the receiving end is after transmission through the channel, which can be understood as a distorted signal affected by noise or other impairments in the channel. That is, the data frame received by the receiving end is different from the data frame sent by the sending end, for example, the data frame received by the receiving end is not aligned with the data frame sent by the sending end, and the receiving end needs to perform frame synchronization according to the frame synchronization symbol or the training symbol. The specific operation of the receiving end after receiving the data frame will not be described in detail, and can be referred to the system structure diagram shown in FIG. 1, for example, the signal processing (signal processing) of the received data frame by the receiving end DSP processor, including dispersion compensation, synchronization, phase recovery and the like.

[0075] It should be noted that in some specific applications, in order to realize the hardware simply, the M pilot symbols in the data frame are generated by a target polynomial and a seed. The following describes several possible ways of generating M pilot symbols.

[0076] Typically, the M pilot symbols in the X polarization direction are generated by a target polynomial in the X polarization direction and a seed in the X polarization direction; the M pilot symbols in the Y polarization direction are generated by a target polynomial in the Y polarization direction and a seed in the Y polarization direction. In the embodiment of the present application, for the pilot symbols in the two orthogonal polarization directions, the same generating polynomial (also referred to as target polynomial) can be used, but since the seeds used in the two polarization directions are not the same, the M pilot symbols obtained in the two polarization directions are not exactly the same.

[0077] FIG. 7(a) is a schematic diagram of a first pilot symbol generation structure in the embodiment of the present application. The target polynomial uses a 10th order polynomial, which can be expressed as: x 10 +a9×x 9 +a8×x 8 +a7×x 7 +a6×x 6 +a5×x 5 +a4×x 4 +a3×x 3 +a2×x 2 +a1×x+1. Wherein a9…a1 can take the value of 0 or 1.

[0078] It should be noted that an algebraic expression composed of several monomials added (or subtracted) together is called a polynomial. Each monomial in a polynomial is called a term of the polynomial, and the degree of the highest term among these monomials is the degree of the polynomial. The number of terms of a polynomial refers to the number of the above monomials with non-zero coefficients; for example, the number of terms of the above 10-degree polynomial is equal to the number of non-zero a9…a1 plus 2.

[0079] In some specific applications, the number of non-zero a9…a1 is not greater than 6, that is, the number of terms of the target polynomial is greater than or equal to 2 and less than or equal to 8, so that the hardware implementation complexity is relatively low. As shown in FIG. 7(a), each block can be regarded as a storage unit, and the number of storage units is the same as the number of bits in the preloaded seed, that is, each storage unit is used to input the corresponding bit in the seed. For example, the seed length is 10 bits, which can be expressed in binary form as b9, b8, b7, b6, b5, b4, b3, b2, b1, b0, and 10 corresponding storage units are used. Of course, the seed can also be expressed in hexadecimal or decimal form, and when operated with the target polynomial, it needs to be converted into binary form, for example, 0110111000 expressed in hexadecimal is 0x1B8, and expressed in decimal is 440.

[0080] It should be noted that the polynomial x 10 +a9×x 9 +a8×x 8 +a7×x 7 +a6×x 6 +a5×x 5 +a4×x 4 +a3×x 3 +a2×x 2 +a1×x+1 can be written as x^10+a9×(x^9)+a8×(x^8)+a7×(x^7)+a6×(x^6)+a5×(x^5)+a4×(x^4)+a3×(x^3)+a2×(x^2)+a1×x+1. It should be understood that x can also be written as x^1.

[0081] FIG. 7(b) is a schematic diagram of a second pilot symbol generation structure in an embodiment of the present application. The target polynomial uses a 9-degree polynomial, which can be expressed as: x 9 +a8×x 8 +a7×x 7 +a6×x 6 +a5×x 5 +a4×x 4 +a3×x 3 +a2×x 2+a1×x+1. Where a8…a1 can take values ​​of 0 or 1. In some specific applications, the number of non-zero terms in a8…a1 is no greater than 6, meaning the number of terms in the target polynomial is greater than or equal to 2 and less than or equal to 8, resulting in lower hardware implementation complexity. As shown in Figure 7(b), the seed length is 9 bits, which can be represented in binary as b8, b7, b6, b5, b4, b3, b2, b1, b0. Of course, the seed can also be represented in hexadecimal or decimal, but it needs to be converted to binary form when operating with the target polynomial.

[0082] Figure 7(c) is a schematic diagram of the third pilot symbol generation structure in the embodiments of this application. The target polynomial is an 11th-order polynomial, and the 8th-order polynomial can be expressed as: x 11 +a 10 ×x 10 +a9×x 9 +a8×x 8 +a7×x 7 +a6×x 6 +a5×x 5 +a4×x 4 +a3×x 3 +a2×x 2 +a1×x+1. Where a 10 …a1 can take the value 0 or 1. In some specific applications, a… 10 …The number of non-zero terms in a1 is no greater than 6, meaning the number of terms in the objective polynomial is greater than or equal to 2 and less than or equal to 8, resulting in low hardware implementation complexity. As shown in Figure 7(c), the seed length is 11 bits, which can be represented in binary as b. 10 b9, b8, b7, b6, b5, b4, b3, b2, b1, b0. Of course, the seed can also be represented in hexadecimal or decimal, but it needs to be converted to binary form when it is used in operation with the target polynomial.

[0083] In Figures 7(a), 7(b), and 7(c), for scenarios requiring the generation of M pilot symbols in one polarization direction, a bit sequence b0, b1, b2, ... b1, consisting of 2 × M bits, is obtained based on the target polynomial and the seed. 2M-1 The aforementioned bit sequence is also called a pseudo-random binary sequence (PRBS). A bit sequence generated using a 9th-order polynomial is also called PRBS9, a bit sequence generated using a 10th-order polynomial is also called PRBS10, and a bit sequence generated using an 11th-order polynomial is also called PRBS11. Bit sequence b0, b1, b2, ... b 2M-1 Each pair of consecutive bits is denoted as b. 2t b 2t+1(0≤t<M). The two bits b 2t , b 2t+1 are mapped into one symbol (2b 2t -1)A+(2b 2t+1 -1)Aj, 0≤t<M. 2t -1)A+(2b 2t+1 -1)Aj, 0≤t<M.

[0084] It should be noted that the symbol (2b 2t -1)A+(2b 2t+1 -1)Aj can also not be a symbol on the constellation of the used modulation format, but can be a certain 4 symbols in the middle area of the outermost 4 symbols and the innermost 4 symbols of the constellation of the used modulation format. At this time, the noise and sensitivity of the training and pilot symbols are general, but the peak-to-average power ratio is relatively low. Taking 16QAM as an example, the 16 symbols on the 16QAM constellation take values of {±1±1j, ±1±3j, ±3±1j, ±3±3j}, and the value of the real number A satisfies 1≤A≤3. The specific value of the real number A can be selected according to the actual application scenario to make the peak-to-average power ratio, noise and sensitivity of the training and pilot symbols have a good trade-off. For example, the real number A takes a value of 2. The values of the pilot symbols and the training symbols are In addition, when the 16 symbols on the 16QAM constellation are power normalized and take values of The value of the real number A satisfies For example, the real number A takes a value of 2. The values of the pilot symbols and the training symbols are

[0085] In the embodiments of the present application, the values of the coefficients a i in the designed polynomial can be used to determine the target polynomial and the seed, so that the generated pilot symbols have good autocorrelation characteristics of the symbol sequences in the X polarization and the Y polarization, and good cross-correlation characteristics of the symbol sequences in the two polarizations. When the target polynomial is a 9th order polynomial, 1≤i≤8; when the target polynomial is a 10th order polynomial, 1≤i≤9; when the target polynomial is an 11th order polynomial, 1≤i≤10. In particular, the normalized amplitude of the sidelobe value of the periodic autocorrelation function of the symbol sequence in the two polarization directions is not greater than a preset value T0, and the normalized amplitude of the periodic cross-correlation function value of the symbol sequence in the two polarization directions is not greater than a preset value T1.

[0086] Next, the N SF ×T training symbols and the N SF ×M pilot symbols in the data frame are introduced from two aspects. SF ×NTP N TP = T + M - 1.

[0087] N TP is even, i.e. T + M is odd. Typically, in one polarization direction, T training symbols and M pilot symbols in each subframe combine together to total N TP = T + M - 1 symbols satisfying DC balance. At this time, N SF x T training symbols and N SF x M pilot symbols in the data frame combine together to total N SF x N TP symbols also satisfying DC balance. It should be understood that the sum of the N TP symbols is 0. More specifically, the sum of the real parts of the complex numbers corresponding to the N TP symbols is 0, and the sum of the imaginary parts is also 0, which achieves DC balance, and is conducive to improving the quality of the recovered signal at the receiving end. It is considered that N TP is even, either T is even and M is odd, or T is odd and M is even.

[0088] It is considered that T = 11 and M = 226, and the sequence of T = 11 training symbols in each subframe is shown in Table 1 below.

[0089] Table 1

[0090] It is considered that T = 11 and M = 226, and the sequence of M = 226 pilot symbols in each subframe is one row in Table 2 below, the normalized amplitude of the period autocorrelation function of the pilot symbols in the same polarization direction is not greater than 0.3, and the normalized amplitude of the period cross-correlation function of the pilot symbols in different polarization directions is not greater than 0.3. The autocorrelation and cross-correlation characteristics of the pilot symbol sequence provided in Table 2 are both good, and the combination of the training symbols and the pilot symbols also satisfies DC balance, which is conducive to improving the recovered signal at the receiving end and improving the quality of the recovered signal.

[0091] Table 2

[0092] Table 2 can correspond to a 10th order polynomial and an 11th order polynomial.

[0093] In some other optional applications, when the 226 pilot symbols are in one row of Table 3 below, the normalized amplitude of the periodic autocorrelation function side lobe value of the pilot symbols in the same polarization direction is not greater than 0.4, and the normalized amplitude of the periodic cross-correlation function value of the pilot symbols in different polarization directions is not greater than 0.4. The autocorrelation and cross-correlation characteristics of the pilot symbol sequences provided in Table 3 are good, and the combination of the training symbols and the pilot symbols can also satisfy the direct current balance, which is conducive to improving the signal recovery at the receiving end and improving the quality of the recovered signal. Table 3 can correspond to a 10th order polynomial.

[0094] Table 3

[0095] It should be noted that in Table 2 and Table 3, the autocorrelation and cross-correlation of the pilot symbol sequence are good, which is beneficial to the recovery of the signal at the receiving end.

[0096] In an optional manner, when the 226 pilot sequences are considered as the 11th row in Table 2, the generation polynomial is an 11th order polynomial x11+x10+x9+x7+1, the seed of the X polarization direction is 0x2DA, and the seed of the Y polarization direction is 0x56C. The generation process of the 226 pilot symbols can be understood with reference to FIG. 8.

[0097] As shown in FIG. 8, in the X polarization direction, the input polarization seed is 0x2DA, and after being converted into a binary sequence, it is 01011011010. If two bits 1 and 0 are continuously output in sequence, the pilot symbol in the X polarization direction is A-Aj, if two bits 0 and 0 are continuously output in sequence, the pilot symbol in the X polarization direction is -A-Aj, if two bits 1 and 1 are continuously output in sequence, the pilot symbol in the X polarization direction is A+Aj, and if two bits 0 and 1 are continuously output in sequence, the pilot symbol in the X polarization direction is -A+Aj. By analogy, 226 pilot symbols in the X polarization direction can be obtained.

[0098] As shown in FIG. 8, in the Y polarization direction, the input polarization seed is 0x56C, and after being converted into a binary sequence, it is 10101101100. If two bits 1 and 0 are continuously output in sequence, the pilot symbol in the Y polarization direction is A-Aj, if two bits 0 and 0 are continuously output in sequence, the pilot symbol in the Y polarization direction is -A-Aj, if two bits 1 and 1 are continuously output in sequence, the pilot symbol in the Y polarization direction is A+Aj, and if two bits 0 and 1 are continuously output in sequence, the pilot symbol in the Y polarization direction is -A+Aj. By analogy, 226 pilot symbols in the Y polarization direction can be obtained.

[0099] The sequence of the pilot symbols provided by the embodiment has a normalized amplitude of a period autocorrelation function of the pilot symbols in the same polarization direction not greater than 0.3, and a normalized amplitude of a period cross-correlation function of the pilot symbols in different polarization directions not greater than 0.3. The autocorrelation and cross-correlation characteristics are both good, the training symbols and the pilot symbols combined together can also satisfy direct current balance, which is conducive to improving the recovery of signals at the receiving end and improving the quality of the recovered signals.

[0100] In another optional manner, when the 55th row in the 226 pilot sequence table 3 is considered, the generation polynomial is a 10th order polynomial x 10 + x 7 + x 6 + x 5 + x 4 + x 3 + x 2 + x 1 + 1, the X polarization direction seed is 0x06A, the Y polarization direction seed is 0x0C8, and the generation process of the 226 pilot symbols can be understood by referring to FIG. 9.

[0101] As shown in FIG. 9, in the X polarization direction, the input polarization seed is 0x06A, and after conversion to a binary sequence, it is 00 0110 1010. If two bits of 1 and 0 are output in sequence, the pilot symbol in the X polarization direction is A-Aj, if two bits of 0 and 0 are output in sequence, the pilot symbol in the X polarization direction is -A-Aj, if two bits of 1 and 1 are output in sequence, the pilot symbol in the X polarization direction is A+Aj, and if two bits of 0 and 1 are output in sequence, the pilot symbol in the X polarization direction is -A+Aj. By analogy, 226 pilot symbols in the X polarization direction can be obtained.

[0102] As shown in FIG. 9, in the Y polarization direction, the input polarization seed is 0x0C8, and after conversion to a binary sequence, it is 00 1100 1000. If two bits of 1 and 0 are output in sequence, the pilot symbol in the Y polarization direction is A-Aj, if two bits of 0 and 0 are output in sequence, the pilot symbol in the Y polarization direction is -A-Aj, if two bits of 1 and 1 are output in sequence, the pilot symbol in the Y polarization direction is A+Aj, and if two bits of 0 and 1 are output in sequence, the pilot symbol in the Y polarization direction is -A+Aj. By analogy, 226 pilot symbols in the Y polarization direction can be obtained.

[0103] The sequence of pilot symbols provided by the embodiment has a normalized amplitude of a periodic autocorrelation function of pilot symbols in the same polarization direction not greater than 0.3, and a normalized amplitude of a periodic cross-correlation function of pilot symbols in different polarization directions not greater than 0.3. The autocorrelation and cross-correlation characteristics are both good, the combination of training symbols and pilot symbols can also satisfy direct current balance, which is conducive to improving the recovery of signals at the receiving end and improving the quality of the recovered signals.

[0104] FIG. 10 is a schematic structural diagram of a data transmission device in an embodiment of the present application. The data transmission device is applied to a sending end, as shown in FIG. 10, and includes a processing unit 201 and a sending unit 202. The processing unit 201 is configured to perform the actions of obtaining a data frame including a plurality of subframes, and generating a plurality of pilot symbols included in the subframes; and optionally, generating training symbols; the specific implementation manner has been described in the previous embodiments, which will not be repeated here. The sending unit 202 is configured to perform the actions of sending the data frame in the above embodiments.

[0105] FIG. 11 is another structure of the data transmission apparatus in the embodiments of the present application. The data transmission apparatus is applied to a receiving end. As shown in FIG. 11, the data transmission apparatus includes a receiving unit 302, configured to receive a second data frame of a first data frame transmitted through a channel, where the first data frame has a plurality of subframes, which is consistent with the data frame having a plurality of subframes in the sending end, and details are not described herein. Optionally, the data transmission apparatus further includes a first processing unit 301, configured to perform decoding and the like.

[0106] It should be understood that the data transmission apparatus provided in FIG. 10 and FIG. 11 can also be implemented in other manners. For example, the division of the units in the apparatus is only a logical function division, and other division manners can be adopted during actual implementation. For example, a plurality of units or components can be combined or integrated into another system, or some features can be left out or not implemented. In addition, the various embodiments of the present application can be implemented in a form of a program instructing a computer device to perform the units. The program can be stored in a computer readable storage medium, for example, a compact disk, a CD-ROM, and the like, and can include all the technical features.

[0107] FIG. 12 is a structure of an optical module in the embodiments of the present application. As shown in FIG. 12, the optical module includes a processor 401 and an interface 402. The interface 402 can be a transceiver or an input / output interface, and is configured to receive a signal from another apparatus and transmit the signal to the processor 401 or transmit a signal from the processor 401 to another apparatus. Optionally, the optical module can further include a memory 403, where the memory 403 is configured to store program instructions and data.

[0108] In a possible scenario, the optical module is applied to a sending end, and the processor 401 is configured to perform the following operations: obtaining a data frame including a plurality of subframes, and generating a plurality of pilot symbols included in the subframes based on the target polynomial and the seed given in the above embodiments; and optionally, generating training symbols; and details are described in the previous embodiments, which are not described herein. For example, the processor 401 includes the processing unit 201 shown in FIG. 10. As an example, the processor 401 performs the operations in the above embodiments to obtain a data frame, and transmits the data frame through the interface 402, where the interface 402 can be an electrical interface in this example. As another example, the processor 401 performs the operations in the above embodiments to obtain a data frame, and a modulator in the optical module performs electrical-optical conversion and the like on the data frame to obtain an optical signal, and then transmits the optical signal through the interface 402, where the interface 402 can be an optical interface in this example.

[0109] In another possible scenario, the optical module is applied to a receiving end, and the processor 401 is configured to perform the operation of the receiving unit 302 in the above-described embodiments, that is, the processor 401 includes the first processing unit 301 shown in FIG. 11. As an example, the interface receives an optical signal transmitted through a channel, and a demodulator in the optical module performs photoelectric conversion and other signal processing on the optical signal to obtain a data frame, and the processor 401 performs the operation described in the above-described embodiments on the data frame. In this example, the interface 402 can specifically refer to an optical interface. As another example, a demodulator in the optical module performs photoelectric conversion and other signal processing on the received optical signal to obtain a data frame, and transmits the data frame to the processor 401 through the interface 402, and the processor 401 performs the operation described in the above-described embodiments on the data frame. In this example, the interface 402 can specifically refer to an electrical interface.

[0110] Generally, an optical module includes optoelectronic devices, a processor, an interface, and the like. The optoelectronic devices include a transmitting device and a receiving device. The transmitting end of the optical module converts an electrical signal into an optical signal and transmits the optical signal through an optical fiber. The receiving end of the optical module receives an optical signal and converts the optical signal into an electrical signal.

[0111] It should be noted that the types of the optical module in the embodiments of the present application include, but are not limited to, a normal optical module, a near package optics (NPO) module, a co-packaged optics (CPO) module, and the like. The functions that can be implemented by the normal optical module include, but are not limited to, digital signal processing (DSP) and clock data recovery (CDR), and the like. For example, the normal optical module converts an analog signal into a digital signal, performs DSP on the digital signal, and then converts the digital signal into an analog signal to be sent to a host-side device. Since retiming is required for DSP, the normal optical module can also be referred to as a retimed module. The normal optical module is connected to the host-side device through an attachment unit interface (AUI). The NPO module and the CPO module do not have a pluggable optical module physical package form, and are closer to the host-side device. The NPO module and the CPO module can also be referred to as an optical engine. The NPO technology or the CPO technology is a technology of “packaging” the host-side device (or the host-side chip) and the optical engine. When the host-side device and the optical engine are packaged by using the NPO technology, the optical engine can be referred to as an NPO module. When the host-side device and the optical engine are packaged by using the CPO technology, the optical engine can be referred to as a CPO module.

[0112] FIG. 13 is a schematic diagram of a structure of a sending device according to an embodiment of the present application. As shown in FIG. 13, the sending device includes a host-side device 501 and an optical module 502. The host-side device 501 is configured to send an electrical signal to the optical module 502, and the optical module 502 is configured to convert the electrical signal into an optical signal and send the optical signal through a channel. For example, the host-side device 501 can be a switch, a router, a server, or the like. The sending device can be a communication device including the host-side device 501 and the optical module 502. It should be understood that the sending device is named based on the direction of data flow, and the function of the device is not limited, for example, the sending device can also have a receiving function.

[0113] FIG. 14 is a schematic diagram of a structure of a receiving device according to an embodiment of the present application. As shown in FIG. 14, the receiving device includes a first host-side device 601 and a first optical module 602. The first optical module 602 is configured to convert a received optical signal into an electrical signal and send the electrical signal to the first host-side device 601. For example, the first host-side device 601 can be a switch, a router, a server, or the like. The receiving device can be a communication device including the first host-side device 601 and the first optical module 602. It should be understood that the receiving device is named based on the direction of data flow, and the function of the device is not limited, for example, the receiving device can also have a sending function.

[0114] The embodiments of the present application also provide an optical transport network (OTN) device, which includes a line side device and a client side device. In some scenarios, the client side device can also be referred to as a tributary side device. The line side device includes a processor and an interface. In a possible scenario, the OTN device is applied to a sending end, and the processor is configured to perform the operation of step 101 in the above embodiment. In another possible scenario, the OTN device is applied to a receiving end, and the processor is configured to perform the operation of step 103 in the above embodiment. The interface can be a transceiver or an input / output interface, and the interface is configured to receive a signal from another device outside the line side device and transmit the signal to the processor, or transmit a signal from the processor to another device outside the line side device.

[0115] The embodiments of the present application also provide a chip. The chip integrates a circuit for implementing the functions of the processor 401 and one or more interfaces. As an example, the chip integrates a memory. As another example, when the chip does not integrate a memory, the chip can be connected with an external memory through the interface. The chip can complete the method steps of any one or more of the preceding embodiments. Alternatively, the chip implements the actions performed by the transmission device in the preceding embodiments according to program codes stored in the memory.

[0116] As an example, the chip in the embodiments of the present application can be a central processing unit (CPU), and can also be another general-purpose processor, a digital signal processor (DSP), an application specific integrated circuit (ASIC), a field programmable gate array (FPGA) or another programmable logic device, a transistor logic device, a hardware component or any combination thereof. The general-purpose processor can be a microprocessor or any conventional processor, and can also be a processing circuit implementing specific functions.

[0117] The embodiments of the present application also provide a computer readable storage medium, including a program or instructions, which, when executed on a computer, cause the implementation of the method performed by the method embodiments.

[0118] It should be understood that the processor mentioned in the embodiments of the present application can be implemented by hardware or software. When implemented by hardware, the processor can be a logic circuit, an integrated circuit or the like. When implemented by software, the processor can be a general-purpose processor, which implements by reading software codes stored in a memory. The memory can exist independently and be connected with the processor, or the memory can be integrated with the processor.

[0119] As an example, the processor in the embodiments of the present application can be a central processing unit (CPU), and can also be other general-purpose processors, digital signal processors (DSP), application specific integrated circuits (ASIC), field programmable gate arrays (FPGA) or other programmable logic devices, transistor logic devices, hardware components or any combination thereof. The general-purpose processor can be a microprocessor or any conventional processor, and can also be a processing circuit that implements specific functions.

[0120] The memory in the embodiments of the present application can be a random access memory (RAM), a flash memory, a read-only memory (ROM), a programmable ROM (PROM), an erasable PROM (EPROM), an electrically EPROM (EEPROM), a register, a hard disk, a mobile hard disk, a CD-ROM, or any other form of storage medium well known in the art. An exemplary storage medium is coupled to the processor, such that the processor can read information from, and write information to, the storage medium. Of course, the storage medium can be a component of the processor. The processor and the storage medium can be located in an ASIC. The ASIC can be located in a network device or a terminal device. Of course, the processor and the storage medium can also exist as discrete components in the network device or the terminal device.

[0121] In the above embodiments, all or part of the embodiments can be implemented by software, hardware, firmware or any combination thereof.

[0122] When implemented by using hardware, the data transmission method provided by the embodiments of the present application can be implemented without reading software codes or instructions, for example, by using a CPU, a DSP, an ASIC, an FPGA, other programmable logic devices, transistor logic devices, hardware components or any combination thereof.

[0123] When implemented using software, the functions can be implemented using one or more computer programs or instructions stored or executed in at least one computer-readable medium. The computer-readable medium can be a machine-readable storage device, a machine-readable storage substrate, a memory device, or a computer-readable signal. The computer-readable medium can include, but is not limited to, floppy diskettes, optical disks, CD-ROMs, DVDs, read-only memory (ROM), random access memory (RAM), erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), magnetic or optical cards, flash memory, or any other suitable type of machine-readable medium. Suitable machine-readable media for storing or transmitting software include hardware- or software-readable media that store data which can be accessed by one or more computer systems. A computer-readable medium stores computer-executable instructions or data that, in combination with the computer system, cause the computer system to operate. For example, a non-transitory computer-readable medium comprising a computer-readable medium that does not undergo a transformation during transmission is any medium that stores data that is not transmitted but is accessed by the computer system. A transitory computer-readable medium is any computer-readable medium that undergoes a transformation during transmission. A computer system can access data stored on a computer-readable medium and / or transmit data via a transitory computer-readable medium.

[0124] Finally, it should be noted that the above-mentioned embodiments are merely used to illustrate the application, but not limit the application. Any changes or modifications made by those skilled in the art based on the above-mentioned embodiments should be covered within the scope of the application. Therefore, the protection scope of the application should be subject to the protection scope of the claims.

Claims

1. A method of data transmission, characterized by, The method comprises: acquiring a data frame comprising a plurality of sub-frames, and transmitting the data frame; wherein each subframe comprises 226 pilot symbols in one polarization direction, the sequence of the 226 pilot symbols being respectively:

2. The method of claim 1, wherein, A is equal to 3 or -3 when the data frame adopts 16QAM symbol mapping, and A is equal to 1 or -1 when the data frame adopts quadrature phase shift keying (QPSK) symbol mapping.

3. The method according to claim 1 or 2, characterized in that, Each sub-frame further comprises 11 training symbols in one polarization direction. The sequence of training symbols is respectively in X polarization direction and Y polarization direction:

4. A data transmission method, characterized by, The method comprises: receiving a second data frame transmitted over a channel from a first data frame, the first data frame comprising a plurality of sub-frames, each sub-frame comprising 226 pilot symbols in one polarization direction, the sequence of the 226 pilot symbols being in an X polarization direction and a Y polarization direction, respectively:

5. The method of claim 4, wherein, A is equal to 3 or -3 when the data frame adopts 16QAM symbol mapping, and A is equal to 1 or -1 when the data frame adopts quadrature phase shift keying (QPSK) symbol mapping.

6. The method according to claim 4 or 5, characterized in that, Each sub-frame further comprises 11 training symbols in one polarization direction. The sequence of training symbols is respectively in X polarization direction and Y polarization direction:

7. A data transmission apparatus characterized by comprising: The method comprises: a processing unit and a transmitting unit; The processing unit is configured to perform the processing of acquiring a data frame; The transmitting unit is configured to transmit the data frame.

8. A data transmission apparatus characterized by comprising: The method comprises: a receiving unit; The receiving unit is configured to receive a second data frame transmitted by a first data frame through a channel.

9. A chip, characterized by The chip is configured to perform the method in any one of claims 1 to 6.

10. An optical module characterized by comprising: The optical module comprises a processor and an interface, the interface is configured to transceive signals, and the processor is configured to perform the method in any one of claims 1 to 3.

11. A transmitting device, comprising: The transmitting device comprises a host-side device and the optical module in claim 10, and the optical module is configured to convert an electrical signal from the host-side device into an optical signal and transmit the optical signal.

12. An optical module characterized by comprising: The optical module comprises a processor and an interface, the interface is configured to transceive signals, and the processor is configured to perform the method in any one of claims 4 to 6.

13. A receiving device, comprising: The receiving device comprises a host-side device and the optical module in claim 12, and the optical module is configured to convert a received optical signal into an electrical signal and transmit the electrical signal to the host-side device.

14. A communication system, characterized by The method comprises: The transmitting device in claim 11 and the receiving device in claim 13, and the transmitting device is configured to transmit a signal to the receiving device.

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