Fast dynamic control of electric motors using optimal pulse patterns (OPP)

Abstract

Methods for controlling an electric motor using an inverter and optimal pulse patterns (OPPs) are provided. The method includes pre-generating a plurality of optimal switching angles corresponding to voltage waveforms for a range of modulation indices; storing the pre-generated optimal switching angles; generating a voltage command using a model-free predictive controller based on a flux error signal of the electric motor; selecting optimal switching angles from stored pre-generated optimal switching angles based on the voltage command; modifying the selected optimal switching angles using a pulse pattern modifier to compensate for dynamic changes in motor operating conditions; and generating gating signals for the inverter based on the modified switching angles to drive the electric motor.

Description

Attorney Docket: 170087-00991WO PCT FAST DYNAMIC CONTROL OF ELECTRIC MOTORS USING OPTIMAL PULSE PATTERNS (OPP) CLAIM OF PRIORITY

[0001] This application claims priority to and the benefit of U.S. Provisional Application No. 63 / 681,391, filed August 9, 2024, the content of which is hereby incorporated herein by reference in its entirety. FIELD

[0002] The present inventive concept relates generally to electronic circuits. More particularly, the inventive concept relates to offline optimal pulse-width modulation strategy used in three-phase two-level voltage source inverter systems such as variable frequency drives (VFDs). BACKGROUND

[0003] Optimal Pulse Patterns (OPPs) are inherently meant for steady state operation. Thus, when optimal pulse patterns are used for dynamic operation, they do not generally change fast enough to jump from one operating point to another during motor drive operation. This results in a limitation of achievable bandwidth when using OPPs for inverter modulation, limiting application areas for OPPs and rendering OPPs unsuitable for rapid dynamic changes, such as those required in a traction application or the like. SUMMARY

[0004] Some embodiments of the present inventive concept provide methods for controlling an electric motor using an inverter and optimal pulse patterns (OPPs). The method includes pre- generating a plurality of optimal switching angles corresponding to voltage waveforms for a range of modulation indices; storing the pre-generated optimal switching angles; generating a voltage command using a model-free predictive controller based on a flux error signal of the electric motor; selecting optimal switching angles from stored pre-generated optimal switching angles based on the voltage command; modifying the selected optimal switching angles using a pulse pattern modifier to compensate for dynamic changes in motor operating conditions; andAttorney Docket: 170087-00991WO PCT generating gating signals for the inverter based on the modified switching angles to drive the electric motor.

[0005] In further embodiments, the pre-generated optimal switching angles may be stored in a lookup table.

[0006] In still further embodiments, the model-free predictive controller is a proportional- integral (PI) controller.

[0007] In some embodiments, the method may further include estimating, by a current observer and a phase-locked loop (PLL), stator current and electrical angle for generating the voltage command.

[0008] In further embodiments, hysteresis control may be applied to introduce hysteresis bands around the switching angles to suppress switching activity due to noise in the voltage command.

[0009] In still further embodiments, the method may further include modifying, by the pulse pattern modifier, the switching angles to minimize abrupt transitions between subsets of optimal switching angles when a modulation index changes.

[0010] In some embodiments, the gating signals may be synchronized with a fundamental electrical frequency of the motor.

[0011] In further embodiments, the method may further include determining a polarity of motor current using a current sensor; calculating an angle error based on deadtime, turn-on delay, and / or turn-off delay of inverter switches; and adjusting an electrical angle used for selecting the optimal switching angles to compensate for the deadtime.

[0012] In still further embodiments, Δα is the angle error and the angle error is determined as follows: ì^^^^ௗ ^ ^^^^^^, ^^^^ ^^^^^^ ൌ 0 ^^^^^^ ^^^^ ^ 0^^^^ ^^^^^^ ^^ ^ 000.

[0013] In some embodiments, the inverter may be a two-level voltage source inverter (VSI) and the motor is a permanent magnet synchronous motor (PMSM).Attorney Docket: 170087-00991WO PCT

[0014] In further embodiments, the method may further include dynamically switching between online space vector modulation (SVM) at low speeds and OPP-based modulation at higher speeds to maintain optimal current total harmonic distortion (THD).

[0015] Still further embodiments of the present invention provide an inverter control system for fast dynamic control of an electric motor using optimal pulse patterns (OPPs). The system including a controller configured to generate a voltage command using a model-free predictive controller based on a flux error signal of the motor; a memory for storing optimal switching angles for various modulation indices; a pulse pattern modifier that selects and adjusts optimal switching angles based on the voltage command; an OPP generator that produces gating signals based on the modified switching angles; and a deadtime compensator that adjusts an electrical angle in real time based on deadtime, turn-on delay, turn-off delay, and / or motor current polarity.

[0016] Some embodiments of the present inventive concept provide a system for dynamically controlling an electric motor using optimal pulse patterns (OPPs). The system including means for generating a voltage command based on motor flux error; means for retrieving optimal switching angles from a lookup table; means for modifying the switching angles based on the voltage command; means for compensating for deadtime by adjusting an electrical angle according to current polarity and switching delay; and means for generating gating signals for an inverter based on the modified and compensated switching angles. BRIEF DESCRIPTION OF THE FIGURES

[0017] Throughout the drawings, reference numbers can be re-used to indicate correspondence between referenced elements. The drawings are provided to illustrate embodiments of the present disclosure and do not to limit the scope thereof.

[0018] Figs.1A and 1B are diagrams illustrating online pulse width modulation (PWM) and offline PWM in accordance with some embodiments of the present inventive concept.

[0019] Fig.2 is a graph illustrating online versus offline PWM total harmonic distortion (THD) versus switching frequency in accordance with some embodiments of the present inventive concept.

[0020] Fig.3 is a diagram illustrating online versus offline PWM harmonic trajectory (fsw=200Hz, f1=33Hz) in accordance with some embodiments of the present inventive concept.Attorney Docket: 170087-00991WO PCT

[0021] Figs.4A and 4B are graphs illustrating online versus offline PWM currents and voltage at a given switching frequency (fsw=200Hz, f1=33Hz) in accordance with some embodiments of the present inventive concept.

[0022] Fig.5 is a diagram illustrating the Offline PWM Usage Process in accordance with some embodiments of the present inventive concept.

[0023] Fig.6 is a graph illustrating the “dynamic error” (2) that occurs when using offline PWM with dynamic operations.

[0024] Figs.7 and 8 are graphs illustrating SVM (online) versus the offline PWM and a hybrid scheme in accordance with embodiments of the present inventive concept.

[0025] Figs.9A through 9E are the diagrams of an example MFP3C model in accordance with some embodiments of the present inventive concept.

[0026] Figs.10A through 10D are diagram illustrating results of the MFP3C model of Fig.9 in accordance with some embodiments of the present inventive concept.

[0027] Figs.11A through 11D are diagrams illustrating results associated with a hysteresis method in accordance with some embodiments of the present inventive concept.

[0028] Fig.12 is a graph illustrating pre-calculated optimal switching angles for N=3 in accordance with some embodiments of the present inventive concept.

[0029] Fig.13 is a graph illustrating an optimal pulse pattern generation scheme in accordance with some embodiments of the present inventive concept.

[0030] Fig.14 is a block diagram illustrating operations in accordance with some embodiments of the present inventive concept for dead time compensation.

[0031] Figs.15A through 15C are diagrams illustrating current path depending on current polarity during deadtime (A), ideal output voltage ^^^∗^ , upper switch input signal gs+, lower switch input signal gs-, and actual output voltage signal without deadtime compensation (B), and ideal output voltage ^^^∗^ , upper switch input signal gs+, lower switch input signal gs-, and actual output voltage signal with deadtime compensation (C) in accordance with some embodiments of the present inventive concept.

[0032] Fig.16 is a flowchart illustrating various operations in accordance with some embodiments of the present inventive concept.

[0033] Fig.17 is a block diagram of a data processing system for use in accordance with some embodiments of the present inventive concept.Attorney Docket: 170087-00991WO PCT DETAILED DESCRIPTION OF EMBODIMENTS

[0034] The inventive concept now will be described more fully hereinafter with reference to the accompanying drawings, in which illustrative embodiments of the inventive concept are shown. This inventive concept may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein; rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the inventive concept to those skilled in the art. Like numbers refer to like elements throughout. As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items. Similarly, as used herein, the word “or” is intended to cover inclusive and exclusive OR conditions. In other words, A or B or C includes any or all of the following alternative combinations as appropriate for a particular usage: A alone; B alone; C alone; A and B only; A and C only; B and C only; and A and B and C.

[0035] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the inventive concept. As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms "comprises" and / or "comprising," when used in this specification, specify the presence of stated features, integers, steps, operations, elements, and / or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups thereof.

[0036] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this inventive concept belongs. It will be further understood that terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning that is consistent with their meaning in the context of the relevant art and this specification and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein.

[0037] Reference will now be made in detail in various and alternative example embodiments and to the accompanying figures. Each example embodiment is provided by way of explanation, and not as a limitation. It will be apparent to those skilled in the art that modifications and variations can be made without departing from the scope or spirit of theAttorney Docket: 170087-00991WO PCT disclosure and claims. For instance, features illustrated or described as part of one embodiment may be used in connection with another embodiment to yield a still further embodiment. Thus, it is intended that the present disclosure includes modifications and variations that come within the scope of the appended claims and their Equivalents.

[0038] As discussed in the background, Optimal Pulse Patterns (OPPs) are inherently meant for steady state operation. Thus, when optimal pulse patterns are used for dynamic operation, they do not generally change fast enough to jump from one operating point to another during motor drive operation. This results in a limitation of achievable bandwidth when using OPPs for inverter modulation, limiting application areas for OPPs and rendering OPPs unsuitable for rapid dynamic changes, such as those required in a traction application or the like. OPP modulation provides lower losses in inverters and motor drives, but as discussed, they are slow to control.

[0039] In particular, modulation is used to generate high frequency switching voltages and a controller is used to decide a pulse width of high frequency pulses for the voltage waveform. A closed loop controller normally does not work well with an OPP style of modulation due to the inherent steady-state nature of OPP modulation. In other words, OPP modulation may not be capable of inherently generating transient voltages that are changing very fast from one amplitude to another amplitude. These changes in amplitude (highest peak value) with AC voltages cause unwanted behavior in the motor control.

[0040] Accordingly, some embodiments of the present inventive concept provide a control structure that enables fast control with OPPs while providing lower losses. Some embodiments discussed herein provide a Model Free Predictive Pulse Pattern Control (MFP3C), which allows fast dynamic control with an inverter using OPPs, by changing the OPP patterns based on flux error during dynamic operation to obtain desired voltage commands. Previous model predictive control for OPP used motor models to generate voltage commands which are parameter dependent, resulting in steady-state offset. Whereas the proposed MFP3C utilizes simple linear control structure, e.g. PI controller, to generate the voltage command effectively eliminating the motor parameter dependency and making it more robust to parameter variations including temperature, inductor saturation, current or other factors. However, it introduces noise to the voltage command to mitigate this issue the MFP3C is combined with simplified current observer, phase-locked loop (PLL) and hysteresis control-based offline PWM, demonstrating robustnessAttorney Docket: 170087-00991WO PCT against noise in the closed-loop system while taking advantage of both flux tracking and current tracking methods to achieve faster response and correct steady-state performance.

[0041] Further embodiments discussed herein provide a hysteresis-based offline PWM. OPPs are implemented as pre-calculated tables of switching angles within the fundamental electrical period. These angles may be used to generate the gate pulses of the inverter. The switching angles are calculated with the objective of optimizing certain parameters, such as, current harmonics, torque ripple, and the like. The OPP tables are often not continuous for the entire range of inverter modulation index ranging from 0 to 4 / π. Thus, there can be abrupt transients when moving from one subset of OPP to another when modulation index changes. Moreover, the command voltage angle often contains noise in closed-loop system resulting in excessive switching action and reducing the inverter efficiency. Hysteresis-based offline PWM addresses this problem by introducing hysteresis bands around the discontinuities by extending the local switching angles by means of a new post-optimization method, shown in Fig.9E, that optimizes the OSA in forward and reverse modulation index directions depending on the beginning and end of the discontinuity, thereby increasing the robustness of the offline PWM against command voltage amplitude disturbance. Moreover, the hysteresis-based offline PWM introduces hysteresis bands at the OPP generation stage, increasing the robustness of the offline against command voltage angle disturbance. This effectively eliminates the excessive switching actions resulting from multiple crossings of the voltage command angle over the optimal switching angles, as shown in Fig.9D. Consequently, hysteresis-based offline PWM can work in closed- loop systems such as field-oriented control, thus reducing the abrupt transients and allowing for smoother operation, as will be discussed further herein.

[0042] Some embodiments of the present inventive concept compensate for a “deadtime effect” for OPP modulation based two-level voltage source inverters by manipulating an electrical angle for OPP generation. As a result, the inverter gating signals may be adjusted in real-time based on the given deadtime, turn on and off time delay between control signals and power switches. These embodiments of the present inventive concept reduce, or possibly minimize, the current total harmonic distortion (THD) increase, voltage magnitude and angle errors caused by deadtime as will be discussed further below.

[0043] Referring now to Figs.1A and 1B, diagrams illustrating online versus offline modulation pulse width modulation (PWM), respectively, will be discussed. PWM is a controlAttorney Docket: 170087-00991WO PCT technique that converts digital signals from devices like microcontrollers into analog signals. It does this by changing the timing of how long the signal stays on and off, which is represented by variable-width pulses. The ratio of how long the signal stays on compared to when it turns off is called the "duty cycle."

[0044] Fig.1A illustrates duty ratios for online PWM, which is the prevalent modulator used in electric drives due currently. Fig.1B illustrates duty ratios and pulse patterns for offline PWM. Embodiments of the present inventive concept provide various methods for optimizing offline PWM for use with dynamic devices as will be discussed herein.

[0045] In Figs.1A and 1B, the lower waveforms A and B illustrate gate pulses that are sent to a low power circuit of an inverter. These gate pulses control a main power circuit of the inverter which ultimately controls the main power circuit of the inverter that feeds the motor load or any other load that may be present. These gate pulses A and B get amplified by the inverter and that amplified high frequency pulsating voltage gets applied to the load, for example, a motor load. It will be understood that although embodiments of the present inventive concept are directed to motor loads, embodiments of the present inventive concept are not limited thereto.

[0046] As illustrated, Figs.1A and 1B illustrate a duty ratios and pulse patterns associated with online and offline PWM. As shown, online PWM exhibits an average switching cycle period, is capable of generating arbitrary low frequency waveforms, works well with dynamic or steady state with high enough switching frequency and the pulses may be calculated in real time. However, online PWM generally requires sufficiently high switching frequency versus output frequency for low output current total harmonic distortion (THD).

[0047] Offline PWM, on the other hand, exhibits an average output frequency period, is optimized for generating sinusoidal voltages (output frequency averaged), performs good with steady-state and pulses are pre-calculated offline and then used with LUTs in control algorithm. Offline PWM can produce low THD with low switching frequency.

[0048] Thus, Offline PWM may be optimized for the best possible THD for a given inverter motor system. Using Offline PWM may provide a reduction of switching frequency by a factor of 2-3 for a same output current THD. This is a significant reduction for silicon inverters and may be significant for some silicon carbide inverters depending on the particular design. The advantages of Offline PWM are illustrated, for example, in Figs.2-4B.Attorney Docket: 170087-00991WO PCT

[0049] In particular, Figs.2-4B are diagrams illustrating the advantage of an offline modulator in accordance with embodiments discussed herein. Referring first to Fig.2, a graph illustrating online versus offline PWM THD versus switching frequency (fo= 800 Hz) will be discussed. Line 1 corresponds to space vector modulation (SVM)(online), Line 2 corresponds to selective harmonic minimization (SHM) D#1 (offline 1) and Line 3 corresponds to SHM D#2 (offline 2).

[0050] The goal of embodiments discussed herein is to produce less harmonics in the output current of the inverter. Harmonics generally increase losses in the inverter and load. The fundamental frequency (FF) on the x-axis in Fig.2 illustrates when the FF increases to a point where online PWM (1) becomes less effective than the offline PWM 1 (2) and Offline PWM-2(3). Thus, there is a point where offline PWM becomes more advantages than online PWM in some applications.

[0051] Fig.3 is a diagram illustrating online versus offline PWM harmonic trajectory (fsw=200Hz, f1=33Hz). Figs.4A and 4B are graphs illustrating online versus offline PWM currents and voltage at a given switching frequency (fs=200Hz, fo=33Hz).

[0052] In both Figs.4A and 4B, the lower wave form is the amplified wave form discussed above that feeds the low power circuit. These waveforms are used to generate the upper waveforms in Figs.4A and 4B which generate the output current. As seen in Figs.4A and 4B, the upper waveform in Fig.4A (online PWM) has a lot more oscillation than the upper waveform in Fig.4B (offline PWM). Both methods generate a same number of pulses in a given period, i.e. the same number of transitions from 0-1 and 1-0. However, the offline PWM results shown in the upper waveform of Fig.4B is a cleaner current and, therefore, has a lower THD. Thus, with a same switching frequency, a clean output current can be generated with the offline PWM, which is an advantage.

[0053] Referring now to Fig.5, a process flow for utilizing offline PWM in accordance with some embodiments of the present inventive concept will be discussed. As shown, the process begins at block 500 by defining optimization criteria, for example, current THD, torque ripple, harmonic elimination and the like. Thus, the target criteria are optimized to generate a very clean current.

[0054] Once the optimization criteria are defined, switching angles may be generated (block 510). The switching angles define when the voltage waveform will switch from 0-1 and 1-0 forAttorney Docket: 170087-00991WO PCT the entire amplitude of AC voltage defining the operating conditions of the device, for example, the inverter. Once the angles have been generated (block 510), a lookup table (LUT) may be created (block 520). The LUTs may be used with a pulse pattern modifier block in closed loop control (block 530). Thus, knowing how much amplitude is wanted, the correct switching angles can be located on the LUTs so the correct shape of the square wave of the voltage waveform can be produced. The LUT may be stored in a memory associated with the system. It will be further understood that some embodiments may store the switching angles in a format other than a LUT and thus embodiments discussed herein are not limited thereto.

[0055] Thus, embodiments of the present inventive concept provide adjustments to offline PWM so that it works efficiently in a dynamic environment. As discussed above, the use of offline PWM in accordance with embodiments of the present inventive concept presents various challenges. As discussed above, offline PWM is optimized for steady state sinusoidal waveforms. Thus, dynamic operation, i.e., change in modulation index and pulse count, may cause a jump from one pattern to another pattern. This jump creates a “dynamic error” that can subside naturally if given a long enough time period, which is dependent on a time constant of the motor. Thus, a pulse pattern modification is needed to account for these dynamic errors during dynamics for reliable, fast performance. Accordingly, a fast-performing processor is needed for complex computations.

[0056] Fig.6 is a graph illustrating the “dynamic error” (2) that occurs when using offline PWM with dynamic operations. The error is shown in the jump from (1) to (2) is caused by the dynamic operations. Steady state is not achieved when you are jumping, so the jump is managed, by, for example, model free pulse predictive control discussed herein.

[0057] Figs.7 and 8 are graphs illustrating space vector modulation (SVM)(online) versus synchronous optimal pulse width modulation (SOPWM) and a hybrid scheme in accordance with embodiments of the present inventive concept. In particular, referring to Fig.7, a comparison of current THD results of SVM and SOPWM are shown. The figure plots current THD (percentage) versus switching and fundamental frequency ratio [Fsw / F1]. Both SOPWMs provided better current THD performance than SVM at higher modulation indices. However, SOPWM has poor performance at lower modulation index values.

[0058] As illustrated in Fig.8, the switching frequency (2) of hybrid switching scheme, a conventional asynchronous space vector modulation used at lower speeds, thereby the switchingAttorney Docket: 170087-00991WO PCT frequency remains constant for some fundamental frequencies by then switches to OPP at higher speed to maintain the current harmonics low. As the switching frequency of the OPP is synchronized with the fundamental frequency the changes in number of commutations (N7, N6, N5, N4, N3) necessary to maintain the switching frequency under desired range. The lower curve (1) illustrates the ratio of switching frequency to fundamental frequency.

[0059] Accordingly, embodiments of the present inventive concept provide a hybrid PWM scheme to achieve satisfactory current THD performance in all speed ranges, as shown in Fig.8.

[0060] Fig.8 plots the switching frequency (Fsw) (kHz) versus mechanical speed, wm (RPM) versus fundamental frequency (F1) (Hz).

[0061] Figs.9A through 9E are the diagrams illustrating an example MFP3C model used in a control system, for example, an inverter control system, in accordance with some embodiments of the present inventive concept. Figs.9B through 9E provide details of different portions of the control architecture in Fig.9A. Figs.9B through 9D are referenced in the blocks of Fig.9A. As illustrated, the model for use in a control includes a current controller 905, a modulation index and voltage angle 915, an OPP with hysteresis 925 (Fig.9D), an inverter and permanent magnet synchronous motor (PMSM) 935, a phase-locked loop (PLL) 945 (Fig.9C), a proposed current observer 955 (Fig.9B), a stator flux observer 965, a prediction mechanism 975 and a stator flux reference 985. Thus, the model illustrated in Figs.9A through 9E is parameter independent in contrast to conventional MP3C. Models according to embodiments discussed herein have faster transient performance compared to conventional current tracking methods and less steady-state error compared to conventional model predictive pulse pattern control. Thus, models discussed herein are suitable for PMSM applications. The results from the MFP3C are shown in Figs.10A through 10D.

[0062] PMSMs are a type of brushless electric motor with a permanent magnet rotor and wound stators. PMSMs are used in many applications, including industrial robots, machine tools, fans, blowers, and pumps. They are known for their many advantages, including high efficiency; high power density; high torque / inertia ratio; low noise; smooth rotation; full torque control at zero speed; fast acceleration and deceleration; relatively simple mechanical construction; and rugged composition.

[0063] Some embodiments of the present inventive concept provide a hysteresis-based offline PWM. These embodiments provide a reduced modulation index noise and referenceAttorney Docket: 170087-00991WO PCT voltage angle impact, eliminate abrupt changes and unwanted pulses (no transient at steady- state), relatively simple, can be combined with MFP3C discussed above and reduces, or possibly, minimizes, current THD compared to other SOPWM methods with discontinuous switching angles. Figs.11A through 11D are diagrams illustrating results associated with the hysteresis SOPWM with continuous switching method in accordance with some embodiments of the present inventive concept.

[0064] Some embodiments of the present inventive concept provide an enhancement to any of the methods discussed herein. These embodiments of the present inventive concept compensate for the deadtime effect for synchronous optimal pulse-width modulation based two- level voltage source inverters by manipulating the electrical angle for optimal pulse pattern generation. As result, the inverter gating signals are adjusted in real-time based on the given deadtime, turn on and off time delay between control signals and power switches. Utilizing dead time compensation reduced the current total harmonic distortion increase, voltage magnitude and angle errors caused by deadtime.

[0065] Regardless of which pulse-width modulation technique used, the voltage source inverters (VSIs) are generally required to have a certain amount of off-time (referred to as “deadtime”) for both the upper and lower switches during the switching to reduce the likelihood of, or possibly prevent, short circuiting the direct current (DC)-link voltage supply. The deadtime is typically achieved by adding a small delay before turning on the switches. Although the deadtime may be small, this small amount of deadtime can degrade the performance of VSIs significantly.

[0066] For example, deadtime may introduce the following problems in the system: reduced output voltage magnitude; output voltage phase shift; and increased current THD. The effect of deadtime in VSIs has been reduced using various kind methods. However, the majority of deadtime compensation methods focus only on the carrier-based pulse-width modulation (CBPWM) technique. On the other hand, there is no available deadtime compensation method for the SOPWM technique. Accordingly, some embodiments of the present inventive concept provide a new deadtime compensation method for the SOPWM, which addresses the problems with current deadtime solutions.

[0067] In SOPWM, the gating signals, which are often referred to as OPPs, are generated by comparing a pre-calculated optimal switching angles (OSA) to an electrical angle as shown inAttorney Docket: 170087-00991WO PCT Figs.12 and 13, respectively. The output voltage waveform of VSIs should be as close as possible to the OPP to avoid degrading the performance of SOPWM. However, the output voltage waveform differs from the OPP due to introduced deadtime and turn on and turn off delays between the control signal and power switches. Some embodiments of the present inventive concept all but eliminate the error between the inverter output voltage waveform and the OPP. In Figs.12 and 13, ^^௫denotes the pre-calculated optimal switching angles and N is the number of the optimal switching angles a in a quarter of one electric period.

[0068] Embodiments of the present inventive concept compensate for the deadtime effect in VSI, which generates the output voltage waveform by using SOPWM, by manipulating the electrical angle (θ) in real-time as shown in Fig.15C.

[0069] Fig 14 is a block diagram illustrating a deadtime compensation method for a single phase of the three-phase inverter in accordance with some embodiments of the present inventive concept. It will be understood that Fig.14 is provided for example only and embodiments of the present inventive concept are not limited thereto.

[0070] Figs. 15A through 15C illustrate a current path depending on current polarity during deadtime (A), ideal output voltage ^^^∗^ , upper switch input signal gs+, lower switch input signal gs- , and actual output voltage signal without deadtime compensation (B), and ideal output voltage ^^^∗^ , upper switch input signal gs+, lower switch input signal gs-, and actual output voltage signal with deadtime compensation (C).

[0071] As illustrated, the electrical angle θ is manipulated according to the equations (1)-(10) discussed below based on the switching state ^^^^and the current polarity. The manipulated electrical angle results: ^^^ ൌ ^^ ^ ∆^^ (Eq. 1)where Δα is the angle error due to the deadtime effect. The inverter output voltage floats during deadtime and, depending on the current polarity, the freewheeling diodes ensure continuity of current as shown in Fig.15A. Therefore, the inverter output voltage waveform angle error, due to the deadtime, is different depending on current polarity and switching states as illustrated in Fig.15B. The inverter output voltage waveform angle error with respect to OPP is presented below under all possible conditions (2)-(5):

[0072] Condition 1: ^^^^= 0 and ^^^> 0:Attorney Docket: 170087-00991WO PCT ∆^^ ൌ ^^்ௗ ^ ^^்^^ (Eq. 2)

[0073] Condition 2: ^^^^= 1 and ^^^> 0: ∆^^ ൌ ^^்^^^ (Eq. 3)

[0074] Condition 3: ^^^^= 0 and ^^^< 0: ∆^^ ൌ ^^்^^ (Eq. 4)

[0075] Condition 4: ^^^^= 1 and ^^^< 0: ∆^^ ൌ ^^்ௗ ^ ^^்^^^ (Eq. 5)^^^^can be calculated by adding the ^^ௗ, ^^^^, ^^^^^delays on the PWMA signal, as shown in figure 3, based on switching state and current polarity or ^^^^can be obtained simply by assuming ^^^^ൌ ^^^∗^ . ^^^∗^ is the original OPP. The deadtime duration converted to electrical angle is: ^^ௗ(Eq.6) ^^்ௗൌ ^^ௗ^^

[0077] The turn-on delay between control signal and power switch converted to electrical angle is: ^^^^(Eq.7) ^^்^^ൌ ^^ௗ^^

[0078] The turn-off delay between control signal and power switch converted to electrical angle is: ^^^^(Eq.8) ^^ ൌ^்^^^^^ௗ^^

[0079] The time duration for electrical angle to increase by one degree is: ^^^(Eq.9) ^^ௗ^^ൌ 360

[0080] The time duration for one electrical cycle is: 1 (Eq.10) ^^^ൌ ^^^where ^^ௗ, ^^^^, ^^^^^, ^^^represent deadtime, turn-on delay between control signal and power switch, turn-off delay between control signal and power switch, fundamental frequency, respectively.Attorney Docket: 170087-00991WO PCT

[0081] As shown in Fig.15C, the output voltage waveform error with respect to original OPP was eliminated by adding the voltage waveform angle error ∆^^ to the electrical angle. The voltage waveform error can be calculated accurately without a sensor as long as the accurate of information of ^^ௗ, ^^^^, ^^^^^is available. The current polarity can be obtained by using the current sensor and low pass filter.

[0082] Referring now to Fig.16, a flowchart illustrating operations for controlling an electric motor using an inverter and optimal pulse patterns (OPPs) in accordance with some embodiments of the present inventive concept will be discussed. As illustrated in Fig.16, operations begin at block 1600 by pre-generating a plurality of optimal switching angles corresponding to voltage waveforms for a range of modulation indices. As discussed above, for example, with respect to Fig.5, optimized switching angles are generated and stored in a look up table (block 1610). As discussed above, the switching angles are not limited to being stored in a look up table. Thus, the pre-generated optimal switching angles are stored in some format, somewhere in the system (block 1610). A voltage command is generated using, for example, a model-free predictive controller, based on a flux error signal of the electric motor (block 1620). Optimal switching angles are selected from stored pre-generated optimal switching angles based on the voltage command (block 1630). The selected optimal switching angles are modified using a pulse pattern modifier to compensate for dynamic changes in motor operating conditions (block 1640). The gating signals for the inverter are generated based on the modified switching angles to drive the electric motor (block 1650). Although embodiments are discussed herein for controlling an electric motor using an inverter and optimal pulse patterns (OPPs), it will be understood that embodiments are not limited thereto. The methods discussed herein may be used in any application suitable without departing from the scope of the present inventive concept.

[0083] In some embodiments, the model-free predictive controller comprises a proportional- integral (PI) controller. Operations may further include estimating, by a current observer and a phase-locked loop (PLL), stator current and electrical angle for generating the voltage command. Hysteresis control may be applied to introduce hysteresis bands around the switching angles to suppress switching activity due to noise in the voltage command. The pulse pattern modifier may modify the switching angles to minimize abrupt transitions between subsets of optimal switching angles when a modulation index changes. The gating signals may be synchronized with a fundamental electrical frequency of the motor.Attorney Docket: 170087-00991WO PCT

[0084] In some embodiments, a polarity of motor current may be determined using a current sensor. An angle error may be calculated based on deadtime, turn-on delay, and / or turn-off delay of inverter switches. The electrical angle used for selecting the optimal switching angles may be adjusted to compensate for the deadtime. In some embodiments, Δα is the angle error and the angle error is determined as follows: ^^^^ௗ ^ ^^^^^^, ^^^^ ^^ ൌ 0 ^^^^^^ ^^ ^ 0ì^^^^ ^^^^^^^^^, ^^^^ ^^^^ ൌ 1 ^^^^^^ ^^ ^ 0∆^^ ൌ ^^ ^^í^^^^^^, ^^^^ ^^^^^^ ൌ 0 ^^^^^^ ^^^^ ^ 0î^^^^ௗ ^ ^^^^^^^, ^^^^ ^^^^^^ ൌ 1 ^^^^^^ ^^^^ ^ 0.

[0085] In some embodiments, the inverter is a two-level voltage source inverter (VSI) and the motor is a permanent magnet synchronous motor (PMSM). Some embodiments dynamically switch between online space vector modulation (SVM) at low speeds and OPP-based modulation at higher speeds to maintain optimal current total harmonic distortion (THD).

[0086] Referring now to Fig.17, an example of a data processing system 1730 suitable for use with any of the examples described above. Although the example data processing system 1730 is shown as in communication with the controller 1795 in accordance with embodiments of the present inventive concept, the data processing system 1730 may also be part any other component of the system without departing from the scope of the present inventive concept. In some examples, the data processing system 1730 can be any suitable computing device for performing operations according to the embodiments discussed herein.

[0087] As illustrated, the data processing system 1730 includes a processor 1748 communicatively coupled to I / O components 1746, a user interface 1744 and a memory 1736. The processor 1748 can include one or more commercially available processors, embedded processors, secure processors, microprocessors, dual microprocessors, multi-core processors, other multi-processor architectures, another suitable processing device, or any combination of these. The memory 1736, which can be any suitable tangible (and non-transitory) computer- readable medium such as random access memory (RAM), read-only memory (ROM), erasable and electronically programmable read-only memory (EEPROMs), or the like, embodies program components that configure operation of the data processing system 1730.

[0088] I / O components 1746 may be used to facilitate wired or wireless connections to devices such as one or more displays, game controllers, keyboards, mice, joysticks, cameras, buttons, speakers, microphones and / or other hardware used to input or output data. MemoryAttorney Docket: 170087-00991WO PCT 1036 represents nonvolatile storages such as magnetic, optical, or other storage media included in the data processing system and / or coupled to processor 1748.

[0089] The user interface 1744 may include, for example, a keyboard, keypad, touchpad, voice activation circuit, display or the like and the processor 1748 may execute program code or instructions stored in memory 1736.

[0090] It should be appreciated that data processing system 1730 may also include additional processors, additional storage, and a computer-readable medium (not shown). The processor(s) 1748 may execute additional computer-executable program instructions stored in memory 1736. Such processors may include a microprocessor, digital signal processor, application-specific integrated circuit, field programmable gate arrays, programmable interrupt controllers, programmable logic devices, programmable read-only memories, electronically programmable read-only memories, or other similar devices.

[0091] The aforementioned flow logic and / or methods show the functionality and operation of various services and applications described herein. If embodied in software, each block may represent a module, segment, or portion of code that includes program instructions to implement the specified logical function(s). The program instructions may be embodied in the form of source code that includes human-readable statements written in a programming language or machine code that includes numerical instructions recognizable by a suitable execution system such as a processor in a computer system or other system. The machine code may be converted from the source code, etc. Other suitable types of code include compiled code, interpreted code, executable code, static code, dynamic code, object-oriented code, visual code, and the like. The examples are not limited in this context.

[0092] If embodied in hardware, each block may represent a circuit or a number of interconnected circuits to implement the specified logical function(s). A circuit can include any of various commercially available processors, including without limitation an AMD® Athlon®, Duron® and Opteron® processors; ARM® application, embedded and secure processors; IBM® and Motorola® DragonBall® and PowerPC® processors; IBM and Sony® Cell processors; Qualcomm® Snapdragon®; Intel® Celeron®, Core (2) Duo®, Core i3, Core i5, Core i7, Itanium®, Pentium®, Xeon®, Atom® and XScale® processors; and similar processors. Other types of multi-core processors and other multi-processor architectures may also be employed as part of the circuitry. According to some examples, circuitry may also include an applicationAttorney Docket: 170087-00991WO PCT specific integrated circuit (ASIC) or a field programmable gate array (FPGA), and modules may be implemented as hardware elements of the ASIC or the FPGA. Further, embodiments may be provided in the form of a chip, chipset or package.

[0093] Although the aforementioned flow logic and / or methods each show a specific order of execution, it is understood that the order of execution may differ from that which is depicted. Also, operations shown in succession in the flowcharts may be able to be executed concurrently or with partial concurrence. Further, in some embodiments, one or more of the operations may be skipped or omitted. In addition, any number of counters, state variables, warning semaphores, or messages might be added to the logical flows or methods described herein, for purposes of enhanced utility, accounting, performance measurement, or providing troubleshooting aids, etc. It is understood that all such variations are within the scope of the present disclosure. Moreover, not all operations illustrated in a flow logic or method may be required for a novel implementation.

[0094] Where any operation or component discussed herein is implemented in the form of software, any one of a number of programming languages may be employed such as, for example, C, C++, C#, Objective C, Java, Javascript, Perl, PHP, Visual Basic, Python, Ruby, Delphi, Flash, or other programming languages. Software components are stored in a memory and are executable by a processor. In this respect, the term “executable” means a program file that is in a form that can ultimately be run by a processor. Examples of executable programs may be, for example, a compiled program that can be translated into machine code in a format that can be loaded into a random access portion of a memory and run by a processor, source code that may be expressed in proper format such as object code that is capable of being loaded into a random access portion of a memory and executed by a processor, or source code that may be interpreted by another executable program to generate instructions in a random access portion of a memory to be executed by a processor, etc. An executable program may be stored in any portion or component of a memory. In the context of the present disclosure, a “computer- readable medium” can be any medium (e.g., memory) that can contain, store, or maintain the logic or application described herein for use by or in connection with the instruction execution system.

[0095] A memory is defined herein as an article of manufacture and including volatile and / or non-volatile memory, removable and / or non-removable memory, erasable and / or non-erasableAttorney Docket: 170087-00991WO PCT memory, writeable and / or re-writeable memory, and so forth. Volatile components are those that do not retain data values upon loss of power. Nonvolatile components are those that retain data upon a loss of power. Thus, a memory may include, for example, random access memory (RAM), read-only memory (ROM), hard disk drives, solid-state drives, USB flash drives, memory cards accessed via a memory card reader, floppy disks accessed via an associated floppy disk drive, optical discs accessed via an optical disc drive, magnetic tapes accessed via an appropriate tape drive, and / or other memory components, or a combination of any two or more of these memory components. In addition, the RAM may include, for example, static random access memory (SRAM), dynamic random access memory (DRAM), or magnetic random access memory (MRAM) and other such devices. The ROM may include, for example, a programmable read-only memory (PROM), an erasable programmable read-only memory (EPROM), an electrically erasable programmable read-only memory (EEPROM), or other like memory device.

[0096] The devices described herein may include multiple processors and multiple memories that operate in parallel processing circuits, respectively. In such a case, a local interface, such as a communication bus, may facilitate communication between any two of the multiple processors, between any processor and any of the memories, or between any two of the memories, etc. A local interface may include additional systems designed to coordinate this communication, including, for example, performing load balancing. A processor may be of electrical or of some other available construction.

[0097] It should be emphasized that the above-described embodiments of the present disclosure are merely possible examples of implementations set forth for a clear understanding of the principles of the disclosure. It is, of course, not possible to describe every conceivable combination of components and / or methodologies, but one of ordinary skill in the art may recognize that many further combinations and permutations are possible. That is, many variations and modifications may be made to the above-described embodiment(s) without departing substantially from the spirit and principles of the disclosure. All such modifications and variations are intended to be included herein within the scope of this disclosure and protected by the following claims.

Claims

Attorney Docket: 170087-00991WO PCT WHAT IS CLAIMED IS:

1. A method for controlling an electric motor using an inverter and optimal pulse patterns (OPPs), the method comprising: pre-generating a plurality of optimal switching angles corresponding to voltage waveforms for a range of modulation indices; storing the pre-generated optimal switching angles; generating a voltage command using a model-free predictive controller based on a flux error signal of the electric motor; selecting optimal switching angles from stored pre-generated optimal switching angles based on the voltage command; modifying the selected optimal switching angles using a pulse pattern modifier to compensate for dynamic changes in motor operating conditions; and generating gating signals for the inverter based on the modified switching angles to drive the electric motor.

2. The method of Claim 1, wherein storing further comprises storing the pre- generated optimal switching angles in a lookup table.

3. The method of Claim 2, wherein the model-free predictive controller comprises a proportional-integral (PI) controller.

4. The method of Claim 2, further comprising estimating, by a current observer and a phase-locked loop (PLL), stator current and electrical angle for generating the voltage command.

5. The method of Claim 2, further comprising applying hysteresis control to introduce hysteresis bands around the switching angles to suppress switching activity due to noise in the voltage command.Attorney Docket: 170087-00991WO PCT 6. The method of Claim 2, further comprising modifying, by the pulse pattern modifier, the switching angles to minimize abrupt transitions between subsets of optimal switching angles when a modulation index changes.

7. The method of Claim 2, further comprising synchronizing the gating signals with a fundamental electrical frequency of the motor.

8. The method of Claim 2, further comprising: determining a polarity of motor current using a current sensor; calculating an angle error based on deadtime, turn-on delay, and / or turn-off delay of inverter switches; and adjusting an electrical angle used for selecting the optimal switching angles to compensate for the deadtime.

9. The method of Claim 8, where Δα is the angle error and the angle error is determined as follows: ^^^^ௗ ^ ^^^^^^, ^^^^ ^^^^ ൌ 0 ^^^^^^ ^^ ^ 0ì^^ ^^^^^^ ^^^^^^ 1 ^^^^^^ ^^^^ ^ 000.

10. The voltage source inverter (VSI) and the motor is a permanent magnet synchronous motor (PMSM).

11. The method of Claim 2, further comprising dynamically switching between online space vector modulation (SVM) at low speeds and OPP-based modulation at higher speeds to maintain optimal current total harmonic distortion (THD).

12. An inverter control system for fast dynamic control of an electric motor using optimal pulse patterns (OPPs), the system comprising: a controller configured to generate a voltage command using a model-free predictive controller based on a flux error signal of the motor;Attorney Docket: 170087-00991WO PCT a memory for storing optimal switching angles for various modulation indices; a pulse pattern modifier that selects and adjusts optimal switching angles based on the voltage command; an OPP generator that produces gating signals based on the modified switching angles; and a deadtime compensator that adjusts an electrical angle in real time based on deadtime, turn-on delay, turn-off delay, and / or motor current polarity.

13. The inverter control system of Claim 12, wherein the memory stores the optimal switching angles in a look up table.

14. The inverter control system of Claim 12, wherein the controller comprises a proportional-integral (PI) controller.

15. The inverter control system of Claim 12, further comprising a phase-locked loop (PLL) and current observer configured to estimate stator flux and electrical angle of the motor.

16. The inverter control system of Claim 12, wherein the pulse pattern modifier applies hysteresis-based adjustment to the optimal switching angles to reduce switching noise due to voltage command angle fluctuation.

17. The inverter control system of Claim 12, wherein the deadtime compensator calculates an angle correction (Δα) based on current polarity and switching state of the inverter and adjusts the gating signals accordingly.

18. The inverter control system of Claim 12, wherein the controller dynamically switches between space vector modulation (SVM) and OPP-based modulation based on motor speed or frequency.

19. A system for dynamically controlling an electric motor using optimal pulse patterns (OPPs), comprising:Attorney Docket: 170087-00991WO PCT means for generating a voltage command based on motor flux error; means for retrieving optimal switching angles from a lookup table; means for modifying the switching angles based on the voltage command; means for compensating for deadtime by adjusting an electrical angle according to current polarity and switching delay; and means for generating gating signals for an inverter based on the modified and compensated switching angles.

20. The system of Claim 19: wherein the means for generating a voltage command includes a proportional-integral (PI) controller and current observer; and wherein the means for modifying the switching angles comprises a hysteresis-based pulse pattern modification logic.

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