Pixel circuit system, driving method for pixel circuit system, and display device

Abstract

The present disclosure relates to a pixel circuit system, a driving method for a pixel circuit system, and a display device. The pixel circuit system comprises: a video processing module, used for generating a pixel circuit driving signal on the basis of video source data; a pixel circuit module, connected to the video processing module, and used for separating a high-bit signal and a low-bit signal in the pixel circuit driving signal, and respectively performing digital-to-analog conversion on the high-bit signal and the low-bit signal to obtain a high-bit voltage value and a low-bit voltage value; respectively comparing the high-bit voltage value and the low-bit voltage value with corresponding ramp voltage data on the basis of a high-bit clock frequency and a low-bit clock frequency, and outputting a high-bit pulse width modulation signal corresponding to the high-bit voltage value and a low-bit pulse width modulation signal corresponding to the low-bit voltage value. The described pixel circuit system can reduce the loss of display grayscale accuracy without increasing the design area and power consumption of an original pixel circuit system.

Description

Pixel circuit system, driving method of pixel circuit system and display device

[0001] Related applications

[0002] This disclosure claims priority to Chinese patent application filed on August 15, 2024, application number 2024111172166, entitled "Pixel Circuit System, Driving Method for Pixel Circuit System and Display Device", the entire contents of which are incorporated herein by reference. Technical Field

[0003] This disclosure relates to the field of displays, and in particular to a pixel circuit system, a driving method for the pixel circuit system, and a display device. Background Technology

[0004] A pixel circuit system is an integrated system composed of multiple pixel circuits. The pixel circuit system works in conjunction with the display device to process and display images. Each pixel circuit controls the brightness and color of a single display pixel. With the development of display technology, the design of pixel circuit systems is constantly being improved to achieve higher resolution, lower power consumption, and better display effects. However, the size and precision of the pixel circuits limit the display's grayscale accuracy.

[0005] Traditionally, the problem of grayscale accuracy loss due to limitations in pixel circuit size and precision is addressed by increasing the pixel circuit size and improving the accuracy of the digital-to-analog conversion module. However, this traditional approach increases the overall design area of ​​the pixel circuit system, raises power consumption, and complicates implementation. Summary of the Invention

[0006] Therefore, it is necessary to address the above-mentioned technical problems by providing a pixel circuit system, a driving method for the pixel circuit system, and a display device that can reduce the loss of grayscale accuracy without increasing the original pixel circuit system design area and power consumption.

[0007] In a first aspect, this disclosure provides a pixel circuit system, comprising: a video processing module for generating a pixel circuit driving signal based on video source data; and a pixel circuit module connected to the video processing module for separating a high-order signal and a low-order signal in the pixel circuit driving signal, performing digital-to-analog conversion on the high-order signal and the low-order signal respectively to obtain a high-order voltage value and a low-order voltage value; and comparing the high-order voltage value and the low-order voltage value with corresponding ramp voltage data according to the high-order clock frequency and the low-order clock frequency respectively, and outputting a high-order pulse width modulation signal corresponding to the high-order voltage value and a low-order pulse width modulation signal corresponding to the low-order voltage value.

[0008] In one embodiment, the video processing module is further configured to perform gamma correction on the pixel circuit driving signal to generate a continuous grayscale signal that conforms to human vision; the pixel circuit module includes a digital-to-analog conversion unit, which is configured to separate the high-order signal and the low-order signal in the continuous grayscale signal, and perform digital-to-analog conversion on the high-order signal and the low-order signal respectively to obtain a high-order voltage value and a low-order voltage value.

[0009] In one embodiment, the pixel circuit module includes: a color separation module, configured to perform color separation processing on the pixel circuit driving signal to obtain multiple sub-circuit driving signals corresponding to the pixel circuit driving signal; separate the high-order signal and low-order signal in each sub-circuit driving signal; and perform digital-to-analog conversion on the high-order signal and low-order signal in each sub-circuit driving signal to obtain the high-order voltage value and low-order voltage value corresponding to each sub-circuit driving signal.

[0010] In one embodiment, the pixel circuit module includes a pixel circuit, which includes a high-order storage capacitor, a low-order storage capacitor, and a comparator. The pixel circuit is used to charge the corresponding high-order storage capacitor according to the high-order voltage value of each sub-circuit drive signal, and to charge the corresponding low-order storage capacitor according to the low-order voltage value corresponding to each sub-circuit drive signal. The high-order storage capacitor and the low-order storage capacitor of the pixel circuit are time-divisionally turned on with the comparator so that the high-order voltage value and the low-order voltage value corresponding to each sub-circuit drive signal are time-divisionally input to the comparator. The comparator is used to compare the high-order voltage value with the corresponding high-order ramp voltage data according to the high-order clock frequency, and to compare the low-order voltage value with the corresponding low-order ramp voltage data according to the low-order clock frequency.

[0011] In one embodiment, the pixel circuit is further configured to time-division multiplex the high-order storage capacitor and the low-order storage capacitor of the pixel circuit to the first input terminal of the comparator, so as to time-division multiplex the high-order voltage value and the low-order voltage value corresponding to the driving signal of each sub-circuit to the first input terminal of the comparator; the comparator is further configured to compare the high-order voltage value with the high-order ramp voltage data of the second input terminal of the comparator according to the high-order clock frequency, and to compare the low-order voltage value with the low-order ramp voltage data of the second input terminal of the comparator according to the low-order clock frequency.

[0012] In one embodiment, the pixel circuit module further includes: a power management unit, configured to provide the comparator of the pixel circuit with high-order ramp voltage data corresponding to the high-order voltage value and low-order ramp voltage data corresponding to the low-order voltage value; a comparator, configured to compare the high-order voltage value with the corresponding high-order ramp voltage data according to the high-order clock frequency, and output a first value of high-order pulse width modulation signal when the high-order voltage value is less than the high-order ramp voltage data, and output a second value of high-order pulse width modulation signal when the high-order voltage value is greater than or equal to the high-order ramp voltage data; the comparator is also configured to compare the low-order voltage value with the corresponding low-order ramp voltage data according to the low-order clock frequency, and output a first value of low-order pulse width modulation signal when the low-order voltage value is less than the low-order ramp voltage data, and output a second value of low-order pulse width modulation signal when the low-order voltage value is greater than or equal to the low-order ramp voltage data.

[0013] In one embodiment, the pixel circuit module further includes: a clock management unit for providing a high-order clock frequency and a low-order clock frequency to the comparator of the pixel circuit; and a power management unit for generating high-order ramp voltage data corresponding to the high-order voltage value according to the high-order clock frequency, and generating low-order ramp voltage data corresponding to the low-order voltage value according to the low-order clock frequency, and inputting the high-order ramp voltage data and the low-order ramp voltage data to the comparator of the pixel circuit; wherein the slope of the high-order ramp voltage data matches the high-order clock frequency, and the slope of the low-order ramp voltage data matches the low-order clock frequency.

[0014] In one embodiment, the pixel circuit module is further configured to, when outputting the high-order pulse width modulation signal corresponding to the high-order voltage value and the low-order pulse width modulation signal corresponding to the low-order voltage value, adopt any of the following methods: outputting the high-order pulse width modulation signal first, and then outputting the low-order pulse width modulation signal; outputting the low-order pulse width modulation signal first, and then outputting the high-order pulse width modulation signal; or alternately outputting the high-order pulse width modulation signal and the low-order pulse width modulation signal.

[0015] Secondly, this disclosure also provides a driving method for a pixel circuit system, used to drive the pixel circuit system described in any of the above embodiments, comprising: generating a pixel circuit driving signal based on video source data; separating a high-order signal and a low-order signal in the pixel circuit driving signal, performing digital-to-analog conversion on the high-order signal and the low-order signal respectively to obtain a high-order voltage value and a low-order voltage value; comparing the high-order voltage value and the low-order voltage value with corresponding ramp voltage data according to the high-order clock frequency and the low-order clock frequency respectively, and outputting a high-order pulse width modulation signal corresponding to the high-order voltage value and a low-order pulse width modulation signal corresponding to the low-order voltage value.

[0016] Thirdly, this disclosure also provides a display device including the pixel circuit system described in any of the above embodiments.

[0017] The aforementioned pixel circuit system, its driving method, and display device, wherein the pixel circuit module in the pixel circuit system divides the pixel circuit driving signal into high-order signals and low-order signals, and converts these signals into high-order voltage values ​​and low-order voltage values, respectively. Then, at different clock frequencies, the high-order and low-order voltage values ​​are compared with corresponding ramp voltage data, and corresponding pulse width modulation (PWM) signals are output. By generating PWM signals corresponding to the high-order and low-order voltage values ​​at different clock frequencies, and by using PWM signals with different precision values ​​for the high-order and low-order voltage values, more signal bits can be retained. This reduces grayscale accuracy loss (grayscale loss) without increasing the original pixel circuit system design area and power consumption, improves the display grayscale levels, increases display resolution, and makes the displayed colors more realistic and the image more delicate. Attached Figure Description

[0018] To more clearly illustrate the technical solutions in the embodiments or conventional technologies of this disclosure, the accompanying drawings used in the description of the embodiments or conventional technologies will be briefly introduced below. Obviously, the accompanying drawings described below are only embodiments of this disclosure. For those skilled in the art, other drawings can be obtained based on the disclosed drawings without creative effort.

[0019] Figure 1 is a schematic diagram of a pixel circuit system in one embodiment;

[0020] Figure 2 is a schematic diagram of the pixel circuit system in another embodiment;

[0021] Figure 3 is a schematic diagram of the pixel circuit in one embodiment;

[0022] Figure 4 is a schematic diagram of the working principle of the pixel circuit in one embodiment;

[0023] Figure 5 shows the clock frequency diagram of the comparator in one embodiment;

[0024] Figure 6 is a block diagram of a pixel circuit system in one embodiment;

[0025] Figure 7 is a schematic diagram of the loop of four pulse width modulation signals of a pixel circuit system in one embodiment;

[0026] Figure 8 is a schematic diagram of the loss grayscale comparison between a conventional pixel circuit system and the pixel circuit system of this disclosure in one embodiment;

[0027] Figure 9 is a flowchart illustrating a driving method for a pixel circuit system in one embodiment.

[0028] Explanation of reference numerals in the attached figures: 100, video processing module; 200, pixel circuit module; 201, digital-to-analog conversion unit; 202, pixel circuit; 203, power management unit; 204, clock management unit. Detailed Implementation

[0029] The technical solutions of the embodiments of this disclosure will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this disclosure, and not all embodiments. Based on the embodiments of this disclosure, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of this disclosure.

[0030] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure belongs. The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of this disclosure.

[0031] It is understood that the terms "first," "second," etc., as used herein may be used to describe various elements, but these elements are not limited by these terms. These terms are used only to distinguish one element from another. For example, without departing from the scope of this disclosure, a first resistor may be referred to as a second resistor, and similarly, a second resistor may be referred to as a first resistor. Both the first resistor and the second resistor are resistors, but they are not the same resistor.

[0032] It is understood that the term "connection" in the following embodiments should be understood as "electrical connection," "communication connection," etc., if the connected circuits, modules, units, etc., have electrical signal or data transmission with each other.

[0033] When used herein, the singular forms of “a,” “an,” and “the” may also include the plural forms unless the context clearly indicates otherwise. It should also be understood that the terms “comprising / including” or “having,” etc., specify the presence of the stated features, wholes, steps, operations, components, parts, or combinations thereof, but do not preclude the possibility of the presence or addition of one or more other features, wholes, steps, operations, components, parts, or combinations thereof. Meanwhile, the term “and / or” as used in this specification includes any and all combinations of the associated listed items.

[0034] In an exemplary embodiment, as shown in FIG1, which is a schematic diagram of a pixel circuit system, the pixel circuit module 200 includes a video processing module 100 and a pixel circuit module 200. The video processing module 100 is used to generate a pixel circuit driving signal based on video source data. The pixel circuit module 200, connected to the video processing module 100, is used to separate the high-order signal and the low-order signal in the pixel circuit driving signal, and perform digital-to-analog conversion on the high-order signal and the low-order signal respectively to obtain a high-order voltage value and a low-order voltage value; according to the high-order clock frequency and the low-order clock frequency, the high-order voltage value and the low-order voltage value are compared with the corresponding ramp voltage data respectively, and the high-order pulse width modulation signal corresponding to the high-order voltage value and the low-order pulse width modulation signal corresponding to the low-order voltage value are output.

[0035] Video source data refers to the raw data of the video signal, containing continuous temporal sampling of each frame of the image. Video source data can be an unprocessed data stream acquired from a camera, video capture card, or other video source device. Pixel circuit drive signals refer to the control signals used to drive the pixel circuits. High-bit clock frequency and low-bit clock frequency refer to the operating clock frequency.

[0036] Specifically, the video processing module 100 acquires video source data and generates data format and control signals to drive the pixel circuit based on the video source data. The control signals are the pixel circuit drive signals. The data format for driving the pixel circuit can be determined according to actual needs. For example, the data format may include, but is not limited to, data video interface, video serial interface, high-definition multimedia interface, and digital display interface.

[0037] The pixel circuit module 200 is connected to the output of the video processing module 100 and is used to separate the high-order and low-order signals in the pixel circuit driving signals. The high-order signal refers to the signal positioned earlier in the sequence, and the low-order signal refers to the signal positioned later in the sequence. The number of bits in the high-order and low-order signals can be determined based on the number of bits that the pixel circuit module 200 can process. Neither the number of bits in the high-order nor the low-order signals can exceed the maximum number of bits that the pixel circuit module 200 can process. For example, the number of bits in the high-order and low-order signals can be the same or different. The pixel circuit module 200 is also used to perform digital-to-analog conversion on the high-order signals to obtain high-order voltage values, and to perform digital-to-analog conversion on the low-order signals to obtain low-order voltage values.

[0038] The ramp voltage data corresponding to the high-order voltage value is called high-order ramp voltage data, and the ramp voltage data corresponding to the low-order voltage value is called low-order ramp voltage data. The pixel circuit module 200 is used to compare the high-order voltage value with the corresponding high-order ramp voltage data according to the high-order clock frequency, and output the high-order pulse width modulation signal corresponding to the high-order voltage value based on the comparison result. It is also used to compare the low-order voltage value with the corresponding low-order ramp voltage data according to the low-order clock frequency, and output the low-order pulse width modulation signal corresponding to the low-order voltage value based on the comparison result. The high-order clock frequency and the low-order clock frequency are different; furthermore, the high-order clock frequency is lower than the low-order clock frequency. By setting different high-order clock frequencies and low-order clock frequencies, and processing the high-order voltage value and the low-order voltage value respectively, high-order pulse width modulation signals and low-order pulse width modulation signals with different accuracies can be generated.

[0039] In this embodiment, the pixel circuit module in the pixel circuit system divides the pixel circuit driving signal into high-order signals and low-order signals, and converts the high-order signals and low-order signals into high-order voltage values ​​and low-order voltage values, respectively. Then, at different clock frequencies, the high-order voltage values ​​and low-order voltage values ​​are compared with the corresponding ramp voltage data, and the corresponding pulse width modulation signals are output. By generating pulse width modulation signals corresponding to high-order voltage values ​​and low-order voltage values ​​at different clock frequencies, the precision of the pulse width modulation signals corresponding to high-order voltage values ​​and low-order voltage values ​​is different, which can retain more signal bits. This reduces the loss of display grayscale accuracy (grayscale loss) without increasing the original pixel circuit system design area and power consumption, improves the display grayscale level, improves the display resolution, and makes the displayed colors more realistic and the picture more delicate.

[0040] In an exemplary embodiment, the video processing module 100 is further configured to perform gamma correction on the pixel circuit driving signal to generate a continuous grayscale signal that conforms to human vision; the pixel circuit module 200 includes a digital-to-analog conversion unit, which is configured to separate the high-order signal and the low-order signal in the continuous grayscale signal, and perform digital-to-analog conversion on the high-order signal and the low-order signal respectively to obtain the high-order voltage value and the low-order voltage value.

[0041] Specifically, the video processing module 100 performs gamma correction on the pixel circuit driving signal to generate a continuous grayscale signal that conforms to human vision. For example, the gamma value for gamma correction can be 2.2. The number of bits for the high-bit and low-bit signals can be determined based on the maximum number of bits that the digital-to-analog converter (DAC) unit in the pixel circuit module 200 can process; neither the high-bit nor low-bit signal can exceed the maximum number of bits that the DAC unit can process. Therefore, the DAC unit separates the high-bit and low-bit signals in the continuous grayscale signal according to its maximum processing capacity. For example, if the data bit width (number of bits) of the gamma-corrected continuous grayscale signal is n bits, the DAC unit separates the high-bit and low-bit signals, resulting in a low-bit signal of m bits and a high-bit signal of nm bits. The DAC unit also performs digital-to-analog conversion on the high-bit and low-bit signals respectively to obtain high-bit voltage values ​​and low-bit voltage values.

[0042] In this embodiment, the video processing module performs gamma correction on the pixel circuit driving signal, which can perform non-linear transformation on the brightness of the pixel circuit driving signal, making the signal more consistent with human vision when displayed.

[0043] The digital-to-analog conversion unit separates the high-order and low-order signals in the continuous grayscale signal and performs digital-to-analog conversion. By converting the digital signal into an analog voltage, it can drive the pixel circuit system to adjust the display resolution.

[0044] In an exemplary embodiment, the pixel circuit module 200 includes: a color separation module, configured to perform color separation processing on the pixel circuit driving signal to obtain multiple sub-circuit driving signals corresponding to the pixel circuit driving signal; separate the high-order signal and low-order signal in each sub-circuit driving signal; and perform digital-to-analog conversion on the high-order signal and low-order signal in each sub-circuit driving signal to obtain the high-order voltage value and low-order voltage value corresponding to each sub-circuit driving signal.

[0045] Specifically, the pixel circuit module 200 receives RGB (Red, Green, Blue) signals as pixel circuit driving signals. The color separation module in the pixel circuit module 200 processes the three colors (red, green, blue) of the RGB signal separately, with each color corresponding to a sub-circuit driving signal. For each sub-circuit driving signal, signal processing is performed to obtain the high-order and low-order voltage values ​​corresponding to each sub-circuit driving signal, and to generate high-order and low-order pulse width modulation signals corresponding to each sub-circuit driving signal. Further, for each sub-circuit driving signal, the high-order and low-order signals are separated, and digital-to-analog conversion is performed on both signals to obtain the high-order and low-order voltage values ​​corresponding to each sub-circuit driving signal.

[0046] In this embodiment, the pixel circuit driving signal is RGB data. The data of the three colors are received simultaneously. The pixel circuit driving signal is processed by a color separation module to obtain multiple sub-circuit driving signals. The high and low bits of each sub-circuit driving signal are processed separately and converted from digital to analog, which can make the colors of the displayed image more realistic.

[0047] In an exemplary embodiment, as shown in FIG2, which is a schematic diagram of a pixel circuit system, the pixel circuit module 200 includes a pixel circuit 202, which includes a high-order storage capacitor, a low-order storage capacitor, and a comparator. The pixel circuit 202 is used to charge the corresponding high-order storage capacitor according to the high-order voltage value of each sub-circuit driving signal, and to charge the corresponding low-order storage capacitor according to the low-order voltage value corresponding to each sub-circuit driving signal. The high-order storage capacitor and the low-order storage capacitor of the pixel circuit 202 are time-divisionally turned on with the comparator so as to input the high-order voltage value and the low-order voltage value corresponding to each sub-circuit driving signal to the comparator in a time-division manner. The comparator is used to compare the high-order voltage value with the corresponding high-order ramp voltage data according to the high-order clock frequency, and to compare the low-order voltage value with the corresponding low-order ramp voltage data according to the low-order clock frequency.

[0048] Among them, the high-level storage capacitor and the low-level storage capacitor are the storage capacitors corresponding to the high-level voltage value and the low-level voltage value, respectively.

[0049] Specifically, the pixel circuit 202 in this embodiment can be of types including, but not limited to, liquid crystal, LED (Light Emitting Diode), OLED (Organic Light Emitting Diode), micro LED (micro Light Emitting Diode), and Q-LED (Quantum Dot Light Emitting Diode). Taking an LED-type pixel circuit as an example, as shown in Figure 3, which is a schematic diagram of the pixel circuit 202, the pixel circuit 202 includes multiple channels: R channel, G channel, and B channel. Each channel includes a high-order storage capacitor, a low-order storage capacitor, and a comparator for processing the corresponding sub-circuit drive signals. The signal processing method for multiple channels is the same.

[0050] Channel R receives the high-order voltage value V_high_R and the low-order voltage value V_low_R of the sub-circuit drive signal corresponding to the red area. The high-order storage capacitor C_high_R is charged according to the high-order voltage value V_high_R, and the low-order storage capacitor C_low_R is charged according to the low-order voltage value V_low_R. The high-order storage capacitor C_high_R and the low-order storage capacitor C_low_R are time-divisionally turned on with the comparator of Channel R, so that the high-order voltage value V_high_R and the low-order voltage value V_low_R of the sub-circuit drive signal corresponding to the red area are input to the comparator of Channel R in a time-division manner. The comparator in channel R compares the high-order voltage value V_high_R with the corresponding high-order ramp voltage data V_RAMP_high based on the high-order clock frequency, and outputs the high-order pulse width modulation signal PWM_high_R based on the comparison result. It also compares the low-order voltage value V_low_R with the corresponding low-order ramp voltage data V_RAMP_low based on the low-order clock frequency, and outputs the low-order pulse width modulation signal PWM_low_R based on the comparison result. The red LED is then illuminated based on the high-order and low-order pulse width modulation signals PWM_high_R and PWM_low_R.

[0051] Simultaneously, channel G receives the high-order voltage value V_high_G and low-order voltage value V_low_G of the green sub-circuit drive signal, respectively, and charges the corresponding high-order storage capacitor C_high_G and low-order storage capacitor C_low_G. The high-order storage capacitor C_high_G and low-order storage capacitor C_low_G are then time-divisionally turned on with the comparator of channel G, so that the high-order voltage value V_high_G and low-order voltage value V_low_G of the green sub-circuit drive signal are input to the comparator of channel G in a time-division manner. The comparator in channel G compares the high-order voltage value V_high_G with the high-order ramp voltage data V_RAMP_high based on the high-order clock frequency, and outputs the high-order pulse width modulation signal PWM_high_G based on the comparison result. It also compares the low-order voltage value V_low_G with the low-order ramp voltage data V_RAMP_low based on the low-order clock frequency, and outputs the low-order pulse width modulation signal PWM_low_G based on the comparison result. The green LED is then illuminated based on the high-order pulse width modulation signal PWM_high_G and the low-order pulse width modulation signal PWM_low_G.

[0052] Simultaneously, channel B receives the high-order voltage value V_high_B and low-order voltage value V_low_B of the blue sub-circuit drive signal, respectively, and charges the corresponding high-order storage capacitor C_high_B and low-order storage capacitor C_low_B. The high-order storage capacitor C_high_B and low-order storage capacitor C_low_B are then time-divisionally turned on with the comparator of channel B, so that the high-order voltage value V_high_B and low-order voltage value V_low_B of the blue sub-circuit drive signal are input to the comparator of channel B in a time-division manner. The comparator in channel B compares the high-order voltage value V_high_B with the high-order ramp voltage data V_RAMP_high based on the high-order clock frequency, and outputs the high-order pulse width modulation signal PWM_high_B based on the comparison result. It also compares the low-order voltage value V_low_B with the low-order ramp voltage data V_RAMP_low based on the low-order clock frequency, and outputs the low-order pulse width modulation signal PWM_low_B based on the comparison result. The blue LED is then illuminated based on the high-order and low-order pulse width modulation signals PWM_high_B and PWM_low_B.

[0053] In this embodiment, the corresponding storage capacitor is charged according to the high and low voltage values ​​of the driving signal of each sub-circuit, and then the capacitor is turned on in a time-division manner with the comparator. This allows the comparator to receive the high and low voltage values ​​according to different preset clock frequencies, generating pulse width modulation signals of different precisions. This reduces the loss of grayscale accuracy (grayscale loss), improves the grayscale level, and increases the display resolution without increasing the original pixel circuit system design area and power consumption. As a result, the display color is more realistic and the picture is more delicate.

[0054] In an exemplary embodiment, the pixel circuit 202 is further configured to time-division multiplex the high-order storage capacitor and the low-order storage capacitor of the pixel circuit 202 with the first input terminal of the comparator, so as to time-division multiplex the high-order voltage value and the low-order voltage value corresponding to each sub-circuit drive signal to the first input terminal of the comparator; the comparator is further configured to compare the high-order voltage value with the high-order ramp voltage data of the second input terminal of the comparator according to the high-order clock frequency, and to compare the low-order voltage value with the low-order ramp voltage data of the second input terminal of the comparator according to the low-order clock frequency.

[0055] Specifically, the comparator includes two input terminals: a first input terminal and a second input terminal. Referring to Figure 3, when the first input terminal of the comparator is the "-" terminal, the second input terminal is the "+" terminal.

[0056] The pixel circuit 202 is further configured to time-division multiplex the high-order storage capacitor and the low-order storage capacitor of the pixel circuit 202 with the first input terminal of the comparator. The comparator is configured to receive the high-order voltage value according to the high-order clock frequency, compare the high-order voltage value with the high-order ramp voltage data at the second input terminal of the comparator, and receive the low-order voltage value according to the low-order clock frequency, compare the low-order voltage value with the low-order ramp voltage data at the second input terminal of the comparator.

[0057] Furthermore, the order of the two input terminals of the comparator can be interchanged, and the high and low values ​​of the output pulse width modulation signal will also be reversed. When the first input terminal is the "+" terminal, the second input terminal is the "-" terminal.

[0058] In this embodiment, the two input terminals of the comparator can accurately and quickly compare the magnitude relationship between the high-order voltage value and the low-order voltage value and the corresponding ramp voltage data, thereby accurately and quickly outputting the pulse width modulation signal.

[0059] In an exemplary embodiment, the pixel circuit module 200 further includes: a power management unit, configured to provide the comparator of the pixel circuit with high-level ramp voltage data corresponding to the high-level voltage value and low-level ramp voltage data corresponding to the low-level voltage value; a comparator, configured to compare the high-level voltage value with the corresponding high-level ramp voltage data according to the high-level clock frequency, and output a first value of high-level pulse width modulation signal when the high-level voltage value is less than the high-level ramp voltage data, and output a second value of high-level pulse width modulation signal when the high-level voltage value is greater than or equal to the high-level ramp voltage data; and a comparator, further configured to compare the low-level voltage value with the corresponding low-level ramp voltage data according to the low-level clock frequency, and output a first value of low-level pulse width modulation signal when the low-level voltage value is less than the low-level ramp voltage data, and output a second value of low-level pulse width modulation signal when the low-level voltage value is greater than or equal to the low-level ramp voltage data.

[0060] Specifically, the voltage management unit provides the high-order ramp voltage data V_RAMP_high and the low-order ramp voltage data V_RAMP_low to the comparator in the pixel circuit. The comparator receives the high-order voltage value V_high according to the high-order clock frequency, compares it with the corresponding high-order ramp voltage data V_RAMP_high, and outputs 1 when the high-order voltage value V_high is less than the high-order ramp voltage data V_RAMP_high. It outputs 0 when the high-order voltage value V_high is greater than or equal to the high-order ramp voltage data V_RAMP_high.

[0061] The operation for the low-order voltage value is similar. When the low-order voltage value V_low is less than the low-order ramp voltage data V_RAMP_low, the comparator outputs 1. When the low-order voltage value V_low is greater than or equal to the low-order ramp voltage data V_RAMP_low, the comparator outputs 0.

[0062] Among them, the high-level ramp voltage data V_RAMP_high and the low-level ramp voltage data V_RAMP_low are voltage curves from 0 to V_max, as shown in Figure 4, which is the working principle diagram of the pixel circuit. Assuming that the high-level voltage value V_high and the low-level voltage value V_low output by the digital-to-analog converter are equal, the high-level voltage value V_high and the low-level voltage value V_low are compared with the high-level ramp voltage data V_RAMP_high and the low-level ramp voltage data V_RAMP_low, respectively, and the high-level pulse width modulation signal PWM_high and the low-level pulse width modulation signal PWM_low are output.

[0063] In this embodiment, the comparator can accurately and quickly compare the relationship between the high-order voltage value and the low-order voltage value and the corresponding ramp voltage curve, thereby accurately and quickly outputting the pulse width modulation signal.

[0064] In an exemplary embodiment, the pixel circuit module 200 further includes: a clock management unit, configured to provide a high-bit clock frequency and a low-bit clock frequency to the comparator of the pixel circuit; and a power management unit, configured to generate high-bit ramp voltage data corresponding to the high-bit voltage value according to the high-bit clock frequency, and generate low-bit ramp voltage data corresponding to the low-bit voltage value according to the low-bit clock frequency, and send the high-bit ramp voltage data and the low-bit ramp voltage data to the comparator of the pixel circuit corresponding to each type of circuit drive signal; wherein the slope of the high-bit ramp voltage data matches the high-bit clock frequency, and the slope of the low-bit ramp voltage data matches the low-bit clock frequency.

[0065] Specifically, the clock management unit provides the high-order clock frequency and the low-order clock frequency to the comparator. The power management unit generates high-order ramp voltage data corresponding to the high-order voltage value based on the high-order clock frequency, and generates low-order ramp voltage data corresponding to the low-order voltage value based on the low-order clock frequency, and inputs the high-order ramp voltage data and low-order ramp voltage data to the comparator of the pixel circuit.

[0066] Both the high-slope voltage data and the low-slope voltage data are voltage curves that increase linearly from 0 to VDD (power supply voltage) with a certain slope. However, the growth slopes of the high-slope voltage data and the low-slope voltage data are different, and their slopes are matched with the clock video.

[0067] Furthermore, if the clock frequency of the comparator is F under the high-order signal nm bit, then the clock frequency of the comparator under the low-order signal m bit is F×2m. The clock frequency diagram of the comparator is shown in Figure 5.

[0068] In this embodiment, the clock management unit provides different high-order clock frequencies and low-order clock frequencies to the comparator of the pixel circuit. The power management unit generates corresponding ramp voltage data according to the high-order clock frequency and low-order clock frequency, and inputs them to the comparator. This enables the comparator to receive high-order signals and low-order signals at different clock frequencies and compare them with the corresponding ramp voltage data to generate pulse width modulation signals of different precisions. This reduces the loss of grayscale accuracy (grayscale loss) and improves the display grayscale level and display resolution without increasing the original pixel circuit system design area and power consumption. As a result, the displayed colors are more realistic and the picture is more delicate.

[0069] In an exemplary embodiment, within one frame period, the circuitry should cyclically generate a pulse width modulation (PWM) signal for each pixel. For high-order voltage values, the high-order PWM signal can be generated a times, with the corresponding comparator clock frequency multiplied by a. For low-order voltage values, the low-order PWM signal can be generated b times, with the corresponding comparator clock frequency multiplied by b, where a ≥ 1 and b ≥ 1. a and b can be set according to actual needs, and should be as large as possible within the comparator's achievable range.

[0070] In an exemplary embodiment, the pixel circuit module 200 is further configured to, when outputting the high-bit pulse width modulation signal corresponding to the high-bit voltage value and the low-bit pulse width modulation signal corresponding to the low-bit voltage value, adopt any of the following methods: output the high-bit pulse width modulation signal first, and then output the low-bit pulse width modulation signal; output the low-bit pulse width modulation signal first, and then output the high-bit pulse width modulation signal; or alternately output the high-bit pulse width modulation signal and the low-bit pulse width modulation signal.

[0071] Specifically, within one frame period, when the high-bit pulse width modulation signal and low-bit pulse width modulation signal generated by each pixel circuit are output to illuminate the display material, the high-bit pulse width modulation signal can be output a times first, followed by b times of low-bit pulse width modulation signal, or the low-bit pulse width modulation signal can be output b times first, followed by a times of high-bit pulse width modulation signal, or the high-bit pulse width modulation signal and low-bit pulse width modulation signal can be output alternately to reduce flickering.

[0072] In this embodiment, by setting multiple output modes of high-bit pulse width modulation signals and low-bit pulse width modulation signals, the lighting mode of the display material can be flexibly selected.

[0073] In an exemplary embodiment, as shown in Figure 6, which is a block diagram of a pixel circuit system, this embodiment takes an LED-type pixel circuit as an example. The pixel circuit system includes a video processing module 100 and a pixel circuit module 200. The pixel circuit module 200 includes a digital-to-analog converter unit 201, a pixel circuit 202, a power management unit 203, and a clock management unit 204. Control signals represent pixel circuit drive signals, which include row selection signals and column drive signals. Pixel circuit_R, pixel circuit_G, and pixel circuit_B can represent the R pixel, G pixel, and B pixel of the pixel circuit, i.e., the R channel, G channel, and B channel. The pixel circuit includes multiple rows of pixels and multiple columns of pixels. Each row of pixels is arranged from left to right in the order of R pixels, G pixels, and B pixels, and each column of pixels is a single pixel. The row selection signal is used to select the row of pixels to receive data. Multiple column drivers operate independently of each other. The column drivers are used to provide high-bit ramp voltage data, low-bit ramp voltage data, high-bit clock frequency and low-bit clock frequency, high-bit voltage value and low-bit voltage value to the column pixels in each row of pixels in order to control the color and grayscale of the LED-type pixel circuit.

[0074] For example, taking video source data with an 8-bit grayscale depth as an example, after gamma correction, 12-bit precision is retained, with high and low bits separated, and each 6 bits used for subsequent processing. Taking the R channel as an example, the high-bit signal and the low-bit signal are converted into analog voltages V_high_R and V_low_R after passing through the digital-to-analog converter unit 201. During the digital-to-analog conversion, the high-bit signal and the low-bit signal need to be converted with the same weight. The high-bit ramp voltage data V_RAMP_high and the low-bit ramp voltage data V_RAMP_low are both in the range of 0 to 5V. Within one frame, the high-bit voltage value PWM_high and the low-bit voltage value PWM_low are generated cyclically 4 times each, namely PWM_low_1, PWM_low_2, PWM_low_3, PWM_low_4 and PWM_high_1, PWM_high_2, PWM_high_3, PWM_high_4, active low, as shown in Figure 7, which is a cyclic diagram of the four pulse width modulation signals of the pixel circuit system. The final output signals used to light up the LEDs are alternating signals: PWM_high_1, PWM_low_1, PWM_high_2, PWM_low_2, PWM_high_3, PWM_low_3, PWM_high_4, and PWM_low_4. The same processing procedure is applied to the G and B channels.

[0075] Figure 8 shows a comparison of grayscale loss between a traditional pixel circuit system and the pixel circuit system of this disclosure. In the traditional method, after gamma 2.2 correction, the original 256 grayscale levels can only display 8-bit grayscale precision, and 72 grayscale levels will be lost. However, the pixel circuit system designed in this disclosure can display 12-bit grayscale precision, and the final output display grayscale only loses 7 grayscale levels. This achieves a reduction in display grayscale precision loss (grayscale loss) without increasing the design area and power consumption of the original pixel circuit system, thereby improving the system's display grayscale levels and achieving a more realistic and delicate display effect.

[0076] In an exemplary embodiment, as shown in FIG9, a driving method for a pixel circuit system is provided for driving the pixel circuit system in any of the above embodiments. The method includes the following steps:

[0077] Step 902: Generate pixel circuit driving signals based on video source data.

[0078] Step 904: Separate the high-order signal and low-order signal in the pixel circuit driving signal, and perform digital-to-analog conversion on the high-order signal and low-order signal respectively to obtain the high-order voltage value and low-order voltage value.

[0079] Step 906: Based on the high-order clock frequency and the low-order clock frequency, compare the high-order voltage value and the low-order voltage value with the corresponding ramp voltage data, and output the high-order pulse width modulation signal corresponding to the high-order voltage value and the low-order pulse width modulation signal corresponding to the low-order voltage value.

[0080] In this embodiment, the pixel circuit driving signal is divided into high-order signals and low-order signals, which are then converted into high-order voltage values ​​and low-order voltage values, respectively. Subsequently, at different clock frequencies, the high-order and low-order voltage values ​​are compared with corresponding ramp voltage data, and corresponding pulse width modulation (PWM) signals are output. By generating PWM signals corresponding to the high-order and low-order voltage values ​​at different clock frequencies, the PWM signals corresponding to the high-order and low-order voltage values ​​have different precipitates, allowing more signal bits to be retained. This reduces grayscale accuracy loss (grayscale loss) without increasing the original pixel circuit system design area and power consumption, improves the display grayscale levels, increases display resolution, and makes the displayed colors more realistic and the image more delicate.

[0081] In one exemplary embodiment, a display device is provided, including the pixel circuitry system of any of the above embodiments.

[0082] In the description of this specification, references to terms such as "some embodiments," "other embodiments," and "ideal embodiments" indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of the invention. In this specification, the illustrative descriptions of the above terms do not necessarily refer to the same embodiments or examples.

[0083] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0084] The embodiments described above are merely illustrative of several implementations of this disclosure, and while the descriptions are specific and detailed, they should not be construed as limiting the scope of the patent application. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this disclosure, and these all fall within the scope of protection of this disclosure. Therefore, the scope of protection of this patent should be determined by the appended claims.

Claims

1. A pixel circuit system, wherein, include: The video processing module is used to generate pixel circuit drive signals based on video source data; A pixel circuit module, connected to the video processing module, is used to separate the high-order signal and the low-order signal in the pixel circuit driving signal, and to perform digital-to-analog conversion on the high-order signal and the low-order signal respectively to obtain the high-order voltage value and the low-order voltage value. Based on the high-order clock frequency and the low-order clock frequency, the high-order voltage value and the low-order voltage value are compared with the corresponding ramp voltage data, and the high-order pulse width modulation signal corresponding to the high-order voltage value and the low-order pulse width modulation signal corresponding to the low-order voltage value are output.

2. The pixel circuit system according to claim 1, wherein, The video processing module is also used to perform gamma correction on the pixel circuit driving signal to generate a continuous grayscale signal that conforms to human vision. The pixel circuit module includes a digital-to-analog converter unit, which is used to separate the high-order signal and the low-order signal in the continuous grayscale signal, and perform digital-to-analog conversion on the high-order signal and the low-order signal respectively to obtain the high-order voltage value and the low-order voltage value.

3. The pixel circuit system according to claim 1, wherein, The pixel circuit module includes: The color separation module is used to perform color separation processing on the pixel circuit driving signal to obtain multiple sub-circuit driving signals corresponding to the pixel circuit driving signal; separate the high-order signal and low-order signal in each sub-circuit driving signal; and perform digital-to-analog conversion on the high-order signal and low-order signal in each sub-circuit driving signal to obtain the high-order voltage value and low-order voltage value corresponding to each sub-circuit driving signal.

4. The pixel circuit system according to claim 3, wherein, The pixel circuit module includes a pixel circuit, which includes a high-order storage capacitor, a low-order storage capacitor, and a comparator. The pixel circuit is used to charge the corresponding high-order storage capacitor according to the high-order voltage value of each sub-circuit driving signal, and to charge the corresponding low-order storage capacitor according to the low-order voltage value of each sub-circuit driving signal; the high-order storage capacitor and the low-order storage capacitor of the pixel circuit are turned on in a time-division manner with the comparator so that the high-order voltage value and the low-order voltage value corresponding to each sub-circuit driving signal are input to the comparator in a time-division manner. The comparator is used to compare the high-order voltage value with the corresponding high-order ramp voltage data according to the high-order clock frequency, and to compare the low-order voltage value with the corresponding low-order ramp voltage data according to the low-order clock frequency.

5. The pixel circuit system according to claim 4, wherein, The pixel circuit is also used to conduct the high-order storage capacitor and the low-order storage capacitor of the pixel circuit to the first input terminal of the comparator in a time-division manner, so as to input the high-order voltage value and the low-order voltage value corresponding to the driving signal of each sub-circuit to the first input terminal of the comparator in a time-division manner. The comparator is also used to compare the high-order voltage value with the high-order ramp voltage data at the second input of the comparator according to the high-order clock frequency, and to compare the low-order voltage value with the low-order ramp voltage data at the second input of the comparator according to the low-order clock frequency.

6. The pixel circuit system according to claim 4, wherein, The pixel circuit module also includes: The power management unit is used to provide the comparator of the pixel circuit with high-order ramp voltage data corresponding to the high-order voltage value and low-order ramp voltage data corresponding to the low-order voltage value. The comparator is used to compare the high-order voltage value with the corresponding high-order ramp voltage data according to the high-order clock frequency. When the high-order voltage value is less than the high-order ramp voltage data, it outputs a high-order pulse width modulation signal of the first value. When the high-order voltage value is greater than or equal to the high-order ramp voltage data, it outputs a high-order pulse width modulation signal of the second value. The comparator is also used to compare the low-order voltage value with the corresponding low-order ramp voltage data according to the low-order clock frequency. When the low-order voltage value is less than the low-order ramp voltage data, it outputs a low-order pulse width modulation signal of the first value. When the low-order voltage value is greater than or equal to the low-order ramp voltage data, it outputs a low-order pulse width modulation signal of the second value.

7. The pixel circuit system according to claim 6, wherein, The pixel circuit module also includes: The clock management unit is used to provide the high-bit clock frequency and low-bit clock frequency for the comparator of the pixel circuit; The power management unit is used to generate high-level ramp voltage data corresponding to high-level voltage values ​​based on the high-level clock frequency, and to generate low-level ramp voltage data corresponding to low-level voltage values ​​based on the low-level clock frequency, and input the high-level ramp voltage data and low-level ramp voltage data to the comparator of the pixel circuit; wherein, the slope of the high-level ramp voltage data is matched with the high-level clock frequency, and the slope of the low-level ramp voltage data is matched with the low-level clock frequency.

8. The pixel circuit system according to claim 1, wherein, The pixel circuit module is further configured to, when outputting the high-bit pulse width modulation signal corresponding to the high-bit voltage value and the low-bit pulse width modulation signal corresponding to the low-bit voltage value, adopt any one of the following methods: First, output the high-order pulse width modulation signal, then output the low-order pulse width modulation signal; First, output the low-order pulse width modulation signal, then output the high-order pulse width modulation signal; The high-order pulse width modulation signal and the low-order pulse width modulation signal are output alternately.

9. A driving method for a pixel circuit system, wherein, The method for driving the pixel circuit system according to any one of claims 1-8 includes the following steps: Generate pixel circuit drive signals based on video source data; The high-order signal and the low-order signal in the pixel circuit driving signal are separated, and the high-order signal and the low-order signal are converted from digital to analog respectively to obtain the high-order voltage value and the low-order voltage value. Based on the high-order clock frequency and the low-order clock frequency, the high-order voltage value and the low-order voltage value are compared with the corresponding ramp voltage data, and the high-order pulse width modulation signal corresponding to the high-order voltage value and the low-order pulse width modulation signal corresponding to the low-order voltage value are output.

10. A display device, wherein, The pixel circuit system included in any one of claims 1-8.

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