Memory access method, apparatus, device, storage medium and program product

Abstract

Provided in the present disclosure are a memory access method, an apparatus, a device, a storage medium and a program product. The memory access method comprises: in response to a direct memory access operation of a target device, determining a target virtual address corresponding to the direct memory access operation; and, in response to a target page table containing no target mapping relationship, executing a target process, so that the target device cannot access a target memory page, wherein the target page table is used for recording mapping relationships between virtual addresses and physical addresses, and the target mapping relationship is a mapping relationship between the target virtual address and the physical address of the target memory page. The present disclosure can ensure the security of DMA operations.

Description

Memory access methods, devices, equipment, storage media and program products

[0001] This disclosure claims priority to Chinese Patent Application No. 202411191745.0, filed with the China Patent Office on August 27, 2024, entitled “Memory Access Method, Apparatus, Device, Storage Medium and Program Product”, the entire contents of which are incorporated herein by reference. Technical Field

[0002] This disclosure relates to the field of computer technology, and in particular to a memory access method, apparatus, device, storage medium, and program product. Background Technology

[0003] Direct Memory Access (DMA) is a technology that allows external devices (such as hard drives, network cards, and USB drives) to directly access system memory. DMA eliminates the need for external devices to process data through the computer's Central Processing Unit (CPU), significantly improving data transfer speeds without interfering with CPU processing.

[0004] However, because DMA operations allow external devices to directly access system memory, unauthorized DMA operations that modify or delete data in system memory can lead to data corruption. Therefore, ensuring the security of DMA operations is a pressing issue that needs to be addressed. Summary of the Invention

[0005] This disclosure provides a memory access method, apparatus, device, storage medium, and program product that can ensure the security of DMA operations.

[0006] In a first aspect, this disclosure provides a memory access method, the method comprising:

[0007] In response to a direct memory access operation of the target device, determine the target virtual address corresponding to the direct memory access operation;

[0008] In response to the absence of a target mapping relationship in the target page table, a target process is executed to prevent the target device from accessing the target memory page; the target page table is used to record the mapping relationship between virtual addresses and physical addresses, and the target mapping relationship is the mapping relationship between the target virtual address and the physical address of the target memory page.

[0009] Optionally, before executing the target process in response to the absence of a target mapping relationship in the target page table, the method further includes:

[0010] Obtain a first identifier for multiple initial memory pages; the first identifier is used to indicate whether the data in the initial memory page is currently allowed to be swapped in memory; the initial memory page includes: the target memory page and memory pages to be accessed by other access operations besides the direct memory access operation;

[0011] For any of the initial memory pages, in response to the first identifier of the initial memory page indicating that the data in the initial memory page is currently allowed to be swapped in memory, the mapping relationship between the physical address and virtual address of the initial memory page in the target page table is deleted.

[0012] Optionally, obtaining the first identifier of the multiple initial memory pages includes:

[0013] Based on the type of interface to be called to access the initial memory page, determine the first identifier of the initial memory page;

[0014] or,

[0015] Receive the first identifier of the initial memory page.

[0016] Optionally, the method further includes:

[0017] In response to the first identifier of the initial memory page being used to indicate that the data in the initial memory page is currently not allowed to be swapped in memory, and there is no mapping relationship between the physical address and virtual address of the initial memory page in the target page table, the mapping relationship between the physical address and virtual address of the initial memory page is added to the target page table.

[0018] Optionally, the method further includes:

[0019] In response to a memory swap-out request, a memory page to be swapped out is determined from the initial memory pages having a target identifier; the target identifier is a first identifier used to characterize that the data in the initial memory page is currently allowed to be swapped out.

[0020] In response to the memory page to be swapped out being a large page, the memory page to be swapped out is split into multiple small pages, and the multiple small pages are swapped out of memory; the amount of data that the large page can store is greater than the amount of data that the small page can store.

[0021] Optionally, the method further includes:

[0022] In response to the fact that the memory page to be swapped out is a large page, the first entry in the target page table that records the mapping relationship between the physical address and the virtual address of the memory page to be swapped out is split into a second entry corresponding to each of the small pages.

[0023] Optionally, the method further includes:

[0024] In response to a memory swap-in request, determine the memory page from which the swap-in data is to be received, as indicated by the memory swap-in request;

[0025] In response to the second identifier of the memory page to be received for swapping in, which is used to indicate that the data of the memory page is currently and in the future allowed for memory swapping, the mapping relationship between the physical address and virtual address of the corresponding small page of the second entry in the target page table is respectively filled into the multiple second entries corresponding to the memory page to be received for swapping in.

[0026] The data indicated by the memory swap request is swapped into memory using a small page swapping method.

[0027] Optionally, after swapping the data indicated by the memory swap request into memory using a small page swapping method, the method further includes:

[0028] The first entry is obtained by merging the multiple second entries in the target page table.

[0029] Optionally, the computer device is configured with an operating system and a virtualization layer; the memory access method is applied to the virtualization layer; the computer device is not the target device; the target memory page belongs to the memory of the computer device.

[0030] Optionally, the computer device deploys a virtual machine, the target process is the system crash process of the target virtual machine, and the step of executing the target process in response to the absence of a target mapping relationship in the target page table includes:

[0031] In response to the absence of the target mapping relationship in the target page table, a system crash procedure for the target virtual machine is executed to prevent the target device from accessing the target memory page; the target virtual machine is the virtual machine that the target device wants to access through the direct memory access operation.

[0032] Secondly, this disclosure provides a memory access method, wherein a computer device is configured with an operating system and a virtualization layer; the memory access method is applied to the virtualization layer, and a virtual machine is deployed in the computer device, the method comprising:

[0033] Obtain the first identifier of multiple initial memory pages from the IOMMU page table; the first identifier is used to indicate whether the data in the initial memory page is currently allowed to be swapped in memory; the IOMMU page table is used to record the mapping relationship between virtual addresses and physical addresses;

[0034] For any of the initial memory pages, in response to the first identifier of the initial memory page indicating that the data in the initial memory page is currently allowed to be swapped in memory, the mapping relationship between the physical address and virtual address of the initial memory page in the IOMMU page table is deleted;

[0035] In response to a direct memory access operation of an input / output (I / O) device, determine the target virtual address corresponding to the direct memory access operation;

[0036] In response to the absence of a target mapping relationship in the IOMMU page table, a system crash procedure for the target virtual machine is executed to prevent the I / O device from accessing the target memory page; the target mapping relationship is the mapping relationship between the target virtual address and the physical address of the target memory page; the target virtual machine is the virtual machine that the target device wants to access through the direct memory access operation.

[0037] Thirdly, this disclosure provides a memory access device, the device comprising:

[0038] A determination module is configured to determine the target virtual address corresponding to the direct memory access operation in response to the direct memory access operation of the target device;

[0039] An execution module is used to execute a target process in response to the absence of a target mapping relationship in the target page table, so that the target device cannot access the target memory page; the target page table is used to record the mapping relationship between virtual addresses and physical addresses, and the target mapping relationship is the mapping relationship between the target virtual address and the physical address of the target memory page.

[0040] Fourthly, this disclosure provides a computer-readable storage medium storing computer-executable instructions that, when executed by a processor, are used to implement the method as described in any one of the first and / or second aspects.

[0041] Fifthly, this disclosure provides a computer program product comprising a computer program that, when executed by a processor, implements the method as described in any one of the first and / or second aspects.

[0042] In a sixth aspect, this disclosure provides an electronic device, including: a processor and a memory; the processor is communicatively connected to the memory;

[0043] The memory stores computer instructions;

[0044] The processor executes computer instructions stored in the memory to implement the method as described in any one of the first and / or second aspects.

[0045] The memory access method, apparatus, device, storage medium, and program product provided in this disclosure, for direct memory access operations on a target device, allow the computer device to execute a target process when there is no mapping relationship between the target virtual address and the physical address of the target memory page in the target page table, thereby preventing the target device from accessing the target memory page. Through the above method, if there is no mapping relationship between the target virtual address and the physical address of the target memory page in the target page table, it indicates that the target device's execution of the direct memory access operation is an illegal DMA operation. By preventing the target device from accessing the target memory page when it performs an illegal DMA operation, and thus preventing the target device from reading or writing data in the target memory page, illegal DMA operations are prevented from accessing memory pages, ensuring the security of the computer device's response to DMA operations. Attached Figure Description

[0046] To more clearly illustrate the technical solutions in this disclosure or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of this disclosure. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0047] Figure 1 is a schematic diagram of a memory swapping scenario provided in this disclosure;

[0048] Figure 2 is a flowchart illustrating a memory access method provided in this disclosure;

[0049] Figure 3 is a flowchart illustrating another memory access method provided in this disclosure;

[0050] Figure 4 is a schematic diagram of a memory access device provided in this disclosure;

[0051] Figure 5 is a schematic diagram of another memory access device provided in this disclosure;

[0052] Figure 6 is a schematic diagram of the hardware structure of an electronic device provided in this disclosure.

[0053] The accompanying drawings have illustrated specific embodiments of this disclosure, which will be described in more detail below. These drawings and descriptions are not intended to limit the scope of the concept in any way, but rather to illustrate the concepts of this disclosure to those skilled in the art through reference to particular embodiments. Detailed Implementation

[0054] To make the objectives, technical solutions, and advantages of this disclosure clearer, the technical solutions of this disclosure will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this disclosure, not all embodiments. Based on the embodiments of this disclosure, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this disclosure.

[0055] The following is an explanation of some of the terms and concepts used in this disclosure:

[0056] Memory Page: The operating system's memory management unit can divide memory according to a set management granularity. Each management granularity can be called a memory page or a memory section.

[0057] Small pages and large pages: Small pages and large pages refer to memory pages with different management granularities. For example, the size of a small page is usually 4KB (kilobyte); the size of a large page is usually 2MB or 1GB, etc. In other words, the amount of data that a large page can store is greater than the amount of data that a small page can store.

[0058] Physical Address (PA) and Virtual Address (VA): A virtual address is the memory address space seen by a process. Each process has its own virtual address space, and virtual pages are a part of this space. A physical address is the address space that actually exists in the computer's physical memory. A physical page is the memory page that a process actually uses through the operating system.

[0059] Page Table: A page table is a concept in virtual memory technology. It records the mapping between virtual addresses and physical addresses. When a process accesses a virtual address, the operating system looks up the corresponding physical address using the page table. During memory swapping, because the storage location of the process's data changes, the process's page table needs to be updated.

[0060] Memory swapping: The memory swapping function of an operating system (such as Linux) is a mechanism for managing memory. Since a computer's physical memory is limited, and process memory usage is unpredictable, there is always a possibility that physical memory will run out. The operating system uses memory swapping to solve the problem of insufficient physical memory. For example, Figure 1 is a schematic diagram of a memory swapping scenario provided in this disclosure. As shown in Figure 1, memory swapping can include page swapping out and page swapping in. Page swapping out refers to moving data from some infrequently used (unaccessed for a long time) memory pages to other locations (such as the computer's hard drive) when the computer's physical memory is insufficient, and then releasing these memory pages for reclamation by the memory management unit. Page swapping frees up more physical memory for processes that need it. Memory swapping in refers to storing this data, which has been swapped out to the hard drive, back into the memory page and returning it to the process when a process needs to access it. Page swapping in allows the data swapped out to the hard drive to be loaded into the computer's physical memory, enabling the process to continue running.

[0061] DMA operation: DMA operation is a technology that allows external devices, such as hard drives, network interface cards (NICs), and Universal Serial Bus (USB) devices, to directly access system memory. Through DMA operations, external devices do not need to rely on the computer's CPU for data transfer, significantly improving data transfer speeds without interfering with CPU usage.

[0062] Because DMA operations allow external devices to directly access system memory, they can modify or delete data within memory pages. Therefore, unauthorized DMA operations can corrupt the data stored in memory pages. Ensuring the security of DMA operations is a pressing issue that needs to be addressed.

[0063] In view of the aforementioned problems with existing memory access methods, this disclosure proposes a method to prevent illegal DMA operations from accessing memory pages, thereby ensuring the security of DMA operations.

[0064] Optionally, the execution entity of the memory access method provided in this disclosure can be any computer device. For example, the computer device can be a single-core CPU electronic device, or it can be an electronic device that includes multiple physical CPUs.

[0065] Alternatively, the execution entity of the memory access method provided in this disclosure can be the operating system of any computer device. For example, the operating system can execute the memory access method provided in any embodiment of this disclosure through a memory management module.

[0066] Alternatively, taking a computer device equipped with an operating system and a virtualization layer as an example, the execution entity of the memory access method provided in this disclosure can be, for example, the virtualization layer. Exemplarily, the virtualization layer can be built based on the hardware virtualization function of the computer device. For example, the virtualization layer can be a lightweight virtualization layer inserted between the user operating system and the hardware of the computer device. The function of the virtualization layer can be, for example, to perform memory management on the computer device (e.g., including memory swapping functionality). Exemplarily, the computer device can use the virtualization layer to switch the running operating system. Extended page tables (EPTs) can be used in the virtualization layer, for example, to manage all running memory, thus allowing for the subsequent development of corresponding memory swapping functions based on this inserted virtualization layer, providing an architectural foundation for efficient full memory swapping.

[0067] The following describes the technical solution of this disclosure in detail, taking a computer device as the execution subject of the memory access method as an example, with specific embodiments. These specific embodiments can be combined with each other, and the same or similar concepts or processes may not be described again in some embodiments.

[0068] Figure 2 is a flowchart illustrating a memory access method provided in this disclosure. As shown in Figure 2, the method may include the following steps:

[0069] S101. In response to a direct memory access operation of the target device, determine the target virtual address corresponding to the direct memory access operation.

[0070] For example, the target device described above can be any existing electronic device capable of performing direct memory access (DMA) operations to a computer device, and this disclosure does not limit its scope. The computer device is not the target device described above. For example, the target device can be an input / output (I / O) device. Optionally, the I / O device can be integrated into the computer device, or it can be connected to the computer device independently of it. This disclosure does not limit the method of connecting the I / O device to the computer device. For example, the I / O device and the computer device can be connected via a wired connection or a wireless connection. For example, the I / O device can be a hard disk device, a network card device, a USB device, etc.

[0071] Furthermore, this disclosure does not limit the specific implementation method of triggering direct memory access operations on the target device. For example, the target device may trigger the direct memory access operations when running a specific application or a specific process.

[0072] Optionally, the computer device may respond to the direct memory access operation and determine the target virtual address corresponding to the direct memory access operation based on the direct memory access operation. Optionally, the computer device may determine the target virtual address based on the direct memory access operation in any existing method for determining virtual addresses, which will not be described in detail here.

[0073] S102. In response to the absence of a target mapping relationship in the target page table, execute the target process to prevent the target device from accessing the target memory page.

[0074] The aforementioned target page table can be used to record the mapping relationship between virtual addresses and physical addresses. The physical address is the physical address of a memory page in a computer device. In some embodiments, the target page table may include multiple entries, each recording a mapping relationship. For example, the aforementioned target page table may be an input / output memory management unit (IOMMU) page table.

[0075] The aforementioned target mapping relationship can be a mapping between a target virtual address and the physical address of a target memory page. This target memory page belongs to the memory of the computer device. Optionally, this target memory page can be the memory page that the aforementioned direct memory access operation wants to access. The purpose of the aforementioned direct memory access operation can be to modify, delete, or read the data stored in the target memory page. Alternatively, the purpose of the aforementioned direct memory access operation can also be to write data to the target memory page. By executing the above target process, the target device can be prevented from accessing the target memory page, thus preventing the purpose of the direct memory access operation from being achieved.

[0076] Optionally, the target memory page can be a large page or a small page, and this disclosure does not limit the amount of data that the target memory page can store.

[0077] For example, the target process described above could be a system crash process, a computer device power failure process, or other processes that stop responding to direct memory access operations of I / O devices. In some embodiments, the target process may further include, for example, outputting a prompt message indicating that the direct memory access operation failed. For example, the computer device may output the prompt message to the target device. Alternatively, the computer device may output the prompt message through a display device or the like connected to the computer device.

[0078] In this embodiment, for direct memory access operations on the target device, the computer device can execute the target process when there is no mapping relationship between the target virtual address and the physical address of the target memory page in the target page table, thereby preventing the target device from accessing the target memory page. Through the above method, if there is no mapping relationship between the target virtual address and the physical address of the target memory page in the target page table, it indicates that the target device's execution of the direct memory access operation is an illegal DMA operation. By preventing the target device from accessing the target memory page when it performs an illegal DMA operation, the target device is prevented from performing read / write operations on the data in the target memory page, thus preventing illegal DMA operations from accessing memory pages and ensuring the security of the computer device's response to DMA operations.

[0079] In some embodiments, if the operation triggered by the target device to the computer device is not a direct memory access operation, the computer device may respond to the non-direct memory access operation in a manner that, for example, refers to any existing memory access method for responding to a non-direct memory access operation, which will not be described in detail here.

[0080] In some embodiments, after a computer device responds to a direct memory access operation of a target device and determines the target virtual address corresponding to the direct memory access operation, if it determines that the target mapping relationship exists in the target page table, it indicates that the direct memory access operation is a legitimate DMA operation. Then, the computer device can execute the direct memory access operation so that the target device can access the target memory page.

[0081] As one possible implementation, the computer device may also obtain the first identifier of multiple initial memory pages before executing the target process in response to the absence of a target mapping relationship in the target page table. These initial memory pages may include, for example, the aforementioned target memory page and memory pages to be accessed by other access operations besides the aforementioned direct memory access operations. For instance, the initial memory page may refer to the memory page corresponding to the physical address included in all mapping relationships in the aforementioned target page table.

[0082] The first identifier mentioned above can be used to characterize whether the data in the initial memory page is currently data that is allowed to be swapped in memory.

[0083] Taking the aforementioned first identifier used to characterize data in the initial memory page that is currently not allowed to be swapped in memory as an example, in some embodiments, the first identifier can also be divided into two different first identifiers representing different content. For example, the first identifier can be used to characterize the data in the initial memory page as "currently not allowed to be swapped in memory, and will always be not allowed to be swapped in memory in the future." Alternatively, the first identifier can also be used to characterize the data in the initial memory page as "currently not allowed to be swapped in memory, and may become allowed to be swapped in memory in the future."

[0084] Taking the aforementioned first identifier as an example of representing data in the initial memory page that is currently allowed for memory swapping, in some embodiments, for instance, this first identifier can also be divided into two different first identifiers representing different content. For example, the first identifier can be used to represent that the data in the initial memory page is "currently allowed for memory swapping, and will always be allowed for memory swapping in the future." Alternatively, the first identifier can also be used to represent that the data in the initial memory page is "currently allowed for memory swapping, and may become disallowed for memory swapping in the future."

[0085] Then, the computer device can, for any initial memory page, in response to the first identifier of that initial memory page, "indicating that the data in the initial memory page is currently allowed for memory swapping," delete the mapping relationship between the physical address and virtual address of that initial memory page in the aforementioned target page table. In other words, for an initial memory page with the first identifier "indicating that the data in the initial memory page is currently allowed for memory swapping," if a mapping relationship between the physical address and virtual address of that initial memory page exists in the target page table, the computer device can delete the mapping relationship between the physical address and virtual address of that initial memory page from the target page table.

[0086] In some embodiments, the initial memory page for which the first identifier "is used to characterize that the data in the initial memory page is currently allowed to be swapped in memory" may be, for example, an initial memory page for which the first identifier "is used to characterize that the data in the initial memory page is currently allowed to be swapped in memory, and may become data that is not allowed to be swapped in memory in the future," and / or an initial memory page for which the first identifier "is used to characterize that the data in the initial memory page is currently allowed to be swapped in memory, and will always be allowed to be swapped in memory in the future."

[0087] In this embodiment, by deleting the mapping relationship between the physical address and virtual address of the initial memory page in the target page table, which is first identified as "data that is currently allowed to be swapped in the initial memory page", the subsequent computer device, when responding to the direct memory access operation of the target device, can identify the target device's execution of the direct memory access operation as an illegal DMA operation if it determines that there is no mapping relationship between the target virtual address and the target memory page's physical address in the target page table. This lays the foundation for preventing illegal DMA operations from accessing memory pages.

[0088] The following is an exemplary description of how a computer device obtains the first identifier of the aforementioned multiple initial memory pages:

[0089] In some embodiments, the computer device may determine the first identifier of the initial memory page, for example, based on the type of interface to be called to access the initial memory page.

[0090] For example, computer devices can use a tagging interface to update the first identifier of the initial memory page to a DMA first identifier for direct memory access operations via the kernel standard DMA interface. This identifier indicates that the data in the initial memory page is currently not allowed to be swapped. For DMA operations performed directly by the application on the target device, such as DMA initiated through scene or chip swapping via a Data Processing Unit (DPU) or Field Programmable Gate Array (FPGA), where the operation does not go through the kernel standard DMA interface, all memory pages accessed by such operations are tagged with a DEV mark to indicate that the data in the initial memory page is currently allowed to be swapped.

[0091] Alternatively, in some embodiments, the computer device may also receive a first identifier of the initial memory page. For example, the computer device may receive a first identifier of the initial memory page from the target device. Alternatively, the computer device may also receive a first identifier of the initial memory page input by a technician.

[0092] Alternatively, the computer device can determine the first identifier of the initial memory page based on the interface type required for the target device to access the initial memory page for operations via the kernel standard interface. For operations not via the memory standard interface, the computer device can, for example, receive the aforementioned first identifier of the initial memory page input by a technician.

[0093] Optionally, a first identifier for any initial memory page. The computer device may also update the first identifier of the initial memory page to improve its accuracy. Optionally, the method by which the computer device updates the first identifier of the initial memory page can refer to the method described above for obtaining the first identifier of the initial memory page, and will not be repeated here.

[0094] Using the above method, the computer device can determine the first identifier of the initial memory page that the target device wants to access, laying the foundation for subsequent deletion operations on the mapping relationship in the target page table based on the first identifier.

[0095] In some embodiments, if a computer device determines that a first identifier of an initial memory page is used to characterize that the data in the initial memory page is currently not allowed to be swapped in memory, and there is no mapping relationship between the physical address and virtual address of the initial memory page in the target page table, the computer device may add the mapping relationship between the physical address and virtual address of the initial memory page in the target page table.

[0096] In other words, for an initial memory page whose "first identifier is used to indicate that the data in the initial memory page is currently not allowed to be swapped in memory", if there is no mapping relationship between the physical address and virtual address of the initial memory page in the target page table, the computer device can add the mapping relationship between the physical address and virtual address of the initial memory page in the target page table.

[0097] By adding a mapping relationship between the physical and virtual addresses of the initial memory page (where the first identifier indicates that the data in the initial memory page is currently not allowed to be swapped) to the target page table, subsequent computer devices can respond to legitimate DMA operations. Based on this mapping relationship in the target page table, the physical address of the memory page accessed by the legitimate DMA operation is determined, enabling the legitimate DMA operation to access the memory page and ensuring that the legitimate DMA operation can be executed normally.

[0098] The following provides a detailed explanation of how computer equipment executes the target process:

[0099] As one possible implementation, taking a computer device with a virtual machine deployed in it as an example, the target process could be a system crash process for the target virtual machine. Therefore, the computer device could, for example, execute a system crash process for the target virtual machine in response to the absence of the aforementioned target mapping relationship in the target page table, thereby preventing the target device from accessing the target memory page.

[0100] The target virtual machine is the virtual machine deployed on the computer device that the target device wants to access through the direct memory access operation.

[0101] In some embodiments, when it is determined that the target mapping relationship does not exist in the target page table, the computer device may directly execute the system crash procedure of the target virtual machine.

[0102] Alternatively, in some embodiments, the computer device may, for example, generate a Direct Memory Access Remapping (DMAR) error instruction in response to the absence of the aforementioned target mapping relationship in the target page table. This DMAR error instruction can be used to indicate that the aforementioned target mapping relationship does not exist in the target page table. The computer device can then, in response to the aforementioned DMAR error instruction, execute a system crash procedure for the target virtual machine.

[0103] For example, taking a computer device with a virtual machine deployed as an example, the aforementioned DMAR error instruction can cause the virtual machine to trigger a vm_exit event. When the virtual machine triggers a vm_exit event, the computer device can detect that a fatal exception has occurred, and that the fatal exception was caused by a DMAR error instruction. In this case, the computer device can execute a system crash procedure for the target virtual machine, so that the target device cannot access the target memory page.

[0104] Alternatively, for example, if a DMAR error is registered with a corresponding interrupt vector number, the computer device can also identify and determine whether a DMAR error exists by using the interrupt vector number corresponding to the DMAR error.

[0105] In this embodiment, when the aforementioned target mapping relationship does not exist in the target page table, a system crash procedure for the target virtual machine is executed. After the target virtual machine's system crashes, no further processes can continue to execute, thus preventing the target device from accessing the target memory page and avoiding illegal DMA operations accessing the target memory page.

[0106] Furthermore, in some embodiments, the computer device can also perform memory swapping based on the identifier of the initial memory page described above. For example, as a possible implementation, the computer device can also, in response to a memory swapping request, determine the memory page to be swapped out from the initial memory pages having a target identifier. Here, the target identifier is a first identifier used to characterize that data in the initial memory page is currently allowed to be swapped out.

[0107] Optionally, the aforementioned memory swap-out request can be automatically generated by the computer device when it determines that memory swapping is necessary. Alternatively, the computer device can also receive the aforementioned memory swap-out request sent to it by other electronic devices besides the computer device. Furthermore, the computer device can also respond to a user-triggered memory swap-out request. It should be understood that the way the computer obtains the aforementioned memory swap-out request can refer to any existing memory swapping method, which will not be elaborated here.

[0108] Optionally, the memory swapping request may include, for example, the number of memory pages to be swapped out. Alternatively, in some embodiments, the memory swapping request may also include, for example, a target location for the memory swapping. The computer device may, for example, determine an initial memory page among the initial memory pages that identifies a data page currently allowed for memory swapping, and if this initial memory page is a cold page (a memory page in a low-access state, i.e., a memory page accessed less frequently), then designate this initial memory page as the memory page to be swapped out. Then, optionally, the computer device may, for example, swap the data from the memory page to be swapped out to the target location. Alternatively, the target location may also be a storage space predetermined by the computer device for memory swapping. This disclosure does not limit the target location for the memory swapping.

[0109] In some embodiments, the computer device may further split the memory page to be swapped out into multiple smaller pages in response to the latter being a large page, and swap out the multiple smaller pages from memory. The large page can store more data than the smaller pages can store.

[0110] For example, a computer device can determine whether a memory page to be swapped out is a large page based on its attribute information. For instance, the attribute information of the memory page to be swapped out may include the amount of data that can be stored on the page. The computer device can determine that the memory page to be swapped out is a large page if the amount of data that can be stored on the page is greater than or equal to a preset amount, and determine that the memory page to be swapped out is a small page if the amount of data that can be stored on the page is less than the preset amount. Alternatively, the attribute information of the memory page to be swapped out may include attribute information indicating whether the memory page to be swapped out is a large page. The computer device can directly read this attribute information to determine whether the memory page to be swapped out is a large page.

[0111] Optionally, the computer device may, for example, split the memory page to be swapped out into multiple smaller pages of the same size that can store data. It should be understood that this disclosure does not limit the number of smaller pages into which the memory page to be swapped out can be split.

[0112] Alternatively, the computer device may swap out multiple small pages from memory in a manner similar to any existing method for swapping out data stored in small page-type memory pages.

[0113] If the memory page to be swapped out is a small page, the computer device may, for example, directly swap out the data in the memory page to be swapped out.

[0114] In this embodiment, the memory page to be swapped out is determined based on the initial memory page identified in the initial memory page that indicates that the data in the initial memory page is currently allowed to be swapped out. This ensures that the data in the memory page to be swapped out is currently allowed to be swapped out, avoiding interference with the operation of computer processes during memory swapping out. By splitting the memory page to be swapped out (of large page type) into multiple smaller pages before swapping it out, the management granularity of memory swapping out is reduced, and the efficiency of memory swapping out is improved.

[0115] In some embodiments, in response to the memory page to be swapped out being a large page, the computer device may, for example, split the first entry in the target page table that records the mapping relationship between the physical address and the virtual address of the memory page to be swapped out into second entries corresponding to each small page.

[0116] Optionally, the computer device can split the first entry into multiple second entries by increasing the page table level. For example, assuming the page table level of the first entry is level one (P1), the computer device can create new level two (P2) page table entries and point the first-level page table entries to these multiple level two page table entries, thus splitting the first entry into second entries corresponding to each smaller page. Alternatively, the computer device can also directly split the first entry corresponding to a large page into multiple second entries corresponding to smaller pages within the target page table structure by splitting page table entries. For example, the computer device can first create a new page table entry for each smaller page, then point the second entry corresponding to each smaller page to the corresponding physical memory address, and replace the first entry corresponding to the large page with a pointer to the newly created second entry corresponding to the smaller page.

[0117] For example, assuming the computer device splits the memory page to be swapped out into n smaller pages, the computer device can split the first entry in the target page table into n second entries.

[0118] The computer device can also, in response to a memory swap-in request, determine the memory page from which the swapped-in data is to be received, as indicated by the memory swap-in request. Optionally, the computer device may obtain the aforementioned memory swap-in request in any existing method for obtaining a memory swap-in request. The aforementioned memory page from which the swapped-in data is to be received may be the memory page where the swapped-in data is stored when the computer device performs a memory swap.

[0119] Then, in response to the second identifier of the memory page to be received for swapping in, which indicates that the data in the memory page is currently and in the future allowed for memory swapping, the computer device may fill in the mapping relationship between the physical address and virtual address of the corresponding page in the multiple second entries of the memory page to be received for swapping in the target page table.

[0120] For example, assuming that the memory page to be received corresponds to n second entries, then for any second entry, the computer device can fill in the mapping relationship between the physical address and the virtual address of the page corresponding to the second entry.

[0121] It should be understood that this disclosure does not limit how a computer device obtains the mapping relationship between the physical address and virtual address of each page. The implementation method for a computer device to obtain the mapping relationship between the physical address and virtual address of a page can refer to existing memory swapping methods, such as memory swapping methods based on EPT page tables or fast memory swapping methods based on reverse mapping (rmap).

[0122] Computer devices can, for example, swap the data indicated by the memory swap request into memory using small page swapping.

[0123] For example, the above-mentioned method of small page swapping can be either parallel swapping of small pages or serial swapping of small pages.

[0124] Taking the method of parallel swapping of small pages to swap the data indicated by the memory swapping request as an example, for instance, assuming that the memory page of the above-mentioned data to be swapped in corresponds to n small pages of the large page type, the computer device can, for example, swap the data corresponding to each small page into each small page in parallel, thereby improving the efficiency of memory swapping.

[0125] By creating multiple second entries in the target page table corresponding to the memory page receiving the swapped-in data, the mapping relationship between the physical address and virtual address of each small page is recorded by a corresponding second entry. This avoids swap-in race conditions that may occur during small page swapping (e.g., in the case of parallel small page swapping, two small pages may be swapped in simultaneously. If there are no multiple second entries in the target page table, the first small page swap may update the mapping relationship of the first entry, filling in the address of the swapped-in small page, while the second page may update the first entry again, causing the first update to be lost and leading to data errors, i.e., swap-in race conditions). This improves the efficiency of memory swapping while ensuring the correctness of the target page table.

[0126] In some embodiments, after the computer device performs memory swapping of the data indicated by the memory swapping request via small page swapping, it may also merge multiple second entries in the target page table to obtain the first entry.

[0127] Optionally, the computer device may, for example, merge the mapping relationships filled in multiple second entries into a first mapping relationship, and fill the first mapping relationship into the first entry. Herein, the first mapping relationship is the mapping relationship between the physical address and the virtual address of the aforementioned large page.

[0128] For example, assuming that the memory pages of the large page type to be received correspond to n small pages, i.e. n second entries, and each second entry is filled with a mapping relationship between the physical address and virtual address of a small page, the computer device can, for example, create a first entry in the target page table. This first entry is filled with the mapping relationship between the physical address and virtual address of the n small pages corresponding to a large page, and the mapping relationship in the n second entries is deleted. This merges the mapping relationships filled in multiple second entries into a first mapping relationship, and fills the first mapping relationship into the first entry, thereby merging multiple second entries to obtain the first entry.

[0129] In some embodiments, the computer device may, for example, swap the corresponding data of each small page into memory sequentially according to a preset data writing order.

[0130] Using the above method, after splitting a large page into smaller pages for memory swapping out, the computer device responds to the memory swapping request. After the memory swapping is completed, the target page table still records the mapping relationship between the physical address and the virtual address corresponding to the large page. This ensures that when accessing the large page using the target page table later, only the mapping relationship corresponding to the large page needs to be called, thus improving the efficiency of subsequent memory access.

[0131] Furthermore, taking the execution entity that "in response to a direct memory access operation of the target device, determines the target virtual address corresponding to the direct memory access operation, and in response to the absence of a target mapping relationship in the target page table, executes the target process to prevent the target device from accessing the target memory page" and the execution entity that performs the relevant steps of memory swapping as two subsystems of the computer device as examples, for instance, the execution entity that "in response to a direct memory access operation of the target device, determines the target virtual address corresponding to the direct memory access operation, and in response to the absence of a target mapping relationship in the target page table, executes the target process to prevent the target device from accessing the target memory page" could be the tagging subsystem of the computer device, and the execution entity that performs the relevant steps of memory swapping could be the swapping subsystem of the computer device. This is because the tagging subsystem and the swapping subsystem that call the target page table (e.g., the IOMMU page table) can each have their own locks (i.e., different locks) to ensure the correctness of the target page table; therefore, the update operation of the target page table does not require holding a lock. By setting the aforementioned flag for the memory page, the tagged memory page can be prevented from being operated on by both subsystems simultaneously. In other words, in some embodiments, after the tagging subsystem marks the candidate memory, the swapping subsystem can use this identifier to avoid the swapping subsystem from operating on the same memory page again, thus avoiding race conditions where simultaneous operations are possible.

[0132] Taking a computer device equipped with an operating system and a virtualization layer, and the memory access method described in any of the above embodiments applied to the virtualization layer and a virtual machine deployed in the computer device as an example, Figure 3 is a flowchart illustrating another memory access method provided in this disclosure. As shown in Figure 3, the method may include:

[0133] S201. Obtain the first identifier of multiple initial memory pages in the IOMMU page table.

[0134] The first identifier can be used to characterize whether the data in the initial memory page is currently allowed for memory swapping. This I / O device is the target device described in any of the foregoing embodiments.

[0135] The IOMMU page table is used to record the mapping relationship between virtual addresses and physical addresses. This IOMMU page table is the target page table described in any of the foregoing embodiments.

[0136] S202. For any initial memory page, in response to the first identifier of the initial memory page used to indicate that the data in the initial memory page is currently allowed to be swapped in memory, delete the mapping relationship between the physical address and virtual address of the initial memory page in the IOMMU page table.

[0137] S203. In response to a direct memory access operation of an I / O device, determine the target virtual address corresponding to the direct memory access operation.

[0138] S204. In response to the absence of a target mapping relationship in the IOMMU page table, execute the system crash procedure of the target virtual machine to prevent the I / O device from accessing the target memory page.

[0139] Here, the target mapping relationship refers to the mapping relationship between the target virtual address and the physical address of the target memory page. The target virtual machine is the virtual machine that the target device wants to access through direct memory access operations.

[0140] The memory access method is illustrated by example using the following embodiment:

[0141] Taking the aforementioned lightweight virtualization layer as an example, firstly, this lightweight virtualization layer can tag memory pages to distinguish different memory attributes. For instance, for DMA operations via the kernel's standard DMA interface, the virtualization layer can update the first identifier of the memory page in a timely manner through the tagging interface. Alternatively, in some embodiments, the virtualization layer can also receive tags of memory pages from technicians.

[0142] For example, the first identifier of a memory page can be one of the following four types: NORM_FLAG, DEV_FLG, DMA_FLAG, and RESV_FLAG. NORM_FLAG indicates that the data in the memory page is currently allowed for memory swapping and will always be allowed for memory swapping in the future. DEV_FLG indicates that the data in the memory page is currently allowed for memory swapping but may become disallowed for memory swapping in the future. DMA_FLAG indicates that the data in the memory page is currently disallowed for memory swapping but may become allowed for memory swapping in the future. RESV_FLAG indicates that the data in the memory page is currently disallowed for memory swapping and will always be disallowed for memory swapping in the future.

[0143] The virtualization layer can remove the mapping between the physical and virtual addresses of memory pages with the 'DEV_FLAG' flag from the IOMMU page table. For memory pages that are not 'DEV_FLAG', if the IOMMU page table does not include the mapping between the physical and virtual addresses of that memory page, the virtualization layer adds the mapping between the physical and virtual addresses of that memory page to the IOMMU page table.

[0144] Using the above method, if an application involving DMA operations attempts to access a memory page that is marked with DEV_FLAG instead of DMA_FLAG as the first identifier, the mapping between the physical and virtual addresses of the memory page with the first identifier DEV_FLAG will be removed from the IOMMU page table. This will cause a DMAR error. When the virtualization layer handles the fatal exception in vm_exit, if it determines that the exception is a DMAR exception, it will catch the exception and directly initiate the system crash procedure, thereby ensuring that illegal DMA operations do not corrupt the integrity of the data in the memory page.

[0145] Furthermore, this virtualization layer can also respond to memory swapping operations. For memory swapping scenarios, the following is a basic introduction to some existing memory swapping methods: The operating system can select memory pages in a cold state (referred to as cold pages) for release, and then perform memory page merging, data compression to other memory pages, or swapping to disk on the other hand. The memory page is then allocated to other processes with more urgent needs. When the original process needs it again, the data is swapped into a new memory page and returned to the original process.

[0146] The memory access method provided in this disclosure allows the virtualization layer to perform memory swapping on all other memory that is not reserved memory (reserved memory includes, for example, data stored in the memory pages of RESV_FLAG and DMA_FLAG), i.e., data stored in the memory pages of NORM_FLAG or DEV_FLAG.

[0147] During memory swapping, the virtualization layer swaps the memory data to be swapped out to the peripheral (i.e., external device) and removes the mapping between the physical address and virtual address of the swapped-out page from the EPT page table and the iommu page table to ensure that the memory page cannot be accessed again before data is allocated.

[0148] For data stored in memory pages marked with NORM_FLAG or DEV_FLAG, the virtualization layer can mark memory pages identified as DEV_FLAG as memory swap requests by adding the iommu field. It should be understood that for memory swap requests marked with this iommu field, since the corresponding mapping relationship recorded in the iommu page table has already been deleted during the aforementioned marking process, it is not necessary to repeat the deletion operation of this mapping relationship in the iommu page table during memory swapping out. Then, the virtualization layer can split and swap out large page types of memory pages, that is, split the data in the large page into smaller pages for swapping out (e.g., split a 2MB large page into 4KB smaller pages for memory swapping out, until completely swapped out or the swapping is canceled). Additionally, it can split the first entry (level 2) of the large page recorded in the iommu page table into multiple second entries (level 1) corresponding to the smaller pages, preparing for subsequent swapping in and avoiding the loss of mapping relationships in the iommu page table due to swapping race conditions.

[0149] The virtualization layer can respond to the cancellation of the swap-out process or the triggering of a swap-in operation after swapping out by swapping in the small pages of memory that have already been swapped out, and establish its EPT page table and IOMMU page table.

[0150] In some embodiments, for memory swap requests marked with an iommu field, it is not necessary to rebuild the aforementioned page tables EPT and iommu. Instead, the second entry at level 1 needs to be reorganized into a first entry at level 2. This first entry records the mapping between the physical and virtual addresses of multiple small pages corresponding to larger pages. For memory swap requests marked with an iommu field, in some embodiments, after each small page is swapped in, the virtualization layer can fill the mapping between the physical and virtual addresses of that small page into the second entry of the corresponding iommu page table. After all small pages have been swapped in, the virtualization layer can reorganize the second entry at level 1 in the iommu page table into a first entry at level 2, thereby completing the update of the iommu page table.

[0151] Figure 4 is a schematic diagram of a memory access device provided in this disclosure. This memory access device 30 can be applied to the computer device described in any of the foregoing embodiments. As shown in Figure 4, the memory access device 30 may include: a determining module 31 and an execution module 32.

[0152] The determination module 31 is used to determine the target virtual address corresponding to the direct memory access operation in response to the direct memory access operation of the target device.

[0153] Execution module 32 is configured to execute a target process in response to the absence of a target mapping relationship in the target page table, thereby preventing the target device from accessing the target memory page. The target page table records the mapping relationship between virtual addresses and physical addresses, where the target mapping relationship is the mapping relationship between the target virtual address and the physical address of the target memory page.

[0154] Optionally, the memory access device 30 may further include an acquisition module 33, configured to acquire a first identifier of multiple initial memory pages before executing the target process in response to the absence of a target mapping relationship in the target page table. The first identifier indicates whether the data in the initial memory page is currently data that allows memory swapping; the initial memory page includes the target memory page and memory pages to be accessed by other access operations besides the direct memory access operation. Optionally, the memory access device 30 may further include a processing module 34, configured to, for any initial memory page, in response to the first identifier of the initial memory page indicating that the data in the initial memory page is currently data that allows memory swapping, delete the mapping relationship between the physical address and virtual address of that initial memory page in the target page table.

[0155] Optionally, the acquisition module 33 is specifically used to determine the first identifier of the initial memory page based on the interface type that needs to be called to access the initial memory page. Alternatively, the acquisition module 33 is specifically used to receive the first identifier of the initial memory page.

[0156] Optionally, the processing module 34 is further configured to, in response to the first identifier of the initial memory page being used to characterize that the data in the initial memory page is currently not allowed to be swapped in memory, and that there is no mapping relationship between the physical address and virtual address of the initial memory page in the target page table, add the mapping relationship between the physical address and virtual address of the initial memory page to the target page table.

[0157] Optionally, the processing module 34 is further configured to, in response to a memory swap-out request, determine a memory page to be swapped out from the initial memory pages having a target identifier; and, in response to the memory page to be swapped out being a large page, split the memory page to be swapped out into multiple smaller pages, and swap out the multiple smaller pages. The target identifier is a first identifier used to characterize that the data in the initial memory page is currently allowed to be swapped in memory; the amount of data that the large page can store is greater than the amount of data that the small page can store.

[0158] Optionally, the processing module 34 is further configured to, in response to the memory page to be swapped out being a large page, split the first entry in the target page table that records the mapping relationship between the physical address and virtual address of the memory page to be swapped out into a second entry corresponding to each of the small pages.

[0159] Optionally, the processing module 34 is further configured to, in response to a memory swap-in request, determine the memory page to which the swap-in data to be received is indicated by the memory swap-in request; in response to a second identifier of the memory page to which the swap-in data is to be received, which is used to characterize that the data of the memory page is currently and in the future allowed to be swapped in memory, fill in the mapping relationship between the physical address and virtual address of the corresponding small page in the target page table for the multiple second entries corresponding to the memory page to which the swap-in data is to be received; and perform memory swap-in of the data indicated by the memory swap-in request by means of small page swap-in.

[0160] Optionally, the processing module 34 is further configured to merge the plurality of second entries to obtain the first entry after the data indicated by the memory swap request is swapped into memory by means of small page swapping.

[0161] Optionally, the computer device is configured with an operating system and a virtualization layer; the memory access method is applied to the virtualization layer. The computer device is not the target device; the target memory page belongs to the memory of the computer device.

[0162] Optionally, taking a computer device with a virtual machine deployed in it, and the target process being a system crash process for the target virtual machine as an example, the execution module 32 is specifically used to execute the system crash process for the target virtual machine in response to the absence of the target mapping relationship in the target page table, so that the target device cannot access the target memory page. Here, the target virtual machine is the virtual machine that the target device wants to access through the direct memory access operation.

[0163] The memory access device 30 provided in this disclosure is used to execute the aforementioned memory access method embodiments. Its implementation principle and technical effect are similar, and will not be described in detail here.

[0164] Figure 5 is a schematic diagram of another memory access device provided in this disclosure. This memory access device 40 can be applied to the virtualization layer described in any of the foregoing embodiments. As shown in Figure 5, the memory access device 40 may include: an acquisition module 41, a deletion module 42, a determination module 43, and an execution module 44.

[0165] The acquisition module 41 is used to acquire the first identifier of multiple initial memory pages in the IOMMU page table. The first identifier indicates whether the data in the initial memory page is currently allowed for memory swapping; the IOMMU page table records the mapping relationship between virtual addresses and physical addresses.

[0166] The deletion module 42 is configured to, for any of the initial memory pages, in response to a first identifier of the initial memory page indicating that the data in the initial memory page is currently allowed to be swapped in memory, delete the mapping relationship between the physical address and virtual address of the initial memory page in the IOMMU page table.

[0167] The determination module 43 is used to determine the target virtual address corresponding to the direct memory access operation in response to the direct memory access operation of the I / O device.

[0168] Execution module 44 is configured to, in response to the absence of a target mapping relationship in the IOMMU page table, execute a system crash procedure for the target virtual machine, thereby preventing the I / O device from accessing the target memory page. The target mapping relationship is the mapping relationship between the target virtual address and the physical address of the target memory page; the target virtual machine is the virtual machine that the target device intends to access through the direct memory access operation.

[0169] The memory access device 40 provided in this disclosure is used to execute the aforementioned memory access method embodiments. Its implementation principle and technical effect are similar, and will not be described in detail here.

[0170] Figure 6 is a schematic diagram of the hardware structure of an electronic device provided in this disclosure. This electronic device can be, for example, the computer device described in any of the foregoing embodiments. The electronic device 50 shown in Figure 6 includes a memory 51, a processor 52, and a communication interface 53. The memory 51, processor 52, and communication interface 53 are communicatively connected to each other. For example, the memory 51, processor 52, and communication interface 53 can be connected via a network. Alternatively, the electronic device 50 may also include a bus 54. The memory 51, processor 52, and communication interface 53 are communicatively connected to each other via the bus 54. Figure 6 shows an electronic device 50 in which the memory 51, processor 52, and communication interface 53 are communicatively connected to each other via the bus 54.

[0171] The memory 51 can be a read-only memory (ROM), a static storage device, a dynamic storage device, or a random access memory (RAM). The memory 51 can store programs, and when the program stored in the memory 51 is executed by the processor 52, the processor 52 and the communication interface 53 are used to execute the memory access method described in any of the foregoing embodiments. The memory can also store data required by the memory access method.

[0172] The processor 52 can be a general-purpose CPU, microprocessor, application-specific integrated circuit (ASIC), graphics processing unit (GPU), or one or more integrated circuits.

[0173] Processor 52 can also be an integrated circuit chip with signal processing capabilities. In implementation, the memory access of this disclosure can be completed through integrated logic circuits in the hardware of processor 52 or through software instructions. The processor 52 can also be a general-purpose processor, digital signal processor (DSP), application-specific integrated circuit (ASIC), field-programmable gate array (FPGA), or other programmable logic devices, discrete gate or transistor logic devices, or discrete hardware components, capable of implementing or executing the methods, steps, and logic block diagrams disclosed in the following embodiments of this disclosure. A general-purpose processor can be a microprocessor or any conventional processor. The steps of the methods disclosed in the following embodiments of this disclosure can be directly implemented by a hardware decoding processor, or by a combination of hardware and software modules in the decoding processor. The software modules can reside in random access memory, flash memory, read-only memory, programmable read-only memory, electrically erasable programmable memory, registers, or other mature storage media in the art. This storage medium is located in memory 51, and processor 52 reads information from memory 51 and, in conjunction with its hardware, completes the memory access of this disclosure.

[0174] Communication interface 53 uses transceiver modules, such as, but not limited to, transceivers, to enable communication between electronic device 50 and other devices or communication networks. For example, data sets can be acquired through communication interface 53.

[0175] When the aforementioned electronic device 50 includes a bus 54, the bus 54 may include a path for transmitting information between various components of the electronic device 50 (e.g., memory 51, processor 52, communication interface 53).

[0176] This disclosure also provides a computer-readable storage medium, which may include various media capable of storing program code, such as a USB flash drive, a portable hard drive, a read-only memory (ROM), a random access memory (RAM), a magnetic disk, or an optical disk. Specifically, the computer-readable storage medium stores program instructions that are used in the methods described in the above embodiments.

[0177] This disclosure also provides a program product including executable instructions stored in a readable storage medium. At least one processor of an electronic device can read the executable instructions from the readable storage medium, and the execution of the executable instructions by the at least one processor causes the electronic device to implement the memory access methods provided in the various embodiments described above.

[0178] The term "multiple" in this document refers to two or more. The term "and / or" is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A alone, A and B simultaneously, or B alone. Furthermore, the character " / " in this document generally indicates an "or" relationship between the preceding and following related objects; in formulas, the character " / " indicates a "division" relationship between the preceding and following related objects. Additionally, it should be understood that in the descriptions of this disclosure, terms such as "first" and "second" are used only for descriptive purposes and should not be construed as indicating or implying relative importance or order.

[0179] It is understood that the various numerical designations used in the embodiments of this disclosure are merely for descriptive convenience and are not intended to limit the scope of the embodiments of this disclosure.

[0180] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of this disclosure, and are not intended to limit them. Although this disclosure has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features therein. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of this disclosure.

Claims

1. A memory access method, wherein, The method includes: In response to a direct memory access operation of the target device, determine the target virtual address corresponding to the direct memory access operation; In response to the absence of a target mapping relationship in the target page table, a target process is executed to prevent the target device from accessing the target memory page; the target page table is used to record the mapping relationship between virtual addresses and physical addresses, and the target mapping relationship is the mapping relationship between the target virtual address and the physical address of the target memory page.

2. The method according to claim 1, wherein, Before executing the target process in response to the absence of a target mapping relationship in the target page table, the method further includes: Obtain a first identifier for multiple initial memory pages; the first identifier is used to indicate whether the data in the initial memory page is currently allowed to be swapped in memory; the initial memory page includes: the target memory page and memory pages to be accessed by other access operations besides the direct memory access operation; For any of the initial memory pages, in response to the first identifier of the initial memory page indicating that the data in the initial memory page is currently allowed to be swapped in memory, the mapping relationship between the physical address and virtual address of the initial memory page in the target page table is deleted.

3. The method according to claim 2, wherein, The step of obtaining the first identifier of multiple initial memory pages includes: Based on the type of interface to be called to access the initial memory page, determine the first identifier of the initial memory page; or, Receive the first identifier of the initial memory page.

4. The method according to claim 2 or 3, wherein, The method further includes: In response to the first identifier of the initial memory page being used to indicate that the data in the initial memory page is currently not allowed to be swapped in memory, and there is no mapping relationship between the physical address and virtual address of the initial memory page in the target page table, the mapping relationship between the physical address and virtual address of the initial memory page is added to the target page table.

5. The method according to any one of claims 2-4, wherein, The method further includes: In response to a memory swap-out request, a memory page to be swapped out is determined from the initial memory pages having a target identifier; the target identifier is a first identifier used to characterize that the data in the initial memory page is currently allowed to be swapped out. In response to the memory page to be swapped out being a large page, the memory page to be swapped out is split into multiple small pages, and the multiple small pages are swapped out of memory; the amount of data that the large page can store is greater than the amount of data that the small page can store.

6. The method according to claim 5, wherein, The method further includes: In response to the fact that the memory page to be swapped out is a large page, the first entry in the target page table that records the mapping relationship between the physical address and the virtual address of the memory page to be swapped out is split into a second entry corresponding to each of the small pages.

7. The method according to claim 6, wherein, The method further includes: In response to a memory swap-in request, determine the memory page from which the swap-in data is to be received, as indicated by the memory swap-in request; In response to the second identifier of the memory page to be received for swapping in, which is used to indicate that the data of the memory page is currently and in the future allowed for memory swapping, the mapping relationship between the physical address and virtual address of the corresponding small page of the second entry in the target page table is respectively filled into the multiple second entries corresponding to the memory page to be received for swapping in. The data indicated by the memory swap request is swapped into memory using a small page swapping method.

8. The method according to claim 7, wherein, After swapping the data indicated by the memory swap request into memory using the small page swapping method, the method further includes: The first entry is obtained by merging the multiple second entries in the target page table.

9. The method according to any one of claims 1-8, wherein, The computer device is equipped with an operating system and a virtualization layer; the memory access method is applied to the virtualization layer; the computer device is not the target device; the target memory page belongs to the memory of the computer device.

10. The method according to claim 9, wherein, The computer device deploys a virtual machine, the target process is the system crash process of the target virtual machine, and the response that no target mapping relationship exists in the target page table, executing the target process, includes: In response to the absence of the target mapping relationship in the target page table, a system crash procedure for the target virtual machine is executed to prevent the target device from accessing the target memory page; the target virtual machine is the virtual machine that the target device wants to access through the direct memory access operation.

11. A memory access method, wherein, Computer equipment is equipped with an operating system and a virtualization layer; The memory access method is applied to the virtualization layer, and the computer device has a virtual machine deployed thereon. The method includes: Obtain the first identifier of multiple initial memory pages from the IOMMU page table; the first identifier is used to indicate whether the data in the initial memory page is currently allowed to be swapped in memory; the IOMMU page table is used to record the mapping relationship between virtual addresses and physical addresses; For any of the initial memory pages, in response to the first identifier of the initial memory page indicating that the data in the initial memory page is currently allowed to be swapped in memory, the mapping relationship between the physical address and virtual address of the initial memory page in the IOMMU page table is deleted; In response to a direct memory access operation of an input / output (I / O) device, determine the target virtual address corresponding to the direct memory access operation; In response to the absence of a target mapping relationship in the IOMMU page table, a system crash procedure for the target virtual machine is executed to prevent the I / O device from accessing the target memory page; the target mapping relationship is the mapping relationship between the target virtual address and the physical address of the target memory page; the target virtual machine is the virtual machine that the target device wants to access through the direct memory access operation.

12. A memory access device, wherein, The device includes: A determination module is configured to determine the target virtual address corresponding to the direct memory access operation in response to the direct memory access operation of the target device; An execution module is used to execute a target process in response to the absence of a target mapping relationship in the target page table, so that the target device cannot access the target memory page; the target page table is used to record the mapping relationship between virtual addresses and physical addresses, and the target mapping relationship is the mapping relationship between the target virtual address and the physical address of the target memory page.

13. A computer-readable storage medium, wherein, The computer-readable storage medium stores computer-executable instructions, which, when executed by a processor, are used to implement the method as described in any one of claims 1-11.

14. A computer program product, wherein, Includes a computer program that, when executed by a processor, implements the method as described in any one of claims 1-11.

15. An electronic device, wherein, include: Processor and memory; The processor is communicatively connected to the memory; The memory stores computer instructions; The processor executes computer instructions stored in the memory to implement the method as described in any one of claims 1-11.

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