Printed wiring board

Abstract

A printed wiring board according to the present invention comprises a first interlayer insulation layer, a second interlayer insulation layer that is positioned on the surface of the first interlayer insulation layer on the outer layer side, and a skip via conductor that passes through the first interlayer insulation layer and the second interlayer insulation layer. The first interlayer insulation layer and the second interlayer insulation layer have different resin characteristics. The skip via conductor has a protruding part that projects in the shape of a wedge into the first interlayer insulation layer at the interface B between the first interlayer insulation layer and the second interlayer insulation layer. The protruding part may be electroplating that is continuous with a portion of the skip via conductor that is not the protruding part.

Description

printed wiring board

[0001] The present disclosure relates to printed wiring boards.

[0002] Conventionally, there is a technique that uses skip vias that penetrate multiple interlayer insulating layers in a printed wiring board in which multiple interlayer insulating layers and conductor layers are alternately stacked. Japanese Patent Application Laid-Open Publication No. 2017-123376 discloses a technique for transmitting signals by connecting skip vias to lands on the conductor layers that they penetrate.

[0003] One aspect of the present disclosure is as follows: [1] A printed wiring board comprising: a first interlayer insulating layer; a second interlayer insulating layer located on an outer surface of the first interlayer insulating layer; and a skip via conductor penetrating the first interlayer insulating layer and the second interlayer insulating layer, wherein the first interlayer insulating layer and the second interlayer insulating layer have different resin properties, and the skip via conductor has a protruding portion that protrudes in a wedge shape from the first interlayer insulating layer at the boundary between the first interlayer insulating layer and the second interlayer insulating layer. [2] The printed wiring board of [1], wherein the protruding portion is electrolytically plated to form a single unit with the remaining portion of the skip via conductor other than the protruding portion. [3] The printed wiring board of [1] or [2], wherein the first interlayer insulating layer and the second interlayer insulating layer have different resin components. [4] The printed wiring board of any one of [1] to [3], wherein the second interlayer insulating layer has a lower dielectric constant and a lower dielectric loss tangent than the first interlayer insulating layer. [5] The printed wiring board of any one of [1] to [4], wherein the resin component of the first interlayer insulating layer is an epoxy resin, and the resin component of the second interlayer insulating layer is a polyester resin. [6] The printed wiring board of any one of [1] to [5], wherein unevenness at the boundary between the skip via conductor and the first interlayer insulating layer is greater than unevenness at the boundary between the skip via conductor and the second interlayer insulating layer.

[0004] 1 is a cross-sectional view of a printed wiring board; FIG. 2 is a cross-sectional view showing an example of the shape of a skip via conductor; FIG. 3 is a cross-sectional view showing an example of the shape of a skip via conductor; FIG. 4 is a diagram showing a more detailed cross-sectional shape of a skip via conductor; and FIG. 5 is a diagram showing a manufacturing procedure for a printed wiring board.

[0005] DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described below with reference to the accompanying drawings. Fig. 1 is a cross-sectional view of a printed wiring board 100 according to the present embodiment.

[0006] Printed wiring board 100 has a core substrate 20 and buildup layers 10, 30 located on both sides of core substrate 20. Core substrate 20 has an interlayer insulating layer 21 and conductor layers 22, 23 located on both sides of interlayer insulating layer 21. Core substrate 20 may have a through hole 211. A portion of through hole 211 may pass through buildup layers 10, 30 together.

[0007] The interlayer insulating layer 21 is made of an insulating material such as resin. The conductor layers 22 and 23 are made of copper or the like. The conductor layers 22 and 23 are patterned according to the circuit wiring, the ground plane, and the like.

[0008] At least one of the buildup layers 10, 30 has multiple layers. Each of the buildup layers 10, 30 may have two or more layers. Each of the buildup layers 10, 30 has an interlayer insulating layer and a conductor layer. The buildup layer 10 includes an interlayer insulating layer 111, which is a first interlayer insulating layer, and an interlayer insulating layer 121, which is a second interlayer insulating layer located on the outer surface of the interlayer insulating layer 111, far from the core substrate 20. The buildup layer 30 includes an interlayer insulating layer 311 and an interlayer insulating layer 321 located on the outer surface of the interlayer insulating layer 311. Hereinafter, the side far from the core substrate 20 will be referred to as the outer side, and the side close to the core substrate 20 will be referred to as the inner side. The interlayer insulating layers 111, 121, 311, and 321 are resin layers and may contain a reinforcing material such as glass fiber. The interlayer insulating layer 111 and the interlayer insulating layer 121 have different resin properties. In particular, the interlayer insulating layer 111 and the interlayer insulating layer 121 have different etching characteristics for wet desmearing. For example, the outer interlayer insulating layer 121 may have a lower dielectric constant, i.e., a lower dielectric constant and a lower dielectric loss tangent, than the inner interlayer insulating layer 111. As an example, the interlayer insulating layer 111 may be an epoxy-based resin. The epoxy resin may be, for example, R-1551N manufactured by Panasonic Industries Co., Ltd. The interlayer insulating layer 121 may be a polyester-based resin. The polyester-based resin may be, for example, R-F705TZ manufactured by Panasonic Industries Co., Ltd. In this way, the resin properties of the printed wiring board 100 may be different due to the different resin components of the interlayer insulating layers 111 and 121.

[0009] The conductor layers 112, 122, 312, and 322 are each a metal conductor layer, and may be made of copper, for example, and are patterned according to circuit wiring, ground planes, and the like.

[0010] A via conductor 115 that connects the conductor layer 22 and the conductor layer 112 is located in the interlayer insulating layer 111. A via conductor 315 that connects the conductor layer 23 and the conductor layer 312 is located in the interlayer insulating layer 311. A via conductor 325 that connects the conductor layer 312 and the conductor layer 322 is located in the interlayer insulating layer 321. A skip via conductor 125 that passes through both the interlayer insulating layers 111 and 121 is located between the conductor layer 22 and the conductor layer 122. The via conductors 115, 315, 325 and the skip via conductor 125 have a tapered shape in which the cross-sectional size increases outward as they extend.

[0011] Next, the shape of the skip via conductor will be described in detail. FIGS. 2A and 2B are cross-sectional views showing examples of the shape of the skip via conductor 125. As shown in FIG. 2A , the skip via conductor 125 may have a tapered shape with a larger cross-sectional size toward the outside for each of the interlayer insulating layers 111 and 121, as described above. The skip via conductor 125 has a protruding portion 125 a that partially protrudes in a wedge shape along the interface B between the interlayer insulating layers 111 and 121. The wedge shape can be defined, for example, as a state in which the length of the protruding portion 125 a in the thickness direction gradually decreases from the center of the skip via conductor 125 toward the outside. In particular, the protruding portion 125 a may be biased toward the interlayer insulating layer 111, or may be formed only in the interlayer insulating layer 111. In other words, the cross-sectional size may change discontinuously along the interface between the interlayer insulating layers 111 and 121 in the thickness direction. The protruding portion 125 a has a continuous structure with the rest of the skip via conductor 125.

[0012] 2B , the skip via conductor 125 may have a tapered shape across the entire interlayer insulating layer 111 and the interlayer insulating layer 121. In addition, the skip via conductor 125 may have a wedge-shaped protrusion 125b that partially contacts the interface B, located mainly on the interlayer insulating layer 111 side of the interface B.

[0013] 3 is a diagram showing a more detailed cross-sectional shape of the skip via conductor 125. There is a difference in the boundary surface between the skip via conductor 125 and the interlayer insulating layers 111, 121. The boundary surface of the skip via conductor 125 along the interlayer insulating layer 121 has a shape that generally follows the overall tapered shape, whereas the boundary surface along the interlayer insulating layer 111 has unevenness. That is, the boundary surface along the interlayer insulating layer 111, which is more easily etched than the interlayer insulating layer 121, is more likely to have unevenness on the wall surface after laser processing due to etching in the desmearing process. As a result, in any cross section along the extension direction of the skip via conductor 125, the unevenness of the boundary between the skip via conductor 125 and the interlayer insulating layer 111 is greater than the unevenness of the boundary between the skip via conductor 125 and the interlayer insulating layer 121.

[0014] The magnitude of the unevenness may be evaluated, for example, by measuring the variation from a straight line along the average tapered shape, i.e., the variance or standard deviation of multiple points acquired at predetermined intervals. Alternatively, the magnitude of the unevenness may be evaluated more simply by measuring the distance of the point furthest from a straight line along the average tapered shape. The magnitude of such unevenness can be evaluated, for example, by analysis based on images taken with a scanning electron microscope.

[0015] 4 is a diagram showing the manufacturing procedure for printed wiring board 100. A prepreg made of a material corresponding to inner interlayer insulating layer 111 is laminated onto core substrate 20. Copper foil is laminated onto the surface of this prepreg (P1). Note that if copper foil is already on the surface of the prepreg, there is no need to laminate copper foil again.

[0016] Openings corresponding to the via conductors 115 are formed in the conductor layer 112 and the interlayer insulating layer 111 by laser processing (P2). A wet desmear process is performed using a permanganate solution to remove resin residues and the like from the interlayer insulating layer 111 in the openings (P3). A conductor film is formed in the openings and on the conductor layer 112 by electrolytic plating (P4).

[0017] A resist film is formed on the conductor film using a dry film. A resist pattern is formed by exposure and development (P5). Necessary portions of the copper foil and electrolytic plating layer are left by etching according to the resist pattern, thereby obtaining wiring and a conductor surface (P6).

[0018] A prepreg made of a material corresponding to the outer interlayer insulating layer 121 is laminated on the inner conductor layer 112 and interlayer insulating layer 111. As described above, the prepreg corresponding to the interlayer insulating layer 121 is different from the prepreg corresponding to the interlayer insulating layer 111. Copper foil is laminated on the surface of this prepreg (P7). Note that if copper foil is already on the surface of the prepreg, there is no need to laminate copper foil again.

[0019] Openings corresponding to the skip via conductors 125 are formed in the conductor layers 122, 112 and the interlayer insulating layers 121, 111 by laser processing (P8). A wet desmear process is performed using a permanganate solution to remove resin residue and other residues from the interlayer insulating layers 121, 111 within the openings (P9). By appropriately adjusting the temperature and / or time conditions of the wet desmear process, the size of the protrusions 125a, 125b and the degree of unevenness at the boundary between the interlayer insulating layer 111 and the skip via conductors 125 can be suitably determined. A conductor layer is formed in the openings and on the conductor layer 122 by electroplating (P10). At this time, electroplated protrusions 125a or 125b are obtained that are integrally connected to the skip via conductors 125, depending on the unevenness of the wall surface of the interlayer insulating layer 111.

[0020] A resist film is formed on the conductor film using a dry film. A resist pattern is formed by exposure and development (P11). Necessary portions of the copper foil layer and electrolytic plating layer are left by etching according to the resist pattern, thereby obtaining wiring and a conductor surface (P12).

[0021] A solder resist is formed on the surface of the outer layer, and surface treatment is performed (P13), thereby obtaining printed wiring board 100. Examples of surface treatment include organic coating with flux or Ni-Au plating.

[0022] As described above, the resin etching characteristics of the two penetrating interlayer insulating layers 111 and 121 are different, so that the layer that is more easily etched during the desmearing process is etched first. Because the inner interlayer insulating layer 111 is more easily etched than the interlayer insulating layer 121, etching of the interlayer insulating layer 111 progresses discontinuously at the interface between the interlayer insulating layer 111 and the interlayer insulating layer 121. When electrolytic plating is performed on the surface of the etched opening in this manner, the electrolytic plating penetrates into the interlayer insulating layer 111, particularly at the interface with the interlayer insulating layer 121. The inner interlayer insulating layer 111, which is more easily etched, is made of an epoxy resin or the like, which makes it easier to obtain a desired shape on the wall surface of the skip via conductor 125. However, the inner interlayer insulating layer 111 is not limited to a low-dielectric material. It may be made of any material that is relatively more easily etched than the outer interlayer insulating layer 121.

[0023] With such a shape, even if deformation occurs due to heating or the like, the possibility of the skip via conductor 125 coming out of the interlayer insulating layer 111 and the interlayer insulating layer 121 is reduced. In addition, the outer interlayer insulating layer 121 and the like are also less likely to peel off from the interlayer insulating layer 111 and the conductor layer 112.

[0024] As described above, the printed wiring board 100 of this embodiment includes an interlayer insulating layer 111, an interlayer insulating layer 121 located on the outer surface of the interlayer insulating layer 111, and a skip via conductor 125 penetrating the interlayer insulating layer 111 and the interlayer insulating layer 121. The interlayer insulating layer 111 and the interlayer insulating layer 121 have different resin properties. The skip via conductor 125 has protrusions 125a and 125b that protrude in a wedge shape from the interlayer insulating layer 111 at the interface B between the interlayer insulating layer 111 and the interlayer insulating layer 121. In the printed wiring board 100 having such protrusions 125a and 125b, the protrusions 125a and 125b reduce deformation and movement of the interlayer insulating layers 111 and 121 in the thickness direction. This increases the bonding strength of the interlayer insulating layers 111 and 121 to the core substrate 20, thereby reducing peeling. In particular, since the upper ends of the protrusions 125a and 125b are substantially perpendicular to the inner surface of the interlayer insulating layer 121 in the thickness direction, the possibility of the skip via conductor 125 slipping relative to the interlayer insulating layer 121 is further reduced.

[0025] Furthermore, the protrusions 125a and 125b may be formed by electroplating in a continuous manner with other portions of the skip via conductor 125 than the protrusions 125a and 125b. That is, the protrusions 125a and 125b do not have to be formed separately from the skip via conductor 125. The protrusions 125a and 125b may be formed in accordance with the unevenness of the interlayer insulating layer 111 when the skip via conductor 125 is formed by electroplating. Such an integrated structure improves the strength of the skip via conductor 125 and reduces peeling.

[0026] Furthermore, the interlayer insulating layer 111 and the interlayer insulating layer 121 may have different resin components. That is, the difference in resin properties may depend on the difference in resin components. This allows a stable difference in resin properties to be obtained between the interlayer insulating layers 111 and 121, thereby reliably forming the protrusions 125a and 125b. Therefore, peeling of the skip via conductor 125 and the interlayer insulating layers 111 and 121 is further reduced.

[0027] Furthermore, the interlayer insulating layer 121 may have a lower dielectric constant and dielectric loss tangent than the interlayer insulating layer 111. In this way, the interlayer insulating layer 111 having a resin configuration that realizes the low dielectric property of the outer interlayer insulating layer 121 is more likely to be resin-etched during the desmearing process. Therefore, the protrusions 125 a, 125 b are more likely to be selectively formed in the interlayer insulating layer 111 as described above.

[0028] The resin component of interlayer insulating layer 111 may be an epoxy resin, and the resin component of interlayer insulating layer 121 may be a polyester resin. By selecting such materials, protrusions 125a, 125b can be formed easily, at low cost, and stably, and peeling of interlayer insulating layers 111, 121 can be reduced.

[0029] Furthermore, the unevenness at the boundary between skip via conductor 125 and interlayer insulating layer 111 may be larger than the unevenness at the boundary between skip via conductor 125 and interlayer insulating layer 121. As a result of the above-described characteristics, unevenness is likely to occur not only in protrusions 125a and 125b but also in interlayer insulating layer 111. This allows skip via conductor 125 to more firmly bond interlayer insulating layers 111 and 121, reducing peeling in printed wiring board 100.

[0030] The above embodiment is merely an example, and various modifications are possible. For example, although the desmear characteristics of the interlayer insulating layers 111 and 121 are preferably made different depending on the difference in dielectric properties in the above embodiment, the desmear characteristics may be made different depending on other conditions.

[0031] Although the above describes the magnitude of unevenness at the boundary between interlayer insulating layers 111, 121 and skip via conductors 125, this is not limited to the above. For example, the magnitude of unevenness at the boundary can also change depending on a reinforcing material such as glass fiber in the prepreg used to form interlayer insulating layers 111, 121.

[0032] In the above description, the resin components of the interlayer insulating layers 111 and 121 are different, but even if the components are the same, the resin properties may differ depending on the forming conditions, etc. In other words, the interlayer insulating layers 111 and 121 may be the same resin component but have different resin properties.

[0033] Although the above description has been given assuming that the protrusions 125 a and 125 b are integral with the skip via conductor 125 by electrolytic plating, this is not limiting. A conductor portion formed separately in a gap obtained by removing the outer end face of the interlayer insulating layer 111 may be joined to the skip via conductor 125.

[0034] Furthermore, the shapes of the protrusions 125 a and 125 b are not limited to the shapes exemplified above. The uneven shape on the interlayer insulating layer 111 side may be any shape as long as they are in contact with the lower surface of the interlayer insulating layer 121 in a substantially flat shape.

[0035] The above description has been given with reference to an example of skip via conductors 125 in buildup layers 10 laminated on core substrate 20. However, a printed wiring board such as a laminated substrate that does not have a core substrate may have the skip via conductors of the present disclosure.

[0036] In addition, the specific details of the structure, configuration, material, size, etc. shown in the above embodiment can be appropriately changed without departing from the spirit of this disclosure. The scope of the present invention includes the scope of the invention described in the claims and its equivalents.

[0037] The present disclosure can be used in printed wiring boards.

[0038] 10, 30 Build-up layer 20 Core substrate 21 Interlayer insulating layer 22, 23 Conductive layer 100 Printed wiring board 111, 121 Interlayer insulating layer 112, 122 Conductive layer 115 Via conductor 125 Skip via conductor 125a, 125b Protrusion 211 Through hole 311, 321 Interlayer insulating layer 312, 322 Conductive layer 315, 325 Via conductor B Interface

Claims

1. A printed wiring board comprising: a first interlayer insulating layer; a second interlayer insulating layer located on the outer surface of the first interlayer insulating layer; and a skip via conductor penetrating the first interlayer insulating layer and the second interlayer insulating layer, wherein the first interlayer insulating layer and the second interlayer insulating layer have different resin properties, and the skip via conductor has a protruding portion that juts out in a wedge shape toward the first interlayer insulating layer at the boundary between the first interlayer insulating layer and the second interlayer insulating layer.

2. The printed wiring board according to claim 1, wherein the protruding portion is formed by electrolytic plating that is continuous with the remaining portion of the skip via conductor other than the protruding portion.

3. The printed wiring board according to claim 1 or 2, wherein the first interlayer insulating layer and the second interlayer insulating layer have different resin components.

4. The printed wiring board according to any one of claims 1 to 3, wherein the second interlayer insulating layer has a lower dielectric constant and a lower dielectric loss tangent than the first interlayer insulating layer.

5. The printed wiring board according to any one of claims 1 to 4, wherein the resin component of the first interlayer insulating layer is an epoxy resin, and the resin component of the second interlayer insulating layer is a polyester resin.

6. A printed wiring board according to any one of claims 1 to 5, wherein the unevenness at the boundary between the skip via conductor and the first interlayer insulating layer is greater than the unevenness at the boundary between the skip via conductor and the second interlayer insulating layer.

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