Semiconductor device, semiconductor module, vehicle, and method for manufacturing semiconductor device

Abstract

This semiconductor device comprises a base material, a first semiconductor element, a support member, and a heat dissipation member. The first semiconductor element is mounted on one side of the base material in a first direction. The support member and the heat dissipation member are positioned on a side opposite to the first semiconductor element with respect to the base material. The heat dissipation member is a member different from the support member and is supported by the base material. The support member has a first surface facing a side on which the first semiconductor element is located with respect to the base material in the first direction. The base material is supported by the first surface.

Description

Semiconductor device, semiconductor module, vehicle, and method for manufacturing semiconductor device

[0001] The present disclosure relates to a semiconductor device and a manufacturing method thereof, a semiconductor module including the semiconductor device, and a vehicle equipped with the semiconductor module.

[0002] Patent Document 1 discloses an example of a semiconductor module equipped with a cooler and a semiconductor device. The cooler equipped in the semiconductor module includes a housing having a hollow region and a heat sink. The housing has an opening that leads to the hollow region. The heat sink is attached to the housing so as to close the opening. The semiconductor device is joined to a portion of the heat sink that protrudes from the hollow region. When the hollow region is filled with a liquid refrigerant, the refrigerant comes into contact with the heat sink. This allows the semiconductor device to be cooled.

[0003] The heat sink of the semiconductor module disclosed in Patent Document 1 has heat sink fins that protrude into a hollow region. The heat sink is an integrated member including the heat sink fins. Therefore, in this semiconductor module, if the shape of the heat sink fins becomes more complex, it may become difficult to manufacture the heat sink.

[0004] International Publication No. 2017 / 094370

[0005] [Summary] An object of the present disclosure is to provide an improved semiconductor device compared to conventional semiconductor devices. In particular, in view of the above circumstances, an object of the present disclosure is to provide a semiconductor device that can be equipped with a heat dissipation component having a more complex shape.

[0006] A semiconductor device provided by a first aspect of the present disclosure includes a substrate, a first semiconductor element, a support member, and a heat dissipation member. The first semiconductor element is mounted on one side of the substrate in a first direction. The support member and the heat dissipation member are located on the opposite side of the substrate from the first semiconductor element. The heat dissipation member is a member different from the support member and is supported by the substrate. The support member has a first surface that faces the side of the substrate where the first semiconductor element is located in the first direction. The substrate is supported by the first surface.

[0007] A semiconductor module provided by a second aspect of the present disclosure includes the semiconductor device provided by the first aspect of the present disclosure and a cooler. The support member is supported by the cooler. The cooler has a hollow housing. The heat dissipation member is housed in the housing. The semiconductor device further includes a second semiconductor element and a sealing resin in addition to the semiconductor device provided by the first aspect of the present disclosure.

[0008] A vehicle provided by a third aspect of the present disclosure includes a drive source and the semiconductor module provided by the second aspect of the present disclosure, wherein the semiconductor module is electrically connected to the drive source.

[0009] A fourth aspect of the present disclosure provides a method for manufacturing a semiconductor device, comprising: a first step of mounting a first semiconductor element on one side of a substrate in a first direction; a second step of forming a sealing resin covering the first semiconductor element; a third step of bonding the substrate to a support member; and a fourth step of supporting a heat dissipation member on the substrate. The third step is either a pre-step or a post-step of the second step. The support member has a first surface and a second surface facing opposite each other in the first direction. The substrate has a third surface facing the other side in the first direction. In the third step, the third surface is bonded to the first surface.

[0010] Other features and advantages of the present disclosure will become more apparent from the following detailed description taken in conjunction with the accompanying drawings.

[0011] FIG. 1 is a plan view of a semiconductor device according to a first embodiment of the present disclosure. FIG. 2 is a plan view corresponding to FIG. 1 , showing the sealing resin and the support member through the plan view. FIG. 3 is a partially enlarged view of FIG. 2. FIG. 4 is a plan view corresponding to FIG. 1 , showing the sealing resin and the second conductive member without illustration. FIG. 5 is a bottom view of the semiconductor device shown in FIG. 1. FIG. 6 is a right side view of the semiconductor device shown in FIG. 1. FIG. 7 is a left side view of the semiconductor device shown in FIG. 1. FIG. 8 is a cross-sectional view taken along line VIII-VIII in FIG. 2. FIG. 9 is a partially enlarged view of a first semiconductor element and its periphery shown in FIG. 8. FIG. 10 is a partially enlarged view of a second semiconductor element and its periphery shown in FIG. 8. FIG. 11 is a cross-sectional view taken along line XI-XI in FIG. 2. FIG. 12 is a cross-sectional view taken along line XII-XII in FIG. 2. FIG. 13 is a partially enlarged view of FIG. 5. FIG. 14 is a front view corresponding to FIG. 13. FIG. 15 is a partially enlarged perspective view of a heat dissipation member included in the semiconductor device shown in FIG. 1. FIG. 16 is a cross-sectional view taken along line XVI-XVI in FIG. 13. FIG. 17 is a cross-sectional view of a semiconductor device according to a modified example of the first embodiment of the present disclosure, corresponding to FIG. 8. FIG. 18 is a cross-sectional view of a semiconductor module including the semiconductor device shown in FIG. 1, corresponding to FIG. 8. FIG. 19 is a cross-sectional view of a semiconductor module including the semiconductor device shown in FIG. 1, corresponding to FIG. 11. FIG. 20 is a cross-sectional view illustrating a first step in a method for manufacturing the semiconductor device shown in FIG. 1. FIG. 21 is a cross-sectional view illustrating a second step in a method for manufacturing the semiconductor device shown in FIG. 1. FIG. 22 is a cross-sectional view illustrating a third step in a method for manufacturing the semiconductor device shown in FIG. 1. FIG. 23 is a cross-sectional view illustrating a fourth step in a method for manufacturing the semiconductor device shown in FIG. 1. FIG. 24 is a cross-sectional view illustrating a third step in a method for manufacturing the semiconductor device shown in FIG. 17. FIG. 25 is a cross-sectional view illustrating a second step in a method for manufacturing the semiconductor device shown in FIG. 17. FIG. 26 is a schematic diagram of a vehicle equipped with the semiconductor module shown in FIG. 18. FIG. 27 is a bottom view of a semiconductor device according to a second embodiment of the present disclosure. Fig. 28 is a cross-sectional view of the semiconductor device shown in Fig. 27 and corresponds to Fig. 8. Fig. 29 is a bottom view of a semiconductor device according to a modification of the second embodiment of the present disclosure. Fig. 30 is a cross-sectional view of the semiconductor device shown in Fig. 29 and corresponds to Fig. 28.FIG. 31 is a cross-sectional view of a semiconductor module including the semiconductor device shown in FIG. 27 and corresponds to FIG. 18 . FIG. 32 is a bottom view of a semiconductor device according to a third embodiment of the present disclosure. FIG. 33 is a cross-sectional view of the semiconductor device shown in FIG. 32 and corresponds to FIG. 8 . FIG. 34 is a bottom view of a semiconductor device according to a modified example of the third embodiment of the present disclosure. FIG. 35 is a cross-sectional view of the semiconductor device shown in FIG. 34 and corresponds to FIG. 33 . FIG. 36 is a cross-sectional view of a semiconductor module including the semiconductor device shown in FIG. 32 and corresponds to FIG. 18 . FIG. 37 is a bottom view of a semiconductor device according to a fourth embodiment of the present disclosure. FIG. 38 is a cross-sectional view of the semiconductor device shown in FIG. 37 and corresponds to FIG. 8 . FIG. 39 is a cross-sectional view of the semiconductor device shown in FIG. 37 and corresponds to FIG. 11 . FIG. 40 is a bottom view of a semiconductor device according to a modified example of the fourth embodiment of the present disclosure. FIG. 41 is a cross-sectional view of the semiconductor device shown in FIG. 40 and corresponds to FIG. 38 . Fig. 42 is a cross-sectional view of the semiconductor device shown in Fig. 40, and corresponds to Fig. 39. Fig. 43 is a cross-sectional view of a semiconductor module including the semiconductor device shown in Fig. 37, and corresponds to Fig. 18.

[0012] DETAILED DESCRIPTION The present disclosure will be described in detail with reference to the accompanying drawings.

[0013] First Embodiment: A semiconductor device A10 according to a first embodiment of the present disclosure will be described with reference to FIGS. 1 to 16 . The semiconductor device A10 includes a substrate 11, a first power terminal 12, two second power terminals 13, a third power terminal 14, a fourth power terminal 15, a plurality of first semiconductor elements 21, a plurality of second semiconductor elements 22, a first conductive member 31, a second conductive member 32, a sealing resin 50, a plurality of heat dissipation members 71, and a support member 72. The semiconductor device A10 also includes a first signal terminal 161, a second signal terminal 162, a third signal terminal 171, a fourth signal terminal 172, two fifth signal terminals 18, a sixth signal terminal 19, a thermistor 23, a first wiring 61, and a second wiring 62. For ease of understanding, FIGS. 2 and 3 illustrate the sealing resin 50 and the support member 72 in a transparent manner. In FIG. 2, the transparent sealing resin 50 and the support member 72 are indicated by imaginary lines (double-dashed lines). For ease of understanding, the sealing resin 50 and the second conductive member 32 are omitted from FIG.

[0014] In the description of the semiconductor device A10, for convenience, the normal direction to a top surface 51 of a sealing resin 50 (described later) is referred to as the "first direction z." The direction perpendicular to the first direction z is referred to as the "second direction x." The direction perpendicular to both the first direction z and the second direction x is referred to as the "third direction y."

[0015] The semiconductor device A10 converts DC power input to the first power terminal 12, the third power terminal 14, and the fourth power terminal 15 into AC power using a plurality of first semiconductor elements 21 and a plurality of second semiconductor elements 22. The converted AC power is input from each of the two second power terminals 13 to a power supply target such as a motor.

[0016] As shown in FIGS. 8 , 11 , and 12 , the base material 11 is located on one side of each of the plurality of first semiconductor elements 21 and the plurality of second semiconductor elements 22 in the first direction z. In the semiconductor device A10, the base material 11 is formed, for example, by active metal brazing (AMB). As shown in FIG. 8 , the base material 11 includes an insulating layer 111, a first conductive layer 112, a second conductive layer 113, and a heat dissipation layer 114. The base material 11 is covered with a sealing resin 50 except for a portion of the heat dissipation layer 114.

[0017] As shown in FIG. 8 , the insulating layer 111 includes a portion interposed between the heat dissipation layer 114 and the first and second conductive layers 112 and 113 in the first direction z. The insulating layer 111 is made of a material with relatively high thermal conductivity. The insulating layer 111 is made of ceramics containing, for example, aluminum nitride (AlN) or silicon nitride (Si3N4). The dimension of the insulating layer 111 in the first direction z is smaller than the dimensions of each of the first and second conductive layers 112 and 113 in the first direction z.

[0018] As shown in FIGS. 8 , 11 , and 12 , the first conductive layer 112 is located between the insulating layer 111 and the multiple first semiconductor elements 21 in the first direction z, and the second conductive layer 113 is located between the insulating layer 111 and the multiple second semiconductor elements 22 in the first direction z. The first conductive layer 112 and the second conductive layer 113 are bonded to the insulating layer 111. The first conductive layer 112 and the second conductive layer 113 contain copper (Cu). The first conductive layer 112 and the second conductive layer 113 are spaced apart from each other in the second direction x. As shown in FIGS. 8 and 11 , the first conductive layer 112 has a first mounting surface 112A facing the first direction z. The first mounting surface 112A faces the multiple first semiconductor elements 21. 8 and 12 , the second conductive layer 113 has a second mounting surface 113A that faces the same side as the first mounting surface 112A in the first direction z. The second mounting surface 113A faces the plurality of second semiconductor elements 22. As viewed in the first direction z, each of the first conductive layer 112 and the second conductive layer 113 is located inward from the periphery 111A of the insulating layer 111.

[0019] As shown in FIG. 8 , the heat dissipation layer 114 is located on the opposite side of the insulating layer 111 in the first direction z from the first conductive layer 112 and the second conductive layer 113. As shown in FIG. 5 , the heat dissipation layer 114 is exposed from the sealing resin 50. The heat dissipation layer 114 contains copper. The dimension of the heat dissipation layer 114 in the first direction z is larger than the dimension of the insulating layer 111 in the first direction z. As viewed in the first direction z, the heat dissipation layer 114 is located inward from the periphery 111A of the insulating layer 111.

[0020] As shown in FIGS. 4 and 11 , the multiple first semiconductor elements 21 are bonded to the first mounting surface 112A of the first conductive layer 112. The multiple first semiconductor elements 21 are arranged along the third direction y. As shown in FIGS. 4 and 12 , the multiple second semiconductor elements 22 are bonded to the second mounting surface 113A of the second conductive layer 113. The multiple second semiconductor elements 22 are arranged along the third direction y. The multiple first semiconductor elements 21 and the multiple second semiconductor elements 22 are, for example, metal-oxide-semiconductor field-effect transistors (MOSFETs). Alternatively, the multiple first semiconductor elements 21 and the multiple second semiconductor elements 22 may be switching elements such as insulated gate bipolar transistors (IGBTs). Furthermore, the multiple first semiconductor elements 21 may include multiple switching elements and multiple freewheeling diodes individually connected in parallel to these switching elements. Similarly, the second semiconductor elements 22 may also include a plurality of switching elements and a plurality of freewheeling diodes individually connected in parallel to the switching elements. The freewheeling diodes may be, for example, Schottky barrier diodes. In the description of the semiconductor device A10, the first semiconductor elements 21 and the second semiconductor elements 22 are n-channel MOSFETs with a vertical structure. The first semiconductor elements 21 and the second semiconductor elements 22 include a compound semiconductor substrate. The compound semiconductor substrate contains silicon carbide (SiC).

[0021] As shown in FIGS. 4 and 9, each of the plurality of first semiconductor elements 21 has a first electrode 211 , a second electrode 212 , a first gate electrode 213 and a first detection electrode 214 .

[0022] 9 , the first electrode 211 faces the first mounting surface 112A of the first conductive layer 112. In each of the multiple first semiconductor elements 21, a current flows from the first electrode 211 toward the inside of the element. That is, the first electrode 211 corresponds to the drain of the first semiconductor element 21. The first electrode 211 is conductively bonded to the first mounting surface 112A via the conductive bonding layer 29. As a result, the first electrode 211 of each of the multiple first semiconductor elements 21 is electrically connected to the first conductive layer 112. The conductive bonding layer 29 is a sintered body of metal particles containing silver (Ag) or the like. Alternatively, the conductive bonding layer 29 may be solder.

[0023] 9 , the second electrode 212 is located on the opposite side of the first conductive layer 112 from the side facing the first mounting surface 112A in the first direction z. Therefore, the first electrode 211 and the second electrode 212 are located on opposite sides of each other in the first direction z. In each of the multiple first semiconductor elements 21, a current flows from the inside of the element toward the second electrode 212. In other words, the second electrode 212 corresponds to the source electrode of the first semiconductor element 21.

[0024] 4, the first gate electrode 213 is located on the same side as the second electrode 212 in the first direction z. A gate voltage for driving the first semiconductor element 21 is applied to the first gate electrode 213. As shown in FIG. 4, the area of ​​the first gate electrode 213 is smaller than the area of ​​the second electrode 212 when viewed in the first direction z.

[0025] 4 , the first detection electrode 214 is located on the same side as the second electrode 212 and the first gate electrode 213 in the first direction z. The first detection electrode 214 is located adjacent to the first gate electrode 213 in the third direction y. A voltage equivalent to the voltage applied to the second electrode 212 is applied to the first detection electrode 214. When viewed in the first direction z, the area of ​​the first detection electrode 214 is approximately equal to the area of ​​the first gate electrode 213.

[0026] As shown in FIGS. 4 and 10 , each of the plurality of second semiconductor elements 22 has a third electrode 221 , a fourth electrode 222 , a second gate electrode 223 and a second detection electrode 224 .

[0027] 10 , the third electrode 221 faces the second mounting surface 113A of the second conductive layer 113. In each of the multiple second semiconductor elements 22, a current flows from the third electrode 221 toward the inside of the element. That is, the third electrode 221 corresponds to the drain electrode of the second semiconductor element 22. The third electrode 221 is conductively bonded to the second mounting surface 113A via the conductive bonding layer 29. As a result, the third electrode 221 of each of the multiple second semiconductor elements 22 is electrically connected to the second conductive layer 113.

[0028] 10 , the fourth electrode 222 is located on the side of the second conductive layer 113 opposite to the side facing the second mounting surface 113A in the first direction z. Therefore, the third electrode 221 and the fourth electrode 222 are located on opposite sides to each other in the first direction z. In each of the multiple second semiconductor elements 22, a current flows from the inside of the element toward the fourth electrode 222. That is, the fourth electrode 222 corresponds to the source electrode of the second semiconductor element 22.

[0029] 4, the second gate electrode 223 is located on the same side as the fourth electrode 222 in the first direction z. A gate voltage for driving the second semiconductor element 22 is applied to the second gate electrode 223. As shown in FIG. 4, the area of ​​the second gate electrode 223 is smaller than the area of ​​the fourth electrode 222 when viewed in the first direction z.

[0030] 4 , the second detection electrode 224 is located on the same side as the fourth electrode 222 and the second gate electrode 223 in the first direction z. The second detection electrode 224 is located on both sides of the second gate electrode 223 in the third direction y. A voltage equivalent to the voltage applied to the fourth electrode 222 is applied to the second detection electrode 224. When viewed in the first direction z, the area of ​​the second detection electrode 224 is approximately equal to the area of ​​the second gate electrode 223.

[0031] As shown in FIGS. 4 and 8 , the first power terminal 12 is located on the opposite side of the second semiconductor elements 22 from the first semiconductor elements 21 in the second direction x. The first power terminal 12 is conductively bonded to the first conductive layer 112. This electrically connects the first power terminal 12 to the first electrodes 211 of the first semiconductor elements 21 via the first conductive layer 112. The first power terminal 12 is a P terminal (positive electrode) to which DC power to be converted is input. The first power terminal 12 extends from the first conductive layer 112 in the second direction x. The first power terminal 12 has a first covering portion 121 and a first exposed portion 122. As shown in FIG. 8 , the first covering portion 121 is conductively bonded to the first conductive layer 112 and is covered with sealing resin 50. The first exposed portion 122 extends from the first covering portion 121 in the second direction x and protrudes from the sealing resin 50.

[0032] As shown in FIG. 4 , each of the two second power terminals 13 is located on the opposite side of the first conductive layer 112 from the second conductive layer 113 in the second direction x. As shown in FIG. 8 , each of the two second power terminals 13 is conductively bonded to the second conductive layer 113. As a result, each of the two second power terminals 13 is electrically connected to the third electrodes 221 of the multiple second semiconductor elements 22 via the second conductive layer 113. AC power converted by the multiple first semiconductor elements 21 and the multiple second semiconductor elements 22 is output from each of the two second power terminals 13. In the semiconductor device A10, the two second power terminals 13 are spaced apart from each other in the third direction y. As shown in FIG. 2 , each of the two second power terminals 13 has a second covering portion 131 and a second exposed portion 132. The second covering portion 131 is conductively bonded to the second conductive layer 113 and is covered with a sealing resin 50. The second exposed portion 132 extends from the second covered portion 131 in the second direction x and protrudes from the sealing resin 50 .

[0033] As shown in FIG. 4 , the third power terminal 14 is located on the opposite side of the second semiconductor elements 22 from the first semiconductor elements 21 in the second direction x. The third power terminal 14 is located on one side of the first power terminal 12 in the third direction y. The third power terminal 14 is electrically connected to the fourth electrodes 222 of the second semiconductor elements 22. The third power terminal 14 is an N terminal (negative electrode) to which DC power to be converted is input. The third power terminal 14 has a third covering portion 141 and a third exposed portion 142. The third covering portion 141 is spaced apart from the first conductive layer 112 and is covered with the sealing resin 50. The third exposed portion 142 extends from the third covering portion 141 in the second direction x and protrudes from the sealing resin 50.

[0034] As shown in FIG. 4 , the fourth power terminal 15 is located on the opposite side of the second semiconductor elements 22 from the first semiconductor elements 21 in the second direction x. The fourth power terminal 15 is located on the opposite side of the third power terminal 14 from the first power terminal 12 in the third direction y. Therefore, the first power terminal 12 is located between the third power terminal 14 and the fourth power terminal 15 in the third direction y. The fourth power terminal 15 is electrically connected to the fourth electrodes 222 of the second semiconductor elements 22. Like the third power terminal 14, the fourth power terminal 15 is the N terminal described above. The fourth power terminal 15 has a fourth covering portion 151 and a fourth exposed portion 152. The fourth covering portion 151 is spaced apart from the first conductive layer 112 and is covered by the sealing resin 50. The fourth exposed portion 152 extends from the fourth covering portion 151 in the second direction x and protrudes from the sealing resin 50.

[0035] As shown in Fig. 8 , the first wiring 61 is bonded to the first mounting surface 112A of the first conductive layer 112. The first wiring 61 is located on the opposite side of the second semiconductor elements 22 from the first semiconductor elements 21 in the second direction x. The first wiring 61 is electrically connected to the first semiconductor elements 21 and the first conductive layer 112. As shown in Figs. 3 and 8 , the first wiring 61 has a first mounting layer 611, a first metal layer 612, two first gate wiring layers 613, a first detection wiring layer 614, and a second detection wiring layer 616.

[0036] 3 , the first mounting layer 611 mounts two first gate wiring layers 613, a first detection wiring layer 614, and a second detection wiring layer 616. The first mounting layer 611 is an insulator. The first mounting layer 611 is made of, for example, ceramics. Alternatively, the first mounting layer 611 may be made of an insulating resin sheet.

[0037] 8 , the first metal layer 612 is located on a side of the first conductive layer 112 facing the first mounting surface 112A with respect to the first mounting layer 611 in the first direction z. The first metal layer 612 is bonded to the first mounting layer 611. The first metal layer 612 contains copper. The first metal layer 612 is bonded to the first mounting surface 112A via a first bonding layer 68. The first bonding layer 68 is, for example, solder.

[0038] As shown in FIGS. 3 and 8 , the two first gate wiring layers 613 are located on the opposite side of the first mounting layer 611 from the first metal layer 612. The two first gate wiring layers 613 are bonded to the first mounting layer 611. Of the two first gate wiring layers 613, one of the first gate wiring layers 613 is conductively bonded to a plurality of first wires 41. The plurality of first wires 41 are individually conductively bonded to the first gate electrodes 213 of the plurality of first semiconductor elements 21. Furthermore, a plurality of sixth wires 46 are conductively bonded to each of the two first gate wiring layers 613. As a result, each of the two first gate wiring layers 613 is electrically connected to the first gate electrodes 213 of the plurality of first semiconductor elements 21.

[0039] 3 and 8 , the first detection wiring layer 614 is located on the opposite side of the first mounting layer 611 from the first metal layer 612. The first detection wiring layer 614 is bonded to the first mounting layer 611. A plurality of second wires 42 are conductively bonded to the first detection wiring layer 614. Furthermore, the plurality of second wires 42 are individually conductively bonded to the first detection electrodes 214 of the plurality of first semiconductor elements 21. As a result, the first detection wiring layer 614 is electrically connected to the first detection electrodes 214 of the plurality of first semiconductor elements 21.

[0040] 3 and 8 , the second detection wiring layer 616 is located on the opposite side of the first metal layer 612 with respect to the first mounting layer 611. The second detection wiring layer 616 is bonded to the first mounting layer 611. A third wire 43 is conductively bonded to the second detection wiring layer 616. The third wire 43 is further conductively bonded to the first mounting surface 112A of the first conductive layer 112. This provides electrical continuity between the second detection wiring layer 616 and the first conductive layer 112.

[0041] As shown in Fig. 8 , the second wiring 62 is bonded to the second mounting surface 113A of the second conductive layer 113. The second wiring 62 is located on the opposite side of the second semiconductor elements 22 from the first semiconductor elements 21 in the second direction x. The second wiring 62 is electrically connected to the second semiconductor elements 22 and the second conductive layer 113. As shown in Figs. 3 and 8 , the second wiring 62 has a second mounting layer 621, a second metal layer 622, two second gate wiring layers 623, a third detection wiring layer 624, and two temperature detection wiring layers 625.

[0042] 3 , the second mounting layer 621 includes two second gate wiring layers 623, a third detection wiring layer 624, and two temperature detection wiring layers 625. The second mounting layer 621 is an insulator. For example, the second mounting layer 621 is made of ceramics. Alternatively, the second mounting layer 621 may be made of an insulating resin sheet.

[0043] 8 , the second metal layer 622 is located on the side facing the second mounting surface 113A of the second conductive layer 113 with the second mounting layer 621 as the reference in the first direction z. The second metal layer 622 is bonded to the second mounting layer 621. The second metal layer 622 contains copper. The second metal layer 622 is bonded to the second mounting surface 113A via the first bonding layer 68.

[0044] As shown in FIGS. 3 and 8 , the two second gate wiring layers 623 are located on the opposite side of the second metal layer 622 with respect to the second mounting layer 621. The two second gate wiring layers 623 are bonded to the second mounting layer 621. A plurality of fourth wires 44 are conductively bonded to one of the two second gate wiring layers 623. The plurality of fourth wires 44 are individually conductively bonded to the second gate electrodes 223 of the second semiconductor elements 22. Furthermore, a plurality of seventh wires 47 are conductively bonded to each of the two second gate wiring layers 623. As a result, each of the two second gate wiring layers 623 is electrically connected to the second gate electrodes 223 of the second semiconductor elements 22.

[0045] 3 and 8 , the third detection wiring layer 624 is located on the opposite side of the second metal layer 622 with respect to the second mounting layer 621. The third detection wiring layer 624 is bonded to the second mounting layer 621. A plurality of fifth wires 45 are conductively bonded to the third detection wiring layer 624. Furthermore, the plurality of fifth wires 45 are individually conductively bonded to the second detection electrodes 224 of the plurality of second semiconductor elements 22. As a result, the third detection wiring layer 624 is electrically connected to the second detection electrodes 224 of the plurality of second semiconductor elements 22.

[0046] 3 and 8 , the two temperature detection wiring layers 625 are located on the opposite side of the second mounting layer 621 from the second metal layer 622. The two temperature detection wiring layers 625 are bonded to the second mounting layer 621. The two temperature detection wiring layers 625 are adjacent to each other in a direction perpendicular to the first direction z.

[0047] 8 , each of the multiple sleeves 63 is conductively bonded to either the first wiring 61 or the second wiring 62 via a second bonding layer 69. The second bonding layer 69 is, for example, solder. The multiple sleeves 63 are made of a conductive material such as metal. Each of the multiple sleeves 63 has a cylindrical shape extending in the first direction z.

[0048] 3, the thermistor 23 is conductively joined to the two temperature detection wiring layers 625 of the second wiring 62. The thermistor 23 is used as a temperature detection sensor for the semiconductor device A10.

[0049] As shown in FIG. 1 , the first signal terminal 161, the second signal terminal 162, the third signal terminal 171, the fourth signal terminal 172, the two fifth signal terminals 18, and the sixth signal terminal 19 are formed as metal pins extending in the first direction z. These terminals protrude from a top surface 51 of a sealing resin 50 (described later). Furthermore, these terminals are individually press-fitted into a plurality of sleeves 63. As a result, each of these terminals is supported by one of the plurality of sleeves 63 and is electrically connected to one of the first wiring 61 and the second wiring 62.

[0050] 3 , the first signal terminal 161 is press-fitted into one of the multiple sleeves 63 that is conductively joined to one of the two first gate wiring layers 613 of the first wiring 61. As a result, the first signal terminal 161 is electrically connected to the first gate electrodes 213 of the multiple first semiconductor elements 21 via the two first gate wiring layers 613. A gate voltage for driving the multiple first semiconductor elements 21 is applied to the first signal terminal 161.

[0051] 3 , the second signal terminal 162 is press-fitted into one of the multiple sleeves 63 that is conductively joined to one of the two second gate wiring layers 623 of the second wiring 62. As a result, the second signal terminal 162 is electrically connected to the second gate electrodes 223 of the multiple second semiconductor elements 22 via the two second gate wiring layers 623. A gate voltage for driving the multiple second semiconductor elements 22 is applied to the second signal terminal 162.

[0052] As shown in Fig. 1 , the third signal terminal 171 is located adjacent to the first signal terminal 161 in the third direction y. As shown in Fig. 3 and 8 , the third signal terminal 171 is press-fitted into one of the multiple sleeves 63 that is conductively joined to the first detection wiring layer 614 of the first wiring 61. This allows the third signal terminal 171 to be electrically connected to the first detection electrodes 214 of each of the multiple first semiconductor elements 21 via the first detection wiring layer 614. A voltage equivalent to the voltage applied to the first detection electrodes 214 of each of the multiple first semiconductor elements 21 is applied to the third signal terminal 171.

[0053] 1 , the fourth signal terminal 172 is located adjacent to the second signal terminal 162 in the third direction y. As shown in FIGS. 3 and 8 , the fourth signal terminal 172 is press-fitted into one of the multiple sleeves 63 that is conductively joined to the third detection wiring layer 624 of the second wiring 62. This allows the fourth signal terminal 172 to be electrically connected to the second detection electrodes 224 of each of the multiple second semiconductor elements 22 via the third detection wiring layer 624. A voltage equivalent to the voltage applied to the second detection electrodes 224 of each of the multiple second semiconductor elements 22 is applied to the fourth signal terminal 172.

[0054] As shown in Fig. 1 , the two fifth signal terminals 18 are located on the opposite side of the second signal terminal 162 from the fourth signal terminal 172 in the third direction y. The two fifth signal terminals 18 are adjacent to each other in the third direction y. As shown in Fig. 3 , the two fifth signal terminals 18 are individually press-fitted into two of the multiple sleeves 63 that are individually conductively bonded to the two temperature detection wiring layers 625 of the second wiring 62. As a result, the two fifth signal terminals 18 are electrically connected to the thermistor 23.

[0055] As shown in Fig. 1 , the sixth signal terminal 19 is located on the opposite side of the first signal terminal 161 in the third direction y with respect to the third signal terminal 171. As shown in Fig. 3 , the sixth signal terminal 19 is press-fitted into one of the multiple sleeves 63 that is conductively joined to the second detection wiring layer 616 of the first wiring 61. This provides electrical continuity between the sixth signal terminal 19 and the first conductive layer 112 via the second detection wiring layer 616. A voltage equivalent to the DC power input to the first power terminal 12 and the two third power terminals 14 is applied to the sixth signal terminal 19.

[0056] As shown in FIGS. 4 and 9 , the first conductive member 31 is conductively bonded to the second electrodes 212 of the plurality of first semiconductor elements 21 and the second mounting surface 113A of the second conductive layer 113. This allows the second electrodes 212 of each of the plurality of first semiconductor elements 21 to be electrically connected to the second conductive layer 113. The first conductive member 31 contains copper. The first conductive member 31 is a metal clip. As shown in FIG. 4 , the first conductive member 31 has a first main portion 311, a plurality of first bonding portions 312, a plurality of first connecting portions 313, a plurality of second bonding portions 314, and a plurality of second connecting portions 315.

[0057] The first main portion 311 forms a main portion of the first conductive member 31. As shown in Fig. 4 , the first main portion 311 extends in the third direction y. As shown in Fig. 8 , the first main portion 311 straddles between the first conductive layer 112 and the second conductive layer 113.

[0058] As shown in FIGS. 4 and 9 , each of the plurality of first bonding portions 312 is conductively bonded to the second electrode 212 of one of the plurality of first semiconductor elements 21 .

[0059] As shown in Fig. 4 , the multiple first connecting portions 313 are connected to the first main portion 311 and the multiple first joint portions 312. The multiple first connecting portions 313 are spaced apart from one another in the third direction y. As shown in Fig. 9 , when viewed in the third direction y, each of the multiple first connecting portions 313 is inclined such that the distance from the first mounting surface 112A of the first conductive layer 112 increases from the corresponding first joint portion 312 toward the first main portion 311.

[0060] 4 and 8, the plurality of second bonding portions 314 are conductively bonded to the second mounting surface 113A of the second conductive layer 113. The second bonding portions 314 are arranged along the third direction y.

[0061] 4 and 8 , one side of each of the plurality of second connecting portions 315 in the second direction x is connected to the first main portion 311. In addition, the other side of each of the plurality of second connecting portions 315 in the second direction x is individually connected to the plurality of second joint portions 314. When viewed in the third direction y, the second connecting portion 315 is inclined such that the distance from the second mounting surface 113A of the second conductive layer 113 increases from the second joint portion 314 toward the first main portion 311.

[0062] 9 , a conductive bonding layer 29 is located between the second electrode 212 of each of the multiple first semiconductor elements 21 and each of the multiple first bonding portions 312. The conductive bonding layer 29 conductively bonds one of the multiple first bonding portions 312 to one of the multiple first semiconductor elements 21. As shown in FIG. 8 , a conductive bonding layer 29 is located between the second mounting surface 113A of the second conductive layer 113 and each of the multiple second bonding portions 314. The conductive bonding layer 29 conductively bonds the second mounting surface 113A to the multiple second bonding portions 314.

[0063] As shown in FIG. 10 , the second conductive member 32 is conductively bonded to the second electrodes 212 of the plurality of second semiconductor elements 22 and the third covering portions 141 of the two third power terminals 14. As a result, the second electrodes 212 of each of the plurality of second semiconductor elements 22 are electrically connected to the two third power terminals 14. The second conductive member 32 contains copper. The second conductive member 32 is a metal clip. As shown in FIG. 3 , the second conductive member 32 has two second main portions 321, a plurality of third joint portions 322, a plurality of third connecting portions 323, two fourth joint portions 324, two fourth connecting portions 325, a plurality of intermediate portions 326, and a cross beam portion 327.

[0064] 3, the two second main portions 321 are spaced apart from each other in the third direction y. The two second main portions 321 extend in the second direction x. As shown in Fig. 8, the two second main portions 321 are located on the opposite side of the first conductive layer 112 and the second conductive layer 113 from the first conductive member 31 in the first direction z.

[0065] 3, the intermediate portions 326 are located between two second main portions 321 in the third direction y. The intermediate portions 326 are arranged along the third direction y. Each of the intermediate portions 326 extends in the second direction x.

[0066] As shown in FIGS. 3 and 10 , each of the plurality of third bonding portions 322 is conductively bonded to the second electrode 212 of one of the plurality of second semiconductor elements 22 .

[0067] 3 , one side of each of the plurality of third connecting portions 323 in the third direction y is connected to one of the plurality of third joint portions 322. In addition, the other side of each of the plurality of third connecting portions 323 in the third direction y is connected to one of the two second main portions 321 and one of the plurality of intermediate portions 326. When viewed in the second direction x, each of the plurality of third connecting portions 323 is inclined so that the distance from the second mounting surface 113A of the second conductive layer 113 increases from one of the plurality of third joint portions 322 toward one of the two second main portions 321 and one of the plurality of intermediate portions 326.

[0068] As shown in FIG. 3 , the two fourth joint portions 324 are conductively joined to the third covering portion 141 of the third power terminal 14 and the fourth covering portion 151 of the fourth power terminal 15 , respectively.

[0069] 3 , one side of each of the two fourth connecting portions 325 in the second direction x is connected to two fourth joint portions 324. In addition, the other side of each of the two fourth connecting portions 325 in the second direction x is individually connected to two second main portions 321. When viewed in the third direction y, the two fourth connecting portions 325 are each inclined so that the distance from the first mounting surface 112A of the first conductive layer 112 increases from the two fourth joint portions 324 toward the two second main portions 321.

[0070] 3 , the cross beam portion 327 is located between the two second main portions 321 in the third direction y. The cross beam portion 327 extends in the third direction y. Both sides of the cross beam portion 327 in the third direction y are connected to the two second main portions 321. When viewed in the first direction z, the cross beam portion 327 overlaps the first conductive member 31. A plurality of intermediate portions 326 are connected to the side of the cross beam portion 327 in the second direction x where the plurality of second semiconductor elements 22 are located.

[0071] 10 , the conductive bonding layer 29 is located between the fourth electrode 222 of each of the multiple second semiconductor elements 22 and each of the multiple third bonding portions 322. The conductive bonding layer 29 conductively bonds one of the multiple third bonding portions 322 to one of the multiple second semiconductor elements 22.

[0072] As shown in FIGS. 8 , 11 , and 12 , the sealing resin 50 covers the insulating layer 111, the first conductive layer 112, the second conductive layer 113, the plurality of first semiconductor elements 21, the plurality of second semiconductor elements 22, the first conductive member 31, and the second conductive member 32. The sealing resin 50 also covers a portion of the heat dissipation layer 114, the first power terminal 12, the third power terminal 14, the fourth power terminal 15, and the two second power terminals 13. The sealing resin 50 faces the support member 72. The sealing resin 50 has electrical insulation properties. The sealing resin 50 is made of a material containing, for example, black epoxy resin. As shown in FIGS. 1 and 5 to 7 , the sealing resin 50 has a top surface 51, a bottom surface 52, a first side surface 53, a second side surface 54, and two recesses 55.

[0073] 8, the top surface 51 faces the same side as the first mounting surface 112A of the first conductive layer 112 in the first direction z. The bottom surface 52 faces the opposite side from the top surface 51 in the first direction z. As shown in FIG. 5, the heat dissipation layer 114 of the base material 11 is exposed from the bottom surface 52.

[0074] 1 and 5 to 7 , the first side surface 53 and the second side surface 54 are spaced apart from each other in the second direction x. The first side surface 53 and the second side surface 54 face opposite each other in the second direction x. A first exposed portion 122 of the first power terminal 12, a third exposed portion 142 of the third power terminal 14, and a fourth exposed portion 152 of the fourth power terminal 15 protrude from the first side surface 53. A second exposed portion 132 of each of the two second power terminals 13 protrudes from the second side surface 54.

[0075] 1 and 5 , the two recesses 55 are recessed from the first side surface 53 in the second direction x. The two recesses 55 extend from the top surface 51 to the bottom surface 52 in the first direction z. The two recesses 55 are located on both sides of the first power terminal 12 in the third direction y.

[0076] As shown in FIGS. 8 , 12 , and 11 , the support member 72 is located on the opposite side of the substrate 11 in the first direction z from the plurality of first semiconductor elements 21 and the plurality of second semiconductor elements 22. The support member 72 is flat. The support member 72 contains metal. The support member 72 is made of a material containing, for example, aluminum (Al) or copper. The support member 72 has a first surface 72A and a second surface 72B facing opposite each other in the first direction z. The first surface 72A faces the side of the substrate 11 in the first direction z where the plurality of first semiconductor elements 21 and the plurality of second semiconductor elements 22 are located. The first surface 72A faces the heat dissipation layer 114 of the substrate 11. The heat dissipation layer 114 is supported by the first surface 72A. The heat dissipation layer 114 is further bonded to the first surface 72A via a bonding layer 79. The bonding layer 79 includes a sintered body of metal particles. The metal particles include silver. Alternatively, the metal particles may include copper. Furthermore, the bonding layer 79 may be a thermal interface material (TIM) containing a resin, a solder material, or a bonding interface obtained by bonding two metals together by solid-state diffusion.

[0077] As shown in FIGS. 8 , 11 , and 12 , the heat dissipation members 71 are positioned on the opposite side of the substrate 11 from the first semiconductor elements 21 and the second semiconductor elements 22 in the first direction z. Furthermore, the heat dissipation members 71 are positioned on the opposite side of the substrate 11 from the support member 72 in the first direction z. The heat dissipation members 71 are used to cool the semiconductor device A10. The heat dissipation members 71 contain metal. The heat dissipation members 71 are made of a material containing, for example, aluminum or copper. Each of the heat dissipation members 71 is a different member from the support member 72. Each of the heat dissipation members 71 extends in the first direction z. The heat dissipation members 71 are arranged in a matrix along each of the second direction x and the third direction y. The heat dissipation members 71 are bonded to the second surface 72B of the support member 72. As a result, the plurality of heat dissipation members 71 are supported on the heat dissipation layer 114 of the base material 11 via the support member 72 and the bonding layer 79 .

[0078] As shown in Figures 13 and 15, the multiple heat dissipation members 71 include a first heat dissipation body 71A, a second heat dissipation body 71B, and a third heat dissipation body 71C. The second heat dissipation body 71B is located adjacent to the first heat dissipation body 71A in the second direction x. The third heat dissipation body 71C is located on one side of the first heat dissipation body 71A in the third direction y. The shape and size of each of the second heat dissipation body 71B and the third heat dissipation body 71C are identical to the shape and size of the first heat dissipation body 71A. When viewed in the third direction y, the third heat dissipation body 71C overlaps the first heat dissipation body 71A. In the following description, unless otherwise specified, the multiple heat dissipation members 71 will be described as including the first heat dissipation body 71A, the second heat dissipation body 71B, and the third heat dissipation body 71C.

[0079] 13 , 15 , and 16 , each of the multiple heat dissipation members 71 has a first base portion 711, a second base portion 712, a first main portion 713, a second main portion 714, and a connecting portion 715. The first base portion 711 and the second base portion 712 are located adjacent to each other in the second direction x. The first base portion 711 and the second base portion 712 are joined to the second surface 72B of the support member 72 by laser welding or the like. The first main portion 713 extends from the first base portion 711 in the first direction z. The second main portion 714 is located adjacent to the first main portion 713 in the third direction y. The second main portion 714 extends from the second base portion 712 in the first direction z. The connecting portion 715 is located on the opposite side of the first base portion 711 and the second base portion 712 with respect to the first main portion 713 and the second main portion 714 in the first direction z. The connecting portion 715 is connected to the first main portion 713 and the second main portion 714.

[0080] 16 , the first main portion 713 includes a first cross section S1, a third cross section S3, and a fifth cross section S5. The first cross section S1 is the boundary surface between the first base portion 711 and the first main portion 713. The third cross section S3 is located between the first cross section S1 and the connecting portion 715. The third cross section S3 faces the same side as the first cross section S1 in the first direction z. The fifth cross section S5 is the boundary surface between the first main portion 713 and the connecting portion 715. Therefore, the third cross section S3 is located between the first cross section S1 and the fifth cross section S5.

[0081] As shown in FIG. 16 , the second main portion 714 includes a second cross section S2, a fourth cross section S4, and a sixth cross section S6. The second cross section S2 is the boundary surface between the second base portion 712 and the second main portion 714. The fourth cross section S4 is located between the second cross section S2 and the connecting portion 715. The fourth cross section S4 faces the same side as the second cross section S2 in the first direction z. The sixth cross section S6 is the boundary surface between the second main portion 714 and the connecting portion 715. Therefore, the fourth cross section S4 is located between the second cross section S2 and the sixth cross section S6. The distance L in the first direction z from the second cross section S2 to the fourth cross section S4 is equal to the distance in the first direction z from the first cross section S1 to the third cross section S3.

[0082] As shown in FIG. 16 , the distance d2 in the second direction x between the third cross section S3 and the fourth cross section S4 is greater than the distance d1 in the second direction x between the first cross section S1 and the second cross section S2. Furthermore, the distance d3 in the second direction x between the sixth cross section S6 and the fifth cross section S5 is greater than the distance d2 in the second direction x between the third cross section S3 and the fourth cross section S4. The distance d1 in the second direction x between the first cross section S1 and the second cross section S2 is zero. Therefore, the first cross section S1 and the second cross section S2 are in contact with each other. The distance d3 in the second direction x between the sixth cross section S6 and the fifth cross section S5 is greater than or equal to the dimension in the second direction x of each of the first main portion 713 and the second main portion 714.

[0083] 16 , each of the heat dissipation members 71 is provided with a flow-down area 719. The flow-down area 719 is surrounded by the first main portion 713, the second main portion 714, and the connecting portion 715. The flow-down area 719 is hollow.

[0084] As shown in FIG. 16, the second base portion 712 of the first heat dissipation body 71A and the first base portion 711 of the second heat dissipation body 71B are connected to each other.

[0085] Next, a semiconductor device A11 according to a modification of the semiconductor device A10 will be described with reference to Fig. 17. The cross-sectional position in Fig. 17 corresponds to the cross-sectional position in Fig. 8.

[0086] The semiconductor device A11 differs from the semiconductor device A10 in the configuration of the sealing resin 50.

[0087] 17, the bottom surface 52 of the sealing resin 50 is in contact with the first surface 72A of the support member 72. The bonding layer 79 is covered with the sealing resin 50.

[0088] Next, a semiconductor module B10 will be described with reference to Figures 18 and 19. The semiconductor module B10 includes a semiconductor device A10 and a cooler 80. The cross-sectional position in Figure 18 corresponds to the cross-sectional position in Figure 8, which shows the semiconductor device A10. The cross-sectional position in Figure 19 corresponds to the cross-sectional position in Figure 11, which shows the semiconductor device A10.

[0089] As shown in Figures 18 and 19, the cooler 80 is located on the opposite side of the support member 72 from the base material 11 in the first direction z. The cooler 80 is used to cool the semiconductor device A10. The cooler 80 contains metal. In this case, the cooler 80 is made of a material containing aluminum, for example. Alternatively, the cooler 80 may be made of a material mainly containing resin.

[0090] 18 and 19 , the cooler 80 has a support surface 80A and an accommodating portion 81. The support surface 80A faces the same side as the top surface 51 of the sealing resin 50 in the first direction z. The support surface 80A faces the second surface 72B of the support member 72. The accommodating portion 81 is recessed from the support surface 80A. The accommodating portion 81 is hollow. A liquid refrigerant flows downward in the third direction y into the accommodating portion 81. When viewed in the first direction z, the support surface 80A surrounds the accommodating portion 81.

[0091] 18 and 19 , the semiconductor device A10 is attached to the support surface 80A of the cooler 80 via a sealant 89. The sealant 89 is sandwiched between the support surface 80A and the second surface 72B of the support member 72. The sealant 89 is made of a material containing, for example, ethylene propylene rubber. A plurality of heat dissipation members 71 are housed in the housing portion 81 of the cooler 80. The refrigerant flowing down the housing portion 81 passes through the flow-down area 719 of each of the plurality of heat dissipation members 71 shown in FIG. 16 . The support member 72 is located outward from the housing portion 81.

[0092] Next, an example of a method for manufacturing the semiconductor device A10 will be described with reference to Figures 20 to 23. The cross-sectional positions in each of Figures 20 to 23 correspond to Figure 8 showing the semiconductor device A10.

[0093] First, the first process P1 shown in FIG. 20 is performed. In the first process P1, a plurality of first semiconductor elements 21 are mounted on the first mounting surface 112A of the first conductive layer 112 of the substrate 11. A plurality of second semiconductor elements 22 are mounted on the second mounting surface 113A of the second conductive layer 113 of the substrate 11. The plurality of first semiconductor elements 21 are conductively bonded to the first mounting surface 112A via a conductive bonding layer 29. The plurality of second semiconductor elements 22 are conductively bonded to the second mounting surface 113A via a conductive bonding layer 29. Furthermore, the first power terminal 12 is conductively bonded to the first mounting surface 112A by laser welding. At the same time, the two second power terminals 13 are conductively bonded to the second mounting surface 113A by laser welding.

[0094] Next, the second process P2 shown in FIG. 21 is performed. In the second process P2, a sealing resin 50 is formed to cover the plurality of first semiconductor elements 21 and the plurality of second semiconductor elements 22. The sealing resin 50 is formed by transfer molding. Prior to forming the sealing resin 50, first wiring 61 is disposed on the first mounting surface 112A of the first conductive layer 112. Second wiring 62 is disposed on the second mounting surface 113A of the second conductive layer 113. A first conductive member 31 is conductively bonded to the plurality of first semiconductor elements 21 and the second mounting surface 113A. A second conductive member 32 is conductively bonded to the plurality of second semiconductor elements 22 and the third and fourth power terminals 14 and 15. In the second process P2, the third surface 11A of the substrate 11 is exposed from the bottom surface 52 of the sealing resin 50. The third surface 11A is included in the heat dissipation layer 114 of the substrate 11.

[0095] Next, the third process P3 shown in Fig. 22 is performed. In the third process P3, the third surface 11A of the base material 11 is bonded to the first surface 72A of the support member 72. The third surface 11A is bonded to the first surface 72A via a bonding layer 79. Alternatively, the third surface 11A may be bonded to the first surface 72A by solid-state diffusion. Therefore, in one example of the method for manufacturing the semiconductor device A10, the third process P3 is a process subsequent to the second process P2.

[0096] 23 is performed. In the fourth process P4, the plurality of heat dissipation members 71 are supported on the heat dissipation layer 114 of the base material 11. In one example of a method for manufacturing the semiconductor device A10, in the fourth process P4, the plurality of heat dissipation members 71 are joined to the second surface 72B of the support member 72 by laser welding. After the fourth process P4, the first signal terminal 161, the second signal terminal 162, the third signal terminal 171, the fourth signal terminal 172, the two fifth signal terminals 18, and the sixth signal terminal 19 are individually inserted into the plurality of sleeves 63, thereby obtaining the semiconductor device A10.

[0097] Next, an example of a method for manufacturing the semiconductor device A11 will be described with reference to Figures 24 and 25. The cross-sectional positions in Figures 24 and 25 correspond to Figure 17 showing the semiconductor device A11.

[0098] In one example of a manufacturing method for the semiconductor device A11, the third process P3 shown in FIG. 24 is performed after the first process P1 described above. After the third process P3 is performed, the second process P2 shown in FIG. 25 is performed. Therefore, in one example of a manufacturing method for the semiconductor device A11, the third process P3 is a pre-processing step for the second process P2. The third process P3 may be performed simultaneously with the first process P1 by solid-state diffusion. In this case, each of the multiple first semiconductor elements 21 is conductively bonded to the first mounting surface 112A of the first conductive layer 112 by solid-state diffusion. Each of the multiple second semiconductor elements 22 is conductively bonded to the second mounting surface 113A of the second conductive layer 113 by solid-state diffusion. In the second process P2, the bottom surface 52 of the sealing resin 50 contacts the first surface 72A of the support member 72. After the second process P2, the semiconductor device A11 is obtained by performing the fourth process P4 described above and other steps.

[0099] Next, a vehicle C equipped with the semiconductor module B10 will be described with reference to Fig. 26. The vehicle C is, for example, an electric vehicle (EV).

[0100] As shown in Fig. 26, vehicle C includes an on-board charger 91, a storage battery 92, and a drive system 93. Power is supplied to the on-board charger 91 wirelessly from a power supply facility (not shown) installed outdoors. Alternatively, power may be supplied from the power supply facility to the on-board charger 91 via a wired connection. The on-board charger 91 is configured with a step-up DC-DC converter. The voltage of the power supplied to the on-board charger 91 is stepped up by the converter and then supplied to the storage battery 92. The stepped-up voltage is, for example, 600 V.

[0101] The drive system 93 drives the vehicle C. The drive system 93 includes an inverter 931 and a drive source 932. The semiconductor module B10 constitutes part of the inverter 931. Power stored in the storage battery 92 is supplied to the inverter 931. The power supplied from the storage battery 92 to the inverter 931 is DC power. Alternatively, unlike the power system shown in FIG. 26 , a step-up DC-DC converter may be further provided between the storage battery 92 and the inverter 931. The inverter 931 converts DC power into AC power. The inverter 931 including the semiconductor module B10 is connected to the drive source 932. The drive source 932 includes an AC motor and a transmission. When the AC power converted by the inverter 931 is supplied to the drive source 932, the AC motor rotates and the rotation is transmitted to the transmission. The transmission appropriately reduces the rotation speed transmitted from the AC motor and rotates the drive shaft of the vehicle C. This drives the vehicle C. To drive the vehicle C, it is necessary to freely control the rotation speed of the AC motor based on information such as the amount of fluctuation in the accelerator pedal. Therefore, the semiconductor module B10 in the inverter 931 is necessary to output AC power whose frequency is appropriately changed to correspond to the required rotation speed of the AC motor.

[0102] Next, the effects of the semiconductor device A10 will be described.

[0103] The semiconductor device A10 includes a substrate 11, a first semiconductor element 21, a support member 72, and a heat dissipation member 71. The heat dissipation member 71 is a member different from the support member 72 and is supported by the substrate 11. The support member 72 has a first surface 72A that faces the side where the first semiconductor element 21 is located relative to the substrate 11 in the first direction z. The substrate 11 is supported by the first surface 72A. This configuration allows the heat dissipation member 71 to be fabricated as a separate member from the support member 72 during the manufacturing process of the semiconductor device A10. This increases the degree of freedom in the shape of the heat dissipation member 71, allowing the shape of the heat dissipation member 71 to be more complex. Therefore, this configuration allows the semiconductor device A10 to be provided with a heat dissipation member 71 with a more complex shape.

[0104] The semiconductor device A10 further includes a sealing resin 50 that covers the first semiconductor element 21 and faces the support member 72. The base material 11 is exposed from a bottom surface 52 of the sealing resin 50 and is bonded to a first surface 72A of the support member 72. This configuration allows the base material 11 to be fixed to the support member 72 without using an attachment member such as a leaf spring, while protecting the first semiconductor element 21.

[0105] In the semiconductor device A11, the bottom surface 52 of the sealing resin 50 contacts the first surface 72A of the support member 72. By adopting this configuration, the support member 72 can be used as part of the molding die for forming the sealing resin 50 in the second process P2 of the manufacturing of the semiconductor device A11.

[0106] The heat dissipation member 71 includes a first heat dissipation body 71A and a second heat dissipation body 71B adjacent to each other in the second direction x. Each of the first heat dissipation body 71A and the second heat dissipation body 71B has a first base portion 711, a second base portion 712, a first main portion 713, a second main portion 714, and a connecting portion 715. This configuration further increases the surface area of ​​each of the first heat dissipation body 71A and the second heat dissipation body 71B. As a result, in the configuration of the semiconductor module B10 shown in FIGS. 18 and 19 , the surface area of ​​each of the first heat dissipation body 71A and the second heat dissipation body 71B that comes into contact with the refrigerant is further increased, further improving the heat dissipation performance of the semiconductor device A10.

[0107] The semiconductor device A10 further includes a first signal terminal 161 that is electrically connected to the first gate electrode 213 of the first semiconductor element 21. A portion of the first signal terminal 161 protrudes from the top surface 51 of the sealing resin 50. With this configuration, when a control board that is electrically connected to the first signal terminal 161 is arranged in the semiconductor module B10, the arrangement of the control board becomes more compact.

[0108] Second Embodiment: A semiconductor device A20 according to a second embodiment of the present disclosure will be described with reference to Figures 27 and 28. In this figure, elements that are the same as or similar to those in the semiconductor device A10 described above are designated by the same reference numerals, and duplicated descriptions will be omitted. Here, Figure 28 corresponds to Figure 8, which shows the semiconductor device A10.

[0109] In the semiconductor device A20, the configuration of the support member 72 is different from that of the semiconductor device A10.

[0110] 27 and 28 , the support member 72 has a first support portion 721 and two second support portions 722. The first support portion 721 includes a first surface 72A and a second surface 72B. The two second support portions 722 are located outward from the first support portion 721 when viewed in the first direction z. The two second support portions 722 are located on opposite sides of the first support portion 721 in the second direction x. Each of the two second support portions 722 is connected to the first support portion 721. Each of the two second support portions 722 extends in the third direction y.

[0111] 28 , the dimension in the first direction z of the first support portion 721 is smaller than the dimension in the first direction z of each of the two second support portions 722. When viewed in the second direction x, each of the two second support portions 722 overlaps a plurality of heat dissipation members 71.

[0112] Next, a semiconductor device A21 according to a modification of the semiconductor device A20 will be described with reference to Figures 29 and 30. The cross-sectional position in Figure 30 corresponds to the cross-sectional position in Figure 28.

[0113] The semiconductor device A21 differs from the semiconductor device A20 in the configuration of the support member 72.

[0114] As shown in FIG. 30 , each of the two second support portions 722 of the support member 72 overlaps the base material 11 .

[0115] Next, the semiconductor module B20 will be described with reference to Fig. 31. The semiconductor module B20 includes the semiconductor device A20 and a cooler 80. The cross-sectional position in Fig. 31 corresponds to the cross-sectional position in Fig. 18 showing the semiconductor module B10 described above.

[0116] 31 , the support surface 80A of the cooler 80 faces each of the two second support portions 722 of the support member 72. The seal material 89 is sandwiched between the support surface 80A and the two second support portions 722.

[0117] Next, the effects of the semiconductor device A20 will be described.

[0118] The semiconductor device A20 includes a substrate 11, a first semiconductor element 21, a support member 72, and a heat dissipation member 71. The heat dissipation member 71 is a member different from the support member 72 and is supported by the substrate 11. The support member 72 has a first surface 72A that faces the side where the first semiconductor element 21 is located, with the substrate 11 as the reference in the first direction z. The substrate 11 is supported by the first surface 72A. Therefore, with this configuration, the semiconductor device A20 can also be provided with a heat dissipation member 71 having a more complex shape. Furthermore, by including a configuration common to the semiconductor device A10, the semiconductor device A20 achieves the same effects as the semiconductor device A10.

[0119] In the semiconductor device A20, the support member 72 has a first support portion 721 and a second support portion 722. The first support portion 721 has a second surface 72B facing the opposite side to the first surface 72A in the first direction z. The heat dissipation member 71 is bonded to the second surface 72B. The dimension of the first support portion 721 in the first direction z is smaller than the dimension of the second support portion 722 in the first direction z. This configuration makes the bending rigidity of the first support portion 721 around the third direction y smaller than the bending rigidity of the second support portion 722 around the third direction y. This makes it easier for the first support portion 721 to follow warpage of the base material 11 and the sealing resin 50 around the third direction y. This improves the bonding state of the base material 11 to the first surface 72A.

[0120] Furthermore, since each of the first heat dissipation body 71A and the second heat dissipation body 71B of the heat dissipation member 71 has a first base 711, a second base 712, a first main portion 713, a second main portion 714 and a connecting portion 715, it becomes easier for each of the first heat dissipation body 71A and the second heat dissipation body 71B to follow deformations of the first support portion 721.

[0121] Third Embodiment: A semiconductor device A30 according to a third embodiment of the present disclosure will be described with reference to Figures 32 and 33. In this figure, elements that are the same as or similar to those in the semiconductor device A10 described above are designated by the same reference numerals, and duplicated descriptions will be omitted. Here, Figure 33 corresponds to Figure 8, which shows the semiconductor device A10.

[0122] In the semiconductor device A30, the configuration of the support member 72 is different from that of the semiconductor device A20.

[0123] 32 and 33 , each of the two second support portions 722 of the support member 72 has a first portion 722A and a second portion 722B. The first portion 722A is spaced apart from the first support portion 721 of the support member 72 in the first direction z. The dimension of the first portion 722A in the first direction z is equal to the dimension of the first support portion 721 in the first direction z. The second portion 722B is located between the first portion 722A and the first support portion 721 in the second direction x. The second portion 722B is connected to the first portion 722A and the first support portion 721.

[0124] 33 , the dimension in the first direction z of the first support portion 721 is smaller than the dimension in the first direction z of the second portion 722B of each of the two second support portions 722. When viewed in the second direction x, the second portion 722B of each of the two second support portions 722 overlaps the multiple heat dissipation members 71.

[0125] Next, a semiconductor device A31 according to a modification of the semiconductor device A30 will be described with reference to Figures 34 and 35. The cross-sectional position in Figure 35 corresponds to the cross-sectional position in Figure 33.

[0126] The semiconductor device A31 differs from the semiconductor device A30 in the configuration of the support member 72.

[0127] As shown in FIG. 35 , the second portion 722 B of each of the two second support portions 722 of the support member 72 overlaps the base material 11 .

[0128] Next, a semiconductor module B30 will be described with reference to Fig. 36. The semiconductor module B30 includes the semiconductor device A30 and a cooler 80. The cross-sectional position in Fig. 36 corresponds to the cross-sectional position in Fig. 18 showing the semiconductor module B10 described above.

[0129] 36 , the support surface 80A of the cooler 80 faces the first portions 722A of the two second support portions 722 of the support member 72. The sealant 89 is sandwiched between the support surface 80A and the first portions 722A of the two second support portions 722.

[0130] Next, the effects of the semiconductor device A30 will be described.

[0131] The semiconductor device A30 includes a base material 11, a first semiconductor element 21, a support member 72, and a heat dissipation member 71. The heat dissipation member 71 is a member different from the support member 72 and is supported by the base material 11. The support member 72 has a first surface 72A that faces the side where the first semiconductor element 21 is located, with the base material 11 as the reference in the first direction z. The base material 11 is supported by the first surface 72A. Therefore, with this configuration, the semiconductor device A30 can also be provided with a heat dissipation member 71 having a more complex shape. Furthermore, by having a configuration in common with the semiconductor device A10, the semiconductor device A30 achieves the same effects as the semiconductor device A10.

[0132] In the semiconductor device A30, the second support portion 722 of the support member 72 has a first portion 722A and a second portion 722B. The first portion 722A is spaced apart from the first support portion 721 of the support member 72 in the first direction z. The dimension of the first support portion 721 in the first direction z is smaller than the dimension of the second portion 722B in the first direction z. This configuration results in the bending rigidity of the first support portion 721 around the third direction y being smaller than the bending rigidity of the second support portion 722 around the third direction y. Therefore, in the semiconductor device A30, the first support portion 721 can more easily follow the warpage of the base material 11 and the sealing resin 50 around the third direction y, thereby improving the bonding state of the base material 11 to the first surface 72A. Furthermore, the support member 72 of the semiconductor device A30 can be more easily fabricated by bending than the support member 72 of the semiconductor device A20.

[0133] Fourth Embodiment: A semiconductor device A40 according to a fourth embodiment of the present disclosure will be described with reference to Figures 37 to 39. In these figures, elements that are the same as or similar to those in the semiconductor device A10 described above are given the same reference numerals, and duplicated descriptions will be omitted. Here, Figure 38 corresponds to Figure 8, which shows the semiconductor device A10. Figure 39 corresponds to Figure 11, which shows the semiconductor device A10.

[0134] In the semiconductor device A40, the configurations of the heat dissipation members 71 and the support member 72 are different from those of the semiconductor device A20.

[0135] 37 to 39 , the first base portion 711 and the second base portion 712 of each of the plurality of heat dissipation members 71 are joined to the heat dissipation layer 114 of the base material 11 by laser welding or the like. Therefore, the plurality of heat dissipation members 71 are directly supported by the heat dissipation layer 114 without being interposed between the support member 72 and the bonding layer 79.

[0136] As shown in FIGS. 37 to 39 , the support member 72 has a first support portion 721 and a second support portion 722. The first support portion 721 is frame-shaped and surrounds the multiple heat dissipation members 71 as viewed in the first direction z. The second support portion 722 is connected to the outer edge of the first support portion 721 as viewed in the first direction z. The first support portion 721 includes a first surface 72A. The heat dissipation layer 114 of the base material 11 is bonded to the first surface 72A via a bonding layer 79. Here, if the bonding layer 79 is made of a thermally conductive material containing resin, the bottom surface 52 of the sealing resin 50 can also be bonded to the first surface 72A via the bonding layer 79 in addition to the heat dissipation layer 114. Alternatively, the heat dissipation layer 114 may be directly bonded to the first surface 72A by laser welding or the like, without using the bonding layer 79.

[0137] 38 and 39 , the dimension of the first support portion 721 in the first direction z is smaller than the dimension of the second support portion 722 in the first direction z. When viewed in each of the second direction x and the third direction y, the second support portion 722 overlaps with the plurality of heat dissipation members 71. When viewed in each of the second direction x and the third direction y, the second support portion 722 is spaced apart from the base material 11.

[0138] Next, a semiconductor device A41 according to a modified example of the semiconductor device A40 will be described with reference to Figures 40 to 42. Here, the cross-sectional position in Figure 41 corresponds to the cross-sectional position in Figure 38. The cross-sectional position in Figure 42 corresponds to the cross-sectional position in Figure 39.

[0139] The semiconductor device A41 differs from the semiconductor device A40 in the configuration of the support member 72.

[0140] As shown in FIGS. 41 and 42 , the second support portion 722 of the support member 72 overlaps the base material 11 when viewed in the second direction x and the third direction y.

[0141] Next, a semiconductor module B40 will be described with reference to Fig. 43. The semiconductor module B40 includes a semiconductor device A40 and a cooler 80. The cross-sectional position in Fig. 43 corresponds to the cross-sectional position in Fig. 18 showing the semiconductor module B10 described above.

[0142] 43 , the support surface 80A of the cooler 80 faces the second support portion 722 of the support member 72. The seal material 89 is sandwiched between the support surface 80A and the second support portion 722.

[0143] Next, the effects of the semiconductor device A40 will be described.

[0144] The semiconductor device A40 includes a base material 11, a first semiconductor element 21, a support member 72, and a heat dissipation member 71. The heat dissipation member 71 is a member different from the support member 72 and is supported by the base material 11. The support member 72 has a first surface 72A that faces the side where the first semiconductor element 21 is located, with the base material 11 as the reference in the first direction z. The base material 11 is supported by the first surface 72A. Therefore, with this configuration, the semiconductor device A40 can also be provided with a heat dissipation member 71 having a more complex shape. Furthermore, by including a configuration common to the semiconductor device A10, the semiconductor device A40 achieves the same effects as the semiconductor device A10.

[0145] In the semiconductor device A40, the support member 72 has a first support portion 721 and a second support portion 722. The heat dissipation member 71 is bonded to the base material 11. The dimension of the first support portion 721 in the first direction z is smaller than the dimension of the second support portion 722 in the first direction z. By adopting this configuration, also in the semiconductor device A40, the first support portion 721 can more easily follow the warping of the base material 11 and the sealing resin 50 around the third direction y, thereby improving the bonding state of the base material 11 to the first surface 72A.

[0146] In each of the configurations of the semiconductor device A10, semiconductor device A20, and semiconductor device A30 described above, compared to the configuration of the semiconductor device A40, a greater number of heat dissipation members 71 can be bonded to the second surface 72B of the support member 72. Furthermore, when there are multiple elements excluding the heat dissipation members 71 and the support member 72 in the configuration of any of the semiconductor device A10, semiconductor device A20, and semiconductor device A30, these multiple elements can be easily bonded to the first surface 72A of the support member 72.

[0147] The present disclosure is not limited to the above-described embodiment, and the specific configuration of each part of the present disclosure can be freely modified in various ways.

[0148] The present disclosure includes embodiments described in the following supplementary notes. Supplementary note 1. A semiconductor device (A10) comprising: a substrate (11); a first semiconductor element (21) mounted on one side of the substrate in a first direction (z); a support member (72) and a heat dissipation member (71) located on the opposite side of the substrate from the first semiconductor element, wherein the heat dissipation member is a member different from the support member and is supported by the substrate, the support member has a first surface (72A) facing the side on which the first semiconductor element is located relative to the substrate in the first direction, and the substrate is supported by the first surface. Supplementary note 2. The semiconductor device (A10) according to Appendix 1 further includes a sealing resin (50) that covers the first semiconductor element (21) and faces the support member (72), the sealing resin having a bottom surface (52) facing the opposite side to the first surface (72A) in the first direction (z), and the base material (11) is exposed from the bottom surface and bonded to the first surface. Appendix 3. The semiconductor device (A11) according to Appendix 2, wherein the bottom surface (52) is in contact with the first surface (72A). Appendix 4. The semiconductor device (A20, A30, A40) according to Appendix 2, wherein the support member (72) has a first support portion (721) including the first surface (72A) and a second support portion (722) located outward from the first support portion as viewed in the first direction (z) and connected to the first support portion, and the dimension of the first support portion in the first direction is smaller than the dimension of the second support portion in the first direction. Appendix 5. The semiconductor device (A20, A30) according to Appendix 4, wherein the first support portion (721) has a second surface (72B) facing opposite to the first surface (72A) in the first direction (z), and the heat dissipation member (71) is bonded to the second surface. Appendix 6. The semiconductor device (A20, A30) according to Appendix 5, wherein the second support portion (722) overlaps the heat dissipation member (71) as viewed in a direction perpendicular to the first direction (z). Supplementary Note 7. The semiconductor device (A21, A31) according to Supplementary Note 5, wherein the second support portion (722) overlaps the base material (11) when viewed in a direction perpendicular to the first direction (z).Supplementary Note 8. The semiconductor device (A30) according to Supplementary Note 5, wherein the second support portion (722) has a first portion (722A) spaced apart from the first support portion (721) in the first direction (z), and a second portion (722B) located between the first portion and the first support portion in a direction perpendicular to the first direction and connected to the first portion and the first support portion, and wherein the dimension of the first support portion in the first direction is smaller than the dimension of the second portion in the first direction. Supplementary Note 9. The semiconductor device (A30) according to Supplementary Note 8, wherein the second portion (722B) overlaps the heat dissipation member (71) when viewed in a direction perpendicular to the first direction (z). Supplementary Note 10. The semiconductor device (A31) according to Supplementary Note 8, wherein the second portion (722B) overlaps the base material (11) when viewed in a direction perpendicular to the first direction (z). Supplementary Note 11. The semiconductor device (A40) according to Appendix 4, wherein the heat dissipation member (71) is bonded to the base material (11). Appendix 12. The semiconductor device (A40) according to Appendix 11, wherein the first support portion (721) overlaps the heat dissipation member (71) when viewed in a direction perpendicular to the first direction (z). Appendix 13. The heat dissipation member (71) includes a first heat dissipation body (71A) and a second heat dissipation body (71B) adjacent to each other in a second direction (x) perpendicular to the first direction (z), each of the first heat dissipation body and the second heat dissipation body having a first base portion (711), a second base portion (712), a first main portion (713), a second main portion (715) and a connecting portion (716), the first base portion and the second base portion being adjacent to each other in the second direction and supported by the substrate (11), the first main portion extending from the first base portion in the first direction, and the second main portion being adjacent to the first main portion in the second direction and extending from the second base portion in the first direction, A semiconductor device (A10) described in any one of Appendices 2 to 12, wherein the connecting portion is located on the opposite side of the first base portion and the second base portion relative to the first main portion and the second main portion, and is connected to the first main portion and the second main portion.Appendix 14. The semiconductor device (A10) according to Appendix 13, wherein the first base portion (711) of the second heat sink (71B) is connected to the second base portion (712) of the first heat sink (71A). Appendix 15. The semiconductor device (A10) according to Appendix 14, wherein the base material (11) includes an insulating layer (111), a first conductive layer (112) located between the insulating layer and the first semiconductor element (21) in the first direction (z) and bonded to the insulating layer, and a heat dissipation layer (114) located on the opposite side of the insulating layer from the first conductive layer and bonded to the insulating layer, the first semiconductor element is conductively bonded to the first conductive layer, the heat dissipation layer is exposed from the bottom surface (52), and the heat dissipation member (71) is supported by the heat dissipation layer. Appendix 16. Supplementary Note 17. A semiconductor module (B10) comprising: the semiconductor device (A10) according to Supplementary Note 15, further comprising: a second semiconductor element (22) electrically connected to the first semiconductor element (21) and covered with the sealing resin (50), the base material (11) being located on the same side as the first conductive layer (112) with respect to the insulating layer (111) in the first direction (z) and including a second conductive layer (113) bonded to the insulating layer, and the second semiconductor element being bonded to the second conductive layer. Supplementary Note 17. A semiconductor module (B10) comprising: the semiconductor device (A10) according to Supplementary Note 16; and a cooler (80), wherein the support member (72) is supported by the cooler, the cooler has a hollow housing portion (81), and the heat dissipation member (71) is housed in the housing portion. Supplementary Note 18. A vehicle (C) comprising: a drive source (932); and a semiconductor module (B10) according to Supplementary Note 17, wherein the semiconductor module is electrically connected to the drive source.Appendix 19. A method for manufacturing a semiconductor device (A10), comprising: a first step (P1) of mounting a first semiconductor element (21) on one side of a substrate (11) in a first direction (z); a second step (P2) of forming a sealing resin (50) covering the first semiconductor element; a third step (P3) of bonding the substrate to a support member (72); and a fourth step (P4) of supporting a heat dissipation member (71) on the substrate, wherein the third step is either a pre-step or a post-step of the second step, the support member has a first surface (72A) and a second surface (72B) facing opposite sides in the first direction, and the substrate has a third surface (11A) facing the other side in the first direction, and in the third step, the third surface is bonded to the first surface. Appendix 20. A method for manufacturing a semiconductor device (A10) according to Appendix 19, wherein in the fourth step (P4), the heat dissipation member (71) is bonded to the second surface (72B). Appendix 21. A semiconductor device (A40) according to Appendix 12, wherein the second support portion (722) is spaced apart from the base material (11) when viewed in a direction perpendicular to the first direction (z). Appendix 22. A semiconductor device (A41) according to Appendix 12, wherein the second support portion (722) overlaps the base material (11) when viewed in a direction perpendicular to the first direction (z). Appendix 23. The semiconductor device (A10) according to Appendix 14, wherein the heat dissipation member (71) includes a third heat dissipation body (71C) extending in the first direction (z), the third heat dissipation body is located on one side of the first heat dissipation body (71A) and the second heat dissipation body (71B) in a third direction (y) perpendicular to each of the first direction and the second direction (x), and the shape and size of the third heat dissipation body are the same as the shape and size of the first heat dissipation body. Appendix 24. The semiconductor device (A10) according to Appendix 16, further comprising a first signal terminal (161) electrically connected to the first semiconductor element (21), the sealing resin (50) having a top surface (51) facing opposite to the bottom surface (52) in the first direction (z), and a portion of the first signal terminal protruding from the top surface in the first direction (z).Appendix 25. The semiconductor device (A10) according to Appendix 24, further comprising a first power terminal (12), a second power terminal (13), and a third power terminal (14), wherein the first power terminal is conductively bonded to the first conductive layer (112), the second power terminal is conductively bonded to the second conductive layer (113), and the third power terminal is electrically connected to the second semiconductor element (22), and a portion of each of the first power terminal, the second power terminal, and the third power terminal protrudes from the sealing resin (50). Appendix 26. A method for manufacturing the semiconductor device (A11) according to Appendix 20, wherein the third step (P3) is a step preceding the second step (P2). Appendix 27. A method for manufacturing the semiconductor device (A10) according to Appendix 20, wherein the third step (P3) is a step following the second step (P2), and wherein the second step exposes the third surface (11A) from the sealing resin (50).

[0149] A10 to A41: semiconductor device, B10 to B40: semiconductor module, C: vehicle, 11: base material, 11A: third surface, 111: insulating layer, 112, 113: first conductive layer, second conductive layer, 112A, 113A: first mounting surface, second mounting surface, 114: heat dissipation layer, 12: first terminal, 121: first covering portion, 122: first exposed portion, 13: second terminal, 131: second covering portion, 132: second exposed portion, 14: third terminal, 141: third covering portion, 142: third exposed portion, 15: fourth power terminal, 151: fourth covering portion, 152: fourth exposed portion, 161, 162: first signal terminal, second signal terminal, 171, 172: 72: third signal terminal, fourth signal terminal, 18, 19: fifth signal terminal, sixth signal terminal, 21: first semiconductor element, 211: first electrode, 212: second electrode, 213: first gate electrode, 214: first detection electrode, 22: second semiconductor element, 221: third electrode, 222: fourth electrode, 223: second gate electrode, 224: second detection electrode, 23: thermistor, 29: conductive bonding layer, 31: first conductive member, 311: first main portion, 312: first bonding portion, 313: first connecting portion, 314: second bonding portion, 315: second connecting portion, 32: second conductive member, 321: second main portion, 322: third bonding portion, 32 3: third connecting portion, 324: fourth bonding portion, 325: fourth connecting portion, 326: middle portion, 327: horizontal beam portion, 41 to 47: first wire to seventh wire, 50: sealing resin, 51: top surface, 52: bottom surface, 53, 54: first side surface, second side surface, 55: recess, 61: first wiring, 611: first mounting layer, 612: first metal layer, 613: first gate wiring layer, 614: first detection wiring layer, 616: second detection wiring layer, 62: second wiring, 621: second mounting layer, 622: second metal layer, 623: second gate wiring layer, 624: third detection wiring layer, 625: temperature detection wiring layer, 63: sleeve, 68, 69: 1. Bonding layer, 2. Bonding layer, 71: Heat dissipation member, 71A, 71B, 71C: First heat dissipation body, 2. Heat dissipation body, 3. Heat dissipation body, 711, 712: First base, 2. Base, 713, 714: First main portion, 2. Main portion, 715: Connection portion, 716, 717, 718: First opening, 2. Opening, 3. Opening, 719: Flow-down area, 72: Support member, 72A, 72B: First surface, 2. Surface, 721, 722: First support portion, 2. Support portion, 722A, 722B: First portion, 2. Part, 79: Bonding layer, 80: Cooler, 80A: Support surface, 81: Storage portion, 89: Sealing material, S1 to S6: First cross section to 6. Cross section, d1, d2,d3: interval, P1 to P4: first to fourth steps, 91: on-board charger, 92: storage battery, 93: drive system, 931: inverter, 932: drive source, z, x, y: first direction, second direction, third direction,

Claims

1. A semiconductor device comprising: a substrate; a first semiconductor element mounted on one side of the substrate in a first direction; and a support member and a heat dissipation member located on the opposite side of the substrate from the first semiconductor element, wherein the heat dissipation member is a member different from the support member and is supported by the substrate, the support member has a first surface facing the side where the first semiconductor element is located in the first direction relative to the substrate, and the substrate is supported by the first surface.

2. The semiconductor device according to claim 1, further comprising a sealing resin covering the first semiconductor element and facing the support member, the sealing resin having a bottom surface facing the opposite side to the first surface in the first direction, and the base material being exposed from the bottom surface and bonded to the first surface.

3. The semiconductor device according to claim 2, wherein the bottom surface is in contact with the first surface.

4. The semiconductor device described in claim 2, wherein the support member has a first support portion including the first surface, and a second support portion located outward from the first support portion when viewed in the first direction and connected to the first support portion, and the dimension of the first support portion in the first direction is smaller than the dimension of the second support portion in the first direction.

5. The semiconductor device according to claim 4, wherein the first support portion has a second surface facing the opposite side to the first surface in the first direction, and the heat dissipation member is bonded to the second surface.

6. The semiconductor device according to claim 5, wherein the second support portion overlaps the heat dissipation member when viewed in a direction perpendicular to the first direction.

7. The semiconductor device according to claim 5, wherein the second support portion overlaps the base material when viewed in a direction perpendicular to the first direction.

8. The semiconductor device described in claim 5, wherein the second support portion has a first portion spaced apart from the first support portion in the first direction, and a second portion located between the first portion and the first support portion in a direction perpendicular to the first direction and connected to the first portion and the first support portion, and wherein the dimension of the first support portion in the first direction is smaller than the dimension of the second portion in the first direction.

9. The semiconductor device according to claim 8, wherein the second portion overlaps the heat dissipation member when viewed in a direction perpendicular to the first direction.

10. The semiconductor device according to claim 8, wherein the second portion overlaps the base material when viewed in a direction perpendicular to the first direction.

11. The semiconductor device according to claim 4, wherein the heat dissipation member is bonded to the base material.

12. The semiconductor device according to claim 11, wherein the first support portion overlaps the heat dissipation member when viewed in a direction perpendicular to the first direction.

13. A semiconductor device as described in any one of claims 2 to 12, wherein the heat dissipation member includes a first heat sink and a second heat sink adjacent to each other in a second direction perpendicular to the first direction, each of the first heat sink and the second heat sink having a first base, a second base, a first main portion, a second main portion and a connecting portion, the first base and the second base being located adjacent to each other in the second direction and supported by the substrate, the first main portion extending from the first base in the first direction, the second main portion being located adjacent to the first main portion in the second direction and extending from the second base in the first direction, and the connecting portion being located on the opposite side of the first base and the second base with respect to the first main portion and the second main portion and being connected to the first main portion and the second main portion.

14. The semiconductor device according to claim 13, wherein the first base portion of the second heat sink is connected to the second base portion of the first heat sink.

15. The semiconductor device described in claim 14, wherein the base material includes an insulating layer, a first conductive layer located between the insulating layer and the first semiconductor element in the first direction and bonded to the insulating layer, and a heat dissipation layer located on the opposite side of the insulating layer from the first conductive layer and bonded to the insulating layer, the first semiconductor element is conductively bonded to the first conductive layer, the heat dissipation layer is exposed from the bottom surface, and the heat dissipation member is supported by the heat dissipation layer.

16. The semiconductor device described in claim 15, further comprising a second semiconductor element that is electrically connected to the first semiconductor element and is covered with the sealing resin, the base material including a second conductive layer that is located on the same side as the first conductive layer relative to the insulating layer in the first direction and is bonded to the insulating layer, and the second semiconductor element is bonded to the second conductive layer.

17. A semiconductor module comprising: the semiconductor device according to claim 16; and a cooler; wherein the support member is supported by the cooler; the cooler has a hollow housing portion; and the heat dissipation member is housed in the housing portion.

18. A vehicle comprising: a drive source; and the semiconductor module according to claim 17, wherein the semiconductor module is electrically connected to the drive source.

19. A method for manufacturing a semiconductor device, comprising: a first step of mounting a first semiconductor element on one side of a substrate in a first direction; a second step of forming a sealing resin covering the first semiconductor element; a third step of bonding the substrate to a support member; and a fourth step of supporting a heat dissipation member on the substrate, wherein the third step is either a pre-step or post-step of the second step, the support member has a first surface and a second surface facing opposite each other in the first direction, the substrate has a third surface facing the other side in the first direction, and in the third step, the third surface is bonded to the first surface.

20. The method for manufacturing a semiconductor device according to claim 19, wherein in the fourth step, the heat dissipation member is bonded to the second surface.

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