Display panel, preparation method for display panel, and display apparatus
By designing the structure of array substrate, pixel definition layer and shielding layer in OLED display devices, and combining dry etching process to form sub-pixel light-emitting units separately, the problem of low pixel density in OLED display devices is solved, and high-density large-size display is realized.
Patent Information
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2024-09-20
- Publication Date
- 2026-03-12
AI Technical Summary
OLED displays have a low pixel density, making them difficult to apply to large-size displays. Furthermore, existing technologies are limited by the size and precision of the photomask, making it difficult to achieve high-density color displays.
By adopting a structural design consisting of an array substrate, a pixel definition layer, a masking layer, and a light-emitting layer, and forming an undercut structure through a dry etching process, sub-pixel light-emitting units are formed separately, avoiding multiple fine metal mask processes and achieving high-density color display.
It has achieved high-density OLED display panels that can be applied to large-size display devices, solving the problems of mask size and precision limitations and improving display performance.
Smart Images

Figure CN2024119885_12032026_PF_FP_ABST
Abstract
Description
Display panel, display panel manufacturing method and display device
[0001] This application claims priority to Chinese Patent Application No. 202411237254.5, filed on September 3, 2024, the entire contents of which are incorporated herein by reference. TECHNICAL FIELD
[0002] The present application relates to the technical field of display, in particular to a display panel, a display panel manufacturing method and a display device. BACKGROUND
[0003] Organic light-emitting diode (OLED) display devices are widely used in various fields due to their lightness, wide viewing angle, fast response, low temperature resistance, high luminous efficiency, and ability to produce flexible display screens. In order to achieve color display, OLED display devices form red sub-pixels, blue sub-pixels and green sub-pixels through multiple fine metal mask processes, but due to the size and precision limitations of the mask plate, a certain process error space needs to be reserved when forming sub-pixels, resulting in a low pixel density of OLED display devices formed using the mask plate, and making it difficult to apply to large-size display devices. SUMMARY
[0004] Therefore, the present application provides a display panel and a display device to solve the technical problem of low pixel density of OLED display devices and difficulty in applying to large-size display devices.
[0005] To solve the above problems, the technical solutions provided by the present application are as follows:
[0006] In a first aspect, the present application provides a display panel, which comprises: an array substrate comprising a first metal layer, the first metal layer comprising a first auxiliary electrode and a first anode located on one side of the first auxiliary electrode; a pixel definition layer located on one side of the array substrate and covering the first metal layer; the pixel definition layer comprising a first auxiliary opening and a first pixel opening, a part of the first auxiliary electrode being exposed from the first auxiliary opening, and a part of the first anode being exposed from the first pixel opening; a light-emitting layer comprising a first light-emitting unit and located on a side of the pixel definition layer away from the array substrate, the first light-emitting unit being connected to the first anode and the first auxiliary electrode respectively; and a second metal layer comprising a cathode, the cathode being located on a side of the light-emitting layer away from the pixel definition layer; wherein the display panel further comprises a shielding layer located between the pixel definition layer and the light-emitting layer, the shielding layer being connected to the first light-emitting unit and not connected to the cathode; the first auxiliary electrode has a first undercut structure, the first undercut structure corresponding to the position of the first auxiliary opening, and the first light-emitting unit is disconnected at the first undercut structure.
[0007] In a second aspect, the present application also provides a display device, which comprises the display panel as above.
[0008] In a third aspect, the present application also provides a method for manufacturing a display panel, which comprises: forming an array substrate, the array substrate comprising a first metal layer, the first metal layer comprising a first auxiliary electrode, a first anode located at one side of the first auxiliary electrode, a second auxiliary electrode, and a second anode located at one side of the second auxiliary electrode;
[0009] forming a pixel definition layer at one side of the array substrate, the pixel definition layer covering the first metal layer and comprising a first auxiliary opening, a first pixel opening, a second auxiliary opening, and a second pixel opening, a part of the first auxiliary electrode and a part of the second auxiliary electrode being exposed from the first auxiliary opening and the second auxiliary opening respectively, and the remaining pixel definition layer located in the first pixel opening and the second pixel opening covering the first anode and the second anode respectively;
[0010] forming a patterned shielding layer at the side of the pixel definition layer away from the array substrate, the part of the first auxiliary electrode and the part of the second auxiliary electrode being exposed from the shielding layer respectively;
[0011] etching the first auxiliary electrode and the second auxiliary electrode respectively to obtain a first undercut structure and a second undercut structure;
[0012] completely removing the remaining pixel definition layer located in the first pixel opening by a dry etching process to expose the first anode, and removing a part of the pixel definition layer located in the second pixel opening, the remaining pixel definition layer located in the second pixel opening covering the second anode;
[0013] forming a first initial light-emitting layer and a first initial cathode layer on the first initial light-emitting layer by full-area evaporation, and removing the remaining part of the first initial light-emitting layer and the first initial cathode layer by a dry etching process to obtain a first light-emitting unit and a first cathode part respectively, the first light-emitting unit being connected with the first anode and the first auxiliary electrode respectively and being disconnected at the first undercut structure, and the first cathode part being connected with the first auxiliary electrode;
[0014] completely removing the remaining pixel definition layer located in the second pixel opening by a dry etching process to expose the second anode; and
[0015] forming a second initial light-emitting layer and a second initial cathode layer on the second initial light-emitting layer by full-area evaporation, and removing the remaining part of the second initial light-emitting layer and the second initial cathode layer by a dry etching process to obtain a second light-emitting unit and a second cathode part respectively, the second light-emitting unit being connected with the second anode and the second auxiliary electrode respectively and being disconnected at the second undercut structure, and the second cathode part being connected with the second auxiliary electrode. BRIEF DESCRIPTION OF DRAWINGS
[0016] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed to be used in the embodiments description will be briefly introduced. Obviously, the drawings in the following description are only some embodiments of the present application, and other drawings can be obtained by those skilled in the art without any creative effort based on these drawings.
[0017] FIG. 1 is a schematic cross-sectional view of a display panel according to some embodiments of the present application.
[0018] FIG. 2 is a flowchart of a method for manufacturing a display panel according to some embodiments of the present application.
[0019] FIG. 3 is a cross-sectional view of an intermediate structure according to some embodiments of the present application.
[0020] FIG. 4 is a cross-sectional view of the first intermediate structure shown in FIG. 3 after a first dry etching.
[0021] FIG. 5 is a cross-sectional view of the first intermediate structure shown in FIG. 4 after a first light-emitting unit and a first cathode portion are formed thereon.
[0022] FIG. 6 is a cross-sectional view of the first intermediate structure shown in FIG. 5 after a second light-emitting unit and a second cathode portion are formed thereon.
[0023] FIG. 7 is a cross-sectional view of the first intermediate structure shown in FIG. 6 after a third light-emitting unit and a third cathode portion are formed thereon to obtain a second intermediate structure.
[0024] 100, display panel; 110, array substrate; 120, pixel definition layer; 130, shielding layer; 140, light emitting layer; 150, second metal layer; 10, first metal layer; 11, first auxiliary electrode; 12, first anode; 13, second auxiliary electrode; 14, second anode; 15, third auxiliary electrode; 16, third anode; 101, first electrode layer; 102, second electrode layer; 103, third electrode layer; 111, first undercut structure; 121, second undercut structure; 131, third undercut structure; 112, first undercut groove; 1121, first sub-groove; 1122, second sub-groove; 122, second undercut groove; 1221, third sub-groove; 1222, fourth sub-groove; 132, third undercut groove; 1321, fifth sub-groove; 1322, sixth sub-groove; 104, light shielding layer; 105, transistor; 1041, first light shielding part; 1042, second light shielding part; 21, first auxiliary opening; 22, first pixel opening; 23, second auxiliary opening; 24, second pixel opening; 25, third auxiliary opening; 26, third pixel opening; 31, first shielding unit; 32, second shielding unit; 33, third shielding unit; 34, first opening; 35, second opening; 27, third opening; 28, fourth opening; 41, first light emitting unit; 42, second light emitting unit; 43, third light emitting unit; 411, first light emitting part; 412, second light emitting part; 421, third light emitting part; 422, fourth light emitting part; 431, fifth light emitting part; 432, sixth light emitting part; 401, first gap; 402, second gap; 50, cathode; 51, first cathode part; 52, second cathode part; 53, third cathode part; 160, encapsulation layer; 1001, first intermediate structure; 170, first initial light emitting layer; 171, first initial cathode layer; 180, second initial light emitting layer; 181, second initial cathode layer; 190, third initial light emitting layer; 191, third initial cathode layer; 1002, second intermediate structure. Embodiments of the present application
[0025] The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all the embodiments of the present application. Based on the embodiments in the present application, all other embodiments obtained by a person skilled in the art without creative work fall within the protection scope of the present application.
[0026] In the description of the present application, it should be understood that the terms "length", "width", "thickness", "upper", "lower", "front", "back", "left", "right", "top", "bottom", "inner", "outer" and the like indicate the orientation or positional relationship based on the orientation or positional relationship shown in the drawings, and are only for the purpose of facilitating the description of the present application and simplifying the description, and do not indicate or imply that the device or element referred to must have a particular orientation, be constructed and operated in a particular orientation, and therefore cannot be understood as limiting the present application. In addition, the terms "first", "second" are only for the purpose of description, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Therefore, the features defined as "first", "second" can explicitly or implicitly include one or more features. In the description of the present application, the meaning of "multiple" is two or more, at least one of which can be one, two or more, unless otherwise specifically limited. In the description of the present application, "vertical" means completely vertical at 90° or almost completely vertical, for example, within an angle range of 80°-100°, it is considered as vertical, and similarly, "parallel" means completely parallel or almost completely parallel, for example, within a range of 10° of complete parallel, it is considered as parallel.
[0027] It should be noted that the present application uses an arrow marked X to represent the thickness direction of the display panel, which is the direction of the pixel layer towards the light control layer. The thickness direction X of the display panel is introduced to facilitate the description of the structural positional relationship of the display panel, and to facilitate understanding of its structure.
[0028] It should also be noted that in the drawings of the specification, a dashed arrow is used to represent the main light direction of pixel light emission.
[0029] Please refer to FIG. 1, the present application provides a display panel 100, which can be an OLED display panel of Low Temperature Poly-Silicon (LTPS), Indium Gallium Zinc Oxide (IGZO), Active-matrix organic light-emitting diode (AMOLED) and the like.
[0030] The display panel 100 includes an array substrate 110, a pixel definition layer 120, a shielding layer 130, a light-emitting layer 140, and a second metal layer 150. The array substrate 110, the pixel definition layer 120, the shielding layer 130, the light-emitting layer 140, and the second metal layer 150 are stacked in sequence.
[0031] In some embodiments of the present application, the array substrate 110 comprises a first metal layer 10, which comprises a first auxiliary electrode 11, a first anode 12 located on one side of the first auxiliary electrode 11, a second auxiliary electrode 13, a second anode 14 located on one side of the second auxiliary electrode 13, a third auxiliary electrode 15, and a third anode 16 located on one side of the third auxiliary electrode 15.
[0032] In some embodiments of the present application, the first anode 12 is located between the first auxiliary electrode 11 and the second auxiliary electrode 13, the second auxiliary electrode 13 is located between the first anode 12 and the second anode 14, the second anode 14 is located between the second auxiliary electrode 13 and the third auxiliary electrode 15, and the third anode 16 is located on the side of the third auxiliary electrode 15 away from the second anode 14. In other embodiments, the arrangement order of the first auxiliary electrode 11, the first anode 12, the second auxiliary electrode 13, the second anode 14, the third auxiliary electrode 15, and the third anode 16 is not limited, and can be set according to actual conditions.
[0033] In some embodiments of the present application, the first metal layer 10 can further comprise more auxiliary electrodes and anodes.
[0034] In some embodiments of the present application, the first auxiliary electrode 11, the first anode 12, the second auxiliary electrode 13, the second anode 14, the third auxiliary electrode 15, and the third anode are arranged in the same layer and have the same material. The film layer structure of the first auxiliary electrode 11, the first anode 12, the second auxiliary electrode 13, the second anode 14, the third auxiliary electrode 15, and the third anode 16 is described below by taking the first auxiliary electrode 11 as an example. The first anode 12, the second anode 14, and the third anode 16 can respectively form an electric field with a cathode to realize display of a display panel, and the first auxiliary electrode 11, the second auxiliary electrode 13, and the third auxiliary electrode 15 can respectively contact the cathode to reduce impedance of the cathode, improve electrical properties of the display panel, and reduce power consumption of the display panel.
[0035] The first auxiliary electrode 11 comprises a first electrode layer 101, a second electrode layer 102, and a third electrode layer 103 located between the first electrode layer 101 and the second electrode layer 102, which are stacked in the stacking direction of the array substrate 110 and the pixel definition layer 120, and the first electrode layer 101 is located on the array substrate 110.
[0036] The material of the first electrode layer 101 is the same as or different from the material of the second electrode layer 102, and the material of the first electrode layer 101 and the material of the second electrode layer 102 are different from the material of the third electrode layer 103. In some embodiments of the present application, the material of the first electrode layer 101 and the material of the second electrode layer 102 are indium tin oxide (ITO) or indium zinc oxide (IZO), and the material of the third electrode layer 103 is silver (Ag) metal. The first auxiliary electrode 11 has a sandwich structure and different materials, which is beneficial to obtain the first undercut structure 111 with the upper and lower layers being inwardly recessed and the middle layer being protruded.
[0037] The first auxiliary electrode 11 has the first undercut structure 111, the second auxiliary electrode 13 has the second undercut structure 121, and the third auxiliary electrode 15 has the third undercut structure 131.
[0038] The first auxiliary electrode 11 has the first undercut structure 111, the second auxiliary electrode 13 has the second undercut structure 121, and the third auxiliary electrode 15 has the third undercut structure 131.
[0039] The first undercut structure 111 includes a first undercut groove 112, and the first undercut groove 112 includes a first sub-groove 1121 and a second sub-groove 1122 in communication. The first sub-groove 1121 is located between the third electrode layer 103 of the first auxiliary electrode 11, the first electrode layer 101, and the array substrate 110. The second sub-groove 1122 is located between the third electrode layer 103 of the first auxiliary electrode 11 and the second electrode layer 102.
[0040] The second undercut structure 121 includes a second undercut groove 122, and the second undercut groove 122 includes a third sub-groove 1221 and a fourth sub-groove 1222 in communication. The third sub-groove 1221 is located between the third electrode layer 103 of the second auxiliary electrode 13, the first electrode layer 101, and the array substrate 110. The fourth sub-groove 1222 is located between the third electrode layer 103 of the second auxiliary electrode 13 and the second electrode layer 102.
[0041] The third undercut structure 131 includes a third undercut groove 132, and the third undercut groove 132 includes a fifth sub-groove 1321 and a sixth sub-groove 1322 which are communicated. The fifth sub-groove 1321 is located between the third electrode layer 103, the first electrode layer 101 and the array substrate 110 of the second auxiliary electrode 13 of the third auxiliary electrode 15. The sixth sub-groove 1322 is located between the third electrode layer 103 and the second electrode layer 102 of the third auxiliary electrode 15.
[0042] In some embodiments of the present application, the array substrate 110 further includes a light shielding layer 104 facing away from the pixel definition layer 120 and a transistor 105 located between the light shielding layer 104 and the first metal layer 10. The light shielding layer 104 includes a plurality of first light shielding portions 1041 and a plurality of second light shielding portions 1042, and the transistor 105 is located between the light shielding layer 104 and the first metal layer 10. The first auxiliary electrode 11, the second auxiliary electrode 13 and the third auxiliary electrode 15 are respectively connected with one first light shielding portion 1041. The first anode 12, the second anode 14 and the third anode 16 are respectively connected with one transistor 105. The transistor 105 connected with the first anode 12, the second anode 14 and the third anode 16 respectively is respectively connected with one second light shielding portion 1042.
[0043] In some embodiments of the present application, the array substrate 110 can further include a base film layer, and the transistor 105 can include a border layer, a gate layer, a source-drain layer, etc., which are not described in detail herein.
[0044] The pixel definition layer 120 is located on one side of the array substrate 110 and covers the first metal layer 10.
[0045] In some embodiments of the present application, the pixel definition layer 120 includes a first auxiliary opening 21, a first pixel opening 22, a second auxiliary opening 23, a second pixel opening 24, a third auxiliary opening 25 and a third pixel opening 26. A part of the first auxiliary electrode 11 is exposed from the first auxiliary opening 21, and a part of the first anode 12 is exposed from the first pixel opening 22. A part of the second auxiliary electrode 13 is exposed from the second auxiliary opening 23, and a part of the second anode 14 is exposed from the second pixel opening 24. A part of the third auxiliary electrode 15 is exposed from the third auxiliary opening 25, and a part of the third anode 16 is exposed from the third pixel opening 26. The first auxiliary opening 21 is communicated with the second sub-groove 1122 of the first undercut groove 112, the second auxiliary opening 23 is communicated with the fourth sub-groove 1222 of the second undercut groove 122, and the third auxiliary opening 25 is communicated with the sixth sub-groove 1322 of the third undercut groove 132.
[0046] The blocking layer 130 is located on the side of the pixel definition layer 120 away from the array substrate 110, and the blocking layer 130 includes a first blocking unit 31, a second blocking unit 32 and a third blocking unit 33 which are arranged at intervals.
[0047] The first shielding unit 31 is opposite to the first light emitting unit 41 (see below) of the light emitting layer 140, and is disconnected at the first auxiliary opening 21 and the first pixel opening 22 respectively and connected with the second electrode layer 102 of the first auxiliary electrode 11. The first shielding unit 31 is located on the surface of the pixel definition layer 120 away from the array substrate 110 and the sidewall of the first auxiliary opening 21.
[0048] The second shielding unit 32 is opposite to the second light emitting unit 42 (see below) of the light emitting layer 140, and is disconnected at the second auxiliary opening 23 and the second pixel opening 24 respectively and connected with the second electrode layer 102 of the second auxiliary electrode 13. The second shielding unit 32 is located on the surface of the pixel definition layer 120 away from the array substrate 110 and the sidewall of the second auxiliary opening 23.
[0049] The third shielding unit 33 is opposite to the third light emitting unit 43 (see below) of the light emitting layer 140, and is disconnected at the third auxiliary opening 25 and the third pixel opening 26 respectively and connected with the second electrode layer 102 of the third auxiliary electrode 15. The third shielding unit 33 is located on the surface of the pixel definition layer 120 away from the array substrate 110 and the sidewall of the third auxiliary opening 25.
[0050] In some embodiments of the present application, the shielding layer 130 is a single layer.
[0051] In some embodiments of the present application, the material of the shielding layer 130 is at least one of molybdenum-titanium (MoTi) alloy, titanium (Ti), molybdenum (Mo) and the like.
[0052] In some embodiments of the present application, the first shielding unit 31 and the second shielding unit 32 have a first opening 34 therebetween, and the second shielding unit 32 and the third shielding unit 33 have a second opening 35 therebetween. The pixel definition layer 120 has a third opening 27 and a fourth opening 28, the third opening 27 is opposite to the first opening 34, and the fourth opening 28 is opposite to the second opening 35.
[0053] In some embodiments of the present application, the first shielding unit 31 and the second shielding unit 32 have a first opening 34 therebetween, and the second shielding unit 32 and the third shielding unit 33 have a second opening 35 therebetween. The pixel definition layer 120 has a third opening 27 and a fourth opening 28, the third opening 27 is opposite to the first opening 34, and the fourth opening 28 is opposite to the second opening 35.
[0054] In some embodiments of the present application, the first light emitting unit 41 is broken at the first undercut structure 111 to form a first light emitting part 411 and a second light emitting part 412. The first light emitting part 411 falls within the first sub-groove 1121 of the first undercut groove 112 and is connected with the end surface of the first electrode layer 101 of the first auxiliary electrode 11 facing the first sub-groove 1121 of the first undercut groove 112, the surface of the third electrode layer 103 of the first auxiliary electrode 11 protruding from the first electrode layer 101 and parallel to the array substrate 110, and the surface of the array substrate 110 exposed from the first undercut groove 112. The second light emitting part 412 is located on the surface of the first shielding unit 31 away from the pixel definition layer 120 and is connected with the surfaces of the second electrode layer 102 and the third electrode layer 103 of the first auxiliary electrode 11 parallel to the array substrate 110.
[0055] In some embodiments of the present application, the second light emitting unit 42 is broken at the second undercut structure 121 to form a third light emitting part 421 and a fourth light emitting part 422. The third light emitting part 421 falls within the third sub-groove 1221 of the second undercut groove 122 and is connected with the end surface of the first electrode layer 101 of the second auxiliary electrode 13 facing the third sub-groove 1221 of the second undercut groove 122, the surface of the third electrode layer 103 of the second auxiliary electrode 13 protruding from the first electrode layer 101 and parallel to the array substrate 110, and the surface of the array substrate 110 exposed from the second undercut groove 122. The third light emitting part 421 is located on the surface of the second shielding unit 32 away from the pixel definition layer 120 and is connected with the surfaces of the second electrode layer 102 and the third electrode layer 103 of the second auxiliary electrode 13 parallel to the array substrate 110.
[0056] In some embodiments of the present application, the third light emitting unit 43 is broken at the third undercut structure 131 to form a fifth light emitting part 431 and a sixth light emitting part 432. The fifth light emitting part 431 falls within the fifth sub-groove 1321 of the third undercut groove 132 and is connected with the end surface of the first electrode layer 101 of the third auxiliary electrode 15 facing the fifth sub-groove 1321 of the third undercut groove 132, the surface of the third electrode layer 103 of the second auxiliary electrode 13 protruding from the first electrode layer 101 and parallel to the array substrate 110, and the surface of the array substrate 110 exposed from the third undercut groove 132. The sixth light emitting part 432 is located on the surface of the third shielding unit 33 away from the pixel definition layer 120 and is connected with the surfaces of the second electrode layer 102 and the third electrode layer 103 of the third auxiliary electrode 15 parallel to the array substrate 110.
[0057] The first gap 401 is between the first light emitting unit 41 and the second light emitting unit 42, the second gap 402 is between the second light emitting unit 42 and the third light emitting unit 43, and the cathode (see below) is disconnected at the first gap 401 and the second gap 402. The third opening 27 of the pixel definition layer 120, the first opening 34 of the shielding layer 130, and the first gap 401 of the light emitting layer 140 are located opposite to each other, and the fourth opening 28 of the pixel definition layer 120, the second opening 35 of the shielding layer 130, and the second gap 402 of the light emitting layer 140 are located opposite to each other.
[0058] The second metal layer 150 is located on a side of the light emitting layer 140 away from the shielding layer 130, and the second metal layer 150 includes the cathode 50, the cathode 50 including a first cathode part 51, a second cathode part 52, and a third cathode part 53. The first cathode part 51 covers the first light emitting unit 41, the second cathode part 52 covers the second light emitting unit 42, and the third cathode part 53 covers the third light emitting unit 43. The first cathode part 51 is continuous at the first undercut structure 111, the second cathode part 52 is continuous at the second undercut structure 121, and the third cathode part 53 is continuous at the third undercut structure 131.
[0059] In some embodiments of the present application, the first cathode part 51 is connected to an end surface of the third electrode layer 103 of the first undercut structure 111 facing the first undercut groove 112, the second cathode part 52 is connected to an end surface of the third electrode layer 103 of the second undercut structure 121 facing the second undercut groove 122, and the third cathode part 53 is connected to an end surface of the third electrode layer 103 of the third undercut structure 131 facing the third undercut groove 132.
[0060] The first cathode part 51 is connected to the first light emitting unit 41 but not connected to the first shielding unit 31, the second cathode part 52 is connected to the second light emitting unit 42 but not connected to the second shielding unit 32, and the third cathode part 53 is connected to the third light emitting unit 43 but not connected to the third shielding unit 33.
[0061] The display panel 100 further includes an encapsulation layer 160 covering the second metal layer 150 and filling in the first gap 401, the first opening 34, the third opening 27, the second gap 402, the second opening 35, and the fourth opening 28.
[0062] Referring to FIGS. 1 to 7, the present application further provides a preparation method of a display panel, comprising:
[0063] In step S1, referring to FIGS. 2 and 3, an array substrate 110 is formed.
[0064] The array substrate 110 comprises a first metal layer 10, the first metal layer 10 comprises a first auxiliary electrode 11, a first anode 12 located at one side of the first auxiliary electrode 11, a second auxiliary electrode 13, a second anode 14 located at one side of the second auxiliary electrode 13, a third auxiliary electrode 15, and a third anode 16 located at one side of the third auxiliary electrode 15.
[0065] The first metal layer 10 comprises a first electrode layer 101, a second electrode layer 102, and a third electrode layer 103 located between the first electrode layer 101 and the second electrode layer 102, and the first electrode layer 101 is located on the array substrate 110 in the stacking direction of the array substrate 110 and the pixel definition layer 120.
[0066] The material of the first electrode layer 101 is the same as or different from the material of the second electrode layer 102, and the material of the first electrode layer 101 and the material of the second electrode layer 102 are different from the material of the third electrode layer 103.
[0067] In step S2, referring to FIGS. 2 and 3, the pixel definition layer 120 is formed on one side of the array substrate 110.
[0068] The pixel definition layer 120 covers the first metal layer 10 and comprises a first auxiliary opening 21, a first pixel opening 22, a second auxiliary opening 23, a second pixel opening 24, a third auxiliary opening 25, and a third pixel opening 26. A part of the first auxiliary electrode 11, a part of the second auxiliary electrode 13, and a part of the third auxiliary electrode 15 are exposed from the first auxiliary opening 21, the second auxiliary opening 23, and the third auxiliary opening 25, respectively. The remaining pixel definition layer located in the first pixel opening 22, the second pixel opening 24, and the third pixel opening 26 covers the first anode 12, the second anode 14, and the third anode 16, respectively.
[0069] The thickness of the remaining pixel definition layer located in the first pixel opening 22, the second pixel opening 24, and the third pixel opening 26 in the stacking direction of the pixel definition layer 120 and the array substrate 110 gradually increases.
[0070] In step S3, referring to FIGS. 2 and 3, a patterned shielding layer 130 is formed on the side of the pixel definition layer 120 away from the array substrate 110.
[0071] A part of the first auxiliary electrode 11, the second auxiliary electrode 13, and a part of the third auxiliary electrode 15 are exposed from the shielding layer, respectively.
[0072] The shielding layer 130 can play an isolation role when the remaining pixel definition layer 120 in the first pixel opening 22, the second pixel opening 24 and the third pixel opening 26 is removed by a subsequent dry etching process, so as to protect the pixel definition layer 120 and the first metal layer 10 at other positions from being etched synchronously or damaged.
[0073] The shielding layer 130 includes the first shielding unit 31, the second shielding unit 32 and the third shielding unit 33 which are arranged at intervals. The first shielding unit 31 corresponds to the first auxiliary electrode 11 and the first anode 12 in position, the second shielding unit 32 corresponds to the second auxiliary electrode 13 and the second anode 14 in position, and the third shielding unit 33 corresponds to the third auxiliary electrode 15 and the third anode 16 in position. The first shielding unit 31 is located on the surface of the pixel definition layer 120 away from the array substrate 110 and the sidewall of the first auxiliary opening 21. The second shielding unit 32 is located on the surface of the pixel definition layer 120 away from the array substrate 110 and the sidewall of the second auxiliary opening 23. The third shielding unit 33 is located on the surface of the pixel definition layer 120 away from the array substrate 110 and the sidewall of the third auxiliary opening 25.
[0074] The first shielding unit 31 and the second shielding unit 32 have the first opening 34 therebetween, and the second shielding unit 32 and the third shielding unit 33 have the second opening 35 therebetween. The third opening 27 is opposite to the first opening 34 in position, and the fourth opening 28 is opposite to the second opening 35 in position.
[0075] In step S4, the first auxiliary electrode 11, the second auxiliary electrode 13 and the third auxiliary electrode 15 are etched respectively to obtain the first undercut structure 111, the second undercut structure 121 and the third undercut structure 131, and a first intermediate structure 1001 is formed.
[0076] In some embodiments of the present application, the auxiliary electrode can be etched by using an acid capable of etching silver first, and then etched by using an acid capable of etching indium tin oxide (ITO), so that the undercut structure of the third electrode layer 103 beyond the first electrode layer 101 and the second electrode layer can be formed without increasing the process steps.
[0077] The first auxiliary electrode 11 includes the first undercut groove 112 which includes the first sub-groove 1121 and the second sub-groove 1122 that are communicated. The first sub-groove 1121 is located between the third electrode layer 103, the first electrode layer 101 and the array substrate 110 of the first auxiliary electrode 11, and the second sub-groove 1122 is located between the third electrode layer 103 and the second electrode layer 102 of the first auxiliary electrode 11.
[0078] The second auxiliary electrode 13 includes a second undercut groove 122, the second undercut groove 122 includes a third sub-groove 1221 and a fourth sub-groove 1222 which are communicated, the third sub-groove 1221 is located between the third electrode layer 103, the first electrode layer 101 and the array substrate 110 of the second auxiliary electrode 13, and the fourth sub-groove 1222 is located between the third electrode layer 103 and the second electrode layer 102 of the second auxiliary electrode 13.
[0079] The third auxiliary electrode 15 includes a third undercut groove 132, the third undercut groove 132 includes a fifth sub-groove 1321 and a sixth sub-groove 1322 which are communicated, the fifth sub-groove 1321 is located between the third electrode layer 103, the first electrode layer 101 and the array substrate 110 of the second auxiliary electrode 13 of the third auxiliary electrode 15, and the sixth sub-groove 1322 is located between the third electrode layer 103 and the second electrode layer 102 of the third auxiliary electrode 15.
[0080] In step S5, referring to FIG. 2 and FIG. 4, the remaining pixel definition layer located in the first pixel opening 22 is completely removed by a dry etching process to expose the first anode 12, and a part of the pixel definition layer 120 located in the second pixel opening 24 and the third pixel opening 26 is removed respectively.
[0081] The remaining pixel definition layer 120 located in the second pixel opening 24 covers the second anode 14, and the remaining pixel definition layer 120 located in the third pixel opening 26 covers the third anode 16.
[0082] After step S5, the thickness of the remaining pixel definition layer 120 located in the second pixel opening 24 in the stacking direction of the pixel definition layer 120 and the array substrate 110 is less than the thickness of the remaining pixel definition layer 120 located in the third pixel opening 26 in the stacking direction of the pixel definition layer 120 and the array substrate 110.
[0083] In step S6, referring to FIG. 2 and FIG. 5, a first initial light-emitting layer 170 is formed by whole-area evaporation, and a first initial cathode layer 171 is formed on the first initial light-emitting layer 170, and the remaining part of the first initial light-emitting layer 170 and the first initial cathode layer 171 are removed by a photoetch process to obtain a first light-emitting unit 41 and a first cathode part 51 respectively.
[0084] The first light-emitting unit 41 is connected with the first anode 12 and the first auxiliary electrode 11 respectively and is disconnected at the first undercut structure 111, and the first cathode part 51 is connected with the first auxiliary electrode 11.
[0085] The first cathode part 51 is not connected with the first shielding unit 31.
[0086] Step S7, referring to FIG. 2 and FIG. 5, the remaining pixel definition layer 120 in the second pixel opening 24 is completely removed by dry etching process to expose the second anode 14, and a part of the pixel definition layer 120 in the third pixel opening 26 is removed.
[0087] The thickness of the part of the pixel definition layer 120 in the third pixel opening 26 in the stacking direction of the pixel definition layer 120 and the array substrate 110 is greater than 0.
[0088] The thickness of the part of the pixel definition layer 120 in the third pixel opening 26 in the stacking direction of the pixel definition layer 120 and the array substrate 110 is greater than 0.
[0089] The second light emitting unit 42 is connected with the second anode 14 and the second auxiliary electrode 13 respectively and is disconnected at the second undercut structure 121, and the second cathode part 52 is connected with the second auxiliary electrode 13.
[0090] The second cathode part 52 is not connected with the second shielding unit 32.
[0091] The first light emitting unit 41 and the second light emitting unit 42 have a first gap 401 therebetween, and the cathode 50 (see below) is disconnected at the first gap 401.
[0092] Step S9, referring to FIG. 2 and FIG. 6, the remaining pixel definition layer 120 in the third pixel opening 26 is completely removed by dry etching process to expose the third anode 16.
[0093] Step S10, referring to FIG. 2 and FIG. 7, a third initial light emitting layer 190 is formed by full-area evaporation, and a third initial cathode layer 191 is formed on the third initial light emitting layer 190, and the remaining part of the third initial light emitting layer 190 and the third initial cathode layer 191 are removed by photolithography process to obtain a third light emitting unit 43 and a third cathode part 53 respectively.
[0094] The third light emitting unit 43 is connected with the third anode 16 and the third auxiliary electrode 15 respectively and is disconnected at the third undercut structure 131, the third cathode part 53 is connected with the third auxiliary electrode 15, and a second intermediate structure 1002 is formed.
[0095] The first cathode part 51, the second cathode part 52 and the third cathode part 53 are the cathode 50 and the second metal layer 150 or a part of the cathode 50 and the second metal layer 150. The first light emitting unit 41, the second light emitting unit 42 and the third light emitting unit 43 are a light emitting layer or a part of the light emitting layer.
[0096] The second gap 402 is between the second light emitting unit 42 and the third light emitting unit 43, and the cathode is disconnected at the second gap 402.
[0097] The first cathode part 51 and the first light emitting unit 41 correspond to a first sub-pixel, the second cathode part 52 and the second light emitting unit 42 correspond to a second sub-pixel, and the third cathode part 53 and the third light emitting unit 43 correspond to a third sub-pixel. The first sub-pixel, the second sub-pixel, and the third sub-pixel are sub-pixels of different colors, that is, the first light emitting unit 41, the second light emitting unit 42, and the third light emitting unit 43 emit light of different colors. In this embodiment, the first sub-pixel, the second sub-pixel, and the third sub-pixel are one of a red sub-pixel, a green sub-pixel, and a blue sub-pixel, respectively. In other embodiments, sub-pixels of other colors can also be included, and accordingly, the display panel also includes more light emitting units and cathode parts.
[0098] The third cathode part 53 is not connected to the third shielding unit 33.
[0099] The pixel definition layer 120 has a third opening 27 and a fourth opening 28. The third opening 27 is opposite to the first opening 34 and the first gap 401, and the fourth opening 28 is opposite to the second opening 35 and the second gap 402. The third opening 27 and the fourth opening 28 are formed synchronously by dry etching the remaining pixel definition layer 120 in the first pixel opening 22, the second pixel opening 24, and the third pixel opening 26.
[0100] After step S10, referring to FIG. 1, the method further includes a step of forming an encapsulation layer 160. The encapsulation layer 160 covers the second metal layer 150 and fills in the first gap 401, the first opening 34, the third opening 27, the second gap 402, the second opening 35, and the fourth opening 28.
[0101] The encapsulation layer 160 is used to protect the cathode 50 and the light emitting layer 140 and isolate water vapor. The encapsulation layer 160 fills in the first gap 401, the first opening 34, the third opening 27, the second gap 402, the second opening 35, and the fourth opening 28, so that each light emitting unit is disconnected, thereby avoiding water and oxygen intrusion and avoiding display abnormalities caused by light mixing in the area between adjacent sub-pixels.
[0102] The application also provides a display device (not shown in the figure). The display device includes the display panel 100 as described above. The display device can be a smart bracelet, a smart watch, a smart phone, a tablet computer, a notebook computer, a desktop computer, a television, or other electronic products.
[0103] The display panel, the preparation method of the display panel and the display device provided by the application, the display panel comprises: an array substrate comprising a first metal layer, the first metal layer comprising a first auxiliary electrode and a first anode located on one side of the first auxiliary electrode; a pixel definition layer located on one side of the array substrate and covering the first metal layer; the pixel definition layer comprises a first auxiliary opening and a first pixel opening, a part of the first auxiliary electrode is exposed from the first auxiliary opening, and a part of the first anode is exposed from the first pixel opening; a light-emitting layer comprising a first light-emitting unit and located on a side of the pixel definition layer away from the array substrate, the first light-emitting unit being connected with the first anode and the first auxiliary electrode respectively; and a second metal layer comprising a cathode, the cathode being located on a side of the light-emitting layer away from the pixel definition layer; wherein the display panel further comprises a shielding layer located between the pixel definition layer and the light-emitting layer, the shielding layer being connected with the first light-emitting unit and not connected with the cathode; the first auxiliary electrode has a first undercut structure, the first undercut structure corresponding to the position of the first auxiliary opening, and the first light-emitting unit is disconnected at the first undercut structure. By arranging the patterned shielding layer between the pixel definition layer and the light-emitting layer, when the light-emitting unit (for example, the first light-emitting unit) corresponding to the sub-pixel is formed, the pixel definition layer can be protected, and the first initial light-emitting layer can be formed by the whole-area evaporation, and then the excess first initial light-emitting layer can be removed by the photolithography process, so as to obtain the light-emitting unit (for example, the first light-emitting unit) corresponding to the sub-pixel. In the process of obtaining the light-emitting unit (for example, the first light-emitting unit) corresponding to the sub-pixel, the red sub-pixel, the blue sub-pixel and the green sub-pixel are not formed by the multiple fine metal mask processes, and are not limited by the size and precision of the mask plate, so that the problem of large-size evaporation of OLED can be solved, and a display panel with high pixel density can be manufactured.
[0104] In addition, since the formation of the light-emitting unit is carried out separately, when the first light-emitting unit is formed, the anode corresponding to other pixels is protected by the remaining pixel definition layer in the pixel opening, and when the corresponding light-emitting unit needs to be formed, the remaining pixel definition layer in the pixel opening is removed by the dry etching process, which is simple and convenient to operate and low in cost.
[0105] In addition, the patterned shielding layer is adopted and the shielding layer is disconnected at the undercut structure, the shielding layer does not need to form an undercut structure at the undercut structure, and the different light-emitting units, the cathode part and the lap joint of the cathode can be formed by cooperating with the remaining pixel definition layer in the pixel opening, which is simple and convenient to operate and low in cost.
[0106] In addition, since the auxiliary electrode (for example, the first auxiliary electrode) has an undercut structure and the shielding layer is broken at the undercut structure, the light-emitting layer is broken at the undercut structure, the cathode is continuous at the undercut structure and connected (edge contact) with the side surface (end surface) of the auxiliary electrode, after being powered on, certain Ag migration (Ag ions on the auxiliary electrode can migrate to the cathode) can be achieved, the impedance of the cathode can be reduced, and the cathode and the auxiliary electrode are better connected.
[0107] The above describes in detail the display panel and the display device provided by the embodiments of the present application, and the principles and implementation manners of the present application are described by using specific examples. The above embodiment descriptions are only used to help understand the technical solutions of the present application and the core ideas thereof. Those skilled in the art should understand that the technical solutions recorded in the foregoing embodiments can still be modified, or some technical features can be replaced equivalently; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the scope of the technical solutions of the embodiments of the present application.
Claims
1. A display panel, wherein, The display panel comprises: an array substrate comprising a first metal layer, the first metal layer comprising a first auxiliary electrode and a first anode located on one side of the first auxiliary electrode; a pixel definition layer located on one side of the array substrate and covering the first metal layer; the pixel definition layer comprising a first auxiliary opening and a first pixel opening, a part of the first auxiliary electrode being exposed from the first auxiliary opening, and a part of the first anode being exposed from the first pixel opening; a light-emitting layer comprising a first light-emitting unit and located on a side of the pixel definition layer away from the array substrate, the first light-emitting unit being connected to the first anode and the first auxiliary electrode respectively; and a second metal layer comprising a cathode, the cathode being located on a side of the light-emitting layer away from the pixel definition layer; wherein the display panel further comprises a shielding layer located between the pixel definition layer and the light-emitting layer, the shielding layer being connected to the first light-emitting unit and not connected to the cathode; the first auxiliary electrode has a first undercut structure corresponding to the position of the first auxiliary opening, and the first light-emitting unit is disconnected at the first undercut structure. The first metal layer further comprises a second auxiliary electrode and a second anode located on one side of the second auxiliary electrode; 2. The display panel of claim 1, wherein, the pixel definition layer further comprises a second auxiliary opening and a second pixel opening, a part of the second auxiliary electrode being exposed from the second auxiliary opening, and a part of the second anode being exposed from the second pixel opening; the light-emitting layer further comprises a second light-emitting unit, the second light-emitting unit being arranged separately from the first light-emitting unit and connected to the second anode and the second auxiliary electrode respectively; the second auxiliary electrode has a second undercut structure corresponding to the position of the second auxiliary opening, and the second light-emitting unit is disconnected at the second undercut structure. The first metal layer further comprises a third auxiliary electrode and a third anode located on one side of the third auxiliary electrode; 3. The display panel of claim 2, wherein, the pixel definition layer further comprises a third auxiliary opening and a third pixel opening, a part of the third auxiliary electrode being exposed from the third auxiliary opening, and a part of the third anode being exposed from the third pixel opening; the light-emitting layer further comprises a third light-emitting unit, the third light-emitting unit being arranged separately from the second light-emitting unit and connected to the third anode and the third auxiliary electrode respectively; the third auxiliary electrode has a third undercut structure corresponding to the position of the third auxiliary opening, and the third light-emitting unit is disconnected at the third undercut structure. The shielding layer comprises a first shielding unit located between the pixel definition layer and the first light-emitting unit, the first shielding unit being disconnected at the first auxiliary opening and the first pixel opening respectively and connected to the first auxiliary electrode, the first shielding unit being connected to the first light-emitting unit but not connected to the cathode.
4. The display panel of claim 3, wherein, 5. The display panel of claim 4, wherein, The shielding layer comprises a second shielding unit, the second shielding unit is located between the pixel definition layer and the second light emitting unit and is arranged spaced apart from the first shielding unit, the second shielding unit is disconnected at the second auxiliary opening and the second pixel opening respectively and is connected with the second auxiliary cathode, the second shielding unit is connected with the second light emitting unit but is not connected with the cathode; and The shielding layer comprises a third shielding unit, the third shielding unit is located between the pixel definition layer and the third light emitting unit and is arranged spaced apart from the second shielding unit, the third shielding unit is disconnected at the third auxiliary opening and the third pixel opening respectively and is connected with the third auxiliary cathode, the third shielding unit is connected with the third light emitting unit but is not connected with the cathode.
6. The display panel of claim 5, wherein, The first light emitting unit and the second light emitting unit have a first gap, the second light emitting unit and the third light emitting unit have a second gap, and the cathode is disconnected at the first gap and the second gap; The first shielding unit and the second shielding unit have a first opening, and the second shielding unit and the third shielding unit have a second opening; The pixel definition layer has a third opening and a fourth opening, the third opening, the first opening and the first gap are located opposite to each other, and the fourth opening, the second opening and the second gap are located opposite to each other.
7. The display panel of claim 6, wherein, The display panel further comprises an encapsulation layer, the encapsulation layer covers the second metal layer and fills in the first gap, the first opening, the third opening, the second gap, the second opening and the fourth opening.
8. The display panel of claim 1, wherein, The first auxiliary electrode comprises a first electrode layer, a second electrode layer and a third electrode layer located between the first electrode layer and the second electrode layer, the first electrode layer, the second electrode layer and the third electrode layer are stacked in the stacking direction of the array substrate and the pixel definition layer, and the first electrode layer is located on the array substrate; One end of the third electrode layer protrudes from the first electrode layer and the second electrode layer at the first auxiliary opening.
9. The display panel of claim 8, wherein, The first auxiliary electrode has a first undercut groove, the first undercut groove comprises a first sub-groove and a second sub-groove in communication, the first sub-groove is located between the third electrode layer, the first electrode layer and the array substrate, and the second sub-groove is located between the third electrode layer and the second electrode layer; The first light emitting unit comprises a first light emitting part and a second light emitting part, the first light emitting part is located in the first sub-groove and is connected with the array substrate, the first electrode layer and the third electrode layer respectively, and a part of the second light emitting part is located on the side of the shielding layer away from the pixel definition layer, and another part of the second light emitting part is located in the first sub-groove and is connected with the shielding layer, the second electrode layer and the third electrode layer respectively.
10. The display panel of claim 6, wherein, The cathode comprises a first cathode part, a second cathode part and a third cathode part, the first cathode part, the second cathode part and the third cathode part cover the first light emitting unit, the second light emitting unit and the third light emitting unit respectively; The first cathode part is continuous at the first undercut structure, the second cathode part is continuous at the second undercut structure, and the third cathode part is continuous at the third undercut structure.
11. The display panel of claim 3, wherein, The array substrate further comprises: A light shielding layer comprising a plurality of light shielding parts; and A transistor between the light shielding layer and the first metal layer; The first anode, the second anode and the third anode are respectively connected with one transistor; The first auxiliary electrode, the second auxiliary electrode and the third auxiliary electrode are respectively connected with the first anode, the second anode and the third anode, and the transistor connected with the first auxiliary electrode, the second auxiliary electrode and the third auxiliary electrode is respectively connected with one light shielding part.
12. A display device, wherein, The display panel comprises: An array substrate comprising a first metal layer, the first metal layer comprising a first auxiliary electrode and a first anode located on one side of the first auxiliary electrode; A pixel definition layer located on one side of the array substrate and covering the first metal layer, the pixel definition layer comprising a first auxiliary opening and a first pixel opening, a part of the first auxiliary electrode being exposed from the first auxiliary opening, and a part of the first anode being exposed from the first pixel opening; An emission layer comprising a first light emitting unit and located on a side of the pixel definition layer away from the array substrate, the first light emitting unit being connected with the first anode and the first auxiliary electrode respectively; and A second metal layer comprising a cathode, the cathode being located on a side of the emission layer away from the pixel definition layer; The display panel further comprises a shielding layer between the pixel definition layer and the emission layer, the shielding layer being connected with the first light emitting unit and not connected with the cathode; the first auxiliary electrode has a first undercut structure corresponding in position to the first auxiliary opening, and the first light emitting unit is disconnected at the first undercut structure.
13. The display device of claim 12, wherein, The first metal layer further comprises a second auxiliary electrode and a second anode located on one side of the second auxiliary electrode; The pixel definition layer further comprises a second auxiliary opening and a second pixel opening, a part of the second auxiliary electrode being exposed from the second auxiliary opening, and a part of the second anode being exposed from the second pixel opening; The emission layer further comprises a second light emitting unit, the second light emitting unit being arranged apart from the first light emitting unit and connected with the second anode and the second auxiliary electrode respectively; The second auxiliary electrode has a second undercut structure corresponding in position to the second auxiliary opening, and the second light emitting unit is disconnected at the second undercut structure.
14. The display device of claim 13, wherein, The first metal layer further comprises a third auxiliary electrode and a third anode located on one side of the third auxiliary electrode; The pixel definition layer further comprises a third auxiliary opening and a third pixel opening, a part of the third auxiliary electrode being exposed from the third auxiliary opening, and a part of the third anode being exposed from the third pixel opening; The light-emitting layer further comprises a third light-emitting unit, which is spaced apart from the second light-emitting unit and connected with the third anode and the third auxiliary electrode respectively; The third auxiliary electrode has a third undercut structure corresponding to the third auxiliary opening position, and the third light-emitting unit is disconnected at the third undercut structure.
15. The display device of claim 14, wherein, The shielding layer comprises a first shielding unit between the pixel definition layer and the first light-emitting unit, the first shielding unit is disconnected at the first auxiliary opening and the first pixel opening respectively and connected with the first auxiliary electrode, and the first shielding unit is connected with the first light-emitting unit but not connected with the cathode.
16. The display device of claim 15, wherein, The shielding layer comprises a second shielding unit between the pixel definition layer and the second light-emitting unit and spaced apart from the first shielding unit, the second shielding unit is disconnected at the second auxiliary opening and the second pixel opening respectively and connected with the second auxiliary cathode, and the second shielding unit is connected with the second light-emitting unit but not connected with the cathode. The shielding layer comprises a third shielding unit between the pixel definition layer and the third light-emitting unit and spaced apart from the second shielding unit, the third shielding unit is disconnected at the third auxiliary opening and the third pixel opening respectively and connected with the third auxiliary cathode, and the third shielding unit is connected with the third light-emitting unit but not connected with the cathode.
17. The display device of claim 16, wherein, The first light-emitting unit and the second light-emitting unit have a first gap therebetween, the second light-emitting unit and the third light-emitting unit have a second gap therebetween, and the cathode is disconnected at the first gap and the second gap; The first shielding unit and the second shielding unit have a first opening therebetween, and the second shielding unit and the third shielding unit have a second opening therebetween; The pixel definition layer has a third opening and a fourth opening, the third opening, the first opening and the first gap are located opposite to each other, and the fourth opening, the second opening and the second gap are located opposite to each other.
18. The display device of claim 17, wherein, The display panel further comprises an encapsulation layer covering the second metal layer and filling in the first gap, the first opening, the third opening, the second gap, the second opening and the fourth opening.
19. The display device of claim 12, wherein, The first auxiliary electrode comprises a first electrode layer, a second electrode layer and a third electrode layer between the first electrode layer and the second electrode layer, the first electrode layer, the second electrode layer and the third electrode layer are stacked in the stacking direction of the array substrate and the pixel definition layer, and the first electrode layer is located on the array substrate; One end of the third electrode layer protrudes from the first electrode layer and the second electrode layer at the first auxiliary opening.
20. A method of manufacturing a display panel, wherein, The method comprises: forming an array substrate comprising a first metal layer, the first metal layer comprising a first auxiliary electrode, a first anode located on one side of the first auxiliary electrode, a second auxiliary electrode and a second anode located on one side of the second auxiliary electrode; forming a pixel definition layer on one side of the array substrate, the pixel definition layer covering the first metal layer and comprising a first auxiliary opening, a first pixel opening, a second auxiliary opening and a second pixel opening, a part of the first auxiliary electrode and a part of the second auxiliary electrode being exposed from the first auxiliary opening and the second auxiliary opening respectively, the remaining pixel definition layer within the first pixel opening and the second pixel opening covering the first anode and the second anode respectively; forming a patterned shielding layer on the side of the pixel definition layer away from the array substrate, a part of the first auxiliary electrode and a part of the second auxiliary electrode being exposed from the shielding layer respectively; etching the first auxiliary electrode and the second auxiliary electrode respectively to obtain a first undercut structure and a second undercut structure; completely removing the remaining pixel definition layer within the first pixel opening by dry etching process to expose the first anode, and removing a part of the pixel definition layer within the second pixel opening, the remaining pixel definition layer within the second pixel opening covering the second anode; forming a first initial light emitting layer and a first initial cathode layer on the first initial light emitting layer by full-area evaporation, and removing the remaining part of the first initial light emitting layer and the first initial cathode layer by dry etching process to obtain a first light emitting unit and a first cathode part respectively, the first light emitting unit being connected with the first anode and the first auxiliary electrode respectively and being disconnected at the first undercut structure, the first cathode part being connected with the first auxiliary electrode; completely removing the remaining pixel definition layer within the second pixel opening by dry etching process to expose the second anode; and forming a second initial light emitting layer and a second initial cathode layer on the second initial light emitting layer by full-area evaporation, and removing the remaining part of the second initial light emitting layer and the second initial cathode layer by dry etching process to obtain a second light emitting unit and a second cathode part respectively, the second light emitting unit being connected with the second anode and the second auxiliary electrode respectively and being disconnected at the second undercut structure, the second cathode part being connected with the second auxiliary electrode.
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