Cell, module, and photovoltaic system

Abstract

The present disclosure is applicable to the technical field of solar cells, and provides a cell, a module, and a photovoltaic system. The cell comprises a substrate and a polysilicon layer provided with a plurality of pits on the surface; the substrate comprises an edge region and a central region; and the density of the pits on the polysilicon layer located in the central region is less than or equal to the density of the pits on the polysilicon layer located in the edge region.

Description

Battery, assembly, and photovoltaic system

[0001] Cross-reference to related applications

[0002] The present disclosure claims priority to the Chinese patent application No. 202411259426.9, filed on September 9, 2024, and entitled “Solar cell, photovoltaic assembly, and photovoltaic system”, the entire content of which is incorporated herein by cross-reference. TECHNICAL FIELD

[0003] The present disclosure belongs to the technical field of solar cells, and in particular relates to a solar cell, a photovoltaic assembly, and a photovoltaic system. BACKGROUND

[0004] A solar cell is a device that directly converts light energy into electrical energy through the photoelectric effect. When a solar cell is illuminated by light with a certain illuminance, it can output an electric voltage and generate an electric current in the presence of a loop.

[0005] In the current market of solar cells, crystalline silicon solar cells account for more than 90% of the market share, and among them, polycrystalline silicon dominates. In the production process of polycrystalline silicon, a large amount of silicon powder is agglomerated into silicon powder particles distributed on the surface of the polycrystalline silicon. In the subsequent cleaning process, the silicon powder particles are washed away, forming pits on the surface of the polycrystalline silicon, causing damage to the polycrystalline silicon layer, causing passivation failure in the pit area, affecting the photoelectric conversion efficiency. Moreover, due to the large particle size of the silicon powder particles, the pits are also too large and deep, and in severe cases, the pits can even penetrate the polycrystalline silicon layer, causing electrical leakage.

[0006] SUMMARY

[0007] Embodiments of the present disclosure provide a solar cell to solve the problem of excessive density of pits on the surface of existing polycrystalline silicon, leading to passivation failure and even electrical leakage.

[0008] Embodiments of the present disclosure are implemented in this way. A solar cell includes: a substrate having opposite front and back surfaces; and a polycrystalline silicon layer disposed on at least one of the front and back surfaces, the polycrystalline silicon layer having a plurality of pits on a side surface away from the substrate; the side surface of the substrate on which the polycrystalline silicon layer is disposed includes an edge region and a central region located in the middle of the edge region; the polycrystalline silicon layer includes: when the polycrystalline silicon layers on the same surface of the substrate are of the same doping type, the density of the pits on the polycrystalline silicon layer in the central region is less than or equal to the density of the pits on the polycrystalline silicon layer in the edge region; or when the polycrystalline silicon layers of different doping types are disposed on the same surface of the substrate, the density of the pits on the polycrystalline silicon layer in the central region is less than or equal to the density of the pits on the polycrystalline silicon layer of the same doping type in the edge region.

[0009] In some embodiments, the density of the pits in the central region is M1 pits / mm2, 0≤M1≤5, and the density of the pits in the edge region is M2 pits / mm2, 0≤M2≤500. 2 2

[0010] In some embodiments, the size of the pits in the central region is less than or equal to the size of the pits in the edge region.

[0011] In some embodiments, the size of the pits in the central region is D1 microns, 0

[0012] In some embodiments, the edge region is a region extending 20 mm from the peripheral edge of the substrate toward the geometric center of the substrate.

[0013] In some embodiments, the number of pits gradually decreases from the peripheral edge of the substrate toward the geometric center of the substrate.

[0014] In some embodiments, the solar cell is a single-sided TOPCon cell, the single-sided TOPCon cell comprising a first passivation layer, a second passivation layer, an emitter layer, a tunneling passivation contact structure, a first electrode, and a second electrode; the emitter layer and the first passivation layer are sequentially disposed on the front side of the substrate, the first electrode contacts the emitter layer through the first passivation layer; the tunneling passivation contact structure and the second passivation layer are sequentially disposed on the back side of the substrate, the tunneling passivation contact structure comprises a tunneling layer and a polysilicon layer, the second electrode contacts the polysilicon layer through the second passivation layer.

[0015] In some embodiments, the solar cell is a double-sided TOPCon cell, the double-sided TOPCon cell comprising a first passivation layer, a second passivation layer, a first tunneling passivation contact structure, a second tunneling passivation contact structure, a first electrode, and a second electrode; the first tunneling passivation contact structure and the first passivation layer are sequentially disposed on the front side of the substrate, the second tunneling passivation contact structure and the second passivation layer are sequentially disposed on the back side of the substrate; the first tunneling passivation contact structure and the second tunneling passivation contact structure each comprise a tunneling layer and a polysilicon layer; the first electrode contacts the polysilicon layer of the first tunneling passivation contact structure through the first passivation layer; the second electrode contacts the polysilicon layer of the second tunneling passivation contact structure through the second passivation layer.

[0016] ​​In some embodiments, the solar cell is a back contact cell, the back contact cell comprises a first polarity region, a second polarity region, a passivation layer, a first electrode and a second electrode; the first polarity region and the second polarity region are alternately and spacedly arranged on the back surface of the substrate in sequence, the first polarity region and the second polarity region comprise polysilicon layers of different doping types; the passivation layer is arranged on the side of the first polarity region and the second polarity region away from the substrate; the first electrode is in contact with the first polarity region through the passivation layer; and the second electrode is in contact with the second polarity region through the passivation layer.

[0017] In a second aspect, the present disclosure further provides a photovoltaic module comprising the solar cell as described above.

[0018] In a third aspect, the present disclosure further provides a photovoltaic system comprising the photovoltaic module as described above.

[0019] The solar cell of the present disclosure comprises a substrate, the substrate has opposite front and back surfaces; and a polysilicon layer arranged on at least one of the front and back surfaces, the side surface of the polysilicon layer away from the substrate has a plurality of pits; the side of the substrate provided with the polysilicon layer comprises an edge region and a central region located in the middle of the edge region; the polysilicon layer comprises: when the polysilicon layers on the same surface of the substrate are of the same doping type, the density of the pits on the polysilicon layer in the central region is less than or equal to the density of the pits on the polysilicon layer in the edge region; when the substrate is provided with polysilicon layers of different doping types on the same surface, the density of the pits on the polysilicon layer in the central region is less than or equal to the density of the pits on the polysilicon layer of the same doping type in the edge region. By controlling the density of the pits in the central region to be less than the density of the pits in the edge region, reducing the size and depth of the pits, ensuring the flatness of the surface of the polysilicon layer, ensuring the passivation effect, further avoiding the case of electric leakage caused by the pits being too deep to penetrate the polysilicon layer, and ensuring the safety of the solar cell. BRIEF DESCRIPTION OF DRAWINGS

[0020] FIG. 1 is a schematic diagram of a solar cell provided by the prior art, the surface of the polysilicon layer of the solar cell is densely covered with pits;

[0021] FIG. 2 is a schematic diagram of the structure of a single-sided TOPCon cell of one embodiment of the solar cell provided by the present disclosure;

[0022] FIG. 3 is a schematic diagram of a polysilicon layer without pits in the central region of one embodiment of the solar cell provided by the present disclosure;

[0023] FIG. 4 is a schematic diagram of a polysilicon layer with pits distributed in the edge region of one embodiment of the solar cell provided by the present disclosure;

[0024] FIG. 5 is a schematic diagram of a comparison of the sizes of the pits on the surface of the polysilicon layer in the edge region of one embodiment of the solar cell provided by the present disclosure;

[0025] FIG. 6 is a schematic diagram of a structure of a bifacial TOPCon cell of one embodiment of the solar cell provided by the present disclosure;

[0026] FIG. 7 is a schematic diagram of a structure of a back contact cell of one embodiment of the solar cell provided by the present disclosure;

[0027] FIG. 8 is a schematic diagram of a structure of one embodiment of the solar cell provided by the present disclosure, in which the poly-silicon layer is of a single doping type;

[0028] FIG. 9 is a schematic diagram of a structure of one embodiment of the solar cell provided by the present disclosure, in which the poly-silicon layer is of different doping types.

[0029] Legend of reference signs: 100, substrate; 200, poly-silicon layer; 210, edge region; 220, center region; 300, pit; 410, first passivation layer; 420, second passivation layer; 430, tunneling layer; 440, first polarity region; 450, second polarity region; 510, emitter layer; 600, pyramid structure; 610, first electrode; 620, second electrode. DETAILED DESCRIPTION

[0030] In order to make the objectives, technical solutions and advantages of the present disclosure clearer, the present disclosure will be further described in detail below with reference to the accompanying drawings and embodiments. The examples of the embodiments are shown in the drawings, in which the same or similar reference signs represent the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the drawings are exemplary and are only used to explain the present disclosure, and cannot be understood as a limitation on the present disclosure. In addition, it should be understood that the specific embodiments described herein are only used to explain the present disclosure and do not limit the present disclosure.

[0031] In the description of the present disclosure, it should be understood that the terms "length", "width", "upper", "lower", "left", "right", "horizontal", "top", "bottom", etc. indicate the orientation or positional relationship shown in the drawings, which is only for the purpose of facilitating the description of the present disclosure and simplifying the description, and does not indicate or imply that the device or element referred to must have a particular orientation, be constructed and operated in a particular orientation, and therefore cannot be understood as a limitation on the present disclosure.

[0032] In addition, the terms "first", "second" are only for descriptive purposes and cannot be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Therefore, the features defined with "first", "second" can explicitly or implicitly include one or more features. In the description of the present disclosure, the meaning of "multiple" is two or more, unless otherwise specifically limited.

[0033] In the description of the present disclosure, it is necessary to explain that, unless otherwise explicitly specified and limited, the terms "mounting", "connection", "connecting" should be understood in a broad sense, for example, can be fixedly connected, can be detachably connected, or integrally connected; can be mechanically connected, can be electrically connected or can communicate with each other; can be directly connected, or indirectly connected through an intermediate medium, can be the internal communication of two elements or the interaction relationship between two elements. For those skilled in the art, the specific meaning of the above terms in the present disclosure can be understood according to the specific circumstances.

[0034] In the present disclosure, unless otherwise explicitly specified and limited, the "upper" or "lower" of the first feature to the second feature can include that the first and second features are in direct contact, or that the first and second features are not in direct contact but are in contact through another feature between them. Moreover, the "upper", "above" and "on" of the first feature to the second feature includes that the first feature is directly above and obliquely above the second feature, or only indicates that the horizontal height of the first feature is higher than that of the second feature. The "below", "under" and "under" of the first feature to the second feature includes that the first feature is directly below and obliquely below the second feature, or only indicates that the horizontal height of the first feature is less than that of the second feature.

[0035] The following disclosure provides many different embodiments or examples for implementing different structures of the present disclosure. In order to simplify the disclosure of the present disclosure, the components and settings of specific examples are described below. Of course, they are only examples, and the purpose is not to limit the present disclosure. In addition, the present disclosure can repeatedly refer to at least one of reference numerals and reference letters in different examples, and such repetition is for the purpose of simplification and clarity, which itself does not indicate the relationship between at least one of the various embodiments and settings discussed. In addition, the present disclosure provides various specific examples of processes and materials, but those skilled in the art can realize at least one of the application of other processes and the use of other materials.

[0036] The solar cell of the present disclosure comprises a substrate having opposite front and back surfaces; and a polysilicon layer provided on at least one of the front and back surfaces, the polysilicon layer having a plurality of pits on the side surface away from the substrate; the side surface of the substrate provided with the polysilicon layer comprises an edge region and a central region located in the middle of the edge region; the polysilicon layer comprises: when the polysilicon layer on the same surface of the substrate is of the same doping type, the density of the pits on the polysilicon layer in the central region is less than or equal to the density of the pits on the polysilicon layer in the edge region; when the substrate is provided with polysilicon layers of different doping types on the same surface, the density of the pits on the polysilicon layer in the central region is less than or equal to the density of the pits on the polysilicon layer of the same doping type in the edge region. By controlling the density of the pits in the central region to be less than the density of the pits in the edge region, reducing the size and depth of the pits, ensuring the flatness of the surface of the polysilicon layer, ensuring the passivation effect, further avoiding the risk of electric leakage caused by the pits being too deep to penetrate the polysilicon layer, and ensuring the safety of the solar cell.

[0037] In the production process of the existing polysilicon of the solar cell, a large amount of silicon powder is aggregated into silicon powder particles distributed on the surface of the polysilicon. In the subsequent cleaning process, the silicon powder particles are washed away, and after the silicon powder particles are washed away, pits 300 are formed on the surface of the polysilicon, as shown in FIG. 1, which causes damage to the polysilicon layer, causes passivation failure in the area of the pits 300, and even when the pits 300 are too deep to penetrate the polysilicon layer, it also causes the risk of electric leakage.

[0038] Embodiment one

[0039] As shown in FIGS. 2 to 9, one embodiment of the present disclosure provides a solar cell, comprising:

[0040] a substrate 100 having opposite front and back surfaces; and

[0041] a polysilicon layer 200 provided on at least one of the front and back surfaces, the polysilicon layer 200 having a plurality of pits 300 on the side surface away from the substrate 100;

[0042] the side surface of the substrate 100 provided with the polysilicon layer 200 comprises an edge region 210 and a central region 220 located in the middle of the edge region 210;

[0043] the polysilicon layer 200 comprises:

[0044] when the polysilicon layer 200 on the same surface of the substrate is of the same doping type, the density of the pits 300 on the polysilicon layer 200 in the central region 220 is less than or equal to the density of the pits 300 on the polysilicon layer 200 in the edge region 210; or

[0045] When the substrate is provided with polysilicon layers 200 of different doping types on the same side, the density of pits 300 on the polysilicon layer 200 in the central region 220 is less than or equal to the density of pits 300 on the polysilicon layer 200 of the same doping type in the edge region 210.

[0046] In practice, the substrate 100 can be an N-type silicon wafer or a P-type silicon wafer, where the N-type silicon wafer is obtained by adding pentavalent elements (such as phosphorus or arsenic) to the silicon raw material, which provide additional free electrons; the P-type silicon wafer is obtained by adding trivalent elements (such as boron or gallium) to the silicon raw material, which control the diffusion of electron holes, without further elaboration.

[0047] The substrate 100 has a front side and a back side, where the front side of the substrate 100 corresponds to the light-receiving side of the solar cell, and the back side of the substrate 100 corresponds to the back side of the solar cell.

[0048] Optionally, the substrate 100 can be a single crystal silicon wafer, which is a single crystal obtained by slowly cooling the molten silicon raw material, with a tightly ordered crystal structure, high conversion efficiency, stability, and long life.

[0049] Optionally, the substrate 100 can be a polycrystalline silicon wafer, which is a form of elemental silicon that is formed when molten elemental silicon solidifies under supercooling conditions, with silicon atoms arranged in a diamond lattice form to form many crystal nuclei, and if these crystal nuclei grow into grains with different crystal plane orientations, these grains combine to form polycrystalline silicon.

[0050] Optionally, the surface of the substrate 100 can be a polished surface or a textured surface, without limitation. The textured surface is obtained by a texturing process on the surface of the substrate 100 to form a pyramid structure 600 on the surface of the substrate 100, which utilizes the light-trapping effect of the textured surface to increase the absorption of sunlight, reduce reflectivity, increase short-circuit current, and improve the photoelectric conversion efficiency of the solar cell.

[0051] Optionally, the texturing process includes but is not limited to acid texturing, alkali texturing, mechanical texturing, electrochemical texturing, reactive ion etching texturing, laser texturing, and mask texturing, without further elaboration.

[0052] In some embodiments, a polysilicon layer 200 can be deposited on a single crystal silicon wafer or on a polycrystalline silicon wafer, for example, by using a CVD (Chemical Vapor Deposition) device to prepare the polysilicon layer 200, and by controlling the working parameters of the CVD device to grow the polysilicon layer 200, including but not limited to the temperature, pressure, and gas flow of the polysilicon layer 200 growth environment, without limitation.

[0053] In some embodiments, the process flow for preparing the polysilicon layer 200 by chemical vapor deposition includes:

[0054] 1. Cleaning the substrate 100 to improve the crystallization quality of the silicon layer;

[0055] 2. Annealing and pre-treating the substrate 100 to improve the flatness and crystallization performance of the surface of the substrate 100;

[0056] 3. Placing the pre-treated substrate 100 into a CVD reaction chamber, evacuating the chamber to a certain vacuum degree, and excluding oxygen and impurities;

[0057] 4. Introducing a silicon source gas into the reaction chamber, typically using silane ((SiH)_4) or trimethylsilane as the silicon source;

[0058] 5. Introducing hydrogen gas as a dilution gas into the reaction chamber;

[0059] 6. Controlling the temperature in the reaction chamber within a suitable temperature range, for example, 600-900°C;

[0060] 7. At a suitable temperature, the silicon source gas and the dilution gas chemically react to produce a carbide of silicon or a gaseous silicide;

[0061] 8. The carbide or silicide is deposited on the surface of the silicon substrate 100, gradually forming a polysilicon layer 200. By controlling the reaction time, the thickness of the desired polysilicon layer 200 is controlled, and after the reaction is completed, the substrate 100 is cooled to room temperature to solidify the polysilicon layer 200.

[0062] In implementation, the preparation process steps of the polysilicon layer 200 are as follows:

[0063] First, place the cleaned silicon wafer into the wafer loading chamber of the hot wire CVD equipment, evacuate to 10 -3 torr, use tantalum wire as the hot wire material, then preheat the silicon wafer to 100°C; transfer the silicon wafer into the coating chamber, evacuate to 10 -4 torr, heat the hot wire to 1600°C, introduce carbon dioxide to oxidize the surface of the silicon wafer, the oxidation reaction time is 50 seconds, forming a 1.5 nm thick oxide layer; then heat to 100°C for 200s of heat treatment.

[0064] Second, evacuate the residual gas in the chamber to 10 -4 torr, use tantalum wire as the hot wire material, heat the hot wire to 2000°C, introduce silane and phosphine, coat at a rate of 20 nm / s, deposit an amorphous silicon film, the thickness of the amorphous silicon film can be controlled by controlling the coating time, after the coating is completed, the silicon wafer is sent into the wafer unloading chamber and the vacuum is broken to unload the wafer.

[0065] Third step, the finished silicon wafer is sent into a quartz tube furnace for heat treatment: vacuum to 10 -4 Pa, argon gas is introduced as a protective gas, the gas pressure is kept at 20 Pa, the temperature is raised to 400℃, and the temperature is kept for 60 min; then the temperature is raised to 700℃ for 5 min, and the temperature is lowered to 400℃ to take out the wafer.

[0066] In some possible embodiments, the polysilicon layer 200 can also be prepared by the following process steps:

[0067] First step, the cleaned silicon wafer is placed into the wafer loading cavity of the hot wire CVD equipment, vacuumed to 10 -3 Pa, tantalum wire is used as the hot wire material, and then the wafer is preheated to 100℃; the wafer is transferred into the first film coating cavity, vacuumed to 10 -4 Pa, the hot wire is heated to 1600℃, carbon dioxide is introduced to oxidize the surface of the wafer, the oxidation reaction time is 2 seconds, a 1.5nm thick oxide layer is formed, and then heated to 300℃ for 10s of heat treatment.

[0068] Second step, the residual gas in the cavity is pumped to 10 -4 Pa, tantalum wire is used as the hot wire material, the wafer is transferred into the second film coating cavity, the hot wire is heated to 2000℃, silane and phosphine are introduced, the film is coated at a rate of 10nm / s, and a 100nm thick amorphous silicon film is deposited. After the film coating is completed, the wafer is sent to the wafer unloading cavity, and the vacuum is broken to take out the wafer.

[0069] Third step, the finished silicon wafer is sent into a quartz tube furnace for heat treatment: vacuum to 10 -4 Pa, argon gas is introduced as a protective gas, the gas pressure is kept at 20 Pa, the temperature is raised to 400℃, and the temperature is kept for 60 min; then the temperature is raised to 700℃ for 5 min, and the temperature is lowered to 400℃ to take out the wafer.

[0070] In some possible embodiments, the polysilicon layer 200 can also be prepared by the following process steps:

[0071] First step, the cleaned silicon wafer is placed into the wafer loading cavity of the hot wire CVD equipment, vacuumed to 10 -3 Pa, tantalum wire is used as the hot wire material, and then the wafer is preheated to 100℃; the wafer is transferred into the first film coating cavity, vacuumed to 10 -4 Pa, the hot wire is heated to 1200℃, ozone is introduced to oxidize the surface of the wafer, the oxidation reaction time is 30 seconds, a 2.0nm thick oxide layer is formed, and then heated to 200℃ for 50s of heat treatment.

[0072] Second step, the residual gas in the cavity is pumped to 10 -4The pressure in the second coating cavity is 1000 Pa, and the silicon wafer is conveyed into the second coating cavity. The hot wire is heated to 2000 ℃, and silane and phosphine are introduced at a rate of 1 nm / s to deposit a 50 nm amorphous silicon film. After the coating is completed, the silicon wafer is conveyed into the wafer outlet cavity, and the vacuum is broken to take out the wafer.

[0073] Thirdly, the coated silicon wafer is conveyed into a quartz tube furnace for heat treatment: the pressure is reduced to 10 -4 The pressure in the second coating cavity is 1000 Pa, and the silicon wafer is conveyed into the second coating cavity. The hot wire is heated to 2000 ℃, and silane and phosphine are introduced at a rate of 1 nm / s to deposit a 50 nm amorphous silicon film. After the coating is completed, the silicon wafer is conveyed into the wafer outlet cavity, and the vacuum is broken to take out the wafer.

[0074] In some possible embodiments, the polysilicon layer 200 can also be prepared by using a PVD (Physical Vapor Deposition) device without limitation.

[0075] The front and back surfaces of the substrate 100 can be divided into a central region 220 and an edge region 210, that is, the polysilicon layer 200 can be distributed in the central region 220 or in the edge region 210.

[0076] During the growth of the polysilicon layer 200, part of the silicon powder will agglomerate to form silicon powder particles, which are distributed on the surface of the polysilicon layer 200, that is, the silicon powder particles can be regarded as tiny black spots on the surface of the polysilicon layer 200.

[0077] By controlling the temperature, pressure, and gas flow during the growth of the polysilicon layer 200, the density of the silicon powder particles distributed in the central region 220 of the polysilicon layer 200 is less than the density of the silicon powder particles distributed in the edge region 210 of the polysilicon layer 200. In the preparation process of the solar cell, the polysilicon layer 200 needs to be cleaned, and the silicon powder particles will be cleaned away in the cleaning process, thereby forming pits 300 on the original positions of the silicon powder particles on the surface of the polysilicon layer 200. Since the density of the silicon powder particles distributed in the central region 220 of the polysilicon layer 200 is less than the density of the silicon powder particles distributed in the edge region 210 of the polysilicon layer 200, the density of the pits 300 in the central region 220 of the polysilicon layer 200 is less than the density of the pits 300 in the edge region 210 of the polysilicon layer 200.

[0078] In implementation, the edge region 210 is a region extending 20 mm from the peripheral edge of the substrate 100 to the geometric center of the substrate 100.

[0079] In some possible embodiments, the density of the pits 300 in the central region 220 is M1 pits / mm 2, 0≤M1≤5, for example, there can be 1 pit 300, 2 pits 300, 3 pits 300 or 4 pits 300 per square millimeter in the center region 220, for example, there can be no pit 300 per square millimeter in the center region 220, as shown in Fig. 3.

[0080] Optionally, the density of pits 300 in the edge region 210 is M2 / mm2, 0≤M2≤500. 2 , 0≤M2≤500. For example, there can be any value from 0 to 500 pits 300 per square millimeter in the edge region 210, for example, there can be 1, 10, 30, 40, 100, 200, 300, 400, or one of the values among them per square millimeter in the edge region 210, as shown in Fig. 4, without limitation.

[0081] Optionally, the number of pits 300 gradually decreases in the direction from the peripheral edge of the substrate 100 to the geometric center of the substrate 100, in some possible embodiments, the probability of the occurrence of pits 300 is the highest at a position 5 mm away from the peripheral edge of the substrate 100, and the pits 300 are reduced to none or substantially none after 20 mm away from the peripheral edge of the substrate 100. For example, as shown in Fig. 5, there can be a few pits 300 at a position 20 mm away from the peripheral edge of the polysilicon layer 200.

[0082] On the other hand, while the density of silicon powder particles is reduced, the size of the silicon powder particles will also be reduced, that is, the size of the pits 300 will also be reduced, so that the size of the pits 300 in at least part of the center region 220 is less than or equal to the size of the pits 300 in at least part of the edge region 210. In some possible embodiments, the size of the pits 300 in the center region 220 is D1 microns, 0

[0083] In implementation, when the size of the pits 300 is too large, such as A2 in Fig. 5, A2 is a pit 300 with a diameter that is greater than or equal to 1 μm, A2 will cause a loss of efficiency of the solar cell. When the size of the pits 300 is less than the critical value, such as A1 in Fig. 5, the diameter of the pit 300 shown by A1 is less than or equal to 800 nm, the pit 300 shown by A1 will not cause a loss of efficiency of the solar cell.

[0084] After the subsequent process of cleaning the polysilicon layer 200, the silicon powder particles will be cleaned away, the size of the formed pits 300 will also be reduced, and even there is no pit 300 in the central region 220, thereby ensuring the passivation effect when preparing the passivation layer 400 subsequently, and at the same time, the size of the pit 300 is reduced, so that the pit 300 will not penetrate the polysilicon layer 200, thereby ensuring the safety of the solar cell.

[0085] The present disclosure reduces the size and depth of the pit 300 by controlling the density of the pit 300 in the central region 220 to be less than the density of the pit 300 in the edge region 210, thereby ensuring the surface flatness of the polysilicon layer 200, ensuring the passivation effect, further avoiding the case of electric leakage caused by the pit 300 being too deep to penetrate the polysilicon layer 200, and ensuring the safety of the solar cell.

[0086] In some optional embodiments, the solar cell provided by the present disclosure is taken as a single-sided TOPCon cell, which includes a first passivation layer 410, a second passivation layer 420, an emitter layer 510, a tunneling passivation contact structure, a first electrode 610, and a second electrode 620.

[0087] The emitter layer 510 and the first passivation layer 410 are sequentially arranged on the front side of the substrate 100, and the first electrode 610 contacts the emitter layer 510 through the first passivation layer 410.

[0088] The tunneling passivation contact structure and the second passivation layer 420 are sequentially arranged on the back side of the substrate 100, the tunneling passivation contact structure includes a tunneling layer 430 and a polysilicon layer 200, and the second electrode 620 contacts the polysilicon layer 200 through the second passivation layer 420.

[0089] In implementation, the first electrode 610, the first passivation layer 410, the emitter layer 510, the substrate 100, the tunneling layer 430, the polysilicon layer 200, the second passivation layer 420, and the second electrode 620 in the single-sided TOPCon cell are sequentially arranged from top to bottom, as shown in FIG. 2.

[0090] The first electrode 610 and the second electrode 620 are metal electrodes for collecting and leading out photo-generated carriers. The first passivation layer 410 and the second passivation layer 420 are passivation layer films for improving the photoelectric conversion efficiency and stability of the solar cell, reducing the surface damage and oxidation reaction of the solar cell, and prolonging the service life of the solar cell.

[0091] In some possible embodiments, the first passivation layer 410 and the second passivation layer 420 include silicon nitride, silicon oxynitride, titanium dioxide, aluminum oxide, and diiron trioxide, without limitation.

[0092] In implementation, the polysilicon layer 200 of the single-sided TOPCon cell is of a single doping type. Taking the substrate 100 as an n-type silicon wafer for example, the tunneling layer 430 is a tunneling silicon oxide layer, the emitter layer 510 is a boron-doped emitter, and the polysilicon layer 200 is a phosphorus-doped polysilicon layer. The polysilicon layer 200 is of a single doping type. Understandably, the junction of the central region 220 and the edge region 210 can be elliptical, as shown in FIG. 8.

[0093] It should be noted that the junction of the central region 220 and the edge region 210 being elliptical is an example of one embodiment of the present disclosure, and is not a specific limitation of the present disclosure. In other embodiments, the junction of the central region 220 and the edge region 210 can also be other shapes, such as circular or irregular shapes, without limitation.

[0094] Optionally, taking the solar cell provided by the present disclosure as a double-sided TOPCon cell for example, as shown in FIG. 6, the double-sided TOPCon cell includes a first passivation layer 410, a second passivation layer 420, a first tunneling passivation contact structure, a second tunneling passivation contact structure, a first electrode 610, and a second electrode 620.

[0095] The first tunneling passivation contact structure and the first passivation layer 410 are sequentially arranged on the front side of the substrate 100, and the second tunneling passivation contact structure and the second passivation layer 420 are sequentially arranged on the back side of the substrate 100.

[0096] The first tunneling passivation contact structure and the second tunneling passivation contact structure each include a tunneling layer 430 and a polysilicon layer 200.

[0097] The first electrode 610 passes through the first passivation layer 410 and contacts the polysilicon layer 200 of the first tunneling passivation contact structure.

[0098] The second electrode 620 passes through the second passivation layer 420 and contacts the polysilicon layer 200 of the second tunneling passivation contact structure.

[0099] The double-sided TOPCon cell is provided with the tunneling passivation contact structure on both the front side and the back side of the substrate 100. The polysilicon layer 200 on the front side of the substrate 100 is of a single doping type, the polysilicon layer 200 on the back side of the substrate 100 is of a single doping type, and the doping type of the polysilicon layer 200 on the front side of the substrate 100 is different from the doping type of the polysilicon layer 200 on the back side of the substrate 100.

[0100] In implementation, the structure of each side of the double-sided TOPCon cell can refer to the structure of the back side of the single-sided TOPCon cell described above, and will not be described here.

[0101] As a possible implementation, taking the back contact cell provided by the present disclosure as an example, as shown in FIG. 7, the back contact cell includes a first polarity region 440, a second polarity region 450, a passivation layer, a first electrode 610 and a second electrode 620;

[0102] The first polarity region 440 and the second polarity region 450 are alternately and sequentially arranged on the back surface of the substrate 100, and the first polarity region 440 and the second polarity region 450 include polycrystalline silicon layers 200 of different doping types;

[0103] The passivation layer is arranged on the side of the first polarity region 440 and the second polarity region 450 away from the substrate 100;

[0104] The first electrode 610 is in contact with the first polarity region 440 through the passivation layer;

[0105] The second electrode 620 is in contact with the second polarity region 450 through the passivation layer.

[0106] In implementation, the first polarity region 440 and the second polarity region 450 can be regarded as positive and negative electrode regions of the back contact cell. For example, when the first polarity region 440 is a positive electrode region, the second polarity region 450 is a negative electrode region, and vice versa.

[0107] The passivation layer can refer to the second passivation layer 420 described above, and details are not repeated.

[0108] The first polarity region 440 and the second polarity region 450 are of different polarities, that is, the back surface of the substrate 100 of the back contact cell is provided with polycrystalline silicon layers 200 of different doping types. For the same type of polycrystalline silicon layer 200, the density of the pits 300 on the polycrystalline silicon layer 200 located in the central region 220 is less than or equal to the density of the pits 300 on the polycrystalline silicon layer 200 located in the edge region 210.

[0109] Exemplarily, taking the case that the back surface of the substrate 100 is provided with six regions of polycrystalline silicon layers 200 as an example, as shown in FIG. 9, from left to right, they are the first polarity region 440, the second polarity region 450, the first polarity region 440, the second polarity region 450, the first polarity region 440 and the second polarity region 450, that is, the first region, the third region and the fifth region from left to right are all the first polarity region 440, and the second region, the fourth region and the sixth region are all the second polarity region 450.

[0110] In implementation, the third region and the fifth region are both located in the central region, and the first region is located in the edge region, and the density of the pits 300 in the third region and the fifth region is less than the density of the pits 300 in the first region.

[0111] As a possible implementation, the third region is located in the center region, and the first region and the fifth region are both located in the edge region, then the density of the pits 300 in the third region is less than the density of the pits 300 in the first region and the fifth region.

[0112] In some possible embodiments, the density of the pits 300 in the first region, the fifth region and the third region decreases in turn.

[0113] Similarly, the second region and the fourth region are both located in the center region, and the sixth region is located in the edge region, then the density of the pits 300 in the second region and the fourth region is less than the density of the pits 300 in the sixth region.

[0114] As a possible implementation, the fourth region is located in the center region, and the second region and the sixth region are both located in the edge region, then the density of the pits 300 in the fourth region is less than the density of the pits 300 in the second region and the sixth region.

[0115] In some possible embodiments, the density of the pits 300 in the sixth region, the second region and the fourth region decreases in turn.

[0116] Embodiment Two

[0117] In some optional embodiments, the present disclosure provides a photovoltaic module comprising the solar cell as described above.

[0118] Those skilled in the art can clearly understand that, for the convenience and brevity of description, the structure and implementation principle of the photovoltaic module described above can refer to the corresponding structure and implementation principle in the aforementioned embodiment one, and will not be repeated here.

[0119] The solar cell of the present disclosure comprises a substrate 100 having opposite front and back surfaces; and a polysilicon layer 200 disposed on at least one of the front and back surfaces, the polysilicon layer 200 having a plurality of pits 300 on the side surface away from the substrate 100; the side surface of the substrate 100 on which the polysilicon layer 200 is disposed comprises an edge region 210 and a center region 220 located in the middle of the edge region 210; the polysilicon layer 200 comprises: when the polysilicon layer 200 on the same surface of the substrate 100 is of the same doping type, the density of the pits 300 on the polysilicon layer 200 in the center region 220 is less than or equal to the density of the pits 300 on the polysilicon layer 200 in the edge region 210; when the polysilicon layer 200 of different doping types is disposed on the same surface of the substrate 100, the density of the pits 300 on the polysilicon layer 200 in the center region 220 is less than or equal to the density of the pits 300 on the polysilicon layer 200 of the same doping type in the edge region 210. By controlling the density of the pits 300 in the center region 220 to be less than the density of the pits 300 in the edge region 210, reducing the size and depth of the pits 300, ensuring the flatness of the surface of the polysilicon layer, ensuring the passivation effect, further avoiding the case of electric leakage caused by the pits being too deep to penetrate the polysilicon layer, and ensuring the safety of the solar cell.

[0120] Embodiment three

[0121] In some optional embodiments, the present disclosure provides a photovoltaic system comprising the photovoltaic module as described above.

[0122] Those skilled in the art can clearly understand that, for the convenience and brevity of description, the structure and implementation principle of the photovoltaic system described above can refer to the corresponding structure and implementation principle in the foregoing embodiments one and two, which will not be described here.

[0123] The solar cell of the present disclosure comprises a substrate 100 having opposite front and back surfaces; and a polysilicon layer 200 provided on at least one of the front and back surfaces, the polysilicon layer 200 having a plurality of pits 300 on the side surface away from the substrate 100; the side surface of the substrate 100 provided with the polysilicon layer 200 comprises an edge region 210 and a central region 220 located in the middle of the edge region 210; the polysilicon layer 200 comprises: when the polysilicon layer 200 on the same surface of the substrate 100 is of the same doping type, the density of the pits 300 on the polysilicon layer 200 in the central region 220 is less than or equal to the density of the pits 300 on the polysilicon layer 200 in the edge region 210; when the polysilicon layer 200 of different doping types is provided on the same surface of the substrate 100, the density of the pits 300 on the polysilicon layer 200 in the central region 220 is less than or equal to the density of the pits 300 on the polysilicon layer 200 of the same doping type in the edge region 210. By controlling the density of the pits 300 in the central region 220 to be less than the density of the pits 300 in the edge region 210, reducing the size and depth of the pits 300, ensuring the flatness of the surface of the polysilicon layer, ensuring the passivation effect, further avoiding the case of electric leakage caused by the pits being too deep to penetrate the polysilicon layer, and ensuring the safety of the solar cell.

[0124] The above merely describes the preferred embodiments of the present disclosure and is not intended to limit the present disclosure. Any modification, equivalent replacement, and improvement within the spirit and principle of the present disclosure shall be included in the protection scope of the present disclosure.

Claims

1. A solar cell, comprising: a substrate having opposite front and back surfaces; and a polysilicon layer disposed on at least one of the front and back surfaces, the polysilicon layer having a plurality of pits on a side surface thereof away from the substrate; wherein the side surface of the substrate on which the polysilicon layer is disposed comprises an edge region and a central region located in the middle of the edge region; wherein the polysilicon layer comprises: when the polysilicon layer on the same surface of the substrate is of the same doping type, a density of pits on the polysilicon layer in the central region is less than or equal to a density of pits on the polysilicon layer in the edge region; or when the polysilicon layer of different doping types is disposed on the same surface of the substrate, a density of pits on the polysilicon layer in the central region is less than or equal to a density of pits on the polysilicon layer of the same doping type in the edge region; wherein a size of pits in at least part of the central region is less than or equal to a size of pits in at least part of the edge region; wherein a size of pits in the central region is D1 microns, 0 < D1 ≤ 5, and a size of pits in the edge region is D2 microns, 0 < D2 ≤ 10; wherein the edge region is a region extending 20 mm from a peripheral edge of the substrate to a geometric center of the substrate; wherein a number of pits gradually decreases from the peripheral edge of the substrate to the geometric center of the substrate; wherein the solar cell is a single-sided TOPCon cell comprising a first passivation layer, a second passivation layer, an emitter layer, a tunneling passivation contact structure, a first electrode and a second electrode; wherein the emitter layer and the first passivation layer are sequentially disposed on the front surface of the substrate, and the first electrode contacts the emitter layer through the first passivation layer; wherein the tunneling passivation contact structure and the second passivation layer are sequentially disposed on the back surface of the substrate, the tunneling passivation contact structure comprises a tunneling layer and the polysilicon layer, and the second electrode contacts the polysilicon layer through the second passivation layer; wherein the solar cell is a double-sided TOPCon cell comprising a first passivation layer, a second passivation layer, a first tunneling passivation contact structure, a second tunneling passivation contact structure, a first electrode and a second electrode; wherein the first tunneling passivation contact structure and the first passivation layer are sequentially disposed on the front surface of the substrate, and the second tunneling passivation contact structure and the second passivation layer are sequentially disposed on the back surface of the substrate; wherein the first tunneling passivation contact structure and the second tunneling passivation contact structure each comprise a tunneling layer and the polysilicon layer; wherein the first electrode contacts the polysilicon layer of the first tunneling passivation contact structure through the first passivation layer; wherein the second electrode contacts the polysilicon layer of the second tunneling passivation contact structure through the second passivation layer; wherein the solar cell is a back contact cell comprising a first polarity region, a second polarity region, a passivation layer, a first electrode and a second electrode. ​ ​ ​ ​ ​ ​ ​ 2. The solar cell of claim 1, wherein, the density of the pits of the central region is M1 / mm 2 , 0 < M1≤ 5, the density of the pits of the edge region is M2 / mm 2 , 0 < M2≤ 500.

3. The solar cell of claim 1, wherein, ​ 4. The solar cell of claim 3, wherein, ​ 5. The solar cell of claim 1, wherein, ​ 6. The solar cell of claim 1, wherein, ​ 7. The solar cell of claim 1, wherein, ​ ​ ​ 8. The solar cell of claim 1, wherein, ​ ​ ​ ​ ​ 9. The solar cell of claim 1, wherein, ​ The first polarity region and the second polarity region are alternately and sequentially arranged on the back surface of the substrate, and the first polarity region and the second polarity region comprise the polysilicon layer of different doping types; The passivation layer is arranged on the side of the first polarity region and the second polarity region away from the substrate; The first electrode is in contact with the first polarity region through the passivation layer; The second electrode is in contact with the second polarity region through the passivation layer.

10. A photovoltaic module comprising the solar cell according to any one of claims 1 to 9.

11. A photovoltaic system comprising the photovoltaic module according to claim 10.

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