Drive circuit

Abstract

Provided is a novel drive circuit. A level shift circuit has first to third transistors, first to third power supply lines, and first to fourth wiring lines. A back gate of the first transistor is electrically connected with the first wiring line. One of a source and a drain of the first transistor is electrically connected with the first power supply line. The potential of the first power supply line is higher than the potential of the second power supply line, the potential of the third power supply line is lower than the potential of the first power supply line and the potential of the second power supply line, the signal of the fourth wiring line switches from a low potential level to a high potential level when the signal supplied to the first wiring line is at a high potential level, and the signal of the fourth wiring line switches from the high potential level to the low potential level when the signal supplied to the first wiring line is at a low potential level.

Description

Drive circuit

[0001] One aspect of the present invention relates to a drive circuit.

[0002] Note that one embodiment of the present invention is not limited to the above technical field. The technical field of one embodiment of the invention disclosed in this specification and the like relates to an object, a method, a driving method, or a manufacturing method. Alternatively, one embodiment of the present invention relates to a process, a machine, manufacture, or a composition of matter. More specifically, examples of the technical field of one embodiment of the present invention disclosed in this specification and the like include semiconductor devices, display devices, light-emitting devices, power storage devices, optical devices, imaging devices, lighting devices, arithmetic units, control devices, memory devices, input devices, output devices, input / output devices, signal processing devices, arithmetic processing devices, electronic computers, electronic devices, and driving methods thereof or manufacturing methods thereof.

[0003] 2. Description of the Related Art Driver circuits for driving display devices have been developed. Patent Documents 1 and 2 disclose examples of semiconductor devices that function as driver circuits for driving display devices.

[0004] JP 2011-87286 A JP 2015-179556 A

[0005] An object of one embodiment of the present invention is to provide a highly reliable driver circuit or a semiconductor device including the driver circuit. Another object of one embodiment of the present invention is to provide a driver circuit with high operational stability or a semiconductor device including the driver circuit. Another object of one embodiment of the present invention is to provide a driver circuit with increased operating speed or a semiconductor device including the driver circuit. Another object of one embodiment of the present invention is to provide a driver circuit with a reduced occupation area or a semiconductor device including the driver circuit. Another object of one embodiment of the present invention is to provide a driver circuit with reduced power consumption or a semiconductor device including the driver circuit. Another object of one embodiment of the present invention is to provide a driver circuit with improved performance or a semiconductor device including the driver circuit. Another object of one embodiment of the present invention is to provide a novel driver circuit or a semiconductor device including the driver circuit.

[0006] The above-mentioned problem does not preclude the existence of other problems. Problems other than the above-mentioned problem will become apparent from the description in this specification, drawings, claims, etc., and it is possible to extract other problems other than the above-mentioned problem from the description in this specification, drawings, claims, etc. Note that one embodiment of the present invention does not necessarily solve all of these problems (the above-mentioned problem and other problems).

[0007] One embodiment of the present invention includes a level-shift circuit including first to third transistors. A gate of the first transistor is electrically connected to one of a source and a drain of a third transistor. A backgate of the first transistor is electrically connected to a first wiring. One of the source and the drain of the first transistor is electrically connected to a first power supply line. The other of the source and the drain of the first transistor is electrically connected to one of the source and the drain of a second transistor and a second wiring. A gate of the second transistor is electrically connected to the third wiring. the other of the source or drain of the first transistor is electrically connected to a second power supply line, the gate of the third transistor is electrically connected to the third power supply line, the other of the source or drain of the third transistor is electrically connected to a fourth wiring, the potential of the first power supply line is higher than the potential of the second power supply line, the potential of the third power supply line is lower than the potential of the first power supply line, and the signal of the fourth wiring is a signal that can be switched from a low potential level to a high potential level when the signal supplied to the first wiring is at a high potential level, and from a high potential level to a low potential level when the signal supplied to the first wiring is at a low potential level.

[0008] One embodiment of the present invention includes a level shift circuit including first to fifth transistors, in which a gate of the first transistor is electrically connected to one of a source or a drain of a third transistor, a back gate of the first transistor is electrically connected to a first wiring, one of a source or a drain of the first transistor is electrically connected to a first power supply line, the other of the source or the drain of the first transistor is electrically connected to one of a source or a drain of a second transistor and a second wiring, a gate of the second transistor is electrically connected to one of a source or a drain of a fourth transistor and one of a source or a drain of a fifth transistor, the other of the source or the drain of the second transistor is electrically connected to a second power supply line, the gate of the fourth transistor is electrically connected to a third wiring, and the third a gate of the transistor electrically connected to a third power supply line, the other of the source or drain of the third transistor electrically connected to a fourth wiring and the gate of a fifth transistor, the other of the source or drain of the fourth transistor electrically connected to the fourth power supply line, the other of the source or drain of the fifth transistor electrically connected to the fifth power supply line, the potential of the first power supply line and the potential of the fourth power supply line are higher than the potential of the second power supply line and the potential of the fifth power supply line, respectively, the potential of the third power supply line is lower than the potential of the first power supply line and the potential of the fourth power supply line, and the signal of the fourth wiring is a signal that can be switched from a low potential level to a high potential level when the signal supplied to the first wiring is at a high potential level, and from a high potential level to a low potential level when the signal supplied to the first wiring is at a low potential level.

[0009] In one embodiment of the present invention, the level shift circuit preferably includes a driver circuit having a capacitor, a first electrode of the capacitor being electrically connected to the gate of the first transistor and one of the source and the drain of the third transistor, and a second electrode of the capacitor being electrically connected to the other of the source and the drain of the first transistor, one of the source and the drain of the second transistor, and a second wiring.

[0010] In one embodiment of the present invention, the driver circuit preferably includes a register circuit, the register circuit having a function of outputting an output signal based on a signal input to the register circuit to a level shift circuit, and the third wiring and the fourth wiring are wirings electrically connected to the register circuit.

[0011] In one embodiment of the present invention, a driver circuit is preferably configured such that the first wiring of the level shift circuit in the u-th row (u is an integer of 2 or more) is electrically connected to the second wiring of the level shift circuit in the (u-1)-th row.

[0012] In one embodiment of the present invention, the first to fifth transistors each preferably include a semiconductor layer in which a channel formation region is formed, and the semiconductor layer preferably contains indium oxide.

[0013] In one aspect of the present invention, the channel width of the first transistor is preferably larger than the channel width of the third transistor in the driving circuit.

[0014] According to one embodiment of the present invention, a highly reliable driver circuit or a semiconductor device including the driver circuit can be provided. According to another embodiment of the present invention, a driver circuit with high operational stability or a semiconductor device including the driver circuit can be provided. According to another embodiment of the present invention, a driver circuit with increased operating speed or a semiconductor device including the driver circuit can be provided. According to another embodiment of the present invention, a driver circuit with a reduced occupation area or a semiconductor device including the driver circuit can be provided. According to another embodiment of the present invention, a driver circuit with reduced power consumption or a semiconductor device including the driver circuit can be provided. According to another embodiment of the present invention, a driver circuit with improved performance or a semiconductor device including the driver circuit can be provided. According to another embodiment of the present invention, a novel driver circuit or a semiconductor device including the driver circuit can be provided.

[0015] The above-described effects do not preclude the existence of other effects. Effects other than the above-described effects will become apparent from the description in this specification, drawings, claims, etc., and other effects can be extracted from the description in this specification, drawings, claims, etc. One embodiment of the present invention does not necessarily have all of these effects (the above-described effects and other effects).

[0016] FIGS. 1A and 1B are circuit diagrams and timing charts illustrating an example of the configuration of a drive circuit. FIGS. 2A and 2B are circuit diagrams and timing charts illustrating an example of the configuration of a drive circuit. FIGS. 3A, 3B, and 3C are circuit diagrams illustrating an example of the configuration of a drive circuit. FIGS. 4A and 4B are block diagrams illustrating an example of the configuration of a semiconductor device. FIGS. 5A and 5B are circuit diagrams illustrating an example of the configuration of a semiconductor device. FIG. 6 is a circuit diagram illustrating an example of the configuration of a semiconductor device. FIG. 7 is a timing chart illustrating an example of the configuration of a semiconductor device. FIG. 8 is a circuit diagram illustrating an example of the configuration of a semiconductor device. FIGS. 9A, 9B, and 9C are diagrams illustrating an example of the configuration of a transistor. FIGS. 10A, 10B, and 10C are diagrams illustrating an example of the configuration of a transistor. FIG. 11 is a plan view illustrating an example of the configuration of a display device. FIGS. 12A, 12B, and 12C are cross-sectional views illustrating an example of the configuration of a display device. FIG. 13A is a perspective view illustrating an example of the configuration of a display device. FIGS. 13B, 13C, 13D, 13E, and 13F are plan views illustrating an example of a pixel arrangement. FIG. 14 is a cross-sectional view illustrating an example of the configuration of a display device. FIGS. 15A and 15B are cross-sectional views illustrating an example of the configuration of a display device. FIGS. 16A and 16B are cross-sectional views illustrating an example of the configuration of a display device. FIGS. 17A, 17B, 17C, and 17D are diagrams illustrating an example of an electronic device. FIGS. 18A, 18B, 18C, 18D, 18E, and 18F are diagrams illustrating an example of an electronic device. FIGS. 19A, 19B, 19C, 19D, 19E, 19F, and 19G are diagrams illustrating an example of an electronic device. 20A1, 20A2, 20A3, 20A4, 20A5, 20A6, 20A7 and 20B1, 20B2, 20B3, 20B4, 20B5, 20B6 are diagrams showing "connection" in this specification.

[0017] In this specification, a semiconductor device refers to a device that utilizes semiconductor characteristics, such as a circuit including a semiconductor element (e.g., a transistor or a diode), or a device having such a circuit. It also refers to any device that can function by utilizing semiconductor characteristics. For example, an integrated circuit including a semiconductor element, a chip equipped with an integrated circuit, an electronic component in which a chip is housed in a package, or an electronic device equipped with an electronic component are examples of semiconductor devices. Furthermore, for example, a display device, a light-emitting device, a power storage device, an optical device, an imaging device, a lighting device, an arithmetic device, a control device, a memory device, an input device, an output device, an input / output device, a signal processing device, an electronic computer, or an electronic device may be a semiconductor device and may also include a semiconductor device.

[0018] Hereinafter, embodiments will be described with reference to the drawings. However, the embodiments can be implemented in many different ways. Therefore, it will be readily understood by those skilled in the art that various changes in form and details can be made without departing from the spirit and scope of the present invention. Therefore, the present invention should not be interpreted as being limited to the description of the embodiments.

[0019] In this specification and the like, the configuration shown in each embodiment can be appropriately combined with the configuration shown in another embodiment to form one aspect of the present invention. Furthermore, when multiple configurations are shown in one embodiment, these configurations can be appropriately combined to form one aspect of the present invention.

[0020] In addition, in the drawings illustrating the embodiments, the same reference numerals may be used in common between different drawings for the same parts or parts having similar functions in the configuration of the invention, thereby omitting repeated description thereof. Furthermore, when the drawings indicate similar functions, for example, the same hatching patterns may be used and no particular reference numerals may be used. Furthermore, in the drawings, for example, in perspective views or top views (also called "plan views"), the illustration of some components may be omitted for ease of understanding. Furthermore, in the drawings, for example, the illustration of some hidden lines may be omitted. Furthermore, in the drawings, for example, the illustration of hatching patterns may be omitted.

[0021] In addition, in the drawings, the size, layer thickness, or area may be exaggerated for clarity. Therefore, the drawings are not limited to, for example, their size or aspect ratio. Note that the drawings are schematic representations of ideal examples and are not limited to, for example, the shapes or values ​​shown in the drawings. For example, in an actual manufacturing process, layers or resist masks may be unintentionally thinned by processes such as etching, but these may not be reflected in the drawings to facilitate understanding. In addition, for example, in actual circuit operation, variations in voltage or current may occur due to noise or timing errors, but these may not be reflected in the drawings to facilitate understanding.

[0022] Furthermore, in this specification and drawings, components may be classified by function and shown as independent elements. However, it may be difficult to separate components by function, and one element may be involved in multiple functions, or one function may be involved across multiple elements. Therefore, the elements shown in this specification and drawings may not be limited to the descriptions therein, and may be rephrased appropriately.

[0023] Furthermore, in this specification and drawings, when the same reference numeral is used for multiple elements, and particularly when it is necessary to distinguish between them, the reference numeral may be accompanied by an identifying symbol such as "A", "b", "_1", "[n]", or "[m, n]". Furthermore, when explaining matters common to multiple elements accompanied by identifying symbols, or when it is not necessary to distinguish between them, the elements may be described without the identifying symbol.

[0024] In this specification and the like, the "conductive state" or "on state" of a transistor refers to, for example, a state in which the source and drain of the transistor are considered to be electrically short-circuited, or a state in which a current can flow between the source and drain (also referred to as a state in which a current can flow). For example, a state in which the voltage between the gate and source of an n-channel transistor is higher than the threshold voltage, or a state in which the voltage between the gate and source of a p-channel transistor is lower than the threshold voltage, may be referred to as the "conductive state" or "on state." In addition, the "non-conductive state," "cutoff state," or "off state" of a transistor refers to a state in which the source and drain of the transistor are considered to be electrically cut off. For example, a state in which the voltage between the gate and source of an n-channel transistor is lower than the threshold voltage, or a state in which the voltage between the gate and source of a p-channel transistor is higher than the threshold voltage, may be referred to as the "non-conductive state," "cutoff state," or "off state."

[0025] In this specification and the like, the voltage between the gate and the source (gate-source) may be referred to as the "gate voltage," the voltage between the drain and the source (drain-source) may be referred to as the "drain voltage," and the voltage between the back gate and the source (back gate-source) may be referred to as the "back gate voltage." Also, the current flowing between the drain and the source may be referred to as the "drain current." Note that, for n-channel transistors, terms such as "high gate voltage," "high drain voltage," and "high back gate voltage" may be interchangeable with terms such as "low gate voltage," "low drain voltage," and "low back gate voltage" for p-channel transistors, as appropriate. Also, terms such as "low gate voltage," "low drain voltage," and "low back gate voltage" for n-channel transistors may be interchangeable with terms such as "high gate voltage," "high drain voltage," and "high back gate voltage" for p-channel transistors, as appropriate.

[0026] In this specification and the like, unless otherwise specified, the "off-state current" of a transistor refers to the drain current when the transistor is in an off state. Note that in this specification and the like, the off-state current and the current flowing between the gate and the source and drain (also referred to as gate leakage current) may also be referred to as leakage current.

[0027] In this specification and the like, one of the source or drain (also referred to as two input / output terminals) of a transistor may be referred to as a first terminal, and the other of the source or drain of the transistor may be referred to as a second terminal. That is, a transistor has at least a gate (also referred to as a gate terminal), a first terminal, and a second terminal. One terminal of a capacitor (also referred to as one of a pair of terminals) may be referred to as a first terminal, and the other terminal of the capacitor (also referred to as the other of the pair of terminals) may be referred to as a second terminal. One terminal of a display element may be referred to as a first terminal, and the other terminal of the display element may be referred to as a second terminal. One terminal of a liquid crystal element may be referred to as a first terminal, and the other terminal of the liquid crystal element may be referred to as a second terminal. One terminal of a light-emitting element may be referred to as a first terminal, and the other terminal of the light-emitting element may be referred to as a second terminal. One terminal of a light-receiving element may be referred to as a first terminal, and the other terminal of the light-receiving element may be referred to as a second terminal. In addition, one of the anode or cathode of the diode (also referred to as one of a pair of terminals) may be referred to as a first terminal, and the other of the anode or cathode of the diode (also referred to as the other of the pair of terminals) may be referred to as a second terminal.

[0028] Embodiment 1 A driver circuit according to one embodiment of the present invention will be described with reference to the drawings. At least a part of the driver circuit according to one embodiment of the present invention can be used as a driver circuit such as a gate line driver circuit.

[0029] 1A and 1B are timing charts illustrating an operation example of a driver circuit according to one embodiment of the present invention.

[0030] 1A includes a level shift circuit 110 having a transistor M11, a transistor M12, a transistor M13, and a capacitance element C11. The transistor M11 may be referred to as a first transistor. The transistor M12 may be referred to as a second transistor. The transistor M13 may be referred to as a third transistor.

[0031] Note that in the driver circuit 100, each transistor (such as transistors M11 to M13) is an n-channel transistor or a p-channel transistor. In the following description, each transistor is assumed to be an n-channel transistor. N-channel transistors have a larger on-state current than p-channel transistors. Therefore, by using n-channel transistors, the operating speed of the driver circuit 100 can be improved. Furthermore, n-channel transistors require a smaller channel width to obtain the same level of on-state current than p-channel transistors. Therefore, by using n-channel transistors, the area occupied by the driver circuit 100 can be reduced.

[0032] When p-channel transistors are used for the transistors, the following descriptions regarding the magnitude relationship of voltage and potential can be appropriately rephrased and applied. For example, "high voltage" can be appropriately rephrased as "low voltage" and "low voltage" can be appropriately rephrased as "high voltage."

[0033] The transistor M11 shown in FIG. 1A has a four-terminal structure including a back gate in addition to three terminals, i.e., a gate, a source, and a drain. The transistor M11 can control its electrical characteristics, such as its threshold voltage, depending on the potential applied to the back gate. The back gate is connected to a wiring BGL. The wiring BGL may be referred to as a first wiring. Note that in the following description, transistors other than the transistor M11 are described as transistors having three terminals, i.e., a gate, a source, and a drain, but may also have a four-terminal structure including a back gate.

[0034] The gate of transistor M11 is connected to one of the source or drain of transistor M13. The gate of transistor M11 is connected to one electrode (first electrode) of capacitance element C11. One of the source or drain of transistor M11 is connected to one of the source or drain of transistor M12. One of the source or drain of transistor M11 is connected to the other electrode (second electrode) of capacitance element C11. One of the source or drain of transistor M11 is connected to wiring OL. The other of the source or drain of transistor M11 is connected to power supply line VLD1. The power supply line VLD1 may be called a first power supply line. The wiring OL may be called a second wiring.

[0035] The gate of the transistor M12 is connected to the wiring NL2. The other of the source and the drain of the transistor M12 is connected to the power supply line VLS1. The power supply line VLS1 may be called a second power supply line. The wiring NL2 may be called a third wiring.

[0036] The gate of the transistor M13 is connected to a power supply line VLD2. The other of the source and the drain of the transistor M13 is connected to a wiring NL1. The power supply line VLD2 may be called a third power supply line. The wiring NL1 may be called a fourth wiring.

[0037] One of the source and the drain of the transistor M13, the gate of the transistor M11, and one electrode of the capacitor C11 may be referred to as a node ND1. Note that the terms "node" and "wiring" may be interchangeable.

[0038] The level shift circuit 110 shown in FIG. 1A has a function of level-shifting the amplitude voltage of a timing signal (also referred to as an output signal or a first output signal) supplied to a wiring NL1 and outputting the signal to a wiring OL. The level shift circuit 110 shown in FIG. 1A also receives an inverted signal of the timing signal supplied to a wiring NL2. When a timing signal and its inverted signal are supplied to the wirings NL1 and NL2, a register circuit is preferably connected to the wirings NL1 and NL2. This configuration enables the timing signal output by the register circuit to be level-shifted in a desired manner and the level shift of a signal according to a load driven using the timing signal.

[0039] The timing signal applied to the line NL1 can be used as a scanning signal (gate line selection signal) applied to, for example, a gate line (scanning line) of a display device. The scanning signal applied via a level shift circuit can more reliably control the on / off of a transistor in a pixel. Level shift circuits that increase the amplitude voltage of an input signal and output it (level shift) include level shift circuits that use a clock signal. Level shift circuits that use a clock signal consume a lot of power due to the charging and discharging of the clock signal line to which the clock signal is applied.

[0040] In one embodiment of the present invention, a level shift circuit uses a power supply line that applies a constant potential instead of a clock signal that increases the amplitude voltage of an input signal. By using the power supply line as a level shift circuit, power consumption due to charging and discharging of the clock signal line can be reduced.

[0041] In a level shift circuit connected to a power supply line that provides a constant potential, the potential change of the output timing signal that follows the potential change of the input timing signal may be slow due to low driving capability of the transistor. In this case, it is preferable to use a transistor with a four-terminal structure having a back gate, such as the above-mentioned transistor M11, as the transistor connected to the power supply line that provides the potential for level shifting, to increase the driving capability. However, if the potentials of the back gate and gate of a four-terminal transistor connected to the power supply line that provides the potential for level shifting are changed simultaneously, it takes time to charge and discharge the gate and back gate, which may result in a large delay in the timing signal that is level shifted and output.

[0042] In one embodiment of the present invention, a signal applied to a back gate of a transistor connected to a power supply line that applies a potential for level shifting is switched from a low potential level to a high potential level before the signal applied to the gate, and a timing signal for changing the back gate from the low potential level to the high potential level is supplied to the gate while the back gate is at the high potential level.In another embodiment of the present invention, a signal applied to a back gate of a transistor connected to a power supply line that applies a potential for level shifting is switched from a high potential level to a low potential level before the signal applied to the gate, and a timing signal for changing the back gate from the high potential level to the low potential level is supplied to the gate while the back gate is at the low potential level.

[0043] In the configuration of FIG. 1A , the potential of the signal applied to the wiring (wiring BGL) connected to the backgate changes before the potential of the timing signal applied to the gate (node ​​ND1) changes. Therefore, in the configuration of FIG. 1A , the timing of charge accumulation (backgate side) in the channel of the transistor M11 connected to the power supply line VDL1 that applies the potential for level shifting can be made different from the timing of charge / discharge (gate side) of the wiring OL that outputs a signal corresponding to the timing signal. Therefore, when a transistor with a four-terminal structure having a backgate is used, an operation in which charge is accumulated on the backgate side in advance and a timing signal is applied to the gate side can be realized, thereby achieving a steep change in drain current in response to a change in the potential of the timing signal. Therefore, in the configuration of FIG. 1A , the delay of the timing signal output after level shifting can be reduced without requiring time for charging and discharging the gate and backgate.

[0044] In one embodiment of the present invention, by switching the potential of the wiring BGL connected to the backgate from a low potential level to a high potential level before the potential of the node ND1 on the gate side, the threshold voltage of the transistor M11 connected to the power supply line VLD1 that provides a potential for level shifting is reduced. However, by switching the potential of the wiring BGL from a high potential level to a low potential level before the potential of the node ND1, the threshold voltage of the transistor M11 connected to the power supply line VLD1 can be increased. Therefore, the slight drain current that flows due to the temporary reduction in the threshold voltage of the transistor M11 can be reduced.

[0045] In one embodiment of the present invention, when the driver circuit 100 is used as a gate line driver circuit, the wiring BGL connected to the back gate is preferably connected to a wiring OL output from another driver circuit 100 in a previous stage, that is, a previous row. For example, the wiring BGL connected to the back gate of the level shift circuit 110 in the u-th row (u is an integer of 2 or more) is preferably connected to the wiring OL of the level shift circuit 110 in the (u-1)-th row. With this configuration, a desired operation can be achieved without generating a separate signal to be supplied to the wiring BGL.

[0046] In one embodiment of the present invention, the potential of the power supply line VLD1 is preferably higher than the potential of the power supply line VLS1, and the potential of the power supply line VLD2 is preferably lower than the potential of the power supply line VLD1. This configuration allows a period during which the node ND1 is floating (in a floating state), thereby more reliably shifting the level of the timing signal. In the following description and drawings, the potential of the power supply line VLD1 is represented as a potential H2 (also referred to as an H2 level or simply as "H2"). The potential of the power supply line VLS1 is represented as a potential L (also referred to as an L level or simply as "L"; H2 > L). The potential L may be, for example, a ground potential. The potential of the power supply line VLD2 is represented as a potential H1 (also referred to as an H1 level or simply as "H1"; H2 > H1). Here, the difference between the potentials H2 and L and the difference between the potentials H1 and L are assumed to be greater than the threshold voltage of each transistor. The amplitude voltages of the timing signal supplied to the wiring NL1 and the inverted signal of the timing signal supplied to the wiring NL2 may be described as amplitude voltages based on the potentials H1 and L. The amplitude voltages of the level-shifted timing signal supplied to the wiring BGL and the level-shifted timing signal supplied to the wiring OL may be described as amplitude voltages based on the potentials H2 and L.

[0047] FIG. 1B is a timing chart illustrating the operation of the level shift circuit 110 included in the driving circuit 100 shown in FIG. 1A.

[0048] In the description of the operation, when the potential changes, a rise time and a fall time may occur due to, for example, a load (parasitic capacitance and parasitic resistance) such as a wiring. Also, even if two different operations are shown to have the same timing, this does not necessarily mean that they are exactly the same timing. For example, even if there is a slight time difference due to signal delay in the wiring, they may be considered to have the same timing.

[0049] Furthermore, in the timing chart, even if each period is shown to have the same length for ease of explanation, the length of each period may be different.

[0050] 1B shows potentials applied to the wirings NL1, NL2, the node ND1, the wiring OL, and the wiring BGL during each period of operation. The timing chart also shows Vt11, which represents a change in the threshold voltage of the transistor M11, and Id11, which represents the magnitude of the drain current flowing through the transistor M11.

[0051] The period T11 shown in FIG. 1B is a period in which the wiring NL1 is set to the L level and the wiring NL2 is set to the H1 level, and is a period before a timing signal for setting the wiring NL1 to the H1 level is applied. During the period T11, the transistor M13 is in a conductive state (ON state), but the potential of the node ND1 is set to the L level. That is, the transistor M11 is in a non-conductive state (OFF state), and the transistor M12 is in an ON state. Also, during the period T11, the wiring BGL connected to the back gate of the transistor M11 is set to the H2 level. Since the transistor M11 can achieve a state in which charge is accumulated on the back gate side, the threshold voltage Vt11 is reduced. Although the reduced threshold voltage Vt11 increases the drain current Id11, it does not contribute much to increasing the potential of the wiring OL.

[0052] Period T12 shown in FIG. 1B is a period during which the wiring NL1 is set to the H1 level and the wiring NL2 is set to the L level. This is a period during which a timing signal for setting the wiring NL1 to the H1 level is applied. During period T12, transistor M13 is on, and the potential of node ND1 is at the H1 level. The H1 level potential of node ND1 turns off transistor M13, causing node ND1 to float. Transistor M12 is off, and transistor M11 is on, allowing drain current Id11 to flow in response to the H1 level potential of node ND1. Because charge is accumulated in the back gate of transistor M11 during period T11, the drain current Id11 can be rapidly increased in response to changes in the potential of node ND1. Furthermore, during period T12, the potential of the floating node ND1 can be changed due to the bootstrap effect of capacitor C11, which occurs as the potential of the wiring OL changes. This more reliably sets the potential of wiring OL to the H2 level.

[0053] The period T13 shown in FIG. 1B is a period in which the wiring NL1 is set to the H1 level and the wiring NL2 is set to the L level. This is a period following the period T12 in which a timing signal for setting the wiring NL1 to the H1 level is applied. During the period T13, the wiring BGL connected to the back gate of the transistor M11 is switched from the H2 level to the L level. Therefore, the threshold voltage Vt11 can be made larger than those during the periods T11 and T12. By increasing the threshold voltage Vt11, the drain current Id11 can be reduced. At this time, the potential of the node ND1 does not change, and the wiring OL can remain at the H2 level. That is, the amplitude voltage based on the H1 level minus the L level of the timing signal for the wiring NL1 (sometimes abbreviated as the amplitude voltage H1-L) can be level-shifted to the amplitude voltage based on the H2 level minus the L level of the signal output to the wiring OL (sometimes abbreviated as the amplitude voltage H2-L). After the period T13, the state immediately before the period T11 is restored. During the subsequent period, the threshold voltage Vt11 remains the same as in the period T13, and the drain current Id11 can be maintained at a small value.

[0054] As a result, one embodiment of the present invention can provide a highly reliable driver circuit or a semiconductor device including the driver circuit. Another embodiment of the present invention can provide a driver circuit with high operational stability or a semiconductor device including the driver circuit. Another embodiment of the present invention can provide a driver circuit with increased operating speed or a semiconductor device including the driver circuit. Another embodiment of the present invention can provide a driver circuit with a reduced occupation area or a semiconductor device including the driver circuit. Another embodiment of the present invention can provide a driver circuit with reduced power consumption or a semiconductor device including the driver circuit. Another embodiment of the present invention can provide a driver circuit with improved performance or a semiconductor device including the driver circuit. Another embodiment of the present invention can provide a novel driver circuit or a semiconductor device including the driver circuit.

[0055] <Structure Example 2 of Driver Circuit> The driver circuit of one embodiment of the present invention is not limited to the above-described structure and can have various structures.

[0056] FIG. 2A is a circuit diagram illustrating a modified example of the drive circuit 100 shown in FIG. 1A. The drive circuit 100 shown in FIG. 2A differs from the drive circuit 100 shown in FIG. 1A in that it further includes transistors M14 and M15. FIG. 2B is a timing chart illustrating an example of the operation of the drive circuit 100 shown in FIG. 2A. The transistor M14 may be referred to as a fourth transistor. The transistor M15 may be referred to as a fifth transistor. Note that in the configurations described below, the above descriptions will be used for configurations similar to those in FIGS. 1A and 1B, and repeated description may be omitted.

[0057] The gate of transistor M14 is connected to wiring NL2. One of the source or drain of transistor M14 is connected to the gate of transistor M12 and one of the source or drain of transistor M15. The other of the source or drain of transistor M14 is connected to power supply line VLD3. Power supply line VLD3 may be referred to as a fourth power supply line. Wiring NL2 corresponds to wiring NL2 described in FIG. 1A. Note that in FIG. 2A, the gate of transistor M12, one of the source or drain of transistor M14, and one of the source or drain of transistor M15 may be referred to as node ND2. Note that node and wiring may be interchangeable.

[0058] The gate of the transistor M15 is connected to the line NL1 and the other of the source and drain of the transistor M13. The other of the source and drain of the transistor M15 is connected to a power supply line VLS3. The power supply line VLS3 may be referred to as a fifth power supply line.

[0059] The level shift circuit 110 illustrated in FIG. 2A has a function of level-shifting a timing signal supplied to a wiring NL1 and outputting the level-shifted signal to a wiring OL, similar to the level shift circuit 110 illustrated in FIG. 1A.

[0060] 2A, an inverted signal of the timing signal is supplied to the wiring NL2. The transistor M14, to which the inverted signal of the timing signal supplied to the wiring NL2 is supplied, can charge the node ND2 at high speed by setting the potential of the power supply line VLD3 to the potential of the power supply line VLD1 or the potential of the power supply line VLD2. This allows the transistor M12 to be turned off at high speed, and the wiring OL to be switched to the L level at high speed.

[0061] In one embodiment of the present invention, the potential of the power supply line VLD3 is set to the same potential as that of the power supply line VLD2, for example, thereby enabling desired operation without increasing the number of potentials of the power supply lines. In the following description, the potential of the power supply line VLD3 is represented as potential H1, similar to the potential of the power supply line VLD2. Furthermore, in one embodiment of the present invention, the potential of the power supply line VLS3 is set to the same potential as that of the power supply line VLS1, thereby enabling desired operation without increasing the number of potentials of the power supply lines. In the following description, the potential of the power supply line VLS3 is represented as potential L, similar to the potential of the power supply line VLS1.

[0062] FIG. 2B is a timing chart illustrating the operation of the level shift circuit 110 included in the driving circuit 100 shown in FIG. 2A.

[0063] 2B shows potentials applied to the wirings NL1 and NL2, the nodes ND2 and ND1, the wiring OL, and the wiring BGL during each period of operation. The timing chart also shows Vt11, which represents a change in the threshold voltage of the transistor M11, and Id11, which represents the magnitude of the drain current flowing through the transistor M11.

[0064] The period T11 shown in FIG. 2B is a period during which the wiring NL1 is set to the L level and the wiring NL2 is set to the H1 level, and is a period before a timing signal for setting the wiring NL1 to the H1 level is provided. During the period T11, the transistor M13 is in a conductive state (ON state), but the potential of the node ND1 is set to the L level. The transistor M11 is in an OFF state. Because the transistor M14 is ON and the transistor M15 is OFF, the potential of the node ND2 is lower than the potential H1 of the power supply line VLD3 by the threshold voltage of the transistor M14, but this potential is sufficient to turn on the transistor M12. Meanwhile, the wiring BGL connected to the back gate of the transistor M11 is set to the H2 level. The transistor M11 achieves a state in which charge is accumulated on the back gate side, thereby reducing the threshold voltage Vt11. Although the reduced threshold voltage Vt11 increases the drain current Id11, this does not contribute much to increasing the potential of the wiring OL.

[0065] 2B, the wiring NL1 is set to the H1 level and the wiring NL2 is set to the L level, and a timing signal for setting the wiring NL1 to the H1 level is provided. During the period T12, the transistor M13 is in a conductive state (ON state), and the potential of the node ND1 is set to the H1 level. The H1 level potential of the node ND1 turns the transistor M13 off, causing the node ND1 to float. Since the transistor M14 is off and the transistor M15 is on, the node ND2 is set to the L level. The transistor M12 turns off, and the transistor M11 turns on, causing the drain current Id11 to flow. Because the transistor M11 has accumulated charge on its back gate during the period T11, the drain current Id11 can be rapidly increased in response to a change in the potential of the node ND1. In the period T12, the potential of the floating node ND1 can be changed by the bootstrap effect of the capacitor C11, which is caused by a change in the potential of the wiring OL. Therefore, the potential of the wiring OL can be more reliably set to the H2 level.

[0066] The period T13 shown in FIG. 2B is a period in which the wiring NL1 is set to the H1 level and the wiring NL2 is set to the L level. This is a period following the period T12 in which a timing signal is applied to the wiring NL1. During the period T13, the wiring BGL connected to the back gate of the transistor M11 is switched from the H2 level to the L level. Therefore, the threshold voltage Vt11 can be made higher than in the periods T11 and T12. By increasing the threshold voltage Vt11, the drain current Id11 can be made smaller. The potential of the node ND1 does not change, and the wiring OL can be kept at the H2 level. In other words, the amplitude voltage of the timing signal for the wiring NL1, based on the H1 level minus the L level, can be level-shifted to an amplitude voltage based on the H2 level minus the L level in the signal output to the wiring OL. After the period T13, the state returns to the state immediately before the period T11. During the subsequent periods, the threshold voltage Vt11 remains the same as during the period T13, and the drain current Id11 can be maintained at a small value.

[0067] As a result, one embodiment of the present invention can provide a highly reliable driver circuit or a semiconductor device including the driver circuit. Another embodiment of the present invention can provide a driver circuit with high operational stability or a semiconductor device including the driver circuit. Another embodiment of the present invention can provide a driver circuit with increased operating speed or a semiconductor device including the driver circuit. Another embodiment of the present invention can provide a driver circuit with a reduced occupation area or a semiconductor device including the driver circuit. Another embodiment of the present invention can provide a driver circuit with reduced power consumption or a semiconductor device including the driver circuit. Another embodiment of the present invention can provide a driver circuit with improved performance or a semiconductor device including the driver circuit. Another embodiment of the present invention can provide a novel driver circuit or a semiconductor device including the driver circuit.

[0068] 3A is a diagram showing a register circuit 120 that provides a timing signal in the configuration of the driver circuit 100 having the level shift circuit 110 shown in FIG. 1A. The register circuit 120 has a function of supplying a timing signal and its inverted signal to wirings NL1 and NL2 of the level shift circuit 110 based on a signal, such as a start pulse or a reset signal, input to the register circuit 120 via wirings IL1 and IL2. The start pulse or reset signal input to the register circuit 120 can be a shift signal (also referred to as an output signal or a second output signal) of the previous row or the next row. The wirings NL1 and NL2 of the level shift circuit 110 are wirings connected to the register circuit 120.

[0069] 3B is a diagram showing a register circuit 120 that provides a timing signal in the configuration of the drive circuit 100 having the level shift circuit 110 shown in FIG. 3B shows the wirings NL1 and NL2 of the level shift circuit 110, which are connected to the register circuit 120.

[0070] 3C is a diagram showing a specific circuit configuration of the register circuit 120 shown in FIG. 3B. The register circuit 120 shown in FIG. 3C includes transistors M21 to M27 and a capacitor C21. The register circuit 120 is connected to wirings IL1, IL2, NL1, NL2, and SOL, as well as wiring CKL, power supply lines VLD2, and VLS1. The transistors M21 to M27 and capacitor C21, as well as wirings IL1, IL2, CKL, power supply lines VLD2, and VLS1 included in the register circuit 120, are connected as shown in FIG. 3C. The wiring CKL is a wiring to which a clock signal is supplied. By configuring the register circuit 120 shown in FIG. 3C, a timing signal supplied to a level shift circuit can be obtained in each row.

[0071] 3C, the register circuit 120 and the level shift circuit 110 can share the power supply lines VLD2 and VLS1. By adopting this configuration, the number of power supply lines connected to the register circuit 120 and the level shift circuit 110 can be reduced.

[0072] 3C, the power supply line connected to the transistor M14 of the level shift circuit 110 is illustrated as a power supply line VLD1. The potential of the power supply line VLD1 is higher than the potential of the power supply line VLD2. This allows the transistor M14 to charge the node ND2 at higher speed, and the operation of switching the wiring OL to the L level can be performed at higher speed.

[0073] The drive circuit 100 described above, whether illustrated or not, can at least solve the problem of providing a novel drive circuit by its circuit configuration alone.

[0074] One embodiment of the present invention also includes a structure in which at least one of a gate, a source, and a drain of one or more transistors is not connected to anything or is connected to any wiring. Another embodiment of the present invention also includes a structure in which nothing is input to one or more wirings or a signal or potential is input to one or more wirings.

[0075] <Structure Example of Semiconductor Device> Next, a semiconductor device according to one embodiment of the present invention will be described with reference to the drawings. At least a part of the driver circuit according to one embodiment of the present invention can be used for the semiconductor device. In addition, at least a part of the semiconductor device can be used for a display device or the like.

[0076] FIG. 4A is a block diagram illustrating a structural example of a semiconductor device of one embodiment of the present invention.

[0077] 4A , the semiconductor device 160 includes a pixel portion 162, a gate driver portion 163, and a source driver portion 164. The pixel portion 162 includes a plurality of pixels 161 arranged in a matrix of m rows and n columns (m and n are each an integer of 2 or greater), for example.

[0078] The pixel 161 may include a functional element. Here, for example, if the functional element is a display element such as a liquid crystal element or a light-emitting element, the semiconductor device 160 functions as a display device (sometimes referred to as an output device). Furthermore, for example, if the functional element is a light-receiving element, the semiconductor device 160 functions as an imaging device (sometimes referred to as an input device). Note that the pixel 161 may include both a display element and a light-receiving element. In this case, the semiconductor device 160 functions as both a display device and an imaging device (sometimes referred to as an input / output device).

[0079] 4A, the pixel 161 arranged in the first row and first column is indicated as pixel 161[1,1], the pixel 161 arranged in the first row and nth column is indicated as pixel 161[1,n], the pixel 161 arranged in the mth row and first column is indicated as pixel 161[m,1], and the pixel 161 arranged in the mth row and nth column is indicated as pixel 161[m,n]. Note that the pixel 161 arranged in the uth row and vth column (u is an integer of 1 to m, and v is an integer of 1 to n) may be indicated as pixel 161[u,v]. Note that when describing matters common to each of a plurality of pixels 161, they may be described without the use of identifying symbols such as "[u,v]".

[0080] The semiconductor device 160 also has m gate lines 165 arranged in parallel, and the potentials of which are controlled by a circuit included in a gate driver unit 163. The potential of one gate line 165 is applied to n pixels 161 arranged in the row direction. Note that a configuration may be adopted in which one gate line 165 includes multiple wirings in accordance with the configuration of the pixel 161.

[0081] The semiconductor device 160 also has n source lines 166 that are arranged in parallel and whose potentials are controlled by a circuit included in a source driver unit 164. The potential of one source line 166 is applied to m pixels 161 arranged in the column direction. Note that a configuration may be adopted in which one source line 166 includes multiple wirings in accordance with the configuration of the pixel 161.

[0082] The circuit included in the gate driver unit 163 functions as, for example, a scanning line driving circuit (sometimes called a gate line driving circuit, gate driver, scan driver, or row driver).

[0083] The circuit included in the source driver unit 164 functions as, for example, a signal line driver circuit (sometimes called a source line driver circuit, a source driver, a data driver, or a column driver).

[0084] FIG. 4B is a block diagram illustrating a modified example of the semiconductor device 160. The semiconductor device 160 shown in FIG. 4B differs from the semiconductor device 160 shown in FIG. 4A in that it includes two gate driver units 163 arranged to face each other across the pixel unit 162. In the configuration shown in FIG. 4B, the potentials of m gate lines 165 are controlled by the two gate driver units 163. With this configuration, for example, the substantial wiring load (parasitic capacitance and parasitic resistance) can be reduced to one-fourth of the wiring load in the semiconductor device 160 shown in FIG. 4A. Therefore, for example, when the driver circuit is used in a display device or the like, it is possible to achieve higher speed, higher definition, higher resolution, a narrower frame, a larger screen, and the like.

[0085] Note that in one embodiment of the present invention, various transistors can be used as the transistors included in the semiconductor device 160. For example, a transistor including silicon in a semiconductor layer in which a channel is formed (a Si transistor), an OS transistor, or both a Si transistor and an OS transistor may be used.

[0086] OS transistors can be easily integrated because they can be freely arranged on, for example, a silicon substrate on which Si transistors are provided. Furthermore, OS transistors can be manufactured at low cost because they can be manufactured using the same manufacturing equipment as Si transistors.

[0087] Therefore, in the semiconductor device 160, for example, Si transistors including part of a silicon substrate may be used as transistors forming the source driver portion 164, and OS transistors provided over a silicon substrate may be used as transistors forming each of the gate driver portion 163 and the pixel portion 162. Note that OS transistors may be used as at least some of the transistors forming the source driver portion 164, or Si transistors may be used as at least some of the transistors forming each of the gate driver portion 163 and the pixel portion 162.

[0088] Furthermore, various circuits (which may include an arithmetic circuit, a memory circuit, and the like) that control the operation of the semiconductor device 160 may be provided using Si transistors that include part of the silicon substrate. Thus, one embodiment of the present invention can have a structure in which, for example, an OS transistor is provided over a silicon substrate on which a Si transistor is provided, and a display element or a light-receiving element is provided over a layer on which the OS transistor is provided.

[0089] In one embodiment of the present invention, at least a part of the driver circuit 100 can be used for the gate driver portion 163 .

[0090] 5A is a circuit diagram illustrating an example in which a plurality of drive circuits 100 are connected to each other in the gate driver section 163. FIG. 5B is a circuit block corresponding to the drive circuit 100.

[0091] The gate driver unit 163 has at least m driver circuits 100 (driver circuits 100[1] to 100[m]) to drive the pixels 161 arranged in a matrix of m rows and n columns, row by row. In FIG. 5A , the driver circuit 100[u-1] in the (u-1)th row, the driver circuit 100[u] in the u-th row, and the driver circuit 100[u+1] in the (u+1)th row are illustrated as representative circuit blocks. Note that when describing matters common to each of the m driver circuits 100, they may be described without the identification symbol such as "[u]."

[0092] The wiring IL1 of the register circuit 120 included in the drive circuit 100 is connected to the wiring SOL of the register circuit 120 included in the drive circuit 100 in the previous row. For example, the wiring IL1 (wiring IL1[u]) of the register circuit 120 (register circuit 120[u]) included in the drive circuit 100 in the u-th row (drive circuit 100[u]) is connected to the wiring SOL (wiring SOL[u-1]) of the register circuit 120 (register circuit 120[u-1]) included in the drive circuit 100 in the u-1th row (drive circuit 100[u-1]). For example, the wiring IL1 (wiring IL1[u+1]) of the register circuit 120 (register circuit 120[u+1]) included in the driver circuit 100 (driver circuit 100[u+1]) in the u+1th row is connected to the wiring SOL (wiring SOL[u]) of the register circuit 120 (register circuit 120[u]) included in the driver circuit 100 (driver circuit 100[u]) in the uth row. Note that a gate start pulse is supplied to the wiring IL1[1] of the register circuit 120 included in the driver circuit 100 in the first row.

[0093] The wiring IL2 of the register circuit 120 included in the drive circuit 100 is connected to the wiring SOL of the register circuit 120 included in the drive circuit 100 in the next row. For example, the wiring IL2 (wiring IL1[u-1]) of the register circuit 120 (register circuit 120[u-1]) included in the drive circuit 100 in the (u-1)th row (drive circuit 100[u-1]) is connected to the wiring SOL (wiring SOL[u]) of the register circuit 120 (register circuit 120[u]) included in the drive circuit 100 in the u-th row (drive circuit 100[u]). Furthermore, for example, the wiring IL2 (wiring IL2[u]) of the register circuit 120 (register circuit 120[u]) included in the driver circuit 100 (drive circuit 100[u]) in the u-th row is connected to the wiring SOL (wiring SOL[u+1]) of the register circuit 120 (register circuit 120[u+1]) included in the driver circuit 100 (drive circuit 100[u+1]) in the u+1-th row. Note that the wiring IL2 of the register circuit 120 included in the driver circuit 100 in the last row (m-th row) is connected to the wiring SOL of the register circuit 120 included in the driver circuit 100 in a dummy stage, for example, the m+1-th row.

[0094] The wiring CKL of the register circuit 120 included in the driver circuit 100 is connected to the wiring CKL1 or the wiring CKL2. For example, the wiring CKL[u] of the register circuit 120 (register circuit 120[u]) included in the driver circuit 100 in the u-th row (driver circuit 100[u]) is connected to the wiring CKL1. Also, for example, the wiring CKL[u-1] of the register circuit 120 (register circuit 120[u-1]) included in the driver circuit 100 in the u-1th row (driver circuit 100[u-1]) and the wiring CKL[u+1] of the register circuit 120 (register circuit 120[u+1]) included in the driver circuit 100 in the u+1th row (driver circuit 100[u+1]) are connected to the wiring CKL2. Clock signals with different phases are supplied to the wiring CKL1 and the wiring CKL2.

[0095] The register circuit 120 included in the driver circuit 100 is connected to the level shift circuit 110 included in the driver circuit 100 in each row via wiring NL1 and wiring NL2. As described above, a timing signal based on a signal input to wiring IL1, a signal input to wiring IL2, and a clock signal is output to wiring NL1 and wiring NL2. Furthermore, the register circuit 120 included in the driver circuit 100 in each row is connected to the register circuit 120 in another row included in the driver circuit 100 via wiring INL1, wiring IN2, and wiring SOL. As described above, a shift signal (also referred to as an output signal or a second output signal) based on a signal input to wiring IL1, a signal input to wiring IL2, and a clock signal is output to wiring SOL.

[0096] The wiring BGL of the level shift circuit 110 included in the driver circuit 100 is connected to the wiring OL of the level shift circuit 110 included in the driver circuit 100 in the previous row. For example, the wiring BGL (wiring BGL[u]) of the level shift circuit 110 (level shift circuit 110[u]) included in the driver circuit 100 in the u-th row (driver circuit 100[u]) is connected to the wiring OL (wiring OL[u-1]) of the level shift circuit 110 (level shift circuit 110[u-1]) included in the driver circuit 100 in the u-1-th row (driver circuit 100[u-1]). For example, the wiring BGL (wiring BGL[u+1]) of the level shift circuit 110 (level shift circuit 110[u+1]) included in the driver circuit 100 (driver circuit 100[u+1]) in the u+1th row is connected to the wiring OL (wiring OL[u]) of the level shift circuit 110 (level shift circuit 110[u]) included in the driver circuit 100 (driver circuit 100[u]) in the uth row. Note that the wiring BGL of the level shift circuit 110 included in the driver circuit 100 in the first row is connected to the wiring OL of the level shift circuit 110 included in the driver circuit 100 in a dummy stage that does not contribute to display.

[0097] With this configuration, the gate driver unit 163 can supply signals obtained by level-shifting the timing signals to each of the m wirings OL (wirings OL[1] to OL[m]) in order.

[0098] 6 is a diagram in which the circuit configuration shown in Fig. 3C is applied to the configuration in Fig. 5 as the register circuit 120 and the level shift circuit 110 included in the driver circuit 100. Fig. 6 is a circuit diagram showing the connection relationship of transistors M21 to M27 and transistors M11 to M15 included in the driver circuit 100[u] in the u-th row and the driver circuit 100[u+1] in the u+1-th row shown in Fig. 5.

[0099] 7 is a timing chart showing an example of operation when the circuit configuration shown in FIG. 3C is applied to the register circuit 120 and the level shift circuit 110 of the driver circuit 100 in the configuration of FIG.

[0100] The timing chart shown in Fig. 7 shows the waveforms of clock signals with different phases supplied to the wiring CKL1 and the wiring CKL2. The timing chart shown in Fig. 7 also shows the waveform of a shifted signal with an amplitude voltage H1-L output to the wiring SOL[u-1], i.e., the wiring IL1[u]. The timing chart shown in Fig. 7 also shows the waveform of a shifted signal with an amplitude voltage H1-L output to the wiring SOL[u]. The timing chart shown in Fig. 7 also shows the waveform of a shifted signal with an amplitude voltage H1-L output to the wiring SOL[u+1], i.e., the wiring IL2[u].

[0101] The timing chart shown in Fig. 7 shows the waveform of a timing signal of a level-shifted amplitude voltage H2-L output to a wiring OL[u-1]. The timing chart shown in Fig. 7 also shows the waveform of a timing signal of a level-shifted amplitude voltage H2-L output to a wiring OL[u]. The timing chart shown in Fig. 7 also shows the waveform of a timing signal of a level-shifted amplitude voltage H2-L output to a wiring OL[u+1].

[0102] The timing chart in Fig. 7 shows the waveform of a timing signal of an amplitude voltage H2-L obtained from the wiring OL[u-2] in the previous row and output to the wiring BGL[u-1]. The timing chart in Fig. 7 also shows the waveform of a timing signal of an amplitude voltage H2-L obtained from the wiring OL[u-1] in the previous row and output to the wiring BGL[u]. The timing chart in Fig. 7 also shows the waveform of a timing signal of an amplitude voltage H2-L obtained from the wiring OL[u-1] in the previous row and output to the wiring BGL[u+1].

[0103] As described above, in the driver circuit of one embodiment of the present invention, the wiring BGL included in the level-shift circuit 110 on the u-th row (u is an integer of 2 or more) is connected to the wiring OL included in the level-shift circuit 110 on the (u-1)-th row. Therefore, in the timing chart of FIG. 7 , the level-shifted timing signal supplied to the wiring OL in the periods T12 to T15 can be set to the H level when the timing signal supplied to the wiring BGL in the periods T11 to T14 has a potential of H2. As a result, in the level-shift circuit 110 included in the driver circuit 100 on each row, the potential of the signal supplied to the wiring (wiring BGL) connected to the backgate changes before the potential of the timing signal supplied to the gate (node ​​ND1) changes, and thus the delay of the level-shifted timing signal to be output can be reduced.

[0104] [Configuration Example of Pixel Unit] FIG. 8 is a circuit diagram illustrating a pixel 161A that uses a light-emitting element LD as a functional element, as an example of the pixel 161 included in the semiconductor device 160.

[0105] FIG. 8 shows, as representative examples, a pixel 161A[u,v] in the u-th row and the v-th column, and a driving circuit 100[u] in the u-th row.

[0106] The pixel 161A[u,v] includes a transistor M31, a transistor M32, a transistor M33, and a light-emitting element LD. One of the source or drain of the transistor M33 is connected to one terminal of the light-emitting element LD. The other of the source or drain of the transistor M33 is connected to one of the source or drain of the transistor M32. The gate of the transistor M33 is connected to a wiring GLb[u] corresponding to the gate line 165. The other terminal of the light-emitting element LD is connected to a wiring CATH. The other of the source or drain of the transistor M32 is connected to a wiring ANO. The gate of the transistor M32 is connected to a wiring that receives a potential corresponding to the potential of one of the source or drain of the transistor M31. The other of the source or drain of the transistor M31 is connected to a wiring SL[v] corresponding to the source line 166. The gate of the transistor M31 is connected to a wiring GLa[u] corresponding to the gate line 165.

[0107] The wiring OL[u] is connected to, for example, the wiring GLa[u]. Note that although not shown, the wiring OL[u] may be connected to, for example, the wiring GLb[u].

[0108] The light emitting element LD emits light with a light emitting intensity according to the amount of current flowing through the light emitting element LD. As the light emitting element LD, for example, an organic EL element can be used.

[0109] The transistor M32 can change its drain current depending on the potential applied to its gate. Therefore, in the pixel 161A[u, v], the transistor M32 has a function of controlling the amount of current flowing through the light-emitting element LD. That is, the transistor M32 has a function of controlling the light-emitting intensity of the light-emitting element LD. In this specification, a transistor having a function similar to that of the transistor M32 may be referred to as a driving transistor.

[0110] The transistor M31 functions as a switch that controls whether or not a data potential is written to the pixel 161A[u, v]. The transistor M33 functions as a switch that controls whether or not a current flows to the light-emitting element LD.

[0111] Although not shown, one of the source or drain of transistor M32 may be connected to one terminal of the light-emitting element LD, the other of the source or drain of transistor M32 may be connected to one of the source or drain of transistor M33, and the other of the source or drain of transistor M33 may be connected to wiring ANO.

[0112] Although not shown, the pixel 161A[u,v] may further include a transistor, which may provide a function of correcting the threshold voltage of the driving transistor, for example.

[0113] In one embodiment of the present invention, various transistors can be used as transistors included in the pixel 161A[u,v]. For example, OS transistors can be used.

[0114] An OS transistor has an extremely low off-state current. Therefore, for example, an OS transistor is preferably used as a transistor that functions as a switch in the pixel 161A. This can reduce the frequency of data rewriting and power consumption, for example.

[0115] Note that one embodiment of the present invention is not limited to the configuration examples, operation examples, etc. described in this embodiment. At least part of the configuration examples, operation examples, and corresponding drawings described in this embodiment can be appropriately combined with other configuration examples, other operation examples, other drawings, other embodiments, etc. described in this specification, etc.

[0116] In this embodiment, a transistor according to one embodiment of the present invention will be described. At least part of the transistor according to one embodiment of the present invention can be applied to the driver circuit, the semiconductor device, or the like described in Embodiment 1.

[0117] <Transistor Structural Example 1> FIG. 9A is a plan view of a transistor 200A that can be used for a semiconductor device according to one embodiment of the present invention. FIG. 9B is a cross-sectional view taken along the line A1-A2 indicated by a dashed dotted line in FIG. 9A . FIG. 9C is a cross-sectional view taken along the line A3-A4 indicated by a dashed dotted line in FIG. 9A . Note that some elements are omitted in the plan view of FIG. 9A for clarity. Some elements may also be omitted in other plan views.

[0118] The transistor 200A has an insulating layer 202 over a substrate 201 and a semiconductor layer 203 over the insulating layer 202. The transistor 200A also has an insulating layer 204 over the insulating layer 202 and the semiconductor layer 203. The transistor 200A also has a conductive layer 205 over the insulating layer 204. The semiconductor layer 203 and the conductive layer 205 have regions that overlap with each other with the insulating layer 204 interposed therebetween.

[0119] The semiconductor layer 203 has a region 203a that functions as one of a source region and a drain region, a channel formation region 203b, and a region 203c that functions as the other of the source region and the drain region. In the semiconductor layer 203, a region that overlaps with the conductive layer 205 functions as the channel formation region 203b. Therefore, the conductive layer 205 functions as the gate electrode of the transistor 200A. The insulating layer 204 functions as a gate insulating layer of the transistor 200A.

[0120] The length of the channel formation region 203b in the X direction is the channel length L of the transistor 200A (see FIG. 9B), and the length of the channel formation region 203b in the Y direction is the channel width W of the transistor 200A (see FIG. 9C).

[0121] An insulating layer 206 is provided over the insulating layer 204 and the conductive layer 205. An opening 207a is provided in the insulating layer 204 and the insulating layer 206 in a region overlapping with a region 203a of the semiconductor layer 203. An opening 207b is provided in the insulating layer 204 and the insulating layer 206 in a region overlapping with a region 203c of the semiconductor layer 203.

[0122] Furthermore, a conductive layer 208a is provided over the insulating layer 206 and the opening 207a, and a conductive layer 208b is provided over the insulating layer 206 and the opening 207b. The conductive layer 208a is connected to the region 203a of the semiconductor layer 203 at the bottom of the opening 207a. The conductive layer 208b is connected to the region 203c of the semiconductor layer 203 at the bottom of the opening 207b. Thus, the conductive layer 208a functions as one of the source and drain electrodes of the transistor 200A, and the conductive layer 208b functions as the other of the source and drain electrodes of the transistor 200A.

[0123] In addition, an insulating layer 209 is provided over the insulating layer 206 and the conductive layer 208 (the conductive layer 208a and the conductive layer 208b).

[0124] 10A is a plan view of a transistor 200B that can be used for a semiconductor device of one embodiment of the present invention. The transistor 200B is a variation of the transistor 200A. To avoid repetition of description, differences between the transistor 200B and the transistor 200A will be mainly described.

[0125] Fig. 10B is a cross-sectional view taken along the line A1-A2 indicated by the dashed dotted line in Fig. 10A. Fig. 10C is a cross-sectional view taken along the line A3-A4 indicated by the dashed dotted line in Fig. 10A.

[0126] The transistor 200B differs from the transistor 200A in that a conductive layer 219 is provided between the substrate 201 and the insulating layer 202. The conductive layer 219 overlaps with the channel formation region 203b through the insulating layer 202. Thus, the insulating layer 202 functions as a back-gate insulating film of the transistor 200B, and the conductive layer 219 functions as a back-gate electrode of the transistor 200B. The conductive layer 219 may extend beyond the edge of the channel formation region 203b. That is, the conductive layer 219 may cover the channel formation region 203b. Although the insulating layer 202 in the region overlapping with the conductive layer 219 is illustrated as having a different thickness from that region in FIGS. 10B and 10C , the thickness may be uniform.

[0127] In a transistor having a back gate, the gate and the back gate of the transistor are arranged to sandwich a channel formation region of the semiconductor layer. The back gate can function in the same manner as the gate. When the gate is used to control the on / off state of the transistor, the potential of the back gate can be the same as that of the gate. Alternatively, the back gate can be set to any potential.

[0128] For example, when a transistor is turned on, supplying a potential that turns the transistor on to both the gate and the back gate can increase the on-state current compared to supplying a potential to only one of them. For example, by connecting the gate and the back gate, it is possible to keep the gate and the back gate at the same potential. In addition, by controlling the back gate potential independently of the gate, the threshold voltage of the transistor can be adjusted.

[0129] A fixed potential such as a ground potential may be supplied to the back gate. Since the gate and the back gate are formed of a conductive layer or the like, sandwiching the channel formation region of the semiconductor layer between the gate and the back gate makes it difficult for an electric field generated outside the transistor to act on the channel formation region (also referred to as an "electric field shielding effect"). Therefore, providing a back gate in a transistor stabilizes the operation of the transistor. Furthermore, providing a back gate in a transistor reduces variations in characteristics among multiple transistors. Providing a back gate in a transistor can improve the reliability of the transistor. Therefore, the reliability of a semiconductor device including the transistor can be improved. Note that the electric field shielding effect can be obtained even when one or both of the gate and the back gate are electrically floating (also referred to as a "floating state"), but the effect can be enhanced by supplying a potential to the gate and the back gate.

[0130] <Constituent Materials of Transistor> Next, constituent materials that can be used for the transistor 200 (transistor 200A and transistor 200B) will be described.

[0131] [Substrate] When a transistor is provided on a substrate, the material used for the substrate is not particularly limited. The substrate can be determined depending on the purpose, taking into consideration the presence or absence of light transparency and heat resistance sufficient to withstand heat treatment. For example, an insulating substrate, a semiconductor substrate, or a conductive substrate may be used. Examples of insulating substrates that can be used include glass substrates such as barium borosilicate glass and aluminoborosilicate glass, ceramic substrates, quartz substrates, sapphire substrates, and stabilized zirconia substrates (such as yttria-stabilized zirconia substrates). Furthermore, semiconductor substrates, flexible substrates, resin substrates, and the like may also be used.

[0132] Examples of semiconductor substrates include semiconductor substrates made of silicon or germanium, and compound semiconductor substrates made of silicon carbide, silicon germanium, gallium arsenide, indium phosphide, zinc oxide, or gallium oxide. Furthermore, semiconductor substrates having an insulator region within the semiconductor substrate, such as an SOI (Silicon On Insulator) substrate, are also available. Furthermore, the semiconductor substrate may be a single-crystal semiconductor or a polycrystalline semiconductor.

[0133] Conductive substrates include graphite substrates, metal substrates, alloy substrates, conductive resin substrates, etc. Other examples include substrates containing metal nitrides and substrates containing metal oxides. Furthermore, there are also substrates in which a conductive layer or a semiconductor layer is provided on an insulator substrate, substrates in which a conductive layer or an insulating layer is provided on a semiconductor substrate, and substrates in which a semiconductor layer or an insulating layer is provided on a conductive substrate.

[0134] Examples of materials that can be used for flexible substrates or resin substrates include polyesters such as polyethylene terephthalate (PET) and polyethylene naphthalate (PEN), polyacrylonitrile, acrylic resin, polyimide, polymethyl methacrylate, polycarbonate (PC), polyethersulfone (PES), polyamide (nylon, aramid, etc.), polysiloxane, cycloolefin resin, polystyrene, polyamideimide, polyurethane, polyvinyl chloride, polyvinylidene chloride, polypropylene, polytetrafluoroethylene (PTFE), ABS resin, and cellulose nanofiber.

[0135] By using the above materials for the substrate, a lightweight semiconductor device can be provided. Furthermore, by using the above materials for the substrate, a semiconductor device that is resistant to impact can be provided. Furthermore, by using the above materials for the substrate, a semiconductor device that is less likely to break can be provided. Furthermore, a substrate having elements provided on it may be used. The elements provided on the substrate include a capacitance element, a resistance element, a switch element, a light-emitting element, a memory element, and the like.

[0136] [Insulating Layer] The insulating layers (insulating layer 202, insulating layer 204, insulating layer 206, insulating layer 209, etc.) each include an inorganic insulating film. Examples of inorganic insulating films include an oxide insulating film, a nitride insulating film, an oxynitride insulating film, and a nitride oxide insulating film. Examples of oxide insulating films include a silicon oxide film, an aluminum oxide film, a magnesium oxide film, a gallium oxide film, a germanium oxide film, an yttrium oxide film, a zirconium oxide film, a lanthanum oxide film, a neodymium oxide film, a hafnium oxide film, a tantalum oxide film, a cerium oxide film, a gallium zinc oxide film, and a hafnium aluminate film. Examples of nitride insulating films include a silicon nitride film and an aluminum nitride film. Examples of oxynitride insulating films include a silicon oxynitride film, an aluminum oxynitride film, a gallium oxynitride film, an yttrium oxynitride film, and a hafnium oxynitride film. Examples of nitride oxide insulating films include a silicon nitride oxide film and an aluminum nitride oxide film. In addition, an organic insulating film may be used for the insulating layers of the semiconductor device.

[0137] In this specification and the like, an oxynitride refers to a material whose composition contains more oxygen than nitrogen, and a nitride oxide refers to a material whose composition contains more nitrogen than oxygen. For example, silicon oxynitride refers to a material whose composition contains more oxygen than nitrogen, and silicon nitride oxide refers to a material whose composition contains more nitrogen than oxygen.

[0138] For example, as transistors become more miniaturized and highly integrated, problems such as leakage current may occur due to thinner gate insulating layers. Using high-k materials for insulating layers that function as gate insulating layers, such as insulating layer 204 and insulating layer 202, enables lower voltages during transistor operation while maintaining the physical film thickness. It also enables thinner equivalent oxide thickness (EOT) for the gate insulating layer. On the other hand, using a material with a low dielectric constant for an insulating layer that functions as an interlayer film can reduce the parasitic capacitance that occurs between wiring. Therefore, materials can be selected depending on the function of the insulating layer. Materials with a low dielectric constant also have high dielectric strength.

[0139] Examples of high-dielectric-constant (high-k) materials include aluminum oxide, gallium oxide, hafnium oxide, tantalum oxide, zirconium oxide, hafnium zirconium oxide, oxides containing aluminum and hafnium, oxynitrides containing aluminum and hafnium, oxides containing silicon and hafnium, oxynitrides containing silicon and hafnium, and nitrides containing silicon and hafnium.

[0140] Examples of materials with a low relative dielectric constant include inorganic insulating materials such as silicon oxide, silicon oxynitride, and silicon nitride oxide, and resins such as polyester, polyolefin, polyamide (nylon, aramid, etc.), polyimide, polycarbonate, and acrylic resin. Other examples of inorganic insulating materials with a low relative dielectric constant include silicon oxide doped with fluorine, silicon oxide doped with carbon, and silicon oxide doped with carbon and nitrogen. Another example is silicon oxide having vacancies. These silicon oxides may contain nitrogen.

[0141] [Conductive Layer] For the conductive layers (conductive layer 205, conductive layer 208, conductive layer 219, etc.) used in the transistor 200, it is preferable to use a metal element selected from aluminum, chromium, copper, silver, gold, platinum, zinc, tantalum, nickel, titanium, iron, cobalt, molybdenum, tungsten, hafnium, vanadium, niobium, manganese, magnesium, zirconium, beryllium, indium, ruthenium, iridium, strontium, lanthanum, etc., an alloy containing the above metal element, or an alloy combining the above metal elements. As the alloy containing the above metal element, a nitride of the alloy or an oxide of the alloy may be used. For example, it is preferable to use tantalum nitride, titanium nitride, tungsten nitride, a nitride containing titanium and aluminum, a nitride containing tantalum and aluminum, ruthenium oxide, ruthenium nitride, an oxide containing strontium and ruthenium, an oxide containing lanthanum and nickel, etc. Furthermore, a semiconductor with high electrical conductivity, typified by polycrystalline silicon containing an impurity element such as phosphorus, or a silicide such as nickel silicide may also be used.

[0142] Nitrogen-containing conductive materials, such as nitrides containing tantalum, nitrides containing titanium, nitrides containing molybdenum, nitrides containing tungsten, nitrides containing ruthenium, nitrides containing tantalum and aluminum, or nitrides containing titanium and aluminum; oxygen-containing conductive materials, such as ruthenium oxide, oxides containing strontium and ruthenium, or oxides containing lanthanum and nickel; and materials containing metal elements, such as titanium, tantalum, or ruthenium, are preferred because they are conductive materials that are resistant to oxidation, have the function of suppressing oxygen diffusion, or maintain conductivity even after absorbing oxygen. Examples of oxygen-containing conductive materials include indium oxide containing tungsten oxide, indium oxide containing titanium oxide, indium tin oxide (also referred to as ITO), indium tin oxide containing titanium oxide, indium tin oxide with added silicon (also referred to as ITSO), indium zinc oxide (also referred to as IZO (registered trademark)), and indium zinc oxide containing tungsten oxide. In this specification and the like, a conductive layer formed using a conductive material containing oxygen may be referred to as an oxide conductive layer.

[0143] Conductive materials containing tungsten, copper or aluminum as a main component are preferred because of their high conductivity.

[0144] Furthermore, a plurality of conductive layers formed from the above materials may be stacked. For example, a stacked structure may be formed by combining the above-described material containing a metal element and a conductive material containing oxygen. A stacked structure may be formed by combining the above-described material containing a metal element and a conductive material containing nitrogen. A stacked structure may be formed by combining the above-described material containing a metal element, a conductive material containing oxygen, and a conductive material containing nitrogen.

[0145] For example, when an oxide semiconductor, which is a type of metal oxide, is used for the semiconductor layer 203 of the transistor 200A or 200B, a conductive layer functioning as a gate electrode, such as the conductive layer 205 or the conductive layer 219, may have a stacked structure in which a material containing the above-described metal element and a conductive material containing oxygen are combined. In this case, the conductive material containing oxygen may be provided on the semiconductor layer 203 side. By providing the conductive material containing oxygen on the semiconductor layer 203 side, oxygen desorbed from the conductive material is easily supplied to a channel formation region of the semiconductor layer 203.

[0146] When an oxide semiconductor, which is a type of metal oxide, is used for the semiconductor layer 203, the conductive layers 208a and 208b are conductive layers in contact with the semiconductor layer 203. Therefore, the conductive layers 208a and 208b may be made of a conductive material that is resistant to oxidation, a conductive material that maintains low electrical resistance even when oxidized, a metal oxide having conductivity (also referred to as an oxide conductor), or a conductive material that has a function of suppressing oxygen diffusion. Examples of such conductive materials include a conductive material containing nitrogen and a conductive material containing oxygen. This can suppress a decrease in the conductivity of the conductive layers 208a and 208b.

[0147] By using a conductive material containing oxygen for the conductive layers 208a and 208b, the conductive layers 208a and 208b can maintain their conductivity even when they absorb oxygen. For example, even when an insulating layer containing excess oxygen is used as an insulating layer in contact with the conductive layers 208a and 208b, the conductive layers 208a and 208b can maintain their conductivity, which is preferable. For example, ITO, ITSO, IZO (registered trademark), or the like can be used for the conductive layers 208a and 208b.

[0148] [Semiconductor Layer] As the semiconductor layer (semiconductor layer 203), a single crystal semiconductor, a polycrystalline semiconductor, a microcrystalline semiconductor, an amorphous semiconductor, or the like can be used alone or in combination. Examples of semiconductor materials that can be used include silicon and germanium. Compound semiconductors such as silicon germanium, silicon carbide, gallium arsenide, and nitride semiconductors can also be used. Examples of compound semiconductors that can be used include organic materials having semiconductor properties or metal oxides (also referred to as oxide semiconductors) having semiconductor properties. Note that these semiconductor materials may contain impurities as dopants.

[0149] The semiconductor layer may be made of a semiconductor made of a single element or a compound semiconductor. Examples of semiconductors made of a single element include silicon and germanium. Examples of compound semiconductors include gallium arsenide and silicon germanium. Other examples of compound semiconductors include organic semiconductors and nitride semiconductors. Note that oxide semiconductors are also a type of compound semiconductor. Note that these semiconductor materials may contain impurities as dopants.

[0150] When silicon is used for the semiconductor layer, examples of silicon that can be used for the semiconductor layer include single crystal silicon, polycrystalline silicon, microcrystalline silicon, and amorphous silicon. Examples of polycrystalline silicon include low temperature polysilicon (LTPS).

[0151] For example, by using silicon for the semiconductor layer 203 of the transistor 200A or 200B and adding phosphorus or arsenic as an N-type dopant to the regions 203a and 203c of the semiconductor layer 203, the transistor can function as an N-type transistor. Also, by adding boron as a P-type dopant to the regions 203a and 203c of the semiconductor layer 203, the transistor can function as a P-type transistor. When the regions 203a and 203c of the semiconductor layer 203 contain both an N-type dopant and a P-type dopant, the conductivity type with a higher dopant concentration is more likely to be realized.

[0152] A two-dimensional material that functions as a semiconductor may be used as the semiconductor layer of a transistor. Two-dimensional materials, also known as layered materials, are a general term for a group of materials with a layered crystal structure. A layered crystal structure is a structure in which layers formed by covalent or ionic bonds are stacked via bonds weaker than covalent or ionic bonds, such as van der Waals bonds. Layered materials have high electrical conductivity within a single layer, i.e., high two-dimensional electrical conductivity. By using a material that functions as a semiconductor and has high two-dimensional electrical conductivity for the semiconductor layer, a transistor with a large on-state current can be provided.

[0153] Examples of the layered material include graphene, silicene, and chalcogenides. Chalcogenides are compounds containing chalcogen (an element belonging to Group 16). Examples of chalcogenides include transition metal chalcogenides and Group 13 chalcogenides. Specific examples of transition metal chalcogenides that can be used as semiconductor layers of transistors include molybdenum sulfide (typically MoS ２ ), molybdenum selenide (typically MoSe ２ ), molybdenum telluride (typically MoTe ２ ), tungsten sulfide (typically WS ２ ), tungsten selenide (typically WSe ２ ), tungsten tellurium (typically WTe ２ ), hafnium sulfide (typically HfS ２ ), hafnium selenide (typically HfSe ２ ), zirconium sulfide (typically ZrS ２ ), zirconium selenide (typically ZrSe ２ ) etc.

[0154] When an oxide semiconductor, which is a type of metal oxide, is used for the semiconductor layer, the band gap of the metal oxide is preferably 2.0 eV or more, more preferably 2.5 eV or more. By using a metal oxide with a wide band gap for the semiconductor layer, the off-state current of the transistor can be significantly reduced. Since an OS transistor has a low off-state current, the power consumption of the semiconductor device can be reduced. Note that the oxide semiconductor will be described in detail in Embodiment 3 below.

[0155] The structure described in this embodiment mode can be used in appropriate combination with structures described in other embodiments.

[0156] Embodiment 3 In this embodiment, an oxide semiconductor layer and a crystalline indium oxide film which can be used as the semiconductor layer 203 described in Embodiment 2 will be described.

[0157] <Oxide Semiconductor Layer> The oxide semiconductor layer of one embodiment of the present invention preferably includes a crystalline metal oxide. Examples of the structure of the crystalline metal oxide include a c-axis aligned crystal (CAAC) structure, a polycrystalline (poly-crystal) structure, and a nanocrystalline (nc) structure. By using a crystalline metal oxide for the oxide semiconductor layer, the density of defect states in the oxide semiconductor layer can be reduced. Therefore, the reliability of a transistor including the oxide semiconductor layer of one embodiment of the present invention can be improved, and the reliability of a memory device including the transistor can be improved.

[0158] The oxide semiconductor layer of one embodiment of the present invention preferably includes a metal oxide having a CAAC structure. The CAAC structure is a crystal structure in which a plurality of microcrystals (typically, a plurality of microcrystals having a hexagonal crystal structure) have c-axis orientation and are connected without being oriented in the a-b plane. Furthermore, when a cross section of an oxide semiconductor layer having a CAAC structure is observed using a high-resolution transmission electron microscope (TEM) image, it can be confirmed that metal atoms are arranged in a layered manner in the crystal parts. Therefore, an oxide semiconductor layer having a CAAC structure can also be said to have a structure having layered crystal parts.

[0159] The crystallinity of the oxide semiconductor layer can be analyzed by, for example, X-ray diffraction (XRD), TEM, or electron diffraction (ED). Alternatively, a combination of these methods may be used for analysis.

[0160] Note that the crystallinity of the semiconductor material included in the oxide semiconductor layer is not particularly limited. For example, the oxide semiconductor layer may include one or more of an amorphous semiconductor (a semiconductor having an amorphous structure), a single-crystal semiconductor (a semiconductor having a single-crystal structure), or a semiconductor having crystallinity other than single crystal (a microcrystalline semiconductor, a polycrystalline semiconductor, or a semiconductor having a crystalline region in part). When the oxide semiconductor layer has crystallinity, deterioration of transistor characteristics can be suppressed in some cases.

[0161] Examples of metal oxides contained in the oxide semiconductor layer of one embodiment of the present invention include indium oxide (also referred to as indium oxide), gallium oxide (also referred to as gallium oxide), and zinc oxide (also referred to as zinc oxide). The metal oxide according to one embodiment of the present invention preferably contains at least indium (In) or zinc (Zn). The metal oxide preferably contains two or three elements selected from indium, an element M, and zinc. Note that the element M is a metal element or a metalloid element having a high bond energy with oxygen, for example, a metal element or a metalloid element having a bond energy with oxygen higher than that of indium. Specific examples of the element M include aluminum, gallium, tin, yttrium, titanium, vanadium, chromium, manganese, iron, cobalt, nickel, zirconium, molybdenum, hafnium, tantalum, tungsten, lanthanum, cerium, neodymium, magnesium, calcium, strontium, barium, boron, silicon, germanium, and antimony. The element M contained in the metal oxide is preferably one or more of the above elements, more preferably one or more selected from aluminum, gallium, tin, and yttrium, and even more preferably gallium. When the element M contained in the metal oxide is gallium, the metal oxide according to one embodiment of the present invention preferably contains one or more selected from indium, gallium, and zinc. Note that in this specification and the like, metal elements and metalloid elements may be collectively referred to as "metal elements," and the "metal element" described in this specification and the like may also include metalloid elements.

[0162] Examples of metal oxides according to one embodiment of the present invention include indium zinc oxide (In—Zn oxide), indium tin oxide (In—Sn oxide), indium titanium oxide (In—Ti oxide), indium gallium oxide (In—Ga oxide), indium gallium aluminum oxide (In—Ga—Al oxide), indium gallium tin oxide (In—Ga—Sn oxide, also referred to as IGTO), gallium zinc oxide (Ga—Zn oxide, also referred to as GZO), aluminum zinc oxide (Al—Zn oxide, also referred to as AZO), and indium. Examples of usable materials include indium aluminum zinc oxide (In-Al-Zn oxide, also referred to as IAZO), indium tin zinc oxide (In-Sn-Zn oxide), indium titanium zinc oxide (In-Ti-Zn oxide), indium gallium zinc oxide (In-Ga-Zn oxide, also referred to as IGZO), indium gallium tin zinc oxide (In-Ga-Sn-Zn oxide, also referred to as IGZTO), and indium gallium aluminum zinc oxide (In-Ga-Al-Zn oxide, also referred to as IGAZO or IAGZO). Other examples include indium tin oxide containing silicon (also referred to as ITSO), gallium tin oxide (Ga-Sn oxide), and aluminum tin oxide (Al-Sn oxide).

[0163] <Indium Oxide Film> A crystalline indium oxide film can be used for the oxide semiconductor layer of one embodiment of the present invention.

[0164] Indium oxide is a semiconductor material having physical properties that are completely different from those of oxide semiconductors such as In—Ga—Zn oxide (hereinafter also referred to as IGZO) and zinc oxide.

[0165] The carrier concentration dependence of the Hall mobility of indium oxide, silicon, and IGZO will be described.

[0166] IGZO tends to exhibit higher hole mobility as the carrier concentration increases. On the other hand, indium oxide tends to exhibit higher hole mobility as the carrier concentration decreases. This tendency is similar to that of silicon; the lower the concentration of dopants (impurities) in the material, the less impurity scattering there is and the higher the hole mobility. In other words, the higher the purity and intrinsic the indium oxide, the higher the hole mobility. From these results, it can be said that indium oxide, unlike IGZO, is a material with physical properties similar to those of silicon.

[0167] The range of carrier concentration suitable for the channel formation region of a transistor is 1×10 １５ cm −３ The range includes, for example, 1×10 １４ cm −３ That's it, 1 x 10 １８ cm −３ By sufficiently reducing the carrier concentration, the Hall mobility value can be increased to 270 cm ２ It is expected that the resistance can be increased to about / (V·s).

[0168] Indium oxide may contain an element that reduces the carrier concentration. Examples of elements that reduce the carrier concentration include magnesium, calcium, zinc, and cadmium. By substituting these elements for indium, the carrier concentration can be reduced. Other examples include nitrogen, phosphorus, arsenic, and antimony. By substituting these elements for oxygen, the carrier concentration can be reduced.

[0169] On the other hand, the electrical resistance can be reduced by increasing the carrier concentration. For example, the range of carrier concentration suitable for the source and drain regions of a transistor, a resistor, or a transparent conductive film is 1×10 ２０ cm −３ The range includes, for example, 1×10 １９ cm −３ That's it, 1 x 10 ２２ cm −３ By increasing the carrier concentration sufficiently, the resistivity can be reduced to 1×10 −４ It is expected that the resistivity can be reduced to Ω·cm or less.

[0170] Indium oxide may contain an element that increases the carrier concentration. For example, it is preferable that the indium oxide contains an element that is common to the source and drain electrodes of the transistor. Examples of elements that increase the carrier concentration include titanium, zirconium, hafnium, tantalum, tungsten, tin, and silicon. In particular, it is more preferable to use an element whose oxide has conductive or semiconductive properties.

[0171] Since indium oxide is an oxide capable of valence electron control, a region with a low carrier concentration can be used as the channel formation region of a transistor, and a region with a high carrier concentration can be used as the source and drain regions of the transistor. This allows for the creation of a so-called N-I-N junction (a junction between an N-type region, an I-type region, and an N-type region). Valence electron control in transistors using silicon is generally known. On the other hand, valence electron control in transistors using indium oxide is a novel technical concept that is not usually conceived. By using this technical concept, a highly reliable transistor can be realized, with high mobility, low off-current, and normally off operation.

[0172] The indium oxide film preferably has crystallinity (i.e., has crystal grains). Examples of films having crystal grains include single-crystal films, polycrystalline films, and amorphous films containing crystal grains (also referred to as microcrystalline films). In particular, the indium oxide film is preferably a polycrystalline film, and more preferably a single-crystal film. A single-crystal film does not have grain boundaries. Impurities (typically, insulating impurities, insulating oxides, etc.) that hinder carrier flow tend to segregate at grain boundaries. The use of a single-crystal film can suppress carrier scattering at grain boundaries, thereby realizing a transistor exhibiting high field-effect mobility. Furthermore, the use of a single-crystal film has the excellent effect of suppressing variations in transistor characteristics due to the grain boundaries.

[0173] Furthermore, polycrystalline films are preferable because they can reduce carrier scattering and exhibit high field-effect mobility compared to microcrystalline or amorphous films. When using a polycrystalline film, it is preferable to use a film with as large a crystal grain size as possible and as few crystal grain boundaries as possible. Note that, in a transistor using a polycrystalline film, if there is no crystal grain boundary in the channel formation region or no crystal grain boundary is observed, the channel formation region is located within a single crystal region included in the polycrystalline film, and therefore the transistor can be considered to use a single crystal film.

[0174] In this specification and the like, a semiconductor layer in which no crystal grain boundary is observed in the channel formation region, a semiconductor layer in which the channel formation region is included in one crystal grain, or a semiconductor layer in which the crystal axis direction is the same in at least two regions in the channel formation region can be called a single crystal film. Also, a semiconductor layer in which, in the channel formation region, within one crystal grain, the direction of another crystal axis continuously changes around a certain crystal axis or a certain crystal orientation as the axis of rotation can be called a single crystal film.

[0175] The channel formation region refers to a region of the semiconductor layer that overlaps (or faces) the gate electrode via the gate insulating layer, and is located between a region in contact with the source electrode and a region in contact with the drain electrode. Crystal grains, crystal grain boundaries, crystal axes, crystal orientations, and the like in the channel formation region can be confirmed by observing a cross section including the semiconductor layer, the source electrode, and the drain electrode.

[0176] Impurities in indium oxide can be a source of carrier scattering, which can reduce field-effect mobility and inhibit crystal growth. Examples of impurities in an indium oxide film include boron and silicon. The lower the concentration of these impurities in the channel formation region of the indium oxide film, the more preferable it is. The concentration of each of these impurity elements in the indium oxide film is preferably 0.1% or less, and more preferably 0.01% (100 ppm) or less. Carbon, hydrogen, and other elements may be contained in the film-forming gas or precursor during film formation, and may remain in the indium oxide film in greater amounts than the above-mentioned impurities.

[0177] By using such an indium oxide film in a transistor, the field effect mobility of the transistor can be increased to 50 cm ２ / (V·s) or more, preferably 100 cm ２ / (V·s) or more, more preferably 150 cm ２ / (V·s) or more, more preferably 200 cm ２ / (V·s) or more, more preferably 250 cm ２ / (V·s) or more.

[0178] One of the features of an indium oxide film is that it has higher oxygen permeability (diffusibility) than an IGZO film. For example, oxygen diffusing into an indium oxide film passes through the indium oxide film and is released as oxygen molecules. It may also react with hydrogen contained in the film and be released as water molecules. Furthermore, if oxygen vacancies exist in the film, the diffusing oxygen atoms compensate for the oxygen vacancies. Since oxygen easily diffuses into an indium oxide film, it can also be said that oxygen vacancies are more easily compensated for than in an IGZO film.

[0179] As described above, an indium oxide film can more easily reduce oxygen vacancies in the film than an IGZO film. Therefore, by using such an indium oxide film in a transistor, a transistor with extremely high reliability can be realized.

[0180] In addition, the indium oxide film diffuses hydrogen. Hydrogen that diffuses into the indium oxide film from the outside passes through the indium oxide film and is released as hydrogen molecules. Alternatively, as described above, hydrogen reacts with oxygen contained in the film and is released as water molecules.

[0181] Indium oxide is characterized by a small effective mass of electrons and a large effective mass of holes. Furthermore, the effective mass of electrons in indium oxide is characterized by being almost independent of the crystal orientation. Therefore, by using crystalline indium oxide in a transistor, a transistor with high field-effect mobility and high frequency characteristics (also referred to as f characteristics) can be realized. Furthermore, since the effective mass of holes is large, a transistor with extremely small off-current can be realized. For example, by applying an indium oxide film to a vertical transistor, the off-current per 1 μm of channel width can be reduced to 1 fA (1×10) in an environment of 125° C. −１５ A) or less, or 1aA (1 x 10 −１８ A) or less, and under room temperature (25°C) conditions, −１８ A) or less, or 1zA (1 x 10 −２１ Furthermore, since indium oxide has a smaller effective mass of electrons and a larger effective mass of holes than silicon, it may be possible to realize a transistor with higher field-effect mobility and lower off-state current than a Si transistor.

[0182] It is preferable to provide a seed layer so as to be in contact with at least a portion of the crystalline indium oxide film. The seed layer is preferably made of a material containing crystals with a small difference in lattice constant (also called lattice mismatch) with indium oxide. This can improve the crystallinity of the indium oxide film. Note that a substrate (e.g., a single-crystal substrate) may be used as one of the layers in contact with at least a portion of the crystalline indium oxide film.

[0183] One method for evaluating the degree of lattice mismatch is to use the value of the lattice mismatch shown below. The lattice mismatch Δa [%] of the crystals of the formed film (here, the indium oxide film) with respect to the crystals of the seed layer is expressed as Δa = ((L １ -L ２ ) / L ２ ) × 100, where L １ is the length or lattice constant of the unit lattice vector of the crystal of the formed film, and L ２is the length of the unit cell vector or the lattice constant of the crystal of the seed layer.

[0184] The smaller the absolute value of the lattice mismatch Δa between the seed layer and the indium oxide film, the more preferable, and it is most preferably 0. For example, Δa can be set to −5% or more and 5% or less, preferably −4% or more and 4% or less, more preferably −3% or more and 3% or less, and even more preferably −2% or more and 2% or less.

[0185] Here, the indium oxide crystal has a cubic crystal structure (bixbyite type). For example, the crystal of yttria-stabilized zirconia (YSZ) can have a cubic crystal structure (fluorite type). The lattice mismatch of the indium oxide crystal with the cubic YSZ crystal is in the range of −2% to 2%, and a single crystal film of indium oxide can be epitaxially grown on the YSZ substrate.

[0186] It should be noted that the crystal structure of the seed layer and the crystal structure of the indium oxide film may not necessarily have the same crystal system or crystal orientation. For example, a film having crystals of a hexagonal or trigonal structure may be used under an indium oxide film having crystals of a cubic structure. For example, by setting the crystal orientation of the surface of the seed layer to

[001] and the crystal orientation of the underside of the indium oxide film to

[111] , the requirements related to the crystal orientation necessary for epitaxial growth can be satisfied. Examples of hexagonal or trigonal crystals include wurtzite structure, YbFe ２ O ４ Type structure, Yb ２ Fe ３ O ７ YbFeFe alloys have the following structures: ２ O ４ Type structure or Yb ２ Fe ３ O ７ An example of a crystal having a ZnO-type structure is IGZO.

[0187] This embodiment mode can be implemented by appropriately combining at least a part thereof with other embodiment modes described in this specification.

[0188] Embodiment 4 In this embodiment, an example of a layout in the case where the transistor described in Embodiment 2 is applied to the driver circuit described in Embodiment 1 will be described.

[0189] 11 is a plan view showing an example of a layout in which the transistor 200A shown in FIGS. 9A to 9C and the transistor 200B shown in FIGS. 10A to 10C are used as transistors constituting the driver circuit 100 shown in FIG. 1A described above. Fig. 12A is a cross-sectional view taken along the line A1-A2 indicated by the dashed-dotted line in Fig. 11. Fig. 12B is a cross-sectional view taken along the line A3-A4 indicated by the dashed-dotted line in Fig. 11. Fig. 12C is a cross-sectional view taken along the line A5-A6 indicated by the dashed-dotted line in Fig. 11.

[0190] 11 and 12A to 12C show conductive layers bg01 and bg02, which correspond to the conductive layer 219 on the substrate 201. Also shown are semiconductor layers ac01, ac02, and ac03, which correspond to the semiconductor layer 203 on the insulating layer 202. Also shown are conductive layers ge01, ge02, ge03, ge04, and ge05, which correspond to the conductive layer 205 on the insulating layer 204. Also shown are conductive layers me01, me02, me03, me04, me05, me06, and me07, which correspond to the conductive layer 208 on the insulating layer 206.

[0191] The conductive layer bg01 has a region functioning as the back gate of the transistor M11 and a region functioning as the wiring BGL. The conductive layer bg02 has a region functioning as the wiring BGL that transmits a signal from the wiring OL to the driver circuit 100 in the next row.

[0192] The semiconductor layers ac01 and ac02 have regions that function as channel formation regions of the transistors M11 and M12, respectively. The semiconductor layer ac03 has a region that functions as a channel formation region of the transistor M13.

[0193] The conductive layer ge01 has a region that functions as the gate of the transistor M11 and a region that functions as one terminal of the capacitor C11. The conductive layer ge01 is a conductive layer that functions as wiring for connecting the transistors M11 and M13 and corresponds to the node ND1. The conductive layer ge02 has a region that functions as the gate of the transistor M12 and a region that functions as wiring NL2. The conductive layer ge03 has a region that functions as the power supply line VLS1. The conductive layer ge04 has a region that functions as the gate of the transistor M13. The conductive layer ge05 has a region that functions as wiring NL1.

[0194] The conductive layer me01 has a region that functions as either the source or the drain of the transistor M11, a region that functions as either the source or the drain of the transistor M12, and a region that functions as an interconnect OL. The conductive layer me02 has a region that functions as the other of the source or the drain of the transistor M11 and a region that functions as an interconnect VLD1. The conductive layer me03 has a region that functions as an interconnect VLS1. The conductive layer me04 has a region that functions as an interconnect VLS1 and a region that functions as the other of the source or the drain of the transistor M12. The conductive layer me05 has a region that functions as either the source or the drain of the transistor M13. The conductive layer me05 is a conductive layer that functions as an interconnect for connecting the transistors M11 and M13. The conductive layer me06 has a region that functions as the other of the source or the drain of the transistor M13 and a region that functions as an interconnect ND11. The conductive layer me07 has a region that functions as an interconnect VLD2.

[0195] The conductive layer me03 is connected to the conductive layer ge03 at an opening provided in the insulating layer 206. The conductive layer me04 is connected to the conductive layer ge03 at an opening provided in the insulating layer 206. The conductive layer me05 is connected to the conductive layer ge01 at an opening provided in the insulating layer 206. The conductive layer me06 is connected to the conductive layer ge05 at an opening provided in the insulating layer 206. The conductive layer me07 is connected to the conductive layer ge04 at an opening provided in the insulating layer 206. FIGS. 11 and 12C show vias that connect the conductive layers me04 and ge03 to each other at the openings provided in the insulating layer 206.

[0196] The transistors 200A and 200B used as the respective transistors constituting the driver circuit 100 can share the semiconductor layer 203 provided in series. FIGS. 11 and 12A illustrate how the semiconductor layers of the transistors 200A and 200B are provided in series to include a plurality of semiconductor layers ac01. By sharing the semiconductor layer 203 provided in series with the transistors 200A and 200B in this manner, the area occupied by the transistors can be reduced. This reduces the area occupied by the gate driver unit 163, enabling miniaturization.

[0197] Furthermore, the transistors 200A and 200B used as the respective transistors constituting the driver circuit 100 may have a configuration in which multiple transistors are connected in parallel. In FIG. 11 , the transistor M11 has, as an example, a configuration in which eight transistors are connected in parallel. The transistor M12 has, as an example, a configuration in which four transistors are connected in parallel. By connecting multiple transistors in parallel in this manner, the effective channel width can be increased, thereby increasing the on-state current. That is, the channel widths of the transistors M11 and M12 can be made larger than the channel widths of other transistors (such as the transistor M13), thereby increasing the on-state current. This shortens the time required to change the potential of the wiring OL (i.e., the rise time and fall time), thereby improving the operating speed.

[0198] Although not shown, in order to increase the on-state current of a transistor, the channel length of each transistor may be reduced or the channel width of each transistor may be increased. This allows the number of transistors connected in parallel to be reduced to obtain the same on-state current, thereby reducing the area occupied by the transistors.

[0199] The capacitance element C11 can be configured such that a portion of the insulating layer 206 serves as a dielectric in a region where the conductive layer ge01 and the conductive layer me01 overlap each other. Fig. 12B illustrates, as an example, a capacitance element C11 in which a portion of the insulating layer 206 serves as a dielectric and portions of the conductive layer ge01 and the conductive layer me01 serve as a pair of terminals.

[0200] 11, the widths of the conductive layer me02 having a region that functions as the wiring VLD1 and the conductive layer me03 having a region that functions as the wiring VLS1 are made larger than the width of the conductive layer me07 having a region that functions as the wiring VLD2. This layout allows the wiring resistance of the wiring VLD1 and the wiring VLS1 to be reduced. Although the wiring VLD1 and the wiring VLS1 each have the function of transmitting a constant potential, a large current may flow momentarily when driving multiple pixels connected to the wiring OL, causing a voltage drop due to the wiring resistance. Therefore, by reducing the wiring resistance of the wiring VLD1 and the wiring VLS1, the potential can be stabilized, resulting in stable operation.

[0201] Note that one embodiment of the present invention is not limited to the configuration examples, operation examples, etc. described in this embodiment. At least part of the configuration examples, operation examples, and corresponding drawings described in this embodiment can be appropriately combined with other configuration examples, other operation examples, other drawings, other embodiments, etc. described in this specification, etc.

[0202] Embodiment 5 In this embodiment, a display device according to one embodiment of the present invention will be described.

[0203] Note that at least part of the driver circuit, the semiconductor device, and the like described in Embodiment 1 can be applied to a display device of one embodiment of the present invention, a module including the display device, or the like.

[0204] Here, examples of the module having the display device include a module in which a connector such as a flexible printed circuit (FPC) or a tape carrier package (TCP) is attached to the display device, and a module in which an integrated circuit (IC) is mounted by a chip-on-glass (COG) method or a chip-on-film (COF) method.

[0205] <Structural Example of Display Device> FIG. 13A is a perspective view illustrating a structural example of a display device 400 of one embodiment of the present invention.

[0206] The display device 400 has a configuration in which a substrate 411 and a substrate 451 are bonded together. In Fig. 13A, the substrate 411 is indicated by a dashed line.

[0207] The display device 400 includes a display portion 452, a circuit portion 454a, a circuit portion 454b, a connection portion 457, a wiring portion 458, and the like. Fig. 13A shows an example in which an IC 456 and an FPC 459 are mounted on the display device 400. Therefore, the configuration shown in Fig. 13A can also be said to be a display module including the display device 400, an IC, and an FPC.

[0208] Note that at least a part of the semiconductor device 160 described in Embodiment 1 can be applied to the display device 400. For example, at least a part of the driver circuit 100 described in Embodiment 1 can be applied to the circuit portion 454a and the circuit portion 454b. Furthermore, at least a part of the pixel 161 described in Embodiment 1 can be applied to the display portion 452.

[0209] The circuit portion 454a includes, for example, a scanning line driver circuit (also referred to as a gate driver or a scan driver), and the circuit portion 454b includes, for example, a signal line driver circuit (also referred to as a source driver or a data driver).

[0210] The wiring portion 458 has a function of supplying signals and power to the display portion 452, the circuit portion 454a, and the circuit portion 454b. The signals and power are input to the wiring portion 458 from the outside of the display device 400 via the FPC 459 or are input to the wiring portion 458 from the IC 456.

[0211] 13A shows an example in which an IC 456 is provided on a substrate 451 by a COG method, a COF method, or the like. For example, an IC including one or both of a scan line driver circuit and a signal line driver circuit can be used as the IC 456. Note that the display device 400 and the display module may not include an IC. Alternatively, the IC may be mounted on an FPC by a COF method or the like.

[0212] Note that a scanning line driver circuit may be formed by one or both of the IC 456 and the circuit portion 454a. In this case, the IC 456 may be referred to as a gate driver IC. Also, a signal line driver circuit may be formed by one or both of the IC 456 and the circuit portion 454b. In this case, the IC 456 may be referred to as a source driver IC.

[0213] The display section 452 is a region in the display device 400 that displays an image, and has a plurality of periodically arranged pixels 455. Fig. 13A shows an enlarged view of one pixel 455.

[0214] The pixel 455 shown in FIG. 13A includes a pixel 453R that emits red (R) light, a pixel 453G that emits green (G) light, and a pixel 453B that emits blue (B) light. A full-color display can be achieved by configuring one pixel 455 with the pixels 453R, 453G, and 453B. The pixels 453R, 453G, and 453B each function as a subpixel. The display device 400 shown in FIG. 13A illustrates an example in which the pixels 453R, 453B, and 453G that function as subpixels are arranged in a stripe array. Note that the number of subpixels that constitute one pixel 455 is not limited to three and may be four or more. For example, the pixel 455 may include four subpixels that emit R, G, B, and white (W) light, respectively. Alternatively, the pixel 455 may include four subpixels that emit R, G, B, and yellow (Y) light, respectively.

[0215] In this specification, elements relating to red light may be identified by the identification symbol "R," elements relating to green light by the identification symbol "G," and elements relating to blue light by the identification symbol "B," and these elements may be described separately. Furthermore, common elements may be described without identifying the elements. For example, when it is necessary to distinguish between multiple pixels 453, they may be referred to as pixel 453R, pixel 453G, or pixel 453B. Furthermore, when it is not necessary to distinguish between pixel 453R, pixel 453G, and pixel 453B, they may be simply referred to as pixel 453.

[0216] Each of the pixels 453R, 453G, and 453B includes a display element and a circuit (pixel circuit) that controls driving of the display element.

[0217] The connection portion 457 is provided outside the display portion 452. The connection portion 457 can be provided along one side or multiple sides of the display portion 452. The number of connection portions 457 may be single or multiple. FIG. 13A shows an example in which the connection portion 457 is provided so as to surround the four sides of the display portion. The connection portion 457 connects a common electrode of the display element and a wiring portion 458, and can supply a potential to the common electrode.

[0218] Note that the display device of one embodiment of the present invention may have a function as a touch panel. For example, various sensing elements (also referred to as sensor elements) that can detect the proximity or contact of a sensed object such as a finger can be applied to the display device.

[0219] Examples of sensor types include a capacitance type, a resistive film type, a surface acoustic wave type, an infrared type, an optical type, and a pressure-sensitive type.

[0220] The capacitance type includes, for example, a surface capacitance type and a projected capacitance type. The projected capacitance type includes, for example, a self-capacitance type and a mutual capacitance type. The mutual capacitance type is preferable because it enables simultaneous multi-point detection.

[0221] Examples of touch panels include out-cell, on-cell, and in-cell types. Note that the in-cell type touch panel has a configuration in which electrodes constituting a detection element are provided on one or both of a substrate supporting a display element (also called a display device) and an opposing substrate.

[0222] 13B to 13F are plan views illustrating pixel arrays. In a display device according to one embodiment of the present invention, the pixel array is not particularly limited, and various arrays can be applied. Examples of pixel arrays include a stripe array (see FIG. 13B), an S-stripe array (see FIG. 13C), a delta array (see FIG. 13D), a zigzag array (see FIG. 13E), and a pentile array (see FIG. 13F). Other examples include a mosaic array, a diamond array, and a Bayer array.

[0223] 13B to 13F, examples of the top surface shape of each subpixel (pixel 453R, pixel 453G, and pixel 453B) include a triangle, a quadrangle (including a rectangle and a square), a polygon such as a pentagon, shapes with rounded corners of these polygons, an ellipse, and a circle. Here, the top surface shape of each subpixel corresponds to the top surface shape of the display region of the display element included in each subpixel. The top surface shape and size of each subpixel can be determined independently. The arrangements of the pixel 453R, pixel 453G, and pixel 453B may be interchanged as appropriate. The display elements and pixel circuits may be arranged in the same or different ways.

[0224] [Display element] Various elements can be used as the display element, for example, a liquid crystal element and a light-emitting element. Other examples include a shutter-type or optical interference-type MEMS (Micro Electro Mechanical Systems) element, or a display element using a microcapsule type, an electrophoresis type, an electrowetting type, or an electronic liquid powder (registered trademark) type. Furthermore, a QLED (Quantum-dot LED) using a light source and color conversion technology using quantum dot materials may also be used.

[0225] Examples of display devices using liquid crystal elements include transmissive liquid crystal display devices, reflective liquid crystal display devices, and semi-transmissive liquid crystal display devices.

[0226] Examples of modes that can be used in display devices using liquid crystal elements include vertical alignment (VA) mode, Fringe Field Switching (FFS) mode, In-Plane-Switching (IPS) mode, Twisted Nematic (TN) mode, Axially Symmetric Aligned Micro-cell (ASM) mode, Optically Compensated Birefringence (OCB) mode, Ferroelectric Liquid Crystal (FLC) mode, Anti-Ferroelectric Liquid Crystal (AFLC) mode, and Electrically Compensated Birefringence (ECB) mode. Examples of the VA mode include a Multi-Domain Vertical Alignment (MVA) mode, a Patterned Vertical Alignment (PVA) mode, and an Advanced Super View (ASV) mode.

[0227] Examples of liquid crystal materials that can be used in liquid crystal elements include thermotropic liquid crystals, low-molecular-weight liquid crystals, polymer liquid crystals, polymer-dispersed liquid crystals (PDLCs), polymer network liquid crystals (PNLCs), ferroelectric liquid crystals, and antiferroelectric liquid crystals. These liquid crystal materials exhibit cholesteric phases, smectic phases, cubic phases, chiral nematic phases, isotropic phases, blue phases, etc., depending on the conditions. Furthermore, either positive-type or negative-type liquid crystals may be used as the liquid crystal material.

[0228] Examples of the light-emitting element include self-luminous light-emitting elements such as LEDs (Light Emitting Diodes), organic EL (Electro Luminescence) elements (also called OLEDs (Organic LEDs)), and semiconductor lasers. Examples of the LED that can be used include mini LEDs and micro LEDs.

[0229] Examples of light-emitting substances that the light-emitting element has include fluorescent substances (fluorescent materials), phosphorescent substances (phosphorescent materials), substances that exhibit thermally activated delayed fluorescence (thermally activated delayed fluorescence: TADF materials), and inorganic compounds (quantum dot materials, etc.).

[0230] The light-emitting element can emit light of infrared, red, green, blue, cyan, magenta, yellow, white, etc. Furthermore, the color purity can be improved by providing the light-emitting element with a microcavity structure.

[0231] One of a pair of electrodes included in the light-emitting element functions as an anode electrode, and the other electrode functions as a cathode electrode.

[0232] <Example of Cross-Sectional Structure of Display Device> FIG. 14 is a cross-sectional view illustrating an example of a cross-sectional structure of a display device of one embodiment of the present invention.

[0233] 14 , the structures shown in the regions 490a, 490b, and 490c can be used in the display device 400. For example, the structure shown in the region 490a can be used in a region where the pixel 453 is provided. The structure shown in the region 490b can be used in a region where the circuit portion 454a, the circuit portion 454b, and the like are provided. The structure shown in the region 490c can be used in a region where the FPC 459 is provided.

[0234] Note that the region 490a corresponds to a region where the pixel 161 described in the above-described Embodiment 1 is provided. That is, the transistors provided in the region 490a correspond to the transistors included in the pixel 161 described in the above-described Embodiment 1 (such as the transistor M31, the transistor M32, and the transistor M33 included in the pixel 161A). The region 490b corresponds to a region where the driver circuit 100 described in the above-described Embodiment 1 is provided. That is, the transistors provided in the region 490b correspond to the transistors included in the driver circuit 100 described in the above-described Embodiment 1 (such as the transistor M11, the transistor M12, and the transistor M13).

[0235] The display device 490 has a substrate 351 and a substrate 352. An adhesive layer 342 is provided between the substrates 351 and 352. The substrate 352 faces the substrate 351 with the adhesive layer 342 interposed therebetween. Note that the region 490c does not have the substrate 352 or the adhesive layer 342.

[0236] An insulating layer 382 is provided on the substrate 352 side of the substrate 351. A transistor, a light-emitting element, and the like are provided on the insulating layer 382.

[0237] Here, as an example, a structure is shown in which the transistor 200A described in Embodiment 2 is provided in each of the regions 490a and 490b. Also, a structure is shown in which the transistor 200B described in Embodiment 2 is provided in the region 490a. A conductive layer 384 is provided in the region 490c. The conductive layer 384 can be formed in the same process as the conductive layers 208 (such as the conductive layers 208a and 208b) in the transistors 200A and 200B.

[0238] Furthermore, the transistors provided in the regions 490a and 490b are not limited to those having the same structures as the transistors 200A and 200B. Transistors having various structures may be provided in the regions 490a and 490b. In this case, transistors having one type of structure may be provided, or two or more types of transistors having different structures may be provided.

[0239] An insulating layer 218 is provided to cover the transistor 200A and the transistor 200B.

[0240] In the region 490a, a pixel electrode 311 is provided on the insulating layer 218. The pixel electrode 311 is connected to the conductive layer 208b through openings provided in the insulating layer 218 and the insulating layer 209. In addition, an insulating layer 237 is provided on the insulating layer 218. The insulating layer 237 has a region that covers an end portion of the pixel electrode 311.

[0241] An EL layer 313 is provided so as to cover the insulating layer 237 and the pixel electrode 311. A common electrode 315 is provided so as to cover the EL layer 313. A protective layer 331 is provided so as to cover the common electrode 315.

[0242] The pixel electrode 311 and the common electrode 315 overlap with each other via the EL layer 313, and the pixel electrode 311 and the EL layer 313 are in contact with each other, and the region where the EL layer 313 and the common electrode 315 are in contact functions as a light-emitting element 330. The pixel electrode 311 functions as one electrode (or first terminal) of the light-emitting element 330, and the common electrode 315 functions as the other electrode (or second terminal). The EL layer 313 has a function of emitting light with a luminance corresponding to the amount of current flowing between the pixel electrode 311 and the common electrode 315 via the EL layer 313.

[0243] Note that the light-emitting element 330 corresponds to the light-emitting element LD included in the pixel 161A[u, v] described in the first embodiment.

[0244] A light-shielding layer 317 is provided on the substrate 352 on the substrate 351 side.

[0245] In region 490a, an opening is provided in light-shielding layer 317 so as to have an area overlapping with light-emitting element 330. Therefore, light emitted by light-emitting element 330 is emitted to the outside of display device 490 through the opening provided in light-shielding layer 317. In Fig. 14, this state is represented by a dashed arrow and the word "Light."

[0246] In the region 490c, the conductive layer 386 is provided over part of the insulating layer 218. The conductive layer 386 has a region in contact with the conductive layer 384 through openings provided in the insulating layer 218 and the insulating layer 209.

[0247] The conductive layer 384 can be provided in the same layer as the conductive layers 208a and 208b. Therefore, the conductive layer 384 can have the same material as the conductive layers 208a and 208b and can be formed in the same process. For example, the conductive layers 208a, 208b, and 384 can be formed by processing the same conductive film. The conductive layer 386 can be provided in the same layer as the pixel electrode 311. Therefore, the conductive layer 386 can have the same material as the pixel electrode 311 and can be formed in the same process. For example, the pixel electrode 311 and the conductive layer 386 can be formed by processing the same conductive film. In the region 490c, the conductive layer 386 is exposed. This allows the conductive layer 386 to be connected to the FPC 459 via the connection layer 388.

[0248] The connection layer 388 may be, for example, an anisotropic conductive film (ACF) or an anisotropic conductive paste (ACP).

[0249] <Structure Examples of Light-Emitting Element> In one embodiment of the present invention, when a display device includes a light-emitting element, light-emitting elements with various structures can be used.

[0250] 15A, 15B, 16A, and 16B are cross-sectional views illustrating light-emitting elements with various configurations.

[0251] 15A includes light-emitting elements 330R, 330G, and 330B between substrates 351 and 352. Light-emitting element 330R is a display element included in a pixel that emits red light, light-emitting element 330G is a display element included in a pixel that emits green light, and light-emitting element 330B is a display element included in a pixel that emits blue light. When describing matters common to light-emitting element 330R, light-emitting element 330G, and light-emitting element 330B, the elements may be simply referred to as light-emitting element 330.

[0252] 15A omits some of the configuration between the substrate 351 and the light-emitting element 330 and the configuration between the substrate 352 and the light-emitting element 330. The display device 490A includes, between the substrate 351 and the light-emitting element 330, for example, a transistor that constitutes a pixel circuit and an insulating layer 218 that is provided to cover the transistor.

[0253] The display device 490A employs an SBS (Side By Side) structure, which allows the materials and configuration to be optimized for each light-emitting element, increasing the degree of freedom in the selection of materials and configurations, and facilitating the improvement of light emission intensity and reliability.

[0254] The display device 490A is a top-emission type. In the top-emission type, a transistor or the like can be arranged to overlap with a light-emitting region of a light-emitting element, and therefore the aperture ratio of a pixel can be increased compared to a bottom-emission type.

[0255] On the insulating layer 218, a light emitting element 330R, a light emitting element 330G, and a light emitting element 330B are provided.

[0256] The light-emitting element 330R has a pixel electrode 311R on the insulating layer 218, an EL layer 313R on the pixel electrode 311R, and a common electrode 315 on the EL layer 313R. The light-emitting element 330R shown in Fig. 15A emits red (R) light. The EL layer 313R has a light-emitting layer that emits red light.

[0257] The light-emitting element 330G has a pixel electrode 311G on the insulating layer 218, an EL layer 313G on the pixel electrode 311G, and a common electrode 315 on the EL layer 313G. The light-emitting element 330G shown in Fig. 15A emits green (G) light. The EL layer 313G has a light-emitting layer that emits green light.

[0258] The light-emitting element 330B has a pixel electrode 311B on the insulating layer 218, an EL layer 313B on the pixel electrode 311B, and a common electrode 315 on the EL layer 313B. The light-emitting element 330B shown in Fig. 15A emits blue (B) light. The EL layer 313B has a light-emitting layer that emits blue light.

[0259] 15A, the EL layers 313R, 313G, and 313B are all shown with the same thickness, but this is not limited to this. The EL layers 313R, 313G, and 313B may have different thicknesses. For example, it is preferable to set the thicknesses of the EL layers 313R, 313G, and 313B so that the optical path length increases the intensity of the light emitted by each layer. This allows for a microcavity structure to be realized, and the color purity of the light emitted from each light-emitting element to be improved.

[0260] The pixel electrode 311R is connected to a transistor (not shown) included in a pixel circuit corresponding to the light-emitting element 330R via an opening provided in the insulating layer 218 or the like. The pixel electrode 311G is connected to a transistor (not shown) included in a pixel circuit corresponding to the light-emitting element 330G. The pixel electrode 311B is connected to a transistor (not shown) included in a pixel circuit corresponding to the light-emitting element 330B.

[0261] Ends of the pixel electrode 311R, the pixel electrode 311G, and the pixel electrode 311B are covered with an insulating layer 237. The insulating layer 237 functions as a partition wall. The insulating layer 237 can be formed in a single layer structure or a stacked layer structure using one or both of an inorganic insulating material and an organic insulating material. For example, the material that can be used for the insulating layer 218 can be used for the insulating layer 237. The insulating layer 237 can insulate the pixel electrode from the common electrode. Furthermore, the insulating layer 237 can insulate adjacent light-emitting elements from each other.

[0262] The common electrode 315 is a continuous film provided in common to the light-emitting elements 330R, 330G, and 330B. The common electrode 315 shared by the plurality of light-emitting elements is connected to a conductive layer formed of the same material and in the same process as the pixel electrodes 311R, 311G, and 311B in a region where no light-emitting element is provided.

[0263] In the display device of one embodiment of the present invention, a conductive film that transmits visible light is preferably used for the electrode from which light is extracted, and a conductive film that reflects visible light is preferably used for the electrode from which light is not extracted, out of the pixel electrode and the common electrode.

[0264] A conductive film that transmits visible light may also be used for the electrode on the side from which light is not extracted. In this case, it is preferable to place the electrode between the reflective layer and the EL layer. In other words, the light emitted from the EL layer may be reflected by the reflective layer and extracted from the display device.

[0265] Materials for forming the pair of electrodes of the light-emitting element can include metals, alloys, electrically conductive compounds, and mixtures thereof. Specific examples of such materials include metals such as aluminum, magnesium, titanium, chromium, manganese, iron, cobalt, nickel, copper, gallium, zinc, indium, tin, molybdenum, tantalum, tungsten, palladium, gold, platinum, silver, yttrium, and neodymium, as well as alloys containing these metals in combination. Examples of such materials include indium tin oxide (In-Sn oxide or ITO), In-Si-Sn oxide, indium zinc oxide (In-Zn oxide), and In-W-Zn oxide. Examples of such materials include aluminum alloys, such as aluminum-nickel-lanthanum (Al-Ni-La) alloys, and silver-magnesium alloys and silver-palladium-copper (Ag-Pd-Cu) alloys. Other examples of the material include elements belonging to Group 1 or 2 of the periodic table (e.g., lithium, cesium, calcium, and strontium) that are not exemplified above, rare earth metals such as europium and ytterbium, alloys containing appropriate combinations of these, and graphene.

[0266] The light-emitting element preferably has a micro-optical resonator (microcavity) structure. Therefore, one electrode of the light-emitting element is preferably an electrode that is transparent and reflective to visible light (semi-transmissive / semi-reflective electrode), and the other electrode is preferably an electrode that is reflective to visible light (reflective electrode). By having the light-emitting element have a microcavity structure, light emitted from the light-emitting layer can be resonated between both electrodes, thereby intensifying the light emitted from the light-emitting element.

[0267] The light transmittance of the transparent electrode is 40% or more. For example, it is preferable to use an electrode having a visible light (light with a wavelength of 400 nm or more and less than 750 nm) transmittance of 40% or more for the transparent electrode of the light-emitting element. The visible light reflectance of the semi-transmissive / semi-reflective electrode is 10% or more and 95% or less, preferably 30% or more and 80% or less. The visible light reflectance of the reflective electrode is 40% or more and less than 100%, preferably 70% or more and less than 100%. Furthermore, the resistivity of these electrodes is 1×10 −２ Preferably, it is Ωcm or less.

[0268] The EL layer 313R, the EL layer 313G, and the EL layer 313B are each provided in an island shape. In FIG. 15A , the ends of adjacent EL layers 313R and 313G overlap, and the ends of adjacent EL layers 313G and 313B overlap. Although not shown, the ends of adjacent EL layers 313R and 313B overlap. When forming island-shaped EL layers using a metal mask (or a fine metal mask), the ends of adjacent EL layers may overlap as shown in FIG. 15A , but this is not limited to this. That is, adjacent EL layers may not overlap but may be spaced apart. Furthermore, the display device may have both overlapping portions between adjacent EL layers and portions between adjacent EL layers that do not overlap but are spaced apart.

[0269] Each of the EL layers 313R, 313G, and 313B includes at least a light-emitting layer. The light-emitting layer includes one or more light-emitting substances. As the light-emitting substance, a substance that emits light of a color such as blue, purple, blue-purple, green, yellow-green, yellow, orange, or red can be used as appropriate. Furthermore, a substance that emits near-infrared light can also be used as the light-emitting substance.

[0270] The light-emitting material may include a fluorescent material, a phosphorescent material, a TADF material, and a quantum dot material.

[0271] The light-emitting layer may contain one or more organic compounds (such as a host material and an assist material) in addition to a light-emitting substance (guest material). As the one or more organic compounds, one or both of a substance with high hole-transporting properties (hole-transporting material) and a substance with high electron-transporting properties (electron-transporting material) may be used. Furthermore, as the one or more organic compounds, a bipolar substance (a substance with high electron-transporting properties and high hole-transporting properties) or a TADF material may be used.

[0272] The light-emitting layer preferably includes, for example, a phosphorescent material and a hole-transporting material and an electron-transporting material, which are a combination that easily forms an exciplex. This configuration allows efficient emission using Exciplex-Triple Energy Transfer (ExTET), which is energy transfer from the exciplex to the light-emitting material (phosphorescent material). By selecting a combination that forms an exciplex that emits light that overlaps with the wavelength of the lowest-energy absorption band of the light-emitting material, the energy transfer becomes smooth and light emission can be achieved efficiently. This configuration allows the light-emitting element to simultaneously achieve high efficiency, low-voltage operation, and a long life.

[0273] In addition to the light-emitting layer, the EL layer may include one or more of a layer containing a substance with high hole-injecting properties (hole-injecting layer), a layer containing a hole-transporting material (hole-transporting layer), a layer containing a substance with high electron-blocking properties (electron-blocking layer), a layer containing a substance with high electron-injecting properties (electron-injecting layer), a layer containing an electron-transporting material (electron-transporting layer), and a layer containing a substance with high hole-blocking properties (hole-blocking layer).In addition, the EL layer may include one or both of a bipolar substance and a TADF material.

[0274] The light-emitting element can be made of either a low-molecular-weight compound or a high-molecular-weight compound, and may contain an inorganic compound. Each of the layers constituting the light-emitting element can be formed by a method such as a vapor deposition method (including a vacuum vapor deposition method), a transfer method, a printing method, an inkjet method, or a coating method.

[0275] The light-emitting element may have a single structure (a structure having only one light-emitting unit) or a tandem structure (a structure having multiple light-emitting units). The light-emitting unit has at least one light-emitting layer. The tandem structure is a structure in which multiple light-emitting units are connected in series via a charge-generating layer. When a voltage is applied between a pair of electrodes, the charge-generating layer injects electrons into one of the two light-emitting units and holes into the other. The tandem structure allows the light-emitting element to emit light with high luminous intensity. Furthermore, the tandem structure can reduce the current required to achieve the same luminous intensity compared to a single structure, thereby improving reliability. The tandem structure can also be called a stacked structure.

[0276] In Figure 15A, when light-emitting elements with a tandem structure are used, it is preferable that the EL layer 313R has a structure having multiple light-emitting units that emit red light, the EL layer 313G has a structure having multiple light-emitting units that emit green light, and the EL layer 313B has a structure having multiple light-emitting units that emit blue light.

[0277] A protective layer 331 is provided on the light-emitting elements 330R, 330G, and 330B. The protective layer 331 and the substrate 352 are bonded via an adhesive layer 362. A light-shielding layer 317 is provided on the substrate 352. For example, a solid sealing structure or a hollow sealing structure can be applied to seal the light-emitting elements. In FIG. 15A , the space between the substrates 352 and 351 is filled with the adhesive layer 362, thereby applying a solid sealing structure. Alternatively, a hollow sealing structure may be applied in which the space is filled with an inert gas (such as nitrogen or argon). In this case, the adhesive layer 362 may be provided so as not to overlap the light-emitting elements. Alternatively, the space may be filled with a resin different from the frame-shaped adhesive layer 362.

[0278] By providing the protective layer 331 on the light-emitting elements 330R, 330G, and 330B, the reliability of the light-emitting elements can be improved.

[0279] The protective layer 331 may have a single layer structure or a stacked structure of two or more layers. The conductivity of the protective layer 331 does not matter. The protective layer 331 can be formed using at least one of an insulating film, a semiconductor film, and a conductive film.

[0280] The protective layer 331 has an inorganic film, which can prevent oxidation of the common electrode 315 and prevent impurities (such as moisture and oxygen) from entering the light-emitting element, thereby suppressing deterioration of the light-emitting element and improving the reliability of the display device.

[0281] An inorganic insulating film can be used for the protective layer 331. Examples of materials that can be used for the inorganic insulating film include oxides, nitrides, oxynitrides, and nitride oxides. Specific examples of these inorganic insulating films are as described above. In particular, the protective layer 331 preferably contains a nitride or a nitride oxide, and more preferably contains a nitride.

[0282] The protective layer 331 may be an inorganic film containing ITO, In—Zn oxide, Ga—Zn oxide, Al—Zn oxide, IGZO, or the like. The inorganic film preferably has high resistance, specifically, preferably has higher resistance than the common electrode 315. The inorganic film may further contain nitrogen.

[0283] When light emitted from the light-emitting element is extracted through the protective layer 331, it is preferable that the protective layer 331 has high transparency to visible light. For example, ITO, IGZO, and aluminum oxide are preferable because they are inorganic materials that have high transparency to visible light.

[0284] For example, a stacked structure of an aluminum oxide film and a silicon nitride film on the aluminum oxide film, or a stacked structure of an aluminum oxide film and an IGZO film on the aluminum oxide film can be used as the protective layer 331. By using such a stacked structure, impurities (such as water and oxygen) can be prevented from entering the EL layer side.

[0285] Furthermore, the protective layer 331 may have an organic film. For example, the protective layer 331 may have both an organic film and an inorganic film. Examples of organic films that can be used for the protective layer 331 include the organic insulating films that can be used for the insulating layer 218.

[0286] The display device 490A is a top-emission type. Light emitted from the light-emitting elements is emitted toward the substrate 352. The substrate 352 is preferably made of a material that is highly transparent to visible light. The pixel electrodes 311R, 311G, and 311B contain a material that reflects visible light, and the counter electrode (common electrode 315) contains a material that transmits visible light.

[0287] A light-shielding layer 317 is preferably provided on the surface of the substrate 352 facing the substrate 351. The light-shielding layer 317 can be provided between adjacent light-emitting elements.

[0288] A colored layer such as a color filter may be provided on the surface of the substrate 352 on the substrate 351 side or on the protective layer 331. When a color filter is provided over the light-emitting element, the color purity of light emitted from the pixel can be increased.

[0289] The colored layer is a colored layer that selectively transmits light in a specific wavelength range and absorbs light in other wavelength ranges. For example, a red (R) color filter that transmits light in the red wavelength range, a green (G) color filter that transmits light in the green wavelength range, and a blue (B) color filter that transmits light in the blue wavelength range can be used. Each colored layer can be made of one or more of a metal material, a resin material, a pigment, and a dye. The colored layers are formed at desired positions by a printing method, an inkjet method, an etching method using photolithography, or the like.

[0290] Various optical components can be disposed on the outer surface of the substrate 352 (the surface opposite the substrate 351). Examples of optical components include a polarizing plate, a retardation plate, a light diffusion layer (such as a diffusion film), an anti-reflection layer, and a light-collecting film. Furthermore, the outer surface of the substrate 352 may be provided with a surface protection layer, such as an antistatic film to prevent dust adhesion, a water-repellent film to prevent dirt adhesion, a hard coat film to prevent scratches during use, or an impact-absorbing layer. For example, a glass or silica layer can be provided as the surface protection layer to prevent surface contamination and scratches. Alternatively, DLC (diamond-like carbon), aluminum oxide, polyester-based materials, or polycarbonate-based materials may be used as the surface protection layer. It is preferable to use a material with high transmittance to visible light for the surface protection layer. It is also preferable to use a material with high hardness for the surface protection layer.

[0291] The substrate 351 and the substrate 352 can be made of glass, quartz, ceramics, sapphire, resin, metal, alloy, semiconductor, or the like. A material that transmits light is used for the substrate on the side from which light from the light-emitting element is extracted. Using a flexible material for the substrate 351 and the substrate 352 increases the flexibility of the display device, making it possible to realize a flexible display (for example, a bendable display, a foldable display, a rollable display, a slidable display, or a stretchable display). Furthermore, a polarizing plate may be used for at least one of the substrates 351 and 352.

[0292] The substrates 351 and 352 may each be made of polyester resin such as polyethylene terephthalate (PET) or polyethylene naphthalate (PEN), polyacrylonitrile resin, acrylic resin, polyimide resin, polymethyl methacrylate resin, polycarbonate (PC) resin, polyethersulfone (PES) resin, polyamide resin (nylon, aramid, etc.), polysiloxane resin, cycloolefin resin, polystyrene resin, polyamideimide resin, polyurethane resin, polyvinyl chloride resin, polyvinylidene chloride resin, polypropylene resin, polytetrafluoroethylene (PTFE) resin, ABS resin, cellulose nanofiber, etc. At least one of the substrates 351 and 352 may be made of glass having a thickness sufficient to provide flexibility.

[0293] When a circularly polarizing plate is superimposed on a display device, it is preferable that the display device has a substrate with high optical isotropy. A substrate with high optical isotropy has low birefringence (it can also be said that the amount of birefringence is small). Examples of films with high optical isotropy include triacetyl cellulose (TAC, also called cellulose triacetate) films, cycloolefin polymer (COP) films, cycloolefin copolymer (COC) films, and acrylic films.

[0294] The adhesive layer 362 can be made of various curable adhesives, such as photo-curable adhesives (e.g., ultraviolet curable), reactive curable adhesives, thermosetting adhesives, and anaerobic adhesives. Examples of such adhesives include epoxy resin, acrylic resin, silicone resin, phenolic resin, polyimide resin, imide resin, PVC (polyvinyl chloride) resin, PVB (polyvinyl butyral) resin, and EVA (ethylene vinyl acetate) resin. Materials with low moisture permeability, such as epoxy resin, are particularly preferred. Two-component resins may also be used. Adhesive sheets may also be used.

[0295] In one embodiment of the present invention, a light-emitting element can be fabricated by a vacuum process such as a vapor deposition method, or a solution process such as a spin coating method or an inkjet method. Examples of vapor deposition methods include physical vapor deposition (PVD) methods such as sputtering, ion plating, ion beam deposition, molecular beam deposition, and vacuum deposition, and chemical vapor deposition (CVD). In particular, functional layers included in the EL layer (e.g., hole injection layer, hole transport layer, hole blocking layer, light-emitting layer, electron blocking layer, electron transport layer, electron injection layer, charge generation layer, etc.) can be formed by a vapor deposition method (e.g., vacuum deposition), a coating method (e.g., dip coating, die coating, bar coating, spin coating, spray coating), a printing method (e.g., inkjet printing, screen printing (stencil printing), offset printing (lithographic printing), flexography (relief printing), gravure printing, or microcontact printing), etc.

[0296] 15B includes a light-emitting element 330R, a light-emitting element 330G, a light-emitting element 330B, a colored layer 332R that transmits red light, a colored layer 332G that transmits green light, and a colored layer 332B that transmits blue light. The display device 490B differs from the display device 490A mainly in that a light-emitting element having a common EL layer 313 and a colored layer (such as a color filter) are used for each sub-pixel of each color. Note that descriptions of parts that are the same as those of the display devices described above may be omitted.

[0297] The light emitting element 330R has a pixel electrode 311R, an EL layer 313 on the pixel electrode 311R, and a common electrode 315 on the EL layer 313. The light emitted from the light emitting element 330R is extracted as red light to the outside of the display device 490B via the colored layer 332R.

[0298] The light emitting element 330G has a pixel electrode 311G, an EL layer 313 on the pixel electrode 311G, and a common electrode 315 on the EL layer 313. Light emitted from the light emitting element 330G is extracted as green light to the outside of the display device 490B via a colored layer 332G.

[0299] The light emitting element 330B has a pixel electrode 311B, an EL layer 313 on the pixel electrode 311B, and a common electrode 315 on the EL layer 313. Light emitted from the light emitting element 330B is extracted as blue light to the outside of the display device 490B via a colored layer 332B.

[0300] The light-emitting elements 330R, 330G, and 330B each share an EL layer 313 and a common electrode 315. The configuration in which the EL layer 313 is common to the subpixels of each color can reduce the number of manufacturing steps compared to the configuration in which different EL layers are provided for the subpixels of each color.

[0301] 15B emit white light. The white light emitted by the light-emitting elements 330R, 330G, and 330B passes through the colored layers 332R, 332G, and 332B, respectively, to obtain light of a desired color.

[0302] A light-emitting element that emits white light preferably includes two or more light-emitting layers. When two light-emitting layers are used to obtain white light, light-emitting layers may be selected such that the emission colors of the two light-emitting layers are in a complementary color relationship. For example, by making the emission color of the first light-emitting layer and the emission color of the second light-emitting layer complementary to each other, a configuration in which the light-emitting element as a whole emits white light can be obtained. Furthermore, when white light is obtained using three or more light-emitting layers, the emission colors of the three or more light-emitting layers may be combined to form a configuration in which the light-emitting element as a whole emits white light.

[0303] The EL layer 313 preferably includes, for example, a light-emitting layer having a light-emitting substance that emits blue light and a light-emitting layer having a light-emitting substance that emits visible light with a wavelength longer than blue. The EL layer 313 preferably includes, for example, a light-emitting layer that emits yellow light and a light-emitting layer that emits blue light. Alternatively, the EL layer 313 preferably includes, for example, a light-emitting layer that emits red light, a light-emitting layer that emits green light, and a light-emitting layer that emits blue light.

[0304] A tandem structure is preferably used for the light-emitting element emitting white light. Specifically, a two-stage tandem structure having a light-emitting unit that emits yellow (Y) light and a light-emitting unit that emits blue (B) light, a two-stage tandem structure having a light-emitting unit that emits red (R) light and green (G) light and a light-emitting unit that emits blue light, a three-stage tandem structure having a light-emitting unit that emits blue light, a light-emitting unit that emits yellow, yellow-green, or green light, and a light-emitting unit that emits blue light, in this order, or a three-stage tandem structure having a light-emitting unit that emits blue light, a light-emitting unit that emits yellow, yellow-green, or green light and red light, and a light-emitting unit that emits blue light, in this order, or the like can be applied. For example, examples of the number of layers of the light-emitting units and the order of colors, from the anode side, include a two-layer structure of B and Y, a two-layer structure of B and X (light-emitting unit X), a three-layer structure of B, Y, and B, and examples of the number of layers of the light-emitting layers of light-emitting unit X and the order of colors, from the anode side, include a two-layer structure of R and Y, a two-layer structure of R and G, a two-layer structure of G and R, a three-layer structure of G, R, and G, and a three-layer structure of R, G, and R. Furthermore, another layer may be provided between the two light-emitting layers.

[0305] By applying a microcavity structure, a light emitting element configured to emit white light may emit light of a specific wavelength such as red, green, or blue that is intensified.

[0306] Alternatively, for example, the light-emitting elements 330R, 330G, and 330B shown in FIG. 15B emit blue light. In this case, the EL layer 313 includes one or more light-emitting layers that emit blue light. In a pixel that emits blue light, the blue light emitted by the light-emitting element 330B can be extracted. In a pixel that emits red light and a pixel that emits green light, a color conversion layer can be provided between the light-emitting element 330R or the light-emitting element 330G and the substrate 352 to convert the blue light emitted by the light-emitting element 330R or the light-emitting element 330G into light with a longer wavelength, thereby extracting red or green light. Furthermore, it is preferable to provide a coloring layer 332R between the color conversion layer and the substrate 352 on the light-emitting element 330R, and a coloring layer 332G between the color conversion layer and the substrate 352 on the light-emitting element 330G. A portion of the light emitted by the light-emitting element may be transmitted directly without being converted by the color conversion layer. By extracting the light transmitted through the color conversion layer via the colored layer, light other than the desired color can be absorbed by the colored layer, thereby increasing the color purity of the light emitted by the sub-pixel.

[0307] 16A is an example of a display device employing an MML (metal maskless) structure. That is, the display device 490C has light-emitting elements fabricated without using a metal mask (or a fine metal mask). The structure between the substrate 351 and the insulating layer 218 and the structure between the protective layer 331 and the substrate 352 are similar to those of the display device 490A, and therefore will not be described here.

[0308] Furthermore, light-emitting elements with an MML structure can be manufactured without using a metal mask. This makes it possible to realize a display device that exceeds the upper limit of resolution due to the alignment accuracy of the metal mask. Furthermore, it is possible to eliminate the need for equipment for manufacturing the metal mask and the process of cleaning the metal mask. Furthermore, it is possible to mass-produce display devices.

[0309] Furthermore, by adopting the MML structure, it is possible to realize a display device that integrates minute light-emitting elements, and therefore, without artificially increasing the resolution by applying a special pixel arrangement such as a pentile arrangement, it is possible to realize a display device that employs a so-called stripe arrangement in which R, G, and B are arranged in one direction, and has a resolution of 500 ppi or more, 1000 ppi or more, 2000 ppi or more, 3000 ppi or more, or 5000 ppi or more.

[0310] In a light-emitting element employing an MML structure, the layer containing the light-emitting layer is not formed using a fine metal mask, but is formed by depositing the layer containing the light-emitting layer on the entire surface and then processing it using photolithography. This makes it possible to realize high-definition display devices or display devices with high aperture ratios, which have been difficult to achieve until now. Furthermore, since the light-emitting layer can be made separately for each color, a display device with extremely vivid images, high contrast, and high display quality can be realized. Furthermore, providing a sacrificial layer on the light-emitting layer reduces damage to the light-emitting layer during the manufacturing process of the display device, thereby improving the reliability of the light-emitting element.

[0311] For example, if a display device is composed of three types of light-emitting elements, namely, a light-emitting element that emits blue light, a light-emitting element that emits green light, and a light-emitting element that emits red light, three types of island-shaped light-emitting layers can be formed by repeating the deposition of the light-emitting layer and processing by photolithography three times.

[0312] In FIG. 16A, a light emitting element 330R, a light emitting element 330G, and a light emitting element 330B are provided on an insulating layer 218.

[0313] The light-emitting element 330R includes a conductive layer 324R on the insulating layer 218, a conductive layer 326R on the conductive layer 324R, a layer 333R on the conductive layer 326R, a common layer 314 on the layer 333R, and a common electrode 315 on the common layer 314. The light-emitting element 330R shown in FIG. 16A emits red (R) light. The layer 333R includes a light-emitting layer that emits red light. In the light-emitting element 330R, the layer 333R and the common layer 314 can be collectively referred to as an EL layer. One or both of the conductive layer 324R and the conductive layer 326R can be referred to as a pixel electrode.

[0314] The light-emitting element 330G includes a conductive layer 324G on the insulating layer 218, a conductive layer 326G on the conductive layer 324G, a layer 333G on the conductive layer 326G, a common layer 314 on the layer 333G, and a common electrode 315 on the common layer 314. The light-emitting element 330G shown in FIG. 16A emits green (G) light. The layer 333G includes a light-emitting layer that emits green light. In the light-emitting element 330G, the layer 333G and the common layer 314 can be collectively referred to as an EL layer. One or both of the conductive layer 324G and the conductive layer 326G can be referred to as a pixel electrode.

[0315] The light-emitting element 330B includes a conductive layer 324B on the insulating layer 218, a conductive layer 326B on the conductive layer 324B, a layer 333B on the conductive layer 326B, a common layer 314 on the layer 333B, and a common electrode 315 on the common layer 314. The light-emitting element 330B shown in FIG. 16A emits blue (B) light. The layer 333B includes a light-emitting layer that emits blue light. In the light-emitting element 330B, the layer 333B and the common layer 314 can be collectively referred to as an EL layer. One or both of the conductive layer 324B and the conductive layer 326B can be referred to as a pixel electrode.

[0316] In this specification and the like, among the EL layers included in the light-emitting elements, layers provided in an island shape for each light-emitting element are referred to as layers 333B, 333G, or 333R, and a layer shared by a plurality of light-emitting elements is referred to as a common layer 314. Note that in this specification and the like, the layers 333R, 333G, and 333B may be referred to as island-shaped EL layers or EL layers formed in an island shape, without including the common layer 314.

[0317] The layers 333R, 333G, and 333B are spaced apart from one another. By providing an island-shaped EL layer for each light-emitting element, leakage current between adjacent light-emitting elements can be suppressed. This makes it possible to prevent unintended light emission due to crosstalk, and realize a display device with extremely high contrast.

[0318] 16A, the layers 333R, 333G, and 333B are all shown to have the same thickness, but this is not limitative. The layers 333R, 333G, and 333B may have different thicknesses.

[0319] The conductive layer 324R is connected to a transistor (not shown) included in a pixel circuit corresponding to the light-emitting element 330R via an opening provided in the insulating layer 218 or the like. The conductive layer 324G is connected to a transistor (not shown) included in a pixel circuit corresponding to the light-emitting element 330G. The conductive layer 324B is connected to a transistor (not shown) included in a pixel circuit corresponding to the light-emitting element 330B.

[0320] The conductive layers 324R, 324G, and 324B are formed to cover the openings provided in the insulating layer 218. A layer 328 is filled in the recesses of the conductive layers 324R, 324G, and 324B, respectively.

[0321] The layer 328 has a function of planarizing the recesses of the conductive layer 324R, the conductive layer 324G, and the conductive layer 324B. The conductive layer 326R, the conductive layer 326G, and the conductive layer 326B, which are connected to the conductive layer 324R, the conductive layer 324G, and the conductive layer 324B, are provided on the conductive layer 324R, the conductive layer 324G, and the conductive layer 328. Therefore, the regions overlapping with the recesses of the conductive layer 324R, the conductive layer 324G, and the conductive layer 324B can also be used as light-emitting regions, thereby increasing the aperture ratio of the pixel. It is preferable to use a conductive layer that functions as a reflective electrode for the conductive layer 324R and the conductive layer 326R.

[0322] The layer 328 may be an insulating layer or a conductive layer. Various inorganic insulating materials, organic insulating materials, and conductive materials can be used as appropriate for the layer 328. In particular, the layer 328 is preferably formed using an insulating material, and more preferably using an organic insulating material. For example, the organic insulating material that can be used for the insulating layer 237 can be used for the layer 328.

[0323] 16A shows an example in which the top surface of layer 328 has a flat portion, but there is no particular limitation on the shape of layer 328. The top surface of layer 328 may have at least one of a convex curved surface, a concave curved surface, and a flat surface.

[0324] The height of the upper surface of layer 328 and the height of the upper surface of conductive layer 324R may be the same or different from each other. For example, the height of the upper surface of layer 328 may be lower or higher than the height of the upper surface of conductive layer 324R.

[0325] The end of the conductive layer 326R may be aligned with the end of the conductive layer 324R, or may cover the side surface of the end of the conductive layer 324R. The end of each of the conductive layers 324R and 326R preferably has a tapered shape. Specifically, the end of each of the conductive layers 324R and 326R preferably has a tapered shape with a taper angle greater than 0 degrees and less than 90 degrees. When the end of the pixel electrode has a tapered shape, the layer 333R provided along the side surface of the pixel electrode has an inclined portion. By tapering the side surface of the pixel electrode, the coverage of the EL layer provided along the side surface of the pixel electrode can be improved.

[0326] The conductive layers 324G and 326G, as well as the conductive layers 324B and 326B, are similar to the conductive layers 324R and 326R, and therefore detailed description thereof will be omitted.

[0327] The top surface and side surfaces of the conductive layer 326R are covered with the layer 333R. Similarly, the top surface and side surfaces of the conductive layer 326G are covered with the layer 333G, and the top surface and side surfaces of the conductive layer 326B are covered with the layer 333B. Therefore, the entire region where the conductive layers 326R, 326G, and 326B are provided can be used as the light-emitting regions of the light-emitting elements 330R, 330G, and 330B, thereby increasing the aperture ratio of the pixel.

[0328] Part of the top surface and side surfaces of each of the layers 333R, 333G, and 333B are covered with an insulating layer 325 and an insulating layer 327. A common layer 314 is provided on the layers 333R, 333G, and 333B and the insulating layer 325 and the insulating layer 327, and a common electrode 315 is provided on the common layer 314. The common layer 314 and the common electrode 315 are each a continuous film provided in common to a plurality of light-emitting elements.

[0329] 16A, the insulating layer 237 shown in FIG. 15A and the like is not provided between the conductive layer 326R and the layer 333R. That is, the display device 490C does not have an insulating layer (also referred to as a partition wall, bank, or spacer) that is in contact with the pixel electrode and covers the upper edge of the pixel electrode. Therefore, the distance between adjacent light-emitting elements can be made extremely narrow. Therefore, a high-definition and high-resolution display device can be obtained. Furthermore, a mask (e.g., a photomask) for forming the insulating layer is not required, which reduces the manufacturing cost of the display device.

[0330] As described above, the layers 333R, 333G, and 333B each have a light-emitting layer. The layers 333R, 333G, and 333B each preferably have a light-emitting layer and a carrier transport layer (electron transport layer or hole transport layer) on the light-emitting layer. Alternatively, the layers 333R, 333G, and 333B each preferably have a light-emitting layer and a carrier block layer (hole block layer or electron block layer) on the light-emitting layer. Alternatively, the layers 333R, 333G, and 333B each preferably have a light-emitting layer, a carrier block layer on the light-emitting layer, and a carrier transport layer on the carrier block layer. Because the surfaces of the layers 333R, 333G, and 333B are exposed during the manufacturing process of the display device, providing one or both of a carrier transport layer and a carrier block layer on the light-emitting layer can prevent the light-emitting layer from being exposed to the outermost surface and reduce damage to the light-emitting layer. This can improve the reliability of the light-emitting element.

[0331] The common layer 314 includes, for example, an electron injection layer or a hole injection layer. Alternatively, the common layer 314 may include a stack of an electron transport layer and an electron injection layer, or a stack of a hole transport layer and a hole injection layer. The common layer 314 is shared by the light-emitting element 330R, the light-emitting element 330G, and the light-emitting element 330B.

[0332] The side surfaces of the layers 333R, 333G, and 333B are covered with the insulating layer 325. The insulating layer 327 covers the side surfaces of the layers 333R, 333G, and 333B with the insulating layer 325 interposed therebetween.

[0333] The side surfaces (and even part of the top surfaces) of the layers 333R, 333G, and 333B are covered with at least one of the insulating layer 325 and the insulating layer 327, which prevents the common layer 314 (or the common electrode 315) from contacting the pixel electrode and the side surfaces of the layers 333R, 333G, and 333B, thereby preventing short circuits in the light-emitting element, thereby improving the reliability of the light-emitting element.

[0334] The insulating layer 325 is preferably in contact with each side surface of the layer 333R, the layer 333G, and the layer 333B. When the insulating layer 325 is in contact with the layer 333R, the layer 333G, and the layer 333B, peeling of the layer 333R, the layer 333G, and the layer 333B can be prevented, and the reliability of the light-emitting element can be improved.

[0335] The insulating layer 327 is provided on the insulating layer 325 so as to fill the recesses in the insulating layer 325. The insulating layer 327 preferably covers at least a part of the side surface of the insulating layer 325.

[0336] By providing the insulating layers 325 and 327, the gaps between adjacent island-shaped layers can be filled, which reduces large unevenness in height on the surface where layers (for example, the carrier injection layer, the common electrode, etc.) are formed on the island-shaped layers, thereby making the surface flatter, thereby improving the coverage of the carrier injection layer, the common electrode, etc.

[0337] The common layer 314 and the common electrode 315 are provided over the layer 333R, the layer 333G, the layer 333B, the insulating layer 325, and the insulating layer 327. Before the insulating layer 325 and the insulating layer 327 are provided, a step is generated between a region where the pixel electrode and the island-shaped EL layer are provided and a region where the pixel electrode and the island-shaped EL layer are not provided (a region between light-emitting elements). In the display device of one embodiment of the present invention, the insulating layer 325 and the insulating layer 327 can flatten the step, thereby improving the coverage of the common layer 314 and the common electrode 315. Therefore, poor connection due to disconnection can be suppressed. Furthermore, an increase in electrical resistance caused by a local thinning of the common electrode 315 due to the step can be suppressed.

[0338] The upper surface of the insulating layer 327 preferably has a shape with high flatness. The upper surface of the insulating layer 327 may have at least one of a flat surface, a convex curved surface, and a concave curved surface. For example, the upper surface of the insulating layer 327 preferably has a convex curved surface shape with a large radius of curvature.

[0339] An inorganic insulating film can be used for the insulating layer 325. Examples of materials that can be used for the inorganic insulating film include oxide, nitride, oxynitride, and nitride oxide. Specific examples of these inorganic insulating films are as described above. The insulating layer 325 may have a single-layer structure or a stacked-layer structure. Aluminum oxide is particularly preferable because it has a high etching selectivity with respect to the EL layer and protects the EL layer in the formation of the insulating layer 327 described later. By using an inorganic insulating film such as an aluminum oxide film, a hafnium oxide film, or a silicon oxide film formed by an ALD method as the insulating layer 325, the insulating layer 325 can be formed with fewer pinholes and excellent protection of the EL layer. The insulating layer 325 may also have a stacked-layer structure of a film formed by an ALD method and a film formed by a sputtering method. The insulating layer 325 may have a stacked-layer structure of, for example, an aluminum oxide film formed by an ALD method and a silicon nitride film formed by a sputtering method.

[0340] The insulating layer 325 preferably functions as a barrier insulating layer against at least one of water and oxygen. The insulating layer 325 preferably has a function of suppressing diffusion of at least one of water and oxygen. The insulating layer 325 preferably has a function of capturing or fixing (also referred to as gettering) at least one of water and oxygen.

[0341] The insulating layer 325 has a function as a barrier insulating layer, which can suppress the entry of impurities (typically, at least one of water and oxygen) that may diffuse into each light-emitting element from the outside. With this structure, a highly reliable light-emitting element and a highly reliable display device can be provided.

[0342] The insulating layer 325 preferably has a low impurity concentration. This can prevent impurities from entering the EL layer from the insulating layer 325 and causing deterioration of the EL layer. Furthermore, by reducing the impurity concentration in the insulating layer 325, the barrier properties against at least one of water and oxygen can be improved. For example, it is desirable that the insulating layer 325 has a sufficiently low concentration of either hydrogen or carbon, or preferably both.

[0343] The insulating layer 327 provided on the insulating layer 325 has a function of flattening large unevenness of the insulating layer 325 formed between adjacent light-emitting elements. In other words, the insulating layer 327 has an effect of improving the flatness of the surface on which the common electrode 315 is formed.

[0344] An insulating layer containing an organic material can be used as the insulating layer 327. It is preferable to use a photosensitive organic resin as the organic material, and for example, it is preferable to use a photosensitive resin composition containing an acrylic resin. Note that in this specification and the like, the term "acrylic resin" does not refer only to polymethacrylic acid ester or methacrylic resin, but may refer to all acrylic polymers in a broad sense.

[0345] The insulating layer 327 may be made of an acrylic resin, a polyimide resin, an epoxy resin, an imide resin, a polyamide resin, a polyimideamide resin, a silicone resin, a siloxane resin, a benzocyclobutene-based resin, a phenolic resin, or a precursor of any of these resins. Alternatively, the insulating layer 327 may be made of an organic material such as polyvinyl alcohol (PVA), polyvinyl butyral, polyvinylpyrrolidone, polyethylene glycol, polyglycerin, pullulan, water-soluble cellulose, or an alcohol-soluble polyamide resin. Alternatively, a photoresist may be used as the photosensitive resin. Either a positive-type material or a negative-type material may be used as the photosensitive organic resin.

[0346] The insulating layer 327 may be made of a material that absorbs visible light. The insulating layer 327 absorbs light emitted from a light-emitting element, thereby preventing light from leaking from the light-emitting element to an adjacent light-emitting element through the insulating layer 327 (stray light). This can improve the display quality of the display device. Furthermore, since the display quality can be improved without using a polarizing plate in the display device, the display device can be made lighter and thinner.

[0347] Examples of materials that absorb visible light include materials containing pigments such as black, materials containing dyes, light-absorbing resin materials (e.g., polyimide), and resin materials that can be used for color filters (color filter materials). In particular, using a resin material in which two or more color filter materials are laminated or mixed is preferable because it can enhance the visible light blocking effect. In particular, mixing three or more color filter materials makes it possible to form a black or nearly black resin layer.

[0348] 16B includes a light-emitting element 330R, a light-emitting element 330G, a light-emitting element 330B, a colored layer 332R that transmits red light, a colored layer 332G that transmits green light, and a colored layer 332B that transmits blue light. The display device 490D differs from the display device 490C mainly in that the subpixels of each color include light-emitting elements having layers 333R, 333G, and 333B, respectively, and colored layers (such as color filters). Note that descriptions of parts that are the same as those of the display devices described above may be omitted.

[0349] The light emitted from the light-emitting element 330R is extracted as red light to the outside of the display device 490D via the colored layer 332R. Similarly, the light emitted from the light-emitting element 330G is extracted as green light to the outside of the display device 490D via the colored layer 332G. The light emitted from the light-emitting element 330B is extracted as blue light to the outside of the display device 490D via the colored layer 332B.

[0350] The light-emitting element 330R, the light-emitting element 330G, and the light-emitting element 330B each include a layer 333R, a layer 333G, and a layer 333B, respectively. The layers 333R, 333G, and 333B are formed using the same material and in the same process. The layers 333R, 333G, and 333B are spaced apart from one another. By providing an island-shaped EL layer for each light-emitting element, leakage current between adjacent light-emitting elements can be suppressed. This prevents unintended light emission due to crosstalk, enabling a display device with extremely high contrast to be realized.

[0351] 16B emit white light. The white light emitted by the light-emitting elements 330R, 330G, and 330B passes through the colored layers 332R, 332G, and 332B, respectively, to obtain light of a desired color.

[0352] Alternatively, for example, the light-emitting elements 330R, 330G, and 330B shown in FIG. 16B emit blue light. In this case, the layers 333R, 333G, and 333B each include one or more light-emitting layers that emit blue light. In a pixel that emits blue light, the blue light emitted by the light-emitting element 330B can be extracted. In a pixel that emits red light and a pixel that emits green light, a color conversion layer can be provided between the light-emitting element 330R or the light-emitting element 330G and the substrate 352 to convert the blue light emitted by the light-emitting element 330R or the light-emitting element 330G into light with a longer wavelength, thereby extracting red or green light. Furthermore, it is preferable to provide a coloring layer 332R between the color conversion layer and the substrate 352 on the light-emitting element 330R, and a coloring layer 332G between the color conversion layer and the substrate 352 on the light-emitting element 330G. By extracting the light transmitted through the color conversion layer via the colored layer, light other than the desired color can be absorbed by the colored layer, thereby increasing the color purity of the light emitted by the sub-pixel.

[0353] This embodiment mode can be implemented by appropriately combining at least a part thereof with other embodiment modes described in this specification and the like.

[0354] Embodiment 6 In this embodiment, electronic devices of one embodiment of the present invention will be described with reference to FIGS.

[0355] The electronic devices of this embodiment include a display device using the display device of one embodiment of the present invention or a display device using the semiconductor device of one embodiment of the present invention in a display portion. The display device of one embodiment of the present invention can easily achieve high definition and high resolution. Therefore, the display device can be used in the display portion of various electronic devices.

[0356] Note that the semiconductor device of one embodiment of the present invention can be applied to portions other than the display portion of electronic devices. For example, the use of the semiconductor device of one embodiment of the present invention in a control portion of an electronic device is preferable because it enables low power consumption.

[0357] Examples of electronic devices include electronic devices with relatively large screens such as television sets, desktop or notebook computers, computer monitors, digital signage, and large game machines such as pachinko machines, as well as digital cameras, digital video cameras, digital photo frames, mobile phones, portable game machines, personal digital assistants, and sound playback devices.

[0358] In particular, the display device of one embodiment of the present invention can have high resolution and thus can be used in electronic devices having a relatively small display portion. Examples of such electronic devices include wearable devices that can be worn on the wrist, such as a wristwatch-type information terminal and a bracelet-type information terminal, and wearable devices that can be worn on the head, such as VR devices such as a head-mounted display, glasses-type AR devices, SR (Substitutional Reality) devices, MR (Mixed Reality) devices, and devices equipped with spatial computing, such as a spatial computer.

[0359] The display device of one embodiment of the present invention preferably has an extremely high resolution such as HD (1280 × 720 pixels), FHD (1920 × 1080 pixels), WQHD (2560 × 1440 pixels), WQXGA (2560 × 1600 pixels), 4K (3840 × 2160 pixels), or 8K (7680 × 4320 pixels). A resolution of 4K, 8K, or higher is particularly preferable. Furthermore, the pixel density (resolution) of the display device of one embodiment of the present invention is preferably 100 ppi or higher, more preferably 300 ppi or higher, more preferably 500 ppi or higher, more preferably 1000 ppi or higher, more preferably 2000 ppi or higher, more preferably 3000 ppi or higher, more preferably 5000 ppi or higher, and even more preferably 7000 ppi or higher. By using a display device having either or both of high resolution and high definition, it is possible to further enhance the sense of realism and depth. Furthermore, the screen ratio (aspect ratio) of the display device of one embodiment of the present invention is not particularly limited. For example, the display device can support various screen ratios such as 1:1 (square), 4:3, 16:9, or 16:10.

[0360] The electronic device of this embodiment may have a sensor (including the function of detecting, detecting, or measuring force, displacement, position, velocity, acceleration, angular velocity, rotation speed, distance, light, liquid, magnetism, temperature, chemical substance, sound, time, hardness, electric field, current, voltage, power, radiation, flow rate, humidity, gradient, vibration, odor, or infrared rays).

[0361] The electronic device of the present embodiment can have various functions, such as a function to display various information (still images, moving images, text images, etc.) on a display unit, a touch panel function, a function to display a calendar, date, time, etc., a function to execute various software (programs), a wireless communication function, and a function to read out programs or data recorded on a recording medium.

[0362] 17A to 17D , examples of wearable devices that can be worn on the head are described. These wearable devices have at least one of the functions of displaying AR content, VR content, SR content, and MR content. By having an electronic device with the function of displaying at least one of AR, VR, SR, and MR content, it is possible to enhance the sense of immersion felt by the user.

[0363] The electronic device 700A shown in FIG. 17A and the electronic device 700B shown in FIG. 17B each have a pair of display panels 751, a pair of housings 721, a communication unit (not shown), a pair of mounting units 723, a control unit (not shown), an imaging unit (not shown), a pair of optical members 753, a frame 757, and a pair of nose pads 758.

[0364] The display device of one embodiment of the present invention can be applied to the display panel 751. Therefore, the electronic device can provide an extremely high-definition display.

[0365] The electronic device 700A and the electronic device 700B can each project an image displayed on the display panel 751 onto a display area 756 of the optical member 753. Because the optical member 753 is translucent, the user can see the image displayed in the display area superimposed on a transmitted image visually recognized through the optical member 753. Therefore, the electronic device 700A and the electronic device 700B are each electronic devices capable of AR display.

[0366] The electronic device 700A and the electronic device 700B may be provided with a camera capable of capturing an image of the front as an imaging unit. Furthermore, the electronic device 700A and the electronic device 700B may each be provided with an acceleration sensor such as a gyro sensor, thereby detecting the orientation of the user's head and displaying an image corresponding to that orientation in the display area 756.

[0367] The communication unit has a wireless communication device, and can supply a video signal, etc. Instead of or in addition to the wireless communication device, a connector to which a cable through which a video signal and a power supply potential are supplied may be provided.

[0368] The electronic device 700A and the electronic device 700B are provided with batteries, which can be charged wirelessly, by wire, or both.

[0369] The housing 721 may be provided with a touch sensor module. The touch sensor module has a function of detecting a touch on the outer surface of the housing 721. The touch sensor module can detect a tap operation or a slide operation by the user and perform various processes. For example, a tap operation can perform a process such as pausing or resuming a video, and a slide operation can perform a process such as fast-forwarding or fast-rewinding. Furthermore, providing a touch sensor module on each of the two housings 721 can expand the range of operations.

[0370] Various touch sensors can be used as the touch sensor module. For example, various types of touch sensors can be used, such as a capacitance type, a resistive film type, an infrared type, an electromagnetic induction type, a surface acoustic wave type, or an optical type. In particular, it is preferable to use a capacitance type or an optical type sensor in the touch sensor module.

[0371] When an optical touch sensor is used, a photoelectric conversion element can be used as the light receiving element. The active layer of the photoelectric conversion element can be made of either an inorganic semiconductor or an organic semiconductor, or both.

[0372] The electronic device 800A shown in Figure 17C and the electronic device 800B shown in Figure 17D each have a pair of display units 820, a housing 821, a communication unit 822, a pair of mounting units 823, a control unit 824, a pair of imaging units 825, and a pair of lenses 832.

[0373] The display device of one embodiment of the present invention can be applied to the display portion 820. Therefore, an electronic device capable of displaying images with extremely high definition can be provided, which allows a user to feel a high sense of immersion.

[0374] The display unit 820 is provided inside the housing 821 at a position that can be viewed through the lens 832. In addition, by displaying different images on the pair of display units 820, it is possible to perform three-dimensional display using parallax.

[0375] The electronic device 800A and the electronic device 800B can be said to be electronic devices for VR. A user wearing the electronic device 800A or the electronic device 800B can view an image displayed on the display unit 820 through the lens 832.

[0376] It is preferable that the electronic device 800A and the electronic device 800B each have a mechanism for adjusting the left-right positions of the lens 832 and the display unit 820 so that they are optimally positioned according to the position of the user's eyes. It is also preferable that the electronic device 800A and the electronic device 800B each have a mechanism for adjusting the focus by changing the distance between the lens 832 and the display unit 820.

[0377] The mounting unit 823 allows the user to wear the electronic device 800A or the electronic device 800B on the head. Note that, in Fig. 17C and other figures, the mounting unit 823 is shaped like the temples of glasses, but is not limited to this. The mounting unit 823 may be shaped like a helmet or a band so that the user can wear it.

[0378] The imaging unit 825 has a function of acquiring external information. Data acquired by the imaging unit 825 can be output to the display unit 820. An image sensor can be used for the imaging unit 825. Furthermore, multiple cameras may be provided to support multiple angles of view, such as telephoto and wide-angle.

[0379] Although an example including the imaging unit 825 is shown here, a distance measuring sensor (hereinafter also referred to as a detection unit) capable of measuring the distance to an object may be provided. That is, the imaging unit 825 is one aspect of the detection unit. For example, an image sensor or a range image sensor such as a LIDAR (Light Detection and Ranging) can be used as the detection unit. By using an image obtained by the camera and an image obtained by the range image sensor, more information can be obtained, enabling more accurate gesture operations.

[0380] The electronic device 800A may have a vibration mechanism that functions as a bone conduction earphone. For example, a configuration having such a vibration mechanism can be applied to one or more of the display unit 820, the housing 821, and the wearing unit 823. This allows a user to enjoy video and audio simply by wearing the electronic device 800A, without the need for separate audio equipment such as headphones, earphones, or speakers.

[0381] The electronic device 800A and the electronic device 800B may each have an input terminal to which a cable can be connected for supplying a video signal from a video output device or the like, power for charging a battery provided in the electronic device, and the like.

[0382] The electronic device of one embodiment of the present invention may have a function of wirelessly communicating with an earphone 750. The earphone 750 includes a communication unit (not shown) and has a wireless communication function. The earphone 750 can receive information (e.g., audio data) from the electronic device through the wireless communication function. For example, an electronic device 700A shown in FIG. 17A has a function of transmitting information to the earphone 750 through the wireless communication function. Furthermore, for example, an electronic device 800A shown in FIG. 17C has a function of transmitting information to the earphone 750 through the wireless communication function.

[0383] The electronic device may have an earphone unit. Electronic device 700B shown in Fig. 17B has earphone unit 727. For example, earphone unit 727 and the control unit may be configured to be connected to each other by wire. Part of the wiring connecting earphone unit 727 and the control unit may be disposed inside housing 721 or attachment unit 723.

[0384] Similarly, electronic device 800B shown in Fig. 17D has earphone unit 827. For example, earphone unit 827 and control unit 824 can be configured to be connected to each other by wire. Part of the wiring connecting earphone unit 827 and control unit 824 may be disposed inside housing 821 or wearing unit 823. Furthermore, earphone unit 827 and wearing unit 823 may have magnets. This allows earphone unit 827 to be fixed to wearing unit 823 by magnetic force, which is preferable as it makes storage easier.

[0385] The electronic device may have an audio output terminal to which earphones or headphones can be connected. The electronic device may also have one or both of an audio input terminal and an audio input mechanism. For example, a sound collection device such as a microphone can be used as the audio input mechanism. By having the audio input mechanism, the electronic device may be endowed with the functionality of a so-called headset.

[0386] As described above, the electronic devices of one embodiment of the present invention are suitable for both glasses-type devices (such as the electronic devices 700A and 700B) and goggle-type devices (such as the electronic devices 800A and 800B).

[0387] An electronic device according to one embodiment of the present invention can transmit information to an earphone via a wired or wireless connection.

[0388] The electronic device 6500 shown in FIG. 18A is a portable information terminal that can be used as a smartphone.

[0389] The electronic device 6500 includes a housing 6501, a display portion 6502, a power button 6503, a button 6504, a speaker 6505, a microphone 6506, a camera 6507, and a light source 6508. The display portion 6502 has a touch panel function.

[0390] The display device of one embodiment of the present invention can be applied to the display portion 6502 .

[0391] FIG. 18B is a schematic cross-sectional view including the end of the housing 6501 on the microphone 6506 side.

[0392] A light-transmitting protective member 6510 is provided on the display surface side of the housing 6501, and a display panel 6511, optical members 6512, a touch sensor panel 6513, a printed circuit board 6517, a battery 6518, etc. are arranged in the space surrounded by the housing 6501 and the protective member 6510.

[0393] A display panel 6511, an optical member 6512, and a touch sensor panel 6513 are fixed to the protective member 6510 by adhesive layers (not shown).

[0394] In a region outside the display portion 6502, a part of the display panel 6511 is folded back, and an FPC 6515 is connected to the folded back part. An IC 6516 is mounted on the FPC 6515. The FPC 6515 is connected to a terminal provided on a printed circuit board 6517.

[0395] A flexible display can be applied to the display panel 6511. In this case, an extremely lightweight electronic device can be realized. In addition, since the display panel 6511 is extremely thin, a large-capacity battery 6518 can be mounted while suppressing the thickness of the electronic device. In addition, by folding back a part of the display panel 6511 and arranging a connection portion with the FPC 6515 on the back side of the pixel portion, an electronic device with a narrow frame can be realized.

[0396] 18C shows an example of a television set. In a television set 7100, a display portion 7000 is incorporated into a housing 7101. Here, the housing 7101 is supported by a stand 7103.

[0397] The display device of one embodiment of the present invention can be applied to the display portion 7000 .

[0398] 18C can be operated using operation switches provided on the housing 7101 and a separate remote control 7111. Alternatively, the display portion 7000 may be provided with a touch sensor, and the television set 7100 may be operated by touching the display portion 7000 with a finger or the like. The remote control 7111 may have a display portion that displays information output from the remote control 7111. Using operation keys or a touch panel provided on the remote control 7111, the channel and volume can be controlled, and an image displayed on the display portion 7000 can be operated.

[0399] The television device 7100 is configured to include a receiver, a modem, and the like. Ordinary television broadcasts can be received using the receiver. Furthermore, by connecting to a wired or wireless communication network via the modem, it is possible to perform one-way (only from a sender to a receiver) or two-way (between a sender and a receiver, or between receivers, etc.) information communication.

[0400] 18D shows an example of a notebook computer 7200. The notebook computer 7200 includes a housing 7211, a keyboard 7212, a pointing device 7213, and an external connection port 7214. The housing 7211 includes a display portion 7000.

[0401] The display device of one embodiment of the present invention can be applied to the display portion 7000 .

[0402] 18E and 18F show an example of digital signage.

[0403] 18E includes a housing 7301, a display portion 7000, and a speaker 7303. The digital signage 7300 may further include an LED lamp, operation keys (including a power switch or an operation switch), a connection terminal, various sensors, a microphone, and the like.

[0404] 18F shows a digital signage 7400 attached to a cylindrical pillar 7401. The digital signage 7400 has a display unit 7000 provided along the curved surface of the pillar 7401.

[0405] 18E and 18F, the display device of one embodiment of the present invention can be applied to the display portion 7000.

[0406] The larger the display unit 7000, the more information can be provided at one time. Also, the larger the display unit 7000, the more easily it will attract people's attention, which can increase the advertising effectiveness of, for example, advertisements.

[0407] Applying a touch panel to the display unit 7000 is preferable because it not only displays images or videos on the display unit 7000 but also allows the user to intuitively operate it. Furthermore, when used to provide information such as route information or traffic information, the intuitive operation can improve usability.

[0408] 18E and 18F , the digital signage 7300 or the digital signage 7400 is preferably capable of wirelessly linking with an information terminal 7311 or an information terminal 7411, such as a smartphone carried by a user. For example, advertising information displayed on the display unit 7000 can be displayed on the screen of the information terminal 7311 or the information terminal 7411. Furthermore, by operating the information terminal 7311 or the information terminal 7411, the display on the display unit 7000 can be switched.

[0409] The digital signage 7300 or the digital signage 7400 can also be made to run a game using the screen of the information terminal 7311 or the information terminal 7411 as an operation means (controller), thereby allowing an unspecified number of users to simultaneously participate in and enjoy the game.

[0410] The electronic device shown in Figures 19A to 19G has a housing 9000, a display unit 9001, a speaker 9003, operation keys 9005 (including a power switch or an operation switch), a connection terminal 9006, a sensor 9007 (including a function to sense, detect, or measure force, displacement, position, speed, acceleration, angular velocity, rotation speed, distance, light, liquid, magnetism, temperature, chemical substance, sound, time, hardness, electric field, current, voltage, power, radiation, flow rate, humidity, gradient, vibration, odor, or infrared rays), and a microphone 9008.

[0411] 19A to 19G, the display device of one embodiment of the present invention can be applied to the display portion 9001.

[0412] The electronic devices shown in Figures 19A to 19G have various functions. For example, they may have a function to display various information (still images, videos, text images, etc.) on a display unit, a touch panel function, a function to display a calendar, date, or time, a function to control processing using various software (programs), a wireless communication function, and a function to read and process programs or data recorded on a recording medium. Note that the functions of the electronic devices are not limited to these, and they may have various other functions. The electronic devices may have multiple display units. Furthermore, the electronic devices may be provided with a camera or the like to capture still images or videos and store them on a recording medium (external or built-in to the camera), and may have a function to display the captured images on the display unit.

[0413] The electronic device shown in FIGS. 19A to 19G will be described in detail below.

[0414] FIG. 19A is a perspective view showing a mobile information terminal 9101. The mobile information terminal 9101 can be used as, for example, a smartphone. Note that the mobile information terminal 9101 may be provided with a speaker 9003, a connection terminal 9006, a sensor 9007, and the like. The mobile information terminal 9101 can display text and image information on multiple surfaces. FIG. 19A shows an example in which three icons 9050 are displayed. Information 9051, indicated by a dashed rectangle, can also be displayed on another surface of the display unit 9001. Examples of the information 9051 include notifications of incoming emails, SNS messages, or phone calls, as well as the title, sender name, and date and time of the email or SNS message. Other examples include the time, remaining battery power, and signal strength. Alternatively, an icon 9050 or the like may be displayed in the position where the information 9051 is displayed.

[0415] 19B is a perspective view showing a mobile information terminal 9102. The mobile information terminal 9102 has a function of displaying information on three or more surfaces of the display unit 9001. Here, an example is shown in which information 9052, information 9053, and information 9054 are displayed on different surfaces. For example, while the user places the mobile information terminal 9102 in a breast pocket of clothes, the user can check information 9053 displayed in a position that can be observed from above the mobile information terminal 9102. For example, the user can check the display without taking the mobile information terminal 9102 out of the pocket and decide whether to answer a call.

[0416] 19C is a perspective view showing a tablet terminal 9103. The tablet terminal 9103 is capable of executing various applications such as mobile phone calls, e-mail, text browsing and creation, music playback, internet communication, and computer games, for example. The tablet terminal 9103 has a display unit 9001, a camera 9002, a microphone 9008, and a speaker 9003 on the front side of a housing 9000, operation keys 9005 as operation buttons on the left side of the housing 9000, and a connection terminal 9006 on the bottom of the housing 9000.

[0417] 19D is a perspective view showing a wristwatch-type mobile information terminal 9200. The mobile information terminal 9200 can be used as, for example, a smart watch (registered trademark). The display surface of the display unit 9001 is curved, and a display can be displayed along the curved display surface. The mobile information terminal 9200 can also perform hands-free calling by communicating with, for example, a headset capable of wireless communication. The mobile information terminal 9200 can also perform data transmission and charging with another information terminal through a connection terminal 9006. Note that charging may be performed by wireless power supply.

[0418] 19E to 19G are perspective views showing a foldable mobile information terminal 9201. Note that FIG. 19E is a perspective view of the mobile information terminal 9201 in an unfolded state, FIG. 19G is a perspective view of the mobile information terminal 9201 in a folded state, and FIG. 19F is a perspective view of a state in the middle of changing from one of FIG. 19E and FIG. 19G to the other. The mobile information terminal 9201 is highly portable when folded, and has a seamless, wide display area when unfolded, providing excellent visibility of the display. The display portion 9001 of the mobile information terminal 9201 is supported by three housings 9000 connected by hinges 9055. For example, the display portion 9001 can be bent with a curvature radius of 0.1 mm or more and 150 mm or less.

[0419] The structure described in this embodiment mode can be used in appropriate combination with structures described in other embodiments mode.

[0420] (Additional Notes Regarding the Description of the Present Specification, etc.) The following additional notes will be given regarding the above-described embodiments and the explanation of each configuration in the embodiments.

[0421] In this specification, "connection" includes, as an example, "electrical connection." When the term "electrical connection" is used to define the connection relationship between circuit elements as a physical entity, "electrical connection" includes, as examples, "direct connection" and "indirect connection." "A and B are directly connected" refers to a case where A and B are connected without a circuit element (e.g., a transistor or a switch; wiring is not considered a circuit element). On the other hand, "A and B are indirectly connected" refers to a case where A and B are connected via one or more circuit elements.

[0422] Here, when "A and B are indirectly connected," it refers to the following connection relationship, for example. That is, assuming that a circuit is operating, if there is a time during the operation of the circuit when electrical signal transmission or potential interaction occurs between A and B, such a circuit can be defined as an entity, and "A and B are indirectly connected." Note that even if there is a time when electrical signal transmission or potential interaction does not occur between A and B, if there is a time during the operation of the circuit when electrical signal transmission or potential interaction occurs between A and B, it can be defined as "A and B are indirectly connected." Note that "A and B are indirectly connected" is a definition of the connection relationship between circuit elements as an entity. Therefore, for example, even when a power supply voltage is not supplied to a circuit and the circuit is not operating, the circuit can be defined as an entity, and "A and B are indirectly connected" (however, for example, this is limited to the case where electrical signal transmission or potential interaction occurs between A and B during the operation of the circuit when a power supply voltage is supplied to the circuit and the circuit is operating).

[0423] Specific examples of "indirect connection" are shown below. First, an example of "A and B are indirectly connected" is when A and B are connected via the source and drain of one or more transistors, as shown in FIGS. 20A1 and 20A2. Another example of "A and B are indirectly connected" is when A and B are connected via one or more switches. When "A and B are indirectly connected," it is assumed that, assuming the circuit is operating, there is at least one time when one transistor between A and B is in an on state, a conductive state, or a state in which a current can flow. Note that "A and B are indirectly connected" also includes cases where one transistor between A and B is in an off state or a non-conductive state. When "A and B are indirectly connected," if multiple transistors are connected between A and B, it is assumed that, assuming the circuit is operating, each of the multiple transistors between A and B is in an on state, a conductive state, or a state in which a current can flow at least one time. In other words, when "A and B are indirectly connected," it is not necessary for all of the multiple transistors to be in an on state, a conductive state, or a state in which current can flow simultaneously. Therefore, when "A and B are indirectly connected," it also includes cases in which the multiple transistors between A and B are in an off state or a non-conductive state at the same time or at different times. As another example, as shown in FIG. 20A3, when A and C are connected via the source and drain of transistor TrP and B and C are connected via the source and drain of transistor TrQ, it can be defined as "A and C are indirectly connected," "B and C are indirectly connected," or "A and B are indirectly connected." However, as will be described later, when a constant potential V is supplied to C from a power supply, GND, or the like, it can be said that "A and C are indirectly connected" or "B and C are indirectly connected," but it cannot be said that "A and B are indirectly connected."

[0424] While we have provided examples of cases where an "indirect connection" can and cannot be established, we will now present another example of a case where an "indirect connection" cannot be established. Even if an electrical signal exchange or potential interaction occurs between A and B during the operation of the circuit, there are exceptional cases where it cannot be said that "A and B are indirectly connected." An example of such an exceptional case is when A and B are connected via an insulator. In other words, when A and B are connected via an insulator, it cannot be said that "A and B are indirectly connected." A specific example of a case where A and B are connected via an insulator is when a capacitive element is connected between A and B, as shown in FIG. 20A4. Another example of a case where A and B are connected via an insulator is when a gate insulating film of a transistor is interposed between A and B, as shown in FIG. 20A5. In this case, it cannot be said that "A (the gate of the transistor) and B (the source or drain of the transistor) are indirectly connected."

[0425] Another example of a case where it cannot be said that "A and B are indirectly connected" is a case where there is no timing when an electrical signal is exchanged or when potential interaction occurs between A and B. An example of this is when, as shown in Figures 20A6 and 20A7, multiple transistors are connected via their sources and drains to the path from A to B, and a constant potential V is supplied to a node between the transistors from a power supply, GND, or the like. In this case, it cannot be said that "A and B are indirectly connected," but it is possible to say that "A and V are indirectly connected" or "B and V are indirectly connected." In addition, in Figure 20A3, if A and C are connected via the source and drain of transistor TrP, and B and C are connected via the source and drain of transistor TrQ, and a constant potential V is supplied to C from a power supply or GND, etc., the connection relationship will be the same as in Figures 20A6 and 20A7, so it cannot be said that "A and B are indirectly connected," but it can be said that "A and C are indirectly connected," or "B and C are indirectly connected."

[0426] Although an example of "indirect connection" has been given above, as an example, the provision of "indirect connection" is included in the provision of "electrical connection," so when "A and B are indirectly connected," it can also be said that "A and B are electrically connected."

[0427] Next, specific examples of "direct connection" are shown. Examples of "A and B are directly connected" include cases where A and B are connected without any circuit element between them, as shown in FIGS. 20B1, 20B2, and 20B3. When A and B are connected to a power supply that supplies a constant potential V or to GND without any circuit element between them, as shown in FIGS. 20B4 and 20B5, it can be said that "A and B are directly connected," "A and V are directly connected," or "B and V are directly connected." It can also be said that "A and B are directly connected," when A (or B) is connected to a constant potential V via the source and drain of a transistor, as shown in FIG. 20B6. Because A and V or B and V are connected via the source and drain of a transistor, they cannot be said to be directly connected, but rather that "A and V are indirectly connected" or "B and V are indirectly connected."

[0428] As shown above, an example of "direct connection" has been given, but as an example, since the provisions for "direct connection" are included in the provisions for "electrical connection," if "A and B are directly connected," then "A and B are electrically connected."

[0429] Note that even when independent components are shown connected to each other in a circuit diagram, one component may have the functions of multiple components. For example, if part of a wiring also functions as an electrode, one conductive film has the functions of both the wiring and the electrode. Therefore, in this specification, the term "connection" also includes such cases where one conductive film has the functions of multiple components.

[0430] Furthermore, in this specification, the term "resistive element" can refer to, for example, a circuit element or wiring having a resistance value higher than 0 Ω. Therefore, in this specification, the term "resistive element" includes, for example, wiring having a resistance value, a transistor, diode, or coil through which current flows from drain to source. Therefore, the term "resistive element" can be replaced with terms such as "resistance," "load," or "region having a resistance value." Conversely, the terms "resistance," "load," or "region having a resistance value" can be replaced with terms such as "resistive element." The resistance value can be, for example, preferably 1 mΩ or more and 10 Ω or less, more preferably 5 mΩ or more and 5 Ω or less, and even more preferably 10 mΩ or more and 1 Ω or less. Also, for example, 1 Ω or more and 1 × 10 ９ It may be set to Ω or less.

[0431] Furthermore, when wiring is used as a resistive element, the resistance value of the resistive element may be determined by the length of the wiring. Alternatively, the resistive element may use a conductor with a different resistivity than the conductor used as the wiring. Or, when a semiconductor is used as a resistive element, the resistance value of the resistive element may be determined by doping the semiconductor with impurities.

[0432] Furthermore, in this specification, the term "capacitive element" can refer to, for example, a circuit element having a capacitance value higher than 0 F, a region of wiring having a capacitance value higher than 0 F, a parasitic capacitance, or a gate capacitance of a transistor. Therefore, in this specification, the term "capacitive element" is not limited to a circuit element including a pair of electrodes and a dielectric between the electrodes. The term "capacitive element" also includes, for example, a parasitic capacitance occurring between wirings, or a gate capacitance occurring between one of the source or drain of a transistor and the gate. Furthermore, terms such as "capacitive element," "parasitic capacitance," or "gate capacitance" can be replaced with terms such as "capacitance." Conversely, the term "capacitance" can be replaced with terms such as "capacitive element," "parasitic capacitance," or "gate capacitance." Furthermore, the term "pair of electrodes" in a "capacitive element" can be replaced with, for example, a "pair of conductors," a "pair of conductive regions," or a "pair of regions." The capacitance value can be, for example, 0.05 fF or more and 10 pF or less. Alternatively, it may be set to, for example, 1 pF or more and 10 μF or less.

[0433] In this specification and the like, a transistor has three terminals called a gate (also referred to as a gate terminal, a gate region, or a gate electrode), a source (also referred to as a source terminal, a source region, or a source electrode), and a drain (also referred to as a drain terminal, a drain region, or a drain electrode). A transistor also has a region where a channel is formed between the drain and the source (also referred to as a channel formation region). A transistor can pass a current between the source and the drain through the channel formation region. The channel formation region is a region through which a current mainly flows. A gate is a control terminal between the source and the drain that controls the amount of current flowing in the channel formation region. The two terminals that function as a source or a drain are input / output terminals of the transistor.

[0434] Note that one of the two input / output terminals serves as a source and the other as a drain depending on the conductivity type of the transistor (n-channel or p-channel) and the level of the potential applied to the three terminals of the transistor. Furthermore, for example, when the direction of current changes during circuit operation, the function as a source and the function as a drain may be interchanged. For this reason, the terms "source" and "drain" are interchangeable in this specification. Furthermore, when describing the connection relationship of a transistor, the terms "one of the source or drain" (or first electrode or first terminal) or "the other of the source or drain" (or second electrode or second terminal) are used.

[0435] Depending on the structure, a transistor may have a back gate in addition to the three terminals described above. In this case, in this specification, one of the gate or the back gate of the transistor may be referred to as a first gate, and the other of the gate or the back gate of the transistor may be referred to as a second gate. Furthermore, for the same transistor, the terms "gate" and "back gate" may be interchangeable. Furthermore, when a transistor has three or more gates, in this specification, each gate may be referred to as, for example, a first gate, a second gate, or a third gate.

[0436] In this specification, a transistor having a multi-gate structure with two or more gate electrodes can be used. A multi-gate transistor has channel formation regions connected in series, resulting in a structure in which multiple transistors are connected in series. Therefore, a multi-gate transistor can reduce off-state current and improve the transistor's breakdown voltage (improved reliability). Furthermore, when a multi-gate transistor operates in the saturation region, even if the voltage between the drain and source changes, the current between the drain and source does not change significantly, resulting in a voltage-current characteristic with a flat slope. A transistor having a voltage-current characteristic with a flat slope can realize an ideal current source circuit or an active load with a very high resistance value. As a result, a transistor having a voltage-current characteristic with a flat slope can realize, for example, a differential circuit or a current mirror circuit with good characteristics.

[0437] Furthermore, in this specification, when a single circuit element is illustrated on a circuit diagram, the circuit element may include multiple circuit elements. For example, when a single resistor is illustrated on a circuit diagram, the resistor is considered to include two or more resistors connected in series. For example, when a single capacitor is illustrated on a circuit diagram, the capacitor is considered to include two or more capacitors connected in parallel. For example, when a single transistor is illustrated on a circuit diagram, the transistor is considered to include two or more transistors connected in series, with the gates of the respective transistors connected to each other. Similarly, when a single switch is illustrated on a circuit diagram, the switch is considered to include two or more transistors, with the two or more transistors connected in series or in parallel, and with the gates of the respective transistors connected to each other.

[0438] Furthermore, in this specification, the term "node" can be replaced with other terms such as "terminal," "wiring," "electrode," "conductive layer," "conductor," or "impurity region," depending on the circuit configuration or device structure. Also, for example, "terminal" or "wiring" can be replaced with "node."

[0439] Furthermore, in this specification, "voltage" and "potential" may be used interchangeably as appropriate. "Voltage" refers to the potential difference from a reference potential. For example, if the reference potential is the ground potential (earth potential), then "voltage" can be replaced with "potential." Note that the ground potential does not necessarily mean 0V. Also, potential is relative. That is, when the reference potential changes, for example, the potential applied to wiring, the potential applied to circuits, or the potential output from circuits also changes.

[0440] Furthermore, in this specification, the terms "high-level potential" (also referred to as "high-level potential," "H potential," or "H") or "low-level potential" (also referred to as "low-level potential," "L potential," or "L") do not mean a specific potential. For example, if two wires are both described as "functioning as wires that supply a high-level potential," the high-level potentials provided by each wire do not have to be equal. Similarly, if two wires are both described as "functioning as wires that supply a low-level potential," the low-level potentials provided by each wire do not have to be equal.

[0441] Furthermore, in this specification, "electric current" refers to the phenomenon of electric charge movement (electrical conduction). For example, the statement "electrical conduction of positively charged elements is occurring" can be rephrased as "electrical conduction of negatively charged elements is occurring in the opposite direction." Therefore, in this specification, unless otherwise specified, "electric current" refers to the phenomenon of electric charge movement (electrical conduction) associated with the movement of carriers. Carriers here include, for example, electrons, holes, anions, cations, or complex ions. Note that carriers differ depending on the system through which the current flows (for example, semiconductors, metals, electrolytes, or in a vacuum). Also, for example, the "direction of current" in wiring is the direction in which positive carriers move and is expressed as a positive current quantity. In other words, the direction in which negative carriers move is the opposite direction to the direction of current and is expressed as a negative current quantity. Therefore, in this specification, if there is no specification regarding the positive or negative (or direction) of the current, a statement such as "current flows from element A to element B" may be rephrased as "current flows from element B to element A," etc. Also, a statement such as "current is input to element A" may be rephrased as "current is output from element A," etc.

[0442] Furthermore, in this specification, the ordinal numbers "first," "second," or "third" are used to avoid confusion of constituent elements. Therefore, they do not limit the number of constituent elements, nor do they limit the order of the constituent elements. For example, a constituent element referred to as "first" in one embodiment of this specification may be referred to as "second" in another embodiment or claim. Also, for example, a constituent element referred to as "first" in one embodiment of this specification may be omitted in another embodiment or claim.

[0443] Furthermore, in this specification, terms indicating arrangement, such as "above," "below," "upward," or "belowward," may be used for convenience in describing the positional relationship between components with reference to drawings. Furthermore, the positional relationship between components changes as appropriate depending on the orientation in which each component is depicted. Therefore, terms indicating arrangement described in this specification are not limited to these terms and can be rephrased appropriately. For example, the expression "insulator located on the upper surface of a conductor" can be rephrased as "insulator located on the lower surface of a conductor" by rotating the orientation of the drawing by 180 degrees. Furthermore, the expression "insulator located on the upper surface of a conductor" can be rephrased as "insulator located on the left (or right) surface of a conductor" by rotating the orientation of the drawing by 90 degrees.

[0444] Furthermore, the terms "above" and "below" do not limit the positional relationship of components to being directly above or below and in direct contact with each other. For example, the expression "electrode B on insulating layer A" does not necessarily mean that electrode B is formed on insulating layer A in direct contact with it, and does not exclude the inclusion of other components between insulating layer A and electrode B.

[0445] Furthermore, in this specification, terms such as "row" or "column" may be used to describe components arranged in a matrix and their positional relationships. Furthermore, the positional relationships between components change as appropriate depending on the direction in which each component is depicted. Therefore, terms such as "row" or "column" used in this specification are not limited to these terms and can be rephrased appropriately. For example, the expression "row direction" can be rephrased as "column direction" by rotating the orientation of the drawing by 90 degrees.

[0446] Furthermore, in this specification and the like, for example, terms such as "overlap" do not limit the state of the stacking order of components, etc. For example, the expression "electrode B overlapping insulating layer A" is not limited to the state in which electrode B is formed on insulating layer A. The expression "electrode B overlapping insulating layer A" does not exclude, for example, the state in which electrode B is formed under insulating layer A, or the state in which electrode B is formed on the right (or left) side of insulating layer A.

[0447] Furthermore, in this specification and the like, the terms "adjacent" or "close to" do not limit components to being in direct contact with each other. For example, the expression "electrode B adjacent to insulating layer A" does not necessarily mean that insulating layer A and electrode B are formed in direct contact with each other, and does not exclude the inclusion of other components between insulating layer A and electrode B.

[0448] Furthermore, in this specification and the like, terms such as "film" or "layer" may be interchangeable. For example, the term "conductive layer" may be interchangeable with the term "conductive film." For example, the term "insulating film" may be interchangeable with the term "insulating layer." Furthermore, terms such as "film" or "layer" may be interchangeable with other terms without using those terms. For example, the term "conductive layer" or "conductive film" may be interchangeable with the term "conductor." Furthermore, the term "conductor" may be interchangeable with the term "conductive layer" or "conductive film." For example, the term "insulating layer" or "insulating film" may be interchangeable with the term "insulator." Furthermore, the term "insulator" may be interchangeable with the term "insulating layer" or "insulating film."

[0449] Furthermore, in this specification and the like, terms such as "electrode," "wiring," or "terminal" do not functionally limit these components. For example, an "electrode" may be used as part of a "wiring," and vice versa. Furthermore, the terms "electrode" or "wiring" include, for example, cases where multiple "electrodes" or "wirings" are integrally formed. Furthermore, for example, a "terminal" may be used as part of a "wiring" or "electrode," and vice versa. Furthermore, the term "terminal" includes, for example, cases where multiple "electrodes," "wirings," or "terminals" are integrally formed. Therefore, for example, an "electrode" can be part of a "wiring" or "terminal." Furthermore, for example, a "terminal" can be part of a "wiring" or "electrode." Furthermore, for example, terms such as "electrode," "wiring," or "terminal" may be replaced with terms such as "region."

[0450] Furthermore, in this specification and the like, terms such as "wiring," "signal line," or "power line" may be interchangeable. For example, the term "wiring" may be changed to the term "signal line." For example, the term "wiring" may be changed to the term "power line." The reverse is also true, for example, terms such as "signal line" or "power line" may be changed to the term "wiring." The term "power line" may be changed to the term "signal line." The reverse is also true, for example, terms such as "signal line" may be changed to the term "power line." The term "potential" applied to wiring may be changed to the term "signal." The reverse is also true, for example, terms such as "signal" may be changed to the term "potential."

[0451] In addition, in this specification, a "switch" has multiple terminals and has the function of switching (selecting) conduction or non-conduction between the terminals. For example, if a switch has two terminals and both terminals are conductive, the switch is said to be in a "conductive state" or "on state." Also, if both terminals are non-conductive, the switch is said to be in a "non-conductive state" or "off state." Note that switching the switch to either the conductive state or the non-conductive state, or maintaining either the conductive state or the non-conductive state, may be referred to as "controlling the conduction state."

[0452] In other words, a switch is a device that has the function of controlling whether or not a current flows. Alternatively, a switch is a device that has the function of selecting and switching a path through which a current flows. For example, an electrical switch or a mechanical switch can be used as the switch. In other words, the switch is not limited to a specific type.

[0453] There are types of switches that are normally in a non-conductive state but can be made conductive by controlling the conductive state, and these switches are sometimes called "contact A." There are also types of switches that are normally in a conductive state but can be made non-conductive by controlling the conductive state, and these switches are sometimes called "contact B."

[0454] Examples of electrical switches include transistors (e.g., bipolar transistors or MOS transistors), diodes (e.g., PN diodes, PIN diodes, Schottky diodes, MIM (Metal Insulator Metal) diodes, MIS (Metal Insulator Semiconductor) diodes, or diode-connected transistors), and logic circuits that combine these. Note that when a transistor is operated simply as a switch, the polarity (conductivity type) of the transistor is not particularly limited.

[0455] An example of a mechanical switch is a switch that uses MEMS (microelectromechanical systems) technology. Such a switch has an electrode that can be mechanically moved, and the movement of the electrode selects a conductive state or a non-conductive state.

[0456] In this specification, the "channel length" of a transistor may refer, for example, to the distance between the source and drain in the region where the semiconductor (or the part of the semiconductor through which current flows when the transistor is ON) and the gate overlap, or to the distance between the source and drain in the region where the channel is formed.

[0457] Furthermore, in this specification, the "channel width" of a transistor may refer, for example, to the length of the portion where the source and drain face each other in the region where the semiconductor (or the portion in the semiconductor through which current flows when the transistor is ON) and the gate overlap, or to the length of the portion where the source and drain face each other in the region where the channel is formed.

[0458] In this specification and the like, terms such as "substrate," "wafer," or "die" do not limit the functionality of these components. For example, terms such as "substrate," "wafer," or "die" may be used interchangeably.

[0459] In this specification, "parallel" does not necessarily mean strictly parallel. Therefore, the term "parallel" can be appropriately interchangeable with terms such as "approximately parallel," "generally parallel," or "substantially parallel." "Parallel," "generally parallel," "generally parallel," or "substantially parallel" can include, for example, a state in which two lines or planes are arranged at an angle of -5° or more and 5° or less. Alternatively, they can include a state in which two lines or planes are arranged at an angle of -10° or more and 10° or less. Alternatively, they can include a state in which two lines or planes are arranged at an angle of -30° or more and 30° or less. Therefore, "parallel" can mean, for example, "parallel or roughly parallel." Furthermore, "perpendicular" does not necessarily mean strictly perpendicular. Therefore, the term "perpendicular" can be appropriately interchangeable with terms such as "generally perpendicular," "generally perpendicular," or "substantially perpendicular." "Perpendicular," "generally perpendicular," "generally perpendicular," or "substantially perpendicular" can include, for example, a state in which two lines or planes are arranged at an angle of 85° or more and 95° or less. Alternatively, it may include a state in which two straight lines or planes are arranged at an angle of 80° or more and 100° or less. Alternatively, it may include a state in which two straight lines or planes are arranged at an angle of 60° or more and 120° or less. Therefore, "perpendicular" may mean, for example, "perpendicular or approximately perpendicular."

[0460] In this specification, "equal heights" refers to the same height from a reference surface (e.g., a flat surface such as a substrate surface) in a cross-sectional view. For example, in a semiconductor device manufacturing process, a planarization process may expose the surface of a single layer or multiple layers. In this case, the surfaces to be planarized have the same height from the reference surface. However, depending on the processing equipment, processing method, or material of the processed surface during the planarization process, the heights of multiple layers may not be strictly equal. In this specification, "equal heights" is also used. For example, when there are two layers (here, a first layer and a second layer) with different heights relative to a reference surface, the difference between the height of the top surface of the first layer and the height of the top surface of the second layer is 20 nm or less. Therefore, "equal heights" may mean, for example, "equal heights or approximately equal heights."

[0461] In this specification, "edges coincide" means that, when viewed from above, at least a portion of the contours of stacked layers overlap. For example, this includes cases in which, in a semiconductor device manufacturing process, upper and lower layers are processed using the same mask pattern or a portion of the same mask pattern. However, strictly speaking, the contours may not overlap, and the contour of the upper layer may be located inside the contour of the lower layer, or the contour of the upper layer may be located outside the contour of the lower layer. In this specification, this case is also referred to as "edges coincide." Therefore, "edges coincide" can mean, for example, "edges coincide or approximately coincide."

[0462] In this specification, for example, when referring to counting values ​​and measurement values, or to things, methods, events, etc. that can be converted into counting values ​​or measurement values, terms such as "identical," "same," "equal," "simultaneous," "match," or "uniform" (including synonyms thereof) include an error of plus or minus 20% unless otherwise specified. Thus, for example, "identical" may mean "identical or approximately identical," "same" may mean "same or approximately the same," "equal" may mean "equal or approximately equal," "simultaneous" may mean "simultaneous or approximately simultaneous," "match" may mean "match or approximately match," and "uniform" may mean "uniform or approximately uniform."

[0463] In this specification and the like, the term "impurity" in a semiconductor refers to, for example, a substance other than the main component constituting the semiconductor. For example, an element with a concentration of less than 0.1 atomic % is an impurity. The presence of impurities in a semiconductor may, for example, increase the defect state density of the semiconductor, decrease the carrier mobility, or decrease the crystallinity. When the semiconductor is an oxide semiconductor, examples of impurities that change the characteristics of the semiconductor include Group 1 elements, Group 2 elements, Group 13 elements, Group 14 elements, Group 15 elements, and transition metals other than the main component of the oxide semiconductor. In particular, examples of impurities include hydrogen (also contained in water), lithium, sodium, silicon, boron, phosphorus, carbon, and nitrogen. For example, the inclusion of impurities in an oxide semiconductor may cause oxygen vacancies in the oxide semiconductor.

[0464] In this specification, "metal oxide" refers to an oxide of a metal in a broad sense. Metal oxides are classified into, for example, oxide insulators, oxide conductors (including transparent oxide conductors), or oxide semiconductors (also called oxide semiconductors or simply OS). For example, when a metal oxide is used in a semiconductor including the channel formation region of a transistor, the metal oxide may be referred to as an oxide semiconductor. In other words, when a metal oxide is used to constitute the channel formation region of a transistor having at least one of amplification, rectification, and switching functions, the metal oxide can be referred to as a metal oxide semiconductor. Furthermore, the description of an "OS transistor" can be replaced with a transistor having a metal oxide or oxide semiconductor.

[0465] In this specification and the like, nitrogen-containing metal oxides may also be collectively referred to as metal oxides. Nitrogen-containing metal oxides may also be referred to as metal oxynitrides.

[0466] Furthermore, in drawings and other illustrations relating to this specification, arrows indicating the X, Y, and Z directions may be included. In this specification, the "X direction" is the direction along the X-axis, and unless explicitly stated, the forward and reverse directions may not be distinguished. The same applies to the "Y direction" and "Z direction". Also, the X, Y, and Z directions are directions that intersect each other. For example, the X, Y, and Z directions are directions that are orthogonal to each other. In this specification, one of the X, Y, or Z directions may be referred to as the "first direction" or "first direction". Another may be referred to as the "second direction" or "second direction". The remaining one may be referred to as the "third direction" or "third direction".

[0467] BGL: wiring, C11: capacitor, M11: transistor, M12: transistor, M13: transistor, M14: transistor, M15: transistor, ND11: wiring, OL: wiring, SOL: wiring, 100: driver circuit, 110: level shift circuit, 120: register circuit

Claims

a level shift circuit having first to third transistors; a gate of the first transistor electrically connected to one of the source and the drain of the third transistor; a back gate of the first transistor is electrically connected to a first wiring; one of the source and the drain of the first transistor is electrically connected to a first power supply line; the other of the source and the drain of the first transistor is electrically connected to one of the source and the drain of the second transistor and to a second wiring; a gate of the second transistor electrically connected to a third wiring; the other of the source and the drain of the second transistor is electrically connected to a second power supply line; a gate of the third transistor electrically connected to a third power supply line; the other of the source and the drain of the third transistor is electrically connected to a fourth wiring; the potential of the first power supply line is higher than the potential of the second power supply line; the potential of the third power supply line is lower than the potential of the first power supply line; the signal on the fourth wiring is a signal that can be switched from a low potential level to a high potential level while the signal supplied to the first wiring is at a high potential level, and from a high potential level to a low potential level while the signal supplied to the first wiring is at a low potential level. Drive circuit. 　 In claim 1, the level shift circuit has a capacitance element, a first electrode of the capacitance element is electrically connected to a gate of the first transistor and one of a source and a drain of the third transistor; a second electrode of the capacitance element is electrically connected to the other of the source and the drain of the first transistor, one of the source and the drain of the second transistor, and the second wiring; Drive circuit. 　 In claim 1, A register circuit is provided. the register circuit has a function of outputting an output signal based on a signal input to the register circuit to the level shift circuit; the third wiring and the fourth wiring are wirings electrically connected to the register circuit; Drive circuit. 　 In claim 1, the first wiring of the level shift circuit in the u-th row (u is an integer of 2 or more) is electrically connected to the second wiring of the level shift circuit in the (u-1)-th row; Drive circuit. 　 In claim 1, each of the first transistor to the third transistor has a semiconductor layer in which a channel formation region is formed; the semiconductor layer comprises indium oxide; Drive circuit. 　 In claim 1, The channel width of the first transistor is larger than the channel width of the third transistor. Drive circuit. 　 a level shift circuit having first to fifth transistors; a gate of the first transistor electrically connected to one of the source and the drain of the third transistor; a back gate of the first transistor is electrically connected to a first wiring; one of the source and the drain of the first transistor is electrically connected to a first power supply line; the other of the source and the drain of the first transistor is electrically connected to one of the source and the drain of the second transistor and to a second wiring; a gate of the second transistor is electrically connected to one of the source or the drain of the fourth transistor and one of the source or the drain of the fifth transistor; the other of the source and the drain of the second transistor is electrically connected to a second power supply line; a gate of the fourth transistor electrically connected to a third wiring; a gate of the third transistor electrically connected to a third power supply line; the other of the source and the drain of the third transistor is electrically connected to a fourth wiring and a gate of the fifth transistor; the other of the source and the drain of the fourth transistor is electrically connected to a fourth power supply line; the other of the source and the drain of the fifth transistor is electrically connected to a fifth power supply line; a potential of the first power supply line and a potential of the fourth power supply line are higher than a potential of the second power supply line and a potential of the fifth power supply line, respectively; the potential of the third power supply line is lower than the potential of the first power supply line and the potential of the fourth power supply line; the signal on the fourth wiring is a signal that can be switched from a low potential level to a high potential level while the signal supplied to the first wiring is at a high potential level, and from a high potential level to a low potential level while the signal supplied to the first wiring is at a low potential level. Drive circuit. 　 In claim 7, the level shift circuit has a capacitance element, a first electrode of the capacitance element is electrically connected to a gate of the first transistor and one of a source and a drain of the third transistor; a second electrode of the capacitance element is electrically connected to the other of the source and the drain of the first transistor, one of the source and the drain of the second transistor, and the second wiring; Drive circuit. 　 In claim 7, A register circuit is provided. the register circuit has a function of outputting an output signal based on a signal input to the register circuit to the level shift circuit; the third wiring and the fourth wiring are wirings electrically connected to the register circuit; Drive circuit. 　 In claim 7, the first wiring of the level shift circuit in the u-th row (u is an integer of 2 or more) is electrically connected to the second wiring of the level shift circuit in the (u-1)-th row; Drive circuit. 　 In claim 7, each of the first to fifth transistors has a semiconductor layer in which a channel formation region is formed; the semiconductor layer comprises indium oxide; Drive circuit. 　 In claim 7, The channel width of the first transistor is larger than the channel width of the third transistor. Drive circuit.

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