Measurement device and measurement method

The measurement device corrects phase errors between channels using a current and voltage probe system, enhancing the accuracy of inductor electrical characteristic measurements.

WO2026053569A1PCT designated stage Publication Date: 2026-03-12TDK CORP
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Patent Information

Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Filing Date
2025-07-02
Publication Date
2026-03-12

AI Technical Summary

Technical Problem

Existing measurement devices fail to accurately measure the electrical characteristics of inductors due to differences in response characteristics between probes, leading to reduced measurement accuracy.

Method used

A measurement device and method that includes a current probe, voltage probe, buffer memories, and a signal processing device to detect and correct phase errors between measurement channels, aligning the phases of current and voltage waveform data to improve measurement accuracy.

Benefits of technology

The solution enhances the accuracy of measuring inductor electrical characteristics by correcting phase errors, thereby improving the precision of calculated values such as inductance, effective power, apparent power, and reactive power.

✦ Generated by Eureka AI based on patent content.

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Abstract

Provided is a measurement device, wherein a signal processing device: calculates an inductance value of an inductor on the basis of measured current waveform data of a current value flowing through the inductor as measured by a current probe and measured voltage waveform data of a voltage value between terminals of the inductor as measured by a voltage probe; calculates calculated voltage waveform data on the basis of the measured current waveform data and the inductance value; and detects a phase error between the measured voltage waveform data and the calculated voltage waveform data as a phase error generated between a first port to which the current probe is connected and a second port to which the voltage probe is connected. A trigger detector updates, in accordance with the phase error, an offset value between a first start sampling position number of the measured current waveform data and a second start sampling position number of the measured voltage waveform data.
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Description

Measuring device and measuring method

[0001] The present disclosure relates to a measurement device and a measurement method.

[0002] Measurement devices that correct skew between channels are known. For example, Patent Document 1 describes a waveform display device that measures a common sine wave signal output from a signal source using multiple measurement channels and automatically corrects skew between the measurement channels based on the amplitude of the measured signal.

[0003] JP 2011-38786 A

[0004] It is desirable to accurately measure the electrical characteristics of inductors installed in power supply devices. In the waveform display device described in Patent Document 1, each measurement channel measures a common sine wave signal, and therefore the same type of probe is connected to multiple measurement channels. Therefore, if the electrical characteristics are measured using a probe different from the probe used for skew correction, differences in response characteristics due to the individual probes may not be reflected, and measurement accuracy may be reduced.

[0005] The present disclosure describes a measurement device and a measurement method that can improve the accuracy of measuring the electrical characteristics of an inductor.

[0006] A measurement device according to one aspect of the present disclosure includes: a first port to which a current probe is connected that measures the value of a current flowing through an inductor to be measured; a second port to which a voltage probe is connected that measures the value of a voltage applied between the terminals of the inductor; a first buffer memory that temporarily stores the current value measured by the current probe; a second buffer memory that temporarily stores the voltage value measured by the voltage probe; a third port to which a trigger signal indicating the timing to read the current value stored in the first buffer memory and the voltage value stored in the second buffer memory is input; a trigger detector that, in response to the trigger signal, reads measured current waveform data, which is the current value for a first period, from the first buffer memory and reads measured voltage waveform data, which is the voltage value for a second period, from the second buffer memory; and a signal processing device that detects a phase error occurring between the first port and the second port based on the measured current waveform data and the measured voltage waveform data. The signal processing device calculates an inductance value of the inductor based on the measured current waveform data and the measured voltage waveform data, calculates calculated voltage waveform data that is calculated voltage waveform data based on the measured current waveform data and the inductance value, and detects a phase error between the measured voltage waveform data and the calculated voltage waveform data as the phase error. The trigger detector updates an offset value between a first start sampling position number indicating the sampling timing of the first current value included in the measured current waveform data read from the first buffer memory and a second start sampling position number indicating the sampling timing of the first voltage value included in the measured voltage waveform data read from the second buffer memory in accordance with the phase error.

[0007] A measurement method according to another aspect of the present disclosure is a measurement method in a measurement device having a first port to which a current probe is connected that measures the value of a current flowing through an inductor to be measured, a second port to which a voltage probe is connected that measures the value of a voltage applied between the terminals of the inductor, and a third port to which a trigger signal is input. This measurement method includes the steps of reading, in response to a trigger signal, measured current waveform data, which is a current value for a first period, from a first buffer memory that temporarily stores current values ​​measured by a current probe, and reading measured voltage waveform data, which is a voltage value for a second period, from a second buffer memory that temporarily stores voltage values ​​measured by a voltage probe; calculating an inductance value of the inductor based on the measured current waveform data and the measured voltage waveform data; calculating calculated voltage waveform data, which is calculated voltage waveform data, based on the measured current waveform data and the inductance value; detecting a phase error between the measured voltage waveform data and the calculated voltage waveform data as a phase error occurring between the first port and the second port; and updating, in accordance with the phase error, an offset value between a first start sampling position number indicating the sampling timing of the first current value included in the measured current waveform data read from the first buffer memory and a second start sampling position number indicating the sampling timing of the first voltage value included in the measured voltage waveform data read from the second buffer memory.

[0008] In the above-described measurement device and measurement method, the inductance value of the inductor is calculated based on measured current waveform data and measured voltage waveform data, calculated voltage waveform data is calculated based on the measured current waveform data and the inductance value, and a phase error between the measured voltage waveform data and the calculated voltage waveform data is detected as a phase error occurring between the first port and the second port. Because the calculated voltage waveform data is calculated from the measured current waveform data, the phase of the calculated voltage waveform data can match the phase of the measured current waveform data. Therefore, the phase error between the calculated voltage waveform data and the measured voltage waveform data can match the phase error between the measured current waveform data and the measured voltage waveform data. Therefore, by detecting the phase error between the measured voltage waveform data and the calculated voltage waveform data, the phase error occurring between the first port and the second port can be detected. By using this phase error, the offset value between the first start sampling position number of the measured current waveform data read from the first buffer memory and the second start sampling position number of the measured voltage waveform data read from the second buffer memory can be updated, thereby aligning the phase of the measured current waveform data and the phase of the measured voltage waveform data. As a result, the accuracy of measuring the electrical characteristics of the inductor can be improved.

[0009] The first period may be longer than the second period. The measured voltage waveform data may be N consecutive voltage values ​​starting from a first sampling time. The signal processing device may search for N consecutive current values ​​from the measured current waveform data, at which calculated voltage waveform data with the greatest similarity intensity to the measured voltage waveform data is obtained, and may detect the time difference between the first sampling time and a second sampling time at which the searched N current values ​​start as a phase error. When the similarity intensity is greatest, the calculated voltage waveform data has a shape closest to the measured voltage waveform data. It is estimated that the N current values ​​used to calculate this calculated voltage waveform data are current values ​​for the same period as the measured voltage waveform data. Therefore, the time difference between the first sampling time at which the N voltage values ​​of the measured voltage waveform data start and the second sampling time at which the N current values ​​start may correspond to a phase error between the measured voltage waveform data and the measured current waveform data. Therefore, by detecting this time difference, the phase error between the first port and the second port can be detected.

[0010] The signal processing device may apply a wavelet transform to the measured voltage waveform data to detect a first characteristic point on the time axis within a predetermined first analysis window, and may apply a wavelet transform to the calculated voltage waveform data to detect a second characteristic point on the time axis within a predetermined second analysis window, and may detect a time difference between the first characteristic point and the second characteristic point as a phase error. By applying the wavelet transform to the waveform data, high-frequency components are obtained at the rising and falling edges of the waveform data. Because the measured voltage waveform data and the calculated voltage waveform data have substantially the same waveform shape, the time difference between the first characteristic point obtained by applying the wavelet transform to the measured voltage waveform data and the second characteristic point obtained by applying the wavelet transform to the calculated voltage waveform data may correspond to a phase error between the measured voltage waveform data and the calculated voltage waveform data. Therefore, by detecting this time difference, a phase error between the first port and the second port can be detected.

[0011] The signal processing device may detect a phase error at a preset period and update the offset value. The phase error between ports may change over time. According to the above configuration, the phase error is detected periodically and the offset value is updated, so that even if the phase error between the first port and the second port changes over time, the phase error can be reduced. Therefore, it is possible to further improve the measurement accuracy of the electrical characteristics of the inductor.

[0012] The signal processing device may calculate the electrical characteristic value of the inductor based on the measured current waveform data and the measured voltage waveform data read out after the offset value is updated, thereby improving the accuracy of calculating the electrical characteristic value of the inductor.

[0013] The electrical characteristic value may include at least one of effective power, apparent power, reactive power, and inductance value, which can improve the accuracy of calculating the effective power, apparent power, reactive power, and inductance value.

[0014] According to the present disclosure, it is possible to improve the accuracy of measuring the electrical characteristics of an inductor.

[0015] FIG. 1 is a circuit diagram showing a DC / DC converter to which a measurement device according to an embodiment of the present invention is applied. FIG. 2 is a diagram showing changes over time in a current flowing through an inductor and a voltage between the terminals of the inductor shown in FIG. 1. FIG. 3 is a diagram showing an example of the configuration of the measurement device shown in FIG. 1. FIG. 4 is a diagram illustrating data stored in the working memory shown in FIG. 3. FIG. 5 is a flowchart showing an example of a measurement method performed by the measurement device shown in FIG. 3. FIG. 6 is a flowchart showing in detail an example of the phase error detection process shown in FIG. 5. FIG. 7 is a flowchart showing in detail another example of the phase error detection process shown in FIG. 5. FIG. 8 is a flowchart showing in detail an example of the feature point extraction process shown in FIG. 7. FIG. 9 is a flowchart showing in detail an example of the feature point extraction process shown in FIG. 7. FIG. 10 is a diagram illustrating the principle of the phase error detection process shown in FIG. 7. FIG. 11 is a diagram illustrating the feature point extraction process shown in FIG. 7. FIG. 12(a) is a diagram showing measured voltage waveform data and calculated voltage waveform data in a measurement device of a comparative example. FIG. 12(b) is a diagram showing measured voltage waveform data and calculated voltage waveform data in the measurement device shown in FIG. 3. Fig. 13(a) is a diagram showing inductance calculated by a measurement device of a comparative example, Fig. 13(b) is a diagram showing inductance calculated by the measurement device shown in Fig. 3, Fig. 14 is a circuit diagram showing a signal generator to which the measurement device shown in Fig. 3 is applied.

[0016] Hereinafter, embodiments of the present disclosure will be described in detail with reference to the drawings. In the description of the drawings, the same elements are designated by the same reference numerals, and duplicated descriptions will be omitted.

[0017] A DC / DC converter to which a measurement device according to an embodiment is applied will be described with reference to Figures 1 and 2. Figure 1 is a circuit diagram showing a DC / DC converter to which a measurement device according to an embodiment is applied. Figure 2 is a diagram showing changes over time in the current flowing through the inductor shown in Figure 1 and the voltage between the terminals of the inductor.

[0018] The DC / DC converter 1 shown in FIG. 1 is a device that converts an input voltage Vin, which is a DC voltage, into an output voltage Vout, which is also a DC voltage. The DC / DC converter 1 is a non-isolated DC / DC converter. The DC / DC converter 1 has an input terminal 1a, an input terminal 1b, an output terminal 1c, an output terminal 1d, an input voltage line Lin, and a reference voltage line Lref. The input terminal 1b and the output terminal 1d are connected to the reference voltage line Lref, which supplies a reference voltage. The reference voltage is, for example, a ground voltage (0 V). The input terminal 1a receives the input voltage Vin. The input terminal 1a is connected to the input voltage line Lin, which also supplies the input voltage Vin. The output terminal 1c outputs the output voltage Vout. A load, not shown, is connected to the output terminals 1c and 1d.

[0019] The DC / DC converter 1 includes, as circuit elements, a capacitor 11 , a switching element 12 , a switching element 13 , an inductor 15 , a capacitor 16 , and a PWM (Pulse Width Modulation) controller 17 .

[0020] The capacitor 11 is an input capacitor. The capacitor 11 is provided between the input voltage line Lin and the reference voltage line Lref. Specifically, one end of the capacitor 11 is connected to the input voltage line Lin, and the other end of the capacitor 11 is connected to the reference voltage line Lref.

[0021] The switching element 12 and the switching element 13 are connected in series between the input voltage line Lin and the reference voltage line Lref. Each switching element is a circuit element that can switch the electrical connection state between its two ends between a conductive state (ON state) and a cut-off state (OFF state). Examples of switching elements include metal oxide semiconductor field effect transistors (MOSFETs) and insulated gate bipolar transistors (IGBTs). In this embodiment, N-channel MOSFETs are used as the switching elements 12 and 13.

[0022] The drain of the switching element 12 is connected to the input voltage line Lin. The source of the switching element 12 and the drain of the switching element 13 are connected to each other at a connection point Pc and to an output terminal 1c via an inductor 15. The source of the switching element 13 is connected to a reference voltage line Lref. A switching signal PWM_H is supplied to the gate of the switching element 12. The switching element 12 is switched between an ON state and an OFF state by the switching signal PWM_H. A switching signal PWM_L is supplied to the gate of the switching element 13. The switching element 13 is switched between an ON state and an OFF state by the switching signal PWM_L. The switching signals PWM_H and PWM_L are complementary signals with opposite polarities to each other.

[0023] The inductor 15 is an output inductor and is a measurement target whose electrical characteristics are to be measured. The inductor 15 is provided between the connection point Pc and the output terminal 1c. Specifically, one end of the inductor 15 is connected to the connection point Pc, and the other end of the inductor 15 is connected to the output terminal 1c. The capacitor 16 is an output capacitor. The capacitor 16 is provided between the output terminal 1c and the output terminal 1d. Specifically, one end of the capacitor 16 is connected to the output terminal 1c, and the other end of the capacitor 16 is connected to the output terminal 1d (reference voltage line Lref). The inductor 15 and the capacitor 16 form a filter circuit.

[0024] The PWM controller 17 is a circuit that uses PWM control to turn on and off the switching elements 12 and 13. The PWM controller 17 generates switching signals PWM_H and PWM_L for alternately turning on and off the switching elements 12 and 13 based on the output voltage Vout.

[0025] 2, the switching cycle Tcyc includes a period Ton and a period Toff. The period Ton is a period during which the switching element 12 is in an on state and the switching element 13 is in an off state. The period Toff is a period during which the switching element 12 is in an off state and the switching element 13 is in an on state.

[0026] During period Ton, current IL flows from input terminal 1a through switching element 12 to inductor 15, and energy is accumulated in inductor 15. Voltage VL applied across both terminals of inductor 15 is a voltage obtained by subtracting output voltage Vout from input voltage Vin, and current IL increases over time. During period Toff, energy accumulated in inductor 15 is released via switching element 13. Voltage VL is a voltage obtained by subtracting output voltage Vout from a reference voltage, and current IL decreases over time.

[0027] The input voltage Vin is converted into the output voltage Vout by alternately repeating the periods Ton and Toff. The ratio (duty ratio) between the periods Ton and Toff is adjusted to control the output voltage Vout to a target voltage.

[0028] The measuring device 2 is a device that measures the electrical characteristics of the inductor 15. An example of the measuring device 2 is an oscilloscope. The measuring device 2 has a port 2a (first port), a port 2b (second port), and a port 2c (third port). A current probe 3 is connected to the port 2a. The current probe 3 is provided to measure the current value of the current IL flowing through the inductor 15. The current probe 3 is provided, for example, on a wiring that connects the connection point Pc and one end of the inductor 15.

[0029] A differential probe 4 (voltage probe) is connected to port 2b. The differential probe 4 is provided to measure the voltage value of the voltage VL across both terminals of the inductor 15. A switching signal PWM_H is input to port 2c from the PWM controller 17 as a trigger signal TG. The trigger signal TG is a signal that indicates the timing for measuring the current value of the current IL and the voltage value of the voltage VL.

[0030] Next, the measurement device 2 will be described in detail with reference to Figures 3 and 4. Figure 3 is a diagram showing an example of the configuration of the measurement device shown in Figure 1. Figure 4 is a diagram for explaining data stored in the working memory shown in Figure 3. As shown in Figure 3, the measurement device 2 includes a buffer memory 21 (first buffer memory), a buffer memory 22 (second buffer memory), a buffer memory 23, a trigger detector 24, a working memory 25, and a signal processing device 26.

[0031] The buffer memory 21 temporarily stores the current value of the current IL measured by the current probe 3. The buffer memory 22 temporarily stores the voltage value of the voltage VL measured by the differential probe 4. The buffer memory 23 temporarily stores the trigger signal TG input to the port 2c. An A / D converter (not shown) is provided in front of each buffer memory. The A / D converter samples the analog signal input to each port at a sampling period Ts and stores the digitized value in the buffer memory.

[0032] For ease of explanation, it is assumed that the current value, voltage value, and trigger signal value obtained at the same sampling timing are stored at the same address in buffer memory 21, buffer memory 22, and buffer memory 23, respectively. When the sampling timing advances by one, the address is also incremented by one. Sampling position numbers are assigned to each current value in ascending order in the order in which they are sampled. Sampling position numbers are assigned to each voltage value in ascending order in the order in which they are sampled. In other words, the sampling position number of a current value indicates the sampling timing of that current value, and the sampling position number of a voltage value indicates the sampling timing of that voltage value.

[0033] The trigger detector 24 is a circuit that reads measured current waveform data Im from the buffer memory 21 and reads measured voltage waveform data Vm from the buffer memory 22 in response to a trigger signal TG. The measured current waveform data Im is a set of current values ​​for a predetermined first period. The measured voltage waveform data Vm is a set of voltage values ​​for a predetermined second period. In this embodiment, the first period has sampling position numbers −R to N−1+R, and the second period has sampling position numbers 0 to N−1. In other words, the first period is longer than the second period. The trigger detector 24 includes an address setting unit 41.

[0034] The address setting unit 41 detects the trigger position from the value of the trigger signal TG stored in the buffer memory 23. The address setting unit 41 sets the address in the buffer memory 23 where a value corresponding to the trigger position is stored as the start address Ast. The address setting unit 41 adds an offset address Aofs (offset value) to the start address Ast and calculates the start address Asti (=Ast+Aofs-R) by subtracting a specified value R from the addition result. In other words, the offset address Aofs is the offset between the start address Asti and the start address Ast.

[0035] The trigger detector 24 reads N+2R consecutive current values ​​from the start address Asti of the buffer memory 21 and stores them as measured current waveform data Im in a memory area 51 (described later) of the working memory 25. In this embodiment, in order to calculate equations (4) and (5) (described later), the trigger detector 24 also reads two current values ​​before and after the measured current waveform data Im from the buffer memory 21 and stores them in the memory area 51. The trigger detector 24 reads N consecutive voltage values ​​from the start address Ast of the buffer memory 22 and stores them as measured voltage waveform data Vm in a memory area 52 (described later) of the working memory 25. In other words, the start address Asti is the address in the buffer memory 21 from which reading of the measured current waveform data Im starts. The start address Ast is the address in the buffer memory 22 from which reading of the measured voltage waveform data Vm starts.

[0036] The trigger detector 24 further includes a counter 43 and a comparator 44. The counter 43 is a circuit that counts clock pulses of a clock signal (not shown). The counter 43 increments a count value C1 by one in synchronization with, for example, the rising edge of the clock signal. The counter 43 outputs the count value C1 to the comparator 44. When the counter 43 receives a high-level calibration timing signal Rc from the comparator 44, it resets the count value C1 to 0.

[0037] The comparator 44 is a circuit that compares the count value C1 with a period value. The period value can be preset by the user. The period value indicates the period for correcting the phase error Er, and is expressed here as the number of clock pulses counted by the counter 43. The phase error Er is the amount of delay that occurs between the measured current waveform data Im and the measured voltage waveform data Vm, and is expressed as the number of sampling timings. The comparator 44 outputs a high-level calibration timing signal Rc when the count value C1 matches the period value. The comparator 44 outputs the calibration timing signal Rc to the counter 43 and the signal processing device 26. Note that the comparator 44 outputs a low-level calibration timing signal Rc when the count value C1 does not match the period value.

[0038] The working memory 25 stores measured current waveform data Im, measured voltage waveform data Vm, and calculated voltage waveform data Vc. The calculated voltage waveform data Vc is calculated voltage waveform data and is calculated by the signal processing device 26. As shown in FIG. 4 , the working memory 25 includes memory areas 51, 52, and 53. The memory area 51 is an area for storing the measured current waveform data Im transferred from the buffer memory 21. In this embodiment, the memory area 51 also stores, in addition to the measured current waveform data Im, two current values ​​before and after the measured current waveform data Im. The memory area 52 is an area for storing the measured voltage waveform data Vm transferred from the buffer memory 22. The memory area 53 is an area for storing the calculated voltage waveform data Vc calculated by the signal processing device 26.

[0039] For convenience of explanation, the sampling position number corresponding to the trigger position of the measured voltage waveform data Vm and the calculated voltage waveform data Vc is set to 0, and the sampling position obtained by adding the offset address Aofs to the trigger position of the measured current waveform data Im is set to 0. In other words, the current value Im stored in the memory area 51 k The sampling position number k can take an integer value in the range of −R−1 to N+R. The voltage value Vm stored in the memory area 52 j The sampling position number j can take an integer value in the range of 0 to N-1.j can take an integer value in the range of 0 to N-1 as the sampling position number j.

[0040] The signal processing device 26 is a circuit that detects a phase error that occurs between the ports 2a and 2b. The phase error that occurs between the ports 2a and 2b corresponds to a phase error Er that occurs between the measured current waveform data Im and the measured voltage waveform data Vm. The signal processing device 26 calculates electrical characteristic values ​​of the inductor 15. The electrical characteristic values ​​include at least one of the apparent power S, the effective power P, the reactive power Q, and the inductance value L.

[0041] The signal processing device 26 is set to a skew correction mode when a high-level calibration timing signal Rc is output, and is set to a measurement mode when a low-level calibration timing signal Rc is output. In the skew correction mode, the signal processing device 26 detects the phase error Er and updates the offset address Aofs. That is, the signal processing device 26 detects the phase error Er at a preset cycle and updates the offset address Aofs. In the measurement mode, the signal processing device 26 calculates the electrical characteristic value of the inductor 15. The signal processing device 26 includes, as functional elements, a readout unit 61, a calculation unit 62, a detection unit 63, and an update unit 64.

[0042] The reading unit 61 reads N consecutive current values ​​Im k is read from the memory area 51, and N consecutive voltage values ​​Vm j from the memory area 52. The calculation unit 62 calculates the electrical characteristic values ​​of the inductor 15 based on the measured current waveform data Im and the measured voltage waveform data Vm. The calculation unit 62 calculates the calculated voltage waveform data Vc based on the measured current waveform data Im and the inductance value L. The detection unit 63 detects the phase error between the measured voltage waveform data Vm and the calculated voltage waveform data Vc as the phase error Er. The update unit 64 updates the offset address Aofs in accordance with the phase error Er.

[0043] In the skew correction mode, the detection unit 63 and update unit 64 of the signal processing device 26 are in an operating state, and the detection unit 63 sets the specified value R and an offset M (described later) to predetermined values. The specified value R is set to a relatively large value, for example, so that the expected phase error Er falls within the range of ±R. In the measurement mode, the detection unit 63 and update unit 64 of the signal processing device 26 are in an inoperable state, and the specified value R and offset M are set to 0.

[0044] Next, a measurement method performed by the measurement apparatus 2 will be described with reference to Fig. 5 and Fig. 6. Fig. 5 is a flowchart showing an example of a measurement method performed by the measurement apparatus shown in Fig. 3. Fig. 6 is a flowchart showing in detail an example of the phase error detection process of Fig. 5.

[0045] 5, first, the detection unit 63 of the signal processing device 26 sets a specified value R (step S1). In the measurement mode, the specified value R is set to 0.

[0046] Next, the address setting unit 41 of the trigger detector 24 detects the trigger position from the value of the trigger signal TG stored in the buffer memory 23 (step S2). The address setting unit 41 sets the address in the buffer memory 23 where the value corresponding to the trigger position is stored as the start address Ast, adds the offset address Aofs to the start address Ast, and subtracts the specified value R from the addition result to calculate the start address Asti (=Ast+Aofs-R).

[0047] Next, the trigger detector 24 reads out the measured current waveform data Im and the measured voltage waveform data Vm (step S3). In step S3, the trigger detector 24 reads out N+2R consecutive current values ​​from the start address Asti of the buffer memory 21 and stores them in the memory area 51 of the working memory 25 as the measured current waveform data Im, and also reads out N consecutive voltage values ​​from the start address Ast of the buffer memory 22 and stores them in the memory area 52 of the working memory 25 as the measured voltage waveform data Vm. In this embodiment, the trigger detector 24 also reads out the two current values ​​before and after the measured current waveform data Im from the buffer memory 21 and stores them in the memory area 51.

[0048] Next, the signal processing device 26 determines whether it is calibration timing (step S4). The signal processing device 26 determines that it is calibration timing when it receives a high-level calibration timing signal Rc from the trigger detector 24, and determines that it is not calibration timing when it receives a low-level calibration timing signal Rc from the trigger detector 24. If it is determined that it is calibration timing in step S4 (step S4: YES), the signal processing device 26 performs phase error detection processing (step S5).

[0049] 6, in the phase error detection process of step S5, the detector 63 first performs initialization (step S11). In step S11, the detector 63 sets the offset M to −R and the maximum value MAX to 0.

[0050] Next, the reading unit 61 reads N consecutive current values ​​Im k and N consecutive voltage values ​​Vm j In step S12, when the reading unit 61 receives the offset M from the detection unit 63, it reads out N current values ​​Im whose sampling position numbers k are M to N-1+M. k are read from the memory area 51, and N voltage values ​​Vm jare read from the memory area 52. Therefore, the sampling position number j can take an integer value of 0 or more and N-1 or less. The sampling position number k can take an integer value of M or more and N-1+M or less.

[0051] Next, the calculation unit 62 calculates the inductance value L of the inductor 15 based on the measured current waveform data Im and the measured voltage waveform data Vm (step S13). Specifically, the calculation unit 62 calculates the inductance value L of the inductor 15 based on the N voltage values ​​Vm read out in step S12. j and N current values ​​Im k The apparent power S, effective power P, and reactive power Q are calculated using the above equations.

[0052] The apparent power S is calculated, for example, by the formula (1).

[0053] The effective power P is calculated, for example, by the formula (2).

[0054] The reactive power Q is calculated, for example, by the formula (3).

[0055] Next, the calculation unit 62 calculates the reactive power Q and the N current values ​​Im k , and the sampling period Ts to calculate the inductance value L. The inductance value L is calculated, for example, by the following equation (4).

[0056] Next, the calculation unit 62 calculates the calculated voltage waveform data Vc based on the measured current waveform data Im and the inductance value L (step S14). Specifically, the calculation unit 62 calculates the N voltage values ​​Vc j are calculated by, for example, equation (5), and N voltage values ​​Vc j is stored as calculated voltage waveform data Vc in the memory area 53 of the working memory 25. In order to calculate equations (4) and (5), in step S12, the reading unit 61 reads N current values ​​Im k In addition, the current value Im at the sampling position number k of M-1 M-1 and the current value Im at sampling position number k is N+M N+Mare read out from the memory area 51.

[0057] Next, the detection unit 63 detects the N voltage values ​​Vm j and the N voltage values ​​Vc calculated in step S14. j The detecting unit 63 calculates the similarity strength Cm with respect to the object (step S15). For example, the detecting unit 63 calculates the similarity strength Cm using the formula (6).

[0058] Next, the detection unit 63 compares the similarity strength Cm with the maximum value MAX and determines whether the similarity strength Cm is greater than the maximum value MAX (step S16). If it is determined in step S16 that the similarity strength Cm is greater than the maximum value MAX (step S16: YES), the detection unit 63 updates the maximum value MAX by setting the similarity strength Cm to a new maximum value MAX, and updates the phase error Er by setting the offset M to a new phase error Er (step S17). Then, the detection unit 63 increments the offset M (i.e., increases the offset M by 1) (step S18).

[0059] On the other hand, if it is determined in step S16 that the similarity strength Cm is less than or equal to the maximum value MAX (step S16: NO), the detection unit 63 increments the offset M (i.e., increases the offset M by 1) without updating the maximum value MAX and the phase error Er (step S18).

[0060] Next, the detection unit 63 compares the offset M with a specified value R and determines whether the offset M is equal to or less than the specified value R (step S19). If it is determined in step S19 that the offset M is equal to or less than the specified value R (step S19: YES), steps S12 to S19 are performed again. On the other hand, if it is determined in step S19 that the offset M is greater than the specified value R (step S19: NO), the detection unit 63 outputs the phase error Er to the update unit 64, and the phase error detection process of step S5 ends.

[0061] Next, the update unit 64 updates the offset address Aofs (step S6). When the similarity strength Cm is maximized, the calculated voltage waveform data Vc has a shape closest to the measured voltage waveform data Vm. Then, the N current values ​​Im used to calculate the calculated voltage waveform data Vc are updated. k is estimated to be the current value for the same period as the measured voltage waveform data Vm. Therefore, the updating unit 64 updates the offset address Aofs by adding the phase error Er to the offset address Aofs and setting the result as the new offset address Aofs.

[0062] This completes the series of steps in the measurement method.

[0063] On the other hand, if it is determined in step S4 that it is not the calibration timing (step S4: NO), the signal processing device 26 performs a measurement process (step S7).

[0064] In the measurement process of step S7, first, the reading unit 61 reads N consecutive current values ​​Im k and N consecutive voltage values ​​Vm j As described above, in the measurement mode, the specified value R and the offset M are set to 0. Therefore, in step S21, the reading unit 61 reads out N current values ​​Im whose sampling position numbers k are 0 to N-1. k are read from the memory area 51, and N voltage values ​​Vm j is read from the memory area 52.

[0065] Next, the calculation unit 62 calculates the electrical characteristic values ​​of the inductor 15 (step S22). In step S22, the calculation unit 62 calculates the apparent power S, the effective power P, the reactive power Q, and the inductance value L using equations (1) to (4). The calculation unit 62 then outputs the electrical characteristic values ​​of the inductor 15 (step S23). For example, the calculation unit 62 outputs the electrical characteristic values ​​of the inductor 15 to a display (not shown), and causes the display to display the electrical characteristic values ​​of the inductor 15.

[0066] This completes the series of steps in the measurement method. The phase error detection process in step S5 is not limited to the process shown in FIG.

[0067] Another example of the phase error detection process will be described with reference to FIGS. 7 to 11 . FIG. 7 is a flowchart showing in detail another example of the phase error detection process of FIG. 5 . FIG. 8 is a flowchart showing in detail an example of the feature point extraction process of FIG. 7 . FIG. 9 is a flowchart showing in detail an example of the feature point extraction process of FIG. 7 . FIG. 10 is a diagram for explaining the principle of the phase error detection process shown in FIG. 7 . FIG. 11 is a diagram for explaining the feature point extraction process of FIG. 7 . Note that in the phase error detection process shown in FIG. 7 , the specified value R and offset M are set to 0. In other words, the measured current waveform data Im is a set of current values ​​for a predetermined first period (sampling position numbers 0 to N−1). The measured voltage waveform data Vm is a set of voltage values ​​for a predetermined second period (sampling position numbers 0 to N−1).

[0068] As shown in Figure 10, when a wavelet transform is applied to the waveform of the voltage VL, high-frequency components are obtained at the rising and falling edges of the waveform of the voltage VL. Because the voltage VL changes in synchronization with the switching signal PWM_H, the approximate time from the trigger position (here, the rising edge of the switching signal PWM_H) to the falling edge of the voltage VL can be predicted. Therefore, by applying a wavelet transform to each of the measured voltage waveform data Vm and the calculated voltage waveform data Vc to set an analysis window W that includes the time of the falling edge, and detecting feature points included in the analysis window W of each of the measured voltage waveform data Vm and the calculated voltage waveform data Vc, the time difference between the detected feature points is detected as the phase error Er. The phase error detection process will be described in detail below.

[0069] As shown in FIG. 7, first, the readout unit 61 reads N consecutive current values ​​Im k and N consecutive voltage values ​​Vm j In step S32, the reading unit 61 reads out N current values ​​Im kare read from the memory area 51, and N voltage values ​​Vm j is read from the memory area 52.

[0070] Next, the calculation unit 62 calculates the inductance value L of the inductor 15 (step S32). Step S32 is the same as step S13, so a detailed description thereof will be omitted. Then, the calculation unit 62 calculates the calculated voltage waveform data Vc (step S33). Step S33 is the same as step S14, so a detailed description thereof will be omitted.

[0071] Next, the detection unit 63 applies wavelet transform to the measured voltage waveform data Vm and the calculated voltage waveform data Vc (step S34). j ) to obtain the transformed value Vmd mn is obtained, and the calculated voltage waveform data Vc (i.e., N voltage values ​​Vc j ) to obtain the transformed value Vcd mn Here, the sampling position number m indicates the sampling position on the time axis and increases as time passes, and the sampling position number n indicates the sampling position on the frequency axis and increases as the frequency increases.

[0072] Next, the detection unit 63 detects the converted value Vmd mn A feature point extraction process is performed to extract a feature point T1 on the time axis from the measured voltage waveform data Vm (step S35). An analysis window W1 (first analysis window) is set in advance. The analysis window W1 is defined by a lower limit value TL1 on the time axis, an upper limit value TU1 on the time axis, a lower limit value FL1 on the frequency axis, and an upper limit value FU1 on the frequency axis. The lower limit value TL1 and the upper limit value TU1 are set, for example, so that the time at which a falling edge of the measured voltage waveform data Vm is likely to appear is included between the lower limit value TL1 and the upper limit value TU1. The lower limit value FL1 and the upper limit value FU1 are set so that a frequency band in which the feature point T1 can be detected is included between the lower limit value FL1 and the upper limit value FU1.

[0073] 8, in step S35, the detection unit 63 first performs initialization (step S41). In step S41, the detection unit 63 sets the feature point T1 to 0, the sampling position number m to the lower limit value TL1, and the maximum value SCmax1 to 0.

[0074] Next, the detection unit 63 initializes the parameters (step S42). In step S42, the detection unit 63 sets the total value SC1 to 0 and the sampling position number n to the lower limit value FL1. Then, the detection unit 63 calculates the total value SC1 by the conversion value Vmd mn The detection unit 63 then increments the sampling position number n (step S44) and determines whether the sampling position number n is equal to or less than the upper limit value FU1 (step S45).

[0075] If it is determined in step S45 that the sampling position number n is equal to or less than the upper limit value FU1 (step S45: YES), the detection unit 63 performs steps S43 to S45 again. On the other hand, if it is determined in step S45 that the sampling position number n is greater than the upper limit value FU1 (step S45: NO), the detection unit 63 compares the sum SC1 with the maximum value SCmax1 and determines whether the sum SC1 is greater than the maximum value SCmax1 (step S46). That is, the conversion value Vmd at the sampling position number m is calculated by steps S42 to S45. mn The sum of these values ​​is calculated as the sum SC1.

[0076] If it is determined in step S46 that the sum SC1 is greater than the maximum value SCmax1 (step S46: YES), the detection unit 63 updates the maximum value SCmax1 by setting the sum SC1 as the new maximum value SCmax1, and updates the feature point T1 by setting the sampling position number m as the new feature point T1 (step S47).The detection unit 63 then increments the sampling position number m (step S48).On the other hand, if it is determined in step S46 that the sum SC1 is less than or equal to the maximum value SCmax1 (step S46: NO), the detection unit 63 increments the sampling position number m without updating the maximum value SCmax1 and the feature point T1 (step S48).

[0077] Next, the detection unit 63 compares the sampling position number m with the upper limit value TU1 and determines whether the sampling position number m is equal to or less than the upper limit value TU1 (step S49). If it is determined in step S49 that the sampling position number m is equal to or less than the upper limit value TU1 (step S49: YES), the detection unit 63 performs steps S42 to S49 again. On the other hand, if it is determined in step S49 that the sampling position number m is greater than the upper limit value TU1 (step S49: NO), the feature point extraction process of step S35 ends.

[0078] The maximum value SCmax1 obtained by the above process is the largest total value SC1 among the total values ​​SC1 over the time period included in the analysis window W1. The feature point T1 is the sampling position number m on the time axis at which the maximum value SCmax1 is obtained.

[0079] Next, the detection unit 63 detects the converted value Vcd mnA feature point extraction process is performed to extract a feature point T2 on the time axis from the calculated voltage waveform data Vc (step S36). An analysis window W2 (second analysis window) is set in advance. The analysis window W2 is defined by a lower limit value TL2 on the time axis, an upper limit value TU2 on the time axis, a lower limit value FL2 on the frequency axis, and an upper limit value FU2 on the frequency axis. The lower limit value TL2 and the upper limit value TU2 are set, for example, so that the time at which a falling edge of the calculated voltage waveform data Vc is likely to appear is included between the lower limit value TL2 and the upper limit value TU2. The lower limit value TL2 may be the same as the lower limit value TL1, and the upper limit value TU2 may be the same as the upper limit value TU1. The lower limit value FL2 and the upper limit value FU2 are set so that a frequency band in which the feature point T2 can be detected is included between the lower limit value FL2 and the upper limit value FU2. The lower limit value FL2 may be the same as the lower limit value FL1, and the upper limit value FU2 may be the same as the upper limit value FU1.

[0080] 9, in step S36, the detection unit 63 first performs initialization (step S51). In step S51, the detection unit 63 sets the feature point T2 to 0, the sampling position number m to the lower limit value TL2, and the maximum value SCmax2 to 0.

[0081] Next, the detection unit 63 initializes the parameters (step S52). In step S52, the detection unit 63 sets the total value SC2 to 0 and the sampling position number n to the lower limit value FL2. Then, the detection unit 63 calculates the total value SC2 by the conversion value Vcd mn The detection unit 63 then increments the sampling position number n (step S54) and determines whether the sampling position number n is equal to or less than the upper limit value FU2 (step S55).

[0082] If it is determined in step S55 that the sampling position number n is equal to or less than the upper limit value FU2 (step S55: YES), the detection unit 63 performs steps S53 to S55 again. On the other hand, if it is determined in step S55 that the sampling position number n is greater than the upper limit value FU2 (step S55: NO), the detection unit 63 compares the sum SC2 with the maximum value SCmax2 and determines whether the sum SC2 is greater than the maximum value SCmax2 (step S56). That is, the conversion value Vcd at the sampling position number m is calculated by steps S52 to S55. mn The sum of these values ​​is calculated as the sum SC2.

[0083] If it is determined in step S56 that the sum SC2 is greater than the maximum value SCmax2 (step S56: YES), the detection unit 63 updates the maximum value SCmax2 by setting the sum SC2 as the new maximum value SCmax2, and updates the feature point T2 by setting the sampling position number m as the new feature point T2 (step S57).The detection unit 63 then increments the sampling position number m (step S58).On the other hand, if it is determined in step S56 that the sum SC2 is less than or equal to the maximum value SCmax2 (step S56: NO), the detection unit 63 increments the sampling position number m without updating the maximum value SCmax2 and the feature point T2 (step S58).

[0084] Next, the detection unit 63 compares the sampling position number m with the upper limit value TU2 and determines whether the sampling position number m is equal to or less than the upper limit value TU2 (step S59). If it is determined in step S59 that the sampling position number m is equal to or less than the upper limit value TU2 (step S59: YES), the detection unit 63 performs steps S52 to S59 again. On the other hand, if it is determined in step S59 that the sampling position number m is greater than the upper limit value TU2 (step S59: NO), the feature point extraction process of step S36 ends.

[0085] The maximum value SCmax2 obtained by the above process is the largest total value SC2 among the total values ​​SC2 for the time included in the analysis window W2. The feature point T2 is the sampling position number m on the time axis at which the maximum value SCmax2 was obtained.

[0086] Next, the detecting unit 63 calculates the phase error Er (step S37). In step S37, the detecting unit 63 calculates the subtraction result obtained by subtracting the feature point T1 from the feature point T2 as the phase error Er.

[0087] This completes the phase error detection process shown in FIG.

[0088] Next, the effects of the measurement device 2 will be described with reference to FIGS. 12(a), 12(b), 13(a), and 13(b). FIG. 12(a) shows measured voltage waveform data and calculated voltage waveform data for the measurement device of the comparative example. FIG. 12(b) shows measured voltage waveform data and calculated voltage waveform data for the measurement device shown in FIG. 3. FIG. 13(a) shows inductance calculated by the measurement device of the comparative example. FIG. 13(b) shows inductance calculated by the measurement device shown in FIG. 3. The horizontal axes of FIGS. 12(a) and 12(b) represent time (unit: seconds), and the vertical axes of FIGS. 12(a) and 12(b) represent voltage (unit: volts). The horizontal axes of FIGS. 13(a) and 13(b) represent the order of the harmonic component, and the vertical axes of FIGS. 13(a) and 13(b) represent the inductance value.

[0089] The measurement device of the comparative example differs from the measurement device 2 mainly in that the signal processing device 26 does not include the detection unit 63 and the update unit 64. In other words, the measurement device of the comparative example corresponds to the measurement device 2 in which the signal processing device 26 is set to the measurement mode.

[0090] As shown in (a) of Figure 12, in the comparative measurement device, a phase difference occurs between the calculated voltage waveform data Vc and the measured voltage waveform data Vm. As shown in equation (5), the calculated voltage waveform data Vc is calculated from the measured current waveform data Im, so the phase of the calculated voltage waveform data Vc matches the phase of the measured current waveform data Im. Therefore, it can be said that a phase difference occurs between the measured current waveform data Im and the measured voltage waveform data Vm. Therefore, as shown in (a) of Figure 13, the inductance value L calculated from the measured current waveform data Im and the measured voltage waveform data Vm decreases as the frequency increases. Therefore, the comparative measurement device cannot accurately measure the electrical characteristics of the inductor.

[0091] On the other hand, as shown in (b) of Figure 12, in the measurement device 2, the calculated voltage waveform data Vc and the measured voltage waveform data Vm overlap, and there is no phase difference between these waveform data. Therefore, it can be said that the phase of the measured current waveform data Im and the phase of the measured voltage waveform data Vm match. Therefore, as shown in (b) of Figure 13, the inductance value L calculated from the measured current waveform data Im and the measured voltage waveform data Vm is approximately constant regardless of frequency. Therefore, the measurement device 2 can improve the measurement accuracy of the electrical characteristics of the inductor.

[0092] In the measurement device 2 and the measurement method performed by the measurement device 2 described above, the inductance value L of the inductor 15 is calculated based on the measured current waveform data Im and the measured voltage waveform data Vm, the calculated voltage waveform data Vc is calculated based on the measured current waveform data Im and the inductance value L, and the phase error between the calculated voltage waveform data Vc and the measured voltage waveform data Vm is detected as the phase error Er occurring between port 2a and port 2b. As shown in equation (5), the calculated voltage waveform data Vc is calculated from the measured current waveform data Im, so the phase of the calculated voltage waveform data Vc can match the phase of the measured current waveform data Im. Therefore, the phase error between the calculated voltage waveform data Vc and the measured voltage waveform data Vm can match the phase error between the measured current waveform data Im and the measured voltage waveform data Vm. Therefore, by detecting the phase error between the calculated voltage waveform data Vc and the measured voltage waveform data Vm, the phase error Er occurring between port 2a and port 2b can be detected. By using this phase error Er to update the offset address Aofs between the start address Asti at which reading of the measured current waveform data Im begins and the start address Ast at which reading of the measured voltage waveform data Vm begins, the phase of the measured current waveform data Im and the phase of the measured voltage waveform data Vm can be aligned, thereby improving the measurement accuracy of the electrical characteristics of inductor 15.

[0093] The phase error Er between port 2a and port 2b may change over time. In response to this, the signal processing device 26 detects the phase error Er at a preset cycle and updates the offset address Aofs. With this configuration, the phase error Er is detected periodically and the offset address Aofs is updated, so even if the phase error Er changes over time, the phase error Er can be reduced. This makes it possible to further improve the measurement accuracy of the electrical characteristics of the inductor 15.

[0094] The signal processing device 26 calculates the electrical characteristic values ​​of the inductor 15 based on the measured current waveform data Im and the measured voltage waveform data Vm read after the offset address Aofs is updated. Specifically, the signal processing device 26 calculates the apparent power S, the effective power P, the reactive power Q, and the inductance value L based on the measured current waveform data Im and the measured voltage waveform data Vm read after the offset address Aofs is updated. With this configuration, the electrical characteristic values ​​of the inductor 15 are calculated after the phase of the measured current waveform data Im and the phase of the measured voltage waveform data Vm are aligned. This makes it possible to improve the accuracy of calculating the electrical characteristic values ​​of the inductor 15 (apparent power S, effective power P, reactive power Q, and inductance value L).

[0095] In the phase error detection process shown in FIG. 6, the signal processing device 26 calculates, from the measured current waveform data Im, N consecutive current values ​​Im at which calculated voltage waveform data Vc having the maximum similarity strength Cm with the measured voltage waveform data Vm is obtained. k Then, the signal processing device 26 searches for the N current values ​​Im k The first current value Im k The sampling position number k (second sampling timing) of the measured voltage waveform data Vm and the first voltage value Vm j The time difference between the sampling position number j (first sampling timing) of and is detected as a phase error Er. When the similarity strength Cm is maximized, the calculated voltage waveform data Vc has a shape closest to the measured voltage waveform data Vm. The N current values ​​Im used to calculate this calculated voltage waveform data Vc are k is estimated to be the current value for the same period as the measured voltage waveform data Vm. Therefore, N current values ​​Im k The sampling position number k at which the voltage waveform data Vm starts and the N voltage values ​​Vm j The time difference between the sampling position number j at which the measured current waveform data Im and the measured voltage waveform data Vm start can correspond to the phase error between the measured current waveform data Im and the measured voltage waveform data Vm. Therefore, by detecting this time difference, the phase error Er between port 2a and port 2b can be detected.

[0096] In the phase error detection process shown in FIG. 7 , the signal processing device 26 applies a wavelet transform to the measured voltage waveform data Vm to detect a feature point T1 on the time axis within the analysis window W1, and then applies a wavelet transform to the calculated voltage waveform data Vc to detect a feature point T2 on the time axis within the analysis window W2. The signal processing device 26 then detects the time difference between feature points T2 and T1 as the phase error Er. By applying a wavelet transform to the waveform data, high-frequency components are obtained at the rising and falling edges of the waveform data. Because the measured voltage waveform data Vm and the calculated voltage waveform data Vc have substantially the same waveform shape, the time difference between feature point T2 obtained by applying a wavelet transform to the calculated voltage waveform data Vc and feature point T1 obtained by applying a wavelet transform to the measured voltage waveform data Vm may correspond to the phase error between the calculated voltage waveform data Vc and the measured voltage waveform data Vm. Therefore, by detecting this time difference, the phase error Er between port 2a and port 2b can be detected.

[0097] The measurement device and measurement method according to the present disclosure are not limited to the above-described embodiment.

[0098] For example, in the above embodiment, at the calibration timing, the phase error Er is detected and the offset address Aofs is updated using the offset address Aofs updated at the previous calibration timing as is. At the calibration timing, the offset address Aofs may be temporarily set to 0, and then the phase error Er may be detected and the offset address Aofs may be updated.

[0099] The phase error Er does not have to be detected periodically, and the offset address Aofs does not have to be updated periodically. In this case, the trigger detector 24 does not have to include the counter 43 and the comparator 44.

[0100] It is not necessary to calculate any of the apparent power S, effective power P, reactive power Q, and inductance value L based on the measured current waveform data Im and the measured voltage waveform data Vm read out after the offset address Aofs is updated.

[0101] In the above embodiment, the current value, voltage value, and trigger signal value obtained at the same sampling timing are stored at the same address in the buffer memory 21, buffer memory 22, and buffer memory 23. As long as it is managed which address in the buffer memory 21, buffer memory 22, and buffer memory 23 the current value, voltage value, and trigger signal value obtained at the same sampling timing are stored at, the current value, voltage value, and trigger signal value may be stored at any address in the buffer memory 21, buffer memory 22, and buffer memory 23.

[0102] In this case, instead of the offset address Aofs, an offset value between the start sampling position number (first start sampling position number) of the measured current waveform data Im and the start sampling position number (second start sampling position number) of the measured voltage waveform data Vm is used. The start sampling position number of the measured current waveform data Im is the first current value Im included in the measured current waveform data Im. k The start sampling position number of the measured voltage waveform data Vm is the first voltage value Vm included in the measured voltage waveform data Vm. j The first current value Im is the sampling position number j. k is the current value Im included in the measured current waveform data Im k The current value Im obtained at the earliest sampling timing among k The first voltage value Vm j is the voltage value Vm included in the measured voltage waveform data Vm j The voltage value Vm obtained at the earliest sampling timing among j is.

[0103] In this configuration, in step S2, the trigger detector 24 sets the sampling timing (sampling position number) associated with the address in the buffer memory 23 where a value corresponding to the trigger position is stored, instead of the start address Ast, as the start sampling position number of the measured voltage waveform data Vm. The trigger detector 24 adds the offset value to the start sampling position number of the measured voltage waveform data Vm and subtracts a specified value R from the addition result to calculate the start sampling position number of the measured current waveform data Im. Furthermore, in step S6, the update unit 64 updates the offset value by adding the phase error Er to the offset value, thereby setting the new offset value. This configuration also achieves the same effect as updating the offset address Aofs.

[0104] The measuring device 2 may measure the electrical characteristics of another inductor, not limited to the inductor 15 of the DC / DC converter 1. For example, as shown in Fig. 14, the measuring device 2 may measure the electrical characteristics of an inductor 74 connected to an output terminal 71a of a signal generator 71. The signal generator 71 is a device that outputs an arbitrary baseband test signal.

[0105] The output terminal 71b of the signal generator 71 is connected to a port 2c of the measurement device 2 and outputs a trigger signal TG. A superposition circuit 73 is connected to the output terminal 71a. The superposition circuit 73 generates a current IL by superposing the baseband test signal output from the output terminal 71a on the DC current output from the current source 72. An inductor 74 is provided between the superposition circuit 73 and a reference voltage line (ground). A current probe 3 connected to a port 2a of the measurement device 2 is provided on a wiring connecting the superposition circuit 73 and one end of the inductor 74. A differential probe 4 connected to a port 2b of the measurement device 2 is provided to measure the voltage value of the voltage VL across both terminals of the inductor 74.

[0106] (Additional Note) [Clause 1] A measurement system comprising: a first port to which a current probe for measuring a current value flowing through an inductor to be measured is connected; a second port to which a voltage probe for measuring a voltage value applied between terminals of the inductor is connected; a first buffer memory for temporarily storing the current value measured by the current probe; a second buffer memory for temporarily storing the voltage value measured by the voltage probe; a third port to which a trigger signal indicating the timing for reading out the current value stored in the first buffer memory and the voltage value stored in the second buffer memory is input; a trigger detector for reading out measured current waveform data, which is the current value for a first period, from the first buffer memory and reading out measured voltage waveform data, which is the voltage value for a second period, from the second buffer memory in response to the trigger signal; and a signal processing device for detecting a phase error occurring between the first port and the second port based on the measured current waveform data and the measured voltage waveform data, wherein the signal processing device calculates an inductance value of the inductor based on the measured current waveform data and the measured voltage waveform data, a first start sampling position number indicating the sampling timing of a first current value included in the measured current waveform data read from the first buffer memory and a second start sampling position number indicating the sampling timing of a first voltage value included in the measured voltage waveform data read from the second buffer memory, in accordance with the phase error.

[0107] [Clause 2] The measurement device according to Clause 1, wherein the first period is longer than the second period, the measured voltage waveform data is N consecutive voltage values ​​starting from a first sampling timing, and the signal processing device searches the measured current waveform data for the N consecutive current values ​​at which the calculated voltage waveform data having the greatest similarity intensity to the measured voltage waveform data is obtained, and detects the time difference between the first sampling timing and a second sampling timing at which the searched N current values ​​start as the phase error.

[0108] [Clause 3] The measurement device according to Clause 1, wherein the signal processing device applies a wavelet transform to the measured voltage waveform data to detect a first feature point on the time axis within a predetermined first analysis window, applies a wavelet transform to the calculated voltage waveform data to detect a second feature point on the time axis within a predetermined second analysis window, and detects a time difference between the first feature point and the second feature point as the phase error.

[0109] [Clause 4] The measurement device according to any one of clauses 1 to 3, wherein the signal processing device detects the phase error at a preset cycle and updates the offset value.

[0110] [Clause 5] The measurement device according to any one of clauses 1 to 4, wherein the signal processing device calculates an electrical characteristic value of the inductor based on the measured current waveform data and the measured voltage waveform data read out after the offset value is updated.

[0111] [Clause 6] The measurement device according to clause 5, wherein the electrical characteristic value includes at least one of effective power, apparent power, reactive power, and inductance value.

[0112] [Clause 7] A measurement method for a measurement device having a first port to which a current probe is connected that measures a current value flowing through an inductor to be measured, a second port to which a voltage probe is connected that measures a voltage value applied between terminals of the inductor, and a third port to which a trigger signal is input, comprising the steps of: reading, in response to the trigger signal, measured current waveform data that is the current value for a first period from a first buffer memory that temporarily stores the current value measured by the current probe, and reading measured voltage waveform data that is the voltage value for a second period from a second buffer memory that temporarily stores the voltage value measured by the voltage probe; calculating an inductance value of the inductor based on the measured current waveform data and the measured voltage waveform data; calculating calculated voltage waveform data that is calculated voltage waveform data based on the measured current waveform data and the inductance value; and detecting a phase error between the measured voltage waveform data and the calculated voltage waveform data as a phase error occurring between the first port and the second port. updating an offset value between a first start sampling position number indicating the sampling timing of a first current value included in the measured current waveform data read from the first buffer memory and a second start sampling position number indicating the sampling timing of a first voltage value included in the measured voltage waveform data read from the second buffer memory according to the phase error.

[0113] 2...measuring device, 2a...port (first port), 2b...port (second port), 2c...port (third port), 3...current probe, 4...differential probe (voltage probe), 15...inductor, 21...buffer memory (first buffer memory), 22...buffer memory (second buffer memory), 24...trigger detector, 26...signal processing device.

Claims

a first buffer memory for temporarily storing the current value measured by the current probe; a second buffer memory for temporarily storing the voltage value measured by the voltage probe; a third port for receiving a trigger signal indicating the timing for reading the current value stored in the first buffer memory and the voltage value stored in the second buffer memory; a trigger detector for reading measured current waveform data, which is the current value for a first period, from the first buffer memory and reading measured voltage waveform data, which is the voltage value for a second period, from the second buffer memory in response to the trigger signal; and a signal processing device for detecting a phase error occurring between the first port and the second port based on the measured current waveform data and the measured voltage waveform data, wherein the signal processing device: calculates an inductance value of the inductor based on the measured current waveform data and the measured voltage waveform data; calculates calculated voltage waveform data, which is calculated voltage waveform data, based on the measured current waveform data and the inductance value; a phase error between the measured voltage waveform data and the calculated voltage waveform data is detected as the phase error, and the trigger detector updates an offset value between a first start sampling position number indicating the sampling timing of a first current value included in the measured current waveform data read from the first buffer memory and a second start sampling position number indicating the sampling timing of a first voltage value included in the measured voltage waveform data read from the second buffer memory according to the phase error.

2. The measuring device of claim 1, wherein the first period is longer than the second period, the measured voltage waveform data is N consecutive voltage values ​​starting from a first sampling timing, and the signal processing device searches the measured current waveform data for the N consecutive current values ​​at which the calculated voltage waveform data having the greatest similarity strength to the measured voltage waveform data is obtained, and detects the time difference between the first sampling timing and a second sampling timing at which the searched N current values ​​start as the phase error.

3. The measurement device according to claim 1, wherein the signal processing device applies a wavelet transform to the measured voltage waveform data to detect a first feature point on the time axis within a predetermined first analysis window, applies a wavelet transform to the calculated voltage waveform data to detect a second feature point on the time axis within a predetermined second analysis window, and detects the time difference between the first feature point and the second feature point as the phase error.

4. The measuring device according to any one of claims 1 to 3, wherein the signal processing device detects the phase error at a preset cycle and updates the offset value.

5. A measuring device according to any one of claims 1 to 3, wherein the signal processing device calculates the electrical characteristic values ​​of the inductor based on the measured current waveform data and the measured voltage waveform data read out after the offset value has been updated.

6. The measurement device of claim 5, wherein the electrical characteristic value includes at least one of effective power, apparent power, reactive power, and inductance value.

7. A measurement method for a measurement device having a first port to which a current probe is connected that measures the value of a current flowing through an inductor to be measured, a second port to which a voltage probe is connected that measures the value of a voltage applied between the terminals of the inductor, and a third port to which a trigger signal is input, comprising the steps of: reading, in response to the trigger signal, measured current waveform data, which is the current value for a first period, from a first buffer memory that temporarily stores the current value measured by the current probe; and reading measured voltage waveform data, which is the voltage value for a second period, from a second buffer memory that temporarily stores the voltage value measured by the voltage probe; calculating an inductance value of the inductor based on the measured current waveform data and the measured voltage waveform data; calculating calculated voltage waveform data, which is calculated voltage waveform data, based on the measured current waveform data and the inductance value; and detecting a phase error between the measured voltage waveform data and the calculated voltage waveform data as a phase error occurring between the first port and the second port. updating an offset value between a first start sampling position number indicating the sampling timing of a first current value included in the measured current waveform data read from the first buffer memory and a second start sampling position number indicating the sampling timing of a first voltage value included in the measured voltage waveform data read from the second buffer memory according to the phase error.

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