Light detection device

Abstract

A light detection device according to an embodiment of the present disclosure comprises: a photoelectric conversion element; a first transistor that is capable of generating a first signal based on a charge converted by the photoelectric conversion element; and a second transistor that is capable of outputting the first signal. The first transistor has a first portion that is part of a semiconductor layer, and a first gate electrode that is provided so as to sandwich the first portion. The second transistor has a second portion that is another part of the semiconductor layer, and a second gate electrode that is provided so as to sandwich the second portion. The length of the second portion in the thickness direction of the semiconductor layer is different from the length of the first portion in the thickness direction of the semiconductor layer.

Description

Photodetector

[0001] The present disclosure relates to a light detection device.

[0002] An imaging device has been proposed that includes pixels having an amplifying transistor that is a fin-type MOSFET (MOS Field Effect Transistor) (Patent Document 1).

[0003] Japanese Patent Application Laid-Open No. 2023-3799

[0004] There is a demand for improved performance in light-detecting devices.

[0005] It is desirable to provide a photodetector device with good performance.

[0006] A photodetector according to an embodiment of the present disclosure includes a photoelectric conversion element that converts light into an electric charge, a first transistor capable of generating a first signal based on the electric charge converted by the photoelectric conversion element, and a second transistor capable of outputting the first signal. The first transistor has a first portion that is a part of a semiconductor layer and first gate electrodes disposed to sandwich the first portion. The second transistor has a second portion that is another part of the semiconductor layer and second gate electrodes disposed to sandwich the second portion. The length of the second portion in the thickness direction of the semiconductor layer is different from the length of the first portion in the thickness direction of the semiconductor layer. The photodetector according to an embodiment of the present disclosure includes a photoelectric conversion element that converts light into an electric charge, a first transistor capable of generating a first signal based on the electric charge converted by the photoelectric conversion element, and a second transistor capable of outputting the first signal. The first transistor has the first portion that is a part of the semiconductor layer and first gate electrodes disposed to sandwich the first portion. The second transistor has a second portion that is another part of the semiconductor layer and second gate electrodes disposed to sandwich the second portion. The width of the second portion is different from the width of the first portion. A photodetector according to an embodiment of the present disclosure includes a photoelectric conversion element that converts light into an electric charge, a first transistor capable of generating a first signal based on the electric charge converted by the photoelectric conversion element, and a second transistor capable of outputting the first signal. The first transistor has a first portion that is a part of a semiconductor layer and first gate electrodes disposed to sandwich the first portion. The second transistor has a second portion that is another part of the semiconductor layer and second gate electrodes disposed to sandwich the second portion. The semiconductor layer has one or more first portions and one or more second portions. The number of second portions is different from the number of first portions. A photodetector according to an embodiment of the present disclosure includes a photoelectric conversion element that converts light into an electric charge, a first transistor capable of generating a first signal based on the electric charge converted by the photoelectric conversion element, and a second transistor capable of outputting the first signal. Of the first and second transistors, only the second transistor is configured as a Fin-type transistor.

[0007] FIG. 1 is a block diagram illustrating an example of a schematic configuration of an imaging device, which is an example of a photodetector according to an embodiment of the present disclosure. FIG. 2 is a diagram illustrating an example of a circuit configuration of a pixel of the imaging device according to an embodiment of the present disclosure. FIG. 3 is a block diagram illustrating another example of a schematic configuration of the imaging device according to an embodiment of the present disclosure. FIG. 4 is a diagram illustrating another example of a circuit configuration of a pixel of the imaging device according to an embodiment of the present disclosure. FIG. 5 is a diagram illustrating an example of a configuration of a pixel of the imaging device according to an embodiment of the present disclosure. FIG. 6 is a diagram illustrating an example of a cross-sectional configuration of a pixel of the imaging device according to an embodiment of the present disclosure. FIG. 7 is a diagram illustrating an example of a cross-sectional configuration of a pixel of the imaging device according to an embodiment of the present disclosure. FIG. 8 is a diagram illustrating an example of a cross-sectional configuration of a pixel of the imaging device according to an embodiment of the present disclosure. FIG. 9 is a diagram illustrating an example of a configuration of a pixel of the imaging device according to an embodiment of the present disclosure. FIG. 10 is a diagram illustrating an example of a configuration of a pixel of the imaging device according to an embodiment of the present disclosure. FIG. 11 is a diagram illustrating an example of a configuration of the imaging device according to an embodiment of the present disclosure. FIG. 12 is a diagram illustrating an example of a configuration of the imaging device according to an embodiment of the present disclosure. FIG. 13 is a diagram for explaining another example configuration of an imaging device according to an embodiment of the present disclosure. FIG. 14 is a diagram for explaining another example configuration of an imaging device according to an embodiment of the present disclosure. FIG. 15 is a diagram for explaining another example configuration of an imaging device according to an embodiment of the present disclosure. FIG. 16 is a diagram for explaining another example configuration of an imaging device according to an embodiment of the present disclosure. FIG. 17 is a diagram for explaining another example configuration of an imaging device according to an embodiment of the present disclosure. FIG. 18 is a diagram for explaining an example configuration of an imaging device according to Modification 1 of the present disclosure. FIG. 19 is a diagram for explaining an example configuration of an imaging device according to Modification 1 of the present disclosure. FIG. 20 is a diagram for explaining another example configuration of an imaging device according to Modification 1 of the present disclosure. FIG. 21 is a diagram for explaining another example configuration of an imaging device according to Modification 1 of the present disclosure. FIG. 22 is a diagram for explaining another example configuration of an imaging device according to Modification 1 of the present disclosure. FIG. 23 is a diagram for explaining another example configuration of an imaging device according to Modification 1 of the present disclosure. FIG. 24 is a diagram for explaining another example configuration of an imaging device according to Modification 1 of the present disclosure.FIG. 25 is a diagram for explaining another example configuration of an imaging device according to Modification 1 of the present disclosure. FIG. 26 is a diagram for explaining an example configuration of an imaging device according to Modification 2 of the present disclosure. FIG. 27 is a diagram for explaining an example configuration of an imaging device according to Modification 2 of the present disclosure. FIG. 28 is a diagram for explaining an example configuration of an imaging device according to Modification 6 of the present disclosure. FIG. 29 is a diagram for explaining an example configuration of an imaging device according to Modification 6 of the present disclosure. FIG. 30 is a diagram for explaining an example configuration of an imaging device according to Modification 6 of the present disclosure. FIG. 31 is a block diagram showing an example configuration of an electronic device. FIG. 32 is a block diagram showing an example of a schematic configuration of a vehicle control system. FIG. 33 is an explanatory diagram showing an example of installation positions of an outside-vehicle information detection unit and an imaging unit. FIG. 34 is a diagram showing an example of a schematic configuration of an endoscopic surgery system. FIG. 35 is a block diagram showing an example of the functional configuration of a camera head and a CCU.

[0008] Hereinafter, embodiments of the present disclosure will be described in detail with reference to the drawings. The description will be made in the following order: 1. Embodiment 2. Modification 3. Application Example 4. Application Example

[0009] 1 is a block diagram showing an example of a schematic configuration of an imaging device which is an example of a photodetection device according to an embodiment of the present disclosure. The photodetection device is a device capable of detecting incident light. The imaging device 1 which is an example of a photodetection device has a plurality of pixels P including photoelectric conversion units (photoelectric conversion elements) and is configured to photoelectrically convert incident light to generate a signal.

[0010] The imaging device 1 receives light that has passed through an optical system (not shown) including, for example, an optical lens, and generates a signal. The imaging device 1 is configured using, for example, a substrate 120 (for example, a semiconductor substrate such as a Si (silicon) substrate or an SOI (silicon on insulator) substrate) on which a photoelectric conversion unit of each pixel P is provided.

[0011] The photoelectric conversion unit of each pixel P is, for example, a photodiode (PD) and is configured to be able to photoelectrically convert light. As shown in the example of Fig. 1, the imaging device 1 has a region (pixel unit 100) in which a plurality of pixels P are provided. The imaging device 1 has, for example, the pixel unit 100 in which a plurality of pixels P are two-dimensionally arranged in a matrix, as an imaging area. The pixel unit 100 can also be said to be a pixel array in which a plurality of pixels P are arranged.

[0012] The imaging device 1 captures incident light (image light) from a subject to be measured via an optical system including an optical lens. The imaging device 1 captures an image of the subject formed by the optical lens. The imaging device 1 photoelectrically converts the received light (e.g., visible light, infrared light, etc.) to generate pixel signals.

[0013] The imaging device 1 (photodetector) may be configured as an image sensor, for example, a complementary metal oxide semiconductor (CMOS) image sensor, and may be used in various electronic devices such as digital still cameras, video cameras, and mobile phones.

[0014] 1 , the imaging device 1 includes a pixel unit 100 (pixel array), a vertical drive circuit 111, a signal processing circuit 112, a horizontal drive circuit 113, an output circuit 114, a control circuit 115, and an input / output terminal 116. The imaging device 1 is also provided with, for example, a plurality of control lines L1 and a plurality of signal lines L2.

[0015] The control lines L1 are signal lines capable of transmitting signals for controlling the pixels P, and are connected to the vertical drive circuit 111 and the pixels P of the pixel section 100. In the example shown in FIG. 1 , a plurality of control lines L1 are wired in the pixel section 100 for each pixel row made up of a plurality of pixels P aligned in the horizontal direction (row direction). The control lines L1 are configured to transmit control signals for reading out signals from the pixels P.

[0016] The plurality of control lines L1 for each pixel row of the imaging device 1 include, for example, wiring for transmitting signals for controlling selection transistors, wiring for transmitting signals for controlling reset transistors, wiring for transmitting signals for controlling switching transistors, etc. The control lines L1 can also be referred to as drive lines (pixel drive lines) for transmitting signals for driving the pixels P.

[0017] The signal line L2 is a signal line capable of transmitting a signal from the pixel P, and is connected to the pixel P of the pixel unit 100 and the signal processing circuit 112. In the pixel unit 100, for example, one or more signal lines L2 are wired for each pixel column formed by a plurality of pixels P aligned in the vertical direction (column direction).

[0018] The signal line L2 is a vertical signal line configured to transmit signals output from the pixels P. In the imaging device 1, multiple signal lines L2 may be provided for one pixel column. The imaging device 1 may have multiple signal lines L2 for each pixel column.

[0019] The vertical drive circuit 111 is configured to be able to drive each pixel P of the pixel unit 100. The vertical drive circuit 111 is configured with a plurality of circuits including, for example, a buffer, a shift register, an address decoder, etc. The vertical drive circuit 111 generates a signal for driving the pixel P and outputs the signal to each pixel P of the pixel unit 100 via a control line L1. The vertical drive circuit 111 is controlled by a control circuit 115, and controls the pixels P of the pixel unit 100.

[0020] The vertical drive circuit 111 generates, for example, a signal for controlling the selection transistor of the pixel P, a signal for controlling the reset transistor, etc., and supplies these signals to each pixel P via a control line L1. The vertical drive circuit 111 can control the reading of pixel signals from each pixel P. The vertical drive circuit 111 can also be said to be a pixel control unit configured to be able to control each pixel P.

[0021] The signal processing circuit 112 is configured to be able to perform signal processing of input pixel signals. The signal processing circuit 112 includes, for example, a load circuit, an AD (Analog-Digital) conversion circuit, a horizontal selection switch, etc. As an example, the load circuit is configured by a current source capable of supplying current to the amplification transistor of the pixel P. The load circuit, together with the amplification transistor of the pixel P, forms, for example, a source follower circuit.

[0022] The signal processing circuit 112 may have an amplifier circuit configured to amplify signals read out from the pixels P via the signal lines L2. A load circuit, an amplifier circuit, an AD conversion circuit, etc. may be provided for each of the multiple signal lines L2. A load circuit, an amplifier circuit, an AD conversion circuit, etc. may be provided for each pixel column of the pixel unit 100.

[0023] The signals output from each pixel P selected and scanned by the vertical drive circuit 111 are input to the signal processing circuit 112 via a signal line L2. The signal processing circuit 112 can perform signal processing such as AD conversion of the signal from the pixel P and CDS (Correlated Double Sampling).

[0024] The horizontal drive circuit 113 is composed of, for example, a buffer, a shift register, an address decoder, etc. The horizontal drive circuit 113 is configured to be able to drive the horizontal selection switches of the signal processing circuit 112. The horizontal drive circuit 113 drives each horizontal selection switch of the signal processing circuit 112 in sequence while scanning them. The signals of each pixel P transmitted through each signal line L2 are subjected to signal processing by the signal processing circuit 112 and output to the horizontal signal line 121 in sequence by selective scanning by the horizontal drive circuit 113.

[0025] The output circuit 114 is configured to perform signal processing on an input signal and output the signal. The output circuit 114 performs signal processing on pixel signals sequentially input from the signal processing circuit 112 via the horizontal signal line 121, and outputs the processed pixel signals. The output circuit 114 can perform, for example, buffering, black level adjustment, column variation correction, various types of digital signal processing, and the like.

[0026] The control circuit 115 is configured to be able to control each part of the imaging device 1. The control circuit 115 receives externally provided clocks, data instructing the operation mode, etc., and can also output data such as internal information of the imaging device 1. The control circuit 115 has, for example, a timing generator configured to be able to generate various timing signals.

[0027] The control circuit 115 controls the driving of peripheral circuits such as the vertical drive circuit 111, the signal processing circuit 112, and the horizontal drive circuit 113 based on various timing signals (pulse signals, clock signals, etc.) generated by the timing generator. The input / output terminals 116 exchange signals with the outside.

[0028] The vertical drive circuit 111, the signal processing circuit 112, the horizontal drive circuit 113, the horizontal signal line 121, the output circuit 114, the control circuit 115, etc. may be provided on a single semiconductor substrate or may be provided separately on multiple semiconductor substrates. The imaging device 1 may have a structure (a stacked structure) formed by stacking multiple substrates.

[0029] 2 is a diagram showing an example of a circuit configuration of a pixel of an imaging device according to an embodiment. The pixel P includes a photoelectric conversion unit 11, a transistor TR, a floating diffusion FD, and a readout circuit 20. The photoelectric conversion unit 11 is configured to receive light and generate a signal. The photoelectric conversion unit 11 (i.e., a photoelectric conversion region) is configured to be able to generate electric charges through photoelectric conversion.

[0030] 2, the photoelectric conversion unit 11 is a photodiode (PD) that converts incident light into an electric charge. The photoelectric conversion unit 11 performs photoelectric conversion and can generate an electric charge according to the amount of received light. The photoelectric conversion unit 11 is a photoelectric conversion element, which can also be called a light receiving element. The readout circuit 20 is configured to be able to output a signal based on the electric charge generated by photoelectric conversion.

[0031] The transistor TR is configured to be able to transfer charges photoelectrically converted by the photoelectric conversion unit 11 to the floating diffusion FD. The transistor TR is controlled by a signal STR to electrically connect or disconnect the photoelectric conversion unit 11 and the floating diffusion FD. The transistor TR is a transfer transistor. The transistor TR can transfer charges photoelectrically converted and stored in the photoelectric conversion unit 11 to the floating diffusion FD.

[0032] The floating diffusion FD is an accumulation unit configured to be able to accumulate transferred charges. The floating diffusion FD can accumulate charges photoelectrically converted by the photoelectric conversion unit 11. The floating diffusion FD accumulates the transferred charges and converts them into a voltage according to the capacitance of the floating diffusion FD. The floating diffusion FD can also be said to be a holding unit capable of holding charges.

[0033] The readout circuit 20 includes, for example, a transistor AMP, a transistor SEL, and a transistor RST. The readout circuit 20 can read out pixel signals based on charges photoelectrically converted by the photoelectric conversion unit 11 (photoelectric conversion region). The readout circuit 20 may also include a floating diffusion FD.

[0034] The transistor AMP is configured to generate and output a signal based on the charge accumulated in the floating diffusion FD. The transistor AMP is an amplifying transistor. The transistor AMP can generate and output a signal based on the charge converted by the photoelectric conversion unit 11.

[0035] The gate of the transistor AMP is electrically connected to the floating diffusion FD, and receives the voltage converted by the floating diffusion FD. The drain of the transistor AMP is connected to, for example, a power supply line that supplies a power supply voltage (power supply voltage VDD in the example shown in FIG. 2).

[0036] The source of the transistor AMP is connected to a signal line L2 via, for example, a transistor SEL. The transistor AMP is configured to generate a signal based on the charge accumulated in the floating diffusion FD, i.e., a signal based on the voltage of the floating diffusion FD, and output the signal to the signal line L2.

[0037] The transistor SEL is configured to be able to control the output of a pixel signal. The transistor SEL is electrically connected in series to the transistor AMP, for example, as in the example shown in FIG. 2 . The transistor SEL is controlled by a signal SSEL, and is configured to be able to output a signal from the transistor AMP to a signal line L2. The transistor SEL is a selection transistor. The transistor SEL can control the output timing of the pixel signal.

[0038] The transistor SEL is configured to be able to output a signal based on the charge converted by the photoelectric conversion unit 11. The transistor SEL can output a pixel signal of the pixel P to a signal line L2. The transistor SEL may be electrically connected in series between the transistor AMP and a power supply line to which a power supply voltage (power supply voltage VDD in FIG. 2) is applied.

[0039] The transistor RST is configured to be able to reset the voltage of the floating diffusion FD. In the example shown in Fig. 2, the transistor RST is electrically connected to a power supply line to which a power supply voltage VDD is applied, and is configured to be able to reset the charge of the pixel P. The transistor RST is a reset transistor.

[0040] The transistor RST is controlled by a signal SRST and can reset the charge accumulated in the floating diffusion FD and reset the voltage of the floating diffusion FD. The transistor RST electrically connects, for example, a power supply line and the floating diffusion FD and discharges the charge accumulated in the floating diffusion FD. The transistor RST can also reset the charge accumulated in the photoelectric conversion unit 11 via the transistor TR.

[0041] The readout circuit 20 may be configured to be able to change the conversion gain (i.e., conversion efficiency) when converting electric charge into voltage. The readout circuit 20 may include, for example, a transistor (switching transistor) used to set the conversion gain. The switching transistor is electrically connected, for example, between the floating diffusion FD and the transistor RST.

[0042] In the readout circuit 20, when the switching transistor is turned on, the capacitance added to the floating diffusion FD of the pixel P increases, and the conversion gain (conversion efficiency) when converting charge to voltage is switched. The switching transistor can change the conversion gain by switching the capacitance connected to the gate of the transistor AMP. The switching transistor may be electrically connected in series to the transistor RST or electrically connected in parallel to the transistor RST.

[0043] The above-mentioned transistor TR (transfer transistor), transistor AMP (amplification transistor), transistor SEL (selection transistor), transistor RST (reset transistor), and switching transistor are each, for example, a MOS transistor (MOSFET) having gate, source, and drain terminals.

[0044] 2, the transistors TR, AMP, SEL, and RST are each configured as an NMOS transistor. Note that the transistors of the pixel P may be configured as PMOS transistors as necessary.

[0045] The vertical drive circuit 111 (see Figure 1) of the imaging device 1 supplies control signals to the gates of the transistors TR, SEL, RST, switching transistors, etc. of each pixel P via the control line L1 described above, turning the transistors on (conducting state) or off (non-conducting state).

[0046] The multiple control lines L1 for each pixel row of the imaging device 1 include, for example, a wiring for transmitting a signal STR that controls the transistor TR, a wiring for transmitting a signal SSEL that controls the transistor SEL, a wiring for transmitting a signal SRST that controls the transistor RST, a wiring for transmitting a signal that controls a switching transistor, and the like.

[0047] The transistors TR, SEL, RST, and switching transistors are controlled to be turned on and off by a vertical drive circuit 111. The vertical drive circuit 111 controls the readout circuit 20 of each pixel P to output a pixel signal from each pixel P to a signal line L2. The vertical drive circuit 111 can control the reading out of the pixel signal of each pixel P to the signal line L2.

[0048] Fig. 3 is a block diagram showing another example of the schematic configuration of an imaging device according to an embodiment. The imaging device 1 may have a layered structure formed by stacking a plurality of substrates (i.e., semiconductor layers). In the example shown in Fig. 3, the imaging device 1 includes a substrate 120a, a substrate 120b, and a substrate 120c. The imaging device 1 may have a configuration in which the substrates 120a, 120b, and 120c are stacked.

[0049] The substrate 120a is provided with, for example, the photoelectric conversion unit 11 and the transistor TR of each pixel P. The substrate 120a has a pixel unit 100 in which a plurality of pixels P are arranged in a matrix. The substrate 120b is provided with, for example, each transistor of the readout circuit 20. On the substrate 120b, one readout circuit 20 may be provided for a plurality of pixels P. As an example, a readout circuit 20 may be arranged for every four pixels P.

[0050] 3, the substrate 120b is provided with a plurality of control lines L1 and a plurality of signal lines L2. The substrate 120c is provided with, for example, the vertical drive circuit 111, the signal processing circuit 112, the horizontal drive circuit 113, the horizontal signal lines 121, the output circuit 114, and the control circuit 115.

[0051] 4 is a diagram showing another example of the circuit configuration of a pixel of the imaging device according to the embodiment. The imaging device 1 may have a configuration in which a plurality of pixels P share one readout circuit 20. In the imaging device 1, for example, the readout circuit 20 is provided for a plurality of pixels P.

[0052] 4, a readout circuit 20 may be arranged for every four pixels P (referred to as pixels Pa to Pd). Pixels Pa, Pb, Pc, and Pd share one readout circuit 20. For example, 2×2 pixels formed by adjacent pixels Pa to Pd share one readout circuit 20.

[0053] The imaging device 1 can read out pixel signals of each of the 2×2 pixels by operating the readout circuit 20 in a time-division manner. The imaging device 1 can also read out pixel signals obtained by adding up the signals of each of the 2×2 pixels. For example, the imaging device 1 can read out pixel signals corresponding to the sum of charges photoelectrically converted by each of the 2×2 pixels.

[0054] The photoelectric conversion unit 11 (in the example shown in FIG. 4, the photodiode PD of pixel Pa to the photodiode PD of pixel Pd) can perform photoelectric conversion to generate charges according to the amount of light received. The transistor TR (in FIG. 4, the transistor TR of pixel Pa to the transistor TR of pixel Pd) is configured to be able to transfer the charges photoelectrically converted by the photoelectric conversion unit 11 to the floating diffusion FD.

[0055] 4, the transistors TR of pixels Pa to Pd are turned on and off by different signals. The transistor TR of pixel Pa is controlled by a signal STR1, and the transistor TR of pixel Pb is controlled by a signal STR2. The transistor TR of pixel Pc is controlled by a signal STR3, and the transistor TR of pixel Pd is controlled by a signal STR4.

[0056] The imaging device 1 may have a configuration in which five or more pixels P, for example, eight pixels P, share one readout circuit 20. For example, in the imaging device 1, a readout circuit 20 is arranged for every eight pixels P, and the eight pixels P share one readout circuit 20. Alternatively, 2×4 pixels may share one readout circuit 20.

[0057] [Configuration of Imaging Device] Fig. 5 is a diagram for explaining an example of the configuration of a pixel of an imaging device according to an embodiment. Figs. 6 to 8 are diagrams for explaining an example of the cross-sectional configuration of a pixel of an imaging device according to an embodiment. Fig. 6 shows an example of the cross-sectional configuration in the direction of line A-A' shown in Fig. 5, and Fig. 7 shows an example of the cross-sectional configuration in the direction of line B-B' shown in Fig. 5. Furthermore, Fig. 8 shows an example of the cross-sectional configuration in the direction of line C-C' shown in Fig. 5.

[0058] The pixel P of the imaging device 1 may have, for example, a transistor AMP and a transistor SEL having the structures shown in Figures 5 to 8. In the imaging device 1, a readout circuit 20 including the transistor AMP and the transistor SEL shown in Figures 5 to 7 is provided for each pixel P or for each set of multiple pixels P.

[0059] The imaging device 1 is configured using, for example, a substrate 120 (e.g., a semiconductor substrate such as a Si substrate or an SOI substrate) including a semiconductor layer 130. For example, the above-mentioned photoelectric conversion unit 11 and readout circuit 20 (e.g., transistor AMP, transistor SEL, transistor RST), etc. are formed on the substrate 120 including the semiconductor layer 130. As an example, a plurality of photoelectric conversion units 11 are embedded in the semiconductor layer 130.

[0060] The substrate 120 (base material) may be configured using a SiGe (silicon germanium) substrate, a SiC (silicon carbide) substrate, other semiconductor materials, etc. In the examples shown in Figures 5 to 8, the substrate 120 is configured to include a semiconductor layer 130 and a wiring layer 135. The wiring layer 135 is stacked on the semiconductor layer 130 in the Z-axis direction.

[0061] 6 and 7, the left-right direction on the paper, which is perpendicular to the Z-axis direction, is the X-axis direction, and the direction perpendicular to the Z-axis direction and the X-axis direction is the Y-axis direction. In other figures, directions may be indicated based on the directions of the arrows in FIGS. 6 and 7.

[0062] The wiring layer 135 includes, for example, a conductor film and an insulating film, and has a plurality of wires and vias, etc. The wiring layer 135 has a configuration in which a plurality of wires are stacked via an insulating film serving as an interlayer insulating film (interlayer insulating layer). The wiring layer 135 is configured as, for example, a multi-layer wiring layer, and includes two or more layers of wires, or three or more layers of wires.

[0063] The wiring of the wiring layer 135 is formed using a metal material such as aluminum (Al), copper (Cu), or tungsten (W). The wiring of the wiring layer 135 may be formed using polysilicon (Poly-Si) or other conductive materials. The interlayer insulating film is formed using, for example, silicon oxide (SiO), silicon nitride (SiN), silicon oxynitride (SiON), or other insulating materials. The interlayer insulating film may be formed using other insulating materials.

[0064] The photoelectric conversion unit 11 and the readout circuit 20 may be provided on separate substrates (i.e., semiconductor layers). For example, as in the example shown in Fig. 3, the photoelectric conversion unit 11 of each pixel P may be provided on a substrate 120a, and the readout circuit 20 may be provided on a substrate 120b. As an example, the substrate 120b in Fig. 3 corresponds to the substrate 120 shown in Figs. 5 and 6, etc.

[0065] The above-mentioned vertical drive circuit 111, signal processing circuit 112, horizontal drive circuit 113, horizontal signal line 121, output circuit 114, control circuit 115 (see Figures 1 and 3), etc. are provided on a substrate 120 including a semiconductor layer 130 and a wiring layer 135, or on a substrate separate from the substrate 120.

[0066] 6 and 7, the semiconductor layer 130 has opposing surfaces 11S1 and 11S2. The surface 11S2 is the surface opposite to the surface 11S1. The surface 11S1 of the semiconductor layer 130 is an element formation surface on which elements such as transistors and capacitors are formed. A gate electrode, a gate insulating film (e.g., a gate oxide film), and the like are provided on the surface 11S1 of the semiconductor layer 130.

[0067] 6, the semiconductor layer 130 has a well 25. The well 25 is, for example, a p-type semiconductor region, i.e., a p-type well (p-well). The well 25, which is a p-type well region, is provided in the semiconductor layer 130. Note that the well 25 may be an n-type semiconductor region serving as an n-type well region, as necessary.

[0068] 6 and the like, the transistor AMP has a gate electrode 41a, a gate insulating film 42a, and a portion P1a that is part of the semiconductor layer 130. The transistor SEL has a gate electrode 41b, a gate insulating film 42b, and a portion P1b that is part of the semiconductor layer 130. Furthermore, for example, as shown in FIG. 9, the transistor AMP may have semiconductor regions 31a and 32a, and the transistor SEL may have semiconductor regions 31b and 32b.

[0069] The semiconductor regions 31a and 32a, and the semiconductor regions 31b and 32b are respectively provided in the well 25. In other words, in the imaging device 1, the semiconductor regions 31a, 31b, 32a, and 32b are arranged to replace part of the well 25.

[0070] The portion P1a of the semiconductor layer 130 and the semiconductor region 31a (or the semiconductor region 32a) have different conductivity types. The portion P1b of the semiconductor layer 130 and the semiconductor region 31b (or the semiconductor region 32b) have different conductivity types. Note that, as in the example shown in FIG. 10 , the semiconductor region 32a and the semiconductor region 31b may be provided integrally.

[0071] 6 and 7, the portion P1a and the portion P1b of the semiconductor layer 130 are regions where a channel is formed (channel regions). The transistor AMP has the portion P1a, which is part of the semiconductor layer 130, as its channel region. The transistor SEL has the portion P1b, which is another part of the semiconductor layer 130, as its channel region.

[0072] The semiconductor regions 31a and 32a are the source and drain regions of the transistor AMP. One of the semiconductor regions 31a and 32a, for example, the semiconductor region 31a, is the drain region of the transistor AMP. The other of the semiconductor regions 31a and 32a, for example, the semiconductor region 32a, is the source region of the transistor AMP.

[0073] The semiconductor regions 31b and 32b are the source and drain regions of the transistor SEL. One of the semiconductor regions 31b and 32b, for example, the semiconductor region 31b, is the drain region of the transistor SEL. The other of the semiconductor regions 31b and 32b, for example, the semiconductor region 32b, is the source region of the transistor SEL.

[0074] The semiconductor regions 31 a, 31 b, 32 a, and 32 b are, for example, n-type semiconductor regions formed using n-type impurities. The semiconductor regions 31 a, 31 b, 32 a, and 32 b are formed, for example, by doping (adding) n-type impurities into regions of the semiconductor layer 130. The semiconductor regions 31 a, 31 b, 32 a, and 32 b are, for example, n-type diffusion regions and can also be called n-type conductive regions.

[0075] The portion P1a of the semiconductor layer 130 and the portion P1b of the semiconductor layer 130 are each, for example, a p-type semiconductor region. As an example, the portions P1a and P1b are provided as part of the well 25. Note that the portions P1a and P1b may be n-type semiconductor regions (for example, n-type semiconductor regions) as necessary.

[0076] As shown in the example of Fig. 6, a gate electrode 41a and a gate insulating film 42a are provided around the portion P1a of the semiconductor layer 130. A semiconductor region 31a and a semiconductor region 32a are arranged around the gate electrode 41a. Furthermore, as shown in the example of Fig. 7, a gate electrode 41b and a gate insulating film 42b are provided around the portion P1b of the semiconductor layer 130. A semiconductor region 31b and a semiconductor region 32b are arranged around the gate electrode 41b.

[0077] Furthermore, in the imaging device 1, an isolation region 80 is provided as in the example shown in FIG. 5 etc. The isolation region 80 is provided, for example, around the transistor AMP and the transistor SEL. The isolation region 80 (isolation portion) is configured using, for example, a trench (groove portion). As an example, the isolation region 80 has an STI (Shallow Trench Isolation) structure.

[0078] An insulating film (insulator) such as an oxide film (e.g., a silicon oxide film) or a nitride film (e.g., a silicon nitride film) is provided in the trench of the isolation region 80. As an example, the isolation region 80 is provided on the surface 11S1 side of the semiconductor layer 130. The isolation region 80 is formed on the element formation surface side where elements such as transistors are formed, and isolates the elements from each other.

[0079] The isolation region 80 may be formed using other insulating materials. A void (cavity) may be provided within the trench of the isolation region 80. The isolation region 80 may be configured of a semiconductor region (a p-type semiconductor region or an n-type semiconductor region) formed by ion implantation. The isolation region 80 may be provided so as to penetrate the semiconductor layer 130.

[0080] The gate electrode 41a of the transistor AMP is provided, for example, to sandwich a part of the semiconductor layer 130. As an example, on the surface 11S1 side of the semiconductor layer 130, the part of the gate electrode 41a is provided to sandwich a part P1a of the semiconductor layer 130 as a channel region of the transistor AMP, with a gate insulating film 42a interposed therebetween. The transistor AMP can be configured as a Fin-type transistor.

[0081] At least a portion of the gate electrode 41a is formed to be located within the semiconductor layer 130. For example, at least a portion of each of the gate electrode 41a and the gate insulating film 42a is provided by digging into the semiconductor layer 130. A portion of each of the gate electrode 41a and the gate insulating film 42a can be disposed so as to be embedded in the semiconductor layer 130.

[0082] 6, the gate electrode 41a of the transistor AMP has a plurality of portions P2a. The portions P2a of the gate electrode 41a are provided in the semiconductor layer 130 so as to sandwich a portion P1a that will become a channel region of the transistor AMP. As an example, the portions P2a of the gate electrode 41a are formed in a plurality of trenches (groove portions) provided in the semiconductor layer 130.

[0083] The multiple portions P2a of the gate electrode 41a are arranged, for example, so as to be aligned with one another in the X-axis direction (or the Y-axis direction) with the portion P1a sandwiched between them. It can also be said that the multiple portions P1a of the semiconductor layer 130 are arranged so as to be aligned with one another in the X-axis direction with the portion P2a sandwiched between them. Note that the number, shapes, etc. of the portions P1a and the portions P2a are not limited to the example shown in the figure and can be changed as appropriate.

[0084] The gate electrode 41b of the transistor SEL is provided, for example, to sandwich a part of the semiconductor layer 130. As an example, on the surface 11S1 side of the semiconductor layer 130, the part of the gate electrode 41b is provided to sandwich a part P1b of the semiconductor layer 130 serving as a channel region of the transistor SEL, with a gate insulating film 42b interposed therebetween. The transistor SEL is configured as a Fin transistor.

[0085] At least a portion of the gate electrode 41b is formed to be located within the semiconductor layer 130. For example, at least a portion of each of the gate electrode 41b and the gate insulating film 42b is provided by digging into the semiconductor layer 130. A portion of each of the gate electrode 41b and the gate insulating film 42b can be disposed to be embedded in the semiconductor layer 130.

[0086] 7, the gate electrode 41b of the transistor SEL has a plurality of portions P2b. The plurality of portions P2b of the gate electrode 41b are provided in the semiconductor layer 130 so as to sandwich a portion P1b that becomes a channel region of the transistor SEL. As an example, the plurality of portions P2b of the gate electrode 41b are formed in a plurality of trenches provided in the semiconductor layer 130.

[0087] The multiple portions P2b of the gate electrode 41b are arranged, for example, side by side in the X-axis direction (or Y-axis direction) with the portion P1b sandwiched between them. It can also be said that the multiple portions P1b of the semiconductor layer 130 are arranged side by side in the X-axis direction with the portion P2b sandwiched between them. Note that the number, shapes, etc. of the portions P1b and the portions P2b are not limited to the example shown in the figure and can be changed as appropriate.

[0088] Portions P1a and P1b of the semiconductor layer 130 each have a fin shape and can be referred to as fin portions. Portions P1a and P1b can also be referred to as vertical gate electrode portions. Portions P2a of the gate electrode 41a and portions P2b of the gate electrode 41b each have a fin shape and can also be referred to as fin portions. Portions P1a and P1b (or portions P2a and P2b) are protruding structural portions and can also be referred to as protruding portions.

[0089] The portions P1a and P1b of the semiconductor layer 130 are structural portions provided so as to extend in the thickness direction of the semiconductor layer 130 (or the substrate 120), and can be configured as convex portions (i.e., convex structural portions). The semiconductor layer 130 has, for example, a plurality of portions P1a and a plurality of portions P1b formed so as to extend in the thickness direction perpendicular to the surface 11S1 of the semiconductor layer 130.

[0090] The portion P2a of the gate electrode 41a and the portion P2b of the gate electrode 41b are formed, for example, so as to protrude from the surface 11S1 of the semiconductor layer 130 toward the inside of the semiconductor layer 130. The portions P2a and P2b are, for example, structural portions provided so as to extend in the thickness direction of the semiconductor layer 130, and can also be said to be convex portions extending from the surface 11S1 of the semiconductor layer 130 toward the inside of the semiconductor layer 130.

[0091] 6 and 7, the portion P1a (fin portion) of the semiconductor layer 130 and the portion P2a of the gate electrode 41a are provided between the isolation regions 80 on both sides. In addition, the portion P1b (fin portion) of the semiconductor layer 130 and the portion P2b of the gate electrode 41b are also provided between the isolation regions 80 on both sides, for example.

[0092] In the imaging device 1, the gate insulating film 42a of the transistor AMP is provided on the channel region of the transistor AMP. The gate insulating film 42a is, for example, a gate oxide film, and is formed between the portion P1a serving as the channel region and the gate electrode 41a. The gate electrode 41a is provided on the gate insulating film 42a.

[0093] 6, the gate electrode 41a is disposed so as to cover the portion P1a of the semiconductor layer 130 via a gate insulating film 42a. As an example, the gate insulating film 42a is provided so as to extend along the plurality of portions P1a of the semiconductor layer 130. The gate insulating film 42a is formed in the semiconductor layer 130 so as to extend along the plurality of portions P2a of the gate electrode 41a.

[0094] The gate insulating film 42b of the transistor SEL is provided on the channel region of the transistor SEL. The gate insulating film 42b (e.g., a gate oxide film) is formed between the portion P1b serving as the channel region and the gate electrode 41b. The gate electrode 41b is provided on the gate insulating film 42b.

[0095] 7, the gate electrode 41b is disposed so as to cover the portion P1b of the semiconductor layer 130 via a gate insulating film 42b. As an example, the gate insulating film 42b is provided so as to extend along the plurality of portions P1b of the semiconductor layer 130. The gate insulating film 42b is formed in the semiconductor layer 130 so as to extend along the plurality of portions P2b of the gate electrode 41b.

[0096] The gate electrode 41a of the transistor AMP and the gate electrode 41b of the transistor SEL are made of polysilicon (Poly-Si), for example. Each of the gate electrodes 41a and 41b may be made of a metal material or a metal compound (e.g., a metal nitride).

[0097] The gate electrodes 41 a and 41 b may be made of, for example, tantalum nitride (TaN), titanium nitride (TiN), tungsten (W), etc., or may be formed using other materials. Sidewalls 43 may be provided on the side surfaces of the gate electrode 41 a and the gate electrode 41 b, respectively.

[0098] The gate insulating films 42a and 42b are each formed of a single layer film made of one of silicon oxide (SiO), silicon oxynitride (SiON), hafnium oxide (HfO), etc., or a laminate film made of two or more of these materials. The gate insulating films 42a and 42b may be formed of a high-dielectric-constant material having a higher dielectric constant than that of silicon oxide, such as a hafnium-based insulating film.

[0099] In the imaging device 1, as described above, the transistor AMP has a gate electrode 41a disposed so as to sandwich a portion of the semiconductor layer 130. The transistor AMP is configured as a Fin-type transistor. This allows for a large effective gate width per footprint (occupied area). This increases the amount of change in drain current (i.e., Gm) with respect to a change in gate voltage of the transistor AMP, thereby enabling noise reduction.

[0100] As described above, the transistor SEL has a gate electrode 41b provided to sandwich a portion of the semiconductor layer 130. The transistor SEL is configured as a Fin-type transistor. This allows the effective gate width per footprint to be increased. The double gate effect can improve the OFF characteristics of the transistor SEL and reduce its Ron (on-resistance).

[0101] Furthermore, the imaging device 1 is configured such that the size (length, width, etc.) or number of the portions P1a in the transistor AMP differs from the size or number of the portions P1b in the transistor SEL. This allows, for example, the threshold voltage of the transistor AMP and the threshold voltage of the transistor SEL to be adjusted separately (independently), thereby improving the characteristics of the transistor AMP and the transistor SEL.

[0102] If the threshold voltage of the transistor AMP is too high, the voltage range of the source voltage of the transistor AMP and the signal voltage of the signal line L2 will narrow, which may exceed the normal operating range of the comparator of the AD conversion circuit to which the pixel signal is input. Therefore, for example, the length of the portion P1a in the thickness direction (i.e., the Z-axis direction) of the semiconductor layer 130 is increased (i.e., the depth of the trench in which the portion P2a is provided is increased). This appropriately reduces the threshold voltage of the transistor AMP and improves circuit characteristics. It also reduces random noise mixed into the pixel signal.

[0103] Indicators of the characteristics of the transistor SEL include Low-Cut (LC), which is used to understand the OFF characteristics, and High-Cut (HC), which is used to understand the source-drain resistance (Ron) when the transistor is ON. For example, LC is the source cutoff voltage when the gate is OFF, and indicates the magnitude of the source voltage when a predetermined current (e.g., several nA) flows through the transistor SEL. Also, HC is the source cutoff voltage when the gate is ON, and indicates the magnitude of the source voltage when a predetermined current (e.g., several μA to several tens of μA) flows through the transistor SEL.

[0104] In the imaging device 1, the length of the portion P1b of the transistor SEL is set to be relatively long in the thickness direction (Z-axis direction) of the semiconductor layer 130 (i.e., the depth of the trench in which the portion P2b is provided is made deep). This makes it possible to lower the threshold voltage of the transistor SEL and lower LC (i.e., strengthen the OFF characteristics). This makes it possible to prevent defects (flaws) such as black dots from appearing in the image.

[0105] Furthermore, by lowering the threshold voltage of the transistor SEL, it is possible to increase HC (i.e., decrease Ron). This improves the linearity of the source follower drive, i.e., the linearity of the pixel signal level with respect to the charge accumulation time. By increasing the length of the portion P1b (fin portion) (i.e., increasing the trench depth), it is possible to improve the OFF characteristics and reduce Ron.

[0106] If the threshold voltage of the transistor AMP is too low, the transistor AMP cannot be operated in the saturation region, which may result in a deterioration in the linearity of the source follower drive. Furthermore, if the threshold voltage is adjusted only by doping impurities into the channel region, impurity fluctuations may cause large variations in the characteristics of the transistors for each pixel, resulting in a risk of characteristic degradation.

[0107] In this embodiment, as described above, the portion P1a (fin portion) of the transistor AMP and the portion P1b (fin portion) of the transistor SEL are configured to be different. This allows the threshold voltages of the transistor AMP and the transistor SEL to be adjusted (set) individually. This makes it possible to achieve both the LC and HC characteristics of the transistor SEL and the linearity of the transistor AMP. By optimizing the fin shape for each element, it is possible to maximize the performance of each element while reducing characteristic variations.

[0108] 11 and 12 are diagrams illustrating an example of the configuration of an imaging device according to an embodiment. The imaging device 1 may be configured such that, for example, a length d2 of the portion P1b in the thickness direction (i.e., the Z-axis direction) of the semiconductor layer 130 is longer than a length d1 of the portion P1a in the thickness direction of the semiconductor layer 130.

[0109] 11 and 12, in the thickness direction of the semiconductor layer 130 (i.e., the depth direction from the surface 11S1 of the semiconductor layer 130), the portion P1b of the transistor SEL has a length d2 that is greater than the length d1 of the portion P1a of the transistor AMP. For example, the length d2 of the portion P1b may be 10 nm or more longer than the length d1 of the portion P1a. The length d2 of the portion P1b may be 20 nm or more longer (larger) than the length d1 of the portion P1a.

[0110] By configuring the imaging device 1 in this manner, it is possible to improve the LC and HC characteristics of the transistor SEL while also improving linearity during source follower driving. It is also possible to reduce the amount of impurity injection required for the channel region. In particular, even in the case of fine pixels, it is possible to suppress variations in the characteristics of the transistors AMP and SEL of each pixel P. The imaging device 1 can have a structure that is advantageous for miniaturization.

[0111] 13 and 14 are diagrams illustrating another example of the configuration of the imaging device according to the embodiment. The imaging device 1 may be configured such that, for example, in the horizontal direction (e.g., the X-axis direction or the Y-axis direction), the width W2 of the portion P1b of the transistor SEL is smaller (narrower) than the width W1 of the portion P1a of the transistor AMP.

[0112] 13 and 14 , the portion P1b of the transistor SEL has a width W2 that is narrower than the width W1 of the portion P1a of the transistor AMP in the X-axis direction. For example, the width W2 of the portion P1b of the transistor SEL may be smaller (narrower) than the width W1 of the portion P1a of the transistor AMP by 10 nm or more. The width W2 of the portion P1b may be smaller than the width W1 of the portion P1a by 15 nm or more.

[0113] 13 and 14, the imaging device 1 can improve the LC and HC characteristics of the transistor SEL and improve linearity during source follower driving. For example, the LC of the transistor SEL can be lowered and the HC can be increased. This allows the voltage margin of the signal output to the signal line L2 to be expanded.

[0114] 15 to 17 are diagrams illustrating another example configuration of an imaging device according to an embodiment. Fig. 16 shows an example cross-sectional configuration along line A-A' shown in Fig. 15, and Fig. 17 shows an example cross-sectional configuration along line B-B' shown in Fig. 15. The imaging device 1 may be configured so that the number of portions P1b of the transistor SEL is greater than the number of portions P1a of the transistor AMP.

[0115] 15 to 17, the number of portions P1b (i.e., the number of fins) in transistor SEL is greater than the number of portions P1a in transistor AMP. Also, the number of portions P2b in gate electrode 41b is greater than the number of portions P2a in gate electrode 41a. The number of portions P1b may be one, two, or more than the number of portions P1a.

[0116] 15 to 17, the imaging device 1 can also improve the LC and HC characteristics of the transistor SEL and improve linearity during source follower driving. The voltage margin of the signal voltage of the signal line L2 can be expanded. Furthermore, the short channel effect can be suppressed.

[0117] [Actions and Effects] The photodetector according to this embodiment includes a photoelectric conversion element (photoelectric conversion unit 11) that photoelectrically converts light, a first transistor (transistor AMP) that can generate a first signal based on the charge converted by the photoelectric conversion element, and a second transistor (transistor SEL) that can output the first signal. The first transistor has a first portion (portion P1a) that is a part of the semiconductor layer and first gate electrodes (gate electrode 41a) that are provided so as to sandwich the first portion. The second transistor has a second portion (portion P1b) that is another part of the semiconductor layer and second gate electrodes (gate electrode 41b) that are provided so as to sandwich the second portion. The length of the second portion in the thickness direction of the semiconductor layer is different from the length of the first portion in the thickness direction of the semiconductor layer.

[0118] In the photodetector (image capture device 1) according to this embodiment, the length of the portion P1b in the thickness direction (i.e., the Z-axis direction) of the semiconductor layer 130 is different from the length of the portion P1a in the thickness direction of the semiconductor layer 130. This makes it possible to improve the characteristics of the transistor AMP and the transistor SEL. It is possible to realize a photodetector with good performance.

[0119] The photodetector according to one embodiment of the present disclosure includes a photoelectric conversion element (photoelectric conversion unit 11) that converts light into an electric charge, a first transistor (transistor AMP) that can generate a first signal based on the electric charge converted by the photoelectric conversion element, and a second transistor (transistor SEL) that can output the first signal. The first transistor has a first portion (portion P1a) that is a part of a semiconductor layer and first gate electrodes (gate electrode 41a) that sandwich the first portion. The second transistor has a second portion (portion P1b) that is another part of the semiconductor layer and second gate electrodes (gate electrode 41b) that sandwich the second portion. The width of the second portion is different from the width of the first portion.

[0120] In the photodetector (image capture device 1) according to this embodiment, the width of the portion P1b is different from the width of the portion P1a. This makes it possible to improve the characteristics of the transistor AMP and the transistor SEL. It is therefore possible to realize a photodetector with good performance.

[0121] The photodetector according to one embodiment of the present disclosure includes a photoelectric conversion element (photoelectric conversion unit 11) that photoelectrically converts light, a first transistor (transistor AMP) that can generate a first signal based on the charge converted by the photoelectric conversion element, and a second transistor (transistor SEL) that can output the first signal. The first transistor has a first portion (portion P1a) that is a part of a semiconductor layer and first gate electrodes (gate electrode 41a) that sandwich the first portion. The second transistor has a second portion (portion P1b) that is another part of the semiconductor layer and second gate electrodes (gate electrode 41b) that sandwich the second portion. The semiconductor layer has one or more first portions and one or more second portions. The number of second portions is different from the number of first portions.

[0122] In the photodetector (image capture device 1) according to this embodiment, the number of portions P1b is different from the number of portions P1a. This allows for improved characteristics of the transistor AMP and the transistor SEL. This makes it possible to realize a photodetector with excellent performance.

[0123] Next, a modified example of the present disclosure will be described. In the following, the same components as those in the above embodiment will be denoted by the same reference numerals, and the description thereof will be omitted as appropriate.

[0124] 18 and 19 are diagrams for explaining a configuration example of an imaging device according to Modification 1 of the present disclosure. As in the example shown in Fig. 18 and 19, the imaging device 1 may be configured so that the length of the portion P1b of the transistor SEL is longer than the length of the portion P1a of the transistor AMP, and the width of the portion P1b is smaller than the width of the portion P1a.

[0125] 20 and 21 are diagrams illustrating another example configuration of the imaging device according to Modification 1. The imaging device 1 may be configured, for example, as in the example shown in Fig. 20 and 21 , so that the length of the portion P1b of the transistor SEL is longer than the length of the portion P1a of the transistor AMP, and so that the number of the portions P1b is greater than the number of the portions P1a.

[0126] 22 and 23 are diagrams illustrating another example configuration of the imaging device according to Modification 1. As in the example shown in Fig. 22 and 23, the imaging device 1 may be configured so that the width of the portion P1b of the transistor SEL is smaller than the width of the portion P1a of the transistor AMP, and the number of the portions P1b is greater than the number of the portions P1a.

[0127] 24 and 25 are diagrams illustrating another example configuration of the imaging device according to Modification 1. As in the example shown in Fig. 24 and 25, the imaging device 1 may be configured so that the length of the portion P1b is longer than the length of the portion P1a, the width of the portion P1b is smaller than the width of the portion P1a, and the number of the portions P1b is greater than the number of the portions P1a.

[0128] In the imaging device 1 according to this modification, the threshold voltage of the transistor SEL can be reduced while the double gate effect can be strengthened, thereby improving the switching characteristics of the transistor SEL. In the case of this modification, the same effects as those of the above-described embodiment can be obtained.

[0129] (2-2. Modification 2) FIGS. 26 and 27 are diagrams illustrating an example configuration of an imaging device according to Modification 2. In the example shown in FIGS. 26 and 27, the imaging device 1 is configured so that the length of portion P1a of transistor AMP is longer than the length of portion P1b of transistor SEL. Furthermore, the width of portion P1b of transistor SEL in the X-axis direction is made smaller than the width of portion P1a of transistor AMP in the X-axis direction. In this modification as well, it is possible to improve the characteristics of the transistors AMP and SEL.

[0130] For example, the imaging device 1 may be configured so that the length of the portion P1a is longer than the length of the portion P1b and the number of the portions P1b is greater than the number of the portions P1a. Furthermore, for example, the imaging device 1 may be configured so that when the length of the portion P1a is set longer than the length of the portion P1b, the width of the portion P1b is smaller than the width of the portion P1a and the number of the portions P1b is greater than the number of the portions P1a.

[0131] (2-3. Modification 3) In the above-described embodiment and modification, exemplary configurations of the imaging device have been described, but the configuration of the imaging device is not limited to the above-described examples. The imaging device 1 may be configured so that the width of the portion P1a of the transistor AMP is smaller (narrower) than the width of the portion P1b of the transistor SEL. In this case, the length of the portion P1b of the transistor SEL in the thickness direction of the semiconductor layer 130 may be longer than the length of the portion P1a of the transistor AMP. In the case of this modification, it is also possible to improve the characteristics of the transistors AMP and SEL.

[0132] The imaging device 1 may be configured, for example, so that the width of the portion P1a is smaller than the width of the portion P1b and the number of the portions P1b is greater than the number of the portions P1a. Furthermore, for example, when the width of the portion P1a is set smaller than the width of the portion P1b, the imaging device 1 may be configured so that the length of the portion P1b is longer than the length of the portion P1a and the number of the portions P1b is greater than the number of the portions P1a.

[0133] (2-4. Modification 4) The imaging device 1 may be configured so that the number of portions P1a of the transistor AMP is greater than the number of portions P1b of the transistor SEL. In this case, the length of the portion P1b of the transistor SEL may be longer than the length of the portion P1a of the transistor AMP in the thickness direction of the semiconductor layer 130. In this modification, the characteristics of the transistors AMP and SEL can also be improved.

[0134] The imaging device 1 may be configured, for example, so that the number of portions P1a is greater than the number of portions P1b and the width of the portions P1b is smaller than the width of the portions P1a. Furthermore, for example, when the number of portions P1a is greater than the number of portions P1b, the imaging device 1 may be configured so that the length of the portions P1b in the thickness direction of the semiconductor layer 130 is greater than the length of the portions P1a and the width of the portions P1b is smaller than the width of the portions P1a.

[0135] (2-5. Modification 5) The imaging device 1 may be configured, for example, so that the length of the portion P1a is longer than the length of the portion P1b and the width of the portion P1a is smaller than the width of the portion P1b. In this case, the number of portions P1b may be greater than the number of portions P1a. In this modification, the characteristics of the transistors AMP and SEL can also be improved.

[0136] Furthermore, for example, the imaging device 1 may be configured so that the width of the portion P1a is smaller than the width of the portion P1b and the number of the portions P1a is greater than the number of the portions P1b. In this case, the length of the portion P1b in the thickness direction of the semiconductor layer 130 may be longer than the length of the portion P1a in the thickness direction of the semiconductor layer 130.

[0137] (2-6. Modification 6) Figures 28 to 30 are diagrams for explaining an example configuration of an imaging device according to Modification 6. Figure 29 shows an example cross-sectional configuration in the direction of line A-A' shown in Figure 28, and Figure 30 shows an example cross-sectional configuration in the direction of line B-B' shown in Figure 28. As in the examples shown in Figures 28 to 30, only the transistor SEL of the transistor AMP and the transistor SEL may be configured as a Fin-type transistor.

[0138] 28 and 30 , the transistor SEL has, for example, gate electrodes 41b (fin portions) provided to sandwich a portion P1b that is a part of the semiconductor layer 130. By configuring the transistor SEL as a Fin-type transistor, it is possible to increase the effective gate width per footprint of the transistor SEL.

[0139] In this modification, the threshold voltage (Vth) of each transistor can be individually adjusted, improving the transistor characteristics. For example, it is possible to improve the OFF characteristics of the transistor SEL and reduce the Ron (on-resistance). Note that the number and shape of the portions P1b of the transistor SEL are not limited to the example shown in the figure and can be changed as appropriate.

[0140] The photodetector according to an embodiment of the present disclosure includes a photoelectric conversion element (photoelectric conversion unit 11) that converts light into an electric charge, a first transistor (transistor AMP) that can generate a first signal based on the electric charge converted by the photoelectric conversion element, and a second transistor (transistor SEL) that can output the first signal. Of the first and second transistors, only the second transistor is configured as a Fin-type transistor.

[0141] In the photodetector (image capture device 1) according to this embodiment, only the transistor SEL out of the transistor AMP and the transistor SEL is configured as a Fin-type transistor. By configuring the photodetector (image capture device 1) in this manner, it is possible to improve the characteristics of the transistor. It is possible to realize a photodetector with good performance.

[0142] 3. Application Examples The above-described light detection device (imaging device 1) can be applied to various electronic devices, such as imaging systems such as digital still cameras and digital video cameras, mobile phones with imaging functions, and other devices with imaging functions.

[0143] FIG. 31 is a block diagram showing an example of the configuration of an electronic device.

[0144] As shown in FIG. 31, electronic device 101 includes an optical system 102, a photodetector 103, and a DSP (Digital Signal Processor) 104, and is configured by connecting DSP 104, a display device 105, an operation system 106, a memory 108, a recording device 109, and a power supply system 110 via a bus 107, and is capable of capturing still images and moving images.

[0145] The optical system 102 is configured to have one or more lenses, and guides image light (incident light) from a subject to the photodetector 103 , forming an image on the light-receiving surface (sensor portion) of the photodetector 103 .

[0146] The above-described photodetector (imaging device 1) can be applied as the photodetector 103. Electrons are accumulated in the photodetector 103 for a certain period of time in accordance with an image formed on the light-receiving surface via the optical system 102. A signal corresponding to the electrons accumulated in the photodetector 103 is then supplied to the DSP 104.

[0147] The DSP 104 performs various signal processing on the signal from the photodetector 103 to acquire an image, and temporarily stores the image data in the memory 108. The image data stored in the memory 108 is recorded in the recording device 109 or supplied to the display device 105 to display the image. In addition, the operation system 106 accepts various operations by the user and supplies operation signals to each block of the electronic device 101. The power supply system 110 supplies the power necessary to drive each block of the electronic device 101.

[0148] 4. Application Examples (Application Examples to Mobile Bodies) The technology according to the present disclosure (the present technology) can be applied to various products. For example, the technology according to the present disclosure may be realized as a device mounted on any type of mobile body, such as an automobile, an electric vehicle, a hybrid electric vehicle, a motorcycle, a bicycle, personal mobility, an airplane, a drone, a ship, or a robot.

[0149] FIG. 32 is a block diagram showing a schematic configuration example of a vehicle control system, which is an example of a mobile object control system to which the technology according to the present disclosure can be applied.

[0150] The vehicle control system 12000 includes a plurality of electronic control units connected via a communication network 12001. In the example shown in Fig. 32, the vehicle control system 12000 includes a drive system control unit 12010, a body system control unit 12020, an outside-vehicle information detection unit 12030, an inside-vehicle information detection unit 12040, and an integrated control unit 12050. Also shown as functional components of the integrated control unit 12050 are a microcomputer 12051, an audio / video output unit 12052, and an in-vehicle network I / F (Interface) 12053.

[0151] The drivetrain control unit 12010 controls the operation of devices related to the drivetrain of the vehicle in accordance with various programs. For example, the drivetrain control unit 12010 functions as a control device for a drive force generating device for generating a drive force of the vehicle, such as an internal combustion engine or a drive motor, a drive force transmission mechanism for transmitting the drive force to the wheels, a steering mechanism for adjusting the steering angle of the vehicle, and a braking device for generating a braking force of the vehicle.

[0152] The body system control unit 12020 controls the operation of various devices equipped in the vehicle body according to various programs. For example, the body system control unit 12020 functions as a control device for a keyless entry system, a smart key system, a power window device, or various lamps such as headlamps, backup lamps, brake lamps, turn signals, and fog lamps. In this case, radio waves transmitted from a portable device that serves as a key or signals from various switches can be input to the body system control unit 12020. The body system control unit 12020 receives these radio waves or signals and controls the vehicle's door lock device, power window device, lamps, etc.

[0153] The outside-vehicle information detection unit 12030 detects information outside the vehicle equipped with the vehicle control system 12000. For example, an imaging unit 12031 is connected to the outside-vehicle information detection unit 12030. The outside-vehicle information detection unit 12030 causes the imaging unit 12031 to capture images outside the vehicle and receives the captured images. The outside-vehicle information detection unit 12030 may perform object detection processing or distance detection processing for people, cars, obstacles, signs, characters on the road surface, etc. based on the received images.

[0154] The imaging unit 12031 is an optical sensor that receives light and outputs an electrical signal corresponding to the amount of light received. The imaging unit 12031 can output the electrical signal as an image or as distance measurement information. The light received by the imaging unit 12031 may be visible light or invisible light such as infrared light.

[0155] The in-vehicle information detection unit 12040 detects information inside the vehicle. For example, a driver state detection unit 12041 that detects the state of the driver is connected to the in-vehicle information detection unit 12040. The driver state detection unit 12041 includes, for example, a camera that captures an image of the driver, and the in-vehicle information detection unit 12040 may calculate the degree of fatigue or concentration of the driver based on the detection information input from the driver state detection unit 12041, or may determine whether the driver is dozing off.

[0156] The microcomputer 12051 can calculate control target values ​​for the driving force generating device, steering mechanism, or braking device based on the information inside and outside the vehicle acquired by the outside-vehicle information detection unit 12030 or the inside-vehicle information detection unit 12040, and output control commands to the drive system control unit 12010. For example, the microcomputer 12051 can perform cooperative control aimed at realizing the functions of an ADAS (Advanced Driver Assistance System), including vehicle collision avoidance or impact mitigation, following driving based on the distance between vehicles, maintaining vehicle speed, vehicle collision warning, vehicle lane departure warning, etc.

[0157] In addition, the microcomputer 12051 can perform cooperative control for the purpose of autonomous driving, which allows the vehicle to travel autonomously without relying on driver operation, by controlling the driving force generating device, steering mechanism, braking device, etc. based on information about the surroundings of the vehicle obtained by the outside vehicle information detection unit 12030 or the inside vehicle information detection unit 12040.

[0158] Furthermore, the microcomputer 12051 can output a control command to the body system control unit 12020 based on the information outside the vehicle acquired by the outside information detection unit 12030. For example, the microcomputer 12051 can control the headlamps according to the position of a preceding vehicle or an oncoming vehicle detected by the outside information detection unit 12030, and perform cooperative control aimed at preventing glare, such as switching from high beams to low beams.

[0159] The audio / video output unit 12052 transmits at least one of audio and video output signals to an output device capable of visually or audibly notifying the passengers of the vehicle or the outside of the vehicle of information. In the example of Fig. 32, the output devices are exemplified by an audio speaker 12061, a display unit 12062, and an instrument panel 12063. The display unit 12062 may include, for example, at least one of an on-board display and a head-up display.

[0160] FIG. 33 is a diagram showing an example of the installation position of the imaging unit 12031.

[0161] In FIG. 33, the imaging unit 12031 includes imaging units 12101, 12102, 12103, 12104, and 12105.

[0162] The imaging units 12101, 12102, 12103, 12104, and 12105 are provided, for example, at positions such as the front nose, side mirrors, rear bumper, back door, and the top of the windshield inside the vehicle cabin of the vehicle 12100. The imaging unit 12101 provided on the front nose and the imaging unit 12105 provided on the top of the windshield inside the vehicle cabin mainly acquire images of the front of the vehicle 12100. The imaging units 12102 and 12103 provided on the side mirrors mainly acquire images of the sides of the vehicle 12100. The imaging unit 12104 provided on the rear bumper or back door mainly acquires images of the rear of the vehicle 12100. The imaging unit 12105 provided on the top of the windshield inside the vehicle cabin is mainly used to detect preceding vehicles, pedestrians, obstacles, traffic lights, traffic signs, lanes, etc.

[0163] 33 shows an example of the imaging ranges of the imaging units 12101 to 12104. Imaging range 12111 indicates the imaging range of the imaging unit 12101 provided on the front nose, imaging ranges 12112 and 12113 indicate the imaging ranges of the imaging units 12102 and 12103 provided on the side mirrors, respectively, and imaging range 12114 indicates the imaging range of the imaging unit 12104 provided on the rear bumper or back door. For example, by overlaying the image data captured by the imaging units 12101 to 12104, an overhead image of the vehicle 12100 viewed from above can be obtained.

[0164] At least one of the image capturing units 12101 to 12104 may have a function of acquiring distance information. For example, at least one of the image capturing units 12101 to 12104 may be a stereo camera made up of multiple image capturing elements, or may be an image capturing element having pixels for phase difference detection.

[0165] For example, based on the distance information obtained from the imaging units 12101 to 12104, the microcomputer 12051 can calculate the distance to each three-dimensional object within the imaging ranges 12111 to 12114 and the change in this distance over time (relative speed with respect to the vehicle 12100), thereby extracting as a preceding vehicle, in particular, the three-dimensional object that is the closest three-dimensional object on the path of the vehicle 12100 and traveling in approximately the same direction as the vehicle 12100 at a predetermined speed (e.g., 0 km / h or higher). Furthermore, the microcomputer 12051 can set a vehicle-to-vehicle distance to be maintained in advance in front of the preceding vehicle, and perform automatic braking control (including follow-up stop control), automatic acceleration control (including follow-up start control), etc. In this way, cooperative control can be performed for the purpose of autonomous driving, which allows the vehicle to travel autonomously without relying on driver operation.

[0166] For example, the microcomputer 12051 classifies and extracts three-dimensional object data regarding three-dimensional objects into two-wheeled vehicles, ordinary vehicles, large vehicles, pedestrians, utility poles, and other three-dimensional objects based on distance information obtained from the imaging units 12101 to 12104, and can use the data for automatic obstacle avoidance. For example, the microcomputer 12051 distinguishes obstacles around the vehicle 12100 into obstacles that are visible to the driver of the vehicle 12100 and obstacles that are difficult to see. The microcomputer 12051 then determines a collision risk that indicates the risk of collision with each obstacle, and when the collision risk is equal to or greater than a set value and a collision is possible, the microcomputer 12051 can provide driving assistance for collision avoidance by outputting an alarm to the driver via the audio speaker 12061 or the display unit 12062, or by performing forced deceleration or avoidance steering via the drive system control unit 12010.

[0167] At least one of the image capturing units 12101 to 12104 may be an infrared camera that detects infrared rays. For example, the microcomputer 12051 can recognize a pedestrian by determining whether a pedestrian is present in the images captured by the image capturing units 12101 to 12104. Such pedestrian recognition is performed, for example, by extracting feature points from the images captured by the image capturing units 12101 to 12104 as infrared cameras and performing pattern matching on a series of feature points that indicate the outline of an object to determine whether the object is a pedestrian. When the microcomputer 12051 determines that a pedestrian is present in the images captured by the image capturing units 12101 to 12104 and recognizes the pedestrian, the audio / image output unit 12052 controls the display unit 12062 to superimpose a rectangular outline on the recognized pedestrian for emphasis. The audio / image output unit 12052 may also control the display unit 12062 to display an icon or the like indicating the pedestrian at a desired position.

[0168] An example of a mobile object control system to which the technology according to the present disclosure can be applied has been described above. The technology according to the present disclosure can be applied to, for example, the image capturing unit 12031 of the above-described configuration. Specifically, for example, the image capturing device 1 or the like can be applied to the image capturing unit 12031. By applying the technology according to the present disclosure to the image capturing unit 12031, it becomes possible to obtain high-resolution captured images. It becomes possible to perform high-precision control using captured images in the mobile object control system.

[0169] (Application Example to Endoscopic Surgery System) The technology according to the present disclosure (the present technology) can be applied to various products. For example, the technology according to the present disclosure may be applied to an endoscopic surgery system.

[0170] FIG. 34 is a diagram showing an example of a schematic configuration of an endoscopic surgery system to which the technology according to the present disclosure (the present technology) can be applied.

[0171] 34 shows an operator (doctor) 11131 performing surgery on a patient 11132 on a patient bed 11133 using an endoscopic surgery system 11000. As shown in the figure, the endoscopic surgery system 11000 is composed of an endoscope 11100, other surgical tools 11110 such as an insufflation tube 11111 and an energy treatment tool 11112, a support arm device 11120 that supports the endoscope 11100, and a cart 11200 on which various devices for endoscopic surgery are mounted.

[0172] The endoscope 11100 is composed of a lens barrel 11101, a region of a predetermined length from the tip of which is inserted into a body cavity of a patient 11132, and a camera head 11102 connected to the base end of the lens barrel 11101. In the example shown, the endoscope 11100 is configured as a so-called rigid scope having a rigid lens barrel 11101, but the endoscope 11100 may also be configured as a so-called flexible scope having a flexible lens barrel.

[0173] An opening into which an objective lens is fitted is provided at the tip of the lens barrel 11101. A light source device 11203 is connected to the endoscope 11100, and light generated by the light source device 11203 is guided to the tip of the lens barrel by a light guide extending inside the lens barrel 11101, and is irradiated via the objective lens toward an object to be observed inside the body cavity of the patient 11132. The endoscope 11100 may be a direct-viewing endoscope, an oblique-viewing endoscope, or a side-viewing endoscope.

[0174] An optical system and an image sensor are provided inside the camera head 11102, and light reflected from the object of observation (observation light) is collected by the optical system onto the image sensor. The observation light is photoelectrically converted by the image sensor to generate an electrical signal corresponding to the observation light, i.e., an image signal corresponding to the observed image. The image signal is sent to a camera control unit (CCU) 11201 as RAW data.

[0175] The CCU 11201 is configured with a CPU (Central Processing Unit), a GPU (Graphics Processing Unit), etc., and comprehensively controls the operations of the endoscope 11100 and the display device 11202. Furthermore, the CCU 11201 receives an image signal from the camera head 11102 and performs various types of image processing on the image signal, such as development processing (demosaic processing), to display an image based on the image signal.

[0176] Under the control of the CCU 11201, the display device 11202 displays an image based on an image signal that has been subjected to image processing by the CCU 11201.

[0177] The light source device 11203 is composed of a light source such as an LED (Light Emitting Diode), and supplies the endoscope 11100 with irradiation light when photographing the surgical site, etc.

[0178] The input device 11204 is an input interface for the endoscopic surgery system 11000. A user can input various information and instructions to the endoscopic surgery system 11000 via the input device 11204. For example, the user inputs an instruction to change the imaging conditions (type of irradiation light, magnification, focal length, etc.) of the endoscope 11100.

[0179] The treatment tool control device 11205 controls the driving of the energy treatment tool 11112 for cauterizing tissue, incising, sealing blood vessels, etc. The insufflation device 11206 inflates the body cavity of the patient 11132 through the insufflation tube 11111 in order to ensure a clear field of view for the endoscope 11100 and a working space for the surgeon. The recorder 11207 is a device capable of recording various types of information related to the surgery. The printer 11208 is a device capable of printing various types of information related to the surgery in various formats such as text, images, or graphs.

[0180] The light source device 11203, which supplies illumination light to the endoscope 11100 when photographing the surgical site, can be configured from a white light source, such as an LED, a laser light source, or a combination of these. When the white light source is configured from a combination of RGB laser light sources, the output intensity and output timing of each color (each wavelength) can be controlled with high precision, allowing the light source device 11203 to adjust the white balance of the captured image. In this case, it is also possible to time-share images corresponding to each RGB by irradiating the object of observation with laser light from each RGB laser light source and controlling the drive of the image sensor of the camera head 11102 in synchronization with the irradiation timing. According to this method, color images can be obtained without providing a color filter to the image sensor.

[0181] Furthermore, the light source device 11203 may be controlled to change the intensity of light it outputs at predetermined time intervals. By controlling the driving of the image sensor of the camera head 11102 in synchronization with the timing of the change in light intensity to acquire images in a time-division manner and combining the images, it is possible to generate an image with a high dynamic range that is free from so-called blocked-up shadows and blown-out highlights.

[0182] The light source device 11203 may also be configured to supply light in a predetermined wavelength band corresponding to special light observation. Special light observation, for example, utilizes the wavelength dependence of light absorption in body tissues to irradiate light in a narrower band than the light irradiated during normal observation (i.e., white light) to capture high-contrast images of specific tissues, such as blood vessels on the surface of mucous membranes, in what is known as narrow band imaging. Alternatively, special light observation may involve fluorescence observation, in which images are obtained using fluorescence generated by irradiating excitation light. Fluorescence observation may involve irradiating excitation light onto body tissues and observing the fluorescence from the tissues (autofluorescence observation), or may involve locally injecting a reagent such as indocyanine green (ICG) into the body tissue and irradiating the tissues with excitation light corresponding to the fluorescent wavelength of the reagent to obtain a fluorescent image. The light source device 11203 may be configured to supply narrow band light and / or excitation light corresponding to such special light observation.

[0183] FIG. 35 is a block diagram showing an example of the functional configuration of the camera head 11102 and the CCU 11201 shown in FIG.

[0184] The camera head 11102 has a lens unit 11401, an imaging unit 11402, a drive unit 11403, a communication unit 11404, and a camera head control unit 11405. The CCU 11201 has a communication unit 11411, an image processing unit 11412, and a control unit 11413. The camera head 11102 and the CCU 11201 are connected to each other via a transmission cable 11400 so that they can communicate with each other.

[0185] The lens unit 11401 is an optical system provided at the connection portion with the lens barrel 11101. Observation light taken in from the tip of the lens barrel 11101 is guided to the camera head 11102 and enters the lens unit 11401. The lens unit 11401 is composed of a combination of multiple lenses including a zoom lens and a focus lens.

[0186] The imaging unit 11402 is composed of an imaging element. The imaging element constituting the imaging unit 11402 may be a single (so-called single-chip type) or multiple (so-called multi-chip type). When the imaging unit 11402 is composed of a multi-chip type, for example, each imaging element may generate an image signal corresponding to each of RGB, and a color image may be obtained by combining these signals. Alternatively, the imaging unit 11402 may be configured to have a pair of imaging elements for acquiring image signals for the right eye and the left eye corresponding to 3D (dimensional) display. The 3D display allows the surgeon 11131 to more accurately grasp the depth of the biological tissue at the surgical site. Note that when the imaging unit 11402 is composed of a multi-chip type, multiple lens units 11401 may be provided corresponding to each imaging element.

[0187] Furthermore, the imaging unit 11402 does not necessarily have to be provided in the camera head 11102. For example, the imaging unit 11402 may be provided inside the lens barrel 11101, immediately after the objective lens.

[0188] The driving unit 11403 is configured by an actuator, and moves the zoom lens and focus lens of the lens unit 11401 by a predetermined distance along the optical axis under the control of the camera head control unit 11405. This allows the magnification and focus of the image captured by the imaging unit 11402 to be adjusted appropriately.

[0189] The communication unit 11404 is configured by a communication device for transmitting and receiving various types of information to and from the CCU 11201. The communication unit 11404 transmits the image signal obtained from the imaging unit 11402 to the CCU 11201 via the transmission cable 11400 as RAW data.

[0190] Furthermore, the communication unit 11404 receives a control signal for controlling the driving of the camera head 11102 from the CCU 11201 and supplies the control signal to the camera head control unit 11405. The control signal includes information on the imaging conditions, such as information specifying the frame rate of the captured image, information specifying the exposure value at the time of imaging, and / or information specifying the magnification and focus of the captured image.

[0191] The image capturing conditions such as the frame rate, exposure value, magnification, and focus may be appropriately specified by the user, or may be automatically set by the control unit 11413 of the CCU 11201 based on the acquired image signal. In the latter case, the endoscope 11100 is equipped with a so-called AE (Auto Exposure) function, AF (Auto Focus) function, and AWB (Auto White Balance) function.

[0192] The camera head control unit 11405 controls the driving of the camera head 11102 based on a control signal received from the CCU 11201 via the communication unit 11404 .

[0193] The communication unit 11411 is configured by a communication device for transmitting and receiving various information to and from the camera head 11102. The communication unit 11411 receives an image signal transmitted from the camera head 11102 via the transmission cable 11400.

[0194] Furthermore, the communication unit 11411 transmits to the camera head 11102 a control signal for controlling the driving of the camera head 11102. The image signal and the control signal can be transmitted by electrical communication, optical communication, or the like.

[0195] The image processing unit 11412 performs various image processing operations on the image signal, which is RAW data transmitted from the camera head 11102 .

[0196] The control unit 11413 performs various controls related to the imaging of the surgical site, etc. by the endoscope 11100 and the display of the captured image obtained by imaging the surgical site, etc. For example, the control unit 11413 generates a control signal for controlling the driving of the camera head 11102.

[0197] Furthermore, the control unit 11413 displays the captured image showing the surgical site, etc., on the display device 11202 based on the image signal subjected to image processing by the image processing unit 11412. At this time, the control unit 11413 may recognize various objects in the captured image using various image recognition technologies. For example, the control unit 11413 can recognize surgical tools such as forceps, specific biological parts, bleeding, mist generated when using the energy treatment tool 11112, etc., by detecting the shape and color of the edges of objects included in the captured image. When displaying the captured image on the display device 11202, the control unit 11413 may use the recognition results to superimpose various surgical support information on the image of the surgical site. By superimposing the surgical support information and presenting it to the surgeon 11131, the burden on the surgeon 11131 can be reduced and the surgeon 11131 can proceed with the surgery reliably.

[0198] The transmission cable 11400 connecting the camera head 11102 and the CCU 11201 is an electrical signal cable for electrical signal communication, an optical fiber for optical communication, or a composite cable of these.

[0199] In the illustrated example, communication is performed wired using a transmission cable 11400, but communication between the camera head 11102 and the CCU 11201 may also be performed wirelessly.

[0200] The above describes an example of an endoscopic surgery system to which the technology according to the present disclosure can be applied. Of the above-described configurations, the technology according to the present disclosure can be suitably applied to, for example, the imaging unit 11402 provided in the camera head 11102 of the endoscope 11100. By applying the technology according to the present disclosure to the imaging unit 11402, it is possible to provide a high-definition endoscope 11100.

[0201] Although the present disclosure has been described above by way of embodiments, modifications, application examples, and applied examples, the present technology is not limited to the above-described embodiments, etc., and various modifications are possible. For example, although the modifications described above have been described as modifications of the above-described embodiments, the configurations of the modifications can be combined as appropriate.

[0202] In the above embodiments, an imaging device has been described as an example. However, the photodetector of the present disclosure may be, for example, a device that receives incident light and converts the light into an electric charge. The output signal may be a signal of image information or a signal of ranging information. The photodetector (imaging device) may be applied to an image sensor, a ranging sensor, etc. Note that the present disclosure is not limited to a back-illuminated image sensor, but may also be applied to a front-illuminated image sensor.

[0203] The photodetector according to the present disclosure may also be applied as a distance measuring sensor capable of measuring distances using a time-of-flight (TOF) method. The photodetector (image capture device) may also be applied as a sensor capable of detecting events, such as an event-driven sensor (also known as an event vision sensor (EVS), an event-driven sensor (EDS), or a dynamic vision sensor (DVS)).

[0204] A photodetector according to one embodiment of the present disclosure includes a photoelectric conversion element, a first transistor capable of generating a first signal based on charges converted by the photoelectric conversion element, and a second transistor capable of outputting the first signal. The first transistor has a first portion that is a part of a semiconductor layer and first gate electrodes disposed to sandwich the first portion. The second transistor has a second portion that is another part of the semiconductor layer and second gate electrodes disposed to sandwich the second portion. The length of the second portion is different from the length of the first portion. This makes it possible to realize a photodetector with good performance.

[0205] A photodetector according to one embodiment of the present disclosure includes a photoelectric conversion element, a first transistor capable of generating a first signal based on charges converted by the photoelectric conversion element, and a second transistor capable of outputting the first signal. The first transistor has a first portion that is a part of a semiconductor layer and first gate electrodes disposed to sandwich the first portion. The second transistor has a second portion that is another part of the semiconductor layer and second gate electrodes disposed to sandwich the second portion. The width of the second portion is different from the width of the first portion. This makes it possible to realize a photodetector with good performance.

[0206] A photodetector according to one embodiment of the present disclosure includes a photoelectric conversion element, a first transistor capable of generating a first signal based on charges converted by the photoelectric conversion element, and a second transistor capable of outputting the first signal. The first transistor has a first portion that is a part of a semiconductor layer and first gate electrodes disposed to sandwich the first portion. The second transistor has a second portion that is another part of the semiconductor layer and second gate electrodes disposed to sandwich the second portion. The semiconductor layer has one or more first portions and one or more second portions. The number of second portions is different from the number of first portions. This makes it possible to realize a photodetector with good performance.

[0207] According to an embodiment of the present disclosure, a photodetector includes a photoelectric conversion element, a first transistor capable of generating a first signal based on charges converted by the photoelectric conversion element, and a second transistor capable of outputting the first signal. Of the first and second transistors, only the second transistor is configured as a Fin-type transistor. This makes it possible to realize a photodetector with excellent performance.

[0208] Note that the effects described in this specification are merely examples and are not limited to those described, and other effects may be present. The present disclosure may also have the following configurations: (1) A photodetector including: a photoelectric conversion element that converts light into electricity; a first transistor capable of generating a first signal based on charges converted by the photoelectric conversion element; and a second transistor capable of outputting the first signal, wherein the first transistor has a first portion that is a part of a semiconductor layer and first gate electrodes provided to sandwich the first portion; and the second transistor has a second portion that is another part of the semiconductor layer and second gate electrodes provided to sandwich the second portion, wherein the length of the second portion in the thickness direction of the semiconductor layer is different from the length of the first portion in the thickness direction of the semiconductor layer. (2) The photodetector according to (1), wherein the length of the second portion in the thickness direction of the semiconductor layer is longer than the length of the first portion in the thickness direction of the semiconductor layer. (3) The photodetector according to (1) or (2), wherein the length of the second portion in the thickness direction of the semiconductor layer is 10 nm or more longer than the length of the first portion in the thickness direction of the semiconductor layer. (4) The photodetector according to any one of (1) to (3), wherein the first transistor is an amplifying transistor, the second transistor is a selecting transistor, and the first transistor and the second transistor are each configured as Fin-type transistors. (5) The photodetector according to any one of (1) to (4), wherein the first transistor has the first portion of the semiconductor layer as its channel region, and the second transistor has the second portion of the semiconductor layer as its channel region. (6) The photodetector according to any one of (1) to (5), wherein the width of the second portion is smaller than the width of the first portion. (7) The photodetector according to any one of (1) to (6), wherein the semiconductor layer has one or more of the first portions and a plurality of the second portions, and the number of the second portions is greater than the number of the first portions. (8) The photodetector according to any one of (1) to (5), wherein a width of the first portion is smaller than a width of the second portion.(9) The photodetector according to any one of (1) to (6), wherein the semiconductor layer has a plurality of the first portions and one or a plurality of the second portions, and the number of the first portions is greater than the number of the second portions. (10) A photodetector comprising: a photoelectric conversion element that photoelectrically converts light; a first transistor capable of generating a first signal based on charges converted by the photoelectric conversion element; and a second transistor capable of outputting the first signal, wherein the first transistor has a first portion that is a part of the semiconductor layer and first gate electrodes provided to sandwich the first portion; the second transistor has a second portion that is another part of the semiconductor layer and second gate electrodes provided to sandwich the second portion, and the width of the second portion is different from the width of the first portion. (11) The photodetector according to (10), wherein the width of the second portion is smaller than the width of the first portion. (12) The photodetector according to (10) or (11), wherein the width of the second portion is smaller than the width of the first portion by 10 nm or more. (13) The photodetector according to any one of (10) to (12), wherein the semiconductor layer has one or more of the first portions and a plurality of the second portions, and the number of the second portions is greater than the number of the first portions. (14) The photodetector according to any one of (10) to (13), wherein the length of the first portions in the thickness direction of the semiconductor layer is greater than the length of the second portions in the thickness direction of the semiconductor layer. (15) The photodetector according to any one of (10) to (14), wherein the semiconductor layer has a plurality of the first portions and one or more of the second portions, and the number of the first portions is greater than the number of the second portions.(16) A photodetector comprising: a photoelectric conversion element that photoelectrically converts light; a first transistor capable of generating a first signal based on charges converted by the photoelectric conversion element; and a second transistor capable of outputting the first signal, wherein the first transistor has a first portion that is a part of a semiconductor layer and first gate electrodes provided to sandwich the first portion; the second transistor has a second portion that is another part of the semiconductor layer and second gate electrodes provided to sandwich the second portion; the semiconductor layer has one or more of the first portions and one or more of the second portions, and the number of the second portions is different from the number of the first portions. (17) The photodetector according to (16), wherein the number of the second portions is greater than the number of the first portions. (18) The photodetector according to (16) or (17), wherein the length of the first portion in the thickness direction of the semiconductor layer is longer than the length of the second portion in the thickness direction of the semiconductor layer. (19) The photodetector according to any one of (16) to (18), wherein the width of the first portion is smaller than the width of the second portion. (20) A photodetector comprising: a photoelectric conversion element that photoelectrically converts light; a first transistor capable of generating a first signal based on the charge converted by the photoelectric conversion element; and a second transistor capable of outputting the first signal, wherein only the second transistor of the first and second transistors is configured as a Fin-type transistor.

[0209] This application claims priority based on Japanese Patent Application No. 2024-153902, filed on September 6, 2024, in the Japan Patent Office, the entire contents of which are incorporated herein by reference.

[0210] Those skilled in the art will recognize that various modifications, combinations, subcombinations, and variations may occur depending on design requirements and other factors, and are intended to be within the scope of the appended claims and their equivalents.

Claims

1. A photodetector comprising: a photoelectric conversion element that converts light into electricity; a first transistor capable of generating a first signal based on the charge converted by the photoelectric conversion element; and a second transistor capable of outputting the first signal, wherein the first transistor has a first portion that is a part of a semiconductor layer and first gate electrodes provided so as to sandwich the first portion; the second transistor has a second portion that is another part of the semiconductor layer and second gate electrodes provided so as to sandwich the second portion; and the length of the second portion in the thickness direction of the semiconductor layer is different from the length of the first portion in the thickness direction of the semiconductor layer.

2. The photodetector according to claim 1, wherein the length of the second portion in the thickness direction of the semiconductor layer is longer than the length of the first portion in the thickness direction of the semiconductor layer.

3. The photodetector according to claim 1, wherein the length of the second portion in the thickness direction of the semiconductor layer is at least 10 nm longer than the length of the first portion in the thickness direction of the semiconductor layer.

4. The photodetector device according to claim 1, wherein the first transistor is an amplifying transistor, the second transistor is a selecting transistor, and the first transistor and the second transistor are each configured as a Fin-type transistor.

5. The photodetector device according to claim 1, wherein the first transistor has the first portion of the semiconductor layer as a channel region of the first transistor, and the second transistor has the second portion of the semiconductor layer as a channel region of the second transistor.

6. The photodetector device of claim 2, wherein the width of said second portion is smaller than the width of said first portion.

7. The photodetector device according to claim 2, wherein the semiconductor layer has one or more of the first portions and a plurality of the second portions, and the number of the second portions is greater than the number of the first portions.

8. The photodetector device of claim 2, wherein the width of said first portion is smaller than the width of said second portion.

9. The photodetector device according to claim 2, wherein the semiconductor layer has a plurality of the first portions and one or a plurality of the second portions, and the number of the first portions is greater than the number of the second portions.

10. A photodetector comprising: a photoelectric conversion element that photoelectrically converts light; a first transistor capable of generating a first signal based on the charge converted by the photoelectric conversion element; and a second transistor capable of outputting the first signal, wherein the first transistor has a first portion that is a part of a semiconductor layer and first gate electrodes provided so as to sandwich the first portion; the second transistor has a second portion that is another part of the semiconductor layer and second gate electrodes provided so as to sandwich the second portion, and the width of the second portion is different from the width of the first portion.

11. The photodetector device of claim 10, wherein the width of said second portion is smaller than the width of said first portion.

12. The photodetector according to claim 10, wherein the width of the second portion is smaller than the width of the first portion by 10 nm or more.

13. The photodetector device according to claim 11, wherein the semiconductor layer has one or more of the first portions and a plurality of the second portions, and the number of the second portions is greater than the number of the first portions.

14. The photodetector according to claim 11, wherein the length of the first portion in the thickness direction of the semiconductor layer is longer than the length of the second portion in the thickness direction of the semiconductor layer.

15. The photodetector device according to claim 11, wherein the semiconductor layer has a plurality of the first portions and one or a plurality of the second portions, and the number of the first portions is greater than the number of the second portions.

16. A photodetector comprising: a photoelectric conversion element that photoelectrically converts light; a first transistor capable of generating a first signal based on the charge converted by the photoelectric conversion element; and a second transistor capable of outputting the first signal, wherein the first transistor has a first portion that is a part of a semiconductor layer and first gate electrodes provided so as to sandwich the first portion; the second transistor has a second portion that is another part of the semiconductor layer and second gate electrodes provided so as to sandwich the second portion; the semiconductor layer has one or more first portions and one or more second portions, and the number of second portions is different from the number of first portions.

17. The photodetector device of claim 16, wherein the number of said second portions is greater than the number of said first portions.

18. The photodetector according to claim 17, wherein the length of the first portion in the thickness direction of the semiconductor layer is longer than the length of the second portion in the thickness direction of the semiconductor layer.

19. The photodetector device of claim 17, wherein the width of the first portion is smaller than the width of the second portion.

20. A photodetector comprising: a photoelectric conversion element that converts light into an electric signal; a first transistor capable of generating a first signal based on the electric charge converted by the photoelectric conversion element; and a second transistor capable of outputting the first signal, wherein only the second transistor of the first and second transistors is configured as a Fin-type transistor.

Images