Stacked semiconductor package and electronic device including same

Abstract

An electronic device according to various embodiments of the present disclosure may comprise: a lower semiconductor package; an upper semiconductor package positioned in a first region of the upper surface of the lower semiconductor package and electrically connected to the lower semiconductor package; a heat transfer block positioned in a second region of the upper surface of the lower semiconductor package; and a fixing member positioned on the lower surface of the heat transfer block and bonded to the upper surface of the lower semiconductor package so as to fix the heat dissipation block to the lower semiconductor package.

Description

Stacked semiconductor package and electronic device including the same

[0001] Various embodiments of the present disclosure relate to semiconductor packages, and more specifically, to stacked semiconductor packages and electronic devices including the same.

[0002] The electronic device may include various semiconductor devices, such as an application processor (AP), a graphics processing unit (GPU), a modem, and / or memory (e.g., DRAM and / or flash memory). The various semiconductor devices may be formed on a single semiconductor die or formed on different semiconductor dies and included in the electronic device. The semiconductor die may be manufactured into various types of semiconductor packages that protect the semiconductor die and connect the semiconductor die to the circuit board of the electronic device. The semiconductor package may include one or more homogeneous or heterogeneous semiconductor dies. Additionally, the electronic device may include a stacked semiconductor package (e.g., a package on package (POP)) in which a semiconductor package is stacked on another semiconductor package.

[0003] The various semiconductor devices described above can generate heat due to power consumption during operation. The heat from the electronic device can be dissipated to the outside of the electronic device.

[0004] The information described above may be provided as related art for the purpose of aiding understanding of the present disclosure. No claim or determination is made as to whether any of the foregoing may be applied as prior art related to the present disclosure.

[0005] When a stacked package is used to reduce the area and size of a substrate placed in an electronic device, heat dissipation from the lower semiconductor package placed below the upper semiconductor package may not be smooth. For example, to facilitate heat dissipation from the stacked semiconductor package, a heat dissipation block made of a thermally conductive material can be placed on the lower semiconductor package to secure a heat dissipation path.

[0006] For example, since the heat dissipation block is positioned on the lower semiconductor package with a thermal interface material in between, the heat dissipation block may deviate from its proper position or tilt during placement and assembly of the electronic device. For instance, if the adhesion between the heat dissipation block and the lower semiconductor package is reduced, thermal resistance may increase. For instance, there may be a certain limit to the transfer of heat from the lower semiconductor package to the heat dissipation block through the thermal interface material.

[0007] Various embodiments of the present disclosure can provide an electronic device in which the heat dissipation block is effectively aligned and fixed, and heat dissipation performance is improved.

[0008] The technical problems to be solved in this disclosure are not limited to those mentioned above, and other technical problems not mentioned will be clearly understood by those skilled in the art to which this disclosure pertains.

[0009] An electronic device according to various embodiments of the present disclosure may include a lower semiconductor package. The electronic device may include an upper semiconductor package located in a first region on the upper surface of the lower semiconductor package and electrically connected to the lower semiconductor package. The electronic device may include a heat transfer block located in a second region on the upper surface of the lower semiconductor package. The electronic device may include a fixing member located on the lower surface of the heat transfer block and bonded to the upper surface of the lower semiconductor package to fix the heat dissipation block to the lower semiconductor package.

[0010] A stacked semiconductor package according to various embodiments of the present disclosure may include a lower semiconductor package. The electronic device may include an upper semiconductor package located in a first region on the upper surface of the lower semiconductor package and electrically connected to the lower semiconductor package. The electronic device may include a heat transfer block located in a second region on the upper surface of the lower semiconductor package. The electronic device may include a fixing member located on the lower surface of the heat transfer block and bonded to the upper surface of the lower semiconductor package to fix the heat dissipation block to the lower semiconductor package.

[0011] According to various embodiments of the present disclosure, a heat dissipation block is bonded to a lower semiconductor package by a solder metal, so that the heat dissipation block is effectively aligned on the lower package by the surface tension of the solder during soldering, and heat from the lower semiconductor package can be effectively transferred to the heat dissipation block through the solder metal.

[0012] In addition, various effects that are directly or indirectly identified through various embodiments of the present disclosure may be provided.

[0013] In relation to the description of the drawings, the same or similar reference numerals may be used for identical or similar components.

[0014] FIG. 1 is a block diagram of an exemplary electronic device capable of performing the operations described in this document.

[0015] FIG. 2a is a front perspective view of an electronic device according to various embodiments of the present disclosure.

[0016] FIG. 2b is a perspective view of the rear of an electronic device according to various embodiments of the present disclosure.

[0017] FIG. 3a is an exploded perspective view of an electronic device according to various embodiments of the present disclosure.

[0018] FIG. 3b is a schematic diagram showing a cross-section of an electronic device according to various embodiments of the present disclosure.

[0019] FIG. 4a is a plan view of a substrate portion of an electronic device according to one embodiment of the present invention.

[0020] FIG. 4b is a plan view of a substrate portion of an electronic device according to various embodiments of the present invention.

[0021] FIG. 4c is a cross-sectional view of a stacked semiconductor package of an electronic device according to various embodiments of the present invention.

[0022] FIG. 5a is a lower perspective view of a heat transfer block according to various embodiments of the present invention.

[0023] FIG. 5b is a lower plan view of a heat transfer block according to various embodiments of the present invention.

[0024] FIG. 5c is a schematic diagram showing a cross-section of a stacked semiconductor package according to one embodiment of the present invention.

[0025] FIG. 5d is a schematic diagram showing a cross-section of a stacked semiconductor package according to various embodiments of the present invention.

[0026] FIGS. 6a to 6c are schematic drawings illustrating cross-sections of stacked semiconductor packages according to various embodiments of the present invention.

[0027] FIG. 7a is a lower plan view of a heat transfer block according to one embodiment of the present invention.

[0028] FIG. 7b is a cross-sectional view of a stacked semiconductor package according to one embodiment of the present invention.

[0029] FIG. 7c is a bottom plan view of a heat transfer block according to various embodiments of the present invention.

[0030] FIG. 7d is a cross-sectional view of a stacked semiconductor package according to various embodiments of the present invention.

[0031] FIG. 8a is a diagram showing the manufacturing process of a heat transfer block according to one embodiment of the present invention.

[0032] FIG. 8b is a diagram showing the manufacturing process of a heat transfer block according to various embodiments of the present invention.

[0033] FIG. 1 is a block diagram of an exemplary electronic device (100) capable of performing the operations described in this document.

[0034] Referring to FIG. 1, the electronic device (100) may be one of various forms of electronic devices, such as a notebook (190), smartphones (191) having various form factors (e.g., a bar-type smartphone (191-1), a foldable-type smartphone (191-2), or a sliderable (or rollable)-type smartphone (191-3)), a tablet (192), a cellular phone (not shown), and other similar computing devices (not shown). The components, their relationships, and their functions illustrated in FIG. 1 are illustrative only and are not intended to limit the implementations described or claimed herein. The electronic device (100) may be referred to as a mobile device, a user device, a multifunction device, a portable device, or a server.

[0035] The electronic device (100) may include components comprising at least one processor (110) (hereinafter referred to as processor (110)), at least one memory (120) (hereinafter referred to as memory (120)), at least one display (140) (hereinafter referred to as display (140)), at least one image sensor (150) (hereinafter referred to as image sensor (150)), at least one communication circuit (160) (hereinafter referred to as communication circuit (160)), and / or at least one sensor (170) (hereinafter referred to as sensor (170)). The components are merely exemplary. For example, the electronic device (100) may include other components (e.g., power management integrated circuitry (PMIC), audio processing circuit, antenna, rechargeable battery, or input / output interface). For example, some components may be omitted from the electronic device (100). For example, some components may be integrated into a single component.

[0036] The processor (110) may be implemented as one or more IC (integrated circuit (or circuitry)) chips and may perform various data processing operations. The processor (110) may include at least one electrical circuit and may process instructions (or programs, data, etc.) stored in memory (120) individually or collectively in a distributed manner. The processor (110) may include a processor assembly comprising one or more processing circuits. The processor (110) may include any processing circuit that is operative to control the performance and operations of one or more components of the electronic device (100) (e.g., memory (120), display (140), image sensor (150), communication circuit (160), and / or sensor (170)). For example, the processor (110) (e.g., application processor (AP)) may be implemented as a system on chip (SoC) (e.g., a single chip or chipset). For example, the processor (110) may be implemented with a plurality of cores (or at least one core circuit), a plurality of chips, or a plurality of chipsets. For example, the processor (110) may include one or more processing circuits. For example, the processor (110) may include one or more processing circuits configured to perform the various functions of the present disclosure individually and / or collectively. As an example without limitation, at least a portion of the processor (110) may be included in a first chip of the electronic device (100), and at least another portion of the processor (110) may be included in a second chip of the electronic device (100) different from the first chip of the electronic device (100).

[0037] For example, the processor (110) may include a central processing unit (111), a graphics processing unit (112), a neural processing unit (113), an image signal processor (114), a display controller (115), a memory controller (116), a storage controller (117), a communication processor (118), and / or a sensor interface (119). These components of the processor (110) are merely exemplary. For example, the processor (110) may include other components. For example, some components of the processor (110) may be omitted from the processor (110). For example, some components of the processor (110) may be included as separate components of the electronic device (100) outside of the processor (110). For example, some components of the processor (110) (e.g., memory controller (116)) may be included in other components (e.g., at least part of memory (120), an interface (e.g. available for connection to at least one component of the electronic device (100)), a display (140) and / or an image sensor (150)).

[0038] The processor (110) may cause other components of the electronic device (100) to perform various operations by executing instructions stored in memory (120). The CPU (111) (or central processing circuit) may be configured to control the components of the processor (110) based on the execution of instructions stored in memory (120) (e.g., volatile memory (121) and / or non-volatile memory (122)). The GPU (112) (or graphics processing circuit) may be configured to execute parallel operations (e.g., rendering). The NPU (113) (or neural processing circuit, or AI (artificial intelligence) chip) may be configured to execute operations for an artificial intelligence model (e.g., convolution computation). An ISP (114) (or image signal processing circuit) may be configured to process a raw image acquired through an image sensor (150) into a format suitable for a component within the electronic device (100) or a component of the processor (110). A display controller (115) (or display control circuit, or DPU (display processing unit)) may be configured to process an image acquired from a CPU (111), GPU (112), ISP (114), or memory (120) (e.g., volatile memory (121)) into a format suitable for a display (140). A memory controller (116) (or memory control circuit) may be configured to control reading data from the volatile memory (121) and writing data to the volatile memory (121). A storage controller (117) (or storage control circuit) may be configured to control reading data from the non-volatile memory (122) and writing data to the non-volatile memory (122).The CP (118) (communication processing circuit) may be configured to process data obtained from a component of the processor (110) into a format suitable for transmitting to another electronic device via the communication circuit (160), or to process data obtained from another electronic device via the communication circuit (160) into a format suitable for processing by the component of the processor (110). For example, the communication circuit (160) may include one or more communication circuits. The sensor interface (119) (or sensing data processing circuit, sensor hub) may be configured to process data regarding the state of the electronic device (100) and / or the state around the electronic device (100), obtained through the sensor (170), into a format suitable for the component of the processor (110).

[0039] Memory (120) may include one or more storage media (or one or more storage devices). For example, memory (120) may include a memory assembly comprising one or more storage media. For example, the one or more storage media may include a hard drive, a permanent memory such as flash memory, read-only memory (ROM) (e.g., non-volatile memory (122)), a semi-permanent memory such as random access memory (RAM) (e.g., volatile memory (121)), any other suitable type of storage (or storage assembly), or any combination thereof. Memory (120) may include a cache memory, which is one or more different types of memory used to temporarily store data for a function or feature of the electronic device (100). As an example not limited to, the cache memory may be included within the processor (110). The memory (120) may be fixedly embedded within the electronic device (100) or incorporated into one or more suitable types of components (e.g., a SIM (subscriber identity module) card and / or an SD (secure digital) card) that can be repeatedly inserted into and removed from the electronic device (100).

[0040] For example, memory (120) may store one or more software applications, such as operating system (or system) software applications, firmware software applications, driver software applications, plugin (e.g., add-in, add-on, and / or applet) software applications, and / or any other suitable software applications. For example, the one or more software applications may include instructions executable by the processor (110). For example, memory (120) may store instructions that can be called by an application programming interface (API). For example, memory (120) may store instructions within a library.

[0041] The electronic device according to the various embodiments disclosed in this document may be of various forms. The electronic device may include, for example, a portable communication device (e.g., a smartphone), a computer device, a portable multimedia device, a portable medical device, a camera, a wearable device, or a consumer electronics device. The electronic device according to the embodiments of this document is not limited to the devices described above.

[0042] The various embodiments of this document and the terms used therein are not intended to limit the technical features described in this document to specific embodiments, and should be understood to include various modifications, equivalents, or substitutions of said embodiments. In connection with the description of the drawings, similar reference numerals may be used for similar or related components. The singular form of a noun corresponding to an item may include one or more of said items unless the relevant context clearly indicates otherwise. In this document, phrases such as "A or B," "at least one of A and B," "at least one of A or B," "A, B or C," "at least one of A, B and C," and "at least one of A, B, or C" may each include any one of the items listed together in the corresponding phrase, or all possible combinations thereof. Terms such as "first," "second," or "first" or "second" may be used simply to distinguish said components from other said components and do not limit said components in any other aspect (e.g., importance or order). Where any (e.g., 1st) component is referred to as “coupled” or “connected” to another (e.g., 2nd) component, with or without the terms “functionally” or “communicationly,” it means that said any component may be connected to said other component directly (e.g., via a wire), wirelessly, or through a third component.

[0043] The term “module” as used in the various embodiments of this document may include a unit implemented in hardware, software, or firmware, and may be used interchangeably with terms such as logic, logic block, component, or circuit, for example. A module may be a component formed integrally, or a minimum unit of said component or a part thereof that performs one or more functions. For example, according to one embodiment, a module may be implemented in the form of an application-specific integrated circuit (ASIC).

[0044] Various embodiments of the present document may be implemented as software (e.g., program (140)) comprising one or more instructions stored in a storage medium (e.g., internal memory (136) or external memory (138)) readable by a machine (e.g., electronic device (100)). For example, a processor (e.g., processor (120)) of the machine (e.g., electronic device (100)) may call at least one of the one or more instructions stored from the storage medium and execute it. This enables the machine to be operated to perform at least one function according to the at least one called instruction. The one or more instructions may include code generated by a compiler or code that can be executed by an interpreter. The storage medium readable by the machine may be provided in the form of a non-transitory storage medium. Here, 'non-temporary' simply means that the storage medium is a tangible device and does not contain a signal (e.g., electromagnetic waves), and the term does not distinguish between cases where data is stored semi-permanently and cases where it is stored temporarily.

[0045] According to one embodiment, the method according to the various embodiments disclosed herein may be provided by being included in a computer program product. The computer program product may be traded between a seller and a buyer as a product. The computer program product may be distributed in the form of a device-readable storage medium (e.g., compact disc read-only memory (CD-ROM)), or distributed online (e.g., download or upload) through an application store (e.g., Play Store™) or directly between two user devices (e.g., smartphones). In the case of online distribution, at least a portion of the computer program product may be temporarily stored or temporarily created on a device-readable storage medium, such as the memory of a manufacturer's server, an application store's server, or a relay server.

[0046] According to various embodiments, each component (e.g., module or program) of the components described above may include a singular or multiple entities, and some of the multiple entities may be separated and placed in other components. According to various embodiments, one or more of the components or operations of the aforementioned components may be omitted, or one or more other components or operations may be added. Generally or additionally, multiple components (e.g., module or program) may be integrated into a single component. In this case, the integrated component may perform one or more functions of each of the multiple components in the same or similar manner as those performed by the corresponding component among the multiple components prior to integration. According to various embodiments, operations performed by the module, program, or other components may be executed sequentially, in parallel, iteratively, or heuristically, or one or more of the operations may be executed in a different order, omitted, or one or more other operations may be added.

[0047] FIG. 2a is a front perspective view of an electronic device according to various embodiments of the present disclosure. FIG. 2b is a rear perspective view of the electronic device of FIG. 2a according to various embodiments of the present disclosure.

[0048] The electronic device (200) of FIGS. 2a and 2b may be at least partially similar to the electronic device (100) of FIG. 1, or may include various embodiments of the electronic device.

[0049] Referring to FIG. 2a and FIG. 2b, an electronic device (200) according to one embodiment may include a housing (210) comprising a first surface (or front) (210A), a second surface (or rear) (210B), and a side (210C) surrounding the space between the first surface (210A) and the second surface (210B). In one embodiment (not shown), the housing (210) may refer to a structure forming some of the first surface (210A), the second surface (210B), and the side (210C). According to one embodiment, the first surface (210A) may be formed by a front plate (202) (e.g., a glass plate or a polymer plate including various coating layers) in which at least a portion is substantially transparent. The second surface (210B) may be formed by a rear plate (211) that is substantially opaque. The rear plate (211) may be formed, for example, by coated or colored glass, ceramic, polymer, metal (e.g., aluminum, stainless steel (STS), or magnesium), or a combination of at least two of the above materials. The side (210C) may be formed by a side frame (or "side member") (218) comprising metal and / or polymer, which is combined with the front plate (202) and the rear plate (211). In some embodiments, the rear plate (211) and the side frame (218) may be formed integrally and may comprise the same material (e.g., a metallic material such as aluminum).

[0050] In the illustrated embodiment, the front plate (202) may include a first region (210D) that curves seamlessly from the first surface (210A) toward the rear plate at both ends of the long edge of the front plate. In the illustrated embodiment (see FIG. 2b), the rear plate (211) may include a second region (210E) that curves seamlessly from the second surface (210B) toward the front plate at both ends of the long edge. In some embodiments, the front plate (202) or the rear plate (211) may include only one of the first region (210D) or the second region (210E). In some embodiments, the front plate (202) and the rear plate (211) may not include the first region and the second region, but may include only a flat plane positioned parallel to the second surface (210B). In the above embodiments, when viewed from the side of the electronic device, the side frame (218) may have a first thickness (or width) on the side that does not include the first region (210D) or the second region (210E) as above, and may have a second thickness that is thinner than the first thickness on the side that includes the first region or the second region.

[0051] According to one embodiment, the electronic device (200) may include at least one of a display (300), an input device (203), an audio output device (207, 214), a sensor module (204, 219), a camera module (205, 212, 213), a key input device (217), an indicator (not shown), and a connector (208). In some embodiments, the electronic device (200) may omit at least one of the components (e.g., a key input device (217), or an indicator) or additionally include other components.

[0052] The display (300) may be exposed, for example, through a substantial portion of the front plate (202). In some embodiments, at least a portion of the display (300) may be exposed through the front plate (202) forming the first surface (210A) and the first area (210D) of the side (210C). The display (300) may be combined with or placed adjacent to a touch sensing circuit, a pressure sensor capable of measuring the intensity (pressure) of the touch, and / or a digitizer that detects a magnetic field-type stylus pen. In some embodiments, at least a portion of the sensor module (204, 219) and / or at least a portion of the key input device (217) may be placed in the first area (210D) and / or the second area (210E).

[0053] The input device (203) may include a microphone. In some embodiments, the input device (203) may include a plurality of microphones positioned to detect the direction of sound. The sound output device (207, 214) may include speakers. The speakers may include an external speaker (207) and a call receiver (214). In some embodiments, the microphone, speakers, and connector (208) may be positioned in the space of the electronic device (200) and may be exposed to the external environment through at least one hole formed in the housing (210). In some embodiments, the hole formed in the housing (210) may be used for both the microphone and the speakers. In some embodiments, the sound output device (207, 214) may include a speaker (e.g., a piezo speaker) that operates with the hole formed in the housing (210) excluded. In some embodiments, the electronic device (200) may include a tray member positioned through at least a portion of the side frame (218).

[0054] The sensor module (204, 219) can generate an electrical signal or data value corresponding to an internal operating state of the electronic device (200) or an external environmental state. The sensor module (204, 219) may include, for example, a first sensor module (204) (e.g., proximity sensor) and / or a second sensor module (not shown) (e.g., fingerprint sensor) disposed on a first surface (210A) of the housing (210), and / or a third sensor module (219) (e.g., HRM sensor) disposed on a second surface (210B) of the housing (210). The fingerprint sensor may be disposed on the first surface (210A) of the housing (210). The fingerprint sensor (e.g., ultrasonic or optical fingerprint sensor) may be disposed below the display (300) on the first surface (210A). The electronic device (200) may further include at least one of an unillustrated sensor module, for example, a gesture sensor, a gyroscope sensor, a barometric pressure sensor, a magnetic sensor, an accelerometer sensor, a grip sensor, a color sensor, an IR (infrared) sensor, a biosensor, a temperature sensor, a humidity sensor, a proximity sensor, or an illuminance sensor (204).

[0055] The camera modules (205, 212, 213) may include a first camera device (205) disposed on a first surface (210A) of the electronic device (200), a second camera device (212) disposed on a second surface (210B), and / or a flash (213). The camera modules (205, 212) may include one or more lenses, an image sensor, and / or an image signal processor. The flash (213) may include, for example, a light-emitting diode or a xenon lamp. In some embodiments, two or more lenses (wide-angle and telephoto lenses) and image sensors may be disposed on one surface of the electronic device (200).

[0056] A key input device (217) may be placed on the side (210C) of the housing (210). In one embodiment, the electronic device (200) may not include some or all of the aforementioned key input devices (217), and the key input devices (217) that are not included may be implemented in other forms, such as soft keys, on the display (300). In one embodiment, the key input device (217) may be implemented using a pressure sensor included in the display (300).

[0057] An indicator may be placed, for example, on a first surface (210A) of a housing (210). The indicator may, for example, provide status information of an electronic device (200) in the form of light. In one embodiment, a light-emitting element may, for example, provide a light source that is coupled with the operation of a camera module (205). The indicator may include, for example, an LED, an IR LED, and a xenon lamp.

[0058] The connector hole (208) may include a first connector hole (208) capable of accommodating a connector (e.g., a USB connector or an IF module (interface connector port module)) for transmitting and receiving power and / or data with an external electronic device, and / or a second connector hole (or earphone jack) capable of accommodating a connector for transmitting and receiving audio signals with an external electronic device.

[0059] Some of the camera modules (205, 212), some of the sensor modules (204, 219), or indicators may be positioned to be exposed through the display (300). For example, the camera module (205), sensor module (204), or indicator may be positioned to come into contact with the external environment through an opening or a transparent area perforated from the internal space of the electronic device (200) to the front plate (202) of the display (300). In one embodiment, the area facing the display (300) and the camera module (205) may be formed as a transparent area having a certain transmittance as part of the area for displaying content. In one embodiment, the transparent area may be formed to have a transmittance in the range of about 5% to about 20%. This transparent area may include an area that overlaps with the effective area (e.g., field of view area) of the camera module (205) through which light passes to form an image and generate an image by being formed by an image sensor. For example, the transparent area of ​​the display (300) may include an area with a lower pixel density than the surrounding area. For example, the transparent area may replace the opening. For example, the camera module (205) may include an under-display camera (UDC). According to one embodiment, some sensor modules (204) may be positioned to perform their functions without being visually exposed through the front plate (202) within the internal space of the electronic device. For example, in this case, the area of ​​the display (300) facing the sensor modules may not require a perforated opening.

[0060] FIG. 3a is an exploded perspective view of the electronic device of FIG. 2a according to various embodiments of the present disclosure.

[0061] Referring to FIG. 3a, the electronic device (200) may include a frame (301), a front plate (202) (e.g., a front cover), a display (300), a substrate (240), a battery (250), a support bracket (260) (e.g., a rear case or support member), an antenna (270), and a rear plate (211) (e.g., a rear cover). At least one of the components of the electronic device (200) may be identical or similar to at least one of the components of the electronic device (200) of FIG. 2a or FIG. 2b, and redundant descriptions are omitted below.

[0062] According to various embodiments, the frame (301) may include a side member (218) (e.g., the side frame (218) of FIG. 2a and FIG. 2b) and an inner frame (2181a) (e.g., an extension member or a support member).

[0063] The inner frame (2181a) may be disposed inside the electronic device (200) and structurally coupled with the side member (218), or formed integrally with the side member (218). The inner frame (2181a) may be formed, for example, from a metal material and / or a non-metal (e.g., polymer) material. The inner frame (2181a) may have a display (300) coupled to one side and a substrate (240) coupled to the other side. The substrate (240) may be equipped with a processor, memory, and / or an interface. The processor may include, for example, one or more of a central processing unit, an application processor, a graphics processing unit, an image signal processor, a sensor hub processor, or a communication processor. The memory may include, for example, volatile memory or non-volatile memory.

[0064] In some embodiments, the electronic device (200) may omit at least one of the components (e.g., an inner frame (2181a), or a support bracket (260)) or additionally include other components.

[0065] The interface may include, for example, an HDMI (high definition multimedia interface), a USB (universal serial bus) interface, an SD (secure digital) card interface, and / or an audio interface. The interface may, for example, electrically or physically connect the electronic device (200) to an external electronic device and may include a USB connector, an SD card / MMC (multi-media card) connector, or an audio connector.

[0066] The battery (250) is a device for supplying power to at least one component of the electronic device (200) and may include, for example, a non-rechargeable primary battery, a rechargeable secondary battery, or a fuel cell. At least a portion of the battery (250) may be disposed substantially coplanar with, for example, the substrate (240). The battery (250) may be integrally disposed inside the electronic device (200). According to one embodiment, the battery (250) may be disposed detachably from the electronic device (200).

[0067] An antenna (270) may be positioned between the rear plate (211) and the battery (250). The antenna (270) may include, for example, a near field communication (NFC) antenna, a wireless charging antenna, and / or a magnetic secure transmission (MST) antenna. The antenna (270) may, for example, communicate near-field with an external device or wirelessly transmit and receive power required for charging. In one embodiment, the antenna structure may be formed by a part or a combination thereof of the side member (218) and / or the inner frame (2181a).

[0068] FIG. 3b is a schematic diagram showing a cross-section of an electronic device according to various embodiments of the present disclosure.

[0069] For example, FIG. 3b may be a schematic diagram showing a cross-section of the 3-3' portion of the electronic device (200) disclosed in FIG. 2a.

[0070] Referring to FIG. 3b, the electronic device (200) may include a printed circuit board (2400). Various electrical components may be placed on the printed circuit board (2400). The electrical components may include, for example, a semiconductor package (305), a passive component (2402), an active component (2403) and / or an integrated circuit (2404).

[0071] In various embodiments, a semiconductor package (305) may be disposed on a printed circuit board (2400). The semiconductor package (305) may include, for example, a processor (e.g., processor (110) of FIG. 1) (e.g., AP, SoC)) and / or memory (e.g., volatile memory (121) and / or non-volatile memory (122) of FIG. 1). In various embodiments, the semiconductor package (305) may be a stacked semiconductor package (e.g., a stacked semiconductor package (405) of FIG. 4a to 4c) comprising a plurality of semiconductor dies stacked together.

[0072] In various embodiments, various passive components (2402), active components (2403), and / or integrated circuits (2404) may be placed on the printed circuit board (2400). For example, the board (240) may include passive components (2402) such as resistors, capacitors, and inductors, active components (2403) such as MOSFETs, diodes, and operational amplifiers (OP AMPs), and / or integrated circuits (2404) such as power management ICs (PMICs), controllers, and regulators.

[0073] In various embodiments, the substrate (240) may include a shield can (2401). The shield can (2401) may be a member that shields an electrical component from external electromagnetic interference (EMI) and blocks electromagnetic interference emitted from the electrical component. The shield can (2401) may be positioned on the surface of the printed circuit board (2400) to cover at least some of the electrical components. In various embodiments, the shield can (2401) may be configured to completely cover or partially cover the electrical components. In some embodiments, the shield can (2401) may include an opening to facilitate heat dissipation from the electrical component (e.g., semiconductor package (305)) inside the shield can (2401). An electrical component (e.g., a semiconductor package (305)) inside the shield can (2401) can dissipate heat through an opening to another component of the electronic device (e.g., a frame (301, 2181a)). In some embodiments, a thermal interface material (TIM) (2405) and / or a thermal dissipation structure (2406) may be disposed between the electrical component (e.g., a semiconductor package (305)) inside the shield can (2401) and the frame (301, 2181a). The thermal interface material (2405) may be, as one example, a paste containing conductive particles (e.g., metal particles, alumina, and / or diamond). The thermal dissipation structure (2406) may be a member having high thermal conductivity, such as a heat sink, a graphite sheet, a heat pipe, and / or a vapor chamber, as a non-limiting example.

[0074] FIG. 4a is a plan view of a substrate portion (401) of an electronic device according to various embodiments. FIG. 4b is a plan view of a substrate portion (401) of an electronic device according to various embodiments. FIG. 4c is a cross-sectional view of a stacked semiconductor package (405) of an electronic device according to various embodiments. For example, FIG. 4c is a cross-sectional view with respect to the AA direction of FIG. 4a.

[0075] Referring to FIGS. 4a through 4c, a substrate portion (401) (e.g., substrate (240) of FIG. 3a) of an electronic device (e.g., electronic device (100) of FIG. 1, electronic device (200) of FIG. 2a through 3b) may include a stacked semiconductor package (405) (e.g., semiconductor package (305) of FIG. 3b). In various embodiments, the stacked semiconductor package (405) may include a lower semiconductor package (410) and an upper semiconductor package (420).

[0076] The lower semiconductor package (410) may include one or more semiconductor dies (411) on which circuits of a processor (e.g., processor (110) of FIG. 1) (e.g., AP) are integrated. The lower semiconductor package (410) may include a lower redistribution layer (412) that connects electrical contacts of the semiconductor die (411) to a printed circuit board (402) (e.g., printed circuit board (2400) of FIG. 3b), and an upper redistribution layer (415) that connects the semiconductor die (411) and the lower redistribution layer to an upper semiconductor package (420). The lower redistribution layer (412) and the upper redistribution layer (415) may include wiring (414) (or traces) and vias (413). On the upper rewiring layer (415), a conductor pad (e.g., a connecting pad (416) and a fixing pad (417)) may be formed to bond various components (e.g., the upper semiconductor package (420) and the heat transfer block (430) described later) disposed on the lower semiconductor package (410). In various embodiments, the lower semiconductor package (410) may include an encapsulant (406) that encapsulates the semiconductor die (411).

[0077] The upper semiconductor package (420) may be a semiconductor package including, for example, memory (e.g., volatile memory (121) and / or non-volatile memory (122) of FIG. 1). The upper semiconductor package (420) may be electrically connected to a connection pad (416) formed on the upper surface of the lower semiconductor package (410). The lower surface of the upper semiconductor package (420) may be bonded to the connection pad (416) of the lower semiconductor package (410) by a solder ball (431a). For example, the upper semiconductor package (420) and the lower semiconductor package (410) may be bonded by reflow soldering. In various embodiments, the upper semiconductor package (420) may be placed in a first region (410a) provided on the upper surface of the lower semiconductor package (410) so that the upper semiconductor package (420) is placed therein.

[0078] In various embodiments, the stacked semiconductor package (405) may include a heat transfer block (430). The heat transfer block (430) may be a member that transfers heat from the lower semiconductor package (410) to the upper surface of the stacked semiconductor package (405). For example, a heat dissipation structure (e.g., the heat dissipation structure (2406) of FIG. 3b), such as a heat sink, a graphite sheet, a heat pipe, and / or a vapor chamber, may be located on the upper surface of the stacked semiconductor package (405), and the heat transfer block (430) may thermally connect the lower semiconductor package (410) and the heat dissipation structure. In various embodiments, the heat transfer block (430) may include a material with high thermal conductivity such as silver, copper, aluminum, beryllium, gold, silicon, and / or diamond. In various embodiments, the heat transfer block (430) may be placed in a second region (410b) provided on the upper surface of the lower semiconductor package (410) so that the heat transfer block (430) is placed therein.

[0079] In various embodiments, the stacked semiconductor package (405) may include a fixing member (431). For example, the fixing member (431) may be a solder ball (431a) that bonds the heat transfer block (430) and the lower semiconductor package (410). The solder ball (431a) may include, for example, an alloy comprising tin, lead, antimony, indium, zinc, silver, and / or at least one of these. In some embodiments, the solder ball (431a) may include a solder alloy that does not substantially contain lead. The lower semiconductor package (410) includes a fixing pad (417) formed at a position corresponding to the position of the fixing member (431), and the fixing member (431) may be melted by means such as reflow soldering to bond the fixing pad (417) and the heat transfer block (430). Additionally, the fixing member (431) can align the lower semiconductor package (410) to the second region (410b) of the lower semiconductor package (410) where the fixing pad (417) is formed, due to the surface tension of the molten solder metal and the wetting action of the fixing pad (417) when the heat transfer block (430) is bonded to the lower semiconductor package (410). Additionally, as the molten solder metal of the fixing member (431) cools and solidifies, the heat transfer block (430) can be bonded and fixed to the fixing member (431) of the lower semiconductor package (410). Thus, misalignment and misalignment of the heat transfer block (430), and the resulting decrease in adhesion and increase in thermal resistance between the heat transfer block (430) and the heat dissipation structure, can be prevented and / or reduced during the assembly of the electronic device. Additionally, the fixing member (431) can thermally connect the heat transfer block (430) and the lower semiconductor package (410). That is, for example, since the solder ball (431a) is directly bonded to the lower semiconductor package (410) and the heat transfer block (430), heat generated in the lower semiconductor package (410) can be transferred to the heat transfer block (430).

[0080] In various embodiments, the fixed pad (417) of the lower semiconductor package (410) may not be electrically connected to other wiring (414) and vias (413) of the upper redistribution layer (415).

[0081] In various embodiments, the stacked semiconductor package (405) may include an underfill (407) that bonds the lower semiconductor package (410) and components disposed on the lower semiconductor package (410) (e.g., upper semiconductor package (420), heat transfer block (430)).

[0082] FIG. 5a is a bottom perspective view of a heat transfer block (430) according to various embodiments. FIG. 5b is a bottom plan view of a heat transfer block (430) according to various embodiments. FIG. 5c is a schematic diagram showing a cross-section of a stacked semiconductor package according to one embodiment of the present invention. FIG. 5d is a schematic diagram showing a cross-section of a stacked semiconductor package according to various embodiments of the present invention.

[0083] For example, FIG. 5a is illustrated with the lower surface (e.g., the surface facing the z-direction) of the heat transfer block (430) as the top for convenience of explanation. For example, FIG. 5c and FIG. 5d omit some components for clarity, and regarding the omitted components, the description of FIG. 4c may be referenced unless contradictory.

[0084] Referring to FIGS. 5a through 5d, the heat transfer block (430) may include an uneven surface formed on a lower surface (e.g., a surface in the z-direction). The uneven surface may include a groove (433) and a protrusion (432). For example, a grid-shaped groove (433) may be formed on the lower surface of the heat transfer block (430), and a portion of the lower surface of the heat transfer block (430) where the groove (433) is not formed may be defined as a protrusion (432).

[0085] Referring to FIG. 5c, in some embodiments, the fixing member (431) may be a low-melting point metal (431b) located on a projection (432) on the lower surface of the heat transfer block (430). A fixing pad (417) of the lower semiconductor package (410) may be formed at a position corresponding to the projection (432). The low-melting point metal (431b) may be, for example, an alloy comprising tin, lead, antimony, indium, zinc, silver, and / or at least one of these. For example, the low-melting point metal (431b) may be a solder alloy. The low-melting point metal (431b) may be at least partially melted during a heating process for the stacked semiconductor package (405), such as reflow soldering, to align and bond the projection (432) to the fixing pad (417).

[0086] Referring to FIG. 5d, in some embodiments, the fixing member (431) may be a low-melting point metal (431b) located within a groove (433) on the lower surface of the heat transfer block (430). In some embodiments, the fixing pad (417) of the lower semiconductor package (410) may be formed in a position and shape corresponding to the groove (433). For example, the fixing pad (417) may be located in an area corresponding to the intersection of the grid-shaped groove (433), or the fixing pad (417) may have a grid shape. The low-melting point metal (431b) may be at least partially melted during a heating process for the stacked semiconductor package (405), such as reflow soldering, to align and bond the groove (433) to the fixing pad (417).

[0087] By placing a fixing member (431) in the groove (433), the lower surface of the heat transfer block (430) can be more closely attached to the lower semiconductor package (410), and thus the thermal resistance between the lower semiconductor package (410) and the heat transfer block (430) can be further reduced.

[0088] FIGS. 6a to 6c are schematic drawings illustrating cross-sections of stacked semiconductor packages according to various embodiments of the present invention.

[0089] Referring to FIGS. 6a through 6c, the stacked semiconductor package (405) may include a thermal interface (440). The thermal interface (440) may be located between the lower semiconductor package (410) and the heat transfer block (430). The thermal interface (440) fills the gap between the lower semiconductor package (410) and the heat transfer block (430) and is in close contact with the heat transfer block (430) and the lower semiconductor package (410), thereby lowering the thermal resistance of the heat transfer path from the lower semiconductor package (410) to the heat transfer block (430).

[0090] In various embodiments, the thermal interface (440) may comprise a paste (which may be referred to as 'thermal paste') comprising a thermally conductive powder (e.g., finely divided metal, graphite, carbon fiber, and / or diamond) and / or a metal comprising a liquid phase (which may be referred to as 'liquid metal', comprising a liquid phase, a mixture of liquid and solid phases, and / or a partially molten state). In some embodiments, the thermal interface (440) may comprise a solder paste comprising tin, silver, zinc, and / or copper. In various embodiments, the thermal interface (440) may have a structure in which the thermal paste, liquid metal, and / or solder paste are mixed or laminated.

[0091] In various embodiments, the fixing member (431) is positioned on the outer edge of the lower surface of the heat transfer block (430), and the thermal interface (440) may be applied inwardly to the lower surface of the heat transfer block (430). For example, the fixing member (431) may be positioned along the outer perimeter of the heat transfer block (430) on the lower surface of the heat transfer block (430).

[0092] Generally, a thermal interface (440) having high thermal conductivity (e.g., 'liquid metal') may be conductive. If the thermal interface (440) applied to the lower part of the heat transfer block (430) leaks from the lower part of the heat transfer block (430), it may cause a short circuit inside the electronic device. For example, the thermal interface (440) may cause a short circuit to the upper semiconductor package (420) adjacent to the heat transfer block (430). By placing a fixing member (431) on the outer part of the lower surface of the heat transfer block (430) and applying the thermal interface (440) to the inside thereof, the risk of the conductive thermal interface (440) leaking and causing a short circuit may be reduced.

[0093] Referring to FIGS. 6b and 6c, in some embodiments, the stacked semiconductor package (405) may include a dam (418) and / or a trench (419). The dam (418) and / or trench (419) may protrude and / or be recessed in the area between the heat transfer block (430) and the upper semiconductor package (420) on the upper surface of the lower semiconductor package (410). The dam (418) and / or trench (419) may block the transfer of a conductive material to the upper semiconductor package (420) when the conductive material contained in the thermal interface (440) leaks from the lower part of the heat transfer block (430).

[0094] FIGS. 6a to 6c illustrate an embodiment in which the fixing member (431) is a solder ball (431a), but it will be obvious to a person skilled in the art that this is applicable to a heat transfer block (430) having the uneven parts of FIGS. 5a to 5d, to the extent that it is not contradictory.

[0095] FIG. 7a is a bottom plan view of a heat transfer block (430) according to various embodiments. FIG. 7b is a cross-sectional view of a stacked semiconductor package (405) according to various embodiments. FIG. 7c is a bottom plan view of a heat transfer block (430) according to various embodiments. FIG. 7d is a cross-sectional view of a stacked semiconductor package (405) according to various embodiments.

[0096] Referring to FIGS. 7a and 7c, a heat transfer block (430) according to various embodiments may include a recess (436). The recess (436) may be formed as a recess in the central part of the lower surface of the heat transfer block (430). In various embodiments, a fixing member (431) may be located in the periphery of the lower surface of the heat transfer block (430), and the recess (436) may be located in the central part of the lower surface of the heat transfer block (430). For example, the fixing member (431) may surround the recess (436) from the outside on the lower surface of the heat transfer block (430).

[0097] Referring to FIGS. 7b and 7d, the thermal interface (440) may be located within the recess (436). By having the thermal interface (440) located within the recess (436), the possibility of the thermal interface (440) leaking out from the bottom of the heat transfer block (430) can be reduced. Additionally, the risk of the thermal interface (440) and the heat transfer block (430) being displaced from their proper positions on the lower semiconductor substrate can be reduced.

[0098] FIG. 8a is a diagram showing the manufacturing process of a heat transfer block according to one embodiment of the present invention. FIG. 8b is a diagram showing the manufacturing process of a heat transfer block according to various embodiments of the present invention.

[0099] Referring to FIG. 8a, a heat transfer block (430) according to various embodiments can be manufactured by applying a solder resist (820) on a plate (810), patterning the solder resist (820), forming a solder ball (431a), and cutting into individual heat transfer blocks (430).

[0100] The plate (810) may be a plate material (e.g., a copper plate) having a sufficient size to produce a plurality of heat transfer blocks (430) in a batch. A solder resist (820) (e.g., UV-curing solder resist, thermal-curing solder resist and / or composite-curing solder resist) may be applied to the surface of the plate (810).

[0101] The operation of patterning the solder resist (820) may be an operation of removing a portion of the solder resist (820) so that the surface of the plate (810) is exposed so that a solder ball (431a) can be formed. Patterning may be performed by means such as UV exposure and development or selective curing by laser irradiation. In some embodiments, after patterning the solder resist (820), an oxide film removal operation (e.g., acid and / or alkali cleaning or laser cleaning) may be performed on the exposed surface of the plate (810).

[0102] A solder ball (431a) may be formed on the surface of the disc (810) that is partially exposed by the patterning of the solder resist (820). The solder ball (431a) may be formed, for example, by being directly attached to the surface of the disc (810), or by applying solder paste to the surface of the disc (810) by means such as a silk screen and heating it (e.g., reflow soldering).

[0103] The disc (810) on which the solder ball (431a) is formed can be cut into individual heat transfer blocks (430) by means such as a dicing saw (809). In some embodiments, a plating layer (830) (e.g., a stainless steel deposition layer) can be formed on the surface of the cut heat transfer blocks (430).

[0104] Referring to FIG. 8b, a heat transfer block (430) according to various embodiments can be formed by processing a disc (810) so that an uneven surface (e.g., a groove (433) and a protrusion (432)) is formed on the disc (810), cutting the processed disc (810) into individual heat transfer blocks (430), and plating a low-melting-point metal (431b) onto the cut heat transfer blocks (430).

[0105] The operation of processing the disc (810) may be an operation of forming irregularities (e.g., grooves (433) and protrusions (432)) on the disc (810) by means such as cutting (e.g., milling) or grinding (e.g., plunge grinding). The processed disc (810) may be cut into individual heat transfer blocks (430) by means such as a dicing saw (809).

[0106] The plating operation may be an operation of forming a layer of low-melting point metal (431b) on the lower surface of the heat transfer block (430) (e.g., the surface of the protrusion (432)). In some embodiments, it will be obvious to a person skilled in the art that the operation of plating the low-melting point metal (431b) may be performed on the original plate (810) before it is cut after processing, or on the surface of the original plate (810) before the unevenness is processed.

[0107] An electronic device according to various embodiments of the present disclosure may include a lower semiconductor package (410). The electronic device may include an upper semiconductor package (420) located in a first region (410a) on the upper surface of the lower semiconductor package (410) and electrically connected to the lower semiconductor package (410). The electronic device may include a heat transfer block (430) located in a second region (410b) on the upper surface of the lower semiconductor package (410). The electronic device may include a fixing member (431) located on the lower surface of the heat transfer block (430) and bonded to the upper surface of the lower semiconductor package (410) to fix the heat dissipation block to the lower semiconductor package (410).

[0108] In various embodiments, the fixing member (431) may include a solder ball (431a).

[0109] In various embodiments, the heat transfer block (430) may include an uneven surface formed in at least a portion of the lower surface and including a groove (433) and a projection (432).

[0110] In various embodiments, the fixing member (431) may include a low-melting point metal (431b) disposed on the projection (432) of the heat transfer block (430).

[0111] In various embodiments, the fixing member (431) may include a low-melting point metal (431b) disposed in the groove (433) of the heat transfer block (430).

[0112] In various embodiments, the lower semiconductor package (410) may include a metal pad disposed at the portion where the fixing member (431) is bonded on the upper surface.

[0113] In various embodiments, the electronic device includes a thermal interface (440) disposed between the lower semiconductor package (410) and the heat transfer block (430), and the fixing member (431) may be disposed along the outer perimeter of the thermal interface (440).

[0114] In various embodiments, the heat transfer block (430) may include a recess (436) formed in the area where the heat interface (440) is located on the lower surface.

[0115] In various embodiments, the thermal interface (440) may include liquid metal.

[0116] In various embodiments, the lower semiconductor package (410) may include a blocking member located between the first region (410a) and the second region (410b) on the upper surface and configured to at least partially block the movement of liquid on the upper surface.

[0117] A stacked semiconductor package (405) according to various embodiments may include a lower semiconductor package (410). The electronic device may include an upper semiconductor package (420) located in a first region (410a) on the upper surface of the lower semiconductor package (410) and electrically connected to the lower semiconductor package (410). The electronic device may include a heat transfer block (430) located in a second region (410b) on the upper surface of the lower semiconductor package (410). The electronic device may include a fixing member (431) located on the lower surface of the heat transfer block (430) and bonded to the upper surface of the lower semiconductor package (410) to fix the heat dissipation block to the lower semiconductor package (410).

[0118] In various embodiments, the fixing member (431) may include a solder ball (431a).

[0119] In various embodiments, the heat transfer block (430) may include an uneven surface formed in at least a portion of the lower surface and including a groove (433) and a projection (432).

[0120] In various embodiments, the fixing member (431) may include a low-melting point metal (431b) disposed on the projection (432) of the heat transfer block (430).

[0121] In various embodiments, the fixing member (431) may include a low-melting point metal (431b) disposed in the groove (433) of the heat transfer block (430).

[0122] In various embodiments, the lower semiconductor package (410) may include a metal pad disposed at the portion where the fixing member (431) is bonded on the upper surface.

[0123] In various embodiments, the stacked semiconductor package includes a thermal interface (440) disposed between the lower semiconductor package (410) and the heat transfer block (430), and the fixing member (431) may be disposed along the outer perimeter of the thermal interface (440).

[0124] In various embodiments, the heat transfer block (430) may include a recess (436) formed in the area where the heat interface (440) is located on the lower surface.

[0125] In various embodiments, the thermal interface (440) may include liquid metal.

[0126] In various embodiments, the lower semiconductor package (410) may include a blocking member located between the first region (410a) and the second region (410b) on the upper surface and configured to at least partially block the movement of liquid on the upper surface.

[0127] According to various embodiments of the present disclosure, an electronic device may be provided in which a heat dissipation block is bonded to a lower semiconductor package by a solder metal, so that the heat dissipation block is effectively aligned on the lower package by the surface tension of the solder during soldering, and heat from the lower semiconductor package is effectively transferred to the heat dissipation block through the solder metal.

[0128] The effects obtainable from the present disclosure are not limited to those mentioned above, and other unmentioned effects will be clearly understood by those skilled in the art to which the present disclosure belongs.

[0129] The embodiments of the present disclosure disclosed in this specification and drawings are merely specific examples provided to facilitate the explanation of the technical content according to the embodiments of the present disclosure and to aid in understanding the embodiments of the present disclosure, and are not intended to limit the scope of the embodiments of the present disclosure. Accordingly, the scope of an embodiment of the present disclosure should be interpreted as including all modifications or variations derived based on the technical features of an embodiment of the present disclosure, in addition to the embodiments disclosed herein.

Claims

1. In an electronic device (200), Lower semiconductor package (410); An upper semiconductor package (420) located in a first region (410a) on the upper surface of the lower semiconductor package (410) and electrically connected to the lower semiconductor package (410); A heat transfer block (430) located in a second region (410b) on the upper surface of the lower semiconductor package (410); and An electronic device comprising a fixing member (431) located on the lower surface of the heat transfer block (430) and bonded to the upper surface of the lower semiconductor package (410) to fix the heat dissipation block to the lower semiconductor package (410).

2. In Paragraph 1, The above fixed member (431) is an electronic device including a solder ball (431a).

3. In Paragraph 1, The above heat transfer block (430) is formed in at least a portion of the lower surface and is an electronic device including an uneven surface including a groove (433) and a protrusion (432).

4. In Paragraph 3, The above fixed member (431) is an electronic device comprising a low-melting point metal (431b) disposed on the projection (432) of the heat transfer block (430).

5. In Paragraph 3, The above fixed member (431) is an electronic device comprising a low-melting point metal (431b) disposed in the groove (433) of the heat transfer block (430).

6. In Paragraph 1, The above lower semiconductor package (410) is an electronic device comprising a metal pad disposed at the portion where the fixing member (431) is bonded on the upper surface.

7. In Paragraph 1, It includes a thermal interface (440) disposed between the lower semiconductor package (410) and the heat transfer block (430), and The above fixed member (431) is an electronic device positioned along the outer circumference of the thermal interface (440).

8. In Paragraph 7, The above heat transfer block (430) is an electronic device comprising a recess (436) formed in the area where the heat interface (440) is located on the lower surface.

9. In Paragraph 1, The electronic device comprising a lower semiconductor package (410) located between the first region (410a) and the second region (410b) on the upper surface and configured to at least partially block the movement of liquid on the upper surface.

10. In a stacked semiconductor package (405), Lower semiconductor package (410); An upper semiconductor package (420) located in a first region (410a) on the upper surface of the lower semiconductor package (410) and electrically connected to the lower semiconductor package (410); A heat transfer block (430) located in a second region (410b) on the upper surface of the lower semiconductor package (410); and A stacked semiconductor package comprising a fixing member (431) located on the lower surface of the heat transfer block (430) and bonded to the upper surface of the lower semiconductor package (410) to fix the heat dissipation block to the lower semiconductor package (410).

11. In Paragraph 10, The above fixing member (431) is a stacked semiconductor package including a solder ball (431a).

12. In Paragraph 10, The above heat transfer block (430) is formed in at least a portion of the lower surface and is a stacked semiconductor package including an uneven surface including a groove (433) and a protrusion (432).

13. In Paragraph 10, The lower semiconductor package (410) is a stacked semiconductor package comprising a metal pad disposed at the portion where the fixing member (431) is bonded on the upper surface.

14. In Paragraph 10, It includes a thermal interface (440) disposed between the lower semiconductor package (410) and the heat transfer block (430), and The above fixing member (431) is a stacked semiconductor package disposed along the outer circumference of the thermal interface (440).

15. In Paragraph 10, The lower semiconductor package (410) is a stacked semiconductor package comprising a blocking member located between the first region (410a) and the second region (410b) on the upper surface and configured to at least partially block the movement of liquid on the upper surface.

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