Method for creating virtual processor, system, electronic device, storage medium and program product

Abstract

Disclosed in the present disclosure are a method for creating a virtual processor, a system, an electronic device, a storage medium and a program product. The method comprises: during the process of a host machine running a host machine operating system, creating an extended page table, wherein the host machine operating system is to be switched to a virtual machine operating system, and the extended page table is used for representing a mapping relationship between a physical address of the virtual machine operating system and a real physical address; creating a data structure on the basis of the extended page table, the data structure comprising attribute information required for running the virtual machine operating system; on the basis of the attribute information in the data structure, switching the host machine operating system to the virtual machine operating system; and creating a virtual processor for the virtual machine operating system.

Description

Method, system, electronic device, storage medium and program product for creating virtual processor

[0001] Cross-reference

[0002] The present disclosure claims priority from a Chinese patent application No. 2024113286871 filed on September 23, 2024, and entitled "Method, system, electronic device, storage medium and program product for creating virtual processor", the content of which is incorporated herein by reference in its entirety. TECHNICAL FIELD

[0003] The present disclosure relates to the technical field of virtualization, and in particular, to a method, system, electronic device, storage medium and program product for creating a virtual processor. BACKGROUND

[0004] At present, in a traditional operating system, different function groups can set the range of processors that can be used by setting control groups (Cgroups) to divide the use range and use quota of different processors. However, the quotas of different Cgroups in the above method do not change frequently, which may lead to the situation that some Cgroups are idle and some are busy, so that it is not possible to directly create a new virtual central processing unit (VCPU) for an operating system that is running.

[0005] At present, there is no effective solution to the above problems. SUMMARY

[0006] The embodiments of the present disclosure provide a method, system, electronic device, storage medium and program product for creating a virtual processor to at least solve the technical problem that a new VCPU cannot be directly created for a running operating system.

[0007] According to an aspect of an embodiment of the present disclosure, a method for creating a virtual processor is also provided. The method can include: creating an extended page table during running of a host operating system by a host computer, wherein the host operating system is to be switched to a virtual machine operating system, and the extended page table is used to represent the mapping relationship between the physical address of the virtual machine operating system and the real physical address; creating a data structure based on the extended page table, wherein the data structure includes attribute information required for running the virtual machine operating system; switching the host operating system to the virtual machine operating system based on the attribute information in the data structure; and creating a virtual processor for the virtual machine operating system.

[0008] According to another aspect of the embodiments of the present disclosure, a method for online of a virtual processor is also provided. The method can include: obtaining a virtual processor created for a virtual machine operating system, wherein the virtual machine operating system is obtained by switching a host operating system based on attribute information in a data structure, the data structure is created based on an extended page table and includes attribute information required for running the virtual machine operating system, the extended page table is created in a process in which a host runs the host operating system and is used to represent a mapping relationship of a physical address of the virtual machine operating system to a real physical address; and performing an online operation on the virtual processor.

[0009] According to another aspect of the embodiments of the present disclosure, a method for running of a virtual processor is also provided. The method can include: obtaining a virtual processor of a virtual machine operating system that has been online, wherein the virtual machine operating system is obtained by switching a host operating system based on attribute information in a data structure, the data structure is created based on an extended page table and includes attribute information required for running the virtual machine operating system, the extended page table is created in a process in which a host runs the host operating system and is used to represent a mapping relationship of a physical address of the virtual machine operating system to a real physical address; and performing a trap-out running on the virtual processor.

[0010] According to another aspect of the embodiments of the present disclosure, a method for offline of a virtual processor is also provided. The method can include: obtaining a virtual processor of a virtual machine operating system that has been online, wherein the virtual machine operating system is obtained by switching a host operating system based on attribute information in a data structure, the data structure is created based on an extended page table and includes attribute information required for running the virtual machine operating system, the extended page table is created in a process in which a host runs the host operating system and is used to represent a mapping relationship of a physical address of the virtual machine operating system to a real physical address; and performing an offline operation on the virtual processor.

[0011] According to another aspect of the embodiments of the present disclosure, a system for creating a virtual processor is also provided. The system can include: a creating end configured to create an extended page table in a process in which a host runs a host operating system, wherein the host operating system is to be switched to a virtual machine operating system, the extended page table is used to represent a mapping relationship of a physical address of the virtual machine operating system to a real physical address; create a data structure based on the extended page table, wherein the data structure includes attribute information required for running the virtual machine operating system; switch the host operating system to the virtual machine operating system based on the attribute information in the data structure; create a virtual processor for the virtual machine operating system; an online end configured to perform an online operation on the virtual processor; a running end configured to perform a trap-out running on the virtual processor in a dispatcher; and an offline end configured to perform an offline operation on the virtual processor.

[0012] According to another aspect of the embodiments of the present disclosure, an electronic device is also provided, which can include a memory and a processor. The memory is configured to store computer-executable instructions, and the processor is configured to execute the computer-executable instructions. When the computer-executable instructions are executed by the processor, any of the above methods is implemented.

[0013] According to another aspect of the embodiments of the present disclosure, a processor is also provided, which is configured to run a program. When the program is run, any of the above methods is executed.

[0014] According to another aspect of the embodiments of the present disclosure, a computer-readable storage medium is also provided, which includes a stored program. When the program is run, the device where the storage medium is located is controlled to execute any of the above methods.

[0015] According to another aspect of the embodiments of the present disclosure, a computer program product is also provided, which includes a computer program. When the computer program is executed by a processor, any of the above methods is executed.

[0016] According to another aspect of the embodiments of the present disclosure, a computer program product is also provided, which includes a non-volatile computer-readable storage medium. The non-volatile computer-readable storage medium stores a computer program. When the computer program is executed by a processor, the method in the embodiments of the present disclosure is implemented.

[0017] According to another aspect of the embodiments of the present disclosure, a computer program is also provided. When the computer program is executed by a processor, the method in the embodiments of the present disclosure is implemented.

[0018] In the embodiments of the present disclosure, in the process that a host computer runs a host operating system, an extended page table is created, wherein the host operating system is to be switched to a virtual machine operating system, and the extended page table is used to represent the mapping relationship between the physical address of the virtual machine operating system and the real physical address. A data structure is created based on the extended page table, wherein the data structure includes attribute information required by the virtual machine operating system to run. The host operating system is switched to the virtual machine operating system based on the attribute information in the data structure. A virtual processor is created for the virtual machine operating system. That is, in the embodiments of the present disclosure, the extended page table is created, the data structure is constructed based on the extended page table, and the host operating system running the operating system is switched to the virtual machine operating system by using the attribute information in the data structure, thereby achieving the purpose of switching the host operating system running on the host computer to the virtualization mode, in which the host operating system is controlled to be switched to the virtual machine operating system, and a new VCPU is created for the virtual machine operating system, thereby achieving the technical effect of directly creating a new VCPU for the virtual machine operating system running after the switching, and solving the technical problem that a new VCPU cannot be directly created for the running operating system.

[0019] It is easy to note that the general description above and the detailed description below are merely for the purpose of exemplifying and explaining the present disclosure, and do not constitute a limitation on the present disclosure. BRIEF DESCRIPTION OF DRAWINGS

[0020] The drawings described herein are intended to provide further understanding of the present disclosure, form a part of the present disclosure, and the illustrative embodiments of the present disclosure and the description thereof serve to explain the present disclosure, and do not constitute an improper limitation on the present disclosure. In the drawings:

[0021] Fig. 1 is a hardware structure block diagram of a computer terminal (or mobile device) for implementing a virtual processor creation method according to an embodiment of the present disclosure;

[0022] Fig. 2 is a structure block diagram of a computing environment according to an embodiment of the present disclosure;

[0023] Fig. 3 is a flowchart of a virtual processor creation method according to an embodiment of the present disclosure;

[0024] Fig. 4 is a flowchart of a virtual processor online method according to an embodiment of the present disclosure;

[0025] Fig. 5 is a flowchart of a virtual processor running method according to an embodiment of the present disclosure;

[0026] Fig. 6 is a flowchart of a virtual processor offline method according to an embodiment of the present disclosure;

[0027] Fig. 7(a) is a schematic diagram of a virtual processor creation system according to an embodiment of the present disclosure;

[0028] Fig. 7(b) is a flowchart of a virtual CPU creation method of a lightweight virtualization architecture according to an embodiment of the present disclosure;

[0029] Fig. 7(c) is a flowchart of a virtual CPU online method of a lightweight virtualization architecture according to an embodiment of the present disclosure;

[0030] Fig. 7(d) is a flowchart of a virtual CPU running method of a lightweight virtualization architecture according to an embodiment of the present disclosure;

[0031] Fig. 7(e) is a flowchart of a virtual CPU offline method of a lightweight virtualization architecture according to an embodiment of the present disclosure;

[0032] Fig. 8 is a structure block diagram of a service mesh according to an embodiment of the present disclosure;

[0033] Fig. 9 is a schematic diagram of a virtual processor creation apparatus according to an embodiment of the present disclosure;

[0034] Fig. 10 is a schematic diagram of an online device of a virtual processor according to an embodiment of the present disclosure;

[0035] Fig. 11 is a schematic diagram of a running device of a virtual processor according to an embodiment of the present disclosure;

[0036] Fig. 12 is a schematic diagram of an offline device of a virtual processor according to an embodiment of the present disclosure;

[0037] Fig. 13 is a structural block diagram of a computer terminal according to an embodiment of the present disclosure;

[0038] Fig. 14 is a block diagram of an electronic device of a creation method of a virtual processor according to an embodiment of the present disclosure. DETAILED DESCRIPTION

[0039] In order to make the person skilled in the art better understand the present disclosure scheme, the technical solutions in the embodiments of the present disclosure will be clearly and completely described below in conjunction with the drawings in the embodiments of the present disclosure. Obviously, the described embodiments are only a part of the embodiments of the present disclosure, not all. Based on the embodiments in the present disclosure, all other embodiments obtained by those skilled in the art without creative labor should be within the scope of protection of the present disclosure.

[0040] It should be noted that the terms "first", "second" and the like in the specification and claims of the present disclosure and the above-described drawings are used to distinguish similar objects, and do not necessarily indicate a specific order or a chronological sequence. It should be understood that the data thus used can be interchanged under appropriate circumstances, so that the embodiments of the present disclosure described herein can be implemented in an order other than that illustrated or described herein. In addition, the terms "include" and "have" and any variations thereof are intended to cover non-exclusive inclusion, for example, a process, method, system, product or device including a series of steps or components does not have to be limited to those steps or components clearly listed, but can include other steps or components not clearly listed or inherent to these processes, methods, products or devices.

[0041] First, some nouns or terms that appear in the description of the embodiments of the present disclosure are applicable to the following explanations:

[0042] Central processor management can refer to the process of scheduling and managing CPU in a computer by an operating system, which allocates different tasks to CPU for execution by the operating system, and decides the execution order of the tasks according to the rules of priority and time slice, so as to realize multi-task processing;

[0043] Lightweight can refer to a system or software that is relatively small in resource occupation, high in running efficiency, relatively simple in function, or has special purpose;

[0044] Memory management can refer to the process of operating system effectively allocating and managing computer memory, allocating memory space for different programs and processes through the operating system, and monitoring memory usage to avoid memory leaks and fragmentation, etc.

[0045] Virtualization can refer to the process of running different operating systems and applications independently by using virtualization technology.

[0046] Operating system (Linux) kernel can be the core component of Linux operating system, which is set to manage computer hardware resources, process scheduling, file system and other basic functions.

[0047] According to the embodiments of the present disclosure, a method for creating a virtual processor is provided. It should be noted that the steps shown in the flowchart of the accompanying drawings can be executed in a computer system such as a set of computer executable instructions, and although the logical order is shown in the flowchart, in some cases, the steps shown or described herein can be executed in a different order.

[0048] The method provided by the embodiment of the present disclosure can be executed in a mobile terminal, a computer terminal or a similar computing device. FIG. 1 is a hardware structure block diagram of a computer terminal (or mobile device) for implementing a method for creating a virtual processor according to an embodiment of the present disclosure. As shown in FIG. 1, the computer terminal 10 (or mobile device) can include one or more (in the figure, 102a, 102b, …, 102n are used to show) processors 102 (the processor 102 can include but not limited to a processing device such as a microcontroller unit (MCU) or a field-programmable gate array (FPGA)), a memory 104 for storing data, and a transmission component 106 for communication function. In addition, it can also include a display, an input / output interface, a universal serial bus (USB) port (which can be included as one of the ports in the bus), a network interface, a power supply and / or a camera. Those skilled in the art can understand that the structure shown in FIG. 1 is only schematic, which does not limit the structure of the above-mentioned electronic device. For example, the computer terminal 10 can include more or less components than those shown in FIG. 1, or have a different configuration from that shown in FIG. 1.

[0049] It should be noted that the one or more processors 102 and / or other data processing circuitry described above can be generally referred to herein as "data processing circuitry." The data processing circuitry can be embodied in whole or in part as software, hardware, firmware, or any combination thereof. In addition, the data processing circuitry can be a single standalone processing component or incorporated in whole or in part within any of the other elements of the computer terminal 10 (or mobile device). As referred to in the embodiments of the present disclosure, the data processing circuitry functions as a processor to control, for example, selection of the variable resistance terminal path connected to the interface.

[0050] The memory 104 can be used to store software programs and components of applications, as well as program instructions / data storage means corresponding to the methods of the embodiments of the present disclosure. The processor 102 can execute various functional applications and data processing by running the software programs and components stored in the memory 104, i.e., implement the methods of the embodiments described above. The memory 104 can include a high-speed random access memory, and can further include a non-volatile memory such as one or more magnetic storage devices, flash memory, or other non-volatile solid-state memory. In some examples, the memory 104 can further include a memory disposed remotely with respect to the processor 102, which can be connected to the computer terminal 10 through a network. Examples of the network can include, but are not limited to, the Internet, an intranet, a local area network, a mobile communication network, and combinations thereof.

[0051] The transmission device 106 is configured to receive or send data via a network. Specific examples of the network can include a wireless network provided by a communication provider of the computer terminal 10. In one example, the transmission device 106 includes a network adapter (NIC) that can be connected to other network devices through a base station to communicate with the Internet. In one example, the transmission device 106 can be a radio frequency (RF) component configured to communicate with the Internet in a wireless manner.

[0052] The display can be, for example, a touch screen type liquid crystal display (LCD) that can enable a user to interact with the user interface of the computer terminal 10 (or mobile device).

[0053] FIG. 1 illustrates a hardware architecture diagram that can be used as an example of the computer terminal 10 (or mobile device) described above, as well as an example of the server described above. In an alternative embodiment, FIG. 2 illustrates an embodiment of a computing environment 201 that uses the computer terminal 10 (or mobile device) of FIG. 1 as a computing node in the computing environment 201. FIG. 2 is a block diagram of a computing environment according to an embodiment of the present disclosure. As shown in FIG. 2, the computing environment 201 includes a plurality of computing nodes (e.g., servers) (shown as 210-1, 210-2,..., 210-N) running on a distributed network. The computing nodes each include local processing and memory resources, and end users 202 can remotely run applications or store data in the computing environment 201. Applications can be provided as a plurality of services 220-1, 220-2, 220-3, and 220-4 in the computing environment 201, representing services “A”, “D”, “E”, and “H”, respectively.

[0054] The end users 202 can provide and access the services through a web browser or other software application on a client device, and in some embodiments, the provisioning and / or requests of the end users 202 can be provided to an ingress gateway 230. The ingress gateway 230 can include a corresponding proxy to handle the provisioning and / or requests for the services (one or more of the services provided in the computing environment 201).

[0055] The services are provided or deployed according to various virtualization technologies supported by the computing environment 201. In some embodiments, the services can be provided according to virtual machine (VM)-based virtualization, container-based virtualization, and / or the like. VM-based virtualization can emulate a real computer by initializing a virtual machine to execute programs and applications without directly accessing any actual hardware resources. While the virtual machine is virtualized, according to container-based virtualization, a container can be launched to virtualize an entire operating system (OS) so that multiple workloads can run on a single OS instance.

[0056] In an embodiment of container-based virtualization, several containers of a service can be assembled into a Pod (e.g., a Kubernetes Pod). For example, as shown in FIG. 2, the service 220-2 can be equipped with one or more Pods 240-1, 240-2,..., 240-N (collectively, Pods). The Pods can include a proxy 245 and one or more containers 242-1, 242-2,..., 242-M (collectively, containers). The one or more containers in the Pods handle requests related to one or more corresponding functions of the service, and the proxy 245 generally controls network functions related to the service, such as routing, load balancing, and the like.

[0057] During operation, performing a user request from the end user 202 can require invoking one or more services in the computing environment 201, performing one or more functions of a service can require invoking one or more functions of another service. As shown in FIG. 2, service "A" 220-1 receives a user request from the end user 202 from the entry gateway 230, service "A" 220-1 can invoke service "D" 220-2, service "D" 220-2 can request service "E" 220-3 to perform one or more functions.

[0058] The computing environment described above can be a cloud computing environment, the allocation of resources is managed by a cloud service provider, allowing the development of functions without considering the implementation, adjustment or expansion of servers. The computing environment allows developers to execute code in response to events without building or maintaining complex infrastructure. Services can be split into a set of functions that can automatically scale independently, rather than expanding a single hardware device to handle potential loads.

[0059] In the above running environment, the present disclosure provides a method for creating a virtual processor as shown in FIG. 3, wherein the virtual processor can be a virtual central processor of a lightweight virtualization architecture. FIG. 3 is a flow chart of a method for creating a virtual processor according to an embodiment of the present disclosure, as shown in FIG. 3, the method can include the following steps:

[0060] Step S302, during the process of running a host operating system in a host machine, an extended page table is created, wherein the host operating system is to be switched to a virtual machine operating system, and the extended page table is used to represent the mapping relationship between the physical address of the virtual machine operating system and the real physical address.

[0061] In the technical solution provided in step S302 of the present disclosure, the host machine can refer to a physical server or host machine running virtualization software, and can be used to manage the creation, start, stop and destruction of virtual machines, and can be used to allocate hardware resources to different virtual machines. The host machine operating system is to be switched to a virtual machine operating system, so the host machine operating system can be the operating system before switching, and the virtual machine operating system can be the operating system after switching. An extended page table (EPT) is used to represent the mapping relationship between the physical address of the virtual machine operating system and the real physical address, and can be used to provide an additional page table layer between the virtual machine and the operating system. The mapping can be modified without interrupting the running operating system through the extended page table, so as to improve the memory management and performance in the virtualization environment. The host machine operating system can be a running operating system. The inventory can refer to the total number or set of system instances that have been deployed and are running. The virtual machine operating system can also be referred to as a guest operating system. The real physical address can be the physical address of the real memory, which can be the host machine real physical address or the physical address of the host machine.

[0062] Optionally, during the creation of the virtual processor, an EPT page table that one-to-one maps between the physical address (GPA) of the virtual machine operating system and the real physical address (HPA) of the host machine can be established for the running host machine.

[0063] Optionally, after the host machine operating system is switched to the virtual machine operating system, the host machine operating system no longer exists, and only the newly inserted virtualization management layer exists. The real physical resources are taken over by the virtualization management layer. The real memory corresponding to the virtual machine operating system can be determined by using the EPT page table, so as to ensure that the virtual machine operating system can correctly access the corresponding resources. It should be noted that the real physical address exists before and after the switching of the operating system.

[0064] For example, when it is necessary to switch the host machine operating system to the virtual machine operating system, an extended page table can be created, and the mapping relationship between the GPA and the HPA can be determined through the extended page table, so that when the virtual machine operating system is running, the virtual machine operating system can correctly map and access the corresponding resources and hardware.

[0065] Optionally, during the running of the host machine operating system by the host machine, an EPT page table that one-to-one maps between the GPA and the HPA can be established.

[0066] In step S304, a data structure is created based on the extended page table, wherein the data structure includes attribute information required by the virtual machine operating system.

[0067] In the technical solution provided in step S304 of the present disclosure, the data structure can be a virtual machine control structure (VMCS), which is a data structure used to manage and control the virtual machine operating system in virtualization technology, and can include various control information when the virtual machine operating system is running, and can be used to control the execution of the virtual machine operating system and manage the state of the virtual machine operating system.

[0068] Optionally, the data structure can include attribute information required by the virtual machine operating system, such as state information, execution control information, access control information, context information, and the like of the virtual machine operating system. Through the data structure, the execution process of the virtual machine operating system can be effectively managed, such as the parsing of instructions, the access of memory, the processing of interrupts, and the like. Through the data structure, the virtual machine operating system can be created and managed on the host computer to achieve safe, efficient, and reliable operation of the virtualization environment.

[0069] Optionally, in order to ensure that the virtual machine operating system can correctly access real resources and hardware, and at the same time ensure that the running environment of the virtual machine operating system is stable and safe, an extended page table can be created during the running of the host operating system, through which the mapping from GPA to HPA can be determined, and the extended page table can be used to switch the host operating system to the corresponding virtual machine operating system. Further, in order to ensure that the virtual machine operating system can run in a correct environment, a data structure can be created based on the created extended page table, and the data structure can include attribute information required by the virtual machine operating system, which can include configuration parameters of the virtual machine operating system, operating system version, memory allocation, network settings, and the like.

[0070] For example, assuming that a virtual machine software is installed on a host computer running a host operating system, and a user wants to run an operating system in the virtual machine, when creating the virtual machine operating system, an extended page table can be created to represent the mapping from GPA to HPA. Further, a data structure can be created based on the created extended page table, and the data structure can include attribute information required by the virtual machine operating system when running, such as configuration parameters (CPU core number, memory size, etc.), operating system version, network settings, and the like of the virtual machine operating system.

[0071] In step S306, the host operating system is switched to the virtual machine operating system based on the attribute information in the data structure.

[0072] In the technical solution provided in the step S306 of the present disclosure, the data structure can contain attribute information of the virtual machine operating system, which can include configuration parameters, operating system version, memory allocation, etc. of the virtual machine operating system. Therefore, the host operating system can be switched to the virtual machine operating system according to the user's demand and configuration through the attribute information in the data structure, so as to achieve the purpose of controlling the host to run the virtual machine operating system.

[0073] Optionally, assuming that the host operating system is running, an extended page table can be created in the memory of the host, and the extended page table is used to enable the virtual machine operating system to correctly redirect access to the actual physical memory. Further, a data structure can be constructed based on the extended page table, which can contain various attribute information required for the virtual machine operating system to run. Based on the attribute information in the data structure, the host can be controlled to run the virtual machine operating system.

[0074] Optionally, the embodiment creates an extended page table, constructs a data structure based on the extended page table, and uses the attribute information in the data structure to switch the host operating system to the virtual machine operating system, thereby achieving the purpose of switching the host operating system running in the host to a virtualization mode. Further, in the virtualization mode, the host operating system can be controlled to switch to the virtual machine operating system.

[0075] For example, the data structure stores configuration information and running state of the virtual machine operating system. For example, the data structure can include: resources allocated to the virtual machine operating system, running state of the virtual machine operating system, network interface and address information of the virtual machine operating system, and extended page table information of the virtual machine operating system. Based on the attribute information in the data structure, the host operating system can be switched to the virtual machine operating system. Further, resources can be allocated to the virtual machine operating system from the resource pool of the host according to the attribute information in the data structure. If the state of the virtual machine operating system shows that it is paused, the virtual central processing unit (VCPU) will not be scheduled to the virtual machine operating system.

[0076] In step S308, a virtual processor is created for the virtual machine operating system.

[0077] In the technical solution provided in the step S308 of the present disclosure, the virtual processor can be a virtual central processing unit, which can be used to represent computing resources allocated to the virtual machine operating system in the virtualization environment, such as CPU resources configured for the functional group process.

[0078] Optionally, in a physical computer, the central processing unit is the core component that performs most computing tasks, while in a virtualization environment, the physical processor of the host is divided by virtualization software into multiple virtual processors for use by multiple virtual machine operating systems.

[0079] In a production environment, the scheduling of VCPU is relatively flexible, and can be dynamically adjusted according to the actual system running condition, so it can be envisaged that the CPU resources configured for processes of different function groups are set on the VCPU, so as to dynamically optimize the actual resource usage in the actual running according to the actual monitoring data. However, for the running host operating system, it is not possible to directly create a new VCPU, so it is not possible to use the above method to perform more fine-grained scheduling, and therefore there is a technical problem that it is not possible to directly create a new VCPU in the running host operating system. In this embodiment, to solve the above problem, an extended page table is created during the running of the host operating system by the host, and by using the extended page table, the virtual monitor can dynamically modify the mapping of the virtual memory of the virtual machine operating system to the real physical memory when the virtual machine operating system is running, without the need for frequent context switching or flushing of the translation lookaside buffer. By setting the extended page, the memory access of the virtual machine operating system can be directly mapped to the real physical memory, and in this embodiment, based on the extended page table creation data structure, the management and control of the virtual machine operating system are effectively completed by the attribute information stored in the data structure. Based on the above data structure, the running state of the virtual machine can be monitored and controlled in real time, and when it is necessary to increase the virtual processor, more physical processor time slices can be dynamically allocated to the virtual machine operating system according to the configuration of the virtual machine operating system recorded in the data structure, so as to realize dynamic increase of the virtual processor.

[0080] Optionally, in this embodiment, during the running of the virtual machine operating system by the host, additional virtual processors can be created on the host as needed. The virtual processor can be scheduled on the physical processor of the host. Through the ability of dynamically creating a virtual processor in this embodiment, more computing resources can be obtained on demand without the need to restart the virtual machine or the host.

[0081] Optionally, when it is necessary to perform virtualization switching on the running host operating system, the host operating system can be switched to a virtual machine operating system. It needs to be made clear that in the lightweight virtualization architecture in this disclosure, the host operating system is only switched to a virtual machine operating system, and there are not two operating systems.

[0082] In the process that the host machine runs the host operating system, the extended page table is created through the above steps S302 to S308, wherein the host operating system is to be switched to the virtual machine operating system, and the extended page table is used to represent the mapping relationship from the physical address of the virtual machine operating system to the real physical address; the data structure is created based on the extended page table, wherein the data structure includes attribute information required by the virtual machine operating system to run; the host operating system is switched to the virtual machine operating system based on the attribute information in the data structure; and the virtual processor is created for the virtual machine operating system. That is, in the embodiment of the present disclosure, the extended page table is created, the data structure is constructed based on the extended page table, and the host operating system running is switched to the virtual machine operating system by using the attribute information in the data structure, so as to achieve the purpose of switching the host operating system running by the host machine to the virtualization mode, in which the host operating system is controlled to be switched to the virtual machine operating system and a new VCPU is created for the virtual machine operating system, thereby achieving the technical effect of directly creating a new VCPU for the virtual machine operating system running after switching, and solving the technical problem that a new VCPU cannot be directly created for the running operating system.

[0083] The above method of the embodiment will be further introduced below.

[0084] As an optional implementation, the step S308 of creating the virtual processor for the virtual machine operating system includes: receiving a creation instruction, wherein the creation instruction is used to request to create the virtual processor; and in response to the creation instruction, calling a creation interface to create the virtual processor for the virtual machine operating system.

[0085] In the embodiment, the above creation instruction can be an instruction of creating the virtual processor, can be used to request to create the virtual processor, and can be created by a user of the host machine.

[0086] Optionally, in the process that the host machine runs the virtual machine operating system, the creation instruction sent by the user can be obtained through the creation interface of the virtual processor provided externally, and the virtual processor can be created for the virtual machine operating system by calling the creation interface in response to the obtained creation instruction.

[0087] In the virtualization scenario, the virtual processors corresponding to the virtual machine operating system are usually preset when created, and the number of the virtual processors of the virtual machine operating system cannot be dynamically adjusted during use. In this embodiment, in order to dynamically increase the number of the virtual processors during the running of the virtual machine operating system, a creation instruction triggered by the administrator through the virtualization management interface can be acquired, for example, the creation instruction can be "dynamically create a virtual processor for the virtual machine operating system". In response to the acquired creation instruction, additional computing resources in the resource pool of the host can be allocated through the creation interface of the virtual processor, and the additional computing resources are mapped as a new virtual processor, so as to achieve the purpose of creating a virtual processor for the virtual machine operating system.

[0088] As an optional implementation, in response to the creation instruction, the creation interface is called to create a virtual processor for the virtual machine operating system, including: in response to the creation instruction, identification information of the virtual processor to be created is determined; and based on the identification information of the virtual processor, the creation interface is called to create a virtual processor for the virtual machine operating system.

[0089] In this embodiment, the identification information can be a number or a serial number of the virtual processor to be created, can be processor identity information (Central Processing Unit Identification, CPU Id for short), and can be used to distinguish different virtual processors.

[0090] For example, the creation instruction is acquired, in response to the creation instruction, the identification information of the virtual processor is determined, for example, the number of the virtual processor to be created is determined to be 2, and the virtual processor is associated with the virtual machine operating system, the memory mapping is updated to ensure that the newly created virtual processor can access the memory space of the associated virtual machine operating system, and the number of the virtual processor in the data structure of the associated virtual machine operating system is updated, for example, from 2 to 3. Further, based on the identification information, the creation interface can be called to create the virtual processor.

[0091] Optionally, when the creation instruction of creating a virtual CPU sent by the user is acquired, the number of the virtual processors currently corresponding to the virtual machine operating system can be checked, and then the number after the virtual processor with the largest current number is confirmed as the identification information of the virtual processor to be newly created. Based on the identification information of the virtual processor, the creation interface of the virtual processor provided externally can be called to create a virtual processor for the host. It should be noted that the method of determining the identification information herein is only for illustration and is not limited in a specific manner.

[0092] Through the above steps, a new virtual processor is successfully created on the host computer, and the above process is transparent, and the virtual machine operating system can schedule the new virtual processor, thereby improving the computing power and performance of the virtual machine. The embodiment provides a creation interface of a virtual processor to the outside, provides high flexibility and scalability for the virtualization environment, and enables a user to dynamically adjust the computing resources of a virtual computer according to needs to cope with changing workload requirements.

[0093] For example, a creation instruction for creating a virtual processor sent by a user through a virtualization management interface or an application programming interface (API) is acquired, and in response to the creation instruction, the number of virtual processors currently existing in the virtual machine operating system can be determined by checking internal data structures or configuration information. Based on the number of current virtual processors, an unused id can be selected as the identification information of the virtual processor to be created. For example, a number after the serial number or number of the current largest virtual processor can be determined as the identification information of the virtual processor to be created. It should be noted that the manner of constructing the identification information is only for illustration, and is not limited herein. Further, once the identification information of the virtual processor to be created is determined, a creation interface can be called to create a new virtual processor. The creation interface can be a software-level function or method, which can be used to process low-level details of virtual processor creation, such as determining the part of the physical processor resources of the host computer that can be allocated to the newly created virtual processor, and determining the memory space accessible to the newly created virtual processor.

[0094] As an optional implementation, creating a virtual processor for the virtual machine operating system based on the identification information of the virtual processor includes: acquiring a processor registration function; and calling the creation interface to run the processor registration function to register the virtual processor corresponding to the identification information for the virtual machine operating system.

[0095] In this embodiment, the processor registration function can be a registration function of the operating system, which can be referred to as a CPU registration function, and can be used to notify that a new virtual processor has joined the system.

[0096] Optionally, the processor registration function can be run through the creation interface to feed back the identification information of the virtual processor to be created to the virtual machine operating system. After receiving the identification information, the virtual machine operating system can update the data structure of the virtual machine operating system to reflect the existence of the new virtual processor, and add the new virtual processor to the scheduling queue, so as to achieve the purpose of registering the virtual processor corresponding to the identification information in the virtual machine operating system running on the host computer.

[0097] Optionally, the processor registration function is acquired, and the current new identification information representing the virtual processor is registered into the virtual machine operating system through the processor registration function.

[0098] As an optional implementation, in response to the creation instruction, the identification information of the virtual processor to be created is determined, including: in response to the creation instruction, the identification information of an existing processor in the host computer is determined; and the identification information of the virtual processor is determined according to the identification information of the existing processor, wherein the identification information of the virtual processor and the identification information of the existing processor satisfy an arrangement order rule.

[0099] In this embodiment, in response to the acquired creation instruction, the identification information of the existing processor in the host computer can be determined, and the identification information of the virtual processor can be determined according to the identification information of the existing processor, for example, a number at a next position of the identification information of the existing processor can be determined as the identification information of the virtual processor.

[0100] It should be noted that the above method for determining the identification information of the virtual processor is only for illustration and is not limited herein.

[0101] Optionally, when the creation instruction for creating a virtual CPU sent by the user is acquired, the identification information of the existing processor in the current host computer can be checked, and the identification information herein can be used to represent the number of the existing processor, or can be a serial number of the existing identification information, for example, 1, 2, etc. It should be noted that this is only for illustration and the form of the identification information of the existing processor is not limited herein. After the identification information of the existing processor is determined, the serial number after the processor with the largest current serial number is confirmed as the identification information of the virtual processor to be newly created.

[0102] As an optional implementation, the method can further include: simulating the identification information of the virtual processor to obtain simulated identification information, wherein the simulated identification information is used for trap processing of the virtual machine; and linking the simulated identification information to an identification information linked list of the virtual processor, and using the identification information linked list to perform trap processing on the virtual machine.

[0103] In this embodiment, for the virtual processor, the identification information thereof also needs to be simulated to ensure that the virtual machine operating system can correctly identify and use the virtual processor. For this purpose, an identification information linked list of the virtual processor containing multiple virtual processors can be created, and the identification information (CPU Id) linked list can be a linked list of the corresponding virtual processor under the VCPU structure.

[0104] Optionally, the trap processing of the virtual processor can refer to that when some specific events or conditions occur, the virtual processor triggers a trap processing to transfer the control to the virtual machine monitor (VMM), so that the monitoring and management of the virtual machine operating system can be completed. The trap processing can include the start and stop of the virtual machine operating system, the pause and resume of the virtual machine operating system, the migration of the virtual machine operating system, etc. Through the trap processing, the management and control of the virtual machine operating system can be completed to ensure the normal operation of the virtual machine operating system.

[0105] Optionally, for the virtual processor, the identification information thereof also needs to be simulated to obtain simulated identification information, through which the trap processing of the virtual machine operating system can be performed. For this purpose, an entry of the simulated identification information of the virtual processor can be created, and the simulated identification information (such as an initial simulated value) corresponding to the entry can be set. Further, the simulated identification information can be linked to the CPU Id linked list under the VCPU structure for subsequent use in the trap processing, that is, the virtual machine can be trapped by using the identification information linked list.

[0106] Optionally, the identification information of the virtual processor is simulated to obtain simulated identification information, which can include some characteristics and attributes of the virtual processor, such as the processor model, the supported instruction set, etc. It needs to be noted that the content contained in the simulated identification information is not limited specifically. After obtaining the simulated identification information, the simulated identification information can be linked to the identification information linked list of the virtual processor. In this way, if the trap processing is needed during the execution of the virtual machine, the corresponding processing can be performed according to the simulated identification information in the linked list.

[0107] For example, assuming that a virtual processor needs to be trapped, the identification information of the virtual processor can be simulated according to the characteristics and attributes of the virtual processor, such as the specified processor model, the supported instruction set, etc. The simulated identification information can be linked to the identification information linked list of the virtual processor. When the virtual processor needs to be trapped during the execution, the processing can be accurately performed according to the information in the identification information linked list to ensure that the virtual processor can operate normally.

[0108] As an optional implementation, in step S306, the attribute information includes register data required by the virtual processor running in the non-root mode, and switching the host operating system to the virtual machine operating system based on the attribute information in the data structure includes: switching the physical processor in the running state in the host to the virtual processor running in the non-root mode by using the register data; and switching the host operating system to the virtual machine operating system by using the virtual processor running in the non-root mode.

[0109] In this embodiment, by using the created data structure, a physical processor running in the host machine can be switched to a virtual processor running in a non-root mode, so that the running host machine enters a virtualization mode; by using the virtual processor running in the non-root mode, the host operating system can be controlled to switch to the corresponding virtual machine operating system. The physical processor can be a hardware component in a computer system, and can be a central processing unit. In a virtualization environment, the physical processor can be used to provide computing resources for a virtual machine.

[0110] Optionally, in the non-root mode, the virtual processor can execute instructions of the operating system in the host machine, but is controlled and managed by the virtual machine monitor. The virtual machine monitor can handle trap-in and trap-out operations of the virtual processor, as well as resource scheduling and monitoring of the virtual machine. The virtual processor in the non-root mode can access virtualized resources, such as virtualized memory, input / output devices, etc., and is also managed and controlled by the virtual machine monitor for the virtual machine operating system. By running the virtual processor in the non-root mode, isolation and management of the virtual machine operating system can be achieved, and the security and stability of the virtualization environment can be ensured.

[0111] In this embodiment, the attribute information can include register data required by the virtual processor running in the non-root mode, and the register data can be used to control the host machine to switch to the virtual processor running in the non-root mode.

[0112] For example, assuming that there is a virtualization platform in which a host machine is running a physical processor, when the physical processor is to be switched to a virtual processor running in a non-root mode by a virtualization technology so as to control a virtual machine operating system running on the virtual processor, a virtual machine monitor (VMM) for managing and controlling the virtual machine operating system and the virtual processor in the virtualization environment can be written, in which a data structure of the virtual machine operating system can be created based on an extended page table, and the data structure can include configuration information, control information and state information of the virtual processor, etc. By setting the data structure, execution of the virtual machine operating system can be controlled and the state of the virtual machine operating system can be managed. The physical processor running in the host machine can be switched to the virtual processor running in the non-root mode by setting a configuration instruction of the data structure, intercepting the configuration, setting an exit processing function, etc. Once the switching is completed, the physical processor becomes the virtual processor and runs in the non-root mode. Further, the virtual machine operating system running on the virtual processor running in the non-root mode can be controlled. By managing and controlling the virtual processor, monitoring, resource scheduling, performance optimization, etc. of the virtual machine operating system can be achieved. Through the above steps, the physical processor running in the host machine can be switched to the virtual processor running in the non-root mode, and control of the virtual machine operating system running on the virtual processor is achieved, so that the flexibility and resource utilization of the system are improved, and the purpose of managing and controlling the virtual machine operating system is achieved.

[0113] Optionally, when the VCPU is newly created, the VCPU can be configured with attributes.

[0114] As an optional implementation, the structure of the virtual processor running in the non-root mode is the same as that of the virtual processor created to the host machine.

[0115] In this embodiment, the virtual processor to be created can be applied with a structure identical to that of the virtual processor running in the non-root mode. Since the structure of the virtual processor running in the non-root mode is the same as that of the virtual processor created to the host machine, a unified management interface and control method can be used by the same structure definition, so as to simplify the operation of managing and monitoring the virtual processor, and the developer only needs to be familiar with the definition and operation mode of one structure, thereby reducing the complexity of code writing and debugging, further improving the running and scheduling efficiency of the subsequent virtual processor, and solving the technical problem of low running and scheduling efficiency of the virtual processor.

[0116] Optionally, keeping the same structure of the virtual processor in the non-root mode and the root mode can make the management and control in the virtualization environment more consistent and unified, thereby simplifying the management and maintenance of the virtual processor and reducing the development and maintenance costs. The consistency of the structure of the virtual processor can enhance the portability of the system, making it easier and more convenient to deploy and migrate the virtual machine operating system on different hardware platforms. In this way, the flexibility and scalability of the system can be improved. That is, keeping the same structure of the virtual processor running in the non-root mode and the virtual processor created to the host can help simplify the management and maintenance, improve the portability, performance and efficiency of the system, thereby optimizing the operation and management of the virtualization environment.

[0117] As an optional implementation, the step S304 of creating the data structure based on the extended page table includes: determining the virtual processor in the running state in the host; and creating the data structure based on the virtual processor in the running state and the extended page table.

[0118] In this embodiment, the step of creating the data structure can include the following steps: determining the virtual processor in the running state in the host, and further establishing the extended page table to represent the mapping from the GPA to the HPA. For each virtual processor in the running state, a data structure can be created, which can include the attribute information required for the virtual machine operating system to run, including the running state, memory requirement, CPU usage, network configuration and other information of the virtual machine operating system. It should be noted that the above running state includes running, pause, shutdown and other states, and the type of running state is not limited.

[0119] Optionally, by constructing the obtained data structure, the relationship between the virtual processor and the host can be effectively managed and monitored, ensuring that the virtual machine operating system can run normally and meet the attribute information required for its operation, thereby helping to improve the efficiency, performance and manageability of the virtualization environment.

[0120] As an optional implementation, the step of creating the data structure based on the virtual processor in the running state and the extended page table includes: determining the storage information on the register corresponding to the virtual processor in the running state; and creating the data structure based on the storage information and the extended page table.

[0121] In this embodiment, the storage information can be the content of each register on the running virtual processor, which can include the position of the currently executed or to-be-executed instruction, the storage data, the intermediate calculation result, the parameter, the starting address of the memory area, the memory position of the data or code and other information. It should be noted that the type of storage information is only used for illustration and is not limited.

[0122] Optionally, storage information on registers corresponding to the virtual processor in the running state is determined, and a data structure is created according to the storage information and the extended page table.

[0123] For example, the contents of each register on the virtual processor in the running state on the host machine can be determined, such as the values of segment registers, instruction registers, floating point registers, control registers, and the like, to obtain the storage information on the registers. Based on the above storage information and the extended page table, a data structure can be created.

[0124] In this embodiment, the data structure is created according to the storage information and the extended page table, and the running of the virtual processor is managed and controlled through the data structure, so as to ensure that the virtual processor can correctly run in the virtualization mode and access the required resources, thereby achieving the purpose of improving the performance and manageability of the virtualization environment.

[0125] Optionally, the storage information of each register on the running virtual processor is determined, which can be used to determine the running state of the virtual processor and the like. The extended page table can be used to represent the mapping from GPA to HPA. According to the storage information in the registers and the extended page table, a data structure can be created, which can be used to represent the association between the running state of the virtual processor and the extended page table. The data structure can include the register contents, running state, control information, and the like of the virtual processor, so that the storage information in the registers of the virtual processor and the mapping relationship of the extended page table can be integrated into the created data structure, so as to ensure that the running state of the virtual processor and the memory mapping relationship can be accurately reflected.

[0126] As an optional implementation, the method can further include: setting, by using the data structure, an exit processing function to be called in a process in which the host machine runs the virtual machine operating system, wherein the exit processing function is used to make the virtual machine operating system exit processing.

[0127] In this embodiment, the exit processing function can also be set, and through the exit processing function, the virtual machine operating system can exit processing. The above exit processing function can include an extended page table violation processing function, which can be used to handle abnormal situations or specific events in the running process of the virtual machine operating system, and can be used to ensure the normal running of the virtual machine operating system and the stability of the system. For example, the exit processing function can include an extended page table page fault processing function.

[0128] Optionally, in the virtualization environment, the configuration information such as attribute information can be intercepted through the configuration instruction of the data structure to obtain the data structure. By using the data structure, the exit processing function can be set, and through the exit processing function, the virtual machine operating system can exit processing.

[0129] Optionally, the exit processing function can be defined in advance, that is, the processing code required to be executed when a specific event or exception occurs during the running of the virtual machine can be determined, and a field can be added in the data structure to store a pointer or function handle pointing to the exit processing function. During the running of the virtual machine, the exit processing function can be called when a specific event or exception occurs as required. The exit processing function can process the specific event or exception, for example, the resource release, error processing, state recovery, and the like.

[0130] In this embodiment, the exit processing function is reasonably set by using the data structure, and the exit processing function is set to ensure that the virtual machine operating system can perform more detailed and flexible control on various events and exceptions during the running, improve the performance and efficiency of the virtual machine operating system, and enhance the security of the virtual machine operating system. The exit processing function described above is used to process some specific events or exceptions occurring in the virtual machine, which causes the virtual machine operating system to exit to the VMM for processing. The situations can include the execution of privileged instructions, the access to I / O devices, the occurrence of exceptions, and the like. The processing situations of the exit processing function are not limited specifically herein.

[0131] For example, there is a structure body named "VM Control Block" in the data structure, which is set to manage the information of the virtual machine, and the exit processing function pointer can be included in the structure body. When the exit processing function is set, a simple exit processing function can be defined, for example, a message is printed and the running of the virtual machine operating system is ended. When the data structure of the virtual machine operating system is set, the exit processing function pointer can be pointed to the defined exit processing function. During the running of the virtual machine operating system, if the exit processing function needs to be called, the set exit processing function can be called to process the specific event or exception, so as to achieve the purpose of ensuring the normal termination of the virtual machine operating system.

[0132] In this embodiment, an exit processing function is set, so that when the virtual machine operating system accesses a real physical address, if an extended page table violation occurs, such as a case where a corresponding real physical address is not hit in the extended page table, the exit processing function can dynamically map the physical address of the virtual machine operating system to the real physical address according to the mapping relationship in the extended page table, to meet the access requirements of the virtual machine operating system to the memory. Or if a corresponding real physical address is not found in the EPT table, the page fault processing function can create a new physical page, update the page table entry, and other operations when the EPT violation occurs. That is, the embodiment sets the EPT page fault processing function corresponding to the EPT violation, so as to achieve the purpose that even if there is an EPT violation, the virtual machine operating system can normally access the memory data, thereby realizing the technical effects of improving the performance and reliability of the system.

[0133] In this embodiment, by using the data structure, the physical processor running in the host machine can be switched to a virtual processor running in a non-root mode. By using the virtual processor running in the non-root mode, the host machine can be controlled to run the corresponding virtual machine operating system. In the above manner, the virtualization of the host machine is realized, so that the host machine can run multiple virtual machine instances at the same time, and the utilization rate of hardware resources is improved. By setting appropriate data structures and exit processing functions, the running process of the virtual machine operating system can be more finely controlled and managed, and the performance and security of the virtual machine operating system are improved.

[0134] As an optional implementation, the method can further include: simulating a register corresponding to the physical processor of the host machine to obtain a virtual register, wherein the virtual processor created for the host machine is used to perform read and write operations on the virtual register.

[0135] In this embodiment, the above-mentioned register can be a register used by the virtual processor, such as a model specific register (MSR). The virtual register can be a register simulated for the physical processor, and can be a simulated register related to the virtual processor, such as a simulated model specific register.

[0136] In the virtualization environment, the virtual processor needs to be switched on different real physical processors, and the register used by the virtual processor cannot be directly accessed through a pass-through mode, but needs to be processed through simulation, such as all model specific registers in the virtual processor cannot be passed through, so when reading and writing the above-mentioned register, the register needs to be processed through a trap-out simulation mode.

[0137] Optionally, when the virtual processor accesses the register which cannot be passed through, the virtual processor can process it through a certain simulation method. For example, when the virtual CPU reads and writes the MSR register, the virtual processor can access the simulated virtual register instead of directly accessing the register of the physical CPU. Through the simulation method, the virtual processor can correctly access and operate the register when switching between different physical processors.

[0138] As an optional implementation, the method can further include linking the virtual processor to a timer linked list, where the timer linked list is used to simulate the timing operation of the virtual processor.

[0139] In this embodiment, the timer linked list can be a data structure, which can store and manage timer objects and be used to implement the timer function. Through the timer linked list, the timer can be conveniently set and canceled, and the timing operation or the execution of certain tasks can be realized. The timer linked list can be sorted according to the expiration time, so that the next expired timer can be quickly found and the corresponding operation can be performed. The timer linked list can also be used to process timing events, such as sending a heartbeat packet at a certain time, checking the resource state at a certain time, etc. The timer linked list can be a software timer linked list. The timer object can be a local advanced programmable interrupt controller (LAPIC), and the timer can include information of the timer, such as the expiration time of the timer, the timer callback function, etc.

[0140] Optionally, by linking the virtual processor to the timer linked list, the subsequent simulation of the timer expiration operation can be facilitated.

[0141] Optionally, the LAPIC timer can be a functional component in the LAPIC, which can be used to implement the timer interrupt function. By setting the LAPIC timer, a clock interrupt signal can be generated within a certain time interval, through which the timing operation or the execution of periodic tasks can be performed. In the virtualization environment, the hypervisor can simulate the LAPIC timer to realize the timing interrupt function in the virtual machine.

[0142] For example, the LAPIC timer in the virtual processor can be selected in the non-pass-through mode, the virtual processor can be linked to the global LAPIC software timer linked list, and the timer expiration processing function of the LAPIC can be set. Meanwhile, some periodic check operations can be performed in it, such as setting the virtual processor to wake up if the virtual processor chain is paused, etc. It should be noted that the operation types are only for illustration and are not limited.

[0143] In this embodiment, for the register of the virtual processor, the value of the floating point unit (FPU) and the control register (xcr0) can also be initialized additionally, so as to prepare for the subsequent switching of the register of the host operating system.

[0144] As an optional implementation, the method can further include: setting the suspension execution time and / or the stop execution time of the data structure.

[0145] In this embodiment, the suspension execution time (mwait) can be the time for suspending the running of the data structure, and the stop execution time (hlt) can be the time for stopping the execution of the data structure, so that the virtual processor can be temporarily stopped to save energy or wait for some conditions to be met before continuing the execution.

[0146] Optionally, for the corresponding data structure of the virtual processor, in addition to the basic default setting, the suspension execution time and / or the stop execution time of the data structure can also be set. By setting the above time, the time for the virtual processor to exit can be determined, so as to prevent the time slice from being wasted.

[0147] In this embodiment, the extended page table is created, the data structure is constructed based on the extended page table, and the attribute information in the data structure is used to switch the host operating system running to the virtual machine operating system, so that the purpose of switching the host operating system running by the host to the virtualization mode is achieved. In the virtualization mode, the host operating system is controlled to switch to the virtual machine operating system, and a new VCPU is created for the virtual machine operating system, so that the technical effect of directly creating a new VCPU for the virtual machine operating system running after the switching is achieved, and the technical problem that a new VCPU cannot be directly created for the running operating system is solved.

[0148] The embodiments of the present disclosure further provide an online method of a virtual processor. FIG. 4 is a flowchart of an online method of a virtual processor according to an embodiment of the present disclosure. As shown in FIG. 4, the method can include the following steps:

[0149] In step S402, a virtual processor created for a virtual machine operating system is obtained, wherein the virtual machine operating system is obtained by switching a host operating system based on attribute information in a data structure, the data structure is created based on an extended page table and includes attribute information required for the virtual machine operating system to run, and the extended page table is created in a process in which the host runs the host operating system and is used to represent a mapping relationship from a physical address of the virtual machine operating system to a real physical address.

[0150] In the technical solution provided in the foregoing step S402 of the present disclosure, in the process of switching the host operating system to the virtual machine operating system, an extended page table for mapping from GPA to HPA can be created, for example, the extended page table can record the mapping relationship between the physical address of the virtual machine operating system after switching and the real physical address before switching. Based on the extended page table, a data structure can be created, which can include attribute information required for running the virtual machine operating system, such as memory size, CPU configuration, network settings, etc. The foregoing information can be used to configure the running environment of the virtual machine operating system. According to the data structure, the host operating system can be switched to the virtual machine operating system, which can be used to ensure that the virtual machine operating system can normally run according to the set attribute information. After the host operating system is switched to the virtual machine operating system, a virtual processor can be created for the virtual machine operating system, which can simulate a real processor and can be used to set and manage resources required for running the virtual machine by the host operating system, such as CPU, memory, storage, etc. Through the foregoing steps, the host operating system is switched to the virtual machine operating system, so that it can normally run in a virtualization environment. Further, the virtual processor created through the foregoing steps can be obtained.

[0151] In step S404, the virtual processor is subjected to an online operation.

[0152] In the technical solution provided in the foregoing step S404 of the present disclosure, after the virtual processor is created, only the data structure required for running the virtual processor and the configuration are established, and the virtual processor needs to be subjected to an online operation before it starts to run directly.

[0153] Optionally, the created virtual processor is woken up by performing the online operation.

[0154] As an optional implementation, in step S404, the virtual processor is subjected to an online operation, including: in response to an interrupt operation, determining the state of the virtual processor as a pause state; initializing the virtual processor in the pause state to obtain an initialized virtual processor; and subjecting the initialized virtual processor to an online operation.

[0155] In this embodiment, when receiving the interrupt signal, the interrupt handler is triggered, and in the process of handling the interrupt operation, the state of the virtual processor is determined as the pause state, that is, the execution of the virtual processor is paused. Once the virtual processor is determined as the pause state, the initialization operation can be performed on the virtual processor in the pause state, which can include cleaning the state information of the virtual processor, resetting the registers and flag bits, etc., which can be used to ensure that the virtual processor is in an initial state. It should be noted that the above is only an example, and the manner of initializing the virtual processor is not limited. The initialized virtual processor can be put online, for example, the virtual processor can be restarted to resume execution.

[0156] Optionally, in the online process, the virtual processor can reload the previously saved state information to restore the execution state before the interrupt occurs, and continue to execute the interrupt handler or other instructions. Through the above steps, the interrupt operation can be effectively responded to, and the virtual processor can be initialized and put online, thereby ensuring that the system can correctly run and remain stable when handling the interrupt.

[0157] As an optional implementation, in response to the interrupt operation, the state of the virtual processor is determined as the pause state, including: in response to the interrupt operation, controlling the virtual processor to exit from the guest mode to the root mode; and storing the virtual processor in the root mode in the pause queue, wherein the pause queue is used to make the virtual processor in the root mode in the pause state.

[0158] In this embodiment, the virtual machine operating system can issue an interrupt signal, which can be an inter-processor interrupt (IPI), and the virtual processor responds to this inter-processor interrupt to perform an interrupt operation. When responding to the interrupt operation, the virtual machine operating system can exit to the virtualized root mode (root) processing, and further, the virtual processor in the root mode can be stored in the pause queue.

[0159] For example, the virtual machine operating system can send an inter-processor interrupt signal to notify the virtual processor that an initialization operation is needed through an inter-processor interrupt signal identified by an identifier (DM_INIT). After receiving the inter-processor interrupt signal, the virtual processor exits the current execution state and enters a virtualized root mode process. In the root mode, the virtual processor sets the current simulated startup state bit to DM_INIT to indicate that the initialization operation is received so that the subsequent operating system can correctly process the initialization operation. Meanwhile, to suspend the execution of the virtual processor, the virtual processor can be placed in a suspension queue to temporarily stop execution and wait for subsequent processing. That is, through the above steps, the operating system can send an inter-processor interrupt signal to notify the virtual processor to perform an initialization operation. After responding to the interrupt, the virtual processor enters a virtualized root mode process, sets the initialization state bit, and temporarily places itself in the suspension queue so that the operating system can correctly process the initialization operation.

[0160] As an optional implementation, initializing the virtual processor in the suspension state to obtain an initialized virtual processor includes: obtaining configuration information from a data structure corresponding to the virtual processor in the suspension state, wherein the configuration information is used to switch the virtual processor; initializing the configuration information; and in response to a startup operation, setting running information for the virtual processor including the initialized configuration information to obtain the initialized virtual processor, wherein the running information is used to run the virtual processor.

[0161] In this embodiment, the configuration information can be used to switch the virtual processor, can be configured for the VMCS used to switch the virtual processor, and can include control fields for controlling the behavior of the virtual machine operating system, state information representing the state of the host machine, and extension fields. It should be noted that the types of configuration information are only used for illustration and are not limited in particular. The startup operation can be triggered by a startup inter-processor interrupt (SIPI). The running information can be used to run the virtual processor and can include a code segment in a code segment register (CS) and a value of an instruction pointer register (RIP) at which to start running. It should be noted that the above is only used for illustration and the content of the running information is not limited in particular.

[0162] Optionally, when the virtual processor is in the suspended state, configuration information can be obtained from the data structure corresponding to the virtual processor, such as data structure configuration information for switching, which can be used to determine the state, register value, memory mapping, and the like of the virtual processor, and can be used to control the switching and running of the virtual processor. After obtaining the configuration information, the configuration information can be initialized to ensure that the virtual processor is in the correct state when starting, wherein the above initialization can include operations such as clearing old state information and setting new parameter values to ensure that the virtual processor can start normally. It should be noted that the above is only an example, and the type of configuration information and the initialization process are not limited. When a start operation (such as an SIPI signal) is received, running information such as a code segment and a starting running instruction pointer (RIP) can be set to the virtual processor of the initialized configuration information, and the above running information can be used to guide the virtual processor to start executing instructions and can be used to start the running of the virtual machine operating system. After the configuration information is initialized and the running information is set, the initialized virtual processor can be obtained.

[0163] For example, an ipi interrupt issued by the virtual machine operating system can be obtained, and the virtual processor will exit to the virtualized root mode processing in response to this interrupt. The virtual processor can set the current simulated startup state bit DM_INIT and temporarily place the virtual processor in the suspended queue. Further, the above INIT event can be processed, the configuration information for switching of the virtual processor can be initialized, and the simulated LAPIC register in the virtual processor can be reset. In processing the INIT event, the configuration information for switching of the virtual processor can be initialized, and the simulated LAPIC register in the virtual processor can be reset. Further, a DM_STARTUP ipi interrupt can be issued, which can be a start SIPI signal, and the vector of the current event can be recorded. At this time, the virtual processor is close to being able to run, and the virtual processor can be taken out of the suspended queue and started. In response to the start operation, running information can be set to the virtual processor corresponding to the initialized configuration information to obtain the initialized virtual processor. The LAPIC register can be a register in the LAPIC used to store configuration information and control interrupt processing.

[0164] As an optional implementation, after the configuration information is initialized, the method further includes setting a prohibited running identifier to the virtual processor in the suspended state, wherein the prohibited running identifier is used to prohibit the scheduler from running the virtual processor.

[0165] In this embodiment, the virtual processor in the suspended state cannot be directly run, and the run-prohibited identifier can be set for the virtual processor in the suspended state to avoid the scheduler from scheduling and running the virtual processor by mistake. The run-prohibited identifier can be an unrunnable identifier.

[0166] As an optional implementation, the online operation is performed on the initialized virtual processor, including clearing the run-prohibited identifier and performing the online operation on the initialized virtual processor.

[0167] In this embodiment, if the virtual processor has completed the initialization, the initialized virtual processor can be directly run, and the run-prohibited identifier of the initialized virtual processor can be cleared, and the online operation is performed on the initialized virtual processor.

[0168] Optionally, after the virtual processor is created, the online operation is needed to wake up the new CPU. The online operation can include the following processes: obtaining an inter-processor interrupt signal, determining the state of the virtual processor as the suspended state in response to the inter-processor interrupt signal. The inter-processor interrupt signal can notify the virtual processor in the suspended state that the initialization operation is needed. In response to the interrupt operation, the virtual processor is controlled to exit from the non-root mode of the virtual machine operating system to the root mode, and the state is set as DM_INIT. When the DM_INIT event is processed, the configuration information of the virtual processor for switching is initialized, and the simulated LAPIC register in the virtual processor is reset. In the initialization stage, the run-prohibited identifier is set for the virtual processor in the suspended state to ensure that the virtual processor will not be scheduled and executed before the initialization is completed. After the initialization of the virtual processor is completed, the DM_STARTUP interrupt is sent as a start signal, and at this time, the virtual processor approaches the runnable state and can be taken out from the suspended queue. When the DM_STARTUP event is processed, the virtual processor can preferentially identify the vector of the SIPI signal and make corresponding processing. According to the received SIPI vector value, the code segment and the memory address of the execution instruction of the virtual processor are set. After the initialization of the virtual processor is completed, the unrunnable identifier is cleared, indicating that the virtual processor can be directly run.

[0169] In this embodiment, the online virtual processor of the virtual machine operating system is obtained, the virtual machine operating system is obtained by switching the host operating system based on attribute information in a data structure, the virtual processor is used to set resources required by the host to run, the data structure is created based on an extended page table and includes attribute information required by the virtual machine operating system to run, the extended page table is created in the process that the host runs the host operating system and is used to represent a mapping relationship of a physical address of the virtual machine operating system to a real physical address, the online operation is performed on the virtual processor, and therefore, the technical effect that the new VCPU can be directly created on the running operating system is achieved, and the technical problem that the new VCPU cannot be directly created on the running operating system is solved.

[0170] The embodiment of the present disclosure further provides a running method of a virtual processor, as shown in FIG. 5, which is a flowchart of the running method of the virtual processor according to the embodiment of the present disclosure. The method can include the following steps:

[0171] In step S502, the online virtual processor of the virtual machine operating system is obtained, the virtual machine operating system is obtained by switching the host operating system based on attribute information in a data structure, the data structure is created based on an extended page table and includes attribute information required by the virtual machine operating system to run, and the extended page table is created in the process that the host runs the host operating system and is used to represent a mapping relationship of a physical address of the virtual machine operating system to a real physical address.

[0172] In the technical solution provided in the above step S502 of the present disclosure, the virtual processor is created according to the creation method of the virtual processor, and the created virtual processor is online processed through the online method of the virtual processor. Further, the online virtual processor can be obtained.

[0173] In step S504, the virtual processor is run by trapping out.

[0174] In the technical solution provided in the above step S504 of the present disclosure, after the virtual processor is online, the virtual processor can be directly run. However, for the virtual processor, the processing mode of the start register, the interrupt and the like is different, and the virtual processor needs to be run by trapping out. Therefore, after the online virtual processor is obtained, the virtual processor can be run by trapping out.

[0175] As an optional implementation, the method can further include: in the process that the virtual processor is run by trapping out, in response to entering or exiting the virtual machine operating system, obtaining a virtual register corresponding to the virtual processor; and saving and / or loading the virtual register.

[0176] In this embodiment, since the special registers (Model-Specific Register, MSR for short) of the virtual processor are not passed through, the virtual registers corresponding to the virtual processor and the MSR values of the physical processor can be acquired and saved and / or loaded in response to entering or exiting the virtual machine operating system during the process of trapping the running of the virtual processor.

[0177] Optionally, when the virtual processor traps the running, the virtual registers currently corresponding to the virtual processor can be acquired, such as virtual general registers, virtual instruction pointer registers, virtual flag registers and the like. In response to entering or exiting the virtual machine operating system, the virtual registers can be saved for subsequent recovery. When the virtual processor reenters or exits the virtual machine operating system, the virtual registers can be reloaded from the previously saved positions to recover the previous register states.

[0178] For example, when processing the trapping of the running of the virtual processor, the virtual registers corresponding to the virtual processor can be acquired before entering the virtual machine operating system, and further, the values of the registers can be saved to the memory. When the operating system needs to exit from the virtual machine operating system, the previously saved virtual registers can be acquired and loaded into the virtual processor to recover the previous register states, so as to ensure that the virtual processor can run correctly.

[0179] As an optional implementation, the trapping of the running of the virtual processor includes: in response to entering or exiting the virtual machine operating system, acquiring the virtual registers corresponding to the virtual processor; saving and / or loading the virtual registers; and trapping the running of the virtual processor after saving and / or loading the virtual registers.

[0180] In this embodiment, the processing function can be a processing function corresponding to the trapping reason, such as a processing function of the MSR.

[0181] For example, if the read-write MSR register is acquired during the running of the virtual processor by the virtual machine operating system, the processing function of the MSR corresponding to the virtual register can be determined and trapped into the processing function, so as to achieve the purpose of using the processing function to perform the read-write operation on the virtual registers in the structure of the virtual processor.

[0182] Optionally, in the process of handling the virtual processor trap running by using the virtual machine operating system, the processing function corresponding to the virtual register can be determined, through which the trap operation of the virtual processor can be completed and the read-write operation of the virtual register can be performed. For example, in the process of handling the MSR register, the corresponding MSR processing function can be trapped into to perform the read-write operation on the simulated MSR register in the structure of the virtual processor.

[0183] For example, in the process of handling the virtual processor trap running, the virtual machine operating system can determine the processing function to be called according to the type of the virtual register, for example, for the read-write operation of the MSR register, the corresponding MSR processing function can be triggered, and the above processing function can simulate the behavior of the hardware register to ensure the correct operation of the virtual register. After determining the processing function corresponding to the virtual register, the virtual machine operating system can use the processing function to perform the read-write operation on the virtual register in the structure of the virtual processor.

[0184] Optionally, when the virtual machine operating system runs the virtual processor, it can encounter a situation of reading and writing the virtual register, in which case the virtual machine operating system can trap the virtual processor into the processing function corresponding to the virtual register (such as the MSR register) to perform the operation on the virtual register. In the structure of the virtual processor, the corresponding register can be simulated, and the virtual machine operating system can perform the read-write operation on the simulated virtual register by calling the corresponding processing function, thereby controlling and managing the state of the virtual processor, thereby achieving the technical effect of controlling the virtual processor.

[0185] As an optional implementation, the method can further include: obtaining the simulated identification information corresponding to the virtual processor from the identification information chain table, wherein the simulated identification information is simulated from the identification information of the virtual processor; and performing the trap processing on the virtual machine operating system by using the simulated identification information.

[0186] In this embodiment, the identification information of the virtual processor is simulated in advance to obtain the simulated identification information, the simulated identification information corresponding to the virtual processor can be obtained from the identification information chain table, through which the virtual machine operating system to be processed can be determined, and after the simulated identification information is determined, the trap processing can be performed on the virtual machine operating system by using the simulated identification information.

[0187] Optionally, for the processing of the identification information, the virtual processor can first search the identification information chain table to find whether there is a corresponding entry, if there is, the simulated identification information can be returned, if not, the identification information of the physical processor (may also be referred to as hardware) can be read; and the query result is set to the simulated identification information returned to the register for storage, such as the simulated identification information can be returned to the extended accumulator register (Extended Accumulator Register, abbreviated as eax), the extended base register (Extended Base Register, abbreviated as ebx), the extended counter register (Extended Counter Register, abbreviated as ecx) and / or the extended data register (Extended Data Register, abbreviated as edx). It should be noted that the type of register here is only an example and is not limited.

[0188] In this embodiment, when the virtual machine operating system processes the virtual processor trap, the virtual processor corresponding simulated identification information can be obtained, and then the simulated identification information is used for trap processing, so as to ensure that the virtual machine operating system can correctly simulate the behavior of the virtual processor and perform corresponding processing operation, thereby ensuring that the virtual machine operating system can correctly process the identification information during running and provide a correct simulation environment.

[0189] As an optional implementation, the method can further include: setting the virtual processor to the corresponding virtual register, and updating the simulated identification information.

[0190] In this embodiment, since the virtual processor does not have a directly corresponding physical processor, for the operation of setting the extended control register (such as xcr0) by the instruction of the control register (such as xsetbv instruction, cr4 instruction, etc.), the physical processor needs to set it to the register field of the virtual register related to the virtual processor simulated by itself, rather than directly writing into the hardware register corresponding to the physical processor; at the same time, the simulated identification information simulated by the virtual processor can be updated. It should be noted that the above-mentioned instruction is only an example and the instruction of the processor is not limited here.

[0191] Optionally, for the processing of setting xcr0 by xsetbv instruction in the virtual CPU, since the virtual processor does not have a directly corresponding physical processor, the set xcr0 value needs to be stored in the field of the related virtual register simulated by the virtual processor, rather than directly written into the register of the physical processor. At the same time, the simulated identification information simulated by the virtual processor also needs to be updated to ensure that the processor function information related to the xcr0 setting is correctly reflected.

[0192] For example, when the virtual processor executes the xsetbv instruction to set the xcr0, the set xcr0 value can be stored into the virtualizer field of the virtual register associated with the virtual processor emulation, and the emulation identification information of the virtual processor emulation is updated to reflect the processor function information related to the xcr0 setting. Through the above steps, it can be ensured that in the virtualization environment, the virtual processor correctly handles the setting of the register related instruction and maintains the consistent state with the physical processor to ensure that the virtual machine can correctly emulate the behavior of the virtual processor.

[0193] As an optional implementation, the method can further include: in the process of trapping the virtual processor to run, in response to the virtual processor entering the virtual machine operating system, saving the host machine registers and loading the virtual machine registers; or, in the process of trapping the virtual processor to run, in response to the virtual processor exiting the virtual machine operating system, canceling the saving of the host machine registers and canceling the loading of the virtual machine registers.

[0194] In this embodiment, in the process of trapping the virtual processor to run, if the virtual processor switches into the virtual machine operating system, a plurality of host machine registers, such as fpu, xcr0, configuration address register (abbreviated as cfg_addr) and the like, can be additionally saved, and the above registers of the host machine can be loaded; conversely, in the process of trapping the virtual processor to run, if the virtual processor exits the virtual machine operating system, the opposite operation can be performed, that is, the saving of the host machine registers is canceled, and the loading of the virtual machine registers is canceled.

[0195] For example, for a virtual processor, read and write operations of the virtual processor on registers in a local advanced programmable interrupt controller (i.e., LAPIC registers) can be simulated, which can include processor priority register (ppr), interrupt command register (ICR) / ICR2 for transmitting an IPI interrupt, spurious interrupt vector (SPIV) for controlling the enable / disable state of the advanced programmable interrupt controller (APIC), and the like, as well as local vector timer thermal monitor register (LVTTHMR) triggered by a thermal sensor when an over-temperature is detected, local vector performance counter register (LVTPC) for a counter-related interrupt (e.g., a performance monitoring interrupt), LVTERR triggered by a local APIC error, local vector timer register (LVTT) for an APIC timer-related interrupt vector, timer initial count register (TMICT) for an initial count register of a timer, timer divider configuration register (TDCR) for configuring a clock division of the APIC timer, and the like. It should be noted that the read and write operations are only illustrative and are not specifically limited herein.

[0196] As an optional implementation, the method can further include: traversing a timer linked list corresponding to the virtual processor, determining whether to trigger a timer operation of the virtual processor, and in response to the triggered timer operation, executing a processing function associated with the timer linked list.

[0197] In this embodiment, the timer linked list can be a software LAPIC timer linked list, and can include at least one timer, such as a plurality of software simulation timers. It should be noted that the type of timer included in the timer linked list is not specifically limited herein.

[0198] Optionally, when the timer run by the physical processor expires, besides setting the next expiration time, the timer list corresponding to the virtual processor can be traversed to check whether the software simulation timer (which can be referred to as simulation timer) inside expires; in addition, in order to guarantee the precision of the simulation timer, the expiration time can also be checked every time the virtualization trap-out processing occurs.

[0199] Optionally, the timer list (for example, software LAPIC timer list) can be traversed to check whether the software simulation timer inside expires, so that the timer function can be realized and the timing event can be processed in time. Through the timer list, the purpose of managing multiple timers can be achieved.

[0200] In this embodiment, the expiration time and the corresponding processing function can be contained in each timer, the expiration state of the timer is checked by traversing the list, and the processing function associated with the timer list is executed in response to the triggered timing operation, so that the timing event can be triggered in time to achieve the purpose of executing the corresponding operation.

[0201] As an optional implementation, the method can further include: in response to the interrupt operation on the virtual processor, exiting the virtual processor to the manager of the virtual machine; and determining the identification information of the virtual processor as the destination address of the virtual processor in the manager.

[0202] In this embodiment, when the ipi interrupt is received, the interrupt operation on the virtual processor is performed, and in response to the interrupt operation on the virtual processor, the destination address of the virtual processor can be replaced with the identification information (apic_id) of the virtual processor registered before instead of the identification information of the currently running physical processor, so that the virtual processor can be exited to the virtual machine manager for processing.

[0203] As an optional implementation, in response to the host computer entering the virtual machine operating system, the registers of the host computer are saved; or, in response to the host computer exiting the virtual machine operating system, the saved registers of the host computer are cancelled.

[0204] In this embodiment, when the host computer switches into the virtual machine operating system again, that is, after the host computer operating system switches into the virtual machine operating system, the current registers of the host computer (such as ldtr, gs, fs, es, ds, tss, gdt, etc.) can be saved; when the host computer exits the virtual machine operating system again, the saved registers of the host computer can be cancelled; thereafter, the background scheduling of the virtualization mode can put the virtual processor into the scheduler and allocate a corresponding time slice to start running; from the perspective of the virtual machine operating system, the processor is not perceived as a virtual processor and can be directly and transparently executed. It should be noted that the types of the above-mentioned registers of the host computer are only for illustration and are not specifically limited herein.

[0205] In this embodiment, the online virtual processor is obtained, wherein the virtual processor is created in the process of controlling the host computer to run the virtual machine operating system based on attribute information in a data structure, the data structure is created based on an extended page table and includes attribute information required for running the virtual machine operating system, and the extended page table is created in the process of running the host computer operating system on the host computer and is used to represent the correspondence between the physical address of the virtual machine operating system and the real physical address. The virtual processor is run out, thereby achieving the technical effect that a new VCPU can be directly created on a running operating system and solving the technical problem that a new VCPU cannot be directly created on a running operating system.

[0206] The disclosure embodiments also provide an offline method of a virtual processor. FIG. 6 is a flowchart of an offline method of a virtual processor according to the disclosure embodiments. As shown in FIG. 6, the method can include the following steps:

[0207] In step S602, the online virtual processor of the virtual machine operating system is obtained, wherein the virtual machine operating system is obtained by switching the host computer operating system based on attribute information in a data structure, the data structure is created based on an extended page table and includes attribute information required for running the virtual machine operating system, and the extended page table is created in the process of running the host computer operating system on the host computer and is used to represent the mapping relationship between the physical address of the virtual machine operating system and the real physical address.

[0208] In the technical solution provided in the above step S602 of the disclosure, the virtual processor is created according to the creation method of the virtual processor and is online processed by the online method of the virtual processor. Further, the online virtual processor can be obtained.

[0209] In step S604, the virtual processor is offline.

[0210] In the technical solution provided in step S604 of the present disclosure, the offline operation can refer to an operation of switching the virtual processor from a running state to a stopped state.

[0211] Optionally, in the virtualization environment, the virtual processor can be dynamically started and stopped to manage resources and improve efficiency. The offline operation can be manually triggered or triggered by management software or an automated system, and the triggering manner of the offline operation is not limited here. Generally, in the offline operation, the resources of the virtual processor are released so that other virtual machine operating systems or tasks can use the resources.

[0212] As an optional implementation, in step S604, the offline operation on the virtual processor includes: setting an offline identifier of the virtual processor, wherein the offline identifier is used to indicate that the offline operation on the virtual processor is allowed; obtaining a halt instruction by using the offline identifier; and stopping execution of the virtual processor in response to the halt instruction.

[0213] In this embodiment, the offline identifier can be used to indicate that the virtual processor can no longer be accessed or used, can be recycled or cleaned up, and can be used to indicate that the offline operation on the virtual processor is allowed. The halt instruction can be used to stop the running of the virtual processor.

[0214] Optionally, when the customer performs the offline operation on the virtual CPU, it is necessary to close the interrupts, exit processes (such as idle processes), and other conventional operations of the virtual processor; however, since the current processor is a virtual processor and there is no specific physical processor to correspond to, the original other operations cannot be performed, otherwise the system can be down; therefore, the offline identifier (such as a dead flag) of the virtual processor can be set by using the stop logic of the virtual processor, and then the halt instruction loop is entered, and the virtual processor can be stopped in response to the halt instruction.

[0215] In the embodiment of the present disclosure, the online virtual processor of the virtual machine operating system is obtained, wherein the virtual machine operating system is obtained by switching the host operating system based on attribute information in a data structure, the data structure is created based on an extended page table and includes attribute information required for running the virtual machine operating system, and the extended page table is created in the process of running the host operating system on the host and is used to represent a mapping relationship between a physical address of the virtual machine operating system and a real physical address; and the offline operation is performed on the virtual processor, thereby achieving the technical effect that a new VCPU can be directly created on a running operating system and solving the technical problem that a new VCPU cannot be directly created on a running operating system.

[0216] According to the embodiment of the present disclosure, an embodiment of a virtual processor creation system is also provided. FIG. 7(a) is a schematic diagram of a virtual processor creation system according to an embodiment of the present disclosure. As shown in FIG. 7(a), the virtual processor creation system 700 can include a creation end 702, an online end 704, a running end 706, and an offline end 708.

[0217] The creation end 702 is configured to create an extended page table in a process in which a host machine runs a host operating system, wherein the host operating system is to be switched to a virtual machine operating system, and the extended page table is used to represent a mapping relationship between a physical address of the virtual machine operating system and a real physical address; create a data structure based on the extended page table, wherein the data structure includes attribute information required for running the virtual machine operating system; switch the host operating system to the virtual machine operating system based on the attribute information in the data structure; and create a virtual processor for the virtual machine operating system.

[0218] In this embodiment, the creation end 702 can create an extended page table in the memory of the host machine, and the extended page table is used to represent the mapping between the GPA and the HPA. Through the extended page table, when the virtual machine operating system accesses the virtual memory, the virtual machine operating system can correctly redirect the access to the actual physical memory. Further, a data structure can be constructed based on the extended page table, and the data structure can include various attribute information required for running the virtual machine operating system. Based on the data structure, the host operating system can be switched to the virtual machine operating system. In a process in which the host machine runs the virtual machine operating system, a virtual processor can be created for the virtual machine operating system.

[0219] The online end 704 is configured to perform an online operation on the virtual processor.

[0220] In this embodiment, after the creation end 702 creates the virtual processor, only the data structure required for running the virtual processor and the configuration are established, and the virtual processor needs to be online (Online) by the online end 704 before it can start running. The created virtual processor is woken up by performing the online operation.

[0221] The running end 706 is configured to trap out the running of the virtual processor in a scheduler.

[0222] In this embodiment, after the virtual processor is online, the virtual processor can run directly. However, the processing mode of the virtual processor, such as the start register and the interrupt, is different, and the virtual processor needs to be trapped out for running. Therefore, the running end 706 can be used to obtain the online virtual processor, and the running end 706 can be used to trap out the running of the virtual processor in the scheduler.

[0223] The offline end 708 is configured to perform an offline operation on the virtual processor.

[0224] In this embodiment, after the online operation of the virtual processor by the online terminal 704, the offline operation of the virtual processor by the offline terminal 708 can also be performed.

[0225] In this embodiment, during the process of running the host operating system by the creation terminal, an extended page table is created, wherein the host operating system is to be switched to a virtual machine operating system, and the extended page table is used to represent the mapping relationship of the physical address of the virtual machine operating system to the real physical address; a data structure is created based on the extended page table, wherein the data structure includes attribute information required for the virtual machine operating system to run; the host operating system is switched to the virtual machine operating system based on the attribute information in the data structure; a virtual processor is created for the virtual machine operating system; the virtual processor is operated online by the online terminal; the virtual processor is run out of the scheduler by the running terminal; and the virtual processor is operated offline by the offline terminal, thereby achieving the technical effect that a new VCPU can be directly created in a running operating system, and solving the technical problem that a new VCPU cannot be directly created in a running operating system.

[0226] At present, in a traditional operating system, different function groups can set the CPU range that can be used by setting a control group, thereby dividing different CPU usage ranges and usage quotas. Although this Cgroup configuration can be changed online, in a production environment, the stability of the operating system needs to be considered, and the quotas of different Cgroups will not be frequently changed, which may lead to the situation that part of the resources of the Cgroups are idle and part of them are busy. Or due to historical reasons, part of the businesses are not included in the Cgroup management, so that the Cgroup configuration cannot be changed online. After the operating system starts running, its scheduling algorithm is relatively fixed, and at most it can be fine-tuned through parameters, and it is also difficult to adjust the algorithm in real time according to the function needs to meet the computing power needs of different function groups.

[0227] In the Linux system, Cgroup is a kernel feature that can be used to limit, record, and isolate the resource usage of process groups, such as CPU, memory, disk I / O, etc. By using Cgroup, system administrators can perform fine-grained resource control to limit the CPU and memory usage of specific processes, or to record their resource usage. For CPU resource allocation, Cgroup provides two main subsystems: CPU and CPU set (CPUset). CPU can be used to limit the total CPU usage time of all processes in a Cgroup. CPU set can be used to bind processes in a Cgroup to specific CPU cores and memory nodes.

[0228] Optionally, virtualization technology allows physical CPUs on a server to be abstracted and divided into multiple virtual CPUs (VCPU), which can be assigned to virtual machines (VM) running on the host. On the host, the VCPU can be mapped and scheduled to physical CPUs by the scheduler of the virtualization management software. The VCPU scheduling can be based on various strategies, including round robin, fair scheduling, and real-time scheduling, depending on the implementation of the virtualization management software. Through VCPU scheduling, the performance of the VM can be ensured, and the maximum performance of the physical hardware can be achieved.

[0229] In related technologies, VCPU can be dynamically migrated to different physical cores to more efficiently utilize physical resources. For example, if the VCPU on one physical core is lightly loaded, while the VCPU on another physical core is heavily loaded, a portion of the load can be migrated to the lightly loaded core to achieve load balancing. During VCPU dynamic scheduling, the number of VCPUs can also be dynamically modified, for example, when the VCPU is running under high load, the number of VCPUs can be increased to meet the resource needs of the VM. Administrators can use various monitoring tools to track resource usage and make optimization adjustments based on this data. However, in a production environment, although Cgroup can dynamically adjust the use of VCPU, the configuration information of Cgroup is usually an experienced value that has been verified through practice and large-scale deployment, and it is not likely to be changed frequently.

[0230] In related technologies, due to the flexibility of VCPU scheduling, it is necessary to dynamically adjust according to the actual system running situation, and it is usually assumed that the CPU resources configured for different function group processes are set on VCPU, and the actual resource usage in the actual running can be dynamically optimized according to the actual monitoring data. However, the above method cannot directly create new VCPU for the running operating system, and thus cannot perform more detailed scheduling using the above method, thereby existing the technical problem of being unable to directly create new VCPU for the running operating system.

[0231] In this embodiment, in order to realize real-time resource elasticity on the basis of compatibility with existing resource partitioning methods, a virtual CPU management method of a lightweight virtualization architecture is proposed, which switches the running operating system to a virtualization mode and creates a new virtual CPU for it, then provides elastic computing power by scheduling the new virtual CPU, and maintains transparency to the original running mode, thereby realizing the technical effect of directly creating new VCPU for the running operating system, and solving the technical problem of being unable to directly create new VCPU for the running operating system.

[0232] The above method of the embodiment is further described below.

[0233] In the embodiment, a virtual CPU management method of a lightweight virtualization architecture is provided, which can include a virtual CPU creation method of the lightweight virtualization architecture, a virtual CPU online method of the lightweight virtualization architecture, a virtual CPU running method of the lightweight virtualization architecture, and a virtual CPU offline method of the lightweight virtualization architecture.

[0234] FIG. 7(b) is a flowchart of a virtual CPU creation method of a lightweight virtualization architecture according to an embodiment of the present disclosure. As shown in FIG. 7(b), the virtual CPU creation method of the lightweight virtualization architecture can include the following steps:

[0235] Step S71, create an extended page table.

[0236] In the embodiment, the number of possible CPUs of the host operating system can be set, which can be greater than the number of actual physical processors.

[0237] Optionally, in the process of creating the virtual processor, an EPT page table representing the mapping from GPA to HPA can be established for the running host.

[0238] Step S72, create a data structure based on the extended page table.

[0239] In the embodiment, the content of each register of the virtual processor in the running state on the host is determined, such as the values of segment registers, instruction registers, floating point registers, control registers, and other registers, to obtain the storage information on the registers. Based on the above storage information and the extended page table, a data structure for running in virtualization mode can be created.

[0240] In the embodiment, in the virtualization environment, the configuration information such as attribute information can be intercepted through the configuration instruction of the data structure to obtain the data structure. Using the data structure, an exit processing function can be set, and through the exit processing function, the virtual machine operating system can be made to do exit processing. The above exit processing function can include an extended page table violation processing function.

[0241] Step S73, switch the running physical processor in the host using the created data structure.

[0242] Optionally, by using the created data structure, a physical processor running in the host machine can be switched to a virtual processor running in a non-root mode, so that the running host machine enters a virtualization mode; by using the virtual processor running in the non-root mode, the host operating system can be controlled to switch to a corresponding virtual machine operating system.

[0243] Step S74, creating a virtual processor for the host machine.

[0244] Optionally, when the creation instruction for creating a virtual CPU sent by the user is acquired, the number of virtual processors currently corresponding to the virtual machine operating system can be checked, and the number after the virtual processor with the largest current number can be confirmed as the identification information of the virtual processor to be newly created. Based on the identification information of the virtual processor, a creation interface of the virtual processor provided externally can be called to create a virtual processor for the host machine.

[0245] Optionally, a structure body as the virtual processor is applied for the virtual processor to be created, and is set for subsequent running and scheduling of the virtual processor.

[0246] In this embodiment, an idle identity information of an open standard (Advanced Configuration and Power Interface, referred to as ACPI for short) can be selected, and the ACPI is registered to the virtual machine operating system through an ACPI registration function. And the virtual processor represented by the current new identification information is registered to the virtual machine operating system through a processor registration function of the acquired operating system.

[0247] Optionally, the current new virtual processor does not have a fixed physical processor corresponding to it, and therefore, an association field (such as a pCPU association field) in the virtual processor is temporarily empty.

[0248] In this embodiment, the virtual processor needs to be switched on different real physical processors, and the registers used by the virtual processor cannot be directly accessed through a pass-through mode, but need to be accessed through an emulated mode. For example, in the virtual processor, all model-specific registers cannot be passed through, and therefore, when reading and writing the above registers, the registers need to be processed through a trap-out emulation mode.

[0249] Step S75, emulating the identification information of the virtual processor to obtain emulated identification information.

[0250] In this embodiment, for the virtual processor, the identification information thereof can also be emulated to obtain emulated identification information.

[0251] Optionally, the embodiment can create an entry of the simulated identification information, and set an initial simulation value, while linking the simulation value to a CPU Id linked list under the VCPU structure, for use in subsequent trap processing.

[0252] In this embodiment, the LAPIC timer in the virtual processor can select a non-pass-through mode, link the virtual processor to a global LAPIC software timer linked list, to facilitate subsequent simulation timer expiration operations. And set the timer expiration processing function of its LAPIC, which can perform some periodic check operations inside, such as setting the virtual processor to wake up if the virtual processor chain is paused, etc. It should be noted that the operation type here is only for illustration and does not make specific limitations.

[0253] In this embodiment, for the registers of the virtual processor, the values of the floating point processor and the control registers can also be additionally initialized to prepare for subsequent in-out host operating system switching registers.

[0254] Step S76 sets the pause execution time and / or stop execution time of the data structure.

[0255] In this embodiment, for the corresponding data structure of the virtual processor, in addition to the basic default settings, the pause execution time and / or stop execution time of the data structure can also be set. By setting the above time, the time when the virtual processor needs to exit is determined, thereby preventing time slice waste.

[0256] Figure 7(c) is a flowchart of an online method of a virtual CPU of a lightweight virtualization architecture according to an embodiment of the present disclosure. As shown in Figure 7(c), the online method of the virtual processor of the lightweight virtualization architecture can include the following steps:

[0257] Step S77 initializes the virtual processor in the pause state.

[0258] In this embodiment, after creating the virtual processor, only the required data structure for running and configuration are established, and the virtual processor needs to start running directly, and needs to be online first. When the user needs to perform an Online operation to wake up the newly created virtual processor, an inter-processor interrupt signal can be obtained, and the state of the virtual processor is determined as a pause state in response to the inter-processor interrupt signal. Through the inter-processor interrupt signal, the virtual processor in the pause state is notified to perform initialization operations. In response to the interrupt operation, the virtual processor is controlled to exit to the root mode of virtualization, and the current simulation start state bit is set to DM_INIT, and the virtual processor is temporarily placed in the pause queue.

[0259] In this embodiment, when the DM_INIT event is processed, the configuration information of the virtual processor for switching is initialized, and the simulated LAPIC registers in the virtual processor are reset. However, the virtual processor at this time has not completed the initialization, and cannot be directly run, so the run-prohibited flag can be set to ensure that the virtual processor will not be scheduled to execute before the initialization is completed.

[0260] In step S78, the initialized virtual processor is put online.

[0261] In this embodiment, after the initialization of the virtual processor is completed, a DM_STARTUP interrupt can be sent as a start signal, at this time, the virtual processor is close to a runnable state, and can be taken out from the suspension queue. In order to ensure that the event is responded in time, when the DM_STARTUP event is processed, the virtual processor can first identify the vector value of the SIPI signal, and process accordingly. The code segment and the memory address of the execution instruction of the virtual processor can be set according to the received SIPI vector value. After the initialization of the virtual processor is completed, the virtual processor can be directly run, and the run-prohibited flag can be cleared to indicate that the virtual processor can be directly run.

[0262] FIG. 7(d) is a flowchart of a running method of a virtual CPU of a lightweight virtualization architecture according to an embodiment of the present disclosure. As shown in FIG. 7(d), the running method of the virtual processor of the lightweight virtualization architecture can include the following steps:

[0263] In step S79, after the online virtual processor is obtained, the virtual processor is run by trapping.

[0264] In this embodiment, after the virtual processor is put online, the virtual processor can be directly run, but the processing mode of the start register and the interrupt of the virtual processor is different, and the virtual processor usually needs to be run by trapping, so after the online virtual processor is obtained, the virtual processor can be run by trapping in the scheduler.

[0265] In step S710, during the running of the virtual processor by trapping, the virtual registers are saved and / or loaded.

[0266] Since all the MSR registers of the virtual processor are not passed through, during the running of the virtual processor by trapping, in response to entering or exiting the virtual machine operating system, the virtual registers corresponding to the virtual processor operating system can be obtained, and the virtual registers corresponding to the virtual processor and the MSR values of the physical processor are saved and / or loaded.

[0267] In step S711, the virtual registers in the structure of the virtual machine processor are read and written.

[0268] In this embodiment, when the virtual machine operating system runs the virtual processor, if the read-write MSR register is contacted, the processing function of the MSR corresponding to the virtual register can be determined, and the processing function is trapped to achieve the purpose of using the processing function to read and write the virtual register in the structure of the virtual processor.

[0269] Optionally, for the processing of the identification information, the virtual processor can first search the identification information chain table to determine whether the corresponding entry exists, if the corresponding entry exists, the simulated simulation identification information can be returned, if the corresponding entry does not exist, the identification information of the physical processor (which can also be referred to as hardware) can be read; and the query result is set to the simulated simulation identification information and returned to the register for storage.

[0270] Optionally, when the virtual processor executes the xsetbv instruction to set the xcr0, the set xcr0 value can be stored in the virtual register field of the virtual processor simulation related virtual register, and at the same time, the simulated simulation identification information of the virtual processor is updated to reflect the processor function information related to the xcr0 setting. Through the above steps, it can be ensured that in the virtualization environment, the virtual processor correctly processes and sets the register related instruction, and maintains the same state as the physical processor to ensure that the virtual machine operating system can correctly simulate the behavior of the virtual processor. The same operation can also be performed for the cr4 instruction, and the corresponding simulation identification information will also be updated.

[0271] Optionally, in the process of trapping the virtual processor to run, if the virtual processor switches into the virtual machine operating system, a plurality of registers of the host computer can be additionally saved, such as fpu, xcr0, configuration address register and the like, and at the same time, the above registers of the host computer can be loaded; on the contrary, in the process of trapping the virtual processor to run, if the virtual processor exits the virtual machine operating system, the opposite operation can be performed, that is, the registers of the host computer are not saved, and the registers of the virtual machine operating system are not loaded.

[0272] Step S712, the timer chain table corresponding to the virtual processor is traversed to determine whether the timing operation of the virtual processor is triggered.

[0273] In this embodiment, when the timer of the physical processor expires, in addition to setting the next expiration time, the timer chain table corresponding to the virtual processor can be traversed to check whether the software simulation timer (which can be referred to as simulation timer) in it expires; in addition, in order to ensure the accuracy of the simulation timer, the expiration time can also be checked every time the virtualization trap processing occurs.

[0274] In this embodiment, when the virtual processor receives the ipi interrupt, the virtual processor performs an interrupt operation on the virtual processor. In response to the interrupt operation on the virtual processor, the destination address of the virtual processor can be replaced with the identification information (apic_id) of the previously registered virtual processor instead of the identification information of the currently running physical processor, so as to achieve the purpose of exiting the virtual processor to the virtual machine manager for processing.

[0275] Optionally, when the host computer switches into the virtual machine operating system again, the current registers of the host computer can be saved; when the host computer exits the virtual machine operating system again, the saved registers of the host computer can be cancelled; thereafter, the background scheduling in the virtualization mode can put the virtual processor into the scheduler and allocate a corresponding time slice to start running; from the perspective of the virtual machine operating system, the processor is not perceived as a virtual processor and can be directly executed transparently.

[0276] FIG. 7(e) is a flowchart of a method for offline of a virtual CPU in a lightweight virtualization architecture according to an embodiment of the present disclosure. As shown in FIG. 7(e), the method for offline of the virtual processor in the lightweight virtualization architecture can include the following steps:

[0277] Step S713, when performing the offline operation on the virtual processor, the normal operation is closed.

[0278] In this embodiment, when the customer performs the offline operation on the virtual CPU, the interrupt, the exit process (such as the idle process) and other normal operations of the virtual processor need to be closed.

[0279] Step S714, in response to the stop execution instruction, the virtual processor is stopped.

[0280] Since the current processor is a virtual processor and there is no specific physical processor corresponding to it, the original other operations cannot be performed, otherwise the system may be down; therefore, the offline identification (such as the dead flag) of the virtual processor can be set by using the stop logic of the virtual processor, and then the halt instruction loop is entered, and in response to the above stop execution instruction, the virtual processor can be stopped.

[0281] In the embodiment, an extended page table is created, a data structure is constructed based on the extended page table, and the host operating system running is switched to the virtual machine operating system by using attribute information in the data structure, so that the purpose of switching the host operating system running on the host to the virtualization mode is achieved, in which the host operating system is controlled to switch to the virtual machine operating system, and a new VCPU is created for the virtual machine operating system, so that the technical effect of directly creating a new VCPU for the virtual machine operating system running after switching is achieved, and the technical problem that a new VCPU cannot be directly created for the running operating system is solved.

[0282] In another optional embodiment, FIG. 8 shows an embodiment of using the computer terminal 10 (or mobile device) shown in FIG. 1 as a service mesh in a block diagram. FIG. 8 is a structural block diagram of a service mesh according to an embodiment of the present disclosure, as shown in FIG. 8, the service mesh 800 is mainly used to facilitate secure and reliable communication between multiple microservices, and the microservice refers to decomposing an application into multiple smaller services or instances and distributing them to run on different clusters / machines.

[0283] As shown in FIG. 8, the microservices can include an application service instance 809 and an application service instance 811, and the application service instance 809 and the application service instance 811 form a functional application layer of the service mesh 800. In an implementation, the application service instance 809 runs in the form of a container / process 804 on a machine / workload container group 814 (POD), and the application service instance 811 runs in the form of a container / process 806 on a machine / workload container group 816 (POD).

[0284] In an implementation, the application service instance 809 can be a data copy service, and the application service instance 811 can be a data transfer service.

[0285] As shown in FIG. 8, the application service instance 809 and the mesh proxy (sidecar) 803 coexist in the machine workload container group 814, and the application service instance 811 and the mesh proxy 805 coexist in the machine workload container 816. The mesh proxy 803 and the mesh proxy 805 form a data plane layer of the service mesh 800. Among them, the mesh proxy 803 and the mesh proxy 805 run in the form of a container / process 808, a container / process 810, respectively, which can receive a request 812 for a commodity query service, and the mesh proxy 803 and the application service instance 809 can communicate bidirectionally, the mesh proxy 805 and the application service instance 811 can communicate bidirectionally. In addition, the mesh proxy 803 and the mesh proxy 805 can also communicate bidirectionally.

[0286] In one embodiment, all traffic of the application service instance 809 is routed through the mesh proxy 803 to the appropriate destination, and all network traffic of the application service instance 806 is routed through the mesh proxy 805 to the appropriate destination. It is noted that the network traffic referred to herein includes, but is not limited to, Hyper Text Transfer Protocol (HTTP), Representational State Transfer (REST), google Remote Procedure Call (g-RPC), Redis, and the like.

[0287] In one embodiment, the functionality of the extended data plane layer can be implemented by writing custom filters for the proxies (Envoy) in the service mesh 800. The service mesh proxy configuration can be to make the service mesh correctly proxy service traffic, implement service interworking, and service governance. The mesh proxy 803 and the mesh proxy 805 can be configured to perform at least one of the following functions: service discovery, health checking, routing, load balancing, authentication and authorization, and observability.

[0288] As shown in FIG. 8, the service mesh 800 also includes a control plane layer. The control plane layer can be a set of services running in a dedicated namespace, hosted by the hosting control plane component 801 in the machine / Pod 802. As shown in FIG. 8, the hosting control plane component 801 is in bidirectional communication with the mesh proxy 803 and the mesh proxy 805. The hosting control plane component 801 is configured to perform some control management functions. For example, the hosting control plane component 801 receives telemetry data transmitted by the mesh proxy 803 and the mesh proxy 805, and can further aggregate the telemetry data. The services, hosting control plane component 801 can also provide user-facing application programming interfaces (APIs) to more easily manipulate network behavior, provide configuration data to the mesh proxy 803 and the mesh proxy 805, and the like.

[0289] It should be noted that the user information (including but not limited to user equipment information, user personal information, etc.) and data (including but not limited to data for analysis, stored data, displayed data, etc.) involved in the present disclosure are all information and data authorized by the user or authorized by all parties, and the collection, use and processing of related data need to comply with relevant laws, regulations and standards of relevant countries and regions, and provide corresponding operation portal for user to choose authorization or refusal.

[0290] It should be noted that for the foregoing method embodiments, in order to simply describe, they are all expressed as a series of action combinations, but those skilled in the art should know that the present disclosure is not limited to the action sequence described, because according to the present disclosure, certain steps can be performed in other sequences or simultaneously. Secondly, those skilled in the art should know that the embodiments described in the specification are all preferred embodiments, and the actions and components involved are not necessarily essential to the present disclosure.

[0291] Through the above description of the embodiments, those skilled in the art can clearly understand that the method according to the above embodiments can be realized by means of software and the necessary general hardware platform, and of course can also be realized by hardware. Based on such understanding, the technical solutions of the present disclosure can be embodied in the form of a software product, which is stored in a storage medium (such as ROM / RAM, magnetic disk, optical disk) and includes a plurality of instructions for making a terminal device (which can be a mobile phone, computer, server, or network device, etc.) execute the method of each embodiment of the present disclosure.

[0292] According to the embodiments of the present disclosure, a virtual processor creation apparatus for implementing the virtual processor creation method shown in FIG. 3 is also provided.

[0293] FIG. 9 is a schematic diagram of a virtual processor creation apparatus according to an embodiment of the present disclosure. As shown in FIG. 9, the virtual processor creation apparatus 900 can include a first creation component 902, a second creation component 904, a first control component 906, and a third creation component 908.

[0294] The first creation component 902 is configured to create an extended page table in a process in which the host machine runs a host operating system, wherein the host operating system is to be switched to a virtual machine operating system, and the extended page table is used to represent a mapping relationship of a physical address of the virtual machine operating system to a real physical address.

[0295] The second creation component 904 is configured to create a data structure based on the extended page table, wherein the data structure includes attribute information required for the virtual machine operating system to run.

[0296] The first control component 906 is configured to switch the host operating system to the virtual machine operating system based on the attribute information in the data structure.

[0297] The third creation component 908 is configured to create a virtual processor for the virtual machine operating system.

[0298] Here, the first creation component 902, the second creation component 904, the first control component 906, and the third creation component 908 correspond to steps S302 to S308 in Embodiment 1, and the four components have the same instances and application scenarios as the corresponding steps, but are not limited to the disclosure in Embodiment 1. It should be noted that the above components can be hardware components or software components stored in a memory (for example, the memory 104) and processed by one or more processors (for example, the processors 102a, 102b, …, 102n), or the above components can be a part of the device and can run in the computer terminal 10 provided in Embodiment 1.

[0299] According to the embodiments of the present disclosure, a virtual processor online device for implementing the online method of the virtual processor shown in FIG. 4 is further provided.

[0300] FIG. 10 is a schematic diagram of a virtual processor online device according to an embodiment of the present disclosure. As shown in FIG. 10, the virtual processor online device 1000 can include a first acquisition component 1002 and a first operation component 1004.

[0301] The first acquisition component 1002 is configured to acquire a virtual processor created for a virtual machine operating system, wherein the virtual machine operating system is obtained by switching a host operating system based on attribute information in a data structure, the data structure is created based on an extended page table and includes attribute information required for running the virtual machine operating system, and the extended page table is created in a process in which the host runs the host operating system and is used to represent a mapping relationship between a physical address of the virtual machine operating system and a real physical address.

[0302] The first operation component 1004 is configured to perform an online operation on the virtual processor.

[0303] It should be noted that the first obtaining component 1002 and the first operation component 1004 correspond to steps S402 to S404 in Embodiment 1, and the two components have the same instances and application scenarios as the corresponding steps, but are not limited to the disclosure of Embodiment 1. It should be noted that the above components can be hardware components or software components stored in the memory (for example, the memory 104) and processed by one or more processors (for example, the processors 102a, 102b, …, 102n), and the above components can also be run in the computer terminal 10 provided in Embodiment 3 as part of the device.

[0304] According to the embodiments of the present disclosure, a virtual processor running device for implementing the running method of the virtual processor shown in FIG. 5 is further provided.

[0305] FIG. 11 is a schematic diagram of a virtual processor running device according to an embodiment of the present disclosure. As shown in FIG. 11, the virtual processor running device 1100 can include a second obtaining component 1102 and a running component 1104.

[0306] The second obtaining component 1102 is configured to obtain an online virtual processor of a virtual machine operating system, wherein the virtual machine operating system is obtained by switching a host operating system based on attribute information in a data structure, the data structure is created based on an extended page table and includes attribute information required for running the virtual machine operating system, and the extended page table is created in a process in which the host machine runs the host operating system and is used to represent a mapping relationship between a physical address of the virtual machine operating system and a real physical address.

[0307] The running component 1104 is configured to trap out the running of the virtual processor.

[0308] It should be noted that the second obtaining component 1102 and the running component 1104 correspond to steps S502 to S504 in Embodiment 1, and the two components have the same instances and application scenarios as the corresponding steps, but are not limited to the disclosure of Embodiment 1. It should be noted that the above components can be hardware components or software components stored in the memory (for example, the memory 104) and processed by one or more processors (for example, the processors 102a, 102b, …, 102n), and the above components can also be run in the computer terminal 10 provided in Embodiment 3 as part of the device.

[0309] According to the embodiments of the present disclosure, a virtual processor offline device for implementing the offline method of the virtual processor shown in FIG. 6 is further provided.

[0310] FIG. 12 is a schematic diagram of a virtual processor offline device according to an embodiment of the present disclosure. As shown in FIG. 12, the virtual processor offline device 1200 can include a third obtaining component 1202 and a second operating component 1204.

[0311] The third obtaining component 1202 is configured to obtain an online virtual processor of a virtual machine operating system, wherein the virtual machine operating system is obtained by switching a host operating system based on attribute information in a data structure, the data structure is created based on an extended page table and includes attribute information required for running the virtual machine operating system, and the extended page table is created in a process in which the host runs the host operating system and is used to represent a mapping relationship between a physical address of the virtual machine operating system and a real physical address.

[0312] The second operating component 1204 is configured to perform an offline operation on the virtual processor.

[0313] It should be noted that the third obtaining component 1202 and the second operating component 1204 correspond to steps S602 to S604 in Embodiment 1, and the two components have the same instances and application scenarios as the corresponding steps, but are not limited to the content disclosed in Embodiment 1. It should be noted that the above components can be hardware components or software components stored in a memory (for example, the memory 104) and processed by one or more processors (for example, the processors 102a, 102b, …, 102n), and the above components can also be a part of the device and can run in the computer terminal 10 provided in Embodiment 3.

[0314] In the virtual processor creation device, the extended page table is created, the data structure is constructed based on the extended page table, the host operating system is switched to the virtual machine operating system by using the attribute information in the data structure, and the purpose of switching the host operating system being run by the host to a virtualization mode is achieved. In the virtualization mode, the host operating system is switched to the virtual machine operating system, and a new VCPU is created for the virtual machine operating system, thereby achieving the technical effect of directly creating a new VCPU for the virtual machine operating system running after the switching, and solving the technical problem that a new VCPU cannot be directly created for the running operating system.

[0315] Embodiments of the present disclosure can provide a computer terminal, which can be any one of computer terminal devices in a computer terminal group. Alternatively, in the present embodiment, the computer terminal can be replaced by a mobile terminal or other terminal device.

[0316] Alternatively, in the present embodiment, the computer terminal can be located in at least one of a plurality of network devices in a computer network.

[0317] In the embodiment, the computer terminal can execute program codes of the above steps in the method for creating a virtual processor.

[0318] Optionally, FIG. 13 is a structural block diagram of a computer terminal according to an embodiment of the present disclosure. As shown in FIG. 13, the computer terminal 1308 can include one or more (only one is shown in the figure) processors 1302, a memory 1304, and a transmission device 1306.

[0319] The memory can be configured to store software programs and components, such as program instructions / components corresponding to the method and apparatus for creating a virtual processor in the embodiments of the present disclosure. The processor can execute various function applications and data processing by running the software programs and components stored in the memory, that is, implement the method for creating a virtual processor. The memory can include a high-speed random access memory, and can further include a nonvolatile memory, such as one or more magnetic storage devices, flash memories, or other nonvolatile solid-state memories. In some examples, the memory can further include a memory remotely arranged with respect to the processor, and the remote memory can be connected to the computer terminal 1308 through a network. Examples of the network include, but are not limited to, the Internet, an intranet, a local area network, a mobile communication network, and a combination thereof.

[0320] The processor can call information and application programs stored in the memory through the transmission device to execute the steps in any one of the above methods.

[0321] Those skilled in the art can understand that the structure shown in FIG. 13 is only schematic, and the computer terminal 1308 can also be a terminal device such as a smart phone (such as an Android phone, an iOS phone, etc.), a tablet computer, a palm computer, a Mobile Internet Device (MID), a PAD, etc. FIG. 13 does not limit the structure of the computer terminal 1308. For example, the computer terminal 1308 can further include more or fewer components (such as a network interface, a display device, etc.) than those shown in FIG. 13, or have a different configuration from that shown in FIG. 13.

[0322] Those skilled in the art can understand that all or part of the steps in the above embodiments can be instructed by a program to terminal device related hardware, and the program can be stored in a computer readable storage medium, which can include a flash disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk or an optical disk, etc.

[0323] The embodiment of the present disclosure further provides a computer readable storage medium. Optionally, in the embodiment, the computer readable storage medium can be used to save the program code executed by the method for creating a virtual processor provided in the first embodiment.

[0324] Optionally, in the embodiment, the computer readable storage medium can be located in any one of the computer terminals in the computer terminal group in the computer network, or in any one of the mobile terminals in the mobile terminal group.

[0325] In the embodiment of the present disclosure, an extended page table is created, a data structure is constructed based on the extended page table, and the running host operating system is switched to a virtualization mode by using the data structure, the host is controlled to run a virtual machine operating system, and a new VCPU is created for the virtual machine operating system, thereby achieving the technical effect of directly creating a new VCPU in a running operating system and solving the technical problem that a new VCPU cannot be directly created in a running operating system.

[0326] The embodiment of the present disclosure further provides a computer program product. Optionally, in the embodiment, the computer program product can include a computer program, and the computer program, when executed by a processor, implements the method provided in the above embodiment.

[0327] The embodiment of the present disclosure further provides a computer program product. Optionally, the computer program product can include a non-volatile computer readable storage medium, and the non-volatile computer readable storage medium can be used to store a computer program, and the computer program, when executed by a processor, implements the method provided in the above embodiment.

[0328] The embodiment of the present disclosure further provides a computer program. Optionally, in the embodiment, the computer program, when executed by a processor, implements the method provided in the above embodiment.

[0329] The embodiment of the present disclosure can provide an electronic device, which can include a memory and a processor.

[0330] FIG. 14 is a block diagram of an electronic device for a method of creating a virtual processor according to an embodiment of the present disclosure. The electronic device is intended to represent various forms of digital computers, such as laptops, desktops, tablets, personal digital assistants, servers, blade servers, mainframes, and other appropriate computers. The electronic device can also represent various forms of mobile devices, such as personal digital assistants, cellular telephones, smartphones, wearable devices, and other similar computing devices. The components shown here, their connections and relationships, and their functions, are meant to be examples only, and are not intended to limit the implementations of the present disclosure described and / or claimed in this document.

[0331] As shown in FIG. 14, the device 1400 includes a computing component 1401 that can perform various suitable actions and processes in accordance with computer programs stored in a read only memory (ROM) 1402 or loaded into a random access memory (RAM) 1403 from a storage component 1408. Various programs and data used by the device 1400, in addition to the computing component 1401, the ROM 1402, and the RAM 1403, are connected to one another by a bus 1404. An input / output (I / O) interface 1405 is also connected to the bus 1404.

[0332] Various components in the device 1400 are connected to the I / O interface 1405, including an input component 1406, such as a keyboard, a mouse, etc., an output component 1404, such as various types of displays, speakers, etc., a storage component 1408, such as a magnetic disk, an optical disk, etc., and a communication component 1409, such as a network card, a modem, a wireless communication transceiver, etc. The communication component 1409 allows the device 1400 to exchange information / data with other devices over a computer network, such as the Internet, and / or various telecommunication networks.

[0333] The computing component 1401 can be various general purpose and / or special purpose processing components with processing and computing capabilities. Some examples of the computing component 1401 include, but are not limited to, a central processing component (CPU), a graphics processing component (GPU), various specialized artificial intelligence (AI) computing chips, various computing components running machine learning model algorithms, a demand side platform (DSP), and any suitable processor, controller, microcontroller, etc. The computing component 1401 performs various methods and processes described above, such as the data verification method. For example, in some embodiments, the data verification method can be implemented as a computer software program that is tangibly embodied in a machine-readable medium, such as the storage component 1408. In some embodiments, part or all of the computer program can be loaded and / or installed on the device 1400 via the ROM 1402 and / or the communication component 1409. When the computer program is loaded into the RAM 1403 and executed by the computing component 1401, one or more steps of the data verification method described above can be performed. Alternatively, in other embodiments, the computing component 1401 can be configured, by any suitable means (e.g., by means of firmware), to perform the data verification method.

[0334] According to the embodiments of the present disclosure, a method for creating a virtual processor is provided. It should be noted that the steps shown in the flowchart of the accompanying drawings can be executed in a computer system such as a set of computer-executable instructions, and although a logical order is shown in the flowchart, in some cases, the steps shown or described can be executed in an order different from that here.

[0335] Various implementations of the systems and techniques described above can be realized in digital electronic circuitry, integrated circuitry, a Field Programmable Gate Array (FPGA), an Application Specific Integrated Circuit (ASIC), an Application Specific Standard Product (ASSP), a System on a Chip (SOC), a Complex Programmable Logic Device (CPLD), computer hardware, firmware, software, and / or combinations thereof. These various implementations can include implementation in one or more computer programs that are executable and / or interpretable on a programmable system including at least one programmable processor, which can be special or general purpose, coupled to receive data and instructions from, and to transmit data and instructions to, a storage system, at least one input device, and at least one output device.

[0336] Program code for carrying out methods of the present disclosure can be written in any combination of one or more programming languages. The program code can be provided to a processor or controller of a general purpose computer, special purpose computer, or other programmable data processing apparatus to produce a machine, such that the program code, when executed by the processor or controller, produces the functions / operations specified in the flowcharts and / or block diagrams. The program code can be executed entirely on a machine, partially on a machine, partially on a machine as a standalone software package, partially on a machine and partially on a remote machine or entirely on a remote machine or server.

[0337] In the context of this disclosure, a machine-readable medium can be a tangible medium that contains or stores a program for use by or in connection with an instruction execution system, apparatus, or device. The machine-readable medium can be a machine-readable signal medium or a machine-readable storage medium. A machine-readable medium can include but is not limited to an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any suitable combination of the foregoing. More specific examples of the machine-readable storage medium would include a linearly-programmed electrical connection, a portable computer diskette, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or Flash memory), an optical fiber, a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.

[0338] To provide for interaction with a user, the systems and techniques described here can be implemented on a computer having a display device (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor) for displaying information to the user and a keyboard and a pointing device (e.g., a mouse or a trackball) by which the user can provide input to the computer. Other kinds of devices can be used to provide for interaction with a user as well; for example, feedback provided to the user can be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user can be received in any form, including acoustic, speech, or tactile input.

[0339] The systems and techniques described here can be implemented in a computing system that includes a back end component (e.g., as a data server), or that includes a middleware component (e.g., an application server), or that includes a front end component (e.g., a user computer having a graphical user interface or a Web browser through which a user can interact with an implementation of the systems and techniques described here), or any combination of such back end, middleware, or front end components. The components of the system can be interconnected by any form or medium of digital data communication (e.g., a communication network). Examples of communication networks include a local area network (LAN), a wide area network (WAN), and the Internet.

[0340] The computer system can include clients and servers. This relationship can be. The servers are typically remote from the clients with the interactions typically happening over the communications network. The relationship of client and server arises by interplay of both the programs in their respective computers and the client and server are in a client-server relationship. The server can be a cloud server, a server of a distributed system or a server incorporating blockchain.

[0341] It should be noted that the above-mentioned sequence numbers of the embodiments of the present disclosure are only for description, and do not represent the advantages and disadvantages of the embodiments.

[0342] In the above-mentioned embodiments of the present disclosure, the description of each embodiment has its own focus, and the parts not described in detail in a certain embodiment can be referred to the related description of other embodiments.

[0343] In several embodiments provided by the present disclosure, it should be understood that the disclosed technology can be implemented in other ways. Of course, the embodiments described above are only schematic. The division of components is only a logical function division, and there can be another division manner in actual implementation. For example, a plurality of components or components can be combined or integrated into another system, or some features can be ignored or not executed. In addition, the coupling or direct coupling or communication connection between the components shown or discussed can be indirect coupling or communication connection through some interface, components or a combination of the above. It can be electrical or other forms.

[0344] The components illustrated as separate components may or may not be physically separate, and the components illustrated as components may or may not be physical components, i.e. they can be located in one place or distributed on multiple network components. Some or all of the components can be selected according to actual needs to achieve the purpose of the embodiments.

[0345] In addition, each functional component in each embodiment of the present disclosure can be integrated into a processing component, or each component can exist physically, or two or more components can be integrated into one component. The above integrated component can be realized in the form of hardware or in the form of a software functional component.

[0346] The integrated components, if implemented in the form of software function components and sold or used as independent products, can be stored in a computer readable storage medium. Based on such understanding, the technical solutions of the present disclosure, essentially or in other words, the part that contributes to the prior art or the whole or part of the technical solutions can be embodied in the form of a software product. The computer software product is stored in a storage medium, and includes several instructions for causing a computer device (which can be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the methods in the various embodiments of the present disclosure. The aforementioned storage medium includes various media that can store program codes, such as a U disk, a read-only memory (ROM), a random access memory (RAM), a mobile hard disk, a magnetic disk or an optical disk, etc.

[0347] The above are only preferred embodiments of the present disclosure, and it should be pointed out that, for those skilled in the art, without departing from the principles of the present disclosure, a number of improvements and refinements can be made, and these improvements and refinements should also be considered as the protection scope of the present disclosure. Industrial applicability

[0348] The scheme provided by the embodiments of the present disclosure can be applied to the creation process of a virtual processor. In the process of running a host operating system on a host, an extended page table is created, wherein the host operating system is to be switched to a virtual machine operating system, and the extended page table is used to represent the mapping relationship between the physical address of the virtual machine operating system and the real physical address. A data structure is created based on the extended page table, wherein the data structure includes attribute information required for the virtual machine operating system to run. The host operating system is switched to the virtual machine operating system based on the attribute information in the data structure. A virtual processor is created for the virtual machine operating system, thereby achieving the technical effect of directly creating a new VCPU for the virtual machine operating system running after switching, and solving the technical problem that a new VCPU cannot be directly created for a running operating system.

Claims

1. A method for creating a virtual processor, comprising: creating an extended page table during a process in which a host computer runs a host operating system, wherein the host operating system is to be switched to a virtual machine operating system, and the extended page table is used to represent a mapping relationship between a physical address of the virtual machine operating system and a real physical address; creating a data structure based on the extended page table, wherein the data structure comprises attribute information required for the virtual machine operating system to run; switching the host operating system to the virtual machine operating system based on the attribute information in the data structure; creating a virtual processor for the virtual machine operating system.

2. The method of claim 1, wherein, creating a virtual processor for the virtual machine operating system, comprising: receiving a creation instruction, wherein the creation instruction is used to request to create the virtual processor; in response to the creation instruction, invoking a creation interface to create the virtual processor for the virtual machine operating system.

3. The method of claim 2, wherein, in response to the creation instruction, invoking a creation interface to create the virtual processor for the virtual machine operating system, comprising: in response to the creation instruction, determining identification information of the virtual processor to be created; based on the identification information of the virtual processor, invoking the creation interface to create the virtual processor for the virtual machine operating system.

4. The method of claim 3, wherein, based on the identification information of the virtual processor, invoking the creation interface to create the virtual processor for the virtual machine operating system, comprising: obtaining a processor registration function; invoking the creation interface to run the processor registration function to register the virtual processor corresponding to the identification information for the virtual machine operating system.

5. The method of claim 3, wherein, in response to the creation instruction, determining identification information of the virtual processor to be created, comprising: in response to the creation instruction, determining identification information of an existing processor in the host computer; determining the identification information of the virtual processor according to the identification information of the existing processor, wherein the identification information of the virtual processor and the identification information of the existing processor satisfy an arrangement order rule.

6. The method of claim 3, wherein, The method further comprises: simulating the identification information of the virtual processor to obtain simulated identification information; linking the simulated identification information to an identification information linked list of the virtual processor; using the identification information linked list to perform trap-out processing on the virtual machine.

7. The method of claim 1, wherein, The attribute information comprises register data required for a virtual processor running in a non-root mode, and switching the host operating system to the virtual machine operating system based on the attribute information in the data structure, comprising: using the register data to switch a physical processor in a running state in the host computer to a virtual processor running in a non-root mode; using the virtual processor running in the non-root mode to switch the host operating system to the virtual machine operating system.

8. The method of claim 7, wherein, The structure of the virtual processor running in the non-root mode is the same as the structure of a virtual processor created for the host computer.

9. The method of claim 1, wherein, Based on the extended page table to create a data structure, comprising: determining a virtual processor in a running state in the host computer; based on the virtual processor in the running state and the extended page table, creating the data structure.

10. The method of claim 9, wherein, creating the data structure based on the virtual processor in the running state and the extended page table, including: determining storage information on a register corresponding to the virtual processor in the running state; creating the data structure based on the storage information and the extended page table.

11. The method of any one of claims 1 to 10, wherein, The method further includes: setting an exit processing function to be called in a process in which the host machine runs the virtual machine operating system by using the data structure, wherein the exit processing function is used to make the virtual machine operating system exit processing.

12. The method of any one of claims 1 to 10, wherein, The method further includes: simulating a register corresponding to a physical processor of the host machine to obtain a virtual register, wherein a virtual processor created for the host machine is used to perform read and write operations on the virtual register.

13. The method of any one of claims 1 to 10, wherein, The method further includes: linking the virtual processor to a timer linked list, wherein the timer linked list is used to simulate timing operations of the virtual processor.

14. The method of any one of claims 1 to 10, wherein, The method further includes: setting a suspension execution time and / or a stop execution time of the data structure.

15. An online method of a virtual processor, comprising: obtaining a virtual processor created for a virtual machine operating system, wherein the virtual machine operating system is obtained by switching a host machine operating system based on attribute information in a data structure, the data structure is created based on an extended page table and includes the attribute information required for the virtual machine operating system to run, and the extended page table is created in a process in which the host machine runs a host machine operating system and is used to represent a mapping relationship between a physical address of the virtual machine operating system and a real physical address; performing online operation on the virtual processor.

16. The method of claim 15, wherein, Performing online operation on the virtual processor includes: in response to an interrupt operation, determining a state of the virtual processor as a suspension state; initializing the virtual processor in the suspension state to obtain an initialized virtual processor; performing online operation on the initialized virtual processor.

17. The method of claim 16, wherein, In response to the interrupt operation, determining the state of the virtual processor as the suspension state includes: in response to the interrupt operation, controlling the virtual processor to exit from a guest mode to a root mode; storing the virtual processor in the root mode in a suspension queue, wherein the suspension queue is used to make the virtual processor in the root mode in the suspension state.

18. The method of claim 16, wherein, Initializing the virtual processor in the suspension state to obtain the initialized virtual processor includes: obtaining configuration information from the data structure corresponding to the virtual processor in the suspension state, wherein the configuration information is used to switch the virtual processor; initializing the configuration information; in response to a start operation, setting running information for the virtual processor including the initialized configuration information to obtain the initialized virtual processor, wherein the running information is used to run the virtual processor.

19. A running method of a virtual processor, comprising: obtaining an online virtual processor of a virtual machine operating system, wherein the virtual machine operating system is obtained by switching a host operating system based on attribute information in a data structure, the data structure is created based on an extended page table and includes attribute information required for running the virtual machine operating system, and the extended page table is created in a process in which the host runs the host operating system and is used to represent a mapping relationship between a physical address of the virtual machine operating system and a real physical address; trapping out running of the virtual processor.

20. The method of claim 19, wherein, trapping out running of the virtual processor, including: in response to entering or exiting the virtual machine operating system, obtaining a virtual register corresponding to the virtual processor; saving and / or loading the virtual register; trapping out running of the virtual processor after saving and / or loading the virtual register.

21. The method of claim 20, wherein, The method further includes: in a process of trapping out running of the virtual processor using the virtual machine operating system, determining a processing function corresponding to the virtual register; using the processing function, performing read and write operations on the virtual register in a structure of the virtual processor.

22. The method of claim 19, wherein, The method further includes: obtaining simulated identification information corresponding to the virtual processor from an identification information linked list, wherein the simulated identification information is obtained by simulating identification information of the virtual processor; using the simulated identification information, performing trap processing on the virtual machine.

23. The method of claim 19, wherein, The method further includes: in a process of trapping out running of the virtual processor, in response to the virtual processor entering the virtual machine operating system, saving a register of the host and loading a register of the virtual machine; or in a process of trapping out running of the virtual processor, in response to the virtual processor exiting the virtual machine operating system, canceling saving the register of the host and canceling loading the register of the virtual machine.

24. The method of claim 19, wherein, The method further includes: traversing a timer linked list corresponding to the virtual processor to determine whether to trigger a timing operation of the virtual processor; in response to the triggered timing operation, executing a processing function associated with the timer linked list.

25. The method of any one of claims 19 to 24, wherein, The method further includes: in response to an interrupt operation of the virtual processor, exiting the virtual processor to a manager of the virtual machine; determining identification information of the virtual processor as a destination address of the virtual processor in the manager.

26. The method of any one of claims 19 to 24, wherein, The method further includes: in response to the host entering the virtual machine operating system, saving a register of the host; or in response to the host exiting the virtual machine operating system, canceling saving the register of the host.

27. A virtual processor creation system, comprising: The creating end is configured to create an extended page table during running of a host operating system on a host machine, the host operating system is to be switched to a virtual machine operating system, the extended page table is used to represent a mapping relationship between a physical address of the virtual machine operating system and a real physical address; create a data structure based on the extended page table, the data structure includes attribute information required by the virtual machine operating system to run; switch the host operating system to the virtual machine operating system based on the attribute information in the data structure; and create a virtual processor for the virtual machine operating system. The online end is configured to perform an online operation on the virtual processor. The running end is configured to trap out the virtual processor to run in a scheduler. The offline end is configured to perform an offline operation on the virtual processor. 28.An electronic device, comprising: a memory storing an executable program; a processor configured to run the program, wherein the program, when running, performs the method of any one of claims 1 to 26.

29. A computer readable storage medium, the computer readable storage medium comprising a stored executable program, wherein, controlling a device in which the storage medium is located to perform the method of any one of claims 1 to 26 when the executable program is running. 30.A computer program product, comprising a computer program which, when executed by a processor, implements the method of any one of claims 1 to 26.

Images