Optical semiconductor element and method for manufacturing same

Abstract

Provided is an optical semiconductor element having improved efficiency. This optical semiconductor element comprises: a semiconductor laminate having at least one semiconductor laminated structure in which an active layer and a tunnel junction layer are laminated; and a first n-type electrode and a second n-type electrode sandwiching the semiconductor laminate. The tunnel junction layer comprises a p-type InAlAsSbP layer and an n-type InAlAsSbP layer lattice-matched to InAs, and has a light emission center wavelength of 2000-5000 nm.

Description

Optical semiconductor device and method for manufacturing the same

[0001] The present invention relates to an optical semiconductor device and a method for manufacturing the same.

[0002] A known optical semiconductor device is in which two or more vertically stacked active layers are sandwiched between them. Such an optical semiconductor device is used as a light-emitting element to improve optical output when the wavelengths of the stacked active layers are close together, and to emit different wavelengths when the wavelengths of the stacked active layers are far apart. Similarly, it is also used as a photodetector to improve light-receiving efficiency when the wavelengths of the stacked active layers are close together, and to have sensitivity to different wavelength bands when the wavelengths of the stacked active layers are far apart.

[0003] In such optical semiconductor devices, multiple active layers are stacked vertically, connecting them in series. In a light-emitting element, when a forward current flows through it, each of the multiple active layers can emit light. Generally, the active layers in this case are pn junctions.

[0004] Normally, when junctions are made in the order of n-type, p-type, n-type (or p-type, n-type, p-type), they form a thyristor and no current flows. However, because the tunnel junction layer is doped to a high concentration, reverse current flows within the tunnel junction layer, causing current to flow.

[0005] Japanese Patent Publication No. 2009-522755, Japanese Patent Publication No. 2018-201009, Japanese Patent Publication No. 2001-36141

[0006] Patent Document 1 states that only Al, Ga, In, and P are preferred as the basic constituent materials of the crystal lattice constituting the optical semiconductor device. However, the wavelengths of devices obtained from these materials are red to green with wavelengths of 890 nm or less, and infrared emission cannot be expected. Furthermore, as described in Patent Document 2, conventionally, the formation of a tunnel junction layer requires an n-type dopant concentration of 1.0 × 10⁻⁶. １９ atoms / cm ３ While a high concentration of the dopant is preferred, if an n-type semiconductor layer and a p-type semiconductor layer containing a high concentration of dopant are present between vertically stacked active layers, the dopant may diffuse into the active layer, potentially leading to a decrease in reliability.

[0007] Patent Document 3 discloses a diode element in an InP-matched semiconductor light-emitting layer of an npn junction type (or pnp junction type), in which electrodes are provided on each n-type semiconductor of the npn junction (or each p-type semiconductor of the pnp junction). However, the description does not indicate that it can be applied to InAs-matched or GaSb-matched light-emitting elements, and Patent Document 3 aims to enable current flow and light emission regardless of whether the applied voltage polarity to the diode element is positive or negative.

[0008] In recent years, there has been a demand for further improvements in the luminescence efficiency or photodetector efficiency of light-emitting or photodetector elements in InAs-matched or GaSb-matched systems. The present invention has been made in view of this situation and aims to improve the efficiency of optical semiconductor elements.

[0009] The inventors of the present invention have diligently studied ways to solve the above problems and have found an optical semiconductor element and a method for manufacturing the same, which comprises at least one active layer and a tunnel junction layer, and has n-type electrodes in the uppermost and lowermost n-type semiconductor layers of the npn junction, wherein the tunnel junction layer has a p-type InAlAsSbP layer and an n-type InAlAsSbP layer, thus completing the present invention. In other words, the gist of the present invention is as follows.

[0010] (1) A photonic semiconductor device comprising: a semiconductor laminate having at least one semiconductor laminate structure in which an active layer and a tunnel junction layer are stacked; a first n-type electrode and a second n-type electrode sandwiching the semiconductor laminate, wherein the tunnel junction layer consists of a p-type InAlAsSbP layer and an n-type InAlAsSbP layer lattice-matched to InAs, and the emission center wavelength is 2000 nm to 5000 nm.

[0011] (2) The tunnel junction layer has a dopant concentration of 1.0 × 10 １８ atoms / cm ３ The above 1.0 x 10 １９ atoms / cm ３ The optical semiconductor device described in (1) above, which is less than [a certain value].

[0012] (3) The p-type InAlAsSbP layer is provided on the active layer side of the tunnel junction layer, a p-type electron blocking layer is provided between the active layer and the tunnel junction layer, and the total thickness of the layer between the active layer and the tunnel junction layer is 100 nm or less. The optical semiconductor device according to (1) or (2) above.

[0013] (4) A semiconductor laminate including a first semiconductor laminate structure in which a first active layer and a first tunnel junction layer are laminated, and a second semiconductor laminate structure in which a second active layer and a second tunnel junction layer are laminated, and having a first n-type electrode and a second n-type electrode sandwiching the semiconductor laminate. Both the first tunnel junction layer and the second tunnel junction layer are composed of a p-type InAlAsSbP layer and an n-type InAlAsSbP layer lattice-matched to InAs, and the emission center wavelength is 2000 nm to 5000 nm. Optical semiconductor device.

[0014] (5) The first tunnel junction layer and the second tunnel junction layer have a dopant concentration of 1.0×10 １８ atoms / cm ３ or more and less than 1.0×10 １９ atoms / cm ３ The optical semiconductor device according to (4) above.

[0015] (6) The first active layer and the second active layer have a quantum well structure, and the first wavelength and the second wavelength emitted by each of the first active layer and the second active layer are the same or approximate to each other. The optical semiconductor device according to (4) or (5) above.

[0016] (7) The p-type InAlAsSbP layer is provided on the first active layer side of the first tunnel junction layer, a p-type electron blocking layer is provided between the first active layer and the first tunnel junction layer, and the total thickness of the layer between the first active layer and the first tunnel junction layer is 100 nm or less. The optical semiconductor device according to any one of (4) to (6) above.

[0017] (8) The optical semiconductor device according to (4) to (7) above, wherein the n-type InAlAsSbP layer is located on the second active layer side of the first tunnel junction layer, a spacer layer is located between the first tunnel junction layer and the second active layer, and the total thickness of the layers between the first tunnel junction layer and the second active layer is 100 nm or less.

[0018] (9) A method for manufacturing an optical semiconductor device having an emission center wavelength of 2000 nm to 5000 nm, comprising the steps of: forming a semiconductor laminate having at least one semiconductor laminate structure in which an active layer and a tunnel junction layer are laminated on an n-type substrate; and forming a first n-type electrode and a second n-type electrode, wherein the step of forming the tunnel junction layer includes the step of forming an n-type InAlAsSbP layer on a p-type InAlAsSbP layer in which the n-type tunnel junction layer is lattice-matched to InAs.

[0019] (10) The tunnel junction layer has a dopant concentration of 1.0 × 10 １８ atoms / cm ３ The above 1.0 x 10 １９ atoms / cm ３ A method for manufacturing an optical semiconductor device as described in (9) above, wherein the value is less than [value missing].

[0020] We can provide optical semiconductor devices with improved efficiency and methods for manufacturing the same. For example, when used as a light-emitting element, we can provide optical semiconductor devices and methods for manufacturing the same that have high light output (Po), lower forward voltage (Vf) than conventional devices, improved luminous efficiency (WPE), and a light emission center wavelength of 2000 nm to 5000 nm. When used as a light-receiving element, we can provide optical semiconductor devices and methods for manufacturing the same that have high light conversion efficiency (light-receiving efficiency).

[0021] This is a schematic cross-sectional diagram illustrating a first embodiment of the optical semiconductor device according to the present invention. This is a schematic cross-sectional diagram illustrating a second embodiment of the optical semiconductor device according to the present invention. This is a schematic cross-sectional diagram illustrating an example of a manufacturing method for the second embodiment of the optical semiconductor device according to the present invention. This is a schematic cross-sectional diagram illustrating an example of a manufacturing method following Figure 3. This is a schematic cross-sectional diagram illustrating an example of a manufacturing method following Figure 4. This is a schematic cross-sectional diagram illustrating a third embodiment of the optical semiconductor device according to the present invention. This is a graph showing the results of measuring the diffusion state of Si ions and Te ions in Example 3 by secondary ion mass spectrometry (SIMS). This is a graph showing the results of measuring the diffusion state of Zn ions in Example 3 by secondary ion mass spectrometry (SIMS). This is a graph showing the results of measuring the diffusion state of Te ions in Comparative Example 2 by secondary ion mass spectrometry (SIMS). This is a graph showing the results of measuring the diffusion state of Zn ions in Comparative Example 2 by secondary ion mass spectrometry (SIMS).

[0022] Prior to describing embodiments according to the present invention, the following points will be explained.

[0023] In this embodiment, InAlAsSbP that is lattice-matched to InAs means that a small amount of Al, Sb, or P may be included relative to InAs within the range of lattice matching to InAs. For example, InAlAsSb or InAsSbP, and most preferably InAs. Let the composition ratios of Al and Sb be a and b, respectively. 1-a Al a As 1-b Sb b If we express it as follows, for example, 0 ≤ a ≤ 0.2 and 0 ≤ b ≤ 0.2, and the composition ratios of Sb and P are b and c respectively, then InAs 1-b-c Sb b P ｃ When expressed as such, for example, 0 ≤ b ≤ 0.1 and 0 ≤ c ≤ 0.2. The active layer containing Sb in this embodiment is InAs ｘ Sb １－ｘThis refers to a compound that is also written as (0 < x < 1). When an InAs layer, AlInAs layer, or InAsP layer is written, it means that Sb is not included in the composition ratio, but it is permissible for Sb to be included as an unavoidable dopant element due to residual Sb in the chamber or diffusion from an adjacent Sb-containing layer, provided that Sb is not used as a raw material gas during the growth of the layer. Furthermore, when "AlInAsSb" is written in this specification without specifying the composition ratio, it refers to any compound in which the chemical composition ratio of Group III elements (total of Al and In) and Group V elements (total of As and Sb) is 1:1, and the ratio of Group III elements Al and In and the ratio of Group V elements As and Sb are indeterminate. In this case, it includes cases where either one of the Group III elements Al or In is not included, and also includes cases where either one of the Group V elements As or Sb is not included. The component composition ratios of each group III-V element in AlInAsSbP can be determined by photoluminescence measurement, X-ray diffraction measurement, etc.

[0024] In this specification, when specific dopants such as Zn, Te, and Si are not intentionally added, the material is referred to as "type i" or "undoped." The undoped layer may contain unavoidable dopant contamination from the manufacturing process. Specifically, the dopant density is low and close to the detection limit in SIMS analysis (secondary ion mass spectrometry) (e.g., 4 × 10⁻⁶). １６ / cm ３ If the value is less than the specified value, it will be treated as "undope" in this specification.

[0025] The III-V compound semiconductor in this embodiment contains at least one of Al, Ga, or In as a group III element, and at least one of P, As, or Sb as a group V element.

[0026] The thickness of each layer formed by epitaxial growth can be calculated from cross-sectional observation of the grown layer using an SEM (scanning electron microscope) or a TEM (transmission electron microscope). It is preferable to use an SEM when the film thickness is 10 nm or more, and to use a TEM when the film thickness is less than 10 nm.

[0027] The impurity concentrations of Zn, Te, Si, etc., shall be determined by SIMS analysis. If a peak (maximum value) is present in the SIMS profile, the impurity concentration value of the layer corresponding to that location shall be taken as the peak value. For layers without such peaks, since the dopant concentration value fluctuates significantly near the boundaries of each semiconductor layer, the dopant concentration value at the center of the film thickness direction of each layer shall be taken as the dopant concentration value.

[0028] In this specification, we compare the central wavelengths of emission wavelengths for different active layers and explain them as being the same, but we are not limited to this. The central wavelengths of emission wavelengths may be far apart or approximate to each other. When the central wavelengths of emission wavelengths are far apart, each central wavelength can be assigned a different role. In this specification, the approximation of the central wavelengths of emission wavelengths means that the central wavelengths are positioned such that at least a portion of the range of the full width at half maximum in the emission spectrum overlaps, for example, that the wavelength difference is within the value of the full width at half maximum (e.g., within 100 nm). When the central wavelengths of emission wavelengths are the same or approximate, the emission spectra are combined, which is effective in improving the emission intensity. The above explanation was given for the case of a light-emitting element, but the same applies to the case of a photodetector.

[0029] The optical semiconductor device according to the present invention comprises a semiconductor laminate having at least one active layer and at least one tunnel junction layer, a first n-type electrode and a second n-type electrode, wherein the tunnel junction layer includes a p-type InAlAsSbP layer (e.g., a p-type InAs layer) and an n-type InAlAsSbP layer (e.g., an n-type InAs layer), and the emission center wavelength is 2000 nm or more and 5000 nm or less. Preferably, the number of active layers and the number of tunnel junction layers are the same, and preferably the active layers and tunnel junction layers are stacked alternately. In this way, regions with different conductivity types are stacked as npn, npnpn, npnpnpn or npnpnpnpn. Preferably, the conductivity type of both the uppermost and lowermost layers of the semiconductor laminate is n-type, and they are n-type contact layers. Preferably, the first n-type electrode and the second n-type electrode are electrically connected to the first n-type contact layer and the second n-type contact layer, respectively. Furthermore, since layers with n-type conductivity are advantageous in terms of ease of current flow, the total thickness of layers with p-type conductivity, including the p-type tunnel junction layer, is preferably 500 nm or less. Also, the value obtained by dividing the total thickness of layers with p-type conductivity by the number of active layers is preferably 200 nm or less, and more preferably 130 nm or less. Furthermore, the total film thickness of the layers between the active layer and the tunnel junction layer (including the p-type electron blocking layer), excluding the p-type tunnel junction layer, is preferably 100 nm or less, and more preferably 90 nm or less.

[0030] Embodiments of the present invention will be described below with reference to the drawings. In addition, for the sake of clarity, the aspect ratios of the substrate and each layer in each figure are exaggerated from their actual proportions. Furthermore, in the following, III-V compound semiconductors composed of three or more elements may be described in a form that omits the composition ratio of each element (for example, "InAsSb").

[0031] (First Embodiment) Referring to Figure 1, an example of an optical semiconductor element 100, which is a first embodiment of the optical semiconductor element according to the present invention, will be described along with its manufacturing method. The optical semiconductor element 100 comprises a growth substrate 105 and a semiconductor laminate 120 that emits light when an electric current is applied, comprising a plurality of semiconductor layers stacked on the growth substrate 105. As will be described in detail later, this semiconductor laminate 120 has one semiconductor laminate structure in which one active layer and one tunnel junction layer are stacked. When a negative voltage is applied to the first n-type electrode 191 on the opposite side of the active layer from the tunnel junction layer side, and a current flows in the forward direction between the active layer and the tunnel junction layer side (p-type electron block layer 125 side), a current flows in the reverse direction (from the n-type layer to the p-type layer) in the tunnel junction layer due to the tunnel effect. Therefore, when a positive voltage is applied to the second n-type electrode 195 on the opposite side of the tunnel junction layer from the active layer side, a current flows and it functions as an optical light diode. Furthermore, the optical semiconductor element 100 has a second n-type electrode 195 formed as an n-type ohmic electrode on the upper part of the semiconductor laminate 120 and a first n-type electrode 191 formed as a back electrode on the back surface of the growth substrate 105. In addition, the emission center wavelength of the optical semiconductor element 100 is between 2000 nm and 5000 nm.

[0032] The first embodiment is an optoelectronic semiconductor device 100 in which a first n-type contact layer 121, a first n-type window layer 122, a spacer layer 123, an active layer 124, a p-type electron blocking layer 125, a p-type window layer 126, a tunnel junction layer 127 (p-type tunnel junction layer 1271 and n-type tunnel junction layer 1272), a second n-type window layer 128, and a second n-type contact layer 129 are sequentially deposited on a growth substrate 105, and the growth substrate 105 is used as the substrate as is. Furthermore, the optoelectronic semiconductor device 100 has a first n-type electrode 191 formed as a back surface electrode on the back surface of the growth substrate 105 and a second n-type electrode 195 formed as an n-type ohmic electrode on the upper part of the semiconductor laminate 120.

[0033] <Substrate> A substrate applicable to the optical semiconductor device 100 will be described. The substrate used in the present invention may be any substrate having a thickness sufficient to mechanically maintain the shape of the semiconductor laminate 120 including the active layer 124 and the tunnel junction layer 127, and may be a growth substrate 105 used for epitaxial growth when forming the semiconductor laminate 120 of the optical semiconductor device 100.

[0034] <<Growth Substrate>> As the growth substrate 105, compound substrates such as GaAs, InP, InAs, GaSb, and InSb can be used. However, in InAs-matched systems to GaSb-matched systems, GaAs or InP is lattice-mismatched. Ideally, InAs, GaSb, and InSb substrates should be used to form an active layer containing Sb, but since these substrates are expensive, it is preferable to use a GaAs substrate from a cost perspective. The GaAs growth substrate 105 is preferably Si-doped and an n-type substrate, and the semiconductor laminate 120 is preferably laminated on the (100) plane of the GaAs growth substrate 105. Furthermore, the film thickness of the GaAs growth substrate 105 is preferably 200 μm or more and 900 μm or less.

[0035] When using a substrate with lattice mismatch with the first n-type contact layer 121, such as a GaAs substrate or an InP substrate, as the growth substrate 105, it is preferable to provide a buffer layer between the growth substrate 105 and the first n-type contact layer 121 to mitigate the lattice mismatch, and this buffer layer may include an InAs buffer layer grown at a low temperature. α Ga １－α As β Sb １－β A buffer layer may also be used that employs a compositional gradient or superlattice structure in which the compositional values ​​α and β of each layer are varied in the range of 0 to 1.

[0036] <<First n-type contact layer>> A first n-type contact layer 121 made of a III-V compound semiconductor layer may be provided on the growth substrate 105. The first n-type contact layer 121 has high conductivity and is advantageous in electrode formation. The film thickness of the first n-type contact layer 121 is preferably 20 nm or more and 500 nm or less. Examples of dopants that can be used here include Si, Te, S, Ge, Sn, Se, etc. The dopant concentration of the first n-type contact layer 121 is preferably higher than the dopant concentration of the first n-type window layer 122 which will be described next, and is preferably 8.0 × 10⁻⁶. １８ / cm ３ The above 3.0 x 10 １９ / cm ３ The following is more preferable: The composition of the first n-type contact layer 121 can be, for example, InAs.

[0037] <<First n-type window layer>> A first n-type window layer 122 made of a III-V compound semiconductor layer may be provided on the first n-type contact layer 121, and the film thickness is preferably 500 nm or more and 6000 nm or less. Examples of dopants that can be used here include Si, Te, S, Ge, Sn, Se, etc. When the film thickness of the first n-type window layer 122 is 500 nm or more, even if the lattice constants of the growth substrate 105 and the active layer 124 are different, defects are less likely to propagate to the active layer 124. In addition, if the film thickness of the first n-type window layer 122 is 500 nm or more, a sufficient amount of carriers are supplied to the active layer 124, and the light emission output increases. Furthermore, by making the film thickness of the first n-type window layer 122 6000 nm or less, excess growth that does not offer significant improvement in characteristics is suppressed, reducing raw material costs and contributing to improved productivity.

[0038] The dopant concentration of the first n-type window layer 122 is preferably lower than that of the first n-type contact layer 121, and is 1.0 × 10⁻⁶. １８ / cm ３ The above 8.0 x 10 １８ / cm ３ The following is more preferable.

[0039] The composition of the first n-type window layer 122 is preferably lattice-matched with the composition of the active layer 124. The composition of the first n-type window layer 122 is preferably AlInAs, which has a smaller Al composition ratio (i.e., a smaller band gap) than the p-type electron blocking layer 125 described later, and more preferably InAs.

[0040] <<Spacer Layer>> A spacer layer 123 consisting of an undoped III-V compound semiconductor layer may be provided on the first n-type window layer 122, and the film thickness is preferably 1 nm to 100 nm, and more preferably 20 nm to 90 nm. The spacer layer 123 is preferably a layer that has the same composition as the barrier layer of the active layer 124 or the first n-type window layer 122, and is not doped with an n-type dopant. This spacer layer 123 reduces the amount of n-type dopant that diffuses from the first n-type window layer 122 to the active layer 124.

[0041] <Active layer> An active layer 124 is provided on the spacer layer 123. The active layer 124 is an InAs light-emitting layer. ｘ１ Sb １－ｘ１ It may include layers (0 < x1 < 1). In Figure 1, the active layer 124 is InAs ｙ１ P １－ｙ１ It further has layers (0 < y1 < 1), InAs ｘ１ Sb １－ｘ１ The layer is defined as the activated well layer 124w, and InAs ｙ１ P １－ｙ１ The diagram illustrates a quantum well structure in which the active layer is a barrier layer 124b, but the active layer 124 is InAs ｘ１ Sb １－ｘ１A single-layer structure is also acceptable. The quantum well structure can have a minimum configuration of 1.5 sets consisting of the first barrier layer 124b, the well layer 124w, and the barrier layer 124b. Furthermore, the composition other than Sb is not limited to In and As, but other III-V compound semiconductors may be used. It is also preferable to adjust the composition difference between the well layer 124w of the active layer and the barrier layer 124b of the active layer to apply strain to the well layer. The active layer 124 having the quantum well structure preferably has a multiple quantum well (MQW) structure with a large number of sets, as shown in Figure 1, in order to improve optical output by suppressing crystal defects. This multiple quantum well structure can be formed by alternatingly repeating the well layer 124w and the barrier layer 124b. When using a multiple quantum well structure, the combination of the well layer 124w and the barrier layer 124b is preferably 3 to 40 sets. That is, including the first barrier layer 124b, 3.5 to 40.5 sets is preferable. Furthermore, the film thickness of each well layer 124w is preferably 5 nm to 40 nm, and the film thickness of each barrier layer 124b is preferably 10 nm to 50 nm. Also, the active layer 124 is preferably undoped. Furthermore, the above composition of the well layer 124w or the active layer 124 is preferably InGaAlAs ｘ１ Sb １－ｘ１ By adjusting the composition ratio of Ga and Al, the emission center wavelength of the optical semiconductor element 100 can be set in the range of 2000 nm to 5000 nm. Preferably, the emission center wavelength of the optical semiconductor element 100 is 2100 nm to 4800 nm. More preferably, the emission center wavelength of the active layer 124 is 3000 nm or more. In addition to InAsP, the barrier layer 124b can also be made of AlInAs or the like.

[0042] <p-type intermediate layer between the active layer and the tunnel junction layer> A p-type intermediate layer is located between the active layer 124 and the tunnel junction layer 127. The total thickness of the layer between the active layer 124 and the tunnel junction layer 127 (also called the total thickness) is preferably 100 nm or less, and more preferably 20 nm or more and 90 nm or less. Furthermore, it is preferable that this p-type intermediate layer includes a p-type electron blocking layer 125. If there are multiple pairs of active layers and tunnel junction layers sandwiching a p-type intermediate layer, it is sufficient that the above thickness range is satisfied in each p-type intermediate layer.

[0043] <p-type electron blocking layer> A p-type electron blocking layer 125 made of a III-V compound semiconductor layer may be provided on the active layer 124, and the film thickness is preferably 5 nm or more and 60 nm or less. Examples of dopants that can be used here include Mg, Zn, C, Be, etc. The p-type dopant concentration is 1.0 × 10⁻⁶. １８ / cm ３ The above 5.0 x 10 １８ / cm ３ The following is preferable. This p-type electron blocking layer 125 is a layer that injects and confines carriers into the active layer 124. In addition, the p-type electron blocking layer 125 also has the effect of reducing the diffusion of p-type dopants from the tunnel junction layer 127 to the active layer 124, which will be described later.

[0044] The composition of the p-type electron block layer 125 is Al ｚ１ In １－ｚ１ It is preferable that As (0.05 ≤ z1 ≤ 0.40), and Al ｚ１ In １－ｚ１ It is more preferable that As (0.10 ≤ z1 ≤ 0.35). This is because setting the Al composition z1 to 0.05 or higher can improve the luminescence efficiency of the p-type electron blocking layer 125, and setting it to 0.40 or lower can suppress the decrease in luminescence efficiency due to a high forward voltage. Furthermore, it is preferable that the p-type dopant concentration of the p-type electron blocking layer 125 is smaller than the p-type dopant concentration doped into the p-type tunnel junction layer 1271, which will be described later.

[0045] <p-type window layer> A p-type window layer 126 may be further provided on the p-type electron block layer 125. The composition of the p-type window layer 126 is preferably such that the Al composition is smaller than the composition z1 of the p-type electron block layer 125, and is more preferably such as InAs. The p-type dopant concentration is 1.0 × 10⁻⁶. １８ / cm ３ The above 5.0 x 10 １８ / cm ３ The following is preferable:

[0046] The p-type intermediate layer between the active layer 124 and the tunnel junction layer 127 may contain layers other than the p-type electron blocking layer 125 or the p-type window layer 126 described above. Even in this case, the present invention can keep the dopant concentration in the tunnel junction layer 127 low, so even if diffusion of p-type dopant from the p-type tunnel junction layer 1271 occurs, the p-type dopant concentration in the p-type intermediate layer can be kept low, for example, 5.0 × 10⁻⁶. １８ / cm ３ The following is possible. Furthermore, it is preferable to make the total film thickness of the entire layer between the active layer 124 and the tunnel junction layer 127 100 nm or less. By making it this thin while suppressing the diffusion of the dopant, it is expected that the forward voltage of the entire device can be reduced.

[0047] <Tunnel Joint Layer> A tunnel joint layer 127 is provided on the p-type window layer 126, consisting of a p-type tunnel joint layer 1271 and an n-type tunnel joint layer 1272 that are lattice-matched to InAs. The n-type tunnel joint layer 1272 is directly deposited on the p-type tunnel joint layer 1271. As described above, the p-type tunnel joint layer 1271 is a p-type InAlAsSbP layer, and the n-type tunnel joint layer 1272 is an n-type InAlAsSbP layer. The p-type tunnel joint layer 1271 is preferably a p-type InAs layer, and the n-type tunnel joint layer 1272 is preferably an n-type InAs layer. The thickness of the tunnel joint layer 127 is preferably 10 nm or more and 200 nm or less. Examples of dopants that can be used in the p-type tunnel junction layer 1271 include Mg, Zn, C, and Be, while examples of dopants that can be used in the n-type tunnel junction layer 1272 include Si, Te, S, Ge, Sn, and Se. The p-type tunnel junction layer 1271 is located on the active layer 124 side of the tunnel junction layer 127. The film thickness and dopant concentrations of the p-type tunnel junction layer 1271 and the n-type tunnel junction layer 1272 may be the same or different. Furthermore, the dopant concentrations of the p-type tunnel junction layer 1271 and the n-type tunnel junction layer 1272 do not need to be uniform within the layers; a concentration gradient is acceptable.

[0048] Normally, forming a tunnel junction requires extremely high doping rates for the semiconductor, so that the depletion layer at the junction between the n-type and p-type semiconductor layers becomes thin enough for quantum tunneling to occur. For compound semiconductors, this requires at least 1.0 × 10⁻¹⁶ doping rates. １９ / cm ３ (preferably 1.0 × 10) ２０ / cm ３ A dopant concentration of ) is required. However, in this invention, a dopant concentration of 1.0 × 10 is required. １８ / cm ３ The above 1.0 x 10 １９ / cm ３ Tunnel junction was achieved even with a dopant concentration of less than 5.0 × 10⁻¹⁰. １８ / cm ３ The above 9.0 x 10 １８ / cm ３The following is more preferable: Less dopant diffusion into the active layer 124 leads to improved reliability and other characteristics, so if quantum tunneling can be generated, a lower dopant concentration in the tunnel junction layer 127 is preferable. Also, a lower dopant concentration and a higher resistance of the tunnel junction layer 127 when energized is expected to spread the current reaching the active layer 124, thereby improving output. A lower dopant concentration is also expected to improve output due to reduced light absorption within the layer.

[0049] <<p-type tunnel junction layer>> The p-type dopant concentration in the p-type tunnel junction layer 1271 is 1.0 × 10⁻⁶ １８ atoms / cm ３ The above 1.0 x 10 １９ atoms / cm ３ Preferably less than 9.0 × 10 １８ atoms / cm ３ The following is more preferable: The film thickness is preferably 5 nm or more and 100 nm or less.

[0050] <<n-type tunnel junction layer>> The n-type dopant concentration in the n-type tunnel junction layer 1272 is 1.0 × 10⁻⁶ １８ atoms / cm ３ The above 1.0 x 10 １９ atoms / cm ３ Preferably less than 9.0 × 10 １８ atoms / cm ３ The following is more preferable: The film thickness is preferably 5 nm or more and 100 nm or less.

[0051] <<2n-Type Window Layer>> A 2n-type window layer 128 made of a III-V compound semiconductor layer may be provided on the tunnel junction layer 127, and the film thickness is preferably 500 nm or more and 2000 nm or less. When the 2n-type window layer 128 is 2000 nm or less, the current spreads over an appropriate range of the LED chip. As a result, surface recombination can be suppressed, and the ohmic resistance of the device can be reduced, so that the luminous efficiency can be improved. Further, when the 2n-type window layer 128 is 500 nm or more, it is possible to prevent light emission only directly under the electrode and to efficiently extract light. Dopants that can be used here include Si, Te, S, Ge, Sn, Se, etc. The dopant concentration of the 2n-type window layer 128 is １８ atoms / cm ３ or more and 5.0×10 １８ atoms / cm ３ or less, preferably 1.0×10 １８ atoms / cm ３ or more and 3.0×10 １８ atoms / cm ３ or less. Note that the dopant used is preferably the same as that of the aforementioned n-type tunnel junction layer.

[0052] The dopant concentration of the 2n-type window layer 128 is preferably lower than that of the 2n-type contact layer 129, and more preferably 1.0×10 １８ / cm ３ or more and 8.0×10 １８ / cm ３ or less. The composition of the 2n-type window layer 128 is preferably a composition lattice-matched to the composition of the active layer 124. The composition of the 2n-type window layer 128 is preferably AlInAs having a smaller Al composition ratio (that is, a smaller bandgap) than that of the aforementioned p-type electron blocking layer 125, and more preferably InAs.

[0053] <<Second n-type contact layer>> A second n-type contact layer 129 made of a III-V compound semiconductor layer may be provided on the second n-type window layer 128, and the film thickness is preferably 20 nm or more and 300 nm or less. The dopant concentration of the second n-type contact layer 129 is higher than the dopant concentration of the second n-type window layer 128, 1.0 × 10⁻⁶ １８ atoms / cm ３ The above 3.0 x 10 １９ atoms / cm ３ Preferably, it is 1.0 × 10 １８ atoms / cm ３ The above 1.0 x 10 １９ atoms / cm ３ The following is more preferable: The composition of the second n-type contact layer 129 can be, for example, InAs.

[0054] <First n-type electrode and second n-type electrode> A second n-type electrode 195 is provided on a part of the second n-type contact layer 129. Furthermore, a first n-type electrode 191 is provided on the back surface of the growth substrate 105. The growth substrate 105 and the semiconductor laminate 120 are sandwiched between the first n-type electrode 191 and the second n-type electrode 195. That is, the description of the first n-type electrode 191 and the second n-type electrode 195 sandwiching the semiconductor laminate 120 is not limited to directly sandwiching the semiconductor laminate 120, but may be sandwiched via the substrate. Furthermore, a mesa may be formed on the semiconductor laminate 120, and a part of the first n-type contact layer 121 may be exposed to provide the first n-type electrode 191, resulting in a top-surface two-electrode configuration (flip-chip type) sandwiching. Here, the second n-type electrode 195 may include the wiring portion and pad portion of the ohmic electrode, and although not shown, the pad portion may have a bonding metal layer or solder. The metal materials and forming methods used for the first n-type electrode 191 and the second n-type electrode 195 can be those that are known. Examples of metal materials that can be used include Ti, Pt, Au, Ag, Al, Zn, and Ni.

[0055] The following describes an example of an embodiment of the manufacturing method for the optical semiconductor device 100 described above. When the growth substrate 105 is n-type or undoped, the optical semiconductor device 100 is epitaxially grown by sequentially growing an active layer 124 and a tunnel junction layer 127 that is lattice-matched to InAs. A p-type tunnel junction layer 1271 is located on the active layer 124 side of the tunnel junction layer 127. In addition, an n-type tunnel junction layer 1272 is formed in contact with the p-type tunnel junction layer 1271. The dopant concentration of the tunnel junction layer 127 is 1.0 × 10⁻¹⁶. １８ atoms / cm ３ The above 1.0 x 10 １９ atoms / cm ３ It is preferable that it be less than [a certain value].

[0056] A p-type electron blocking layer 125 or a p-type window layer 126 with a total film thickness of 100 nm or less may be formed between the active layer 124 and the tunnel junction layer 127. Furthermore, one or more layers from the first n-type contact layer 121, the first n-type window layer, and the spacer layer 123 may be formed between the growth substrate 105 and the active layer 124, and one or more layers from the second n-type window layer 128 and the second n-type contact layer 129 may be formed on the tunnel junction layer 127.

[0057] The semiconductor laminate 120 is sandwiched between the second n-type electrode 195 on the second n-type contact layer 129 and the first n-type electrode 191 on the back surface of the growth substrate 105. The second n-type electrode 195 and the first n-type electrode 191 can be formed, for example, by vapor deposition.

[0058] Each semiconductor layer can be formed by epitaxial growth, for example, by known thin-film growth methods such as metal-organic chemical vapor deposition (MOCVD) or molecular beam epitaxy (MBE). For example, trimethylindium (TMIn) can be used as the In source, trimethylgallium (TMGa) or triethylgallium (TEGa) as the Ga source, trimethylaluminum (TMAl) as the Al source, and arsine (AsH) as the As source. ３), or tert-butylarsine (TBAs), with trimethylantimony (TMSb), triethylantimony (TESb), or trisdimethylaminoantimony (TDMASb) as the Sb source, and phosphine (PH) as the P source. ３ By using ), or tert-butylphosphine (TBP) in a predetermined mixing ratio, and growing these raw material gases in the vapor phase using a carrier gas, a desired thickness can be formed depending on the growth time. If each layer is to be doped into p-type or n-type, a dopant source gas can be used as desired. For example, when doping with Zn, DEZn (diethylzinc) gas can be used. In addition, InAs will be n-type even when undoped.

[0059] When a forward voltage is applied from the second n-type electrode 195 to the first n-type electrode 191, a forward voltage is applied to the active layer 124, causing the active layer 124 to emit light. At this time, a reverse voltage is applied to the tunnel junction (pn junction) in the tunnel junction layer 127. As a result, current flows in the tunnel junction layer 127 in the reverse direction due to the tunnel effect.

[0060] (Second Embodiment) Referring to Figure 2, an optical semiconductor element 200 according to a second embodiment of the present invention will be described. The optical semiconductor element 200 is a junction type optical semiconductor element obtained by bonding a support substrate and then removing a growth substrate. Components identical to those of the optical semiconductor element 100 are, in principle, assigned the same reference number in the last two digits of the three-digit number, and redundant explanations are omitted. This optical semiconductor element 200 comprises at least a support substrate 280, a metal bonding layer 279 and a metal reflective layer 271 provided on the surface of the support substrate 280, a power distribution section 260 having a transparent insulating layer 261 with through holes on the metal reflective layer 271 and an ohmic electrode portion as a second n-type electrode 295 provided in the through holes, a semiconductor laminate 220 provided on the power distribution section 260, and a first n-type electrode 291 provided on a part of the semiconductor laminate 220.

[0061] In the optical semiconductor device 200 shown in Figure 2, the semiconductor laminate 220 has, in order from the side opposite to the support substrate 280, a first n-type contact layer 221, a first n-type window layer 222, a spacer layer 223, an active layer 224, a p-type electron blocking layer 225, a p-type window layer 226, a tunnel junction layer 227, a second n-type window layer 228, and a second n-type contact layer 229.

[0062] The support substrate 280, which is different from the growth substrate, is preferably less expensive and has higher thermal conductivity than the growth substrate. For example, in addition to compound substrates such as Si, Ge, and GaAs, metal substrates using metals that can suppress the coefficient of thermal expansion, such as copper alloys, molybdenum, tungsten, and Kovar, or submount substrates with metal attached to ceramic substrates such as AlN can be used. From the standpoint of processability and cost, it is also preferable to use a Si substrate as the support substrate 280.

[0063] Below, an example of an embodiment of the optical semiconductor element 200 and its manufacturing method will be described in more detail with reference to Figures 3 to 5. First, a growth substrate 205 is prepared. Then, referring to Figure 3, a semiconductor laminate 220 is formed. At this time, an etching stop layer (not shown) may be formed on the growth substrate 205. The semiconductor laminate 220 is the same as the semiconductor laminate 120 described above.

[0064] <Formation of the power distribution section and the second n-type electrode> A power distribution section 260 is formed on the second n-type contact layer 229, comprising a transparent insulating film 261 having through holes and an ohmic electrode section as a second n-type electrode 295 provided in the through holes. The specific method for forming the power distribution section 260 is arbitrary, but an example of a specific configuration for forming the power distribution section 260 will be described below with reference to Figures 4 and 5.

[0065] First, a transparent insulating layer 261 is deposited on the semiconductor laminate 220. Known methods such as plasma CVD or sputtering can be applied as the deposition method. Then, a resist pattern for the power distribution section 260 is formed on the transparent insulating layer 261 using a photomask. Next, a portion of the transparent insulating layer 261 is removed by etching using the resist pattern to form through holes. As a result of the through holes, a portion of the outermost surface of the semiconductor laminate 220 is exposed. After that, an ohmic electrode portion as the second n-type electrode 295 is deposited, and then lift-off is performed using the resist pattern to form the power distribution section 260. The transparent insulating layer 261 and the second n-type electrode 295 are arranged in parallel in the power distribution section 260. Although the drawings show the second n-type electrode 295 filling the through holes for simplification, this is not limited to this, and a gap may be created between the transparent insulating layer 261 and the second n-type electrode 295.

[0066] The second n-type electrode 295 can be formed by dispersing it in an island-like manner in a predetermined pattern. For example, Au, AuZn, AuBe, AuTi, etc. can be used as the second n-type electrode 295, and it is also preferable to use a laminated structure of these materials. For example, Ti / Au can be used as the second n-type electrode 295. The film thickness (or total film thickness) of the second n-type electrode 295 is not limited, but can be, for example, 300 nm to 1300 nm, more preferably 350 nm to 800 nm.

[0067] <Formation of Metal Reflective Layer> As shown in Figure 4, it is also preferable to form a metal reflective layer 271 on the power distribution section 260. The metal reflective layer 271 may include multiple metal layers, but in addition to Au, Al, Pt, Ti, Ag, etc. can be used as the metal constituting the metal reflective layer 271. For example, the metal reflective layer 271 may be a single layer made only of Au, or it may contain two or more Au metal layers. It is preferable that the metal reflective layer 271 has a composition of 50% by mass or more of Au. In order to ensure bonding with the metal bonding layer 279 in subsequent processes, it is preferable that the outermost layer of the metal reflective layer 271 (the side opposite to the semiconductor laminate 220) be an Au metal layer.

[0068] For example, a metal reflective layer 271 can be formed by depositing each metal in the order of Al, Au, Pt, and Au on the power distribution section 260 (including the gap if one is provided). The thickness of the Au1 layer in the metal reflective layer 271 can be, for example, 400 nm to 2000 nm, and the thickness of the metal layer made of metals other than Au can be, for example, 5 nm to 200 nm. The metal reflective layer 271 can be formed by depositing a film using general means such as vapor deposition.

[0069] <Bonding to the support substrate> The bonding to the support substrate will be explained with reference to Figure 4. The semiconductor laminate 220 and the power distribution section 260 are bonded to the support substrate 280 via at least a metal bonding layer 279. A metal reflective layer 271 may be provided to bond the metal reflective layer 271 to the metal bonding layer 279. The metal bonding layer 279 and the metal reflective layer 271 can be bonded together by arranging them opposite each other and performing heat compression bonding at a temperature of about 250°C to 500°C.

[0070] <Metal bonding layer> A metal bonding layer 279 can be formed using metals such as Ti, Pt, and Au, or metals that form a eutectic alloy with Au (such as Sn), or solder, and it is preferable to form the metal bonding layer 279 by laminating these. For example, the metal bonding layer 279 can be formed by laminating Ti with a thickness of 400 nm to 800 nm, Pt with a thickness of 5 nm to 20 nm, and Au with a thickness of 700 nm to 1200 nm in order from the surface of the support substrate 280. For example, when bonding a metal reflective layer 271 and a metal bonding layer 279, the outermost layer of the metal bonding layer 279 can be made of Au metal, and the outermost layer of the metal reflective layer 271 can also be made of Au, and bonding between Au can be performed by Au-Au diffusion.

[0071] <Support Substrate> The support substrate 280 can be any substrate different from the growth substrate 205, and can be a submount substrate based on the semiconductor substrate, metal substrate, or ceramic substrate mentioned above. Because the bonding method described above is used, the support substrate 280 may have lattice mismatch with each semiconductor layer formed in this embodiment. The support substrate 280 may be insulating depending on the application, but it is preferable that it be a conductive substrate. From the standpoint of processability and cost, it is preferable to use a Si substrate for the support substrate 280. By using a Si substrate, the thickness of the support substrate 280 can be made significantly smaller than conventional substrates, making it suitable for mounting in combination with various semiconductor devices. In addition, Si substrates are advantageous in terms of heat dissipation compared to InAs substrates or GaAs substrates.

[0072] <Removal of Growth Substrate> The removal of the growth substrate will be explained with reference to Figure 5. After bonding the support substrate 280, the growth substrate 205 is removed. If the growth substrate 205 is a GaAs substrate, for example, the growth substrate 205 can be wet-etched using an ammonia-hydrogen peroxide mixture. If an etching stop layer is used, the etching stop layer may be removed sequentially following the removal of the growth substrate 205. Alternatively, by leaving a portion of the etching stop layer, it may be used as an n-type contact layer to reduce the contact resistance to the first n-type electrode 291.

[0073] <First n-type electrode> As shown in Figure 2, a first n-type electrode 291 is formed on the semiconductor laminate 220. The semiconductor laminate 220 is sandwiched between the second n-type electrode 295 and the first n-type electrode 291 described above. A back electrode 299 may also be formed on the back surface of the support substrate 280. The first n-type electrode 291 and the back electrode 299 may include wiring portions and pad portions. Known methods can be used to form the first n-type electrode 291 and the back electrode 299, such as sputtering, electron beam deposition (also referred to as deposition), or resistance heating. For electrode pattern formation, in addition to methods using a metal mask, there are methods that combine photolithography, lift-off, and metal etching.

[0074] By the above manufacturing method, the optical semiconductor element 200 shown in Figure 2 can be obtained. These embodiments are illustrative and not limiting; the side surface of the element may be sloped during mesa etching, and the electrode shape may be a top-surface two-electrode type or a flip-chip type, and can be changed as appropriate.

[0075] (Third Embodiment) Next, with reference to Figure 6, an optical semiconductor element 300 according to the third embodiment of the present invention will be described. The third embodiment is an embodiment in which an active layer and a tunnel junction layer are further formed on the tunnel junction layer of the first embodiment. Specifically, the optical semiconductor element 300 in Figure 6 has a semiconductor laminate 320 in which a first n-type contact layer 321, a first n-type window layer 322, a first spacer layer 323, a first active layer 324, a first p-type electron block layer 325, a first p-type window layer 326, a first tunnel junction layer 327, a second spacer layer 330, a second active layer 331, a second p-type electron block layer 332, a second p-type window layer 333, a second tunnel junction layer 334, a second n-type window layer 328, and a second n-type contact layer 329 are sequentially formed on a growth substrate 305. The first active layer 324, the first p-type electron blocking layer 325, the first p-type window layer 326, and the first tunnel junction layer 327 together are referred to as the first semiconductor stacked structure 340, and the second active layer 331, the second p-type electron blocking layer 332, the second p-type window layer 333, and the second tunnel junction layer 334 together are referred to as the second semiconductor stacked structure 350. The semiconductor stacked structure 320 is formed by depositing a first n-type contact layer 321, a first n-type window layer 322, and a first spacer layer 323, then the first semiconductor stacked structure 340 and the second semiconductor stacked structure 350 are superimposed on top of each other via a second spacer layer 330, and a second n-type window layer 328 and a second n-type contact layer 329 are further deposited on top of them. Furthermore, the optical semiconductor element 300 has a second n-type electrode 395 formed as an n-type ohmic electrode on the upper part of the semiconductor laminate 320 and a first n-type electrode 391 formed as a back electrode on the back surface of the growth substrate 305. The growth substrate 305 and the semiconductor laminate 320 are sandwiched between the first n-type electrode 391 and the second n-type electrode 395. The emission center wavelength of the optical semiconductor element 300 is between 2000 nm and 5000 nm. The details of each configuration are described below.

[0076] In the optoelectronic semiconductor device 300, the growth substrate 305, the first n-type contact layer 321, the first n-type window layer 322, and the first spacer layer 323 have the same configuration as the layers below the active layer 124 in the first embodiment, so their description is omitted. The semiconductor laminate 320 has two semiconductor laminate structures in which one active layer and one tunnel junction layer are stacked. When a negative voltage is applied to the first n-type electrode 391 on the side of the first active layer 324 opposite to the first tunnel junction layer 327 side, and a current flows in the forward direction between the first active layer 324 and the first tunnel junction layer 327 side (first p-type electron block layer 325 side), a current flows in the reverse direction (from the n-type layer to the p-type layer) in the tunnel junction layer 327 due to the tunnel effect. Then, when a negative voltage is applied to the first tunnel junction layer 327 side of the second active layer 331, and a current flows in the forward direction between the second active layer 331 and the second tunnel junction layer 334 side (second p-type electron block layer 332 side), a current flows in the reverse direction (from n-type layer to p-type layer) in the second tunnel junction layer 334 due to the tunnel effect. Therefore, when a positive voltage is applied to the second n-type electrode 395 on the side of the second tunnel junction layer 334 that is opposite to the second active layer 331 side, a current flows, and it functions as a so-called double-stack type light-emitting diode with two active layers stacked vertically.

[0077] <First Active Layer> A first active layer 324 is provided on the first spacer layer 323. The first active layer 324 is an InAs light-emitting layer. ｘ１ Sb １－ｘ１ It may include layers (0 < x1 < 1). The first active layer 324 is InAs ｙ１ P １－ｙ１ It further has layers (0 < y1 < 1), InAs ｘ１ Sb １－ｘ１ The layers are the first active layer 324, the well layer 324w, and InAs ｙ１ P １－ｙ１It is preferable to have a first active layer having a quantum well structure in which the layer is the barrier layer 324b of the active layer. Furthermore, the composition other than Sb is not limited to In and As, but other III-V compound semiconductors may be used. Also, strain may be applied to the well layer 324w by adjusting the composition difference between the well layer 324w and the barrier layer 324b of the first active layer 324. It is even more preferable for the first active layer 324 to have a multiple quantum well structure as shown in Figure 6 in order to improve optical output by suppressing crystal defects. This multiple quantum well structure can be formed by a structure in which the well layer 324w and the barrier layer 324b are alternately repeated. When using a multiple quantum well structure, it is preferable that the combination of well layer 324w and barrier layer 324b be between 3 and 40 sets. That is, it is preferable that the combination including the first barrier layer 324b be between 3.5 and 40.5 sets. Furthermore, the film thickness of each well layer 324w is preferably 5 nm to 40 nm, and the film thickness of each barrier layer 324b is preferably 10 nm to 50 nm. Also, the first active layer 324 is preferably undoped. Furthermore, the above composition of the well layer 324w or the first active layer 324 is preferably InGaAlAs ｘ１ Sb １－ｘ１ By adjusting the composition ratio of Ga and Al, the emission center wavelength of the optical semiconductor element 300 can be set in the range of 2000 nm to 5000 nm. Preferably, the emission center wavelength of the optical semiconductor element 300 is 2100 nm to 4800 nm. It is even more preferable that the emission center wavelength of the first active layer 324 is 3000 nm or more. In addition to InAsP, the barrier layer 324b can also be made of AlInAs or the like.

[0078] <Second Active Layer> A second active layer 331 is provided on the second spacer layer 330. Preferably, the first wavelength emitted by the first active layer 324 and the second wavelength emitted by the second active layer 331 are the same or approximate to each other. Also, the second active layer 331 is an InAs light-emitting layer, similar to the first active layer 324. ｘ２ Sb １－ｘ２ Let the layer (0 < x2 < 1) be the well layer 331w, and InAs ｙ２ P １－ｙ２It is preferable to have a second active layer having a quantum well structure with a barrier layer 331b (0 < y2 < 1). Furthermore, the composition other than Sb is not limited to In and As, but other III-V compound semiconductors may be used. Also, strain may be applied to the well layer 331w by adjusting the composition difference between the well layer 331w and the barrier layer 331b of the second active layer 331. It is even more preferable for the second active layer 331 to have a multiple quantum well structure as shown in Figure 6 in order to improve optical output by suppressing crystal defects. This multiple quantum well structure can be formed by a structure in which the well layer 331w and the barrier layer 331b are alternately repeated. When using a multiple quantum well structure, it is preferable that the combination of well layer 331w and barrier layer 331b be between 3 and 40 sets. That is, it is preferable that the number of sets, including the first barrier layer 331b, be between 3.5 and 40.5 sets. Furthermore, the film thickness of each well layer 331w is preferably 5 nm to 40 nm, and the film thickness of each barrier layer 331b is preferably 10 nm to 50 nm. Also, the second active layer 331 is preferably undoped. Furthermore, the above composition of the well layer 331w or the second active layer 331 is preferably InGaAlAs ｘ１ Sb １－ｘ１ By adjusting the composition ratio of Ga and Al, the emission center wavelength of the optical semiconductor element 300 can be set in the range of 2000 nm to 5000 nm. Preferably, the emission center wavelength of the optical semiconductor element 300 is 2100 nm to 4800 nm. It is even more preferable that the emission center wavelength of the second active layer 331 is 3000 nm or more. In addition to InAsP, the barrier layer 331b can also be made of AlInAs or the like.

[0079] <First Tunnel Bonding Layer> A first tunnel bonding layer 327 is provided on the first p-type window layer 326, consisting of a first p-type tunnel bonding layer 3271 and a first n-type tunnel bonding layer 3272 that are lattice-matched to InAs. The first n-type tunnel bonding layer 3272 is directly deposited on the first p-type tunnel bonding layer 3271. The first p-type tunnel bonding layer 3271 can be a p-type InAlAsSbP layer, and the first n-type tunnel bonding layer 3271 can be an n-type InAlAsSbP layer. The thickness of the first tunnel bonding layer 327 is preferably 10 nm or more and 200 nm or less. Dopants that can be used for the first p-type tunnel bonding layer 3271 include Mg, Zn, C, Be, etc., and dopants that can be used for the first n-type tunnel bonding layer 3272 include Si, Te, S, Ge, Sn, Se, etc. A first p-type tunnel junction layer 3271 is located on the first active layer 324 side of the first tunnel junction layer 327. A first n-type tunnel junction layer 3272 is located on the second active layer 331 side of the first tunnel junction layer 327. The film thickness and dopant concentration of the first p-type tunnel junction layer 3271 and the first n-type tunnel junction layer 3272 may be the same or different. Furthermore, the dopant concentration of the first p-type tunnel junction layer 3271 and the first n-type tunnel junction layer 3272 does not need to be uniform within the layers; a concentration gradient is acceptable.

[0080] <<First p-type tunnel junction layer>> The p-type dopant concentration in the first p-type tunnel junction layer 3271 is 1.0 × 10 １８ atoms / cm ３ The above 1.0 x 10 １９ atoms / cm ３ Preferably less than 9.0 × 10 １８ atoms / cm ３ The following is more preferable: The film thickness is preferably 5 nm or more and 100 nm or less.

[0081] <<First n-type tunnel junction layer>> The n-type dopant concentration in the first n-type tunnel junction layer 3272 is 1.0 × 10 １８ atoms / cm ３ The above 1.0 x 10 １９ atoms / cm ３ Preferably less than 9.0 × 10１８ atoms / cm ３ The following is more preferable: The film thickness is preferably 5 nm or more and 100 nm or less.

[0082] <Second Tunnel Joint Layer> A second tunnel joint layer 334 is provided on the second p-type window layer 333, consisting of a second p-type tunnel joint layer 3341 and a second n-type tunnel joint layer 3342 that are lattice-matched to InAs. It is preferable that the second tunnel joint layer 334 has the same configuration as the first tunnel joint layer 327. That is, it is preferable that not only are the compositions of the first p-type tunnel joint layer 3271 and the second p-type tunnel joint layer 3341, and the second n-type tunnel joint layer 3272 and the second n-type tunnel joint layer 3342 the same, but their respective dopants are also the same. The film thickness and dopant concentration of the second p-type tunnel joint layer 3341 and the second n-type tunnel joint layer 3342 may be the same or different. The film thickness and dopant concentration of the first p-type tunnel junction layer 3271 and the second p-type tunnel junction layer 3341, and the first n-type tunnel junction layer 3272 and the second n-type tunnel junction layer 3342 may be the same or different. Furthermore, the dopant concentration of the second p-type tunnel junction layer 3341 and the second n-type tunnel junction layer 3342 does not need to be uniform within the layer, and a concentration gradient may exist. For example, it is preferable to use Te or Si as the dopant of the second n-type tunnel junction layer 3342, and it is preferable to use Si as the dopant of the first n-type tunnel junction layer 3272. In this way, by using Si, which is less prone to dopant diffusion, in the n-type tunnel junction layer that is in close proximity to the active layer without a p-type layer in between, the required spacer layer thickness can be reduced, and the luminescence efficiency can be further improved.

[0083] <<Second Spacer Layer>> It is preferable to provide a second spacer layer 330 between the first tunnel junction layer 327 and the second active layer 331, and the thickness of the second spacer layer 330 is preferably 100 nm or less. It is more preferable that the thickness of the second spacer layer 330 be 90 nm or less, and even more preferable that it be 80 nm or less. It is preferable that the second spacer layer 330 has the same composition as the barrier layer 331b of the second active layer 331 or the first n-type tunnel junction layer 3272, and is a layer that is not doped with an n-type dopant. This second spacer layer 330 has the effect of reducing the amount of the n-type dopant from the first n-type tunnel junction layer 3272 that diffuses into the second active layer 331. In addition, there may be layers other than the second spacer layer 330 between the first tunnel junction layer 327 and the second active layer 331. Even in this case, it is preferable that the total thickness of all layers between the first tunnel junction layer 327 and the second active layer 331 is 100 nm or less.

[0084] <p-type intermediate layer between the first active layer and the first tunnel junction layer> The space between the first active layer 324 and the first tunnel junction layer 327 is a first p-type intermediate layer. The total thickness of the layer between the first active layer 324 and the first tunnel junction layer 327 is preferably 100 nm or less. Furthermore, this first p-type intermediate layer preferably includes a first p-type electron blocking layer 325.

[0085] <First p-type electron blocking layer> A first p-type electron blocking layer 325, consisting of a III-V compound semiconductor layer, may be provided on the first active layer 324, and the film thickness is preferably 5 nm or more and 60 nm or less. Examples of dopants that can be used here include Mg, Zn, C, Be, etc. The p-type dopant concentration is 1.0 × 10⁻⁶. １８ / cm ３ The above 5.0 x 10 １８ / cm ３ The following is preferable. This first p-type electron blocking layer 325 is a layer that injects and confines carriers into the first active layer 324. The first p-type electron blocking layer 325 also has the effect of reducing the diffusion of p-type dopants from the first tunnel junction layer 327 to the first active layer 324.

[0086] The composition of the first p-type electron block layer 325 is Al ｚ１In １－ｚ１ It is preferable that As (0.05 ≤ z1 ≤ 0.40), and Al ｚ１ In １－ｚ１ It is more preferable that As (0.10 ≤ z1 ≤ 0.35). This is because setting the Al composition z1 to 0.05 or higher can improve the luminescence efficiency of the first p-type electron blocking layer 325, and setting it to 0.40 or lower can suppress the decrease in luminescence efficiency due to a high forward voltage. Furthermore, it is preferable that the p-type dopant concentration of the first p-type electron blocking layer 325 is smaller than the p-type dopant concentration doped into the first p-type tunnel junction layer 3271.

[0087] <First p-type window layer> A first p-type window layer 326 may be provided on top of the first p-type electron blocking layer 325. The composition of the first p-type window layer 326 is preferably such that the Al composition is smaller than the composition z1 of the first p-type electron blocking layer 325, and is more preferably such as InAs. The p-type dopant concentration is 1.0 × 10⁻⁶. １８ / cm ３ The above 5.0 x 10 １８ / cm ３ The following is preferable:

[0088] The first p-type intermediate layer between the first active layer 324 and the first tunnel junction layer 327 may contain layers other than the first p-type electron blocking layer 325 or the first p-type window layer 326 described above. Even in this case, the present invention makes it possible to keep the dopant concentration in the first tunnel junction layer 327 low, so even if diffusion of p-type dopant occurs from the first p-type tunnel junction layer 3271, the p-type dopant concentration in the first p-type intermediate layer can be kept low, for example, 5.0 × 10⁻⁶. １８ / cm ３ The following is possible. Furthermore, it is preferable to make the total film thickness of the entire layer between the first active layer 324 and the first tunnel junction layer 327 100 nm or less. By making it this thin while suppressing the diffusion of the dopant, it is expected that the forward voltage of the entire device can be reduced.

[0089] <<Second p-type electron blocking layer>> A second p-type electron blocking layer 332 made of a III-V compound semiconductor may be provided on the second active layer 331, and the film thickness is preferably 5 nm or more and 60 nm or less. The second p-type electron blocking layer 332 may have the same configuration as the first p-type electron blocking layer 325. This second p-type electron blocking layer 332 is a layer that implants and confines carriers into the second active layer 331. The second p-type electron blocking layer 332 also has the effect of reducing the diffusion of p-type dopant from the second tunnel junction layer 334 to the second active layer 331. The p-type dopant concentration of the second p-type electron blocking layer 332 is preferably smaller than the p-type dopant concentration doped into the second p-type tunnel junction layer 3341.

[0090] <<Second p-type window layer>> A second p-type window layer 333 may be provided on the second p-type electronic block layer 332. The second p-type window layer 333 may have the same configuration as the first p-type window layer 326.

[0091] The layers above the second tunnel junction layer 334, the second n-type electrode 395, and the first n-type electrode 391 have the same configuration as the layers above the tunnel junction layer 127, the second n-type electrode 195, and the first n-type electrode 191 in the first embodiment, so their description is omitted.

[0092] In the optical semiconductor device 300 according to the third embodiment, the semiconductor layers described above may be sequentially deposited on the growth substrate 305 to form an electrode structure. In this case, similar to the second embodiment, the growth substrate may be removed while a different type of support substrate is bonded to it using the bonding method described above.

[0093] In the first and second embodiments described above, an embodiment having one semiconductor stacked structure was described, and in the third embodiment, an embodiment having two semiconductor stacked structures was described. However, this disclosure is also applicable to semiconductor light-emitting elements, which are optical semiconductor elements having three or more semiconductor stacked structures.

[0094] (Fourth Embodiment: Photodetector) This disclosure is also applicable to semiconductor photodetectors, which are optical semiconductor devices, and a semiconductor photodetector according to the fourth embodiment of the present invention will be described. For example, by replacing the active layer in the first embodiment with a light-absorbing layer, the optical semiconductor device of the present invention can be used as an optical semiconductor photodetector, and a semiconductor photodetector with good optical characteristics can be realized. Similarly, by replacing the active layer in the second and third embodiments with a light-absorbing layer, a semiconductor photodetector with good optical characteristics can be realized.

[0095] [Experimental Example 1] (Example 1) First, using the MOCVD method, a Te-doped, high-dopant concentration first n-type InAs contact layer 221 (film thickness: 0.3 μm), a Te-doped first n-type InAs layer 222 (film thickness: 4.9 μm), and an undoped InAs spacer layer 223 (film thickness: 75 nm) were sequentially formed on the (100) surface of a Si-doped n-type GaAs growth substrate 205 (substrate film thickness: 350 μm). Next, an active layer 224 with a multiple quantum well structure (total film thickness: 430 nm) with an emission center wavelength of 4300 nm was formed. The active layer 224 with a multiple quantum well structure is undoped InAs ０．８９ P ０．１１ Barrier layer 224b (film thickness: 30 nm) and InAs ０．８７ Sb ０．１３ After alternately stacking 10 layers each of well layer 224w (film thickness: 10 nm) and InAs, ０．８９ P ０．１１ A barrier layer 224b (film thickness: 30 nm) was stacked, resulting in 10.5 sets including the last barrier layer 224b. Zn-doped p-type Al was placed on the active layer 224. ０．３２ In ０．６８ An As electron blocking layer 225 (film thickness: 15 nm) and a Zn-doped p-type InAs window layer 226 (film thickness: 50 nm) were formed in sequence, and a tunnel junction layer 227 was formed on top of them.

[0096] The tunnel junction layer 227 was formed by directly creating a Te-doped n-type InAs tunnel junction layer 2272 (film thickness: 50 nm) on a Zn-doped p-type InAs tunnel junction layer 2271 (film thickness: 50 nm), thereby achieving a tunneling effect at the interface between them. The pressure during the growth of the tunnel junction layer 227 was set to 50 Torr, and the ratio of group V elements to group III elements (VIII ratio) in the source gas used was set to 50.

[0097] Next, a Te-doped second-type InAs window layer 228 (film thickness: 0.9 μm) and a Te-doped, high-dopant concentration second-type InAs contact layer 229 (film thickness: 0.1 μm) were sequentially formed on the tunnel junction layer 227.

[0098] Table 1 below describes the composition and film thickness of each layer, the type of dopant, and the dopant concentration determined by SIMS analysis, including dopant diffusion, after all epitaxial growth is complete and the material is removed from the MOCVD apparatus. The total film thickness of the layers between the active layer and the tunnel junction layer (total of the p-type window layer and the p-type electron blocking layer) is 65 nm and less than or equal to 100 nm. The source gases selected for the formation of each layer were trimethylindium (TMIn) as the In source, trimethylgallium (TMGa) as the Ga source, trimethylaluminum (TMAl) as the Al source, and arsine (AsH) as the As source. ３ ), triethylantimony (TESb) as the Sb source, and phosphine (PH) as the P source. ３ ) was used. In addition, DEZn (diethylzinc) was used as the dopant gas for Zn, and DETe (diethyltellurium) was used as the dopant gas for Te.

[0099] A BRUKER JV-QC3 XRD instrument was used to measure the composition of each layer. The composition of each layer was calculated by fitting using analysis software (Jordan Valley RADS). The film thickness of each layer was calculated from cross-sectional observation of the growth layer using SEM (scanning electron microscope) or TEM (transmission electron microscope).

[0100]

[0101] Plasma CVD is used to create SiO across the entire surface of the second n-type InAs contact layer 229. ２ A transparent insulating film 261 (film thickness: 550 nm) was formed. A power distribution pattern was formed on it using a resist, and the SiO in the region not covered by the resist was formed. ２ The ohmic metal part was removed by etching to expose the second n-type InAs contact layer 229. Next, Ti (film thickness: 10 nm) and Au (film thickness: 530 nm) were deposited sequentially by vapor deposition as ohmic metal parts. By removing the resist of the power distribution pattern along with the metal deposited thereon, only the ohmic metal parts formed on the exposed second n-type InAs contact layer 229 remained, and the power distribution section 260 was formed in which the ohmic metal parts and the transparent insulating film 261 were arranged in parallel as the second n-type electrode 295. Furthermore, a metal reflective layer 271 (Al (film thickness: 10 nm) / Au (film thickness: 650 nm) / Pt (film thickness: 100 nm) / Au (film thickness: 900 nm)) was formed on the power distribution section 260 by vapor deposition.

[0102] A metal bonding layer 279 (Ti (film thickness: 650 nm) / Pt (film thickness: 20 nm) / Au (film thickness: 900 nm)) was formed on a support substrate 280 (conductive Si substrate, film thickness: 200 μm) by vapor deposition. The metal reflective layer 271 and the metal bonding layer 279 were placed opposite each other and heat compression bonding was performed at 300°C. Next, the growth substrate 205 was removed by wet etching using an ammonia-hydrogen peroxide solution to expose the first n-type contact layer 221. Ti (film thickness: 150 nm) and Au (film thickness: 1250 nm) were sequentially formed on the first n-type contact layer 221 by vapor deposition, and the first n-type ohmic electrode and pad electrode were combined to form the first n-type electrode 291. A lift-off method using resist was used to form the pattern of the first n-type electrode 291.

[0103] Next, the semiconductor laminate 220 between each element (width: 60 μm) was removed by mesa etching to form a dicing line. Then, a back electrode 299 (Ti (film thickness: 10 nm) / Pt (film thickness: 50 nm) / Au (film thickness: 200 nm)) was formed on the back surface of the support substrate 280 by vapor deposition, and the ohmic metal portion, the first n-type electrode, and the back electrode were alloyed by heat treatment at 300°C for 1 minute. Next, the entire wafer was immersed in a nitric acid solution maintained at 8°C ± 1°C for 5 seconds to roughen the surface of the semiconductor laminate 220 except for the area where the first n-type electrode 291 was formed. After that, it was immersed in ammonia water for 1 minute and then washed with pure water for 1 minute. In the roughened and pre-dicing state, the support substrate 280 was placed on a prober with the back electrode 299 facing downwards, and prober measurements were performed on each element. Finally, chip fragmentation was performed by dicing to fabricate the optical semiconductor element according to Example 1. The chip size is 500 μm x 500 μm.

[0104] (Example 2) In the same manner as in Example 1, each semiconductor layer was epitaxially grown up to the first tunnel junction layer 327. Next, a second active layer 331 and a second tunnel junction layer 334 were formed sequentially on the first tunnel junction layer 327. On the second tunnel junction layer 334, a second n-type window layer 328 and a second n-type contact layer 329 were formed sequentially, in the same manner as on the tunnel junction layer 227 of Example 1. Furthermore, in the same manner as in Example 1, a first n-type electrode and a second n-type electrode were formed, and a support substrate was bonded and the growth substrate was removed to obtain a junction-type semiconductor element 300. The second active layer 321 has the same film thickness and composition as the first active layer 324, and the second tunnel junction layer 334 has the same film thickness and composition as the first tunnel junction layer 327. A second spacer layer 330 having the same film thickness and composition as the first spacer layer 323 was formed between the first tunnel junction layer 327 and the second active layer 331. Furthermore, a second p-type electron blocking layer 332 and a second p-type window layer were sequentially formed between the second active layer 331 and the second tunnel junction layer 334, each having the same film thickness and composition as the first p-type electron blocking layer 325 and the first p-type window layer, respectively.

[0105] Table 2 below describes the composition and film thickness of each layer, the type of dopant, and the dopant concentration determined by SIMS analysis, including dopant diffusion, after all epitaxial growth was completed and the samples were removed from the MOCVD apparatus. The film thickness of the entire layer between the first active layer and the first tunnel junction layer (total of the p-type window layer and p-type electron blocking layer) was 65 nm, and the film thickness of the entire layer between the second active layer and the second tunnel junction layer (total of the p-type window layer and p-type electron blocking layer) was also 65 nm, both less than 100 nm. A tendency was observed for Te in the first n-type tunnel junction layer to diffuse into the second spacer layer and the first barrier layer on the growth substrate side of the second active layer.

[0106]

[0107] (Example 3) An optical semiconductor device 300 of Example 3 was fabricated in the same manner as in Example 2, except that the dopants of the first n-type tunnel junction layer 3272 and the second n-type tunnel junction layer 3342 were changed from Te to Si, the dopant concentrations were changed, and the dopants of the second n-type window layer and the second n-type contact layer 329 were also changed to Si.

[0108] Table 3 below describes the composition and film thickness of each layer, the type of dopant, and the dopant concentration determined by SIMS analysis, including dopant diffusion, after all epitaxial growth was completed and the samples were removed from the MOCVD apparatus. The film thickness of the entire layer between the first active layer and the first tunnel junction layer (total of the p-type window layer and p-type electron blocking layer) was 65 nm, and the film thickness of the entire layer between the second active layer and the second tunnel junction layer (total of the p-type window layer and p-type electron blocking layer) was also 65 nm, both less than 100 nm. In the Te-doped layer, Te in the first n-type tunnel junction layer tended to diffuse to the first barrier layer on the growth substrate side of the second active layer, but such diffusion was not observed in the Si-doped layer, indicating that Si is preferable to Te as the dopant for the n-type tunnel junction layer.

[0109]

[0110] (Comparative Example 1) A tunnel junction layer 227 is not formed on the p-type InAs window layer 226, and a Zn-doped p-type InAs contact layer (film thickness: 100 nm, dopant concentration: 1.0 × 10) is formed. １９ atoms / cm ３ A photosemiconductor device for Comparative Example 1 was fabricated in the same manner as in Example 1, except that a ) was formed and the number of pairs of multiple quantum well structures in the active layer was set to 20.5 pairs. In this case, the ohmic metal portion as the second n-type electrode is a p-type ohmic metal portion.

[0111] (Comparative Example 2) A second tunnel junction layer 334 is not formed on the second p-type InAs window layer 333, and a Zn-doped p-type InAs contact layer (film thickness: 100 nm, dopant concentration: 1.0 × 10) is formed. １９ atoms / cm ３ A photosemiconductor device for Comparative Example 2 was fabricated in the same manner as in Example 2, except that the ohmic metal portion was formed. In this case, the ohmic metal portion as the second n-type electrode is a p-type ohmic metal portion.

[0112] (Comparative Example 3) A second tunnel junction layer 334 is not formed on the second p-type InAs window layer 333, and a Zn-doped p-type InAs contact layer (film thickness: 100 nm, dopant concentration: 1.0 × 10) is formed. １９ atoms / cm ３ A photosemiconductor device for Comparative Example 3 was fabricated in the same manner as in Example 3, except that the ohmic metal portion was formed. In this case, the ohmic metal portion as the second n-type electrode is a p-type ohmic metal portion.

[0113] (Comparative Example 4) The Si dopant concentration in the first n-type tunnel junction layer was increased, and the dopant concentration was set to 2.3 × 10⁻⁶ １９ atoms / cm ３ Except for the above, the optical semiconductor device for Comparative Example 4 was fabricated in the same manner as for Comparative Example 3.

[0114] (Example 4) The dopant in the first n-type window layer was changed from Te to Si, and the dopant concentration was set to 1.5 × 10⁻⁶. １８ atoms / cm ３ Except as otherwise described above, the optical semiconductor device of Example 4 was fabricated in the same manner as in Example 3.

[0115] (Example 5) In the optical semiconductor device of Example 4, a second n-type window layer was formed on the second tunnel junction layer. In Example 5, a third spacer layer, a third active layer, a third p-type electron blocking layer, a third p-type window layer, and a third tunnel junction layer were further formed on the second tunnel junction layer, and then the second n-type window layer and a second n-type contact layer were formed to fabricate the optical semiconductor device of Example 5. The composition, film thickness, dopant, and dopant concentration of the "third spacer layer, third active layer, third p-type electron blocking layer, third p-type window layer, and third tunnel junction layer" in Example 5 are the same as those of the "second spacer layer, second active layer, second p-type electron blocking layer, second p-type window layer, and second tunnel junction layer" in Table 3.

[0116] (Example 6) In the optical semiconductor device of Example 4, a second n-type window layer was formed on the second tunnel junction layer. In Example 5, a third spacer layer, a third active layer, a third p-type electron blocking layer, a third p-type window layer, and a third tunnel junction layer were further formed on the second tunnel junction layer. Then, a fourth spacer layer, a fourth active layer, a fourth p-type electron blocking layer, a fourth p-type window layer, and a fourth tunnel junction layer were further formed on the third tunnel junction layer, and then the second n-type window layer and a second n-type contact layer were formed to fabricate the optical semiconductor device of Example 6. The composition, film thickness, dopant, and dopant concentration of the "third spacer layer, third active layer, third p-type electron blocking layer, third p-type window layer, and third tunnel junction layer," and the "fourth spacer layer, fourth active layer, fourth p-type electron blocking layer, fourth p-type window layer, and fourth tunnel junction layer" are the same as those of the "second spacer layer, second active layer, second p-type electron blocking layer, second p-type window layer, and second tunnel junction layer" in Table 3.

[0117] Figure 7 is a graph showing the diffusion state of Si and Te ions in the optical semiconductor device fabricated in Example 3, as measured by secondary ion mass spectrometry (SIMS). In Figure 7, the horizontal axis represents depth (μm), and the left vertical axis represents the concentration (atoms / cm³) of the n-type dopant (here, Te, Si, C, H, O). ３ The vertical axis on the right represents the secondary ion intensity of Sb (counts / sec). From the graph in Figure 7, the peak value of Si, which is an n-type dopant doped into the semiconductor laminate 320 in Example 3, is 4.5 × 10⁻⁶.１８ atoms / cm ３ and 5.0 x 10 １８ atoms / cm ３ The positions where these peak values ​​are obtained correspond to the first n-type tunnel junction layer 3272 and the second n-type tunnel junction layer 3342, respectively. From the graph in Figure 7, the semiconductor laminate 320 of Example 3 has a Si concentration of 1.0 × 10 in the first active layer 324 and the second active layer 331. １５ atoms / cm ３ From the following, it can be seen that the Si ions doped into the first n-type tunnel junction layer 3272 and the second n-type tunnel junction layer 3342 have hardly diffused into the first active layer 324 and the second active layer 331.

[0118] In the semiconductor laminate 320 of Example 3, the first n-type window layer 322 is Te-doped, as can be seen in the graph in Figure 7. Te diffusion from the Te doped in the first n-type window layer 322 toward the first active layer 324 and the first spacer layer 323 was observed.

[0119] Figure 8 is a graph showing the diffusion state of Zn ions in the optoelectronic device fabricated in Example 3, as measured by SIMS. In Figure 8, the horizontal axis represents depth (μm), and the vertical axis on the left represents the concentration of the p-type dopant (Zn in this case) (atoms / cm³). ３ The vertical axis on the right represents the secondary ion intensity of Sb (counts / sec). The maximum value of Zn, a p-type dopant doped into the semiconductor stack 320, is 6.0 × 10⁻⁶. １８ atoms / cm ３ The position where the maximum value was obtained corresponds to the first p-type tunnel junction layer 3271 and the second p-type tunnel junction layer 3341, and diffusion of Zn was observed from the first p-type tunnel junction layer 3271 toward the first active layer 324 and from the second p-type tunnel junction layer 3341 toward the second active layer 331.

[0120] Figure 9 is a graph showing the diffusion state of Te ions in the optical semiconductor device fabricated in Comparative Example 2, as measured by secondary ion mass spectrometry (SIMS). In Figure 9, the horizontal axis represents depth (μm), and the left vertical axis represents the concentration (atoms / cm³) of the n-type dopant (here, Te, Si, C, H, O).３ The vertical axis on the right represents the secondary ion intensity of Sb (counts / sec). From the graph in Figure 9, the maximum concentration of Te, an n-type dopant doped into the semiconductor stack in Comparative Example 2, is 8.0 × 10⁻⁶. １８ atoms / cm ３ The position with the maximum value corresponds to the n-type tunnel junction layer, and diffusion of Te from the n-type tunnel junction layer toward the undoped spectral layer and the first barrier layer was observed.

[0121] Figure 10 is a graph showing the diffusion state of Zn ions in the optical semiconductor device fabricated in Comparative Example 2, as measured by SIMS. In Figure 10, the horizontal axis represents depth (μm), and the vertical axis on the left represents the concentration of the p-type dopant (Zn in this case) (atoms / cm³). ３ The vertical axis on the right represents the secondary ion intensity of Sb (counts / sec). The maximum value of Zn, a p-type dopant doped into the semiconductor stack, is 6.0 × 10⁻⁶. １８ atoms / cm ３ The position where the maximum value was obtained was the position corresponding to the p-type tunnel junction layer, and observation of Zn from the p-type tunnel junction layer toward the p-type window layer and electron block layer was observed.

[0122] <Evaluation: Emission Output Evaluation> Using a prober, a current of 300 mA was passed through the optical semiconductor devices obtained from Examples 1 to 3 and Comparative Examples 1 to 3 using a constant current voltage source, with the first n-type electrode as the negative electrode (-) and the second n-type electrode as the positive electrode (+). The forward voltage Vf (V) and the on-axis emission output Po (W) received by the photodetector placed directly above the light-emitting element were measured, and the emission center wavelength (λc) was measured using a spectrophotometer via an optical fiber. The reverse current Ir (A) was also measured when a reverse voltage of -0.1 V was applied. The results are shown in Tables 4 and 5.

[0123]

[0124]

[0125] From the above results, it was confirmed that increasing the number of active layers and tunnel junction layers, and sandwiching the semiconductor laminate with n-type electrodes using the tunnel junction layer, increases the light emission output and forward voltage, and thus increases the luminous efficiency. Although it is generally assumed that the forward voltage increases because the tunnel junction layer is a high-resistance layer, in the configuration of the present invention, forming the first n-type electrode using the tunnel junction layer resulted in a lower total resistance and reduced forward voltage compared to forming a p-type electrode without using the tunnel junction layer. Furthermore, the current spreading by the first n-type contact layer and the tunnel junction layer improved the light emission output and increased the luminous efficiency. Moreover, even with multiple active layers as in Examples 2 and 3, the forward voltage required for driving is smaller than that of GaAs-matched or InP-matched systems, so it is possible to further increase the number of active layers to increase the light emission output per unit area. Note that the value of the reverse current is very small, and this optical semiconductor device is driven only in the case of forward current when emitting light.

[0126] [Experimental Example 2] (Example 7) The composition of the active layer was changed so that the emission center wavelength was 3.3 μm instead of approximately 4 μm, and the number of pairs of multiple quantum well structures in the active layer was set to 20.5 pairs, and the dopant concentration of the first n-type window layer was set to 2.0 × 10⁻¹⁶ １８ atoms / cm ３ Except as otherwise provided, the optical semiconductor device of Example 7 was fabricated in the same manner as in Example 1. Table 6 below describes the composition and film thickness of each layer, the type of dopant, and the dopant concentration determined by SIMS analysis, including dopant diffusion, after all epitaxial growth was completed and the device was removed from the MOCVD apparatus. The film thickness of the entire layer between the active layer and the tunnel junction layer (total of the p-type window layer and the p-type electron blocking layer) was 65 nm, which is less than or equal to 100 nm. Because the dopant concentration of the first n-type window layer was increased, the Te concentration diffused into the first barrier layer of the first active layer also increased.

[0127]

[0128] (Comparative Example 5) The p-type InAs window layer on the p-type electron block layer is made of p-type AlInAs (Al composition: 0.05), and no tunnel junction layer is formed on the p-type InAs window layer. A Zn-doped p-type AlInAs contact layer is formed (Al composition: 0.05, film thickness: 100 nm, dopant concentration: 1.0 × 10⁻¹⁵). １９ atoms / cm ３ The optical semiconductor device of Comparative Example 5 was fabricated in the same manner as in Example 7, except that the ohmic metal portion was formed. In this case, the ohmic metal portion as the second n-type electrode is a p-type ohmic metal portion.

[0129] <Evaluation: Emission Output Evaluation> In the optical semiconductor devices obtained from Example 7 and Comparative Example 5 described above, a current of 300 mA was passed through them using a constant current voltage source with the first n-type electrode as the negative electrode (-) and the second n-type electrode as the positive electrode (+) using a prober, similar to Example 1. The forward voltage Vf (V) and the on-axis emission output Po (W) received by the photodetector placed directly above the light-emitting element were measured, and the emission center wavelength (λc) was measured using a spectrophotometer via an optical fiber. The reverse current Ir (A) was also measured when a reverse voltage of -0.1 V was applied. The results are shown in Table 7.

[0130]

[0131] From the above results, it was confirmed that even when the emission wavelength was changed from approximately 4 μm in Experimental Example 1 to 3.3 μm in Experimental Example 2, the luminescence output and forward voltage increased, and the luminescence efficiency increased, similar to Experimental Example 1, by increasing the number of active layers and tunnel junction layers, and by sandwiching the semiconductor laminate with n-type electrodes using the tunnel junction layers.

[0132] 100, 200, 300 Optoelectronic semiconductor elements 105, 205, 305 Growth substrates 120, 220, 320 Semiconductor laminates 121, 221 First n-type contact layer 122, 222 First n-type window layer 123, 223 Spacer layer 124, 224 Active layer 124b, 224b Barrier layer for active layers 124, 224 124w, 224w Well layer for active layers 124, 224 125, 225 p-type electron block layer 126, 226 p-type window layer 127, 227 Tunnel junction layer 1271, 2271 p-type tunnel junction layer 1272, 2272 n-type tunnel junction layer 128, 228 Second n-type window layer 129, 229 Second n-type contact layer 191, 291, 391 First n-type electrode 195, 295, 395 Second n-type electrode 260 Power distribution section 261 Transparent insulating film 271 Metal reflective layer 279 Metal junction layer 280 Support substrate 299 Back electrode 321 First n-type contact layer 322 First n-type window layer 323 First spacer layer 324 First active layer 324b Barrier layer of first active layer 324w Well layer of first active layer 324 325 First p-type electron block layer 326 First p-type window layer 327 First tunnel junction layer 3271 First p-type tunnel junction layer 3272 First n-type tunnel junction layer 328 Second n-type window layer 329 Second n-type contact layer 330 Second spacer layer 331 Second active layer 332b Barrier layer of the second active layer 331 332w Well layer of the second active layer 331 333 Second p-type window layer 334 Second tunnel junction layer 3341 Second p-type tunnel junction layer 3342 Second n-type tunnel junction layer 340 First semiconductor stacked structure 350 Second semiconductor stacked structure

Claims

1. An optical semiconductor device comprising: a semiconductor laminate having at least one semiconductor laminate structure in which an active layer and a tunnel junction layer are stacked; a first n-type electrode and a second n-type electrode sandwiching the semiconductor laminate, wherein the tunnel junction layer consists of a p-type InAlAsSbP layer and an n-type InAlAsSbP layer lattice-matched to InAs, and the emission center wavelength is 2000 nm to 5000 nm.

2. The tunnel junction layer has a dopant concentration of 1.0 × 10⁻⁶ １８ atoms / cm ３ The above 1.0 x 10 １９ atoms / cm ３ The optical semiconductor device according to claim 1, which is less than [value].

3. The optical semiconductor device according to claim 1, wherein the p-type InAlAsSbP layer is located on the active layer side of the tunnel junction layer, a p-type electron blocking layer is located between the active layer and the tunnel junction layer, and the total thickness of the layers between the active layer and the tunnel junction layer is 100 nm or less.

4. A semiconductor laminate comprising: a first semiconductor laminate structure having a first active layer and a first tunnel junction layer stacked on top of each other; and a second semiconductor laminate structure having a second active layer and a second tunnel junction layer stacked on top of each other; and a first n-type electrode and a second n-type electrode sandwiching the semiconductor laminate, wherein both the first tunnel junction layer and the second tunnel junction layer consist of a p-type InAlAsSbP layer and an n-type InAlAsSbP layer lattice-matched to InAs, and the emission center wavelength is 2000 nm to 5000 nm.

5. The first tunnel junction layer and the second tunnel junction layer have a dopant concentration of 1.0 × 10 １８ atoms / cm ３ The above 1.0 x 10 １９ atoms / cm ３ The optical semiconductor device according to claim 4, which is less than [value missing].

6. The optical semiconductor device according to claim 4, wherein the first active layer and the second active layer have a quantum well structure, and the first wavelength and the second wavelength emitted by the first active layer and the second active layer, respectively, are the same or approximate to each other.

7. The optoelectronic semiconductor device according to claim 4, wherein the p-type InAlAsSbP layer is located on the first active layer side of the first tunnel junction layer, a p-type electron blocking layer is located between the first active layer and the first tunnel junction layer, and the total thickness of the layers between the first active layer and the first tunnel junction layer is 100 nm or less.

8. The optical semiconductor device according to claim 4, wherein the n-type InAlAsSbP layer is located on the second active layer side of the first tunnel junction layer, a spacer layer is located between the first tunnel junction layer and the second active layer, and the total thickness of the layers between the first tunnel junction layer and the second active layer is 100 nm or less.

9. A method for manufacturing an optical semiconductor device, comprising the steps of: forming a semiconductor laminate having at least one semiconductor laminate structure in which an active layer and a tunnel junction layer are stacked on an n-type substrate; and forming a first n-type electrode and a second n-type electrode, wherein the step of forming the tunnel junction layer includes the step of forming an n-type InAlAsSbP layer on a p-type InAlAsSbP layer in which the n-type tunnel junction layer is lattice-matched to InAs, and the emission center wavelength being 2000 nm to 5000 nm.

10. The tunnel junction layer has a dopant concentration of 1.0×10 １８ atoms / cm ３ or more and less than 1.0×10 １９ atoms / cm ３ The method for manufacturing an optical semiconductor device according to claim 9

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