Image transmission and display method, and electronic device

Abstract

An image transmission and display method, and an electronic device, which relate to the technical field of terminals. The method comprises: at a first moment, an electronic device generating a first hardware TE signal; at a second moment, the electronic device generating a first software TE signal, and in response to the first software TE signal, an SoC transmitting first image data to a display screen, wherein the second moment follows the first moment; and at a third moment, the electronic device generating a second hardware TE signal, wherein the third moment follows the second moment, and the second hardware TE signal is the hardware TE signal following the first hardware TE signal. In this way, image transmission can be executed between two hardware TE signals, thereby improving the timeliness of image transmission, helping to reduce display jank, and enhancing the display performance.

Description

Image sending and displaying method and electronic device TECHNICAL FIELD

[0001] Embodiments of the present application relate to the technical field of terminals, and in particular to an image sending and displaying method and an electronic device. BACKGROUND

[0002] The electronic device can complete drawing, rendering and synthesis through a central processing unit (CPU) and a graphics processing unit (GPU), obtain image data of a frame of image through processing, and then a display driver can send the image data to a display screen for display when a tear effect (TE) signal is detected, such as when a rising edge of the TE signal is detected.

[0003] However, if the CPU and the GPU do not complete processing of the image in time and obtain image data before the TE signal arrives, the display driver has no new image data to send to the display screen for display, and subsequently, when the next TE signal arrives, the display driver sends the image data obtained through processing of the CPU and the GPU to the display screen for display. Then, the same frame of image is continuously displayed on the display screen, resulting in display jank. Moreover, if the CPU and the GPU do not complete processing of multiple frames of image in time, multiple frames of display jank will occur.

[0004] SUMMARY

[0005] The present application provides an image sending and displaying method and an electronic device, which can increase the timing of sending and displaying, improve the timeliness of sending and displaying, thereby reducing display jank and improving display performance.

[0006] In a first aspect, the present application provides an image sending and displaying method. The method can be executed by an electronic device, or by a component of the electronic device, such as a processor, a chip or a chip system of the electronic device, or by a logic module or software (such as a display driver) capable of realizing all or part of the electronic device, and the present application does not make a specific limitation thereon. Hereinafter, the electronic device is taken as an example for illustration, and the electronic device includes a SoC and a display screen. The electronic device generates a hardware TE signal in a first period. The generation of the hardware TE signal can be understood as the generation of a rising edge signal of the hardware TE signal. It should be noted that in the embodiments below, the hardware TE signal can be referred to as a TE signal.

[0007] Specifically, the method comprises: at a first time, the electronic device generates a first hardware TE signal. At a second time, the electronic device generates a first software TE signal, and in response to the first software TE signal, the SoC sends first image data to the display screen. The second time is after the first time. It should be noted that in the following embodiments, the software TE signal can be referred to as a target signal. At a third time, the electronic device generates a second hardware TE signal, wherein the third time is after the second time, and the second hardware TE signal is the next hardware TE signal of the first hardware TE signal, that is, the time interval between the first time and the third time is a first period.

[0008] The hardware TE signal can be generated by the display screen, such as the DDIC in the display screen. The software TE signal can be generated by the SoC. For example, the SoC can be generated based on the timing time of a timer. When the timing time arrives, the software TE signal is generated. Correspondingly, the software TE signal can be a timer signal, also known as a clock signal. Of course, the software TE signal can also be other forms of signals, which are not limited in the present application. It should be noted that the first software TE signal and the hardware TE signal are usually not coincident.

[0009] In summary, the electronic device can generate a software TE signal between two hardware TE signals, thereby triggering image sending. In this way, after completing image processing, especially in the case of processing lag in image processing, the electronic device does not necessarily wait for the next hardware TE signal to execute image sending, but can send images before the next hardware TE signal arrives, thereby timely executing image sending and reducing display lag and improving display performance.

[0010] In a possible design manner of the first aspect, the first period comprises any one of the following: a period corresponding to 120Hz, about 8.3ms; a period corresponding to 90Hz, about 11.1ms; and a period corresponding to 60Hz, about 16.6ms.

[0011] That is, the above scheme of timely image sending can be applied to display screens generating hardware TE signals of various periods.

[0012] In a possible design manner of the first aspect, the second time can have the following cases.

[0013] When the first period is a period corresponding to 120Hz, the second time comprises any one of the following: a time at one-third of the position between the first time and the third time, such as a time of 2.7ms; and a time at two-thirds of the position between the first time and the third time, such as a time of 5.5ms. For details, refer to the target signal Z1 and the target signal Z2 in FIG. 13 below.

[0014] The first period is a period corresponding to 90Hz, and the second time point includes any one of the following time points: a time point at a quarter position between the first time point and the third time point, such as a time point of 2.7ms, a time point at a two-quarter position between the first time point and the third time point, such as a time point of 5.5ms, and a time point at a three-quarter position between the first time point and the third time point, such as a time point of 8.3ms. For details, refer to target signal Z1, target signal Z2, and target signal Z3 in FIG. 14 below.

[0015] The first period is a period corresponding to 60Hz, and the second time point includes any one of the following time points: a time point at a sixth position between the first time point and the third time point, such as a time point of 2.7ms, a time point at a two-sixth position between the first time point and the third time point, such as a time point of 5.5ms, a time point at a three-sixth position between the first time point and the third time point, such as a time point of 8.3ms, a time point at a four-sixth position between the first time point and the third time point, such as a time point of 11.1ms, and a time point at a five-sixth position between the first time point and the third time point, such as a time point of 13.9ms. For details, refer to target signal Z1 and target signal Z2 in FIG. 15 and FIG. 16 below.

[0016] At this point, it should be noted that although the software TE signal can also be generated at the position of the hardware TE signal, such as indicated by all target signals coinciding with the TE signal in FIG. 13-FIG. 16, the actual hardware TE signal is usually not triggered based on the software TE signal, and details can be referred to the introduction of S813 and S815 below, which will not be described in detail here. Therefore, the second time point is usually not a time point that repeats the hardware TE signal, such as a time point at a four-quarter position between the first time point and the third time point in a hardware TE signal of 120Hz, a time point at a three-quarter position between the first time point and the third time point in a hardware TE signal of 90Hz, and a time point at a six-sixth position between the first time point and the third time point in a hardware TE signal of 60Hz.

[0017] In a possible design manner of the first aspect, at the first time point, the SoC does not send image data to the display screen, such as the time point t3 in FIG. 13 to FIG. 16.

[0018] In a possible design manner of the first aspect, at the third time point, the SoC does not send image data to the display screen, such as the time point t6 in FIG. 13 to FIG. 16. Since the first image data has been sent at the second time point before the third time point, there is no need to perform sending at the third time point.

[0019] In a possible design of the first aspect, in response to the first software TE signal, the SoC sends the first image data to the display screen, including: in a case where the first sending condition (hereinafter S704 can also be referred to as a condition for sending a picture before the TE signal arrives) is met, the SoC sends the first image data to the display screen in response to the first software TE signal.

[0020] That is, in certain cases, the electronic device sends a picture based on a software TE signal, thereby sending a picture based on a software TE signal in a targeted manner.

[0021] In a possible design of the first aspect, before the first time point at which the electronic device generates the first hardware TE signal, the method further includes: at a fourth time point, the SoC sends second image data to the display screen, the second image data being last image data of the first image data.

[0022] The first sending condition includes any of the following:

[0023] The interval between the fourth time point and a fifth time point exceeds a preset frame length, and the fifth time point to a time point before the third time point at which the software TE signal is generated (for example, the condition for sending a picture at a specific time point in S813 below is met), the fifth time point being a time point at which the SoC is ready to send the first image data to the display screen. That is, the processing process of the first image data takes a long time, there is a processing lag, and there is a time point at which the software TE signal is generated before the next hardware TE signal arrives, so the picture can be sent at the time point at which the software TE signal is generated, so that timely sending of the picture can be implemented, and continuous display lag can be avoided. For example, refer to the case in S814 below.

[0024] The interval between the fourth time point and a fifth time point does not exceed a preset frame length, and the second image data is sent to the display screen in response to a second software TE signal at the fourth time point. That is, the processing process of the first image data takes less time, there is no processing lag, and the previous frame is sent based on a software TE signal, so the picture can still be sent based on a software TE signal, so that the time interval of sending the picture can be controlled, and more serious processing lag can be avoided. For example, refer to the case in S817 below.

[0025] In a possible design of the first aspect, the first sending condition includes: after the SoC is ready to send the first image data to the display screen, a time length for waiting for a hardware TE signal exceeds a time length threshold. That is, after waiting for a hardware TE signal for a long time, the picture can be sent in advance, so that the image data is sent to the display screen in a timely manner, so that the response delay caused by waiting for a hardware TE signal for too long time is avoided, so that the timeliness of the response is improved, and the display lag is also reduced to a certain extent.

[0026] In a possible design of the first aspect, after the electronic device generates the first hardware TE signal at the first time point, the method further includes: in response to the first hardware TE signal, the electronic device controls the timer to start timing. In this way, the timer can start timing after the arrival of the hardware TE signal, so that the timing of the timer is aligned with the time point of the arrival of the hardware TE signal. Correspondingly, the second time point is a time point corresponding to a timing time of the timer. That is, the generation of the software TE signal can be triggered by the timing time of the timer.

[0027] In a possible design of the first aspect, before the SoC sends the first image data to the display in response to the first software TE signal, the method further includes: in a case where the first image sending condition is met, the electronic device starts detection of the software TE signal. In the case where the detection of the software TE signal is started, the electronic device detects the first software TE signal. In this way, the electronic device can detect the software TE signal only when it is necessary to send the image based on the software TE signal.

[0028] Correspondingly, the SoC sends the first image data to the display in response to the first software TE signal, including: the SoC sends the first image data to the display in response to detection of the first software TE signal. In this way, sending the image based on the software TE signal when necessary can be implemented.

[0029] In a possible design of the first aspect, after the SoC sends the first image data to the display in response to detection of the first software TE signal, the method further includes: stopping detection of the software TE signal. In the case where the detection of the software TE signal is stopped, the hardware TE signal is detected. In this way, the electronic device can switch to detection of the hardware TE signal, so that each hardware TE signal can be detected, and the initialization of the timer can be further triggered.

[0030] In a possible design of the first aspect, the SoC sends the first image data to the display in response to the first software TE signal, including: in a case where the first identifier is queried, the SoC sends the first image data to the display in response to the first software TE signal. The first identifier indicates that the target image sending scheme is adopted, and the target image sending scheme includes sending the image when the hardware TE signal is detected and sending the image when the software TE signal is detected.

[0031] The first identifier can be preconfigured in the electronic device that applies the target image sending scheme. In this way, after the electronic device is powered on, whether the target image sending scheme is applicable to the electronic device can be determined by querying the first identifier, so as to determine whether the image needs to be sent based on the software TE signal.

[0032] In addition, in the case where the first identifier is not queried, the electronic device does not generate the software TE signal, and further does not send the image based on the software TE signal, but sends the image after the hardware TE signal arrives.

[0033] In a second aspect, the present application also provides an electronic device, which comprises a display panel, a memory and one or more processors. The display panel, the memory and the processor are coupled. The memory is configured to store computer program codes, and the computer program codes comprise computer instructions, which, when executed by the processor, cause the electronic device to perform the method in the first aspect and any possible design thereof.

[0034] In a third aspect, the present application provides a chip system, which is applied to an electronic device comprising a display panel and a memory. The chip system comprises one or more interface circuits and one or more processors. The interface circuit and the processor are interconnected through a line. The interface circuit is configured to receive a signal from the memory of the electronic device and send a signal to the processor. The signal comprises computer instructions stored in the memory. When the processor executes the computer instructions, the electronic device performs the method in the first aspect and any possible design thereof.

[0035] In a fourth aspect, the present application provides a computer storage medium, which comprises computer instructions. When the computer instructions are run on an electronic device, the electronic device performs the method in the first aspect and any possible design thereof.

[0036] In a fifth aspect, the present application provides a computer program product. When the computer program product is run on a computer, the computer performs the method in the first aspect and any possible design thereof.

[0037] It can be understood that the electronic device of the second aspect, the chip system of the third aspect, the computer storage medium of the fourth aspect and the computer program product of the fifth aspect provided above can achieve the beneficial effects of the first aspect and any possible design thereof, which will not be described here. BRIEF DESCRIPTION OF DRAWINGS

[0038] FIG. 1 is a schematic diagram of image display according to an embodiment of the present application;

[0039] FIG. 2 is a schematic diagram of image display according to another embodiment of the present application;

[0040] FIG. 3 is a schematic diagram of image display according to another embodiment of the present application;

[0041] FIG. 4 is a schematic diagram of display stuttering according to an embodiment of the present application;

[0042] FIG. 5 is a hardware structure diagram of an electronic device according to an embodiment of the present application.

[0043] FIG. 6 is a schematic diagram of a TE signal of various screens provided by an embodiment of the present application;

[0044] FIG. 7A is a hardware and software architecture diagram of an electronic device provided by an embodiment of the present application;

[0045] FIG. 7B is a flowchart of an image sending and displaying method provided by an embodiment of the present application;

[0046] FIG. 8 is a timing interaction diagram of an image sending and displaying method provided by an embodiment of the present application;

[0047] FIG. 9 is a schematic diagram of initializing a timer provided by an embodiment of the present application;

[0048] FIG. 10 is a schematic diagram of judging a processing lag provided by an embodiment of the present application;

[0049] FIG. 11 is a schematic diagram of a touch sending picture timing in a case of existing a processing lag provided by an embodiment of the present application;

[0050] FIG. 12 is a schematic diagram of a touch sending picture timing in a case of non-existing a processing lag provided by an embodiment of the present application;

[0051] FIG. 13 is a schematic diagram of sending a picture and refreshing a display in example one provided by an embodiment of the present application;

[0052] FIG. 14 is a schematic diagram of sending a picture and refreshing a display in example two provided by an embodiment of the present application;

[0053] FIG. 15 is a schematic diagram of sending a picture and refreshing a display in example three provided by an embodiment of the present application;

[0054] FIG. 16 is a schematic diagram of sending a picture and refreshing a display in example four provided by an embodiment of the present application;

[0055] FIG. 17 is a schematic diagram of another image sending and displaying scheme provided by an embodiment of the present application;

[0056] FIG. 18 is a schematic diagram of a chip system provided by an embodiment of the present application. DETAILED DESCRIPTION

[0057] The technical solutions in the embodiments of the present application will be described below with reference to the drawings in the embodiments of the present application. In the description of the embodiments of the present application, the terms used in the following embodiments are only for the purpose of describing the specific embodiments and are not intended to be limiting on the present application. As used in the specification and the appended claims of the present application, the singular forms “a,” “an,” and “the” are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will also be understood that “at least one” and “one or more” as used in the embodiments herein indicates one or two or more (including two). The term “and / or” is used to describe the association relationship of the associated objects, which means that there can be three relationships; for example, A and / or B can mean that A exists alone, A and B exist together, and B exists alone, where A and B can be singular or plural. The character “ / ” generally represents an “or” relationship between the associated objects.

[0058] In the present specification, the reference to “one embodiment” or “some embodiments” or the like means that a particular feature, structure, or characteristic described in connection with the embodiment is included in at least one embodiment of the present application. Thus, the appearances of the phrases “in one embodiment”, “in some embodiments”, “in other embodiments”, “in additional embodiments” and so on, in various places in the specification are not necessarily all referring to the same embodiment, unless otherwise be specifically noted. The terms “comprising”, “containing”, “having” and their variants mean “including but not limited to”, unless otherwise be specifically noted. The term “connected” includes both direct and indirect connections, unless otherwise be specifically noted. “First”, “second”, etc. are used only for descriptive purposes and cannot be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features.

[0059] In the embodiments of the present application, the words “exemplary” or “for example” are used to mean serving as an example, instance, or illustration. Any embodiment or design presented as “exemplary” or “for example” in the embodiments of the present application is not necessarily to be construed as preferred or advantageous over other embodiments or designs. Rather, use of the words “exemplary” or “for example” is intended to present concepts in a concrete manner.

[0060] Before introducing the embodiments of the present application, the principle of image display will be briefly introduced with reference to FIGS. 1-3.

[0061] Referring to FIG. 1, the electronic device includes a system on chip (SoC) and a display screen (also referred to as a screen end).

[0062] The SoC integrates the capabilities of an application processor (AP), a baseband processor (BP), which can also be referred to as a modem, and other key chips. Further, the AP can include a CPU, a GPU, and other processing units. The display screen further includes a display control module, an image storage unit, and a display panel.

[0063] The display control module can be a display driver integrated circuit (DDIC), for example. It should be noted that the display control module can also be referred to as a controller, a driving circuit, and the like, and embodiments of the present application do not make specific limitations thereto.

[0064] The image storage unit can be a random access memory (RAM), such as a graphics RAM (GRAM), for example.

[0065] Hereinafter, the display control module is taken as an example of a DDIC, and the image storage unit is taken as an example of a GRAM.

[0066] In the process of image processing, the electronic device can execute drawing, rendering, and synthesis, and other image processing procedures through the CPU and the GPU in the SoC. The display driver in the software architecture of the SoC sends (writes) the processed image data to the GRAM in the display screen. Finally, the DDIC refreshes the image data in the GRAM to the display panel, and thus image display can be achieved.

[0067] The DDIC can control the writing and reading of image data in the GRAM through a tear effect (TE) signal.

[0068] Referring to FIG. 2, the TE signal can be a periodic pulse signal. The DDIC can generate a TE signal once after completing the refresh of a frame of image data to the display panel, to trigger the display driver to write a new frame of image data to the GRAM. The DDIC can generate a TE signal after refreshing (reading out) the image data of the last row M in the GRAM shown in FIG. 3 to the display panel, for example. The display driver can write a new frame of image data to the GRAM in the time period of the image sending (display driver sending image data to the GRAM) flag X shown in FIG. 2 after detecting the rising edge of the TE signal, such as the arrival of TE (up) in FIG. 2.

[0069] Subsequently, the DDIC can refresh the new frame of image data in the GRAM to the display panel after the falling edge of the TE signal arrives, so that the display panel can display the new frame of image. With reference to FIGS. 2 and 3, the DDIC starts to read the new frame of image data from the GRAM to refresh to the display panel after the falling edge of the TE signal arrives after the last row M in the GRAM shown in FIG. 3 returns to the first row N in the GRAM, as shown in the time period of the refresh (a short form of refreshing image data in the GRAM to the display panel) flag Y after the arrival of the TE (down) in FIG. 2.

[0070] The display panel can be refreshed by a source signal. With reference to FIG. 2, the DDIC reads the image data from the GRAM after the falling edge of the TE signal arrives, at which time the source signal generated by the display panel is at a high level, and the corresponding pixel points in the display panel are lit based on the image data points read by the DDIC through the high level, thereby refreshing the image in the display panel. It should be noted that in actual implementation, the DDIC can also read the image data from the GRAM before the falling edge of the TE signal arrives, and complete the reading of the image data of the entire image before the falling edge of the TE signal arrives, so that the display panel can quickly refresh and display the new image after the falling edge of the TE signal arrives.

[0071] After refreshing, the display panel can pull the source signal to a low level, thereby reducing power consumption when not refreshing the image. It should be noted that the stage in which the source signal is at a low level does not refresh the image, and the state of this stage can be referred to as a hold state.

[0072] It can be seen that by the TE signal, the display drive based on the rising edge of the TE signal triggers the writing of image data to the GRAM after completing a frame of refreshing, and then the DDIC based on the falling edge of the TE signal triggers the reading of image data from the GRAM. And by controlling the rate at which the display drive writes to the GRAM and the rate at which the DDIC reads from the GRAM, the progress of the DDIC reading from the GRAM is always after the progress of the display drive writing to the GRAM, so that the occurrence of screen tearing can be avoided.

[0073] Further, the electronic device can control the pace of processing images by the SoC (such as CPU, GPU, etc.) through the Vsync signal. Here, it should be noted that the Vsync signal herein refers to a software Vsync signal simulated by the SoC (such as the image compositor (surface flinger, SF) in the software architecture of the SoC) based on the rising edge of the TE signal. The SoC can simulate a Vsync signal consistent with the rising edge of the TE signal, so that the Vsync signal changes (such as the level flips) once for each arrival of the rising edge of the TE signal, thereby triggering the start of processing of a new frame of image when the TE signal arrives. That is, the Vsync signal can be a clock signal, such as flipping once every 8.3 ms.

[0074] At this point, it should be noted that: a frame of image will go through three stages from starting processing to being displayed on the display screen. First, under the trigger of the Vsync signal corresponding to the rising edge of a TE signal, the drawing and rendering are started; then, under the trigger of the Vsync signal corresponding to the rising edge of another TE signal, the preparation for composition and display is started; and then, under the trigger of the rising edge of another TE signal, the display is executed, realizing the display of the processed image on the display screen.

[0075] In addition, the processing and display process of multiple frames of images can be as follows: after the arrival of the rising edge of a TE signal, on the one hand, the drawing and rendering of the (k+1)th frame of image can be started under the trigger of the corresponding Vsync signal. On the other hand, the preparation for composition and display of the kth frame of image can be started under the trigger of the corresponding Vsync signal. On the other hand, the display of the (k-1)th frame of image can be started under the trigger of the rising edge of the TE signal, and the (k-1)th frame of image is displayed on the display screen.

[0076] Specifically, the DDIC can generate a TE signal, and the display driver can write the image data of the current frame, such as the image data of the k-1th frame image, into the GRAM under the trigger of the rising edge of the TE signal, so as to realize image display. The image synthesizer can obtain the timestamp corresponding to the rising edge of the TE signal, and calculate the time of the rising edge of the next TE signal according to the timestamp. The CPU, GPU, etc. can estimate the timing of starting the drawing and rendering of the next frame, such as the k+1th frame image, based on the calculated time, and start the drawing and rendering of the next frame after the timing arrives, so that the drawing and rendering of the next frame can be completed before the next TE signal arrives. In addition, the CPU, GPU, etc. can also estimate the timing of starting the synthesis of the current frame, such as the kth frame image, based on the calculated time, and start the synthesis of the current frame after the timing arrives, so that the synthesis of the current frame can be completed before the next TE signal arrives, and the image data of the current frame is obtained and then given to the display driver. After the next TE signal arrives, the display driver can perform display.

[0077] However, in practice, due to the load and other reasons, the CPU, GPU, etc. image processing module may not be able to complete the image processing according to the estimated time, which may eventually result in the inability to provide new image data to the display driver in time, i.e. there is a processing lag. Further, the display driver cannot write new image data into the GRAM without new image data, and the display panel can only display old image data, resulting in display lag.

[0078] The following describes the specific process of a processing lag and a display lag with reference to FIG. 4, taking the k-1th frame image as the 0th frame image, the kth frame image as the 1st frame image, and the k+1th frame image as the 2nd frame image as an example.

[0079] After TE2 arrives, the display driver can perform display of the 0th frame image under the trigger of the rising edge of TE2, so that the display screen can display the 0th frame image between TE2 and TE3.

[0080] After TE2 arrives, the image synthesizer can obtain the timestamp corresponding to the rising edge of TE2, and calculate the time of the rising edge of the next TE signal TE3 according to the timestamp. The CPU, GPU, etc. can estimate the timing of starting the synthesis of the 1st frame image (located before the rising edge of TE3) based on the time, and start the synthesis of the 1st frame image after the timing arrives. Moreover, the synthesis of the 1st frame image is completed before TE3 arrives.

[0081] And, the CPU, GPU, etc. can estimate the timing of starting the drawing and rendering of the 2nd frame image based on the time of the rising edge of TE3 (before the rising edge of TE3), and start the drawing and rendering of the 2nd frame image after the timing arrives, so that the drawing and rendering of the 2nd frame image can be completed before TE3 arrives. In fact, before TE3 arrives, the GPU is still rendering the 2nd frame image, and does not complete the drawing and rendering of the 2nd frame image as expected, and there is a processing lag.

[0082] Then, after TE3 arrives, the display driver can perform the display of the 1st frame image under the triggering of the rising edge of TE3, so that between TE3 and TE4, the display screen can display the 1st frame image.

[0083] After TE3 arrives, the image compositor can obtain the timestamp corresponding to the rising edge of TE3, and calculate the time of the rising edge of the next TE signal TE4 according to the timestamp. The CPU, GPU, etc. can estimate the timing of starting the drawing and rendering of the 3rd frame image based on the time of the rising edge of TE4 (before the rising edge of TE4), and start the drawing and rendering of the 3rd frame image after the timing arrives.

[0084] In addition, since the rendering of the 2nd frame image has not been completed after TE3 arrives, the composition of the 2nd frame image will not be triggered after TE3 arrives.

[0085] Then, after TE4 arrives, since the composition of the 2nd frame image has not been completed (in fact, has not started), the display driver cannot display the 2nd frame image under the triggering of the rising edge of TE3. Correspondingly, the display screen will still display the 1st frame image, that is, the 1st frame image will be displayed for at least two frames in succession. That is, the processing lag of the 2nd frame image causes the display lag of the 1st frame image.

[0086] It should be noted that in FIG. 4, the 0th frame image is displayed after TE2, in actuality, when the rising edge of TE2 arrives, the display driver can first start writing the image data of the 0th frame image to the GRAM in the display screen, and then after the falling edge of TE2 arrives, the DDIC in the display screen can refresh the image data of the 0th frame image in the GRAM to the display panel, and at this time, the display of the 0th frame image in the display panel starts, that is, the time of actually starting the display of the 0th frame image in the display panel is slightly later than the time of the rising edge of TE2 arriving. The display of other frame images is the same, and will not be described here.

[0087] In the above description about FIG. 4, mainly the processes of the processing stall (such as the 2nd image) and the display stall (such as the 1st image) of a frame of image are shown. In practice, when the CPU and the GPU both have processing stalls in the processing of multiple continuous frames, the corresponding continuous display stalls may occur, and the stall problem is more prominent.

[0088] Based on the above problems, the embodiment of the present application provides an image display method. Whether a TE signal arrives or not, the display driving image sending can be triggered between two TE signals. In this way, after the image processing is completed, especially after the processing stall occurs and the image processing is completed, the display driving does not necessarily wait for the next TE signal to arrive before performing the image sending, but can send the image before the next TE signal arrives, so that the image sending can be performed in time, the display stall is reduced, and the display performance is improved.

[0089] Especially when multiple continuous frames of processing stall occur, the embodiment of the present application can greatly reduce the display stall, and the effect is more obvious.

[0090] Exemplarily, the electronic device of the embodiment of the present application can be a mobile phone, a tablet computer, a desktop computer, a laptop computer, a handheld computer, a notebook computer, an ultra-mobile personal computer (UMPC), an Internet access, a cellular phone, a personal digital assistant (PDA), an artificial intelligence (AI) device, a wearable device, a vehicle-mounted device, a smart home device, and / or a smart city device, and the like electronic device with image processing and display requirements. The embodiment of the present application does not specially limit the specific form of the electronic device.

[0091] Referring to FIG. 5, it is a hardware structure diagram of an electronic device. As shown in FIG. 5, taking the electronic device as a mobile phone for example, the electronic device can include a processor 210, an external memory interface 220, an internal memory (referred to as memory) 221, a universal serial bus (USB) interface 230, a charging management module 240, a power management module 241, a battery 242, an antenna 1, an antenna 2, a mobile communication module 250, a wireless communication module 260, an audio module 270, a loudspeaker 270A, a receiver 270B, a microphone 270C, a headset interface 270D, a sensor module 280, a key 290, a motor 291, an indicator 292, a camera 293, a display screen 294, and a subscriber identification module (SIM) card interface 295, and the like.

[0092] It can be understood that the structure illustrated in the embodiments does not constitute a specific limitation on the mobile phone. In other embodiments, the mobile phone can include more or fewer components than those illustrated, or combine certain components, or split certain components, or different arrangement of components. The illustrated components can be implemented in hardware, software, or a combination of software and hardware.

[0093] The processor 210 can include one or more processing units, such as: an application processor (AP), a baseband processor (Modem), a central processing unit (CPU), a graphics processing unit (GPU), an image signal processor (ISP), a controller, a video codec, a digital signal processor (DSP), and / or a neural-network processing unit (NPU), etc.

[0094] Different processing units can be independent devices, or can be integrated in one or more processors. For example, a CPU, a GPU, etc. can be integrated in an AP.

[0095] In some embodiments, the processor 210 can perform the image display method by running instructions stored in the internal memory 221.

[0096] In addition, one or more processing units in the processor 210 described above, and other components of the mobile phone (such as memory, input / output interface, etc.) can be integrated in a SoC.

[0097] The charging management module 240 is configured to receive charging input from a charger. The power management module 241 is configured to connect the battery 242 to the processor 210. The power management module 241 receives input from the battery 242 and / or the charging management module 240 to power the processor 210, the internal memory 221, the display 294, the camera 293, and the wireless communication module 260, etc. The power management module 241 can also be configured to monitor parameters such as battery capacity, battery cycle count, battery health status (leakage, impedance), etc.

[0098] The wireless communication function of the mobile phone can be realized through the antenna 1, the antenna 2, the mobile communication module 250, the wireless communication module 260, the modem processor, and the baseband processor, etc.

[0099] The mobile phone can realize display function through GPU, display panel 294, and application processor, etc. The GPU is a microprocessor for image processing, connected with the display panel 294 and the application processor. The GPU is used to perform mathematical and geometric calculations for graphics rendering.

[0100] The mobile phone can realize camera function through camera 293, ISP, video codec, GPU, display panel 294, and application processor AP, neural network processor NPU, etc.

[0101] The mobile phone can realize audio function through audio module 270, speaker 270A, receiver 270B, microphone 270C, earphone interface 270D, and application processor, etc. For example, music playing, recording, etc.

[0102] The display panel 294 is used to display images, videos, etc. The display panel 294 includes a display panel. The display panel can adopt liquid crystal display (LCD), organic light-emitting diode (OLED), active-matrix organic light emitting diode (AMOLED), flex light-emitting diode (FLED), Miniled, MicroLed, Micro-oLed, quantum dot light emitting diodes (QLED), etc. In some embodiments, the mobile phone can include one or more display panels 294.

[0103] The display panel 294 further includes a driving circuit and a storage unit (such as GRAM, which is taken as an example hereinafter). The GRAM can be used to store image data of images to be displayed.

[0104] For the role of the display panel, DDIC, and GRAM and the principle of their cooperative work, please refer to the foregoing FIG. 1 and FIG. 2 and their related introduction, which will not be repeated here.

[0105] The display panel can be a Low Temperature Polycrystalline Oxide (LTPO) display panel, a Low Temperature Poly-Silicon (LTPS) display panel, etc.

[0106] Further, according to the number of transistors in the pixel circuit of the LTPO display panel, the display screen 294 can be divided into a 7T-LTPO screen and an 8T-LTPO screen. 7T means that the pixel circuit includes 7 transistors, and 8T means that the pixel circuit includes 8 transistors.

[0107] Referring to (a) in FIG. 6, the DDIC in the LTPS / 7T-LTPO screen can generate a 120Hz TE signal at most, and thus the refresh rate can reach 120Hz, and the image in the display panel can be refreshed once in about 8.3ms.

[0108] Of course, the DDIC in the LTPS / 7T-LTPO screen can also generate a TE signal lower than 120Hz (such as 90Hz, 60Hz, etc.).

[0109] For example, the 90Hz TE signal generated by the DDIC in the LTPS / 7T-LTPO screen is shown in (b) in FIG. 6, and thus the refresh rate can reach 90Hz, and the image in the display panel can be refreshed once in about 11.1ms.

[0110] For another example, the 60Hz TE signal generated by the DDIC in the LTPS screen is shown in (c) in FIG. 6, and thus the refresh rate can reach 60Hz, and the image in the display panel can be refreshed once in about 16.6ms.

[0111] It should be noted that the duration of the low level of the TE signal is the same in the 120Hz TE signal generated by the DDIC in the LTPS / 7T-LTPO screen, the 90Hz TE signal generated by the DDIC in the LTPS / 7T-LTPO screen, and the 60Hz TE signal generated by the DDIC in the LTPS screen. Accordingly, the lower the frequency, the longer the period, and the longer the duration of the high level. For example, the duration of the high level of the TE signal in (c) in FIG. 6 is longer than that in (b) in FIG. 6, and the duration of the high level of the TE signal in (a) in FIG. 6 is the shortest.

[0112] However, unlike the 60Hz TE signal generated by the DDIC in the LTPS screen shown in (c) in FIG. 6, the 60Hz TE signal generated by the DDIC in the 7T-LTPO screen is shown in (d) in FIG. 6, which is equivalent to generating a TE signal every other TE signal of the 120Hz TE signal. As can be seen, the duration of the low level of the 60Hz TE signal generated by the DDIC in the 7T-LTPO screen is about twice the duration of the low level of the 120Hz TE signal generated by the DDIC in the LTPS / 7T-LTPO screen.

[0113] Referring to (e) in FIG. 6, the DDIC in the 8T-LTPO screen can generate a TE signal of 360 Hz at most, and the refresh rate can reach 360 Hz, and about 2.7 ms can refresh the image in the display panel once. Of course, the DDIC of the 8T-LTPO screen can also generate a TE signal lower than 360 Hz (such as 120 Hz, 60 Hz), and accordingly, the refresh rate can be lower than 360 Hz.

[0114] It should be noted that in the 8T-LTPO screen, compared with the TE signal of 360 Hz: the TE signal of 120 Hz is equivalent to generating a TE signal every two TE signals of the TE signal of 360 Hz. The TE signal of 60 Hz is equivalent to generating a TE signal every five TE signals of the TE signal of 360 Hz.

[0115] The image display method provided by the embodiments of the present application can be applied to the scenarios of various TE signals shown in FIG. 6.

[0116] The software system (such as the software system on the AP side) of the electronic device can adopt a layered architecture, an event-driven architecture, a microkernel architecture, a microservice architecture, or a cloud architecture. The embodiments of the present application take the AndroidTM system with a layered architecture as an example to exemplarily illustrate the software structure of the electronic device. The layered architecture divides the software system of the electronic device into several layers, each layer has a clear role and division of labor, and the layers communicate with each other through a software interface.

[0117] Referring to FIG. 7A, taking a mobile phone as an example, the software and hardware architecture of the electronic device can include an application layer, an application framework layer, a hardware abstraction layer (hardware abstract layer, HAL), a kernel layer, and a hardware layer.

[0118] Various applications such as an electronic mailbox, a video player, a memo, an alarm clock, a settings, a game application, etc. can be installed in the application layer. When the mobile phone runs the above-mentioned applications in the foreground, multiple frames of images can be refreshed and displayed through the display screen. Taking the game application as an example, multiple frames of game pictures can be refreshed and displayed through the display screen.

[0119] The application framework layer provides the application layer with an application programming interface (application programming interface, API) and a programming framework. The image compositor (SurfaceFlinger, SF) can be included in the application framework layer. It should be noted that the image compositor can also be translated as surface flinger, surface drawing module, image composition processing service, etc., which is not limited in the present application.

[0120] The image compositor can be used for refresh rate control, control of image composition, etc.

[0121] In one specific implementation, based on the foregoing description, the image compositor can simulate a corresponding Vsync signal based on the TE signal, which can trigger the CPU, GPU, etc. to perform image processing, so that the frequency of the image data can be controlled, and refresh rate control can be achieved.

[0122] In one specific implementation, the image compositor can perform allocation of the composition task to the hardware composer (HWC) in the hardware abstraction layer or the GPU after receiving a plurality of layers drawn with content. For example, if the composition task includes a rounded corner clipping task, etc., the GPU can be allocated to perform image composition, and if the composition task only includes a simple layer superposition task, the HWC can be allocated to perform image composition. Thus, control of image composition can be achieved.

[0123] The hardware abstraction layer runs in the user space, encapsulates the kernel layer driver, and provides a calling interface to the upper layer. The hardware abstraction layer can include the HWC. The HWC can be used for image composition processing, and for providing the synthesized image data to the display driver.

[0124] It should be noted that the image data obtained by the GPU performing image composition can also be provided to the display driver through the HWC.

[0125] The kernel layer includes a driver for driving hardware, such as a display driver. The display driver can be used to send the synthesized image data to the display screen for display, such as writing the image data to the RAM and then refreshing to the display screen for display in response to the arrival of the TE signal.

[0126] The kernel layer can also include a display serial interface (DSI). The DSI can be used for data transmission between the display driver and the display screen, such as transmission of image data.

[0127] The hardware layer can include CPU, GPU, display screen (further including display panel, DDIC, GRAM), etc.

[0128] Further, the kernel layer and the hardware layer can transmit image data through the mobile industry processor interface (MIPI).

[0129] To this end, it needs to be explained that the division of the software and hardware modules in the above description of the electronic device in FIG. 5 and FIG. 7A is exemplary and is not limited to this. For example, the display driver function as the core of the present disclosure can also be implemented by other modules or incorporated into other modules.

[0130] The image display method provided by the embodiments of the present application can be executed in an electronic device with the above hardware structure and software and hardware architecture. The image display method of the embodiments of the present application will be described in detail below in further combination with the above hardware structure and software and hardware architecture.

[0131] Referring to FIG. 7B, the image display method can include the following steps, each of which can be specifically executed by the display driver in the electronic device:

[0132] S701, the electronic device queries whether there is a first identifier, the first identifier indicating that the target image display scheme is enabled. If yes, S702 is executed.

[0133] The target image display scheme refers to a scheme in which the display driver can be triggered to display an image at a specific time between a TE signal and two TE signals. That is, the electronic device can not only perform image display when a TE signal is detected, but also perform image display at a specific time between two TE signals. It should be noted that the target image display scheme can also be referred to as a software high-frequency TE scheme, a software and hardware TE combination scheme, etc., which is not limited in the present application.

[0134] In a specific implementation, the target image display scheme is applied to a specific display screen, and the first identifier can be preconfigured in a mobile phone with the specific display screen.

[0135] It should be noted that in the 8T-LTPO screen, during the time when the Source signal is in a holding state (i.e., low level) after completing the image display, the DDIC can trigger the display driver to display the image in advance based on the 360Hz TE signal, and respond to the image display at any time to display the new image on the display panel, thereby reducing the display lag. However, since the LTPS / 7T-LTPO screen cannot generate a 360Hz TE signal, nor can it respond to the image display at any time during the time when the Source signal is in a holding state, it is not possible to reduce the display lag in the manner of the above-mentioned 8T-LTPO screen. Based on this, the above-mentioned specific display screen can be a LTPS / 7T-LTPO screen, i.e., the target image display scheme can be applied to the LTPS / 7T-LTPO screen to achieve the purpose of reducing the display lag.

[0136] In another specific implementation, the target sending picture scheme is applied in part of the models, in which the first identifier can be pre-configured. It should be noted that the electronic devices with LTPS / 7T-LTPO screens may be partially applicable to the target sending picture scheme, and the remaining part may not be applicable to the target sending picture scheme.

[0137] After booting, the electronic device can query the first identifier, such as during boot initialization. If the first identifier is queried, it indicates that the electronic device starts the target sending picture scheme. If the first identifier is not queried, it indicates that the electronic device does not start the target sending picture scheme.

[0138] Of course, the embodiments of the present application are not limited to determining whether to start the target sending picture scheme by querying the first identifier.

[0139] For example, the electronic device can also determine whether to start the target sending picture scheme by model white list matching. The model white list records the mobile phone models that start the target sending picture scheme, such as the above-mentioned part of the models and / or the models of mobile phones with specific display screens. If the current model is in the model white list, it indicates that the mobile phone starts the target sending picture scheme. If the current model is not in the model white list, it indicates that the mobile phone does not start the target sending picture scheme.

[0140] At this point, it should be noted that in actual implementation, the target sending picture scheme can also be applied to all mobile phones, or only the code of the target sending picture scheme can be configured in the mobile phones applicable to the target sending picture scheme, such as the above-mentioned part of the models or the mobile phones with specific display screens. In these implementation modes, the electronic device does not need to determine whether the current electronic device starts the software high-frequency TE scheme. For example, the above-mentioned S701 can also be omitted.

[0141] In the case of determining to start the target sending picture scheme, the electronic device can perform the following S702 and subsequent steps to implement the target sending picture scheme. In addition, in the case of determining not to start the target sending picture scheme, the electronic device can adopt the conventional scheme to send a picture every time the TE signal arrives.

[0142] S702, in response to the rising edge of the TE signal, the electronic device initializes the timer of the target sending picture scheme.

[0143] Among them, the timer can be used to indicate a specific time. For example, the timing time of the timer is 2.7ms, and the timing time of the timer reaches 2.7ms, which indicates that the specific time is reached, and the picture can be sent.

[0144] In a specific implementation, the target signal can be triggered when the timing time of the timer arrives, that is, the target signal is a clock signal. The target signal is used to trigger the execution of the image sending. The electronic device can execute the image sending when detecting the target signal, thereby realizing the image sending at a specific moment.

[0145] It should be noted that the target signal can be generated by the display driver or other modules in the SoC, and the present application does not make specific limitations, and the following will be described by taking the display driver as an example.

[0146] In actual implementation, the timing time can be set according to actual needs by those skilled in the art. Among them, there can be multiple specific moments between two TE signals, and accordingly, multiple timing times can be set. The interval between the timing times can be fixed or variable. In this paper, the interval between the timing times is mainly fixed. Exemplarily, the frequency of the timing time can be 240Hz, 360Hz, 480Hz, etc. For example, the frequency of the timing time is 360Hz, that is, the timing time arrives once every 2.7ms. It should be noted that generally, the frequency of the timing time is higher than the frequency of the TE signal, so that the timing time can arrive at least once between the arrival times of the two TE signals, that is, at a specific moment, thereby realizing timely image sending.

[0147] It should be noted that the multiple specific moments can be set by the timing times of multiple timers, or the multiple specific moments can also be set by multiple timing times of the same timer, and the present application does not make specific limitations. In this paper, multiple timing times of one timer are mainly taken as an example.

[0148] Taking the frequency of the timing time of the timer as 360Hz as an example, it indicates that the multiple specific moments include the moments when the timer counts about 2.7ms, 5.5ms, 8.3ms.

[0149] It is worth noting that the TE signal is generated by the DDIC based on the clock of the display screen, and the timer indicating the specific moment is generated based on the clock of the SoC. It should be understood that there are differences in frequency, error, etc. between the clock of the display screen and the clock of the SoC. Based on this, the electronic device can initialize / calibrate the timer after detecting the rising edge of the TE signal each time, such as resetting the timer, so that the timer starts counting based on the time of detecting the rising edge of the TE signal this time, which can avoid the misalignment of the target signal and the TE signal due to the clock difference, and further avoid the phenomenon of screen flicker.

[0150] For specific implementation of initializing the timer, please refer to the description of FIG. 9 and its related context below, which will not be described in detail here.

[0151] It should be noted that after the timer is initialized, the timer will continue to count down, and when the timing time is reached, the target signal can be triggered. In the case of multiple timing times, the target signal is triggered when each timing time is reached. For example, the target signal is triggered once every 2.7ms or so.

[0152] In other embodiments, the electronic device can also not consider the clock difference, so that the above S702 can be omitted. In this embodiment, the display driver can start the timer when the rising edge of the first TE signal is detected, and the subsequent timer can continue to count down, rather than restarting counting after detecting the rising edge of the TE signal each time. For example, before the rising edge of the TE signal arrives, the timing is 8.3ms, and after the rising edge of the TE signal arrives, the timing can continue from 8.3ms.

[0153] S703, the electronic device obtains image data.

[0154] For example, the electronic device can obtain image data of a frame of image through drawing, rendering and synthesis.

[0155] It should be noted that the execution order of the above S702 and S703 is not limited to that shown in FIG. 7B. In practice, when the rising edge of the TE signal arrives, the above S702 can be executed. And the electronic device can execute S703 to obtain image data based on the triggering of the Vsync signal.

[0156] S704, the electronic device detects whether the condition of sending a picture before the TE signal arrives is met. If yes, S705 is executed; if not, S706 is executed.

[0157] In some embodiments, the condition of sending a picture before the TE signal arrives includes that there is a processing lag, and the condition of sending a picture at a certain time is met. Or, the condition of sending a picture before the TE signal arrives includes that there is no processing lag, and the previous time also sends a picture at a certain time. Here, the present application scheme is mainly described in this embodiment. For this embodiment, please refer to the description of the embodiment of FIG. 8 (such as S812-S814) below, which will not be described here.

[0158] In some embodiments, the condition that the image is sent before the TE signal arrives includes that a time length of waiting for the rising edge of the TE signal after the image data is obtained exceeds a time length threshold (e.g., 2.7 ms). That is, the image can be sent in advance after a relatively long time length of waiting for the TE signal, so that the image is sent to the display screen in time, and the response delay caused by a too long time length of waiting for the TE signal is avoided, thereby improving the timeliness of the response and reducing the display lag to some extent. This embodiment is particularly suitable for image processing scenarios with high requirements for the timeliness of the response, such as a game scenario, in which the timeliness of the response is improved by sending the image in advance.

[0159] In a specific implementation, on the basis that the time length of waiting for the TE signal exceeds the time length threshold, the condition that the image is sent before the TE signal arrives further includes that the image is not sent in advance for the first n1 (n1>0, n1 is an integer, e.g., n1=1) frames. After the time length of waiting for the TE signal exceeds the time length threshold and triggers the image to be sent in advance, the image is not sent in advance for the next n1 consecutive frames, so that the application frame rate is not continuously increased, and a large frame rate fluctuation does not occur when the frame rate returns to normal, thereby reducing the frame rate fluctuation and improving the visual experience.

[0160] In a specific implementation, on the basis that the time length of waiting for the TE signal exceeds the time length threshold, the condition that the image is sent before the TE signal arrives further includes that the image is not sent in advance if the image is lost. It should be noted that if the timing of sending the image in advance and the timing of sending the image last time are between the falling edges of two consecutive TE signals, the image is only refreshed once in the display panel, and thus one frame is lost. Based on this, the electronic device can further detect whether the timing of sending the image in advance and the timing of sending the image last time are between the falling edges of two consecutive TE signals before the image is sent in advance. If the timings are between the falling edges of two consecutive TE signals, the electronic device does not send the image in advance. Otherwise, if the timings are not between the falling edges of two consecutive TE signals, the electronic device sends the image in advance.

[0161] Further, in the case that it is detected that the image is sent in advance will cause the image to be lost, the electronic device can further increase the frequency of the TE signal from a current frequency 1 to a frequency 2 (e.g., from 60 Hz to 90 Hz), and restore the frequency of the TE signal to the frequency 1 after the electronic device runs at the frequency 2 for at least one frame. In this way, on the one hand, the image can be sent in advance continuously without causing the image to be lost in the future. On the other hand, the frequency of the TE signal is increased to the frequency 2, so that the time length of waiting for the TE signal is reduced, and the image can be sent in time. On the other hand, after the frequency of the TE signal is restored to the frequency 1, the problem that the image is lost caused by sending the image in advance does not usually occur, so that the image can be sent in advance when the time length of waiting for the TE signal is relatively long.

[0162] In a specific implementation, the condition that the image is sent before the TE signal arrives further includes that the frequency of the TE signal is frequency 1. That is, during the TE signal of frequency 2, even if the time length of waiting for the TE signal exceeds the time length threshold, the electronic device does not send the image in advance. In this way, the display time length of the image is only changed from the period corresponding to frequency 1 to the period corresponding to frequency 2, such as from 16.6 ms corresponding to 60 Hz to 11.1 ms corresponding to 90 Hz, and a larger frame rate change, such as from 60 Hz to higher than 90 Hz, does not occur, which can further improve the visual experience.

[0163] Similarly, in a specific implementation, the condition that the image is sent before the TE signal arrives further includes that the current is the first n2 (n2>0, n2 is an integer, such as n2=1) frame image after the frequency of the TE signal returns to frequency 1. That is, in the first few frame images of the TE signal that returns to frequency 1, even if the time length of waiting for the TE signal exceeds the time length threshold, the electronic device does not send the image in advance. In this way, the display time length of the image is only changed from the period corresponding to frequency 2 to the period corresponding to frequency 1, such as from 11.1 ms corresponding to 90 Hz to 16.6 ms corresponding to 60 Hz, and a larger frame rate change, such as from 90 Hz to lower than 60 Hz, does not occur, which can further improve the visual experience.

[0164] After detecting that the condition that the image is sent before the TE signal arrives is met, the electronic device can perform S705 to send the image at a specific time. After detecting that the condition that the image is sent before the TE signal arrives is not met, the electronic device can perform S706 to still send the image after detecting that the rising edge of the TE signal arrives.

[0165] S705, the electronic device sends the image at a specific time before the TE signal arrives based on the timing time of the timer.

[0166] For example, after the next timing time of the timer arrives (i.e., the specific time arrives), the electronic device can generate a target signal. When the condition that the image is sent before the TE signal arrives is met, the electronic device can detect the target signal, thereby triggering the sending of the image, i.e., writing the image data into the GRAM.

[0167] It should be noted that the electronic device can generate a target signal at each timing time of the timer, but in the case of meeting the condition that the image is sent at a specific time, the detection of the target signal is triggered, so that the image can be sent in advance at the timing time when the condition that the image is sent at a specific time is met.

[0168] In some embodiments, the electronic device can open the TE signal sending picture switch by default, so as to send a picture by default by detecting the rising edge of the TE signal. Subsequently, the electronic device detects that the condition of sending a picture before the TE signal arrives is met, as in S705, and can switch to open the specific time sending picture switch. In the case of opening the specific time sending picture switch, the electronic device can detect the target signal. After detecting the target signal, it indicates that the timing time of the timer is reached, that is, the specific time is reached, and the electronic device can perform picture sending. In this way, the electronic device can send a picture by detecting the rising edge of the TE signal or detecting the target signal through switch switching.

[0169] Further, after responding to the target signal to send a picture, the electronic device can switch back to open the TE signal sending picture switch. In this way, the electronic device can resume detecting the TE signal, so as to detect the rising edge of the TE signal and initialize the timer each time. In actual implementation, the electronic device can switch back to open the TE signal sending picture switch after sending a picture each time. In this way, without specifically opening the specific time sending picture switch, switching back to open the TE signal sending picture switch after sending a picture can simplify the process.

[0170] Of course, the electronic device can also not indicate the specific time through the timer, that is, S702 can also be omitted, and correspondingly, S705 can not be performed based on the timing time of the timer. Illustratively, the specific time can be a time interval of a specific time length after the electronic device obtains image data of a frame of image. Correspondingly, the electronic device can perform picture sending after a specific time interval after obtaining the image data, such as after S703. Illustratively, the specific time is a time when the electronic device detects that the condition of sending a picture before the TE signal arrives is met. Correspondingly, the electronic device can perform picture sending when the condition of sending a picture before the TE signal arrives is met. Embodiments of the present application do not make specific limitations in this regard.

[0171] S706, the electronic device performs picture sending when the rising edge of the next TE signal arrives.

[0172] Further, in the embodiment in which the electronic device decides the picture sending mode based on whether there is a processing lag, referring to FIG. 8, the image sending method comprises the following steps:

[0173] S801, after booting, the display driver queries a first identifier, and the first identifier indicates that the target picture sending scheme is opened. For details, refer to the description of S701 above.

[0174] S802, the DDIC generates a TE signal.

[0175] For example, the DDIC can periodically generate the TE signal, and the frequency of the TE signal can be 60 Hz, 90 Hz, 120 Hz, etc., and the corresponding period is about 16.6 ms, 11.1 ms, 8.3 ms, respectively.

[0176] It should be noted that the DDIC can continuously generate the TE signal, and the execution time is not limited to that shown in FIG. 8. In addition, the drawings herein mainly illustrate a fixed frequency, and in practice, the frequency of the TE signal can be changed, such as from 120 Hz to 90 Hz, etc.

[0177] S803, the display driver detects the rising edge of the TE signal.

[0178] The display driver can detect the rising edge of the TE signal every time the DDIC generates the TE signal. It should be understood that the rising edge of the TE signal indicates that a new TE signal has arrived.

[0179] In the conventional scheme, when the rising edge of the TE signal arrives, if there is already processed image data, the display driver will trigger the image sending, and if there is no processed image data, the display driver can only trigger the image sending when the next rising edge of the TE signal is detected. In the embodiments of the present application, the display driver does not trigger the image sending when the rising edge of the TE signal is detected, but can trigger the image sending based on whether there is a processing stall after receiving the image data. The triggering mode includes sending the image at the rising edge of the TE signal and sending the image at a specific time between two TE signals, which will be described below in S812-S817, and will not be described in detail here.

[0180] S804, the display driver initializes the timer of the target image sending scheme, so that the timer starts counting again.

[0181] Taking the frequency of the TE signal as 120 Hz as an example, referring to FIG. 9, the display driver can initialize the timer every time the rising edge of the TE signal is detected about 8.3 ms apart, so that the timer can start counting from 0. In this way, the timing time of the timer refers to the time interval from the rising edge of the current (most recent) TE signal.

[0182] Continuing to refer to FIG. 9, taking the frequency of the timing time of the timer as 360 Hz as an example, the specific time includes the time t1 which is 2.7 ms away from the rising edge of the most recently detected TE signal, the time t2 which is 5.5 ms away from the rising edge of the most recently detected TE signal, and the time t0 which is 8.3 ms away from the rising edge of the most recently detected TE signal, i.e. the rising edge of the next TE signal.

[0183] For the part not described in detail in S804, please refer to the description of S702 above, which will not be repeated here.

[0184] In the case of determining to start the target image sending scheme, the processing of one frame of image is still completed through S806-S811 described below.

[0185] S806, the image compositor (SF) distributes the Vsync signal to the application program.

[0186] For example, the image compositor can simulate the Vsync signal based on the TE signal, and distribute the Vsync signal to the application program that needs to refresh the image after each Vsync signal arrives, so as to trigger the application program to start the processing of a new frame of image. Generally, the application program that needs to refresh the image is the application program running in the foreground.

[0187] For example, there is a game application running in the foreground, and the image compositor can distribute the Vsync signal to the game application.

[0188] It should be noted that there can be one or more application programs running in the foreground, and the image compositor can distribute the Vsync signal to each application program.

[0189] S807, in response to the Vsync signal, the application program performs drawing processing and performs rendering processing after the drawing is completed to obtain a content layer.

[0190] For example, the application program can call CPU, GPU, etc. to complete the drawing and rendering processing.

[0191] S808, the application program sends the content layer to the image compositor.

[0192] S809, the image compositor performs image composition and obtains image data.

[0193] For example, the image compositor can assign the composition task to the GPU or the hardware compositor (HWC) to complete the image composition processing through the GPU or the hardware compositor.

[0194] It should be noted that in the above S807-S809, due to the load and other reasons, the CPU and GPU can not start the processing of a new frame of image in time, and can not complete the image processing in time.

[0195] S810, the image compositor sends the image data to the display driver.

[0196] S811, the display driver receives the image data.

[0197] Thereafter, the display driver can perform image sending processing.

[0198] It should be noted that the execution time of S802-S804 and S806-S811 is not limited to that shown in FIG. 8. In practice, the display driver can execute S802-S804 as soon as it detects the rising edge of the TE signal, and the image synthesizer can execute S806-S811 after simulating and distributing the Vsync signal, and the two do not have an absolute order. Generally, the rising edge of the TE signal is consistent with the simulated Vsync signal, that is, the time when the display driver detects the rising edge of the TE signal is generally consistent with the time when the image synthesizer distributes the Vsync signal.

[0199] After receiving the image data, the display driver can determine the triggering mode of the image sending through S812-S817.

[0200] S812, the display driver detects whether there is a processing stall. If so, S813 is executed; if not, S816 is executed.

[0201] The processing stall refers to a case where the image sending time interval of adjacent two frames exceeds the preset frame length, and the preset frame length is the frame length corresponding to the application frame rate. In the case where the refresh rate of the display screen is consistent with the application frame rate, such as the refresh rate being equal to the preset frame length which is equal to the frame length corresponding to the application frame rate, and also equal to the period of the TE signal, the preset frame length is mainly explained as equal to the period of the TE signal in the following.

[0202] In a specific implementation, the image sending time interval includes the interval between the start time of the previous image sending of the display driver and the time after the display driver receives the image data this time.

[0203] If the interval between the start time of the previous image sending of the display driver and the time after the display driver receives the image data this time exceeds the preset frame length, it indicates that the interval between the previous and the current image sending is too long, and there is a processing stall. If the interval between the start time of the previous image sending of the display driver and the time after the display driver receives the image data this time does not exceed the preset frame length, it indicates that the interval between the previous and the current image sending is appropriate, and there is no processing stall.

[0204] It should be noted that if the current processing obtains the image data of the first frame image, the start time of the previous image sending can be understood as the time of the rising edge of the first TE signal. Of course, in other embodiments, if it is the first frame image, the display driver can also trigger the image sending as soon as the rising edge of the TE signal comes, that is, S812 and the subsequent steps can be omitted.

[0205] Further, after receiving the image data, the display driver can also perform the preparation work before sending the image, such as initializing the hardware register for sending the image, initializing the timing for sending the image, etc. After completing the preparation work before sending the image, the display driver can send the image. Then, the preparation work before sending the image also increases the time interval for sending the image. Based on this, the time interval for sending the image can specifically include the interval between the start time of the previous sending of the image by the display driver and the time for the current preparation for sending the image by the display driver.

[0206] Referring to (a) in FIG. 10, the display driver starts to send the image of FIG. A at time t3, and completes the preparation work before sending the image of FIG. B at time t4. If the interval between time t3 and time t4 exceeds the period of the TE signal (simplified as TE period in the figure, the same hereinafter), the processing process of FIG. B has processing lag.

[0207] Referring to (b) in FIG. 10, the display driver starts to send the image of FIG. A at time t5, and completes the preparation work before sending the image of FIG. B at time t6. If the interval between time t5 and time t6 does not exceed the period of the TE signal, the processing process of FIG. B does not have processing lag.

[0208] It should be noted that the start time (such as time t3, time t5) of the previous sending of the image (such as the sending of the image of FIG. A) coincides with the rising edge of the TE signal in (a) in FIG. 10 and (b) in FIG. 10. In practice, the start time of the previous sending of the image can also not coincide with the rising edge of the TE signal, as shown in (c) in FIG. 10 and (d) in FIG. 10.

[0209] (a) in FIG. 10, (b) in FIG. 10, (c) in FIG. 10, and (d) in FIG. 10 all take the time for the current preparation for sending the image (such as completing the preparation work before sending the image of FIG. B) by the display driver as an example, which does not coincide with the rising edge of the TE signal. In practice, the time for the current preparation for sending the image by the display driver can also coincide with the rising edge of the TE signal, as shown in (e) in FIG. 10 and (f) in FIG. 10, time t7 and time t8 coincide with the rising edge of the TE signal.

[0210] Of course, in actual implementation, the above-mentioned manner for detecting whether there is processing lag is not limited. For example, the display driver can also detect whether there is processing lag based on the interval between the time for previously receiving the image data and the time for currently receiving the image data. If the interval between the time for previously receiving the image data and the time for currently receiving the image data exceeds the preset frame length, it indicates that there is processing lag, and if the interval between the time for previously receiving the image data and the time for currently receiving the image data does not exceed the preset frame length, it indicates that there is no processing lag.

[0211] If there is processing lag, the display driver can send the image by using the following S813-S815.

[0212] S813, the display driver detects whether the condition of touching the sending map at the specific time is met. If yes, S814 is executed; if no, S815 is executed.

[0213] Specifically, the display driver can detect whether the condition of touching the sending map at the specific time is met by detecting whether the specific time that does not coincide with the rising edge of the TE signal is included when the current time (e.g., the time when the preparation work before sending the map is completed) to the arrival of the rising edge of the TE signal. It should be noted that the coincidence of the rising edge of the TE signal and the specific time is only theoretical. Taking the timer as an example, the frequency of the TE signal is 120 Hz, and the frequency of the timing time of the timer is 360 Hz. Therefore, theoretically, the last timing time 8.3 ms (e.g., time t0 in FIG. 9) in a TE period coincides with the rising edge of the TE signal. However, as described above (e.g., S702), there are differences in frequency, error, etc. between the clock of the display screen and the clock of the SoC. Therefore, the last timing time 8.3 ms in a TE period and the rising edge of the TE signal can be deviated.

[0214] If the current time to the arrival of the rising edge of the TE signal includes the specific time that does not coincide with the rising edge of the TE signal, it indicates that the sending map can be touched more timely through the included specific time before the rising edge of the TE signal arrives, and the condition of touching the sending map at the specific time is met.

[0215] Still taking the example of the frequency of the TE signal being 120 Hz and the frequency of the timing time being 360 Hz, referring to (a) in FIG. 11, the current time is located after time t9 and before time t1. Therefore, when the current time to the arrival of the rising edge of the TE signal (denoted as time t10 in the figure), it includes three specific times of time t1, time t2, and time t10. Among them, time t1 and time t2 do not coincide with the rising edge of the TE signal, which indicates that the sending map can be touched at time t1 or time t2 before the rising edge of the TE signal arrives, and the condition of touching the sending map at the specific time is met.

[0216] Continuing to refer to (a) in FIG. 11, if the current time is located after time t1 and before time t2, the current time to time t10 includes two specific times of time t2 and time t10. Among them, time t2 does not coincide with the rising edge of the TE signal, which indicates that the sending map can be touched at time t2 before the rising edge of the TE signal arrives, and the condition of touching the sending map at the specific time is met.

[0217] If the current time arrives at the rising edge of the TE signal, and if the specific time does not coincide with the rising edge of the TE signal, it indicates that the condition of sending the image at the specific time is not met, because the image cannot be sent at the specific time before the rising edge of the TE signal.

[0218] Referring to (a) of FIG. 11, if the current time is after time t2 and before time t10, the current time to time t10 only includes one specific time, i.e., time t10, which coincides with the rising edge of the TE signal, the condition of sending the image at the specific time is not met, because the image cannot be sent at the specific time before the rising edge of the TE signal.

[0219] Further, when the condition of sending the image at the specific time is met, the display driver can perform S814, so that the image can be sent at the specific time. When the condition of sending the image at the specific time is not met, the display driver can perform S815, so that the image can be sent when the rising edge of the TE signal arrives, avoiding unnecessary power consumption of detecting the target signal, etc.

[0220] S814, when the timing time of the timer is detected to arrive, the display driver writes the image data into the GRAM.

[0221] When the timing time arrives, it is equivalent to that the specific time arrives.

[0222] Referring to (b) of FIG. 11, the current time is time t11 after time t9 and before time t1, and the next timing time corresponds to time t1, so that the display driver can detect the target signal Z1 at time t1, thereby triggering the sending of the image B.

[0223] Referring to (c) of FIG. 11, the current time is time t12 after time t1 and before time t2, and the next timing time corresponds to time t2, so that the display driver can detect the target signal Z2 at time t2, thereby triggering the sending of the image B.

[0224] It should be noted that if the current time is exactly at the specific time corresponding to the timing time, the image can be sent directly at the specific time. For example, the current time is time t1 in (a) of FIG. 11, the display driver can detect the target signal at time t1, thereby triggering the sending of the image B. For another example, the current time is time t2 in (a) of FIG. 11, the display driver can detect the target signal at time t2, thereby triggering the sending of the image B.

[0225] S815, when the rising edge of the TE signal is detected to arrive, the display driver writes the image data into the GRAM.

[0226] For example, if the current time is just the time when the rising edge of the TE signal arrives, the display driver can directly perform the image transfer at the time, e.g., if the current time is the time t10 in (a) of FIG. 11, the display driver can detect the rising edge of the TE signal at the time t10, thus triggering the image transfer of the image B.

[0227] Referring to (d) of FIG. 11, if the current time is the time t13 after the time t2 and before the time t10, the display driver can wait until the time t10 to detect the rising edge of the next TE signal, thus triggering the image transfer of the image B.

[0228] For example, if the current time is just the time when the rising edge of the TE signal arrives, the display driver can directly perform the image transfer at the time, e.g., if the current time is the time t10 in (a) of FIG. 11, the display driver can detect the rising edge of the TE signal at the time t10, thus triggering the image transfer of the image B.

[0229] With the above S813-S815, in the case of the processing lag, on one hand, if the condition for the image transfer at the specific time is met, the display driver can perform the image transfer at the specific time, instead of necessarily performing the image transfer when the rising edge of the TE signal is detected, thus improving the timeliness of the image transfer. On the other hand, if the condition for the image transfer at the specific time is not met, the display driver still keeps triggering the image transfer when the rising edge of the TE signal is detected, thus ensuring the detection of the arrival of the TE signal, thus facilitating the initialization of the timer.

[0230] Of course, in another embodiment where the timer is not initialized, the display driver can directly perform the image transfer when the timing time of the timer (which can be the timing time coinciding with the rising edge of the TE signal) is detected, i.e., the above S813-S815 can be omitted.

[0231] If there is no processing lag, the display driver can follow the triggering mode of the previous image transfer (image transfer at the rising edge of the TE signal or image transfer at the specific time). Details are shown in the following S816-S817.

[0232] S816, if the previous image transfer is performed at the rising edge of the TE signal, the display driver writes the image data into the GRAM when the rising edge of the TE signal is detected.

[0233] Referring to (a) of FIG. 12, if the previous image transfer of the image A is performed at the rising edge of the TE signal, the display driver can wait until the time t14 to detect the rising edge of the next TE signal, thus triggering the image transfer of the image B.

[0234] It should be noted that if the current time is exactly the time when the rising edge of the TE signal arrives, the sending of the picture can be performed directly at this time. For example, the current time is the time t14 in (a) of Fig. 12, and the display driver can detect the sending of the picture B at the time t14.

[0235] In addition, the sending of the picture at the time when the rising edge of the TE signal arrives includes the following two cases: the first case is that the processing of the previous picture (e.g., picture A) has a processing lag, and the sending of the picture is triggered at the time when the rising edge of the TE signal arrives through the aforementioned S815. The second case is that the processing of the previous picture (e.g., picture A) has no processing lag, and the sending of the picture is triggered at the time when the rising edge of the TE signal arrives through S816.

[0236] S817, if the sending of the picture is triggered at the time when the timing time of the timer arrives, the display driver writes the image data into the GRAM after detecting that the timing time of the timer arrives.

[0237] Referring to (b) of Fig. 12, the sending of the picture A is performed at a specific time t15 corresponding to the timing time of the timer last time, and the display driver can detect the target signal Z3 at a specific time t16 corresponding to the next timing time of the timer, thereby triggering the sending of the picture B.

[0238] It should be noted that if the current time is exactly the time when the timing time of the timer arrives, the sending of the picture can be performed directly at this time. For example, the current time is the time t16 in (b) of Fig. 12, and the display driver can detect the sending of the picture B at the time t16.

[0239] Similarly, the sending of the picture at the time when the timing time of the timer arrives also includes the following two cases: the first case is that the processing of the previous picture (e.g., picture A) has a processing lag, and the sending of the picture is triggered at the time when the timing time of the timer arrives through the aforementioned S814. The second case is that the processing of the previous picture (e.g., picture A) has no processing lag, and the sending of the picture is triggered at the time when the timing time of the timer arrives through S817.

[0240] By using the above S816-S817, in the case where there is no processing lag, the display driver can continue to use the triggering mode of the sending of the picture last time, and it is not necessarily required to perform the sending of the picture only when the rising edge of the TE signal is detected, thereby improving the timeliness of the sending of the picture. For example, in (b) of Fig. 12, after completing the preparation work before the sending of the picture, the display driver does not need to wait until the rising edge of the next TE signal arrives, but can trigger the sending of the picture at the time t16.

[0241] In addition, in the absence of processing jam, the display driver continues to use the trigger mode of the previous image sending, and the time interval of image sending can be controlled to be consistent with the agreement of the upper layer (such as the image synthesizer SF), so that the image is not sent in a time interval less than the agreement, thereby avoiding more serious processing jam caused by inconsistency.

[0242] After the foregoing step of triggering the display driver to send the image, the image in the display panel can be refreshed and displayed after the falling edge of the TE signal ends, as shown in S818-S819:

[0243] S818, after the falling edge of the TE signal ends, the DDIC refreshes the image data in the GRAM to the display panel.

[0244] S819, the display panel displays a new frame of image.

[0245] Next, taking the LTPS / 7T-LTPO screen as an example, and combining several specific examples, the effect of reducing display jam by using the embodiment of FIG. 8 is described.

[0246] Example one

[0247] Referring to FIG. 13, the frequency of the TE signal is 120Hz, and the period of the TE signal is about 8.3ms. The timing time of the timer has a frequency of 360Hz, and the timing time is at the positions of 2.7ms, 5.5ms and 8.3ms after the rising edge of the TE signal, which correspond to the 3 target signals (including the punched (i.e. detected) and the not punched (i.e. not detected)) after the rising edge of each TE signal in the figure in turn. That is, in one TE period, the timing time can be reached 3 times. And, the processing jam exists continuously in FIG. B to FIG. D, and the jam duration is 2.7ms.

[0248] It should be noted that, in order to facilitate viewing, the target signal corresponding to 8.3ms is not completely coincided with the rising edge of the TE signal, and in practice it can be coincided. The same reason is also in FIG. 14-FIG. 16 below. It can be understood that the not punched target signal can not be visible in the trace diagram, and the not punched target signal is drawn in the figure only to facilitate viewing of all target signals generated between two TE signals, and does not mean that it is visible in the trace diagram. In addition, the punched target signal is usually visible in the trace diagram.

[0249] Next, according to the timing of FIG. 13, the image sending and refreshing display process of FIG. A-FIG. E is introduced in turn:

[0250] At time t1, the rising edge of the TE signal arrives.

[0251] In one aspect, the display driver can perform the sending of picture A, as indicated by the sending picture mark A in the figure. It should be noted that if picture A is the first frame picture, the display driver can directly determine that the sending of picture A is performed when the rising edge of the TE signal is detected; if picture A is not the first frame picture, the display driver can also determine that the sending of picture A is performed when the rising edge of the TE signal is detected through S812-S817.

[0252] In another aspect, the display driver can perform S803-S804 to control the timer to start timing from 0.

[0253] At time t2, the falling edge of the TE signal arrives.

[0254] The DDIC refreshes picture A to the display panel, as indicated by the picture refreshing mark A1 in the figure.

[0255] At time t3, the rising edge of the TE signal arrives.

[0256] The display driver can perform S803-S804 to control the timer to start timing from 0.

[0257] At time t4, the falling edge of the TE signal arrives.

[0258] Since the processing of picture B has not been completed at this time, the display driver has not performed the sending of picture B, and the DDIC can again refresh picture A to the display panel, as indicated by the picture refreshing mark A2 in the figure. Accordingly, the display panel displays picture A for two consecutive frames, and display stuttering occurs. In other implementation manners, even if the DDIC does not perform the processing of again refreshing picture A to the display panel, the display panel can also maintain displaying picture A in the case that the display driver has not performed the sending of picture B. It should be noted that whether the DDIC will refresh picture A again is related to the implementation logic of the display screen, and the logic of different display screens can be different, so in some display screens, the DDIC will refresh picture A again, while in other display screens, the DICC will not refresh picture A again. The processing procedures of other pictures below are the same.

[0259] At time t5, the processing of picture B is completed, as S806-S811 for picture B are performed.

[0260] The display driver can perform S812 to detect that there is processing stuttering.

[0261] Then, the display driver can perform S813 to detect that the condition of sending a picture at a specific time is met.

[0262] Then, the display driver can perform S814 to detect the target signal Z1 at time t5 at the timing time 2.7 ms of the timer, i.e., trigger the display driver to perform the sending of picture B, as indicated by the sending picture mark B in the figure.

[0263] At time t6, the rising edge of the TE signal arrives.

[0264] The display driver can perform S803-S804 to control the timer to start counting from 0.

[0265] At time t7, the falling edge of the TE signal arrives.

[0266] The DDIC flushes the picture B to the display panel, as shown by the flush picture sign B in the figure.

[0267] At time t8, the processing of the picture C is completed, e.g., S806-S811 for the picture C are performed.

[0268] The display driver can perform S812 to detect that there is processing lag.

[0269] Then, the display driver can perform S813 to detect that the condition for sending the picture based on the target signal is met.

[0270] Then, the display driver can perform S814 to detect the target signal Z2 at time t8 at the timing time 5.5 ms of the timer, triggering the display driver to perform the sending of the picture C, as shown by the send picture sign C in the figure.

[0271] At time t9, the rising edge of the TE signal arrives.

[0272] The display driver can perform S803-S804 to control the timer to start counting from 0.

[0273] At time t10, the falling edge of the TE signal arrives.

[0274] The DDIC flushes the picture C to the display panel, as shown by the flush picture sign C in the figure. It can be seen that although there is processing lag in the processing process of the picture B, the picture B is not continuously displayed on the display panel for multiple frames, and there is no display lag.

[0275] At time t11, the rising edge of the TE signal arrives, and the processing of the picture D is completed, e.g., S806-S811 for the picture D are performed.

[0276] After the processing of the picture D is completed, the display driver can perform S812 to detect that there is processing lag.

[0277] Then, the display driver can perform S813 to detect that the condition for sending the picture at a specific time is not met.

[0278] Then, the display driver can perform S815 to detect the rising edge of the TE signal at time t11, triggering the display driver to perform the sending of the picture D, as shown by the send picture sign D in the figure.

[0279] And, due to the arrival of the TE signal, on one hand, the display driver can perform S803-S804, control the timer to start timing from 0; on the other hand, the processing of the subsequent image can be triggered.

[0280] At time t12, the falling edge of the TE signal arrives.

[0281] The DDIC flushes the image D to the display panel, as shown by the flush image sign D in the figure. It can be seen that although the processing process of the image C has processing lag, the image C is not displayed continuously for multiple frames on the display panel, and no display lag occurs.

[0282] At time t13, the rising edge of the TE signal arrives, and the processing of the image E is completed, such as performing S806-S811 for the image E.

[0283] After the processing of the image E is completed, the display driver can perform S812 to detect that there is no processing lag.

[0284] Then, the display driver can perform S816 to trigger the display driver to perform the image sending of the image E at the rising edge of the TE signal, i.e., at time t13, as shown by the image sending sign E in the figure.

[0285] And, due to the arrival of the TE signal, the display driver can perform S803-S804 to control the timer to start timing from 0.

[0286] At time t14, the falling edge of the TE signal arrives.

[0287] The DDIC flushes the image E to the display panel, as shown by the flush image sign E in the figure. It can be seen that although the processing process of the image D has processing lag, the image D is not displayed continuously for multiple frames on the display panel, and no display lag occurs.

[0288] In the above example one, the processing processes of the three images B to D all have processing lag, and by using the embodiment of FIG. 8, only two images A are continuously displayed on the display panel, i.e., there is only one frame of display lag.

[0289] Example two

[0290] Referring to FIG. 14, the frequency of the TE signal is 90 Hz, so the period of the TE signal is about 11.1 ms. The timing time of the timer has a frequency of 360 Hz, so the timing time is 2.7 ms, 5.5 ms, 8.3 ms, and 11.1 ms after the rising edge of the TE signal, which corresponds to the four target signals (including the punched and not punched) between the rising edges of each TE signal in the figure in turn. That is, in one TE period, the timing time can be reached 4 times. And, the images B to D continuously have processing lag, and the lag duration is 2.7 ms.

[0291] It should be noted that the duration of low level in the TE signal of 120Hz and 90Hz is the same. At the same time, the period of the TE signal of 90Hz is longer, and accordingly, the duration of high level is longer. For example, the duration of high level of the TE signal in FIG. 14 is longer than that of the TE signal in FIG. 13.

[0292] The processes of sending and refreshing the images of FIGS. A-D are introduced in sequence below according to the timing of FIG. 14.

[0293] At time t1, the rising edge of the TE signal arrives.

[0294] On one hand, the display driver can send the image of FIG. A, as shown by the sending mark A in the figure. In the same way, if FIG. A is the first frame image, the display driver can directly determine to send the image of FIG. A when the rising edge of the TE signal is detected; if FIG. A is not the first frame image, the display driver can also determine to send the image of FIG. A when the rising edge of the TE signal is detected through S812-S817.

[0295] On the other hand, the display driver can execute S803-S804 to control the timer to start timing from 0.

[0296] At time t2, the falling edge of the TE signal arrives.

[0297] The DDIC refreshes the image of FIG. A to the display panel, as shown by the refreshing mark A in the figure.

[0298] At time t3, the rising edge of the TE signal arrives.

[0299] The display driver can execute S803-S804 to control the timer to start timing from 0.

[0300] At time t4, the processing of FIG. B is completed, for example, S806-S811 for the image of FIG. B are executed.

[0301] The display driver can execute S812 to detect that there is a processing lag.

[0302] Then, the display driver can execute S813 to detect that the condition of sending the image at a specific time is met.

[0303] Then, the display driver can execute S814 to detect the target signal Z1 at time t4 at the timing time 2.7ms of the timer, that is, trigger the display driver to send the image of FIG. B, as shown by the sending mark B1 in the figure.

[0304] At time t5, the falling edge of the TE signal arrives.

[0305] The DDIC can refresh the image of FIG. B to the display panel, as shown by the refreshing mark B in the figure.

[0306] At time t6, the rising edge of the TE signal arrives.

[0307] The display driver can perform S803-S804 to control the timer to start timing from 0.

[0308] At time t7, the falling edge of the TE signal arrives.

[0309] Since the processing of image C has not been completed at this time, the display driver has not performed the image sending of image C, and the DDIC can refresh image B to the display panel again, as shown by the image refreshing mark B2 in the figure. Correspondingly, the display panel displays image B for two consecutive frames, and display stuttering occurs.

[0310] At time t8, the processing of image C is completed, such as performing S806-S811 for image C.

[0311] The display driver can perform S812 to detect that there is processing stuttering.

[0312] Then, the display driver can perform S813 to detect that the condition of triggering image sending at a specific time is met.

[0313] Then, the display driver can perform S814 to detect the target signal Z2 at the timing time 5.5 ms of the timer, that is, at time t8, to trigger the display driver to perform the image sending of image C, as shown by the image sending mark C in the figure.

[0314] At time t9, the rising edge of the TE signal arrives.

[0315] The display driver can perform S803-S804 to control the timer to start timing from 0.

[0316] At time t10, the falling edge of the TE signal arrives.

[0317] The DDIC can refresh image C to the display panel, as shown by the image refreshing mark C in the figure.

[0318] At time t11, the processing of image D is completed, such as performing S806-S811 for image D.

[0319] The display driver can perform S812 to detect that there is processing stuttering.

[0320] Then, the display driver can perform S813 to detect that the condition of triggering image sending at a specific time is met.

[0321] Then, the display driver can perform S814 to detect the target signal Z3 at the timing time 8.3 ms of the timer, that is, at time t11, to trigger the display driver to perform the image sending of image D, as shown by the image sending mark D in the figure.

[0322] At time t12, the rising edge of the TE signal arrives.

[0323] The display driver can perform S803-S804 to control the timer to start timing from 0.

[0324] At time t13, the falling edge of the TE signal arrives.

[0325] The DDIC can refresh the display panel with the image D, as shown by the brush image symbol D in the figure. It can be seen that although the processing process of the image C has processing lag, the image C is not continuously displayed on the display panel for multiple frames, and no display lag occurs.

[0326] In the above-described second example, the processing processes of the images B-D all have processing lag, and in the embodiment of FIG. 8, only two frames of the image B are continuously displayed on the display panel, that is, only one frame of display lag exists.

[0327] Example Three

[0328] Referring to FIG. 15, the frequency of the TE signal is 60 Hz, and the period of the TE signal is about 16.6 ms. The timing time of the timer has a frequency of 360 Hz, and the timing time is 2.7 ms, 5.5 ms, 8.3 ms, 11.1 ms, 13.9 ms, and 16.6 ms after the rising edge of the TE signal, which sequentially correspond to the six target signals (including the punched and not punched) between the rising edges of each TE signal in the figure. That is, in one TE period, the timing time can be reached 6 times. Moreover, the images B-D continuously have processing lag, and the lag duration is 5.4 ms.

[0329] It should be noted that in the above-described examples of FIGS. 13 and 14, the LTPS / 7T-LTPO screen can be used. However, FIG. 15 shows the LTPS screen, and the duration of the low level of the 60 Hz TE signal in the LTPS screen is the same as the duration of the low level of the 120 Hz TE signal in FIG. 13 and the duration of the low level of the 90 Hz TE signal in FIG. 14. At the same time, the 60 Hz TE signal has a longer period, and accordingly, the duration of the high level in the LTPS screen is longer. For example, the duration of the high level of the TE signal in FIG. 15 is longer than the duration of the high level of the TE signal in FIGS. 13 and 14.

[0330] Next, the image sending and refresh display processes of the images A-D are introduced in sequence according to the timing of FIG. 15:

[0331] At time t1, the rising edge of the TE signal arrives.

[0332] In one aspect, the display driver can perform the sending of picture A, as indicated by the sending picture mark A in the figure, if picture A is the first frame picture. In the same way, if picture A is not the first frame picture, the display driver can determine, through S812-S817, that the sending of picture A is performed when the rising edge of the TE signal is detected.

[0333] In another aspect, the display driver can perform S803-S804 to control the timer to start timing from 0.

[0334] At time t2, the falling edge of the TE signal arrives.

[0335] The DDIC refreshes picture A to the display panel, as indicated by the refreshing picture mark A in the figure.

[0336] At time t3, the rising edge of the TE signal arrives.

[0337] The display driver can perform S803-S804 to control the timer to start timing from 0.

[0338] At time t4, the processing of picture B is completed, as S806-S811 for picture B are performed.

[0339] The display driver can perform S812 to detect that there is a processing lag.

[0340] Then, the display driver can perform S813 to detect that the condition of sending a picture at a specific time is met.

[0341] Then, the display driver can perform S814 to detect the target signal Z1 at time t4 at the timing time 5.5 ms of the timer, i.e., trigger the display driver to perform the sending of picture B, as indicated by the sending picture mark B in the figure.

[0342] At time t5, the falling edge of the TE signal arrives.

[0343] The DDIC can refresh picture B to the display panel, as indicated by the refreshing picture mark B1 in the figure.

[0344] At time t6, the rising edge of the TE signal arrives.

[0345] The display driver can perform S803-S804 to control the timer to start timing from 0.

[0346] At time t7, the falling edge of the TE signal arrives.

[0347] Since the processing of picture C is not completed at this time, the display driver has not performed the sending of picture C, and the DDIC can refresh picture B to the display panel again, as indicated by the refreshing picture mark B2 in the figure. Accordingly, picture B is displayed on the display panel for two consecutive frames, and a display lag occurs.

[0348] At time t8, the processing of image C is completed, e.g. S806-S811 for image C are executed.

[0349] The display driver can perform S812 to detect that there is a processing stall.

[0350] Then, the display driver can perform S813 to detect that the condition for triggering sending image at a certain time is met.

[0351] Then, the display driver can perform S814 to detect the target signal Z2 at time t8, which is at the position of the timing time 11.1ms of the timer, to trigger the display driver to send image C, as shown by the image sending sign C.

[0352] At time t9, the rising edge of the TE signal arrives.

[0353] The display driver can perform S803-S804 to control the timer to start counting from 0.

[0354] At time t10, the falling edge of the TE signal arrives.

[0355] The DDIC can refresh image C to the display panel, as shown by the image refreshing sign C.

[0356] At time t11, the rising edge of the TE signal arrives, and the processing of image D is completed, e.g. S806-S811 for image D are executed.

[0357] The display driver can perform S812 to detect that there is a processing stall.

[0358] Then, the display driver can perform S813 to detect that the condition for triggering sending image at a certain time is not met.

[0359] Then, the display driver can perform S814 to detect the target signal Z2 at time t11, which is when the rising edge of the TE signal arrives, to trigger the display driver to send image D, as shown by the image sending sign D.

[0360] At time t12, the falling edge of the TE signal arrives.

[0361] The DDIC can refresh image D to the display panel, as shown by the image refreshing sign D. It can be seen that although there is a processing stall in the processing of image C, there is no continuous multiple frames of image C displayed on the display panel, and no display stall occurs.

[0362] In the above example three, there is a processing stall in the processing of image B to image D. In the embodiment of FIG. 8, only two frames of image B are continuously displayed on the display panel, i.e. there is only one frame of display stall.

[0363] Example four

[0364] Different from the previous FIG. 15, referring to FIG. 16, the processing card jam exists continuously in FIG. B and FIG. C, the card jam duration of the processing card jam in FIG. B is 2.7 ms, and the card jam duration of the processing card jam in FIG. C is 5.4 ms. And, FIG. 16 shows a 7T-LTPO screen, in the 7T-LTPO screen, the 60 Hz TE signal is actually the TE signal located in the rear of every two TE signals in the 120 Hz TE signal. That is to say, in the 7T-LTPO screen, the low level duration of the 60 Hz TE signal is lengthened, about twice of the low level of the 120 Hz TE signal.

[0365] Next, the sending and refreshing display processes of FIG. A-FIG. C are introduced in sequence according to the timing of FIG. 16.

[0366] At time t1, the rising edge of the TE signal comes.

[0367] On the one hand, the display driver can perform the sending of FIG. A, as shown by the sending mark A in the figure. Similarly, if FIG. A is the first frame image, the display driver can directly determine to perform the sending of FIG. A when the rising edge of the TE signal is detected; if FIG. A is not the first frame image, the display driver can also determine to perform the sending of FIG. A when the rising edge of the TE signal is detected through S812-S817.

[0368] On the other hand, the display driver can perform S803-S804 to control the timer to start timing from 0.

[0369] At time t2, the falling edge of the TE signal comes.

[0370] The DDIC refreshes FIG. A to the display panel, as shown by the refreshing mark A1 in the figure.

[0371] At time t3, the rising edge of the TE signal comes.

[0372] The display driver can perform S803-S804 to control the timer to start timing from 0.

[0373] At time t4, the falling edge of the TE signal comes.

[0374] Since the processing of FIG. B has not been completed at this time, the display driver has not performed the sending of FIG. B, and the DDIC can refresh FIG. A to the display panel again, as shown by the refreshing mark A2 in the figure. Correspondingly, the display panel displays FIG. A for two consecutive frames, and display card jam occurs.

[0375] At time t5, the processing of FIG. B is completed, such as performing S806-S811 for image B.

[0376] The display driver can perform S812 to detect that there is processing card jam.

[0377] Then, the display driver can perform S813 to detect that the condition of triggering sending the picture at the specific time is met.

[0378] Then, the display driver can perform S814 to detect the target signal Z1 at the position of the timing time 2.7 ms of the timer, i.e., at the time t5, triggering the display driver to perform the sending of the picture B, as shown by the sending picture mark B in the figure.

[0379] At the time t6, the rising edge of the TE signal arrives.

[0380] The display driver can perform S803-S804 to control the timer to start timing from 0.

[0381] At the time t7, the falling edge of the TE signal arrives.

[0382] The DDIC can refresh the picture B to the display panel, as shown by the refreshing picture mark B in the figure.

[0383] At the time t8, the processing of the picture C is completed, as S806-S811 for the picture C are performed.

[0384] The display driver can perform S812 to detect that there is processing lag.

[0385] Then, the display driver can perform S813 to detect that the condition of triggering sending the picture at the specific time is met.

[0386] Then, the display driver can perform S814 to detect the target signal Z2 at the position of the timing time 8.3 ms of the timer, i.e., at the time t8, triggering the display driver to perform the sending of the picture C, as shown by the sending picture mark C in the figure.

[0387] At the time t9, the rising edge of the TE signal arrives.

[0388] The display driver can perform S803-S804 to control the timer to start timing from 0.

[0389] At the time t10, the falling edge of the TE signal arrives.

[0390] The DDIC can refresh the picture C to the display panel, as shown by the refreshing picture mark C in the figure. It can be seen that although there is processing lag in the processing process of the picture C, the picture C is not continuously displayed for multiple frames on the display panel, and there is no display lag.

[0391] In the above example four, there is processing lag in the processing process of the picture B and the picture C, and in the embodiment of FIG. 8, only two frames of the picture A are continuously displayed on the display panel, i.e., there is only one frame of display lag.

[0392] It should be understood that in the above examples one to four, the time when each image (such as Figure B, Figure C, etc.) processing is completed coincides with the rising edge of the TE signal or the timing time of the timer, but in actual implementation, the time may not coincide. In the case of not coinciding, the display driver can send the image at the rising edge of the next TE signal or the next timing time of the timer.

[0393] As can be seen from the above examples, by initializing the timer after detecting the TE signal each time, the timing time of the timer can accurately indicate a specific time. Subsequently, the display driver can realize sending the image at the specific time based on the timing time of the timer, thereby increasing the timing of sending the image and reducing display stuttering.

[0394] A large number of tests show that if the processing stuttering is within 2.7 ms each time, 2 / 3 of the display stuttering can be reduced in theory under a 120 Hz scene, 3 / 4 of the display stuttering can be reduced in theory under a 90 Hz scene, and 5 / 6 of the display stuttering can be reduced in theory under a 60 Hz scene.

[0395] In addition, in the case of continuous processing stuttering, the display screen will not continuously refresh repeated image frames, and power consumption can be saved. For example, in the above example one, there is stuttering in Figure B-Figure D, and only two frames of Figure A or Figure B will be repeatedly refreshed in the display screen, and Figure B, Figure C, and Figure D will not be repeatedly refreshed, thereby saving power consumption.

[0396] That is, for some to-be-displayed images, after obtaining the image data, the sending of the image can be performed when the timing time of the timer arrives, instead of necessarily waiting for the TE signal to arrive before sending the image, thereby improving the timeliness of sending the image.

[0397] Further, in the case of processing stuttering and meeting the condition of sending the image at a specific time, the sending of the image is performed when the timing time of the timer arrives. Thus, the image can be sent in time at the specific time. Or, in the case of no processing stuttering and the previous sending of the image at the timing time of the timer, the sending of the image is performed when the timing time of the timer arrives. Thus, the time interval of sending the image can be controlled.

[0398] Conversely, in the case of processing stuttering and not meeting the condition of sending the image at a specific time, the sending of the image is still performed when the TE signal arrives. Thus, in the case of being unable to send the image in time at the specific time, the sending of the image is still performed when the TE signal arrives.

[0399] Or, in the case of no processing stuttering and the previous sending of the image at the arrival of the TE signal, the sending of the image is still performed when the TE signal arrives. Thus, the time interval of sending the image can be controlled.

[0400] Further, the display driver can perform the sending of the picture in the case that the target signal is detected. The target signal is generated when the timing time of the timer arrives. For example, the arrival of the timing time of the timer triggers the generation of the target signal. In this way, the display driver can accurately trigger the sending of the picture at a specific time through the target signal.

[0401] Further, the display driver can generate the target signal at each specific time. Meanwhile, in the case that the sending of the picture at a specific time is needed, the display driver turns on the sending of the picture at a specific time switch (equivalent to turning on the detection of the target signal). In this way, it can be ensured that the target signal is detected in the scenario that the sending of the picture at a specific time is needed, so as to trigger the sending of the picture.

[0402] In addition, after the target signal is detected and the sending of the picture is triggered, the display driver can also turn on the sending of the picture through the TE signal (also equivalent to turning off the detection of the target signal), so as to avoid that the target signal is also detected and the sending of the picture is triggered in the scenario that the sending of the picture at a specific time is not needed. Moreover, it can also be ensured that the display driver detects the TE signal and initializes the timer each time.

[0403] Finally, it needs to be explained that, from the embodiment of FIG. 7B, the electronic device detects the target signal and triggers the sending of the picture only in the case that the condition that the picture is sent before the TE signal arrives is met. However, in actual implementation, it is not limited thereto. For example, the electronic device can continuously detect the target signal and the TE signal, and the sending of the picture is triggered by the target signal or the TE signal detected next after each time the image data is obtained. In this way, even if whether the condition that the picture is sent before the TE signal arrives is met is not detected, timely sending of the picture can also be achieved.

[0404] Taking the frequency of the TE signal as 120 Hz and the frequency of the timing time of the timer as 360 Hz, the electronic device can switch to detecting the target signal after detecting the rising edge of the TE signal each time, and then switch to detecting the TE signal again after detecting two target signals. In this way, the target signal and the TE signal detected by the electronic device are as shown in FIG. 17. The electronic device obtains picture A between time t1 and time t2, and then can detect the rising edge of the TE signal at time t2, so as to perform the sending of picture A at time t2. Next, the electronic device obtains picture B between time t3 and time t4, and then detects the target signal at time t4, so as to perform the sending of picture B at time t4. It is not necessary to wait for the arrival of the rising edge of the next TE signal before the sending of the picture, so as to improve the timeliness of the sending of the picture. Next, the electronic device obtains picture C between time t5 and time t6, and then detects the target signal at time t6, so as to perform the sending of picture C at time t6. It is not necessary to wait for the arrival of the rising edge of the next TE signal before the sending of the picture, so as to improve the timeliness of the sending of the picture.

[0405] The electronic device can include a memory and one or more processors (such as a CPU, a GPU, an NPU, and the like). The memory and the processor are coupled. The memory is configured to store computer program codes, the computer program codes including computer instructions. When the processor executes the computer instructions, the electronic device can perform various functions or steps of the device in the above method embodiments.

[0406] The electronic device can include a memory and one or more processors (such as a CPU, a GPU, an NPU, and the like). The memory and the processor are coupled. The memory is configured to store computer program codes, the computer program codes including computer instructions. When the processor executes the computer instructions, the electronic device can perform various functions or steps of the device in the above method embodiments.

[0407] The electronic device can include a memory and one or more processors (such as a CPU, a GPU, an NPU, and the like). The memory and the processor are coupled. The memory is configured to store computer program codes, the computer program codes including computer instructions. When the processor executes the computer instructions, the electronic device can perform various functions or steps of the device in the above method embodiments.

[0408] The electronic device can include a memory and one or more processors (such as a CPU, a GPU, an NPU, and the like). The memory and the processor are coupled. The memory is configured to store computer program codes, the computer program codes including computer instructions. When the processor executes the computer instructions, the electronic device can perform various functions or steps of the device in the above method embodiments.

[0409] The electronic device can include a memory and one or more processors (such as a CPU, a GPU, an NPU, and the like). The memory and the processor are coupled. The memory is configured to store computer program codes, the computer program codes including computer instructions. When the processor executes the computer instructions, the electronic device can perform various functions or steps of the device in the above method embodiments.

[0410] In addition, the embodiment of the present application further provides an apparatus, which can be a chip, a component or a module, and the apparatus can include a processor and a memory connected to each other; the memory is used to store computer-executed instructions; when the apparatus is running, the processor can execute the computer-executed instructions stored in the memory, so that the chip executes the image processing method in each method embodiment described above.

[0411] The electronic device, the computer storage medium, the computer program product or the chip provided in the embodiment are used to execute the corresponding method provided above, and thus the beneficial effects achieved by the electronic device, the computer storage medium, the computer program product or the chip can refer to the beneficial effects of the corresponding method provided above, which will not be repeated here.

[0412] Through the description of the above embodiments, those skilled in the art can clearly understand that, for the convenience and brevity, only the division of the above functional modules is taken as an example, and in actual application, the above functions can be completed by different functional modules according to needs, that is, the internal structure of the apparatus is divided into different functional modules to complete all or part of the functions described above.

[0413] In several embodiments provided in the present application, it should be understood that the disclosed apparatus and method can be implemented by other ways. For example, the apparatus embodiment described above is only schematic, for example, the division of the module or unit is only a logical function division, and in actual implementation, another division mode can be adopted, for example, a plurality of units or components can be combined or integrated into another apparatus, or some features can be ignored or not executed. In addition, the coupling or direct coupling or communication connection between the units shown or discussed can be indirect coupling or communication connection through some interfaces, apparatuses or units, and can be electrical, mechanical or other forms.

[0414] The unit described as a separate component can or can not be physically separated, and the component shown as a unit can be one physical unit or a plurality of physical units, that is, can be located in one place or can be distributed to a plurality of different places. According to actual needs, part or all of the units can be selected to achieve the purpose of the embodiment scheme.

[0415] In addition, each functional unit in each embodiment of the present application can be integrated in one processing unit, or each unit can exist physically independently, or two or more units can be integrated in one unit. The integrated unit can be realized in the form of hardware or in the form of software functional unit.

[0416] The integrated unit, if implemented in the form of a software function unit and sold or used as an independent product, can be stored in a readable storage medium. Based on such understanding, the technical solutions of the embodiments of the present application essentially or in other words the parts that make contributions to the prior art or the whole or part of the technical solutions can be embodied in the form of a software product. The software product is stored in a storage medium, and includes a plurality of instructions for causing an apparatus (which can be a single-chip microcomputer, a chip, etc.) or a processor to execute all or part of the steps of the method of each embodiment of the present application. The aforementioned storage medium includes: a U disk, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk or an optical disk, and various media that can store program codes.

[0417] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present application and not to limit them. Although the present application has been described in detail with reference to the preferred embodiments, those skilled in the art should understand that the technical solutions of the present application can be modified or replaced equivalently without departing from the spirit and scope of the technical solutions of the present application.

Claims

1. An image transfer method, characterized by, The method is applied to an electronic device including a SoC and a display screen, the electronic device generates a hardware TE signal in a first period, and the method comprises: At a first time, the electronic device generates a first hardware TE signal; At a second time, the electronic device generates a first software TE signal, and the SoC sends first image data to the display screen in response to the first software TE signal, wherein the second time is after the first time; At a third time, the electronic device generates a second hardware TE signal, wherein the third time is after the second time, and the second hardware TE signal is a next hardware TE signal of the first hardware TE signal.

2. The method of claim 1, wherein, The first period comprises any one of a period corresponding to 120 Hz, a period corresponding to 90 Hz, and a period corresponding to 60 Hz.

3. The method of claim 2, wherein: The first period is a period corresponding to 120 Hz, and the second time comprises any one of a time at a one-third position between the first time and the third time, and a time at a two-thirds position between the first time and the third time; The first period is a period corresponding to 90 Hz, and the second time comprises any one of a time at a one-fourth position between the first time and the third time, a time at a two-fourth position between the first time and the third time, and a time at a three-fourth position between the first time and the third time; The first period is a period corresponding to 60 Hz, and the second time comprises any one of a time at a one-sixth position between the first time and the third time, a time at a two-sixth position between the first time and the third time, a time at a three-sixth position between the first time and the third time, a time at a four-sixth position between the first time and the third time, and a time at a five-sixth position between the first time and the third time.

4. The method according to any one of claims 1-3, characterized in that, At the first time, the SoC does not send image data to the display screen.

5. The method according to any one of claims 1-4, characterized in that, At the third time, the SoC does not send image data to the display screen.

6. The method according to any one of claims 1-5, characterized in that, The SoC sending the first image data to the display screen in response to the first software TE signal comprises: The SoC sends the first image data to the display screen in response to the first software TE signal when a first image sending condition is met.

7. The method of claim 6, wherein, Before the electronic device generates the first hardware TE signal at the first time, the method further comprises: At a fourth time, the SoC sends second image data to the display screen, the second image data being a previous frame of image data of the first image data; The first image sending condition comprises any one of: An interval between the fourth time and a fifth time exceeds a preset frame length, and the fifth time to a time before the third time at which a software TE signal is generated, the fifth time being a time at which the SoC is ready to send the first image data to the display screen; or The first image sending condition comprises any one of: The interval between the fourth time and the fifth time does not exceed a preset frame length, and the second software is responded to at the fourth time The TE signal sends the second image data to the display screen.

8. The method of claim 6, wherein, The first image sending condition includes: After the SoC prepares to send the first image data to the display screen, the duration of waiting for the hardware TE signal exceeds a duration threshold.

9. The method according to any one of claims 1-8, characterized in that, After the electronic device generates the first hardware TE signal at the first time, the method further includes: In response to the first hardware TE signal, the electronic device controls a timer to start timing; The second time is a time corresponding to a timing time of the timer.

10. The method of claim 9, wherein, Before the SoC sends the first image data to the display screen in response to the first software TE signal, the method further includes: In a case where the first image sending condition is met, the electronic device starts detection of the software TE signal; In a case where the detection of the software TE signal is started, the electronic device detects the first software TE signal; The response of the SoC to the first software TE signal and the sending of the first image data to the display screen include: In response to the detection of the first software TE signal, the SoC sends the first image data to the display screen.

11. The method of claim 10, wherein, After the SoC sends the first image data to the display screen in response to the detection of the first software TE signal, the method further includes: The detection of the software TE signal is stopped; In a case where the detection of the software TE signal is stopped, the hardware TE signal is detected.

12. The method according to any one of claims 1-11, characterized in that, The response of the SoC to the first software TE signal and the sending of the first image data to the display screen include: In a case where the first identifier is queried, the SoC sends the first image data to the display screen in response to the first software TE signal; The first identifier indicates a target image sending scheme, and the target image sending scheme includes image display when the hardware TE signal is detected and image display when the software TE signal is detected.

13. The method of claim 12, wherein, In a case where the first identifier is not queried, the electronic device does not generate the software TE signal.

14. An electronic device, comprising: The chip system is applied to an electronic device, and the chip system includes one or more processors. The computer program product, when running on a computer, causes the computer to perform the method in any one of claims 1-13.

15. A chip system, characterized by The computer program product, when running on a computer, causes the computer to perform the method in any one of claims 1-13.

16. A computer readable storage medium having stored thereon computer instructions, wherein, ​ 17. A computer program product comprising computer instructions, characterized in that, ​

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