Capacitor, electronic component, and electronic device

Abstract

Embodiments of the present application provide a capacitor, an electronic component, and an electronic device. The capacitor comprises a first conductor, a second conductor, a first capacitor unit, a second capacitor unit, and an encapsulation housing. A part of the first conductor and a part of the second conductor are located in the encapsulation housing, and the other part of the first conductor and the other part of the second conductor are exposed from the encapsulation housing. The first capacitor unit is located in the encapsulation housing or a part thereof is used as the first capacitor unit, and the second capacitor unit is located in the encapsulation housing. The first capacitor unit comprises a first outer electrode, a second outer electrode, and a first dielectric layer, and the second capacitor unit comprises a third outer electrode, a fourth outer electrode, and a second dielectric layer. The first outer electrode and the third outer electrode are connected to the first conductor, and the second outer electrode and the fourth outer electrode are connected to the second conductor. The capacitance of the first capacitor unit is different from that of the second capacitor unit, and the material of the first dielectric layer is different from that of the second dielectric layer. The present solution can reduce the occupation of circuit board area by the capacitor and shorten a filtering loop.

Description

Capacitor, electronic component and electronic device

[0001] The present application claims priority to the Chinese patent application No. 202411397458.5, filed on September 30, 2024, with the State Intellectual Property Office of China, and the Chinese patent application No. 202411397458.5 has the title of “Capacitor, electronic component and electronic device”, the whole content of which is incorporated herein by reference. TECHNICAL FIELD

[0002] The present application relates to the technical field of electronics, and in particular, to a capacitor, an electronic component and an electronic device. BACKGROUND

[0003] The power consumption of a chip used for data communication, calculation and the like is already very high, and the voltage and current fluctuate greatly when the load changes, which requires very high filtering and energy storage performance of the power supply system.

[0004] The conventional scheme will arrange several large-capacity capacitors (for example, tens or even hundreds of microfarad) around the chip for energy storage, and then arrange multiple small-capacity (for example, several microfarad or tens of microfarad) ceramic capacitors to filter high-frequency components. These capacitors are laid side by side around the chip, which occupies a large amount of circuit board area. Moreover, such design leads to a large overall distance between the capacitors and the chip, a long filtering loop, and limited filtering effect. SUMMARY

[0005] The embodiments of the present application provide a capacitor, an electronic component and an electronic device, which can reduce the occupation of the circuit board area and facilitate shortening of the filtering loop.

[0006] In a first aspect, the embodiments of the present application provide a capacitor, comprising a first conductor, a second conductor, a first capacitor unit, a second capacitor unit and a packaging shell; a part of the first conductor and a part of the second conductor are located in the packaging shell, and another part of the first conductor and another part of the second conductor are exposed outside the packaging shell; the first capacitor unit and the second capacitor unit are located in the packaging shell; or a part of the packaging shell serves as the first capacitor unit, and the second capacitor unit is located in the packaging shell; the first capacitor unit comprises a first external electrode, a second external electrode and a first dielectric layer, and the second capacitor unit comprises a third external electrode, a fourth external electrode and a second dielectric layer; the first external electrode and the third external electrode are connected with the first conductor, and the second external electrode and the fourth external electrode are connected with the second conductor; the capacities of the first capacitor unit and the second capacitor unit are different, and the materials of the first dielectric layer and the second dielectric layer are different.

[0007] In the embodiment of the present application, the dielectric materials of the first capacitor unit and the second capacitor unit are different, so the first capacitor unit and the second capacitor unit are capacitor units of different types. By connecting the first conductor with the first outer electrode of the first capacitor unit and the third outer electrode of the second capacitor unit, and connecting the second conductor with the second outer electrode of the first capacitor unit and the fourth outer electrode of the second capacitor unit, the electrical connection of capacitor units of different types can be realized, so that the capacitor can work normally. Moreover, by packaging the first conductor, the second conductor, the first capacitor unit and the second capacitor unit in the same packaging shell, capacitor units of different types and different capacities can be integrally packaged to obtain an integrated single capacitor.

[0008] In the embodiment of the present application, the types and capacities of the first capacitor unit and the second capacitor unit are different, one of the first capacitor unit and the second capacitor unit can be used for filtering, and the other can be used for energy storage, which makes the capacitor have the functions of filtering and energy storage. Since the types and capacities of the first capacitor unit and the second capacitor unit are different, the capacitor has a wider filtering frequency and a larger capacity.

[0009] In the embodiment of the present application, by integrally packaging capacitor units of different types and different capacities, the volume of the capacitor can be significantly reduced, and the area occupied by the capacitor on the circuit board can be reduced, so that the capacitor does not affect the deployment of other devices on the circuit board, which is conducive to realizing high-density layout of the circuit board. Since the volume of the capacitor is reduced, the capacitor can be arranged close to functional devices (such as chips), which is conducive to shortening the filtering loop and improving the filtering performance. It is also conducive to realizing a surface mount capacitor and shortening the exposed pins of the capacitor, thereby facilitating the reduction of the equivalent series inductance of the capacitor. Moreover, integrally packaging can better block the invasion of external moisture and the like, and enhance the reliability and life of the capacitor.

[0010] In the embodiment of the present application, by using a part of the packaging shell as the first capacitor unit, it is not necessary to additionally increase capacitor units in the packaging shell to meet the needs, so the volume of the capacitor can be compressed, and the space occupied by the capacitor on the circuit board can be reduced, which is conducive to arranging the capacitor close to functional devices (such as chips) to shorten the filtering loop and improve the filtering performance.

[0011] In an implementation form of the first aspect, the first capacitor unit and the second capacitor unit are located between the first conductor and the second conductor, the first capacitor unit and the second capacitor unit are arranged along a first direction, and the first conductor and the second conductor are arranged along a second direction, the first direction and the second direction intersecting.

[0012] In the present implementation, the first direction intersects the second direction, for example, the two directions can be perpendicular or approximately perpendicular. This allows the first conductor to simultaneously connect the first outer electrode and the third outer electrode, and the second conductor to simultaneously connect the second outer electrode and the fourth outer electrode. This is conducive to shortening the lengths of the first conductor and the second conductor, simplifying the structures of the first conductor and the second conductor, thereby optimizing the internal structure of the capacitor and also conducive to ensuring the processability of the capacitor.

[0013] In an implementation form of the first aspect, the capacitor comprises a plurality of first capacitor units, and a second capacitor unit is arranged between any two first capacitor units.

[0014] In the present implementation, by entering the plurality of first capacitor units, the different types of capacitor units are alternately arranged, which can further increase the capacity of the capacitor, expand the filter frequency domain of the capacitor, and improve the performance of the capacitor.

[0015] In an implementation form of the first aspect, the packaging shell comprises a frame and a cover, the frame comprises a bottom, two opposite first sides and two opposite second sides, the two opposite first sides and the two opposite second sides are respectively protruded from the periphery of the bottom and connected between the bottom and the cover; the cover, the two opposite first sides and the bottom serve as the first capacitor units; the first conductor and the second conductor are respectively located at positions of the two opposite second sides.

[0016] In the present implementation, by using more parts of the packaging shell as the first capacitor units, the capacity of the capacitor can be further increased, the frequency domain of the capacitor can be expanded, and the performance of the capacitor can be improved. By designing the relative positions of the first conductor, the second conductor, the cover, the two opposite first sides and the bottom, the first conductor can simultaneously connect the outer electrodes of the second capacitor units and all the first capacitor units, and the second conductor can simultaneously connect the outer electrodes of the second capacitor units and all the first capacitor units. In this way, the lengths of the first conductor and the second conductor can be shortened, the structures of the first conductor and the second conductor can be simplified, thereby optimizing the internal structure of the capacitor and also conducive to ensuring the processability of the capacitor.

[0017] In an implementation form of the first aspect, the first capacitor units and the second capacitor units are located in the packaging shell, and the packaging shell is integrated with the first conductor, the second conductor, the first capacitor units and the second capacitor units.

[0018] The integrated packaging structure of the present implementation can be manufactured by a process similar to chip packaging, for example, a plastic packaging process. This allows the capacitor 23 to have good sealing performance, reliability and service life.

[0019] In an implementation form of the first aspect, the first capacitor unit comprises a plurality of first inner electrodes and a plurality of second inner electrodes, the plurality of first inner electrodes and the plurality of second inner electrodes are arranged in an alternating and laminated manner, and a first dielectric layer is arranged between any adjacent first inner electrode and second inner electrode; the plurality of first inner electrodes are connected to the first outer electrode, and the plurality of second inner electrodes are connected to the second outer electrode; and / or, the second capacitor unit comprises a plurality of third inner electrodes and a plurality of fourth inner electrodes, the plurality of third inner electrodes and the plurality of fourth inner electrodes are arranged in an alternating and laminated manner, and a second dielectric layer is arranged between any adjacent third inner electrode and fourth inner electrode; the plurality of third inner electrodes are connected to the third outer electrode, and the plurality of fourth inner electrodes are connected to the fourth outer electrode.

[0020] In the implementation form, by arranging the capacitor unit to comprise a plurality of inner electrodes, the capacitor unit can be made into a multi-layer chip capacitor, so that the capacity of the capacitor unit can be significantly increased, and the capacity of the entire capacitor can be increased, thereby meeting the needs of products.

[0021] In an implementation form of the first aspect, the capacitor further comprises an isolation layer between the first capacitor unit and the second capacitor unit, the isolation layer has an insulating property.

[0022] In the implementation form, by arranging the isolation layer between the different types of capacitor units, short circuit between the different types of capacitor units can be avoided, and the reliability of the capacitor can be ensured. The isolation layer can be a solid material or air.

[0023] In an implementation form of the first aspect, the isolation layer is configured to elastically deform.

[0024] In the implementation form, the isolation layer is a solid material. When the first capacitor unit and the second capacitor unit are expanded by heat, the isolation layer can be elastically deformed by pressure. By the elastic deformation of the isolation layer, direct extrusion of the first capacitor unit and the second capacitor unit due to different thermal expansion coefficients can be avoided, and excessive stress between the first capacitor unit and the second capacitor unit can be reduced, thereby playing a role of buffering and compensating the difference in thermal expansion coefficients of the first capacitor unit and the second capacitor unit, and the reliability of the capacitor can be improved.

[0025] In an implementation form of the first aspect, the deformation ratio of the isolation layer is less than or equal to 2%.

[0026] In the present implementation, the elastic deformation of the isolation layer is microscopic, and the deformation amount is small. The deformation ratio of the isolation layer can be used to represent the elastic deformation performance. The deformation ratio can be (size before deformation-size after deformation) / size before deformation, where the size can be a size in a certain direction, or a comprehensive size considering different weights of sizes in multiple directions. By setting the deformation ratio of the isolation layer in the range, the deformation amount of the isolation layer is moderate, which can buffer the difference in thermal expansion coefficient, and can also avoid poor process performance of the capacitor due to too soft isolation layer. For example, the deformation ratio can be 0.9% to 1.2%.

[0027] In an implementation form of the first aspect, the material of the first dielectric layer is ceramic, aluminum oxide, conductive polymer material or tantalum oxide, and the material of the second dielectric layer is ceramic, aluminum oxide, conductive polymer material or tantalum oxide.

[0028] In the present implementation, by setting the materials of the dielectric layers of different capacitor units, the capacitor units and the entire capacitor can be manufactured using existing materials and processes, meeting the manufacturability requirements.

[0029] In an implementation form of the first aspect, the part of the first conductor exposed outside the package shell and the part of the second conductor exposed outside the package shell are located on the same side of the package shell.

[0030] In the present implementation, based on the integrated packaging structure, by setting the parts of the two conductors exposed outside on the same side of the package shell, the capacitor can be a surface mount capacitor, which is convenient to use reflow soldering process to be soldered to the circuit board. The surface mount capacitor has a small volume, which can save the layout area of the circuit board, and can also achieve the purpose of being close to the functional device arrangement, which is beneficial to shorten the filter loop and improve the filtering performance.

[0031] In a second aspect, the embodiments of the present application provide an electronic assembly, which includes a circuit board, a functional device and the capacitor, and the functional device and the capacitor are arranged on the circuit board.

[0032] In the embodiments of the present application, since the capacitor adopts an integrated packaging structure, the capacitor not only has a wide filtering frequency and a large capacity, but also has the functions of filtering and energy storage, and the volume of the capacitor can be significantly reduced, thereby reducing the area occupation of the capacitor on the circuit board, so that the capacitor does not affect the deployment of other devices on the circuit board, which is beneficial to realize high-density layout of the circuit board. The capacitor can also be arranged close to the functional device (such as a chip), which is beneficial to shorten the filter loop and improve the filtering performance.

[0033] In a third aspect, the embodiments of the present application provide an electronic device, which includes a shell and the electronic assembly, and the electronic assembly is located in the shell.

[0034] In this embodiment, the circuit board can achieve a high-density layout, the filter circuit is short, and the filtering performance is good, which is conducive to realizing the integration, miniaturization, and high performance of electronic devices. Attached Figure Description

[0035] Figure 1 is a three-dimensional structural diagram of an electronic device according to an embodiment of this application;

[0036] Figure 2 is a schematic diagram of the planar structure of the electronic component according to an embodiment of this application;

[0037] Figure 3 is a cross-sectional view of a capacitor according to an embodiment of this application;

[0038] Figure 4 is a cross-sectional view of a capacitor according to an embodiment of this application;

[0039] Figure 5 is a cross-sectional view of a capacitor according to an embodiment of this application;

[0040] Figure 6 is a three-dimensional structural schematic diagram of a capacitor according to an embodiment of this application;

[0041] Figure 7 is a schematic diagram of the exploded structure of the capacitor shown in Figure 6;

[0042] Figure 8 is a schematic diagram showing a portion of the capacitor's encapsulation shell in Figure 7. Detailed Implementation

[0043] This application provides an electronic device, which includes, but is not limited to, servers, network devices (such as switches, routers, etc.), communication devices (such as base stations, data centers, etc.), electric vehicle charging facilities, intelligent driving systems (such as mobile data centers, and various sensors such as lidar, millimeter-wave radar, cameras, and ultrasonic radar), mobile phones (candybar phones or foldable phones), tablet computers, laptops, in-vehicle devices, wearable devices, augmented reality (AR) glasses, AR helmets, virtual reality (VR) glasses, VR helmets, etc.

[0044] Figure 1 illustrates an electronic device 1 according to an embodiment. The electronic device 1 may include a housing 10 and electronic components (not shown in Figure 1) located within the housing 10. The electronic components include a circuit board and various devices disposed on the circuit board. These electronic components are used to implement various functions of the electronic device 1. Wherein:

[0045] The number of the circuit boards is not limited, and can be one or more. The function type of the circuit boards is not limited. For example, the circuit board can be a substrate specially configured for one or more devices, which can be used to package and protect the core devices thereon, provide circuit connection and signal transmission functions, and also serve as heat dissipation and electrical performance optimization. For example, the substrate and the devices thereon can be a board card. The circuit board can also be a mainboard, which serves as the core of the hardware system of the electronic device 1, such as connecting and supporting various core devices, power management and distribution, providing expansion slots and interfaces, and also performing system management and monitoring.

[0046] The number and type of the devices are not limited. The devices can include but are not limited to chips (such as main chips, such as central processing units CPU, neural network processors NPU, graphics processing units GPU, etc.), capacitors, inductors, resistors, diodes, transistors, connectors, sensors, various switches, oscillators, etc. For the sake of distinction, the devices other than capacitors can be collectively referred to as functional devices.

[0047] FIG. 2 shows a top view of the electronic assembly 20 in an embodiment. As shown in FIG. 2, the electronic assembly 20 can include a circuit board 21 and functional devices 22 and capacitors 23 arranged on the circuit board 21. The functional devices 22 can be chips, for example, which can have a large power consumption, such as 1000W level, and a core voltage of 1V, for example. When the load changes, the voltage and current of the functional devices 22 can fluctuate greatly. The capacitors 23 can be arranged near the functional devices 22. The number of the capacitors 23 is not limited, and can be multiple, which can be distributed around the functional devices 22. The capacitors 23 can be used for energy storage and filtering to meet the energy storage and filtering performance requirements of the electronic device 1.

[0048] It can be understood that the above description and FIG. 2 are only examples, and in fact, the functional devices 22 are not limited to chips, and the number and specific positions of the capacitors 23 are not limited to those shown in FIG. 2.

[0049] The capacitors 23 of the embodiments of the present application adopt a “heterogeneous integrated packaging structure”, which integrates multiple different types of capacitor units together and packages them into a single capacitor. This will be described below.

[0050] Figure 3 illustrates a sectional structure of the capacitor 23 in an embodiment. As shown in Figure 3, the capacitor 23 can include a package shell 231, a first conductor 232, a second conductor 233, a first capacitor unit 236, an isolation layer 235, and a second capacitor unit 234. The first conductor 232 has a portion inside the package shell 231 and another portion outside the package shell 231. The second conductor 233 has a portion inside the package shell 231 and another portion outside the package shell 231. The first capacitor unit 236 and the second capacitor unit 234 are both inside the package shell 231.

[0051] In this embodiment, the structure of the package shell 231 can be determined as needed. For example, as shown in Figure 3, the package shell 231 can have a substantially cuboid shape. For example, the package shell 231 can include a cover 231a and a frame 231b, which can be connected together by assembly. The frame 231b can be, for example, a frame structure with one end open, and the cover 231a can cover the opening and form a receiving cavity with the frame 231b. The split package shell 231 facilitates the assembly of the first conductor 232, the second conductor 233, the first capacitor unit 236, the isolation layer 235, and the second capacitor unit 234 into the package shell 231. The material of the package shell 231 can have good insulation performance, mechanical strength, thermal stability, corrosion resistance, and the like.

[0052] In this embodiment, the material of the package shell 231 includes, but is not limited to, ceramic, polymer, and the like. The ceramic material has good processability and long service life. The polymer includes, but is not limited to, epoxy plastic packaging material, polyethylene, polypropylene, and the like.

[0053] As shown in Figure 3, the first capacitor unit 236 and the second capacitor unit 234 can be arranged along a first direction, which can be, for example, a vertical direction. In this embodiment, the first direction can also be a direction perpendicular to the circuit board 21.

[0054] As shown in Figure 3, in this embodiment, the first capacitor unit 236 can be a multilayer chip capacitor. The first capacitor unit 236 can include a plurality of first inner electrodes 236a and a plurality of second inner electrodes 236c. The first inner electrodes 236a and the second inner electrodes 236c can be alternately and stacked, i.e., arranged in the form of first inner electrode 236a-second inner electrode 236c-first inner electrode 236a-second inner electrode 236c-… The first inner electrodes 236a and the second inner electrodes 236c can be stacked along the first direction. The first inner electrodes 236a and the second inner electrodes 236c can extend along the same direction, which can be referred to as the extension direction. For example, the extension direction can be the horizontal direction in Figure 3.

[0055] As shown in FIG. 3, a first dielectric layer 236b is arranged between any adjacent first inner electrode 236a and second inner electrode 236c, and separates and insulates the first inner electrode 236a and the second inner electrode 236c. It can be understood that the relative position relationship between the first inner electrode 236a, the second inner electrode 236c and the first dielectric layer 236b of the first capacitor unit 236 in FIG. 3 is merely illustrative, and is not a limitation on the actual structure.

[0056] As shown in FIG. 3, the first capacitor unit 236 can further include a first outer electrode 236e and a second outer electrode 236d. The first outer electrode 236e can be connected with each first inner electrode 236a, and the first inner electrodes 236a connected to the first outer electrode 236e are in parallel. The second outer electrode 236d can be connected with each second inner electrode 236c, and the second inner electrodes 236c connected to the second outer electrode 236d are in parallel. The first outer electrode 236e and the second outer electrode 236d can also be referred to as pins of the first capacitor unit 236.

[0057] In another embodiment, the first inner electrode 236a and the second inner electrode 236c in the first capacitor unit 236 can each be a layer, and the first inner electrode 236a, the first dielectric layer 236b and the second inner electrode 236c can be stacked in sequence.

[0058] In this embodiment, the first capacitor unit 236 can be an aluminum capacitor or a tantalum capacitor, etc. In the aluminum capacitor, the materials of the first inner electrode 236a and the second inner electrode 236c can be aluminum foil, and the material of the first dielectric layer 236b can be aluminum oxide (Al2O3) or conductive polymer; in the tantalum capacitor, the materials of the first inner electrode 236a and the second inner electrode 236c can be tantalum metal, and the material of the first dielectric layer 236b can be tantalum oxide (Ta2O5).

[0059] In another embodiment, the first capacitor unit 236 is not limited to an aluminum capacitor or a tantalum capacitor, but can also be any other type of capacitor, such as a ceramic capacitor. In the ceramic capacitor, the materials of the first inner electrode 236a and the second inner electrode 236c can be nickel or copper, etc., and the material of the first dielectric layer 236b can be ceramic, etc.

[0060] As shown in FIG. 3, in the embodiment, the second capacitor unit 234 can be a multilayer chip capacitor. The second capacitor unit 234 can include a plurality of third inner electrodes 234a and a plurality of fourth inner electrodes 234c, which can be arranged in an alternating stack, i.e., in the form of third inner electrode 234a-fourth inner electrode 234c-third inner electrode 234a-fourth inner electrode 234c-… The stacking direction of the third inner electrodes 234a and the fourth inner electrodes 234c can be the first direction. The third inner electrodes 234a and the fourth inner electrodes 234c can extend along the extension direction described above.

[0061] As shown in FIG. 3, a second dielectric layer 234b is provided between any adjacent third inner electrode 234a and fourth inner electrode 234c, and the second dielectric layer 234b separates and insulates (for short, insulates) the third inner electrode 234a and the fourth inner electrode 234c. It can be understood that the relative positional relationship of the third inner electrode 234a, the fourth inner electrode 234c, and the second dielectric layer 234b of the second capacitor unit 234 in FIG. 3 is only a schematic and is not a limitation on the actual structure.

[0062] As shown in FIG. 3, the second capacitor unit 234 can further include a third outer electrode 234e and a fourth outer electrode 234d. The third outer electrode 234e can be connected to each third inner electrode 234a, and the third inner electrodes 234a connected to the third outer electrode 234e are in parallel. The fourth outer electrode 234d can be connected to each fourth inner electrode 234c, and the fourth inner electrodes 234c connected to the fourth outer electrode 234d are in parallel. The third outer electrode 234e and the fourth outer electrode 234d can also be referred to as the pins of the second capacitor unit 234.

[0063] In another embodiment, the third inner electrodes 234a and the fourth inner electrodes 234c in the second capacitor unit 234 can each be a layer, and the third inner electrodes 234a, the second dielectric layer 234b, and the fourth inner electrodes 234c can be sequentially stacked.

[0064] In the embodiment, the second capacitor unit 234 can be a ceramic capacitor, and the materials of the third inner electrodes 234a and the fourth inner electrodes 234c of the ceramic capacitor can be nickel or copper, etc., and the material of the second dielectric layer 234b can be ceramic.

[0065] In another embodiment, the second capacitor unit 234 is not limited to be a ceramic capacitor, but can be an aluminum capacitor or a tantalum capacitor, etc. In the aluminum capacitor, the third inner electrode 234a and the fourth inner electrode 234c can be made of aluminum foil, and the second dielectric layer 234b can be made of aluminum oxide (Al2O3) or conductive polymer. In the tantalum capacitor, the third inner electrode 234a and the fourth inner electrode 234c can be made of tantalum metal, and the second dielectric layer 234b can be made of tantalum oxide (Ta2O5).

[0066] In the embodiment, the first capacitor unit 236 and the second capacitor unit 234 have different materials of the dielectric layers. For example, if the material of the first dielectric layer 236b is aluminum oxide, conductive polymer or tantalum oxide, the material of the second dielectric layer 234b can be ceramic; if the material of the first dielectric layer 236b is ceramic or tantalum oxide, the material of the second dielectric layer 234b can be aluminum oxide or conductive polymer, and so on.

[0067] It can be understood that the inner electrodes in the first capacitor unit 236 can be made of materials matched with the first dielectric layer 236b, and the inner electrodes in the second capacitor unit 234 can be made of materials matched with the second dielectric layer 234b.

[0068] In the embodiment, the first capacitor unit 236 and the second capacitor unit 234 have different materials of the dielectric layers, which makes the first capacitor unit 236 and the second capacitor unit 234 be different types of capacitors.

[0069] As shown in FIG. 3, the first conductor 232 and the second conductor 233 can be respectively located at two ends of the first capacitor unit 236 and the second capacitor unit 234, and the first capacitor unit 236 and the second capacitor unit 234 are located between the first conductor 232 and the second conductor 233, so the first conductor 232 and the second conductor 233 can also be called end electrodes. For example, the first conductor 232 and the second conductor 233 can be arranged along a second direction, and the first capacitor unit 236 and the second capacitor unit 234 can be arranged along a first direction, the first direction and the second direction intersect, for example, the first direction and the second direction are perpendicular or approximately perpendicular. This design facilitates the connection of the stacked first capacitor unit 236 and the second capacitor unit 234 to the first conductor 232 and the second conductor 233, is beneficial to simplify the structure of the first conductor 232 and the second conductor 233, and has good processability. This will be described in detail below.

[0070] As shown in FIG. 3, the first conductor 232 can include a first portion 232a located in the accommodating cavity of the package shell 231 and a second portion 232b exposed outside the package shell 231. The first portion 232a can be manufactured together with the first capacitor unit 236 and the second capacitor unit 234 and installed in the package shell 231, the second portion 232b can be manufactured together with the package shell 231, the second portion 232b can be integrated in the package shell 231, the second portion 232b can extend from the package shell 231 to the package shell 231, or the second portion 232b can pass through the package shell 231 and be exposed outside the package shell 231. The first portion 232a and the second portion 232b can be connected by assembly (e.g., welding).

[0071] As shown in FIG. 3, the first portion 232a can be connected to the first external electrode 236e and the third external electrode 234e, and the first external electrode 236e and the third external electrode 234e connected to the first portion 232a are in parallel.

[0072] As shown in FIG. 3, the second conductor 233 can include a first portion 233a located in the accommodating cavity of the package shell 231 and a second portion 233b exposed outside the package shell 231. The first portion 233a can be manufactured together with the second capacitor unit 234 and the second capacitor unit 234 and installed in the package shell 231, the second portion 233b can be manufactured together with the package shell 231, the second portion 233b can be integrated in the package shell 231, the second portion 233b can extend from the package shell 231 to the package shell 231, or the second portion 233b can pass through the package shell 231 and be exposed outside the package shell 231. The first portion 233a and the second portion 233b can be connected by assembly (e.g., welding).

[0073] As shown in FIG. 3, the first portion 233a can be connected to each of the second external electrode 236d and the fourth external electrode 234d, and the second external electrode 236d and the fourth external electrode 234d connected to the first portion 233a are in parallel.

[0074] In this embodiment, by connecting the first conductor 232 to the first external electrode 236e of the first capacitor unit 236 and the third external electrode 234e of the second capacitor unit 234, and connecting the second conductor 233 to the second external electrode 236d of the first capacitor unit 236 and the fourth external electrode 234d of the second capacitor unit 234, the electrical connection of different types of capacitor units can be achieved, so that the capacitor 23 can work normally.

[0075] In the embodiment, one of the first conductor 232 and the second conductor 233 can be an anode, and the other can be a cathode. As shown in FIG. 3, the second part 232b of the first conductor 232 and the second part 233b of the second conductor 233 are two pins of the capacitor 23, respectively. Both of the two pins can be located on the same side (for example, the lower side in FIG. 3) of the package shell 231, and both of the two pins can be relatively short and substantially attached to the outer surface of the package shell 231 so as to be soldered to the circuit board below the capacitor 23. For example, the capacitor 23 can be a patch capacitor, which can be soldered to the circuit board by using a reflow soldering process. The patch capacitor has a small volume, which can save the layout area of the circuit board and can achieve the purpose of being close to the functional device arrangement, thereby facilitating the shortening of the filtering loop and improving the filtering performance.

[0076] In the embodiment, the first capacitor unit 236 and the second capacitor unit 234 have different capacitances. For example, the first capacitor unit 236 can be an aluminum capacitor or a tantalum capacitor, which has a relatively large capacitance; and the second capacitor unit 234 can be a ceramic capacitor, which has a relatively small capacitance. The capacitor with a relatively large capacitance can be used for energy storage, and the capacitor unit with a relatively small capacitance can be used for filtering.

[0077] As shown in FIG. 3, for example, the second capacitor unit 234 can be a ceramic capacitor, and the second capacitor unit 234 can be arranged at the bottom of the package shell 231, so that the connection positions of the conductors (including the first conductor 232 and the second conductor 233) and the ceramic capacitor are relatively small in size from the circuit board. The small size makes the equivalent series inductance of the ceramic capacitor small, and makes the performance of the ceramic capacitor good.

[0078] In the embodiment, to avoid short circuit between the first capacitor unit 236 and the second capacitor unit 234, an isolation layer 235 can be arranged between the first capacitor unit 236 and the second capacitor unit 234. The isolation layer 235 is an insulating medium, which isolates the first capacitor unit 236 from the second capacitor unit 234 to avoid short circuit of the internal electrodes of the two capacitor units. The isolation layer 235 can be connected (for example, attached) to the first capacitor unit 236 and / or the second capacitor unit 234, or the isolation layer 235 can have a certain gap from the first capacitor unit 236 and the second capacitor unit 234. For example, the projection area of the isolation layer 235 along the first direction can be greater than or equal to the projection area of the first capacitor unit 236 along the first direction, or can be greater than or equal to the projection area of the second capacitor unit 234 along the first direction. In this way, the first capacitor unit 236 and the second capacitor unit 234 can be fully isolated.

[0079] The capacitor 23 generates heat during operation. Since the first capacitor unit 236 and the second capacitor unit 234 are different in type, their coefficients of thermal expansion (CTEs) are different, i.e., the first capacitor unit 236 and the second capacitor unit 234 expand differently when heated.

[0080] For example, to avoid the first capacitor unit 236 and the second capacitor unit 234 from being pressed against each other or generating a large stress due to the different CTEs, the isolation layer 235 can have an elastic deformation performance. The material of the isolation layer 235 can include, but is not limited to, rubber, plastic, polymer, etc. The isolation layer 235 can elastically deform when pressed by the thermal expansion of the first capacitor unit 236 and the second capacitor unit 234. The elastic deformation of the isolation layer 235 can avoid the first capacitor unit 236 and the second capacitor unit 234 from being directly pressed against each other, and reduce the excessive stress between the first capacitor unit 236 and the second capacitor unit 234, thereby buffering and compensating for the difference in CTEs between the first capacitor unit 236 and the second capacitor unit 234, and improving the reliability of the capacitor 23.

[0081] In this embodiment, the elastic deformation of the isolation layer 235 is microscopic, and the deformation amount is small. The deformation ratio of the isolation layer 235 can be used to represent the elastic deformation performance. The deformation ratio can be (size before deformation-size after deformation) / size before deformation. The size can be a size in a certain direction, or a comprehensive size considering different weights of sizes in multiple directions.

[0082] For example, the deformation ratio of the isolation layer 235 can be less than or equal to 2%. It can be understood that the deformation ratio is greater than 0.

[0083] For example, the deformation ratio can be 0.9%-1.2%, such as 0.9%, 1.0%, 1.2%, etc. The deformation amount of the isolation layer 235 is moderate, which can buffer the difference in CTEs and avoid poor process performance of the capacitor 23 due to the isolation layer 235 being too soft. The isolation layer 235 can be connected to the capacitor units on both sides, and the elastic deformation of the isolation layer 235 can buffer and compensate for the difference in CTEs between the first capacitor unit 236 and the second capacitor unit 234.

[0084] For another example, the deformation ratio can be less than 0.9%, and the deformation amount of the isolation layer 235 is small. In this case, the isolation layer 235 can have a certain gap with the first capacitor unit 236 and the second capacitor unit 234 on both sides. The gap provides a space for the expansion and deformation of the first capacitor unit 236 and the second capacitor unit 234, and thus the gap and the isolation layer 235 can work together to avoid the first capacitor unit 236 and the second capacitor unit 234 from being directly pressed against each other, reduce the excessive stress between the first capacitor unit 236 and the second capacitor unit 234, and buffer and compensate for the difference in CTEs between the first capacitor unit 236 and the second capacitor unit 234.

[0085] For example, the isolation layer 235 can also have good temperature resistance to adapt to the temperature specification of the capacitor 23, so as to ensure that the capacitor 23 has good temperature resistance. For example, the temperature specification of the capacitor 23 can be -40°C to 135°C, and the temperature resistance range of the isolation layer 235 can include the temperature range, and the isolation layer 235 can work normally in the temperature range. Alternatively, the isolation layer 235 can also work normally at a temperature lower than -40°C, and / or can work normally at a temperature higher than 135°C, so that the isolation layer 235 has stronger temperature resistance.

[0086] For example, the isolation layer 235 can also have good stability to ensure that the capacitor 23 can work reliably for a long time. For example, the stability of the isolation layer 235 can be not lower than the stability of the first capacitor unit 236 and the second capacitor unit 234.

[0087] In another embodiment, according to product requirements, the isolation layer 235 can also not be provided. For example, an appropriate safety gap can be reserved between the first capacitor unit 236 and the second capacitor unit 234, and the safety gap is filled with air. The air can play an isolation role, and can also play a role of buffering and compensating the CTE difference. That is, the air in the safety gap substantially acts as the isolation layer 235.

[0088] In this embodiment, a packaging process can be used to package the first capacitor unit 236, the isolation layer 235, the second capacitor unit 234, the first conductor 232 and the second conductor 233 into one body, and the first conductor 232 and the second conductor 233 are led out of the packaging shell 231.

[0089] As an example, as shown in FIG. 3, the first capacitor unit 236 and the second capacitor unit 234 can be arranged along a first direction and located between the first conductor 232 and the second conductor 233, and the first conductor 232 and the second conductor 233 are arranged along a second direction. Based on this, the first conductor 232 can be connected to the first external electrode 236e and the third external electrode 234e at the same time, and the second conductor 233 can be connected to the second external electrode 236d and the fourth external electrode 234d at the same time. This is conducive to shortening the length of the first conductor 232 and the second conductor 233, simplifying the structure of the first conductor 232 and the second conductor 233, thereby optimizing the internal structure of the capacitor 23, and also conducive to ensuring the manufacturing process of the capacitor 23.

[0090] In another embodiment, the relative positions of the first capacitor unit 236, the second capacitor unit 234, the first conductor 232 and the second conductor 233 are not limited to the above, but can be determined as needed.

[0091] In the embodiment, when the package shell 231 is ceramic, and the first capacitor unit 236 or the second capacitor unit 234 is a ceramic capacitor, the package shell 231 has good process compatibility with the ceramic capacitor, and the capacitor 23 has good process performance.

[0092] As can be understood from the above, the scheme of the embodiment integrates different types and different capacities of capacitor units, so that the capacitor 23 has a wider filtering frequency and a larger capacity, and can have both filtering and energy storage functions, and has better performance. Moreover, the integrated packaging structure makes the capacitor 23 have a smaller size, so that the capacitor 23 occupies a smaller area on the circuit board, does not affect the deployment of other devices on the circuit board, and is conducive to realizing high-density layout of the circuit board; can also make the capacitor 23 close to functional devices (such as chips), which is conducive to shortening the filtering loop and improving the filtering performance; can realize a surface mount capacitor, shorten the exposed pins of the capacitor, and thus be conducive to reducing the equivalent series inductance of the capacitor. Moreover, the integrated packaging can better block the invasion of external moisture and the like, and enhance the reliability and life of the capacitor. In summary, the integrated and miniaturized packaging design of the embodiment can meet the performance requirements of the electronic device 1.

[0093] FIG. 3 and the above description both take an example in which the capacitor 23 includes two capacitor units, which is merely an example. In fact, according to product needs, the capacitor units in the capacitor 23 can also be at least three. The types of these capacitor units can be different from each other; or a part of the capacitor units have the same type, and there are other types of capacitor units. The capacities of these capacitor units can be different from each other; or a part of the capacitor units have different capacities, and a part of the capacitor units have the same capacity. Among them, the types and capacities of two adjacent capacitor units can be different.

[0094] In an embodiment, the capacitor 23 can include a plurality of first capacitor units 236, and one second capacitor unit 234 is arranged between any two first capacitor units 236. The embodiment can expand the filtering frequency domain and improve the performance of the capacitor 23 by increasing the capacitor units.

[0095] In the above embodiment, the package shell 231 and the capacitor units in it are independent of each other. Based on the above embodiment, at least a part of the package shell 231 is made into a capacitor unit in the following embodiment. Details will be described below.

[0096] As shown in FIG. 4, the package shell 231 of the capacitor 23 can include a cover 231a and a frame 231b, which can be connected together by assembly. The frame 231b can be, for example, an open-ended frame structure, and the cover 231a can cover the opening and form a receiving cavity with the frame 231b. The frame 231b includes a bottom 231c opposite the cover 231a. It can be understood that the size and shape of the bottom 231c shown in FIG. 4 are only illustrative and are not a limitation on the actual structure.

[0097] As shown in FIG. 4, the bottom 231c can be, for example, a first capacitor unit, which is hereinafter referred to as the first capacitor unit 231c. The first capacitor unit 231c can be formed together in the process of the package shell 231. For example, the material of the package shell 231 is ceramic, and the first capacitor unit 231c is a ceramic capacitor. The first capacitor unit 231c has a structure similar to that of the first capacitor unit 236 described above, for example, the first capacitor unit 231c includes a first inner electrode 236a, a first dielectric layer 236b, and a second inner electrode 236c stacked in sequence, and can further include a first outer electrode 236e and a second outer electrode 236d.

[0098] As shown in FIG. 4, the second capacitor unit 234 can be, for example, located above the first capacitor unit 231c. The second capacitor unit 234 can be, for example, an aluminum capacitor or a tantalum capacitor. The isolation layer 235 is located between the second capacitor unit 234 and the first capacitor unit 231c, and the isolation layer 235 plays a role of buffering and compensating the CTE difference and isolation between the second capacitor unit 234 and the first capacitor unit 231c.

[0099] As shown in FIG. 4, the first portion 232a of the first conductor 232 can be located in the receiving cavity of the package shell 231, and the second portion 232b of the first conductor 232 can extend from inside the package shell 231 to outside the package shell 231. The first portion 233a of the second conductor 233 can be located in the receiving cavity of the package shell 231, and the second portion 233b of the second conductor 233 can extend from inside the package shell 231 to outside the package shell 231. The second portion 232b and the second portion 233b can serve as two pins of the capacitor 23.

[0100] As shown in FIG. 4, the first portion 232a of the first conductor 232 can be connected to the third outer electrode 234e of the second capacitor unit 234, and the second portion 232b of the first conductor 232 embedded in the area inside the package shell 231 can be connected to the first outer electrode 236e of the first capacitor unit 231c. For example, the first portion 233a of the second conductor 233 can be connected to the fourth outer electrode 234d of the second capacitor unit 234, and the second portion 233b of the second conductor 233 embedded in the area inside the package shell 231 can be connected to the second outer electrode 236d of the first capacitor unit 231c.

[0101] In this embodiment, it can be considered that the first conductor 232 is located at the part of the package shell 231 connected with the first outer electrode 236e and the first outer electrode 236e, and the second conductor 233 is located at the part of the package shell 231 connected with the second outer electrode 236d and the fourth outer electrode 234d.

[0102] FIG. 4 and the above description illustrate that the bottom of the package shell 231 can be reused as the first capacitor unit 231c, which is merely an example. In fact, according to product needs, any area of the package shell 231 can be reused as the first capacitor unit, or as the second capacitor unit.

[0103] In this embodiment, by reusing a part of the package shell 231 as a capacitor unit, the package shell 231 and the capacitor unit can be integrally formed by a packaging process, reducing the later assembly process, which is conducive to increasing the structural reliability of the capacitor 23 and ensuring the performance of the capacitor 23. Since the package shell 231 is reused as a capacitor unit, there is no need to additionally install a capacitor unit, which can compress the volume of the capacitor 23, reduce the space occupied by the capacitor 23 on the circuit board, and facilitate the arrangement of the capacitor 23 and functional devices (such as chips) nearby to shorten the filter loop and improve the filtering performance. In addition, compared with the embodiment shown in FIG. 3, in this embodiment, the first part of the conductor only needs to be connected with the second capacitor unit, so the length of the first part of the conductor can be shorter, and the length of the second part of the conductor is basically consistent with the wall thickness of the package shell 231, so the total length of the conductor can be shorter.

[0104] As shown in FIG. 4, for example, by reusing the bottom of the package shell 231 as the first capacitor unit 231c, the first capacitor unit 231c is a ceramic capacitor, so that the length of the conductor connected with the outer electrode of the ceramic capacitor is basically equal to the wall thickness of the package shell 231. Compared with the embodiment shown in FIG. 3 (the conductor connected with the outer electrode of the ceramic capacitor (the second capacitor unit 234) includes a section of the first part of the conductor and the second part), the conductor connected with the outer electrode of the first capacitor unit 231c in this embodiment can be shorter. This design can meet the characteristics that the length of the conductor connected with the ceramic capacitor is more sensitive, can reduce the equivalent series inductance of the ceramic capacitor, and improve the performance of the ceramic capacitor.

[0105] Based on the structure shown in FIG. 4, at least one capacitor unit can be added to the capacitor 23, and the added capacitor units can be independent of the package shell 231. Thus, the number of capacitor units in the capacitor 23 can be at least three. The types of the capacitor units can be different from each other; or some of the capacitor units are of the same type, and there are other types of capacitor units. The capacitances of the capacitor units can be different from each other; or some of the capacitor units have different capacitances, and some of the capacitor units have the same capacitance. Among them, the types and capacitances of two adjacent capacitor units can be different.

[0106] Based on the structure shown in FIG. 4, in another embodiment, more parts of the package shell 231 can be used as capacitor units, so as to further simplify the later assembly process, improve the structural reliability and performance of the capacitor 23, reduce the length of the external electrode, and reduce the volume of the capacitor 23. Details will be described below.

[0107] As shown in FIG. 5, the package shell 231 of the capacitor 23 can include a cover 231a and a frame 231b, which can be connected together by assembly. The frame 231b can be, for example, a frame structure with one end open, and the cover 231a can cover the opening and form a receiving cavity with the frame 231b. The frame 231b has a bottom 231c opposite the cover 231a. It can be understood that the size and shape of the cover 231a and the bottom 231c shown in FIG. 4 are only a schematic and are not a limitation on the actual structure.

[0108] As shown in FIG. 5, for example, the cover 231a and the bottom 231c can both be used as first capacitor units. Hereinafter, the cover 231a is referred to as a first capacitor unit 231a, and the bottom 231c is referred to as a first capacitor unit 231c. The first capacitor unit 231a and the first capacitor unit 231c can be formed together in the process of the package shell 231. For example, the material of the package shell 231 is ceramic, and the first capacitor unit 231a and the first capacitor unit 231c are both ceramic capacitors. The first capacitor unit 231a and the first capacitor unit 231c have a structure similar to that of the first capacitor unit 236 described above, for example, both can include a first inner electrode 236a, a first dielectric layer 236b, and a second inner electrode 236c stacked in sequence, and can further include a first external electrode 236e and a second external electrode 236d.

[0109] As shown in FIG. 5, the second capacitor unit 234 can be located between the first capacitor unit 231a and the first capacitor unit 231c, and the three capacitor units can be arranged along the first direction. The second capacitor unit 234 can be an aluminum capacitor or a tantalum capacitor, for example. The first capacitor unit 231a and the second capacitor unit 234, and the second capacitor unit 234 and the first capacitor unit 231c can be provided with an isolation layer 235. The isolation layer 235 can serve to buffer and compensate for the CTE difference and isolation of the capacitor units on both sides.

[0110] As shown in FIG. 5, the first portion 232a of the first conductor 232 can be located in the package shell 231, and the second portion 232b of the first conductor 232 can extend from inside the package shell 231 to outside the package shell 231. The first portion 233a of the second conductor 233 can be located in the package shell 231, and the second portion 233b of the second conductor 233 can extend from inside the package shell 231 to outside the package shell 231. The second portion 232b and the second portion 233b can serve as two pins of the capacitor 23.

[0111] As shown in FIG. 5, the first portion 232a of the first conductor 232 can be connected to the first external electrode 236e of the first capacitor unit 231a and the third external electrode 234e of the second capacitor unit 234. The first portion 233a of the second conductor 233 can be connected to the second external electrode 236d of the first capacitor unit 231a and the fourth external electrode 234d of the second capacitor unit 234.

[0112] In this embodiment, it can be considered that the portion of the first conductor 232 located in the package shell 231 is connected to the first external electrode 236e and the third external electrode 234e, and the portion of the second conductor 233 located in the package shell 231 is connected to the second external electrode 236d and the fourth external electrode 234d.

[0113] In this embodiment, by using portions of the package shell 231 as capacitor units, the package shell 231 and the capacitor units can be integrally formed by a packaging process, reducing the later assembly process, and being conducive to increasing the structural reliability of the capacitor 23 and ensuring the performance of the capacitor 23. Since the package shell 231 is reused as a capacitor unit, there is no need to additionally install a capacitor unit, which can compress the volume of the capacitor 23, reduce the space occupied by the capacitor 23 on the circuit board, and facilitate the arrangement of the capacitor 23 and functional devices (such as chips) in close proximity to each other to shorten the filtering loop and improve the filtering performance. Moreover, by reusing multiple portions of the package shell 231 as capacitor units, the capacity of the capacitor 23 can be increased, the frequency domain of the capacitor 23 can be expanded, and the performance of the capacitor 23 can be improved.

[0114] Based on the structure shown in Fig. 5, at least one capacitor unit can be added to the capacitor 23, and the added capacitor units can be independent of the package shell 231. Thus, the number of capacitor units in the capacitor 23 can be at least four. The types of the capacitor units can be different from each other; or some of the capacitor units are of the same type, and there are other types of capacitor units. The capacitances of the capacitor units can be different from each other; or some of the capacitor units have different capacitances, and some of the capacitor units have the same capacitance. Among them, the types of two adjacent capacitor units can be different, and the capacitances of the two adjacent capacitor units can also be different.

[0115] Fig. 6 schematically shows the external structure of the capacitor 23 in an embodiment, and Fig. 7 schematically shows the exploded structure of the capacitor 23.

[0116] As shown in Figs. 6 and 7, the package shell 231 can have a substantially cuboid structure, which can include a cover 231a and a frame 231b that can be connected together by assembly. The frame 231b can be, for example, a frame structure with one end open, and the cover 231a can cover the opening and form a receiving cavity with the frame 231b.

[0117] As shown in Figs. 7 and 8, the frame 231b can include a bottom 231c, a side 231d, a side 231e, a side 231f, and a side 231g, etc. The side 231d and the side 231e can be referred to as first sides, and the side 231f and the side 231g can be referred to as second sides. Among them, the bottom 231c can be opposite to the cover 231a; the side 231d, the side 231e, the side 231f, and the side 231g are respectively protruded around the bottom 231c and connected between the bottom 231c and the cover 231a, and the two first sides are spaced apart from each other, and the two second sides are spaced apart from each other.

[0118] As shown in Fig. 7, for example, the cover 231a, the two first sides (the side 231d and the side 231e), and the bottom 231c can all be first capacitor units, which can be referred to as the first capacitor unit 231a, the first capacitor 231d, the first capacitor 231e, and the first capacitor unit 231c, respectively, hereinafter.

[0119] For example, the material of the package shell 231 is ceramic, and each of the above-mentioned first capacitor units is a ceramic capacitor.

[0120] As shown in Figs. 6 and 7, for example, the second capacitor unit 234 can be located in the receiving cavity of the package shell 231. The second capacitor unit 234 can be, for example, an aluminum capacitor or a tantalum capacitor.

[0121] As shown in FIG. 7, the first capacitor unit 231a, the second capacitor unit 234 and the first capacitor unit 231c can be arranged in sequence along the Z direction, and the first capacitor 231d, the second capacitor unit 234 and the first capacitor 231e can be arranged in sequence along the Y direction. In the embodiment, the Z direction and the Y direction can be referred to as the first direction, and the X direction can be referred to as the second direction. It can be understood that the first direction and the second direction are crossed.

[0122] As shown in FIG. 7, the first conductor 232 and the second conductor 233 can be respectively located at two second sides (the side 231f and the side 231g), that is, the first conductor 232, the second conductor 233, the first capacitor 231d and the first capacitor 231e are respectively located at different sides of the capacitor 23. For example, the first conductor 232 and the second conductor 233 are arranged along the X direction, that is, along the second direction.

[0123] As shown in FIG. 7, the first capacitor unit 231a, the second capacitor unit 234 and the first capacitor unit 231c arranged in sequence along the first direction are all located between the first conductor 232 and the second conductor 233. The first capacitor 231d, the second capacitor unit 234 and the first capacitor 231e arranged in sequence along the first direction are also all located between the first conductor 232 and the second conductor 233. In this way, the first conductor 232 can be connected to the outer electrodes of the first capacitor unit 231a, the second capacitor unit 234 and the first capacitor unit 231c at the same time, and can be connected to the outer electrodes of the first capacitor 231d, the second capacitor unit 234 and the first capacitor 231e at the same time. The second conductor 233 can be connected to the outer electrodes of the first capacitor unit 231a, the second capacitor unit 234 and the first capacitor unit 231c at the same time, and can be connected to the outer electrodes of the first capacitor 231d, the second capacitor unit 234 and the first capacitor 231e at the same time. In this way, the length of the first conductor 232 and the second conductor 233 can be shortened, and the structure of the first conductor 232 and the second conductor 233 can be simplified, so that the internal structure of the capacitor 23 is optimized, and the manufacturing process of the capacitor 23 is facilitated.

[0124] In the embodiment, the second capacitor unit 234 and each first capacitor unit can be provided with an isolation layer 235. The isolation layer 235 can buffer and compensate the CTE difference of the capacitor units on both sides and isolate the capacitor units.

[0125] In the embodiment, the first inner electrodes of all the first capacitor units and the third inner electrode of the second capacitor unit 234 can be connected in parallel and connected to the first conductor 232. The second inner electrodes of all the first capacitor units and the fourth inner electrode of the second capacitor unit 234 can be connected in parallel and connected to the second conductor 233.

[0126] In this embodiment, by using more parts of the packaging shell 231 as the capacitor unit, the capacity of the capacitor 23 can be increased, the frequency domain of the capacitor 23 can be expanded, and the performance of the capacitor 23 can be improved.

[0127] In the above, the four parts of the packaging shell 231 are taken as an example of the first capacitor unit. In fact, the embodiment is not limited thereto. According to product needs, fewer parts or more parts of the packaging shell 231 can also be used as the first capacitor unit. In addition, the positional relationship between the parts of the packaging shell 231 that are multiplexed as the first capacitor is not limited to the above, but can be set arbitrarily as needed.

[0128] Based on FIGS. 6 and 7, at least one capacitor unit can be added to the capacitor 23, and the added capacitor units can be independent of each other. The types of the capacitor units in the capacitor 23 can be different from each other; or a part of the capacitor units are of the same type, and there are other types of capacitor units. The capacities of these capacitor units can be different from each other; or a part of the capacitor units are of different capacities, and a part of the capacitor units are of the same capacity. Among them, the types of two adjacent capacitor units can be different, and the capacities of the two adjacent capacitor units can also be different.

[0129] In the embodiment of the present application, the packaging shell 231 can be manufactured in advance, a part of the packaging shell 231 can be multiplexed as a capacitor unit, or the packaging shell 231 is only a shell without multiplexing. Then, the capacitor unit and the like can be sealed into the packaging shell 231 through an assembly process. Among them, at least a part of the conductor can be manufactured together in the process of the packaging shell 231, or the conductor can be manufactured separately and connected with each capacitor unit, and then sealed into the packaging shell 231 through an assembly process.

[0130] Alternatively, each capacitor unit and the conductor can be manufactured in advance to obtain an intermediate assembly, and then the packaging shell 231 can be formed outside the intermediate assembly through a molding process or the like, and the packaging shell 231 is integrated with the first conductor 232, the second conductor 233, and each capacitor unit. It can be understood that the packaging shell 231 in this scheme is only a shell without multiplexing. This scheme can use a process similar to chip packaging to manufacture the capacitor 23, so that the capacitor 23 has better sealing, reliability, and service life.

[0131] For the convenience of understanding, the related technical terms involved in the embodiments of the present application are explained and described below.

[0132] In the description of the embodiments of the present application, "a plurality of" means two or more, unless otherwise specified.

[0133] The terms "first", "second", etc. are used only for descriptive purposes and are not to be construed as implying or implying relative importance or implicitly indicating the number of the indicated technical features. The features defined with "first", "second" can explicitly or implicitly include one or more of the features.

[0134] "Connection" should be interpreted broadly, for example, "connection" can be detachable connection, can also be non-detachable connection; can be direct connection, can also be indirect connection through intermediate medium. "Fixed" should also be interpreted broadly, for example, "fixed" can be direct fixation, can also be indirect fixation through intermediate medium.

[0135] The orientation terms mentioned in the embodiments of the present application, such as "up", "down", "front", "back", "left", "right", "inner", "outer", "side", "top", "bottom" and the like, are only the direction of the reference drawings. The orientation terms are used to better and more clearly illustrate and understand the embodiments of the present application, and are not to indicate or imply that the indicated device or element must have a particular orientation, be constructed and operated in a particular orientation, and the like, so it cannot be understood as a limitation on the embodiments of the present application.

[0136] In the description of the embodiments of the present application, unless otherwise specified, "and / or" is only a description of the association relationship of the associated objects, which means that there can be three relationships. For example, A and / or B can represent three cases: A exists alone, A and B exist together, and B exists alone.

[0137] The above is only a specific embodiment of the present application, but the protection scope of the present application is not limited thereto, any person skilled in the art can easily think of changes or replacements within the technical scope disclosed in the present application, which should be covered within the protection scope of the present application. Therefore, the protection scope of the present application should be subject to the protection scope of the claims.

Claims

1. A capacitor, characterized in that, it comprises a first conductor, a second conductor, a first capacitor unit, a second capacitor unit and a package shell; a part of the first conductor and a part of the second conductor are located in the package shell, and another part of the first conductor and another part of the second conductor are exposed outside the package shell; the first capacitor unit and the second capacitor unit are located in the package shell; or a part of the package shell serves as the first capacitor unit, and the second capacitor unit is located in the package shell; the first capacitor unit comprises a first external electrode, a second external electrode and a first dielectric layer, and the second capacitor unit comprises a third external electrode, a fourth external electrode and a second dielectric layer; the first external electrode and the third external electrode are connected to the first conductor, and the second external electrode and the fourth external electrode are connected to the second conductor; the capacities of the first capacitor unit and the second capacitor unit are different, and the materials of the first dielectric layer and the second dielectric layer are different. 2.The capacitor of claim 1, characterized in that, the first capacitor unit and the second capacitor unit are located between the first conductor and the second conductor, the first capacitor unit and the second capacitor unit are arranged along a first direction, the first conductor and the second conductor are arranged along a second direction, and the first direction intersects the second direction. 3.The capacitor of claim 1 or 2, characterized in that, the capacitor comprises a plurality of the first capacitor units, and any two of the first capacitor units are provided with a second capacitor unit therebetween. 4.The capacitor of any one of claims 1-3, characterized in that, the package shell comprises a frame and a cover, the frame comprises a bottom, two opposite first sides and two opposite second sides, the two opposite first sides and the two opposite second sides are respectively protruded around the bottom and connected between the bottom and the cover; the cover, the two opposite first sides and the bottom serve as the first capacitor unit; the first conductor and the second conductor are respectively located at positions of the two opposite second sides. 5.The capacitor of any one of claims 1-4, characterized in that, the first capacitor unit and the second capacitor unit are located in the package shell, and the package shell is integrated with the first conductor, the second conductor, the first capacitor unit and the second capacitor unit. 6.The capacitor of any one of claims 1-5, characterized in that, the first capacitor unit comprises a plurality of first internal electrodes and a plurality of second internal electrodes, the plurality of first internal electrodes and the plurality of second internal electrodes are alternately and laminatedly arranged, and the first dielectric layer is arranged between any adjacent first internal electrode and second internal electrode; the plurality of first internal electrodes are connected to the first external electrode, and the plurality of second internal electrodes are connected to the second external electrode. And / or, the second capacitor unit comprises a plurality of third inner electrodes and a plurality of fourth inner electrodes, the plurality of third inner electrodes and the plurality of fourth inner electrodes are arranged in an alternating stack, and the second dielectric layer is arranged between any adjacent third inner electrode and fourth inner electrode; the plurality of third inner electrodes are connected to the third outer electrode, and the plurality of fourth inner electrodes are connected to the fourth outer electrode.

7. The capacitor of any one of claims 1-6, wherein, The capacitor further comprises an isolation layer between the first capacitor unit and the second capacitor unit, the isolation layer has an insulating property.

8. The capacitor of claim 7, wherein, The isolation layer is used to elastically deform.

9. The capacitor of claim 8, wherein, The deformation ratio of the isolation layer is less than or equal to 2%.

10. The capacitor of any one of claims 1-9, wherein, The material of the first dielectric layer is ceramic, aluminum oxide, conductive polymer material or tantalum oxide, and the material of the second dielectric layer is ceramic, aluminum oxide, conductive polymer material or tantalum oxide.

11. The capacitor of any one of claims 1-10, wherein, The part of the first conductor exposed outside the package shell and the part of the second conductor exposed outside the package shell are located on the same side of the package shell.

12. An electronic assembly, comprising: a circuit board; a functional device; and the capacitor of any one of claims 1-11, wherein the functional device and the capacitor are arranged on the circuit board.

13. An electronic device, comprising: a housing; and the electronic assembly of claim 12, wherein the electronic assembly is arranged in the housing. ​ ​

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