Systems, methods, and software for model-based focus and dose metrology with stack monitoring

Abstract

Disclosed is a method of determining focus or dose (f / d) conditions in a lithography process. The method can include obtaining first measurement signals and second measurement signals generated by using an optical metrology sensor to measure a set of f / d marks that are processed in the lithography process. Modeled values of stack parameters of the set of f / d marks can be determined based on the first measurement signals and a sensor model, where the sensor model is configured to simulate an interaction between a measurement sensor and a f / d mark. An f / d value in the lithography process can be determined based on applying the sensor model utilizing the second measurement signals and the modeled values of the stack parameters.

Description

SYSTEMS. METHODS. AND SOFTWARE FOR MODEL-BASED FOCUS AND DOSEMETROLOGY WITH STACK MONITORINGCROSS-REFERENCE TO RELATED APPLICATIONS

[0001] This application claims priority of US application 63 / 701,495 which was filed on September 30, 2024 and which is incorporated herein in its entirety by reference.TECHNICAL FIELD

[0002] The description herein relates generally to metrology of patterns produced by lithographic processes. More particularly, the disclosure includes apparatus, methods, and computer programs for determining the focus and / or dose conditions of a lithographic process. In some embodiments, this can be done modeling a stack in a focus / dose mark and determining focus and / or dose from measurement signals of the focus / dose mark.BACKGROUND

[0003] Integrated circuits as manufactured include numerous layers containing different patterns, each layer being generated using an exposure process. In order to ensure proper operation of the integrated circuit that is manufactured, the layers consecutively exposed need to be properly printed to have the intended feature sizes and placement. In order to realize this, substrates are typically provided with a plurality of so-called focus / dose (f / d) marks. As focus and dose of a lithography system are an aspect of key performance of the lithography system, they must be accurately determined and monitored during the production process.

[0004] As used herein, “focus” refers to the alignment of the focal plane of the lithography system's optical projection system with the surface of the wafer. Proper focus ensures that the light used to expose the photoresist on the wafer is sharply concentrated at the desired level, producing clear and accurately defined patterns.

[0005] As used herein, “dose” refers to the amount of energy per unit area delivered to the photoresist- coated wafer during the exposure process. The dose determines how much light energy is absorbed by the photoresist, which in turn affects the chemical reactions necessary for pattern development.

[0006] As used herein, the term “f / d” refers to focus and / or dose. F / d can thus refer to, for example, determining focus alone, dose alone, or both focus and dose. Similarly, f / d marks can refer to marks which may have properties that can be utilized to determine focus and / or dose. F / d marks, as used herein, refer to marks that can be used to determine focus, determine dose, or can be used to determine focus and dose with the same mark. While their properties may be combined in certain f / d marks, a description of focus marks and dose marks are given individually below.

[0007] Focus marks are elements designed to be part of a lithography mask pattern and printed on the wafers. They serve the purpose of ensuring that the photolithographic process achieves the necessaryprecision and accuracy for the fine features of semiconductor devices. Focus marks are used to monitor and control focus by helping to accurately determine and adjust the focal plane of the lithography system to ensure that the wafer surface is precisely in focus. They can also be used to calibrate and fine-tune the lithography equipment, ensuring optimal performance. Focus marks can include a series of patterns or structures fabricated onto the wafer or reticle. These patterns can vary in complexity but can include lines, grids, or arrays of small features. Accurate focus determination is important for controlling the critical dimensions (CD) of the features being printed on the wafer.

[0008] Dose marks, similar to focus marks, are also elements used in the lithography process for printing integrated circuits. Their primary function is to help monitor and control the exposure dose of light that reaches the wafer, ensuring the proper transfer of the mask pattern onto the wafer. Dose marks can help in accurately determining the amount of energy (or dose) delivered to the photoresist-coated wafer during the exposure process. They can assist in ensuring that the exposure dose is uniform across the entire wafer, which is critical for consistent feature sizes and patterns. Dose marks can include a series of patterns or features that are sensitive to variations in exposure dose. These patterns might include arrays of lines, dots, or other geometries designed to exhibit measurable changes when exposed to different doses of light.

[0009] During the lithography process, the wafer is exposed to light through a mask or reticle. The dose marks on the wafer or reticle are exposed to this light, and their response is monitored. The photoresist coating on the wafer reacts to the exposure, changing properties based on the dose received. After developing the exposed wafer, the dose marks are analyzed, often using metrology tools. This analysis can involve measuring the dimensions, contrast, or other characteristics of the dose marks. Changes in these characteristics can indicate whether the correct dose was applied. If the analysis shows that the dose is incorrect (either too high or too low), adjustments can be made to the lithography system. This might involve changing the exposure time, adjusting the intensity of the light source, or modifying other exposure parameters. Similar to focus marks, dose marks are often part of a feedback loop where continuous monitoring and real-time adjustments ensure that the exposure dose remains within the desired range throughout the lithographic process.

[0010] Optical metrology sensors can be used to determine focus and / or dose utilizing f / d marks. An optical metrology sensor can be configured to project a radiation beam onto an f / d mark and determine, based on a reflected radiation beam, a focus and / or dose associated with the lithography system or process. Some optical metrology sensors can illuminate the f / d mark with light having multiple wavelengths and / or polarizations. The signals received from the light reflected from the f / d mark can be dependent upon the wavelengths and polarizations. As such, received signals can be utilized to determine focus and / or dose.

[0011] Model-based metrology can be utilized to infer process conditions (e.g., focus and / or dose). For example, a model can simulate optical metrology sensor responses and compare the simulated responses with the measurement responses from measuring f / d marks. This can allow inferring of theprocessed geometry of the marks (e.g., stack thickness variations and asymmetries). From the inferred geometry, the f / d present when the f / d marks were produced can be inferred.SUMMARY

[0012] Disclosed is a method of determining focus or dose (f / d) conditions in a lithography process. The method can include obtaining first measurement signals and second measurement signals generated by using an optical metrology sensor to measure a set of f / d marks that are processed in the lithography process. Modeled values of stack parameters of the set of f / d marks can be determined based on the first measurement signals and a sensor model, where the sensor model is configured to simulate an interaction between a measurement sensor and a f / d mark. An f / d value in the lithography process can be determined based on applying the sensor model utilizing the second measurement signals and the modeled values of the stack parameters.

[0013] In some embodiments, the modeled values of the stack parameters of the set of f / d marks can be determined with a stack model flow based on stack parameters of the set of f / d marks, scanner settings, the first measurement signals, and the second measurement signals, where the stack model flow includes the sensor model. The stack model flow can further include a regression process performed on the first and second measurement signals. The regression process can use constraints as determined by using a lithography process model.

[0014] In some embodiments, the first measurement signals indicate a normalized total intensity diffracted from the set of f / d marks. The first measurement signals can include positive order signal intensities of diffracted light from the set of f / d marks or can include negative order signal intensities of diffracted light from the set of f / d marks.

[0015] In some embodiments, the second measurement signals represent a differential signal between two or more f / d marks. The differential signal can be between positive order signal intensities of the two or more f / d marks, can be between negative order signal intensities of the two or more f / d marks, or can be between positive order signal intensities and negative order intensities of the two or more f / d marks.

[0016] In some embodiments, the sensor model is configured to simulate the interaction between the optical sensor and the marks during the measurement process and generate sensor response signals given the values of stack parameters of the set of f / d marks, as well as a measurement recipe of the sensor and sensor hardware conditions, wherein the sensor response signals include the first measurement signals, the second measurement signals, or third measurement signals.

[0017] In some embodiments, a stack of the set of f / d marks includes a top resist layer pattern and a plurality of underlayers. The top resist layer pattern can include a grating. The set of f / d marks can comprise a difference in the top resist layer pattern between at least two of the set of f / d marks. The difference can include segmentation pitch, segmentation CD, main pitch, main CD.

[0018] In some embodiments, the optical metrology sensor can be a scatterometer and can include an optical camera.

[0019] In some embodiments, the method can include a symmetric characteristic of the set of f / d marks based on the first measurement signals and modelling the symmetric characteristic as a symmetric parameter. The modelled values of the stack parameters can be symmetric parameters that include one or more of stack thickness, stack material refractive index, stack material extinction coefficient, pitch, critical dimension, or sidewall angle.

[0020] In some embodiments, the method can include obtaining an asymmetric characteristic of top gratings of the set of f / d marks based on third measurement signals and modelling the asymmetric characteristic as an asymmetric parameter. The modelled values of the stack parameters are asymmetric parameters that include one or more of floor tilt, change in sidewall angle (dSWA), or non-uniform etch depth.

[0021] In some embodiments, the first measurement signals include diffraction efficiency percentages. The method can include determining the modeled values of the stack parameters of the set of f / d marks by the sensor model simulating the first measurement signals based on stack geometry. The stack geometry can be determined with a lithography model utilizing a reticle pattern geometry and scanner settings. The modeled values of the stack parameters can be determined by performing regression of the stack parameters utilizing the first measurement signals and the simulated first measurement signals.

[0022] The method can include comprising selectively feeding given stack parameters into a stack model flow based on a sensitivity of the first measurement signals to the given stack parameters. The first measurement signals can be sensitive to the given stack parameters, the given stack parameters are fed into the sensor model as seed values and regressed by the sensor model. When the first measurement signals are not sensitive to the given stack parameters, the given stack parameters can be fixed in the sensor model.

[0023] In some embodiments, the method can include determining, with the stack model flow, the f / d value in the lithography process utilizing calibration curves based on the modeled calibration values of the stack parameters and the second measurement signals. The method can include identifying a correlation between the f / d values and second measurement signals that is specific to the modeled stack parameters, wherein the correlation is predetermined based on calibration results.

[0024] In some embodiments, the method can include interpolating the f / d value utilizing one or more calibration curves, the second measurement signals, and the modeled values of the stack parameters. Interpolations can be performed to obtain f / d values utilizing calibration curves corresponding to measurements of the second measurement signals and the modeled values of the stack parameters. The calibration curve(s) can be updated from utilizing calibration stack parameters to the modeled values of stack parameters. The second measurement signals can be updated to second calibration signals. The f / d values can be averaged to obtain the f / d value.

[0025] In some embodiments, determining the f / d values includes inputting the second measurement signals into a machine-learning model configured to generate the f / d value and generating, with the machine-learning model, the f / d value in the lithography process.

[0026] In some embodiments, a first consistency can be determined between the modeled values of the stack parameters and calibration stack parameters determined in a calibration phase. A second consistency can be determined between the first measurement signals and first calibration signals determined in a calibration phase.

[0027] In some embodiments, the sensor model can be applied utilizing simulated third measurement signals and values of asymmetric stack parameters to determine a dominant asymmetry of the f / d mark. The asymmetric stack parameters can include a representation of one or more dominant asymmetries in the set of f / d marks, a dominant asymmetry being one of a subset of asymmetries in the f / d marks that are independent from each other and has a largest contribution to the simulated third measurement signals.

[0028] In some embodiments, the method can include determining a third consistency between the dominant asymmetry and a dominant calibration asymmetry determined in a calibration phase.

[0029] In some embodiments, the method can include obtaining first calibration signals and second calibration signals by using the optical metrology sensor to measure a set of calibration f / d marks, determining, modeled calibration values of calibration stack parameters and utilizing the first calibration signals and initial values of the calibration stack parameters, determining a relationship between a calibration f / d value in the lithography process and the second calibration signals, and grouping the calibration stack parameters of the set of calibration f / d marks according to signal sensitivities to the calibration stack parameters.

[0030] In some embodiments, the method can include determining the signal sensitivities by calculating ratios of the first calibration signals and the second calibration signals change to a calibration stack parameter change. The signal sensitivities can be further determined by measuring calibration f / d marks.

[0031] In some embodiments, the method can include determining the modeled calibration values of the calibration stack parameters of the set of calibration f / d marks utilizing the sensor model simulating the first calibration signals based on a calibration stack geometry. The calibration stack geometry can be determined with a lithography model utilizing a reticle pattern geometry and scanner settings. The modeled calibration values of the calibration stack parameters can be determined by performing regression of the calibration stack parameters utilizing the first calibration signals and the simulated first calibration signals. The regression of the calibration stack parameters can minimize a difference between the first calibration signals and the simulated first calibration signals.

[0032] In some embodiments, the method can include refining the calibration stack parameters for at least some of the set of calibration f / d marks to approximate a top layer resist geometry derived from known calibration f / d values.

[0033] In some embodiments, the method can include determining given calibration stack parameters to selectively feed to the sensor model based on the sensitivity of the first calibration signals to the given calibration stack parameters. When the first calibration signals are sensitive to given calibration stack parameters, the given calibration stack parameters can be fed into the sensor model as seed values and regressed by the sensor model. When the first calibration signals are not sensitive to given calibration stack parameters, the given calibration stack parameters can be fixed in the sensor model.

[0034] In some embodiments, the method includes receiving, at a second tuning module, the calibration stack parameters along with a simulated second calibration signal and the second calibration signal, and generating, with the second tuning module, fine-tuned stack parameters. A correlation can be identified between the calibration f / d values and second calibration signals that is specific to the modeled calibration values of the calibration stack parameters.

[0035] In some embodiments, the method can include inputting the second calibration signals into a machine-learning model, the machine-learning model configured to generate the calibration f / d value, and generating, with the machine-learning model, the calibration f / d value in the lithography process.

[0036] In some embodiments, the method can include updating a top layer thickness or top layer CD of at least one of the set of calibration f / d marks utilizing the calibration f / d values and a lithography model, updating the calibration stack parameters based on an updated top layer thickness or atop layer CD to improve determination of the calibration stack parameters with the first calibration signals, and re-determining the modeled calibration values of the calibration stack parameters based on re-applying a first tuning module with the first calibration signals and the updated calibration stack parameters.

[0037] In some embodiments, the method can include applying the sensor model utilizing third calibration signals and values of asymmetric calibration stack parameters to determine a dominant calibration asymmetry of the set of calibration f / d marks. The calibration stack parameters can include a representation of one or more dominant asymmetries in the set of calibration f / d marks, a dominant calibration asymmetry being one of a subset of asymmetries in the calibration f / d marks that are independent from each other and has a largest contribution to the third calibration signals.

[0038] In some embodiments, the method can include updating a top layer shape of at least one of the set of calibration f / d marks utilizing the calibration f / d value, updating the calibration stack parameters based on the updated top layer shape to improve determination of the calibration stack parameters with simulated third calibration signals, and re -determining the modeled calibration values of the calibration stack parameters based on re-applying second tuning model utilizing the third calibration signals and the updated values of the calibration stack parameters including a dominant asymmetric stack parameter.

[0039] In an interrelated aspect, a semiconductor device manufacturing method can include receiving a substrate with a photoresist layer, directing (EUV / DUV) radiation from radiation source to transfer a pattern from a mask onto the photoresist layer, removing a portion of the photoresist layer to form thepatern over the substrate, and performing metrology on the substrate according to any of the method embodiments herein.BRIEF DESCRIPTION OF THE DRAWINGS

[0040] The accompanying drawings, which are incorporated in and constitute a part of this specification, show certain aspects of the subject mater disclosed herein and, together with the description, help explain some of the principals associated with the disclosed implementations. In the drawings,

[0041] Figure 1 schematically depicts an embodiment of a lithographic apparatus, according to an embodiment of the present disclosure.

[0042] Figure 2 depicts an example of focus / dose marks on a wafer, according to an embodiment of the present disclosure.

[0043] Figure 3 depicts an example where the lithographic apparatus may form part of a lithographic cell

[0044] Figure 4 depicts a diagram comparing exemplary stacks of f / d marks that can be measured by an optical metrology system, according to an embodiment of the present disclosure.

[0045] Figure 5 is a diagram showing examples of symmetrical and asymmetrical characteristics of an f / d mark that can be characterized by the measurement signals from the optical system, according to an embodiment of the present disclosure.

[0046] Figure 6A is a diagram of a simplified optical metrology sensor, according to an embodiment of the present disclosure.

[0047] Figure 6B depicts a sensor model to simulate signals expected to be obtained by measuring an f / d mark, according to an embodiment of the present disclosure.

[0048] Figure 7 depicts a simplified process flow diagram depicting a method associated with the calibration phase, according to an embodiment of the present disclosure.

[0049] Figure 8 depicts a process flow diagram of an exemplary method of utilizing f / d mark metrology in a calibration phase, according to an embodiment of the present disclosure.

[0050] Figure 9 depicts an example of a calibration curve relating focus, dose, and a signal from measurements of calibration f / d marks, according to an embodiment of the present disclosure.

[0051] Figure 10 depicts a process flow diagram of an exemplary method of determining f / d conditions in a lithography process applied during manufacturing, according to an embodiment of the present disclosure.

[0052] Figure 11 depicts a process flow diagram of an exemplary method of utilizing f / d mark metrology in an application phase, according to an embodiment of the present disclosure.

[0053] Figure 12 depicts an example of use of the calibration curves in determining f / d for the measured wafer, according to an embodiment of the present disclosure.

[0054] Figure 13 is a block diagram of an example computer system, according to an embodiment of the present disclosure.DETAILED DESCRIPTION

[0055] In semiconductor device manufacturing, focus and / or dose can be used to quantify performance of a lithography system. F / d can be determined by analysis of light reflected from an f / d mark as measured by an optical metrology sensor. This measurement can include illuminating f / d marks with light from an optical metrology system with the light having a range of wavelengths and / or polarizations. The optical system can receive reflected light from multiple layers of the substrate at the same time. Information about the f / d mark at the surface and underlayers of the stack geometry can be provided to a sensor model and used to determine stack parameters as well as focus and / or dose.

[0056] By way of a brief introduction, the description below relates to semiconductor device manufacturing and patterning processes. The following paragraphs also describe several components of systems and / or methods for semiconductor device metrology. This can include measuring focus and / or dose in a semiconductor device manufacturing process, for example, or for other operations.

[0057] Although specific reference may be made in this text to the measurement of focus, dose, or other parameters, and the manufacture of integrated circuits (ICs) for semiconductor devices, it should be understood that the description herein has many other applications . For example, it may be employed in the manufacture of integrated optical systems, guidance and detection patterns for magnetic domain memories, display panels, thin film magnetic heads, etc. The skilled artisan will appreciate that, in the context of such alternative applications, any use of the terms "reticle" or "wafer" in this text should be considered as interchangeable with the more general terms "mask" or "substrate," respectively.

[0058] Figure 1 schematically depicts an embodiment of a lithographic apparatus LA. The apparatus comprises an illumination system (illuminator) IL configured to condition a radiation beam B (e.g. UV radiation, DUV radiation, or EUV radiation); a support structure (e.g. a mask table) MT constructed to support a patterning device (e.g. a mask) MA and connected to a first positioner PM configured to accurately position the patterning device in accordance with certain parameters; a substrate table (e.g. a wafer table) WT (e.g., WTa, WTb or both) configured to hold a substrate (e.g. a resist coated wafer) W and coupled to a second positioner PW configured to accurately position the substrate in accordance with certain parameters; and a projection system (e.g. a refractive projection lens system) PS configured to project a pattern imparted to the radiation beam B by patterning device MA onto a target portion C (e.g. comprising one or more dies and often referred to as fields) of the substrate W. The projection system is supported on a reference frame RF.

[0059] The illuminator IL may comprise adjuster AD configured to adjust the (angular / spatial) intensity distribution of the beam. Generally, at least the outer and / or inner radial extent of the intensity distribution in a pupil plane of the illuminator can be adjusted. The illuminator IL may be operable to alter the polarization of the beam and may be operable to adjust the polarization using adjuster AD.The polarization state of the radiation beam across a pupil plane of the illuminator IL may be referred to as a polarization mode. The use of different polarization modes may allow greater contrast to be achieved in the image formed on the substrate W. In addition, the illuminator IL generally comprises various other components, such as an integrator IN and a condenser CO.

[0060] The support structure MT supports the patterning device in a manner that depends on the orientation of the patterning device, the design of the lithographic apparatus, and other conditions, such as for example whether or not the patterning device is held in a vacuum environment. The support structure may use mechanical, vacuum, electrostatic or other clamping techniques to hold the patterning device. The support structure may be a frame or a table, for example, which may be fixed or movable as required. The support structure may ensure that the patterning device is at a desired position, for example with respect to the projection system.

[0061] Any use of the terms "reticle" or "mask" herein may be considered synonymous with the more general term "patterning device." The term "patterning device" used herein should be broadly interpreted as referring to any device that can be used to impart a pattern in a target portion of the substrate. In an embodiment, a patterning device is any device that can be used to impart a radiation beam with a pattern in its cross-section to create a pattern in a target portion of the substrate. It should be noted that the pattern imparted to the radiation beam may not exactly correspond to the desired pattern in the target portion of the substrate, for example if the pattern includes phase-shifting features or so-called assist features. Generally, the pattern imparted to the radiation beam will correspond to a particular functional layer in a device being created in a target portion of the device, such as an integrated circuit. A patterning device may be transmissive or reflective. Examples of patterning devices include masks, programmable mirror arrays, and programmable LCD panels.

[0062] The term "projection system" (PS) should be broadly interpreted as encompassing any type of projection system, including refractive, reflective, catadioptric, magnetic, electromagnetic, and electrostatic optical systems, or any combination thereof, as appropriate for the exposure radiation being used, or for other factors such as the use of an immersion liquid or the use of a vacuum. Any use of the term "projection lens" herein may be considered as synonymous with the more general term "projection system."

[0063] The projection system PS may comprise a plurality of optical (e.g., lens) elements and may further comprise an adjustment mechanism configured to adjust one or more of the optical elements to correct for aberrations (phase variations across the pupil plane throughout the field). The lithographic apparatus may be of a type having two (dual stage) or more tables (e.g., two or more substrate tables WTa, WTb, two or more patterning device tables, a substrate table WTa and a table WTb below the projection system without a substrate that is dedicated to, for example, facilitating measurement, and / or cleaning, etc.). In such "multiple stage" machines, the additional tables may be used in parallel, or preparatory steps may be conducted on one or more tables while one or more other tables are beingused for exposure. For example, alignment measurements using an alignment sensor AS and / or level (height, tilt, etc.) measurements using a level sensor LS may be made.

[0064] In operation of the lithographic apparatus, a radiation beam is conditioned and provided by the illumination system IL. The radiation beam B is incident on the patterning device (e.g., mask) MA, which is held on the support structure (e.g., mask table) MT, and is patterned by the patterning device. Having traversed the patterning device MA, the radiation beam B passes through the projection system PS, which focuses the beam onto a target portion C of the substrate W. With the aid of the second positioner PW and position sensor IF (e.g. an interferometric device, linear encoder, 2-D encoder or capacitive sensor), the substrate table WT can be moved accurately, e.g. to position different target portions C in the path of the radiation beam B. Similarly, the first positioner PM and another position sensor (which is not explicitly depicted in Figure 1) can be used to accurately position the patterning device MA with respect to the path of the radiation beam B, e.g. after mechanical retrieval from a mask library, or during a scan. In general, movement of the support structure MT may be realized with the aid of a long-stroke module (coarse positioning) and a short-stroke module (fine positioning), which form part of the first positioner PM. Similarly, movement of the substrate table WT may be realized using a long-stroke module and a short-stroke module, which form part of the second positioner PW. In the case of a stepper (as opposed to a scanner), the support structure MT may be connected to a shortstroke actuator only or may be fixed. Patterning device MA and substrate W may be aligned using patterning device alignment marks Ml, M2 and substrate alignment marks Pl, P2. Although the substrate alignment marks as illustrated occupy dedicated target portions, they may be located in spaces between target portions (these are known as scribe -lane alignment marks). Similarly, in situations in which more than one die is provided on the patterning device MA, the patterning device alignment marks may be located between the dies.

[0065] Figure 2 depicts an example of focus / dose marks on a wafer. Wafer W can contain distinct target portions C (e.g., where the patterns of an integrated circuit are printed). Between those target portions C can be scribe lines SL that can be utilized to provide some separation between different target portions or to serve other purposes. In some cases, f / d marks FD can be located between scribe lines SL where they may be analyzed for determining process conditions or wafer quality, without being part of any target portions. The expanded view in Figure 2 shows an example of three different f / d marks FD having differing patterns in the scribe lines SL area. The use of multiple designs of f / d marks FD for determining f / d will be discussed further herein.

[0066] As shown in Figure 3, the lithographic apparatus LA may form part of a lithographic cell LC, also sometimes referred to a lithocell or cluster, which also includes apparatuses to perform pre- and post-exposure processes on a substrate. Conventionally these include one or more spin coaters SC to deposit one or more resist layers, one or more developers to develop exposed resist, one or more chill plates CH and / or one or more bake plates BK. A substrate handler, or robot, RO picks up one or more substrates from input / output port I / O 1 , 1 / O2, moves them between the different process apparatuses anddelivers them to the loading bay LB of the lithographic apparatus. These apparatuses, which are often collectively referred to as the track, are under the control of a track control unit TCU which is itself controlled by the supervisory control system SCS, which also controls the lithographic apparatus via lithography control unit LACU. Thus, the different apparatuses can be operated to maximize throughput and processing efficiency.

[0067] In order that a substrate that is exposed by the lithographic apparatus is exposed correctly and consistently and / or in order to monitor a part of the patterning process (e.g., a device manufacturing process) that includes at least one pattern transfer step (e.g., an optical lithography step), it is desirable to inspect a substrate or other object to measure or determine one or more properties such as focus, dose, alignment, overlay (which can be, for example, between structures in overlying layers or between structures in a same layer that have been provided separately to the layer by, for example, a double patterning process), line thickness, critical dimension (CD), focus offset, a material property, etc. Accordingly, a manufacturing facility in which lithocell LC is located also typically includes a metrology system that measures some or all of the substrates W (Figure 1) that have been processed in the lithocell or other objects in the lithocell. The metrology system may be part of the lithocell LC, for example it may be part of the lithographic apparatus LA (such as alignment sensor AS (Figure 1)).

[0068] The one or more measured parameters may include, for example, alignment, overlay between successive layers formed in or on the patterned substrate, critical dimension (CD) (e.g., critical linewidth) of, for example, features formed in or on the patterned substrate, focus or focus error of an optical lithography step, dose or dose error of an optical lithography step, optical aberrations of an optical lithography step, etc. This measurement is often performed on one or more dedicated metrology marks provided on the substrate. The measurement can be performed after-development of a resist but before etching, after-etching, after deposition, and / or at other times.

[0069] A fast and non-invasive form of specialized metrology tool is one in which a beam of radiation is directed onto a target on the surface of the substrate and properties of the scattered (diffracted / reflected) beam are measured. By evaluating one or more properties of the radiation scattered by the substrate, one or more properties of the substrate can be determined. Traditionally, this may be termed diffraction-based metrology.

[0070] Metrology results may be provided directly or indirectly to the supervisory control system SCS. If an error is detected, an adjustment may be made to exposure of a subsequent substrate (especially if the inspection can be done soon and fast enough that one or more other substrates of the batch are still to be exposed) and / or to subsequent exposure of the exposed substrate. Also, an already exposed substrate may be stripped and reworked to improve yield, or discarded, thereby avoiding performing further processing on a substrate known to be faulty. In a case where only some target portions of a substrate are faulty, further exposures may be performed only on those target portions which meet specifications. Other manufacturing process adjustments are contemplated.

[0071] A metrology system may be used to determine one or more properties of the substrate structure, and in particular, how one or more properties of different substrate structures vary, or different layers of the same substrate structure vary from layer to layer. The metrology system may be integrated into the lithographic apparatus LA or the lithocell LC or may be a stand-alone device.

[0072] To enable such metrology, often one or more metrology marks (also referred to as metrology targets) are specifically provided on the substrate, e.g., as depicted by f / d marks FD in Figure 4. Typically, the mark is specially designed and may comprise a periodic structure made of multiple layers. For example, the mark on a substrate may comprise one or more 1-D periodic structures (e.g., geometric features such as gratings), which are printed such that after development, the periodic structural features are formed of solid resist lines. As another example, the mark may comprise one or more 2-D periodic structures (e.g., contact holes), which are printed such that after development, the one or more periodic structures are formed of solid resist pillars or vias in the resist. The bars, pillars, or vias may alternatively be etched into the substrate (e.g., into one or more layers on the substrate).

[0073] In some embodiments, f / d mark FD may be a 2-D grating, which is printed such that after development the grating is formed of solid resist pillars and / or other features in the resist. For example, the f / d mark may include critical-dimension based focus (CDBF) mark. The present disclosure is not limited to any specific configuration of f / d marks.

[0074] As used herein, the term “layer” refers to a process layer, e.g., a region of the printed object (e.g., a semiconductor device or wafer) that was created with the patterning processes. Layers can be made of different materials or may be different regions that are processed (e.g., when performing an etch, the area with material removed may be considered one layer and the area below it without material removed may be considered another layer).

[0075] Embodiments of the present disclosure can utilize an optical metrology sensor to determine f / d along with stack geometry monitoring for improved model-based metrology. Model-based metrology, in general, can utilize a computer model that simulates the metrology sensor responses to predict expected signals from interaction with a given wafer structure, (or herein “mark”) and then compare the modeled signals with actual measurements of the mark to determine parameters related to f / d conditions in the lithography process that produces the mark, and the stack parameters of the mark, etc.). For model-based f / d metrology, good performance during calibration can result from the large number of sensor signals (e.g., 5-30 wavelengths and 2-3 polarizations). These signals help determine multiple stack parameters used for modeling signals from the stack and determining dominant asymmetrical characteristics of the mark with sufficient constraints. During actual use in manufacturing, one issue is the limited number of signals usable to perform f / d metrology. For example, an optical metrology sensor may be configured only to provide 1-2 wavelengths at a single polarization. This challenges model use due to an insufficient number of constraints. For f / d metrology, more marks (e.g., 16 marks in Figure 4) can be acquired by an optical metrology sensor in one acquisition. This means that even though 1~2 wavelengths and 1 polarization may be used, there can be more signals to estimate stackparameters due to measuring f / d marks in one acquisition. For example, compared with measuring two f / d marks in one acquisition, measuring 16 f / d marks in one acquisition will give 8 times more signals for stack parameter estimation.

[0076] A sensor model can be developed and configured to simulate the interaction between the optical sensor and the marks during the measurement process and generate sensor response signals, given the values of stack parameters of the marks, as well as the measurement recipe of the sensor and sensor’s hardware conditions. In some embodiments, the sensor model can generate response signals indicative of normalized total intensity for calculating stack parameters (or “first measurement signals” herein, e.g., diffraction efficiency percentage (DE%). For example, the stack parameters can be layer thicknesses, CD and / or pitch, sidewall angle. The sensor model can also generate signals indicative of volume difference of the resist between the marks which can be correlated to f / d in metrology (or “ second measurement signals” herein, e.g., a differential signal of diffracted light from two different marks (e.g., dlvl)), or “third measurement signals” based on asymmetries in the measured f / d marks. In model-based metrology, the sensor model can be utilized to determine stack symmetrical features and asymmetrical features based on the simulated response signals and measured response signals, e.g., by minimizing the difference between the simulated and measured response signals . According to embodiments of the present disclosure, based on the determined stack parameters (e.g., stack thickness) from the model, accurate and robust focus and dose measurements can be obtained. In some embodiments, the bottom layers of different f / d marks are fabricated at the same time and may share the same stack with minimal physical and geometrical variation. Accordingly, some stack parameters utilized by the sensor model may be common from one f / d mark to the next, while other parameters (e.g., relating to a top layer of the stack) may vary or have asymmetries due to the manufacturing process.

[0077] Embodiments of the present disclosure provide methods of determining f / d metrology based on signals diffracted from different f / d marks having different stack parameters. In some embodiments, in the calibration phase, a relationship among response signals (e.g., dlvl), stack parameters and f / d metrology is established. In the application phase (e.g., HVM metrology), the calibrated model is used to determine the stack parameters of the marks based on the measured sensor response signals (first measurement signals). Given such model generated stack parameters, the f / d metrology can be determined based on corresponding relationship between the second measurement response signals and the f / d metrology (e.g., the calibration curve that corresponds to the model generated stack parameters).

[0078] In some other embodiments, a machine learning model can be trained to predict f / d metrology with input of the second measurement signals (e.g., dlvl). In some embodiments, the sensor model can be used to determine the stack parameters of the measured marks based on the first measurement signals (e.g., DE%), which can be used to correct the measured dlvl based on the relationship between the stack parameters and dlvl. The corrected dlvl is fed to the machine learning model to generate the f / d values.

[0079] In some embodiments, the sensor model can be configured to selectively utilize particular stack parameters based on the sensitivity of measured signals to those stack parameters.

[0080] Figure 4 depicts a diagram comparing exemplary stacks of f / d marks 410 that can be measured by an optical metrology system. The depicted example shows sixteen f / d marks 410 next to each other. Features of f / d marks 410 at layers below the top layer can be the same for each of the f / d marks 410. Accordingly, the information derived from measuring an underlayer of f / d mark 410 by using a sensor model can be used for any of f / d marks 410. Also, while signals from individual marks can be obtained, in some cases the optical metrology sensor can obtain signals based on a combination of marks. Thus, measurements of the f / d mark 410 (e.g., during a calibration where many signals can be obtained) can be utilized as model input during manufacturing when fewer signals are available.

[0081] It will be appreciated that the present disclosure is not limited to any specific designs or number of f / d marks. For example, an f / d mark may have a reduced thickness relative to a nominal thickness (e.g., on top resist layer, while other layer thicknesses can be substantially the same - within process variations) relative to other f / d marks, for example due to process variation, e.g., chemical or etch interactions based on surface effects that may vary based on mark shape. Knowledge of the lithography process (e.g., reticle pattern geometry, scanner settings, etc.) can be utilized by a lithography model to model the resulting geometry (e.g., CD) of the mark on the wafer. The modeled geometry can be utilized by the disclosed sensor model to account for estimated signal changes due to changes in f / d mark stack characteristics. Also, the f / d marks can have different patterns with different segmentation pitch and CD. Multiple f / d marks can be utilized on a layer and so multiple groupings of f / d marks (e.g., 4x4 groupings similar to that shown in Figure 4) can be used on a layer. In some embodiments, the f / d marks can be different from each other, but in some embodiments one or more particular f / d marks can be replicated in one or more groupings.

[0082] As shown in Figure 4, a stack of the set of f / d marks can includes a top resist layer pattern (which may be different from mark to mark) and a number of underlayers (which may be the same for nearby marks). In some embodiments, the top resist layer pattern can include a grating, with the set of f / d marks optionally having at least one difference (e.g., in design) in the top resist layer pattern between at least two of the set of f / d marks. Examples of such differences can include segmentation pitch, segmentation CD, main pitch, main CD, etc.

[0083] Figure 5 is a diagram showing examples of symmetrical and asymmetrical characteristics of an f / d mark 500 that can be characterized by the measurement signals from the optical system. Characteristics of the f / d marks can be classified as symmetrical or asymmetrical. According to embodiments of the present disclosure, symmetrical characteristics can be utilized by the sensor model to tune stack parameters based on a signal that indicates symmetric characteristics of the stack (e.g., those that typically do not cause the positive first order signal to be different from the negative first order signal, for example DE%). Asymmetrical characteristics of the marks can cause unbalanced positive and negative first order signals in the sensor response signals. The sensor model can use suchmeasured signals (“third measurement signals”) to tune stack parameters and generate the modeled stack parameters. As an additional benefit, in some embodiments, asymmetrical characteristics can be used to characterize process variations process variations can be reported to a user. As used herein, symmetrical characteristics can include, for example, stack thickness 510, stack material refractive index, stack material extinction coefficient, etc. For multiple marks, the underlayers of the set of f / d marks are the same and so can be treated as sharing symmetric characteristics represented by symmetric parameters. In contrast, asymmetrical parameters are those that represent features causing an intensity difference between the positive and negative order of diffracted light from the measurement location relative to what it would be were the asymmetry not present. Examples of asymmetric characteristics can include a top grating floor tilt, top grating asymmetrical sidewall angle 520, top grating CD imbalance, etc.

[0084] Physically, the change of symmetrical characteristics can cause a change in DE% and in turn cause a change in signals that indicate a differential signal (e.g., differences in refracted light intensities either between marks or between diffractive orders of light from the same mark, and referred to herein as dlvl) and therefore cause the determined f / d to change, while a change of asymmetrical characteristics can cause a change in asymmetrical signal intensity (e.g., referred to herein as Iasy, see below). However, if the change of asymmetrical characteristics has only a minor impact on the total resist volume, it will have minimal impact on the final f / d metrology result.

[0085] Figure 6A is a diagram of a simplified optical metrology sensor. An optical metrology sensor 610 can be implemented as part of, or an independent system from, a lithography system (or used as the stand-alone metrology tool) to measure (shown by arrow 603) diffracted light from f / d marks 605. Optical metrology sensor 610 can, for example, be a diffraction-based sensor configured to obtain different types of measurement signals (first measurement signals 612 or second measurement signals 614) from measuring diffracted light from an f / d mark, e.g., first measurement signals (indicative of normalized total intensity for calculating stack parameters) such as a diffraction efficiency percentage (DE%) or second measurement signals (indicative of volume difference of the resist between marks which can be correlated to f / d in metrology) such as a differential signal of diffracted light from two different marks (e.g., dlvl). The first measurement signals can also be normalized by the intensity of the light source to stabilize against light source intensity variations. First measurement signals can be positive or negative order signal intensities or the sum of the positive and negative order signal intensities of diffracted light from the set of f / d marks. Second measurement signals 614, in some embodiments, represent a differential signal between the two f / d marks. Second measurement signals 614 can be the difference being between positive order signal intensities of two or more f / d marks, between negative order signal intensities of two or more f / d marks, or between a sum of the positive order signal intensities and negative order intensities of two or more f / d marks.

[0086] In some embodiments, the optical metrology sensor 610 can also be configured to obtain a third measurement signal. Third measurement signals, in some embodiments, can utilize differencing between positive and negative order signal intensities arising from asymmetries in the f / d marks.

[0087] The three measurement signals can be utilized to tune estimated stack parameters as explained below. For example, first measurement signals (e.g., DE%) can be utilized to tune estimated stack parameters of the marks, second measurement signals (e.g., dlvl) can be used with a tuned stack model to determine fid, and third measurement signals (e.g., Iasy) can be used to determine asymmetric parameters of the marks, e.g., which can be reported as part of process monitoring metrology.

[0088] In some embodiments, optical metrology sensor 610 can be a scatterometer, which can in some embodiments include an optical camera (e.g., a CCD camera) for receiving diffracted light from the f / d mark 605. Exemplary measurement devices for optical metrology sensor 610 can include, but are not limited to, an imaging reflectometer, a digital holographic microscope, an imaging spectroscopic reflectometer, a polarized spectroscopic imaging reflectometer, a scanning reflectometer system, a system with two or more reflectometers configured for parallel data acquisition, a system with two or more spectroscopic reflectometers configured for parallel data acquisition, a system with two or more polarized spectroscopic reflectometers configured for parallel data acquisition, a system with two or more polarized spectroscopic reflectometers configured for serial data acquisition without moving the wafer stage or moving any optical elements or the reflectometer stage, imaging spectrometers, imaging system with wavelength filter, imaging system with long-pass wavelength filter, imaging system with short-pass wavelength filter, imaging system without wavelength filter, interferometric imaging system, imaging ellipsometer, imaging spectroscopic ellipsometer, a scanning ellipsometer system, a system with two or more ellipsometers configured for parallel data acquisition, a system with two or more ellipsometers configured for serial data acquisition without moving the wafer stage or moving any optical elements or the ellipsometer stage, a Michelson interferometer, a Mach-Zehnder interferometer, a Sagnac interferometer, a dual self-referencing interferometer, a scanning angle of incidence system, and a scanning azimuth angle system. Furthermore, in general, measurement data collected by different measurement technologies and analyzed in accordance with the methods described herein may be collected from multiple tools, rather than one tool integrating multiple technologies.

[0089] The different types of measurement signals (e.g., DE%, dlvl, and Iasy) can be utilized to determine f / d values based on symmetric or asymmetric characteristics of the marks, as well as particular stack parameters. These signals are generated generally by aspects of the diffracted light from an incident beam. The metrology tool can provide a light beam with a given wavelength and polarization. The light scattered by the f / d mark is diffracted into various diffraction orders. Analysis of the diffracted light form the basis of the measurement signals. Because different marks can generate different signals (e.g., an asymmetric mark may generate strong asymmetric signals), different marks (e.g., the 16 marks shown in Figure 4) can be utilized to provide particular stack geometries for generating certain signals. For example, some marks can have designs well-suited for generatingsignals representative of CD, while others can be designed to be well-suited for signals representative of SWA. Continuing the discussion of signal types used in the present disclosure, in some embodiments, first measurement signals 612 can be DE%. DE% can indicate symmetrical geometry features such as layer thickness, CD (critical dimension), and material optical refractive index and absorption (also called n & k). In some embodiments, instead of DE%, positive order signal intensity and / or negative order signal intensity can be utilized. If needed, these can be normalized by source intensity in order to stabilize the signal. Second measurement signals 614 can indicate differential signals in the diffracted light (or a change in diffraction intensity per unit measurement volume) from the f / d marks. In some embodiments, this differential signal (dlvl) can be expressed as in Eq. 1 below, based on the intensity of diffracted light between any two different f / d marks (e.g., mark 1 and mark 2, mark 3 and mark 8, etc.),(Eq. 1)where If1, I^1are +1 and -1 order signals of one f / d mark, and If1,are +1 and -1 order signals of another f / d mark. As another example, the following quantity can be used for another type of differential signal between two f / d marks:As another example, the following quantity can be used for another type of differential signal between three f / d marks:

[0090] Third measurement signals 616 can be based on determining a difference between +1 and -1 order signals of a single f / d mark. This difference can indicate asymmetric characteristics which causes different variations in the intensity of diffracted light at those different orders. In some embodiments, this asymmetric intensity (lasy) can be expressed as in Eq. 2 below, based on the intensities of the +1 and -1 order signals:

[0091] Figure 6B depicts a sensor model to simulate signals expected to be obtained by measuring an f / d mark. In the sensor model, computational electromagnetic simulation can model emitted / reflected spectra from the substrate received by a simulated sensor and the subsequent sensor output. This can include accounting for the various wavelengths and polarizations of light that may be provided by the particular metrology device as the apparent errors can be a function of incident wavelength. Because many metrology techniques utilize receiving and analyzing light, aberrations in optical components can also appear as substrate errors, and so optical component modeling can be part of the simulation input.

[0092] Sensor model 630 can be configured to simulate a sensor signal based on the stack geometry associated with an f / d mark (e.g., stack parameters 620 such as thickness, side wall angle, CD, etc.) and optical sensor hardware settings 622 (e.g., optical components of the physical sensor, wavelengths / polarizations of light to be detected, etc.). Sensor model 630 can then output simulated first, second, and third signals (632, 634, 636) that are analogous to the measured first, second, and third sensor signals (612, 614, 616).

[0093] According to embodiments of the present disclosure, signal response simulation can be used with stack modelling to estimate the effects of symmetric and asymmetric characteristics in f / d marks and thereby determine focus and / or dose in the lithography process. The stack model flow can include utilizing sensor model 630 that can be configured to receive input such as the stack information (e.g., materials in the stack, their thicknesses, etc.). Stack parameters 620 input to sensor model 630 can include parameters of symmetries and asymmetries present in the stack (e.g., differences in the stack caused by material removal rates, development processes, etc.). The stack parameters can be obtained by simulation via process model and a lithography model of the f / d mark formation, or measured, or from stack design. Symmetric variations can be indicated by variations in certain parameters, for example, layer thickness change, CD change, symmetrical side wall angle change, etc. Asymmetric variations can be indicated by variations of certain parameters, for example, floor tilt, non-uniform etch depth, non-uniform dish depth, asymmetrical side wall angle, etc. In practice, variations in the stack can cause dlvl signal change, leading to f / d measurement errors. In some cases, dlvl signal change is mainly caused by the stack thickness change.

[0094] The combined sensor simulation and stack modelling can then provide output, for example, signal intensities that can reflect wafer imaging characteristics (e.g., pattern CD and pattern placement), from which key-performance indicators of the process control such as focus and / or dose can be derived.

[0095] The disclosed methods allow determination of focus and / or dose by modeling stack parameters of f / d mark(s) determined based also on including f / d mark sensor simulation. The modelling can utilize information from a calibration phase (Figures 7 and 8) where f / d marks are used to determine calibration curves (Figure 9) and determine constraints in parameter variation when estimating stack parameters. In an application phase (Figures 10 and 11) the determined calibration curves and constraints can then be applied with measurements another f / d mark(s) to best estimate a focus / dose value that was used in processing the f / d mark(s) and hence the wafer.

[0096] Details of the various embodiments of these processes and sub-processes are further described herein. While it is contemplated that some embodiments may include a calibration phase, it is also contemplated that the disclosed operations of the calibration phase could have previously occurred (e.g., already having calibration curves) and that use of the measurements and model could include performing the application phase without specifically performing operations related to the calibration phase.

[0097] In the calibration phase, the multiple f / d marks’ signals can be acquired at a number of wavelengths and polarizations from one or more Focus Exposure Matrix (FEM) wafers. These f / d marks (used for calibration) can have the same designs as the process monitoring marks (used during application / manufacturing). Those numerous signals can be used to search stack parameters, create the relationship between (focus, dose) and dlvl at different stack parameters, and identify dominant asymmetrical features. The results from the calibration phase can then guide the selection of fixed parameters and asymmetry features in the application phase, described below.

[0098] In the calibration phase, the f / d marks utilized can be those that were printed in different f / d conditions on the different dies of the FEM wafer, with one or more dies having different f / d conditions. Those f / d marks are measured by the sensor to acquire the various measurement signals. The sensor model can start the simulation using nominal or designed stack parameters as the starting point, and then determine the best estimated stack parameters of the actual calibration f / d marks by, for example, minimizing the difference between a measured signal from the calibration f / d marks and a simulated signal from a modeled calibration f / d mark. Also, during this calibration phase, in some embodiments, the sensitivity of one or more stack parameters (e.g., the ratio of signal change to stack parameter change) can also be found. The calibration phase thus can provide both the best estimated stack parameters and stack parameter sensitivity.

[0099] As used herein, the descriptive term “calibration” is often used to distinguish between signals, values, etc. that are similarly referred to in the “application” phase. For example, “first calibration signals” may be signals obtained during the calibration phase and “first signals” may refer to signals obtained during the application phase - with the signals possibly being of similar types (e.g., DE%).

[0100] Figure 7 depicts a simplified process flow diagram depicting a method associated with the calibration phase. A method describing aspects of the calibration phase can include, at 710, obtaining first calibration signals (e.g., DE%) and second calibration signals (e.g., dlvl) by using an optical metrology sensor to measure a set of calibration f / d marks (e.g., f / d marks used for purposes of calibration).

[0100] In some embodiments, the method can include, at 720, determining modeled values of calibration stack parameters and utilizing first calibration signals and initial values of calibration stack parameters.

[0101] In some embodiments, the method can include, at 730, determining a relationship between a calibration f / d value in the lithography process and the second calibration signals.

[0102] In some embodiments, the method can include, at 740, grouping the calibration stack parameters of the set of calibration f / d marks according to signal sensitivities to the calibration stack parameters. This grouping can be utilized during stack parameter determination in the application phase, for example by regressing only stack parameters where the signals are sensitive to those stack parameters. In some embodiments, the signal sensitivities can be determined by calculating the ratios of the first calibration signals and second calibration signals change to the stack parameter change, e.g., through simulation. Comparing the signal sensitivity to their respective noise levels, it can be determined which parameter has high sensitivity. In some embodiments, the sensitivities can be further determined by measuring multiple calibration f / d marks. This can include measuring marks on one substrate or more than one substrate.

[0103] Figure 8 depicts a process flow diagram of an exemplary method of utilizing f / d mark metrology in a calibration phase. Figure 8 and its description herein provides additional details of the example method presented in Figure 7.

[0104] To obtain the calibration curves mentioned above that are used in the application phase, the process shown in Figure 8 can begin with utilizing a lithography model 810, with inputs including reticle pattern geometry 812 and scanner settings 814 (e.g., calibration f / d, illumination pupil, etc.). Lithography model 810, which can be a model configured to predict f / d marks. The output of lithography model 810 can predict mark resist layer stack parameters 816, particularly the top-layer resist geometry of the calibration f / d mark as expected to be manufactured on the FEM wafer(s). From the modeled mark resist layer stack parameters 816 and the underlayer stack parameters 817, modeled calibration f / d mark stack parameters 818 (e.g., thickness, SWA, CD, etc.) can be obtained. For example, the underlying stack parameters can be obtained based on the other processes before the lithography.

[0105] The modeled calibration stack parameters 818 can be further refined by incorporating the output of a simulated sensor in stack model flow 820 and comparing the simulated sensor output (of the modelled calibration f / d mark) to a measured sensor output (of the actual calibration f / d mark). Stack model flow 820 can incorporate sensor model 830 (e.g., similar to sensor model 630 shown in Figure 6B), which can receive modeled calibration stack parameters 818 as well as optical sensor hardware settings 819 used when measuring the calibration f / d marks. Sensor model 830 can similarly output any of simulated first calibration signal 832, simulated second calibration signal 834, and simulated third calibration signal 836.

[0106] Stack model flow 820 can utilize both simulated calibration signals (output from sensor model 830 and that are a function of a modeled calibration f / d mark) and measured calibration signals (from actual measurements of the actual calibration f / d mark) to refine the modeled stack parameters of the calibration f / d marks. With the refined stack parameters, the sensor model can provide refined simulated signals (e.g., dlvl) and estimates of focus and dose to build the calibration curves used during the application phase for determining the focus / dose that was present for a target of interest. Returningto Figure8, first tuning module 840 (e.g., a software code module that executes the disclosed regression algorithm) can receive simulated first calibration signal 832 and measured first calibration signal 842 and output tuned stack parameters 844. As explained further below, in some embodiments this can include performing regression of the stack parameters to find those resulting the least difference between the simulated first calibration signal 832 and measured first calibration signal 842.

[0107] A first step in the calibration phase can include simulating sensor responses when measuring the calibration f / d mark. The sensor model can receive stack information and calibration / measurement conditions (such as wavelength, polarization, etc.) and output simulated diffraction signals. It can include determining modeled calibration values of the calibration stack parameters of the set of calibration f / d marks utilizing the sensor model 830 simulating first calibration signals 842 based on the calibration stack geometry (e.g., as determined from the actual calibration f / d marks on the FEM wafer(s)). In some embodiments, determining the modeled calibration values of the calibration stack parameters can be performed by regression of the calibration stack parameters 818 utilizing the first calibration signals 842 and the simulated first calibration signals 832. An exemplary expression for determining the modeled calibration values (p*) of the calibration stack parameters can be given by:where Eq. 3 describes performing regression to determine stack parameters by iteratively varying the stack parameters to minimize the difference between first calibration signals 842 (e.g., DE%) and the simulated first calibration signals 832 as simulated by sensor model 830 (e.g., f(p) in Eq. 3). In some embodiments, multiple f / d marks’ signals can be used together to determine the common stack parameters (such as the underlayer thickness, which can be very similar for f / d marks next to each other, see Figure 4) and stack parameters specific to individual marks (such as top resist grating CD, which by design can be different per mark). This can include refining the calibration stack parameters for at least some of the set of calibration f / d marks to approximate a top layer resist geometry derived from known calibration f / d values. The regressed stack parameters for the calibration f / d marks can be utilized as explained below to create calibration curves that relate these regressed stack parameters (pcal) to the known calibration f / d values and their corresponding measured signals (e.g., DE%, dlvl, etc.).

[0108] Second tuning module 850 can receive the tuned stack parameters 844 along with simulated second calibration signal 834 and measured second calibration signal 852. Second tuning module 850 can then generate fine-tuned calibration stack parameters 854 to best match top layer resist geometry determined by the known calibration f / d value 815. As explained further below, in some embodiments this can include performing regression of stack parameters with mark resist layer stack parameters 816 determined by calibration f / d value 815 as constraints and resulting in the least difference between the simulated second calibration signal 834 and measured second calibration signal 852. With the fine-tuned calibration stack parameters 854, also called pcal, calibration curves 860 can be built as explained further below.

[0109] The calibration curves can be determined using calibration f / d marks with their known f / d. The regressed stack parameters (pcal) for numerous target portions C (See, e.g., Figure 2 - target portion C being one exposure area on the wafer when transferring the patterns from the reticle) can be determined with each target portion C having its own scanner f / d value. A target portion can be associated with an f / dcal(f / d for a particular calibration f / d mark), and two f / d marks in the same field can be used to obtain the measured second calibration signals (e.g., dlvlcal).

[0110] In some embodiments, it can be beneficial to build calibration curves that cover a larger range of focus and dose, than expected to be used in the application phase. This is because interpolation using a calibration curve with wider f / d range can be preferable to having to use extrapolation from a calibration curve with narrower f / d range. Interpolation, having more and better-defined bounding points can provide more accuracy than extrapolating beyond known calibration data.[oni] In some embodiments, the calibration phase can include identifying a correlation between the calibration f / d value 815 and second calibration signals 852 that is specific to the fine-tuned calibration stack parameters pcal854 (e.g., building a calibration curve 860). Before discussing details of the calibration curve 860, the following topics will be discussed: a) other embodiments for determining f / d, b) feeding back determined quantities into the process to further refine stack parameters, c) the role of parameter sensitivity, and d) establishment of rules for stack parameter handling in the application phase.

[0112] In some embodiments, a machine learning model can be trained to determine the relationship between calibration f / d value and the second signals at the fine-tuned calibration stack parameters 854. For example, this machine learning model can be trained by inputting the modeled calibration values of the calibration stack parameters and second calibration signals 852, and outputting the known f / d values as the labels. With the above exemplary input, a method can include generating, with the machine-learning model, calibration f / d value 754 in the lithography process. Examples of machinelearning models that can be utilized may include, as one example, a convolutional neural network (CNN) where the input layer can be dlvl from multiple pairs of f / d marks and the output layer can be focus and / or dose. In some embodiments, the CNN can have multiple hidden layers, for example two, three, or more. In a particular embodiment, a first hidden layer can have 128 nodes, a second hidden layer can have 64 nodes, and a third hidden layer can have 16 nodes. The hidden layers can be fully connected to form a dense neural network. Because the second calibration signals 852 can be associated with the fine-tuned stack parameters pcal, this advantageously enables us to estimate the second signal correction during the application phase due to the process variations caused stack parameters different from pcal, and therefore the calibration curves can be extended to cover future target stack parameters variations.

[0113] Also, fine-tuned calibration stack parameters 854 can be fed back into sensor model 830 and the process can be performed iteratively to further refine the tuned stack parameters 844 and the finetuned calibration stack parameters 854.

[0114] In some embodiments, a previously determined f / d mark resist layer's geometry and placement relationship among different f / d values can be utilized to iteratively aid the determination of stack parameters in the calibration phase. The f / d mark resist layer's geometry and placement relationship among different f / d conditions can be estimated by a lithography model. Because the determined f / d values are a function of the stack top layer, the stack parameters relating to the top layer can be further refined. For example, an f / d mark with segmentation CD 30 nm at nominal f / d condition (defocus = 0 nm., dedose = 0%) might have CD 32nm at (defocus = 15 nm., dedose = 0%) per a lithography model. It can be checked whether the top layer CD difference at those two f / d conditions is ~2nm. If not, then the calibration stack parameters (including CD and stack thickness) can be regressed, with ~2nm CD delta as a constraint.

[0115] As one example, a method can include updating a top layer thickness or top layer CD of at least one of the set of calibration f / d marks utilizing calibration f / d value 815 and a lithography model. The calibration stack parameters can be updated based on the updated top layer thickness or top layer CD to improve determination of the calibration stack parameters with the first calibration signals 832. The modeled calibration values of the calibration stack parameters can be re-determined based on reapplying first tuning module 840 with first calibration signals 832 and the updated values of the calibration stack parameters.

[0116] Before discussing the building of calibration curves 860, some embodiments can also include third module 870 that can receive simulated third calibration signal 836, tuned stack parameters 844, and measured third calibration signal 872 as input and then identify the dominant asymmetric stack parameter 874 that results in a dominant asymmetry.

[0117] Once the fine-tuned stack parameters 854 that determine the symmetrical characteristics of the mark have been determined, we can fix those parameters and enable an asymmetry search. In some embodiments, asymmetric stack parameters, particularly those relating to a dominant asymmetry, can be utilized to further calibrate sensor model 830 or be reported to a user to provide feedback on the manufacturing process. Here, a method can include applying sensor model 830 utilizing third calibration signals 836 (e.g., lasy) and values of asymmetric calibration stack parameters to determine a dominant calibration asymmetry of the calibration f / d mark. In some embodiments, the calibration stack parameters can include a representation of one or more dominant asymmetries in the set of calibration f / d marks. A dominant asymmetry can be one of a subset of asymmetries in the calibration f / d marks that are independent from each other and has the largest contribution to the third calibration signals 836 (e.g., lasy). Examples of dominant asymmetries can include asymmetric side wall angles, grating tilt, floor tilt, CD imbalance, etc.

[0118] In some embodiments, a dominant asymmetry (e.g., determined as explained above) can be utilized to iteratively aid the determination of stack parameters in the calibration phase and thereby further refine determination of the calibration curve. Because the determined calibration curve is also a function of asymmetric features of the stack top layer, the stack parameters relating to the top layer can be further refined. The calibration stack parameters (e.g., including the top layer stack parameters) can be updated based on the updated top layer shape to improve determination of the calibration stack parameters with the third calibration signals 836. The modeled calibration values of the calibration stack parameters can be re-determined based on re-applying second tuning module 850 utilizing third calibration signals 836 and the updated values of the calibration stack parameters including the dominant asymmetric stack parameter 874.

[0119] In the calibration phase, a comparatively large number of signals from multiple wavelengths and polarizations can be used as the input to extract stack parameters and identify the dominant asymmetries. For example, calibration signals can be acquired from measuring multiple marks on one or more FEM wafers (e.g., using 3-10 wavelengths and 2-3 polarizations on 1-3 wafers) The parameter sensitivity to the signals can be established in the calibration phase and the parameters can be grouped accordingly. Tuning of the parameters during calibration can be used to establish a correlation between f / d and the input measurement signals from f / d marks used for calibration. The results from the calibration phase can guide the handling (e.g., regression) of the stack parameters in the application phase. The handling of the parameters in the application phase can thereby be based on which parameters are found to be sensitive to the input signals. As one example, stack parameters can be grouped by the sensitivity to first signals (e.g., DE%). For stack parameters that are highly sensitive, the application phase can use stack parameters obtained in the calibration phase as the initial values, which can then be regressed with bounding ranges also learned in calibration phase (or within some margin of the bounding ranges). Also during the application phase, stack parameters with low sensitivity, the stack parameters can be fixed at values obtained in calibration phase and not regressed.

[0120] Embodiments of the disclosed processes can include sensor model receiving a comparatively large number of signals as input during calibration phase. This can include sensor model outputting simulated sensor signals, determining tuned stack parameters, building the calibration curve(s), which correlates dlvl and stack parameters to calibration f / d value (e.g., the focus / dose value that was present when printing the f / d mark in the lithography process), determining groupings of stack parameters based on the sensitivity of sensor signals to those stack parameters, determining rules for handling parameter tuning (e.g., only regressing the “sensitive” group of parameters via regression methods as described herein), etc.

[0121] In some embodiments, the calibration phase can include selecting stack parameters to utilize during the application phase. This is because signals may not be sensitive to certain stack parameters and so it can be more efficient to feed forward the values of the stack parameters used for calibration rather than regressing them during the application phase. In this way, some embodiments can includedetermining given calibration stack parameters to selectively feed to sensor model 830 based on the sensitivity of first calibration signals 832 to the given calibration stack parameters. In some embodiments, one or more of the following rules can be determined. First, when first calibration signals 832 are sensitive to given calibration stack parameters, the given calibration stack parameters will be fed (e.g., during the application phase, described with reference to Figure 7) into sensor model 830 as seed values and regressed by sensor model 830. Second, when first calibration signals 832 are not sensitive to given calibration stack parameters, the given calibration stack parameters will be fixed in sensor model 830.

[0122] Some embodiments can include determining bounding ranges of the stack parameters that are based on a range of the modeled calibration stack parameters given the first calibration signals 832. During the calibration phase, because the variation in stack parameters with calibration f / d value 815 are known, their relationship to each other can be established and therefore bounding ranges of stack parameters can be determined (for use during regression in the application phase). This, in turn allows bounding ranges of the inferred f / d value to be determined.

[0123] Figure 9 depicts an example of a calibration curve relating focus, dose, and a signal from measurements of calibration f / d marks. After the calibration phase has accurately determined the focus, dose, and measured sensor signals for numerous calibration f / d marks, calibration curves can be determined for use in the application phase to determine focus and dose for the wafer given measurements (e.g., dlvl) of the f / d marks. Recall that dlvl is a signal that relates to the intensity of two different calibration f / d marks.

[0124] There are numerous ways that a calibration curve can be represented, and the example in Figure 9 shows calibration curves 910a, 910b, 910c for three example pairs of calibration f / d marks (e.g., a first pair represented by curve 910a, a second by 910b, and a third by 910c), though there can be many more pairs utilized in practice (e.g., considering embodiments where they may be 16 different calibration f / d marks). The calibration curves are depicted here as surface plots with values of the second measurement signals 940 (e.g., dlvl for a given pair of marks) as a function of focus 920 and dose 930. While the present disclosure presents the calibration curves as surface plots for illustrative purposes, the information can also be stored as multidimensional tables, arrays, vectors, etc. Furthermore, calibration curves can be constructed as a function of four parameters rather than just the three shown, with the four parameters referenced later when discussing use of these curves in the application phase. The first three parameters are depicted in Figure 9: a) focus and b) dose for a particular calibration f / d mark (f / dcal), c) second calibration signals (dlvlcal). Additionally, the fourth parameter can be d) regressed stack parameters (pcal) associated with the first three parameters. Here, pcalcan represent the regressed stack parameters of two marks that can be used for calculation of dlvlcaland saving this information tracks at which stack parameters that dlvlcalhas been obtained.

[0125] The application phase is described herein as where the f / d is determined for a wafer such as during or after manufacture. The application phase utilizes measurements of the f / d marks on the targetwafer along with the information obtained during the calibration phase, to determine the f / d when the wafer was manufactured. In the application phase, the multiple f / d marks’ signals can be acquired at fewer wavelengths and / or polarizations (e.g., using 1-2 wavelengths and a single polarization) and utilized with the calibration curves to determine the f / d value of the target wafer (and optionally also determining modeled values of the measured stack parameters). The selected stack parameters can be advantageously tuned (e.g., via regression) on reduced number of signals and with the constraints based on the result from the calibration phase. For example, some of the stack parameters will be fixed at the values learned in the calibration phase. After obtaining, for example, the layer thickness through the regression, focus and dose values can be determined at the regressed layer thickness. This allows for correcting errors due to stack variation and so achieves more accurate and robust focus and dose results.

[0126] Comparing Figures 8 and 9 with Figures 10 and 11, it can be seen that the application phase has many similarities with the calibration phase, but there are several key differences. As such, the differences will mainly be explained below, with any similarities to the analogous steps in the calibration phase noted. As used herein, the terms “calibration” and “measurement” refer to elements in the calibration and application phases, respectively. For elements that are simulated or modeled, they are further described as such. Also, the described models, modules, etc. in Figure 11 can be the same but for the input data, or they can be substantively similar in function but not exactly the same. For example, the lithography model used in the calibration phase may be the same as that used in the application phase, but alternatively they may be different models while still providing similar output (e.g., modeled mark resist layer stack parameters of f / d marks). Use of the lithography model and the sensor model can be very similar to those described in the calibration phase and so will be only briefly discussed below before going into the larger differences of later steps in the process.

[0127] Figure 10 depicts a process flow diagram of an exemplary method of determining f / d conditions in a lithography process applied during manufacturing. At 1010, the method can include obtaining first measurement signals 612 and second measurement signals 614 generated by using optical metrology sensor 610 to measure a set of f / d marks that may have been processed in the lithography process. At 1020, the method can include determining modeled values of stack parameters of the set of f / d marks based on first measurement signals 612 and sensor model 630 utilizing values of stack parameters (e.g., modelled stack parameters or stack parameters that may have been found during the calibration phase). At 1030, the method can include determining an f / d value in the lithography process based on applying sensor model 630 utilizing second measurement signals 614 and the modeled values of the stack parameters. Determining the f / d value can include utilizing the calibration curve found during the calibration phase.

[0128] In some embodiments, measurements of the f / d marks can include obtaining a symmetric characteristic of the set of f / d marks based on the first measurement signals and modelling the symmetric characteristic as a symmetric parameter. The modelled values of the stack parameters canbe symmetric parameters that can include includes one or more of stack thickness, stack material refractive index, stack material extinction coefficient, pitch, critical dimension, or sidewall angle.

[0129] In some embodiments, measurements of the f / d marks can include obtaining an asymmetric characteristic of the top gratings of the set of f / d marks based on the third measurement signals and modelling the asymmetric characteristic by sensor model 630 as an asymmetric parameter. The modelled values of the stack parameters can be asymmetric parameters that can include one or more of floor tilt, asymmetrical sidewall angle (dSWA), or non-uniform etch depth.

[0130] Figure 11 depicts a process flow diagram of an exemplary method of utilizing f / d mark metrology in an application phase.

[0131] For the wafer of interest, reticle pattern geometry 1112 (for the wafer of interest) and scanner settings 1114 (for measuring the wafer of interest) can be obtained and input into lithography model 1110 that can then output modeled mark top resist layer stack parameters 1116.

[0132] Stack model flow 1120 can include utilizing sensor model 1130, which can receive the modeled application f / d mark stack parameters 1118 which can include mark top resist layer stack parameters 1116 and mark underlayer stack parameters 1117, and optical sensor hardware settings 1119. Sensor model 1130 can similarly output any of simulated first measurement signal 1132, simulated second measurement signal 1134, and simulated third measurement signal 1136.

[0133] The application phase can have many similar aspects to those described for calibration phase. Thus, the method can also build on the framework of Figure 10 to include determining modeled values of the stack parameters of the set of f / d marks utilizing sensor model 1130 simulating first measurement signals 1132 based on the stack geometry. In some embodiments, determining the modeled values of the stack parameters can be performed by regression of the stack parameters utilizing the first measurement signals 1142 and the simulated first measurement signals 1132. This can be performed with substantively the same process as described in the first step of the calibration phase (e.g., regressing stack parameters as with Eq. 3).

[0134] Stack parameter handling rules (based on the sensitivity of signals to changes in stack parameters) determined during the calibration phase can be applied to regression of the parameters in the application phase. Accordingly, some embodiments can include selectively feeding given stack parameters into stack model flow 1120 based on the sensitivity of first measurement signals 1142 to the given stack parameters. In some embodiments, one or more of the following rules can be determined. First, when first measurement signals 1142 are sensitive to given stack parameters, the given stack parameters are fed into sensor model 1130 as seed values and regressed by sensor model 1130. Second, when first measurement signals 1142 are not sensitive to given stack parameters, the given stack parameters are fixed in sensor model 1130.

[0135] The f / d value in the lithography process can be determined by utilizing the calibration curves determined in the calibration phase based on the modeled calibration values of the stack parameters 1144 and the second measurement signals 1152.

[0136] In various embodiments, f / d metrology accuracy can be improved by using the modeled stack information to update the measured signals to be input to the machine learning model or interpolation. In some embodiments, the calibration curve(s) can be updated by applying sensor model on the stack parameter difference between the calibration phase and the application phase. . To give one illustrative example, in the calibration phase, the layer thickness could be determined to be 30 nm. In the application phase, the stack thickness of the f / d mark could be 32nm. The second measurement signals (e.g., dlvl) obtained in the calibration phase at thickness 30nm can be corrected to a thickness of 32nm using the sensor model. In some other embodiments, rather than updating the calibration curve(s), the second measurement signals are translated to the corresponding signals as the stack parameters obtained in the calibration phase. The translation can be done by applying the sensor model based on the stack parameter difference between the calibration phase and the application phase.

[0137] The f / d value of the wafer of interest can be generated utilizing f / d module 1150. In various embodiments, f / d module 1150 can be a programming module that implements an interpolating approach or a machine-learning model in order to output f / d values. This can include identifying a correlation between the f / d values and second measurement signals that is specific to the modeled stack parameters, where the correlation can be predetermined based on calibration results (e.g., utilizing the calibration curve(s) 860 from the calibration phase). In various embodiments, the f / d value can be determined by, for example, interpolating the f / d value utilizing one or more calibration curves 860, the second measurement signals 1152, and the modeled values of the stack parameters P*. In other embodiments, focus / dose can be determined by inputting the modeled stack parameters into a machinelearning model trained to predict the f / d value based on a training corpus of f / d marks, measured signals, and verified f / d values of a lithography system.

[0138] In some embodiments, determining the f / d value can include interpolating on the calibration curve predetermined in the calibration phase, with the second measurement signals (e.g., measured dlvl), and the stack parameters p* (the modeled values of the stack parameters regressed in the application phase). The stack parameters (p ) 1144 can be found by minimizing the difference between first measurement signals 1142 and the simulated first measurement signals 1132 by DE% tuning module 1140 (see Eq.3), based on predetermined rules (e.g., as determined during calibration phase) and sensitivities of first measurement signals 1142. An exemplary expression for determining the f / d values can be given by:(focus, dose)=interpolation[CalibrationCurve(F£>c“i, d / v / c“i, pcaldlvl^pas, p*] (Eq.4) where dlvl^epasis an example of the second measurement signal 1152 and FDcal, dlvlcal, pcalare calibration f / d value 815, second calibration signal 852, and fine-tuned stack parameters 854 respectively that are used to build the calibration curve in the calibration phase.

[0139] Figure 12 depicts an example of use of the calibration curves in determining f / d for the measured wafer. Because the f / d marks measured in the application phase are necessarily not the same as the f / d marks measured in the calibration phase, pcalmay not be exactly the same as the stack parameters utilized in the application phase. For this reason, f / d error due to stack change from marks used in the calibration phase to the marks used in the application phase should be corrected or minimized.

[0140] From Eq. 4, for any given pair of f / d marks (that presumably have the same focus and dose but have different dlvl due to mark design differences), using the measured second measurement signals 1152 and the modeled values of the stack parameters 1144, interpolating with the calibration curves 860 provide estimates of focus and dose. However, due to mark variations these f / d values will likely not be the same and so an estimated f / d value can be determined from the different f / d values. Figure 12 depicts an example of measurements for three pairs of f / d marks corresponding to the analogous calibration f / d marks used to build the calibration curves. Given dlvlepasand the determined stack parameters 1144 the interpolation function in Eq. 4 can be used to output a focus value and a dose value, shown in Figure 12 as a point on a plot of focus 1220 vs dose 1230. The three measurements have corresponding points 1240a, 1240b, 1240c. As mentioned above, to reduce the error due to variations between f / d marks, in some embodiments an averaging procedure can be performed to arrive at a single estimated focus / dose value 1250 for the wafer.

[0141] While the flow in Figure 11 is generally described with respect to the interpolation method, in some embodiments, a machine learning model can be used to output the f / d value based on inputting second measurement signals (e.g., dlvl). In some embodiments, dlvl can be corrected (or updated) based on the modeled stack parameters before supplying to the machine learning model as input. The updated dlvl, which is calculated based on the sensor model using stack parameters 1144 in the application and stack parameter pcalin the calibration phase, as input to a trained machine learning model, which would then directly output f / d values 1154.

[0142] In some embodiments, similar to that described in the calibration phase, a previously determined f / d value can be utilized to iteratively aid the determination of stack parameters in the calibration phase and thereby further refine determination of the f / d value . For example, this can include determining a first consistency between the modeled values of the stack parameters and calibration stack parameters determined in a calibration phase. Some embodiments can also include determining a second consistency between the first measurement signals and first calibration signals determined in the calibration phase.

[0143] Because the geometry and placement of multiple f / d marks at f / d values (for example 16 f / d marks in Figure 4 can be measured in one acquisition) can be estimated by the lithography model (which can determine the top layer stack parameters as a function of f / d values), the stack parameters relating to the top layer can be further refined to improve the consistency. As one example, a method can include updating a top layer thickness or top layer CD of at least one of the set of f / d marks utilizing f / d values1154. The stack parameters can be updated based on the top layer thickness or top layer CD to improve determination of the stack parameters with the first measurement signals 1132. The modeled values of the stack parameters can be re-determined based on re-applying sensor model 1130 utilizing first measurement signals 1132 and the updated values of the stack parameters.

[0144] In some embodiments, asymmetric stack parameters, particularly those relating to a dominant asymmetry, can be utilized to further constrain sensor model 1130 or be reported to a user to provide feedback on the manufacturing process. Here, a method can include applying sensor model 1130 utilizing simulated third measurement signals 1136 (e.g., lasy) and values of asymmetric stack parameters to determine a dominant asymmetry 1174 of the fid mark. Some embodiments can also include third module 1170 that can receive third simulated calibration signal 1136, tuned stack parameters 1144, and measured third calibration signal 1172 as input and then identify the dominant asymmetric stack parameter that results in a dominant asymmetry 1174. In some embodiments, the stack parameters can include a representation of one or more dominant asymmetries in the set of fid marks. A dominant asymmetry can be one of a subset of asymmetries in the f / d marks that are independent from each other and has the largest contribution to the simulated third measurement signals 1136 (e.g., lasy).

[0145] In some embodiments, a previously dominant asymmetry can be utilized to iteratively aid the determination of stack parameters in the application phase and thereby further refine determination of the f / d value. This can include determining a third consistency between the dominant asymmetry 1174 (e.g., as determined by third module 1170 based on input of simulated third measurement signals 1136) and a dominant calibration asymmetry determined in a calibration phase. Because the determined f / d values can be also a function of asymmetric features of the stack top layer, the stack parameters relating to the top layer can be further refined. As one example, a method can include updating a top layer shape of at least one of the set of f / d marks utilizing f / d values 1154. The stack parameters can be updated based on the updated top layer shape to improve determination of the stack parameters with the simulated third measurement signals 1136. The modeled values of the stack parameters can be redetermined based on re-applying sensor model 1130 utilizing simulated third measurement signals 1136 and the updated values of the stack parameters including a dominant asymmetry.

[0146] With the above, model-based focus and dose metrology can be performed utilizing a calibrated model that can return estimates of a lithography system’s focus and dose. This can provide important feedback to adjust the lithography system or process in order to improve delivery of accurate light patterns when forming patterns on a substrate. The monitoring of stack parameters, including asymmetries, can also provide an indication of other process errors.

[0147] Figure 13 is a block diagram of an example computer system CS, according to an embodiment of the present disclosure.

[0148] Computer system CS includes a bus BS or other communication mechanism for communicating information, and a processor PRO (or multiple processor) coupled with bus BS for processinginformation. Computer system CS also includes a main memory MM, such as a random access memory (RAM) or other dynamic storage device, coupled to bus BS for storing information and instructions to be executed by processor PRO. Main memory MM also may be used for storing temporary variables or other intermediate information during execution of instructions to be executed by processor PRO. Computer system CS further includes a read only memory (ROM) ROM or other static storage device coupled to bus BS for storing static information and instructions for processor PRO. A storage device SD, such as a magnetic disk or optical disk, is provided and coupled to bus BS for storing information and instructions.

[0149] Computer system CS may be coupled via bus BS to a display DS, such as a cathode ray tube (CRT) or flat panel or touch panel display for displaying information to a computer user. An input device ID, including alphanumeric and other keys, is coupled to bus BS for communicating information and command selections to processor PRO. Another type of user input device is cursor control CC, such as a mouse, a trackball, or cursor direction keys for communicating direction information and command selections to processor PRO and for controlling cursor movement on display DS. This input device typically has two degrees of freedom in two axes, a first axis (e.g., x) and a second axis (e.g., y), that allows the device to specify positions in a plane. A touch panel (screen) display may also be used as an input device.

[0150] According to one embodiment, portions of one or more methods described herein may be performed by computer system CS in response to processor PRO executing one or more sequences of one or more instructions contained in main memory MM. Such instructions may be read into main memory MM from another computer-readable medium, such as storage device SD. Execution of the sequences of instructions contained in main memory MM causes processor PRO to perform the process steps described herein. One or more processors in a multi-processing arrangement may also be employed to execute the sequences of instructions contained in main memory MM. In an alternative embodiment, hard-wired circuitry may be used in place of or in combination with software instructions. Thus, the description herein is not limited to any specific combination of hardware circuitry and software.

[0151] The term “computer-readable medium” as used herein refers to any medium that participates in providing instructions to processor PRO for execution. Such a medium may take many forms, including but not limited to, non-volatile media, volatile media, and transmission media. Non-volatile media include, for example, optical or magnetic disks, such as storage device SD. Volatile media include dynamic memory, such as main memory MM. Transmission media include coaxial cables, copper wire and fiber optics, including the wires that comprise bus BS. Transmission media can also take the form of acoustic or light waves, such as those generated during radio frequency (RF) and infrared (IR) data communications. Computer-readable media can be non-transitory, for example, a floppy disk, a flexible disk, hard disk, magnetic tape, any other magnetic medium, a CD-ROM, DVD, any other optical medium, punch cards, paper tape, any other physical medium with patterns of holes,a RAM, a PROM, and EPROM, a FLASH-EPROM, any other memory chip or cartridge. Non- transitory computer readable media can have instructions recorded thereon. The instructions, when executed by a computer, can implement any of the features described herein. Transitory computer- readable media can include a carrier wave or other propagating electromagnetic signal.

[0152] Various forms of computer readable media may be involved in carrying one or more sequences of one or more instructions to processor PRO for execution. For example, the instructions may initially be borne on a magnetic disk of a remote computer. The remote computer can load the instructions into its dynamic memory and send the instructions over a telephone line using a modem. A modem local to computer system CS can receive the data on the telephone line and use an infrared transmitter to convert the data to an infrared signal. An infrared detector coupled to bus BS can receive the data carried in the infrared signal and place the data on bus BS. Bus BS carries the data to main memory MM, from which processor PRO retrieves and executes the instructions. The instructions received by main memory MM may optionally be stored on storage device SD either before or after execution by processor PRO.

[0153] Computer system CS may also include a communication interface CI coupled to bus BS. Communication interface CI provides a two-way data communication coupling to a network link NDL that is connected to a local network LAN. For example, communication interface CI may be an integrated services digital network (ISDN) card or a modem to provide a data communication connection to a corresponding type of telephone line. As another example, communication interface CI may be a local area network (LAN) card to provide a data communication connection to a compatible LAN. Wireless links may also be implemented. In any such implementation, communication interface CI sends and receives electrical, electromagnetic or optical signals that carry digital data streams representing various types of information.

[0154] Network link NDL typically provides data communication through one or more networks to other data devices. For example, network link NDL may provide a connection through local network LAN to a host computer HC. This can include data communication services provided through the worldwide packet data communication network, now commonly referred to as the “Internet” INT. Local network LAN (Internet) both use electrical, electromagnetic or optical signals that carry digital data streams. The signals through the various networks and the signals on network data link NDL and through communication interface CI, which carry the digital data to and from computer system CS, are exemplary forms of carrier waves transporting the information.

[0155] Computer system CS can send messages and receive data, including program code, through the network(s), network data link NDL, and communication interface CI. In the Internet example, host computer HC might transmit a requested code for an application program through Internet INT, network data link NDL, local network LAN and communication interface CI. One such downloaded application may provide all or part of a method described herein, for example. The received code may be executed by processor PRO as it is received, and / or stored in storage device SD, or other non-volatile storage forlater execution. In this manner, computer system CS may obtain application code in the form of a carrier wave.

[0156] Embodiments of the present disclosure can further be described by the following clauses.1. A method of determining focus or dose (f / d) conditions in a lithography process, comprising: obtaining first measurement signals and second measurement signals generated by using an optical metrology sensor to measure a set of f / d marks that are processed in the lithography process; determining modeled values of stack parameters of the set of f / d marks based on the first measurement signals and a sensor model, wherein the sensor model is configured to simulate an interaction between a measurement sensor and a f / d mark; and determining an f / d value in the lithography process based on applying the sensor model utilizing the second measurement signals and the modeled values of the stack parameters.2. The method of clause 1, wherein the modeled values of the stack parameters of the set of f / d marks are determined with a stack model flow based on stack parameters of the set of f / d marks, scanner settings, the first measurement signals, and the second measurement signals, wherein the stack model flow includes the sensor model.3. The method of clause 2, wherein the stack model flow further includes a regression process performed on the first and second measurement signals.4. The method of clause 3, wherein the regression process uses constraints as determined by using a lithography process model.5. The method of clause 1, wherein the first measurement signals indicate a normalized total intensity diffracted from the set of f / d marks.6. The method of clause 5, wherein the first measurement signals include positive order signal intensities of diffracted light from the set of f / d marks.7. The method of clause 6, wherein the first measurement signals include negative order signal intensities of diffracted light from the set of f / d marks.8. The method of clause 1, wherein the second measurement signals represent a differential signal between two or more f / d marks.9. The method of clause 8, wherein the differential signal is between positive order signal intensities of the two or more f / d marks.10. The method of clause 8, wherein the differential signal is between negative order signal intensities of the two or more f / d marks.11. The method of clause 8, wherein the differential signal is between positive order signal intensities and negative order intensities of the two or more f / d marks.12. The method of clause 1, wherein the sensor model is configured to simulate the interaction between the optical sensor and the marks during the measurement process and generate sensor response signals given the values of stack parameters of the set of f / d marks, as well as a measurement recipe of the sensor and sensor hardware conditions, wherein the sensor responsesignals include the first measurement signals, the second measurement signals, or third measurement signals.13. The method of clause 1, wherein a stack of the set of f / d marks includes atop resist layer pattern and a plurality of underlayers.14. The method of clause 13, wherein the top resist layer pattern includes a grating.15. The method of clause 13, wherein the set of f / d marks comprises a difference in the top resist layer pattern between at least two of the set of f / d marks.16. The method of clause 15, wherein the difference includes segmentation pitch, segmentation CD, main pitch, main CD.17. The method of clause 1, wherein the optical metrology sensor a scatterometer.18. The method of clause 17, wherein the scatterometer includes an optical camera.19. The method of clause 1, further comprising obtaining a symmetric characteristic of the set of f / d marks based on the first measurement signals and modelling the symmetric characteristic as a symmetric parameter. 0. The method of clause 19, wherein the modelled values of the stack parameters are symmetric parameters that include one or more of stack thickness, stack material refractive index, stack material extinction coefficient, pitch, critical dimension, or sidewall angle. 1. The method of clause 1, further comprising obtaining an asymmetric characteristic of top gratings of the set of f / d marks based on third measurement signals and modelling the asymmetric characteristic as an asymmetric parameter. 2. The method of clause 21, wherein the modelled values of the stack parameters are asymmetric parameters that include one or more of floor tilt, change in sidewall angle (dSWA), or non- uniform etch depth. 3. The method of clause 1, wherein the first measurement signals include diffraction efficiency percentages. 4. The method of clause 23, further comprising determining the modeled values of the stack parameters of the set of f / d marks by the sensor model simulating the first measurement signals based on stack geometry. 5. The method of clause 24, further comprising determining the stack geometry with a lithography model utilizing a reticle pattern geometry and scanner settings. 6. The method of clause 24, further comprising determining the modeled values of the stack parameters by performing regression of the stack parameters utilizing the first measurement signals and the simulated first measurement signals. 7. The method of clause 24, further comprising selectively feeding given stack parameters into a stack model flow based on a sensitivity of the first measurement signals to the given stack parameters.28. The method of clause 27, wherein when the first measurement signals are sensitive to the given stack parameters, the given stack parameters are fed into the sensor model as seed values and regressed by the sensor model.29. The method of clause 27, wherein when the first measurement signals are not sensitive to the given stack parameters, the given stack parameters are fixed in the sensor model.30. The method of clause 1, further comprising determining, with the stack model flow, the f / d value in the lithography process utilizing calibration curves based on the modeled calibration values of the stack parameters and the second measurement signals.31. The method of clause 30, further comprising identifying a correlation between the f / d values and second measurement signals that is specific to the modeled stack parameters, wherein the correlation is predetermined based on calibration results.32. The method of clause 30, further comprising interpolating the f / d value utilizing one or more calibration curves, the second measurement signals, and the modeled values of the stack parameters.33. The method of clause 32, further comprising performing a plurality of interpolations of to obtain a plurality of f / d values utilizing a plurality of calibration curves corresponding to a plurality of measurements of the second measurement signals and the modeled values of the stack parameters.34. The method of clause 33, further comprising updating the calibration curve(s) from utilizing calibration stack parameters to the modeled values of stack parameters.35. The method of clause 33, further comprising updating the second measurement signals to second calibration signals.36. The method of clause 33, further comprising averaging the plurality of f / d values to obtain the f / d value.37. The method of clause 30, the determining the f / d values comprising: inputting the second measurement signals into a machine -learning model configured to generate the f / d value; and generating, with the machine -learning model, the f / d value in the lithography process.38. The method of clause 30, further comprising determining a first consistency between the modeled values of the stack parameters and calibration stack parameters determined in a calibration phase.39. The method of clause 30, further comprising determining a second consistency between the first measurement signals and first calibration signals determined in a calibration phase.40. The method of clause 1, further comprising applying the sensor model utilizing simulated third measurement signals and values of asymmetric stack parameters to determine a dominant asymmetry of the f / d mark.41. The method of clause 40, wherein the asymmetric stack parameters include a representation of one or more dominant asymmetries in the set of f / d marks, a dominant asymmetry being one of asubset of asymmetries in the f / d marks that are independent from each other and has a largest contribution to the simulated third measurement signals.42. The method of clause 41, further comprising determining a third consistency between the dominant asymmetry and a dominant calibration asymmetry determined in a calibration phase.43. The method of clause 1, further comprising: obtaining first calibration signals and second calibration signals by using the optical metrology sensor to measure a set of calibration f / d marks; determining, modeled calibration values of calibration stack parameters and utilizing the first calibration signals and initial values of the calibration stack parameters; determining a relationship between a calibration f / d value in the lithography process and the second calibration signals; and grouping the calibration stack parameters of the set of calibration f / d marks according to signal sensitivities to the calibration stack parameters.44. The method of clause 43, further comprising determining the signal sensitivities by calculating ratios of the first calibration signals and the second calibration signals change to a calibration stack parameter change.45. The method of clause 44, wherein the signal sensitivities are further determined by measuring a plurality of calibration f / d marks.46. The method of clause 43, further comprising determining the modeled calibration values of the calibration stack parameters of the set of calibration f / d marks utilizing the sensor model simulating the first calibration signals based on a calibration stack geometry.47. The method of clause 46, further comprising determining the calibration stack geometry with a lithography model utilizing a reticle pattern geometry and scanner settings.48. The method of clause 46, further comprising determining the modeled calibration values of the calibration stack parameters by performing regression of the calibration stack parameters utilizing the first calibration signals and the simulated first calibration signals.49. The method of clause 48, wherein the regression of the calibration stack parameters minimizes a difference between the first calibration signals and the simulated first calibration signals.50. The method of clause 49, further comprising refining the calibration stack parameters for at least some of the set of calibration f / d marks to approximate a top layer resist geometry derived from known calibration f / d values.51. The method of clause 43, further comprising determining given calibration stack parameters to selectively feed to the sensor model based on the sensitivity of the first calibration signals to the given calibration stack parameters.52. The method of clause 51, further comprising, when the first calibration signals are sensitive to given calibration stack parameters, the given calibration stack parameters will be fed into the sensor model as seed values and regressed by the sensor model.53. The method of clause 51, further comprising, when the first calibration signals are not sensitive to given calibration stack parameters, the given calibration stack parameters will be fixed in the sensor model54. The method of clause 46, further comprising: receiving, at a second tuning module, the calibration stack parameters along with a simulated second calibration signal and the second calibration signal; and generating, with the second tuning module, fine-tuned stack parameters.55. The method of clause 46, further comprising identifying a correlation between the calibration f / d values and second calibration signals that is specific to the modeled calibration values of the calibration stack parameters.56. The method of clause 46, further comprising: inputting the second calibration signals into a machine-learning model, the machine-learning model configured to generate the calibration f / d value; and generating, with the machine -learning model, the calibration f / d value in the lithography process.57. The method of clause 54, further comprising: updating a top layer thickness or top layer CD of at least one of the set of calibration f / d marks utilizing the calibration f / d values and a lithography model; updating the calibration stack parameters based on an updated top layer thickness or a top layer CD to improve determination of the calibration stack parameters with the first calibration signals; and re-determining the modeled calibration values of the calibration stack parameters based on reapplying a first tuning module with the first calibration signals and the updated calibration stack parameters.58. The method of clause 43, further comprising applying the sensor model utilizing third calibration signals and values of asymmetric calibration stack parameters to determine a dominant calibration asymmetry of the set of calibration f / d marks.59. The method of clause 43, wherein the calibration stack parameters include a representation of one or more dominant asymmetries in the set of calibration f / d marks, a dominant calibration asymmetry being one of a subset of asymmetries in the calibration f / d marks that are independent from each other and has a largest contribution to the third calibration signals.60. The method of clause 54, further comprising: updating a top layer shape of at least one of the set of calibration f / d marks utilizing the calibration f / d value; updating the calibration stack parameters based on the updated top layer shape to improve determination of the calibration stack parameters with simulated third calibration signals; andre-determining the modeled calibration values of the calibration stack parameters based on reapplying second tuning model utilizing the third calibration signals and the updated values of the calibration stack parameters including a dominant asymmetric stack parameter.61. A non-transitory computer readable medium having instructions recorded thereon for a lithographic process, the instructions when executed by a computer having at least one programmable processor cause operations comprising, the operations as in any of clauses 1-60.62. A system for use with a lithographic process, the system comprising: at least one programmable processor; and a non-transitory computer readable medium having instructions recorded thereon, the instructions when executed by a computer having the at least one programmable processor cause operations as in any of clauses 1-60.63. The system of clause 62, wherein an optical metrology sensor is a diffraction-based sensor.64. The system of clause 62, wherein a second sensor is an optical camera or a scatterometer.65. A semiconductor device manufacturing method comprising: receiving a substrate with a photoresist layer; directing (EUV / DUV) radiation from radiation source to transfer a pattern from a mask onto the photoresist layer; removing a portion of the photoresist layer to form the pattern over the substrate; and performing metrology on the substrate according to any one of the preceding clauses.

[0157] The combinations and sub-combinations of the elements disclosed herein constitute separate embodiments and are provided as examples only. Also, the descriptions above are intended to be illustrative, not limiting. Thus, it will be apparent to one skilled in the art that modifications may be made as described without departing from the scope of the claims set out below.

Claims

CLAIMS1. A non-transitory computer readable medium having instructions recorded thereon for a lithographic process, the instructions when executed by a computer having at least one programmable processor cause operations comprising: obtaining first measurement signals and second measurement signals generated by using an optical metrology sensor to measure a set of focus or dose (f / d) marks that are processed in the lithography process; determining modeled values of stack parameters of the set of f / d marks based on the first measurement signals and a sensor model, wherein the sensor model is configured to simulate an interaction between a measurement sensor and a f / d mark; and determining an f / d value in the lithography process based on applying the sensor model utilizing the second measurement signals and the modeled values of the stack parameters.

2. The method of claim 1, wherein the modeled values of the stack parameters of the set of f / d marks are determined with a stack model flow based on stack parameters of the set of f / d marks, scanner settings, the first measurement signals, and the second measurement signals, wherein the stack model flow includes the sensor model, wherein the sensor model is configured to simulate the interaction between the optical sensor and the marks during the measurement process and generate sensor response signals given the values of stack parameters of the set of f / d marks, as well as a measurement recipe of the sensor and sensor hardware conditions, wherein the sensor response signals include the first measurement signals and the second measurement signals.

3. The method of claim 1, wherein the first measurement signals indicate a total intensity diffracted from the set of f / d marks, and wherein the second measurement signals represent a differential signal between two or more f / d marks.

4. The method of claim 1, wherein a stack of the set of f / d marks includes a top resist layer pattern and a plurality of underlayers, wherein the set of f / d marks comprises a difference in the top resist layer pattern between at least two of the set of f / d marks.

5. The method of claim 1, further comprising obtaining a symmetric characteristic of the set of f / d marks based on the first measurement signals and modelling the symmetric characteristic as a symmetric parameter, wherein the symmetric parameters comprise one or more of stack thickness, stack material refractive index, stack material extinction coefficient, pitch, critical dimension, or sidewall angle.

6. The method of claim 1, further comprising obtaining an asymmetric characteristic of top gratings of the set of f / d marks based on third measurement signals and modelling the asymmetric characteristic as an asymmetric parameter, and wherein the modelled values of the stack parameters are asymmetric parameters that include one or more of floor tilt, change in sidewall angle (dSWA), or non-uniform etch depth.

7. The method of claim 1, further comprising determining the modeled values of the stack parameters of the set of f / d marks by the sensor model simulating the first measurement signals based on stack geometry, and performing regression of the stack parameters utilizing the first measurement signals and the simulated first measurement signals.

8. The method of claim 1, further comprising selectively feeding given stack parameters into a stack model flow based on a sensitivity of the first measurement signals to the given stack parameters.

9. The method of claim 1, further comprising determining, with the stack model flow, the f / d value in the lithography process utilizing calibration curves based on the modeled calibration values of the stack parameters and the second measurement signals, and further comprising identifying a correlation between the f / d values and second measurement signals that is specific to the modeled stack parameters, wherein the correlation is predetermined based on calibration results.

10. The method of claim 1, further comprising performing a plurality of interpolations to obtain a plurality of f / d values utilizing a plurality of calibration curves corresponding to a plurality of measurements of the second measurement signals and the modeled values of the stack parameters.

11. The method of claim 10, further comprising updating the calibration curves from utilizing calibration stack parameters to the modeled values of stack parameters; and updating the second measurement signals to second calibration signals.

12. The method of claim 9, the determining the f / d values comprising: inputting the second measurement signals into a machine-learning model configured to generate the f / d value; and generating, with the machine -learning model, the f / d value in the lithography process.

13. The method of claim 9, further comprising determining a first consistency between the modeled values of the stack parameters and calibration stack parameters determined in a calibration phase;and determining a second consistency between the first measurement signals and first calibration signals determined in a calibration phase.

14. The method of claim 1, further comprising applying the sensor model utilizing simulated third measurement signals and values of asymmetric stack parameters to determine a dominant asymmetry of the f / d mark, wherein the asymmetric stack parameters include a representation of one or more dominant asymmetries in the set of f / d marks, a dominant asymmetry being one of a subset of asymmetries in the f / d marks that are independent from each other and has a largest contribution to the simulated third measurement signals.

15. The method of claim 14, further comprising determining a third consistency between the dominant asymmetry and a dominant calibration asymmetry determined in a calibration phase.

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