Light-emitting element, production method for same, and electronic device having light-emitting element

Abstract

This light-emitting element comprises a first protective film, a single crystal silicon film, a buffer layer, an electroluminescent layer, and a pair of electrodes. The first protective film contains aluminum nitride. The single crystal silicon film is positioned on the first protective film and contacts the first protective film. The buffer layer is positioned on the single crystal silicon film and contacts the single crystal silicon film. The electroluminescent layer is positioned on the buffer layer, contacts the buffer layer, and contains a compound semiconductor. The pair of electrodes are electrically connected to the electroluminescent layer.

Description

Light-emitting element, method for manufacturing the same, and electronic device having a light-emitting element

[0001] One embodiment of the present invention relates to a light-emitting element and a method for manufacturing the same. Alternatively, one embodiment of the present invention relates to an electronic device including the light-emitting element.

[0002] In recent years, a method for forming a single-crystal silicon film on an amorphous glass substrate has been developed. In this method, an embrittlement layer is formed by implanting ions such as hydrogen ions into the single-crystal silicon substrate, and after bonding the single-crystal silicon substrate and the amorphous glass substrate, the single-crystal silicon substrate is peeled off, thereby transferring the single-crystal silicon film on the embrittlement layer to the glass substrate (see Patent Document 1). The glass substrate on which the single-crystal silicon film obtained by this method is formed is resistant to relatively high-temperature processes, so a light-emitting diode can be formed on the glass substrate by epitaxially growing a gallium nitride-based semiconductor on this glass substrate.

[0003] Special Publication No. 2011-501431

[0004] One embodiment of the present invention aims to provide a light-emitting element having a novel structure and a method for manufacturing the same. Alternatively, one embodiment of the present invention aims to provide a light-emitting element exhibiting excellent properties and a method for manufacturing this light-emitting element with high yield. Alternatively, one embodiment of the present invention aims to provide an electronic device having the above-mentioned light-emitting element.

[0005] One embodiment of the present invention is a light-emitting element. This light-emitting element comprises a first protective film, a single-crystal silicon film, a buffer layer, an electroluminescent layer, and a pair of electrodes. The first protective film contains aluminum nitride. The single-crystal silicon film is located on and in contact with the first protective film. The buffer layer is located on and in contact with the single-crystal silicon film. The electroluminescent layer is located on and in contact with the buffer layer and contains a compound semiconductor. The pair of electrodes are electrically connected to the electroluminescent layer.

[0006] One embodiment of the present invention is an electronic device having the above-mentioned light-emitting element.

[0007] One embodiment of the present invention is a method for manufacturing a light-emitting element. This manufacturing method includes forming a protective film containing aluminum nitride on the entire surface of an amorphous glass substrate; forming an embrittlement layer within a single-crystal silicon substrate by irradiating the single-crystal silicon substrate with ions through the main surface of the single-crystal silicon substrate; joining the glass substrate and the single-crystal silicon substrate such that the main surface is in contact with the protective film; transferring a single-crystal silicon film corresponding to the portion between the main surface and the embrittlement layer onto the glass substrate by peeling the single-crystal silicon substrate from the glass substrate; forming a buffer layer on the single-crystal silicon film; forming an electroluminescent layer containing a compound semiconductor on the buffer layer; and forming a pair of electrodes electrically connected to the electroluminescent layer.

[0008] A schematic end view of a light-emitting element according to one embodiment of the present invention. A schematic end view of a light-emitting element according to one embodiment of the present invention. A schematic end view of a part of a light-emitting element according to one embodiment of the present invention. A schematic end view showing a method for manufacturing a light-emitting element according to one embodiment of the present invention. A schematic end view showing a method for manufacturing a light-emitting element according to one embodiment of the present invention. A schematic end view showing a method for manufacturing a light-emitting element according to one embodiment of the present invention. A schematic end view showing a method for manufacturing a light-emitting element according to one embodiment of the present invention. A schematic end view showing a method for manufacturing a light-emitting element according to one embodiment of the present invention. A schematic end view showing a method for manufacturing a light-emitting element according to one embodiment of the present invention. A schematic top view showing a method for manufacturing a light-emitting element according to one embodiment of the present invention. A schematic end view showing a method for manufacturing a light-emitting element according to one embodiment of the present invention. A schematic end view showing a method for manufacturing a light-emitting element according to one embodiment of the present invention. A schematic end view showing a method for manufacturing a light-emitting element according to one embodiment of the present invention. A schematic end view showing a method for manufacturing a light-emitting element according to one embodiment of the present invention. A schematic end view showing a method for manufacturing a light-emitting element according to one embodiment of the present invention. A schematic end view showing a method for manufacturing a light-emitting element according to one embodiment of the present invention. A schematic end view showing a method for manufacturing a light-emitting element according to one embodiment of the present invention. A schematic end view showing a method for manufacturing a light-emitting element according to one embodiment of the present invention. A schematic end view showing a method for manufacturing a light-emitting element according to one embodiment of the present invention. A schematic top view of an electronic device according to one embodiment of the present invention. Equivalent circuit diagram of a pixel in an electronic device according to one embodiment of the present invention. A schematic end view showing a method for manufacturing an electronic device according to one embodiment of the present invention. A schematic end view showing a method for manufacturing an electronic device according to one embodiment of the present invention. A schematic end view showing a method for manufacturing an electronic device according to one embodiment of the present invention. A schematic end view showing a method for manufacturing an electronic device according to one embodiment of the present invention. A schematic end view showing a method for manufacturing an electronic device according to one embodiment of the present invention. A schematic end view showing a method for manufacturing an electronic device according to one embodiment of the present invention.

[0009] The embodiments of the present invention will be described below with reference to the drawings and other materials. However, the present invention can be implemented in various forms without departing from its spirit, and is not to be interpreted as being limited to the embodiments described below.

[0010] While drawings may schematically represent the width, thickness, shape, etc., of each part compared to the actual embodiment in order to clarify the explanation, these are merely examples and do not limit the interpretation of the present invention. In this specification and each figure, elements having the same function as those described in previously shown figures are denoted by the same reference numeral, and redundant explanations may be omitted. This reference numeral is used to represent multiple identical or similar structures collectively, and when representing them individually, a hyphen and a natural number are added after the reference numeral.

[0011] In this specification and claims, when describing a manner in which one structure is placed on top of another structure, unless otherwise specified, the term "on top of" includes both cases: when one structure is placed directly on top of another structure so as to be in contact with it, and when another structure is placed above another structure via yet another structure.

[0012] In this specification and claims, the expression "a structure is exposed from another structure" means a portion of a structure that is not covered by another structure, and this portion that is not covered by another structure may also be covered by yet another structure. Furthermore, the expression also includes a portion of a structure that is not in contact with another structure.

[0013] In this invention, when a single film is processed to form multiple films, these multiple films may have different functions and roles. However, these multiple films originate from a film formed as the same layer in the same process, and have substantially the same layer structure, the same material, and the same morphology. Therefore, these multiple films are defined as existing in the same layer.

[0014] The following describes a light-emitting element according to one embodiment of the present invention, a method for manufacturing the light-emitting element, and an electronic device on which the light-emitting element is mounted.

[0015] 1. Configuration of the light-emitting element Figure 1 shows a schematic end view of a light-emitting element 100 according to one embodiment of the present invention. The light-emitting element 100 is a so-called inorganic light-emitting element (LED) and includes a single-crystal silicon film 130, an electroluminescent layer 150 provided on the single-crystal silicon film 130, and a pair of electrodes 158 and 160 electrically connected to the electroluminescent layer 150. The electroluminescent layer 150 is composed of a plurality of functional layers including a compound semiconductor, and in the example shown in Figure 1, the electroluminescent layer 150 includes, in order from the single-crystal silicon film 130 side, an electron injection layer 152, an emissive layer 154, and a hole injection layer 156 as functional layers. Although not shown, a hole transport layer may be provided between the hole injection layer 156 and the emissive layer 154, and an electron transport layer may be provided between the electron injection layer 152 and the emissive layer 154. The light-emitting element 100 further comprises a buffer layer 140 located between the single-crystal silicon film 130 and the electroluminescent layer 150, and a first protective film 120 beneath the single-crystal silicon film 130. The light-emitting element 100 may further comprise an amorphous glass substrate 110 beneath the first protective film 120. If the light-emitting element 100 has a glass substrate 110, the light-emitting element 100 may further comprise a second protective film 122 beneath the glass substrate 110 (Figure 2). The light-emitting element 100 may further comprise a passivation film 170 covering at least a portion of the electroluminescent layer 150. These configurations will be described in detail below.

[0016] (1) Glass Substrate The glass substrate 110 is an amorphous morphological substrate, and can be used such as an alkaline earth aluminoborosilicate glass substrate containing silicon oxide, alumina, and alkaline earth metal oxides, a borosilicate glass substrate containing silicon oxide, sodium oxide, alumina, and boron oxide, a lead glass substrate containing silicon oxide, potassium oxide, and lead oxide, or a glass substrate containing silicon oxide, alumina, lithium oxide, titanium oxide, and zirconium oxide. Preferably, the coefficient of thermal expansion is 3.5 × 10 －６ K －１ The above 4.0 x 10 －６ K －１The following glass substrates are used. There are no restrictions on the size of the glass substrate 110; for example, a small substrate of about 120 mm x 120 mm may be used, or a glass substrate of 600 mm x 720 mm size, known as third-generation glass, 730 mm x 920 mm size, known as fourth-generation glass, 1500 mm x 1850 mm size, or larger size may be used.

[0017] In the example shown in Figure 1, one electroluminescent layer 150 is provided on one glass substrate 110, but there is no restriction on the number of electroluminescent layers 150 provided on one glass substrate 110. Therefore, multiple electroluminescent layers 150 arranged in an island-like manner, and multiple pairs of electrodes 158, 160 connected to each of the multiple electroluminescent layers 150, may be provided on one glass substrate 110. In this case, in addition to the glass substrate 110, the buffer layer 140, the single-crystal silicon film 130, the first protective film 120, and the second protective film 122 can be provided across adjacent electroluminescent layers 150.

[0018] (2) The first protective film and the second protective film The first protective film 120 and the second protective film 122 are both films containing or made of aluminum nitride, and their thickness is, for example, 16 nm or more and 110 nm or less. When the glass substrate 110 is included in the light-emitting element 100, the first protective film 120 and the second protective film 122 are provided so as to be in contact with the upper and lower surfaces of the glass substrate 110, respectively. Although not shown in Figures 1 and 2, as will be described later, the first protective film 120 and the second protective film 122 may be integrated and cover the entire surface of the glass substrate 110 (i.e., the upper surface, lower surface, and all sides) as a single film (protective film 124).

[0019] (3) Single-crystal silicon film The single-crystal silicon film 130 is provided on the first protective film 120 so as to be in contact with the first protective film 120. The upper surface of the single-crystal silicon film 130 is composed of the (111) crystal plane of the single-crystal silicon. The thickness of the single-crystal silicon film 130 is relatively small, for example, 3 nm to 100 nm, and may be 5 nm to 80 nm, 10 nm to 50 nm, or 20 nm to 40 nm. The thermal expansion coefficients of the single-crystal silicon film 130 and the buffer layer 140 and the electroluminescent layer 150 provided thereon are different from each other. The manufacturing of the light-emitting element 100 will be described later, but the difference in thermal expansion coefficients will cause stress between these components due to temperature changes during the manufacturing of the light-emitting element 100. However, by forming a very thin single-crystal silicon film 130, the generation of large stresses can be suppressed, and as a result, problems such as delamination and cracking between these components can be suppressed.

[0020] (4) Buffer layer The buffer layer 140 is located on the single-crystal silicon film 130 and is provided in contact with the single-crystal silicon film 130. The buffer layer 140 contributes to promoting the crystallization of the electroluminescent layer 150 provided thereon and improves the adhesion between the electroluminescent layer 150 and the single-crystal silicon film 130. This prevents deformation (warping) of the glass substrate 110 under the manufacturing conditions of the light-emitting element 100 and effectively suppresses peeling of the electroluminescent layer 150 and the occurrence of cracks and crystal defects in the electroluminescent layer 150.

[0021] Specifically, the buffer layer 140 may include an insulating material and / or a conductive material having a hexagonal close-packed structure, a face-centered cubic structure, or a structure similar thereto. Here, a hexagonal close-packed structure or a structure similar to a face-centered cubic structure includes a crystal structure in which the c axis is not orthogonal to the a axis and b axis. Therefore, in this structure, the buffer layer 140 is oriented such that its c axis is parallel to the normal of the single-crystal silicon substrate 132. Furthermore, the buffer layer 140 having a face-centered cubic structure or a structure similar thereto is formed such that its upper surface is a crystal plane oriented in the (0001) direction. As described above, the upper surface of the single-crystal silicon film 130 is composed of the (111) crystal plane of the single-crystal silicon. Therefore, due to the similarity of the crystal lattices of the buffer layer 140 and the single-crystal silicon film 130, the crystallinity of the buffer layer 140 can also be improved. Furthermore, the compound semiconductors contained in each functional layer of the electroluminescent layer 150, such as gallium nitride-based semiconductors, adopt a wurtzite-type structure and undergo crystal growth in the c-axis direction to minimize their surface energy. Therefore, by forming functional layers containing compound semiconductors on the buffer layer 140 with improved crystallinity, crystal growth in the c-axis direction of the functional layers is further promoted, resulting in the electroluminescent layer 150 exhibiting extremely high crystallinity and having few crystal defects. As a result, the characteristics of the light-emitting element 100 (luminous efficiency and reliability) can be further improved.

[0022] Such a buffer layer 140 can contain metal nitrides such as indium aluminum nitride, aluminum nitride, aluminum oxynitride, and gallium nitride, or metal oxides such as aluminum oxide. By using such materials, an insulating buffer layer 140 can be formed. In particular, by using aluminum nitride or indium aluminum nitride, the lattice constant shift between the buffer layer 140 and the functional layer in contact can be reduced, thereby promoting a more effective c-axis orientation of the functional layer. Alternatively, the buffer layer 140 may contain metals such as titanium, aluminum, silver, nickel, copper, strontium, rhodium, palladium, iridium, platinum, and gold.

[0023] To more effectively grow the functional layer in the c-axis direction, the buffer layer 140 preferably has high surface flatness. Specifically, the arithmetic mean roughness (Ra) of the surface of the buffer layer 140 is preferably less than 2.3 nm. Also, the root mean square roughness (Rq) of the surface of the buffer layer 140 is preferably less than 2.9 nm. To obtain high surface flatness, the thickness of the buffer layer 140 is preferably 110 nm or less, for example, the buffer layer 140 is formed with a thickness of 16 nm or more and 110 nm or less.

[0024] The buffer layer 140 may have a single-layer structure or a laminated structure. Preferably, as shown in Figure 3, the buffer layer 140 is composed of a first buffer layer 142 containing or made of aluminum, and a second buffer layer 144 provided on the first buffer layer 142, in contact with the first buffer layer 142, and containing or made of aluminum nitride. The thickness of the first buffer layer 142 is, for example, 1 nm to 10 nm. The second buffer layer 144 is thicker than the first buffer layer 142, and its thickness is, for example, 15 nm to 100 nm. By adopting such a laminated structure, the aluminum in the first buffer layer 142 combines with oxygen on the glass surface to form stable aluminum oxide. The formation of aluminum oxide reduces the formation of aluminum oxynitride by oxygen diffusing from the glass substrate 110 when the second buffer layer 144 is formed.

[0025] (5) Electroluminescent layer Examples of compound semiconductors included in the functional layer constituting the electroluminescent layer 150 include compound semiconductors containing aluminum, gallium, and / or indium, as well as nitrogen, phosphorus, and / or arsenic. Typically, gallium-based materials are used. Examples include gallium nitride-based materials such as gallium nitride (GaN), aluminum gallium nitride (AlGaN), and indium gallium nitride (InGaN), and gallium phosphide-based materials such as gallium phosphide (GaP) and aluminum indium gallium phosphide (AlGaInP). Each functional layer may further contain dopants. Examples of dopants include elements such as silicon, germanium, magnesium, zinc, cadmium, and beryllium. By adding these elements, it becomes possible to control the valence electrons of each functional layer, enabling control of the band gap and the imparting of p-type or n-type conductivity.

[0026] In the electron injection layer 152, a compound semiconductor with n-type conductivity is used, and in the hole injection layer 156, a compound semiconductor with p-type conductivity is used. For example, the electron injection layer 152 and the hole injection layer 156 can be configured to contain n-type gallium nitride or n-type aluminum gallium nitride, and p-type aluminum gallium nitride or p-type gallium nitride, respectively. Each functional layer constituting the electroluminescent layer 150 may have a single-layer structure or a stacked structure in which multiple layers are stacked.

[0027] The light-emitting layer 154 is configured to emit red light, green light, or blue light. Here, red light, green light, and blue light are lights that respectively exhibit one or more emission peak wavelengths in the range of 630 nm or more and 760 nm or less, the range of 500 nm or more and 620 nm or less, and the range of 400 nm or more and 480 nm or less. The light-emitting layer 154 may have a single-layer structure or may have a multi-quantum well structure. The multi-quantum well structure is a structure in which a plurality of thin films having different band gaps and a thickness of about 2 nm to 12 nm are alternately stacked. That is, in the multi-quantum well structure, a plurality of high band gap layers and low band gap layers are alternately stacked. Preferably, high band gap layers are provided in the uppermost layer and the lowermost layer. Examples of the multi-quantum well structure include an alternating laminate of indium gallium nitride and gallium nitride, an alternating laminate of indium gallium arsenide phosphide (GaInAsP) and indium phosphide (InP), and an alternating laminate of aluminum indium arsenide (AlInAs) and indium gallium arsenide (InGaAs). In the case of an alternating laminate of indium gallium nitride and gallium nitride, the preferable composition of indium is 35% by mass or less.

[0028] The size of the electroluminescent layer 150, that is, the area of the electroluminescent layer 150 on a plane parallel to the upper surface of the single crystal silicon film 130 can also be arbitrarily set. The preferable area of the electroluminescent layer 150 is, for example, 2×10 ２ μm ２ or more and 2×10 ５ μm ２ or less, or 1×10 ３ μm ２ or more and 2×10 ５ μm ２ or less.

[0029] (6) Pair of electrodes One of the pair of electrodes (here, electrode 158) functions as the anode and is provided on the hole injection layer 156 in contact with the hole injection layer 156. Therefore, electrode 158 can be provided so as to overlap all the functional layers. On the other hand, the other of the pair of electrodes (here, electrode 160) functions as the cathode and is provided on the electron injection layer 152, which is exposed from the other functional layers, in contact with the electron injection layer 152. By forming a potential difference between the pair of electrodes 158 and 160, holes and electrons are injected from electrodes 158 and 160, respectively, and recombine in the light-emitting layer 154. The energy generated by the recombination can be obtained as light emission.

[0030] The pair of electrodes 158 and 160 can be made of a translucent conductive oxide such as indium-tin oxide (ITO) or indium-zinc oxide (IZO), or a thin film of a metal such as palladium, gold, silver, indium, aluminum, or titanium, or an alloy thereof. The light-emitting element 100 is configured so that the light obtained in the light-emitting layer 154 is extracted from the electrode 158 side. For this reason, it is preferable to use a translucent conductive oxide or a thin film of a metal or alloy having a thickness that allows visible light to pass through for the electrode 158. For example, the electrode 158 may be a laminate of a film containing a translucent conductive oxide and a film containing a metal such as gold that covers a part of this film.

[0031] (7) Passivation film The passivation film 170 is a film that prevents impurities such as water and oxygen from entering the electroluminescent layer 150, and is composed of one or more films containing silicon-containing inorganic compounds such as silicon nitride or silicon oxide. The passivation film 170 is provided with openings that expose a pair of electrodes 158 and 160, and a potential is supplied to the pair of electrodes 158 and 160 through these openings. As shown in Figures 1 and 2, the passivation film 170 may cover the sides of the electroluminescent layer 150 or the upper surface of the electron injection layer 152.

[0032] 2. Method for Manufacturing a Light-Emitting Device The method for manufacturing a light-emitting device 100 having the above-described configuration will be described below. In manufacturing the light-emitting device 100, a technique called smart cut is applied, and a part of the single-crystal silicon substrate is transferred onto the glass substrate 110 as a single-crystal silicon film 130 through bonding and peeling of the glass substrate 110 and the single-crystal silicon substrate.

[0033] (1) Formation of the semiconductor film First, the glass substrate 110 is cleaned as appropriate, and then a protective film 124 containing or made of aluminum nitride is formed on the surface of the glass substrate 110 (Figure 4). The protective film 124 may be formed using chemical vapor deposition (CVD) or sputtering as appropriate. Here, as shown in Figure 4, the protective film 124 is formed to cover not only the top and bottom surfaces of the glass substrate 110, but also the sides. That is, the protective film 124 is provided to cover the entire surface of the glass substrate 110. Therefore, the protective film 124 is formed as a film in which the first protective film 120 and the second protective film 122 (see Figure 2) are integrated. The glass substrate 110 may have a uniform thickness throughout its main surface, but as shown in Figure 5, the thickness of the outer periphery may be smaller than the thickness of the center. In this case, the upper and lower surfaces of the glass substrate 110 have inclinations, and an outer peripheral portion is provided that continuously decreases in thickness as it approaches the outer edge, surrounding the flat portion including the center (or center of gravity) of the glass substrate 110. By providing inclinations, the protective film 124 can be reliably formed on the side surfaces perpendicular to the upper and lower surfaces of the glass substrate 110.

[0034] As an optional step, the protective film 124 provided on the surface side to be bonded to the single-crystal silicon substrate may be pretreated. The pretreatment is performed by irradiating the protective film 124 with ions (for example, argon ions, helium ions, etc.). By performing the pretreatment, the surface of the protective film 124 is activated and aluminum dangling bonds are generated, so that Al-Si bonds are easily formed when bonding with the single-crystal silicon substrate. As a result, the glass substrate 110 and the single-crystal silicon substrate can be bonded more strongly.

[0035] As the single-crystalline silicon substrate bonded to the glass substrate 110, a (111) single-crystalline silicon substrate whose upper surface is the (111) plane of the silicon single crystal is used. The shape of the single-crystalline silicon substrate is not limited to a rectangle, and it may be a circle (including a circle with a part of the outer circumference cut off). Prior to bonding with the glass substrate 110, after appropriately cleaning the single-crystalline silicon substrate 132, as shown in FIG. 6, ion implantation is performed from one main surface 132a side of the single-crystalline silicon substrate 132. Examples of the ions include hydrogen ions, and helium ions or argon ions may be further implanted. In ion implantation, a single type of ion obtained by mass separation may be implanted, or multiple types of ions may be implanted simultaneously without performing mass separation.

[0036] By ion implantation, a layer containing minute voids is formed inside the single-crystalline silicon substrate 132. This layer is called a brittle layer 134 and is formed inside the single-crystalline silicon substrate 132 substantially parallel to the main surface 132a (FIG. 7). The portion between the brittle layer 134 and the main surface 132a corresponds to the single-crystalline silicon film 130. The depth of the brittle layer 134 (distance from the main surface 132a) can be adjusted by appropriately controlling the acceleration voltage of the ions. The depth of the brittle layer 134 may be appropriately set according to the thickness of the single-crystalline silicon film 130. For example, it is set to 40 nm or more and 100 nm or less. The ion dose amount is, for example, 3×10 １６ ions / cm ２ or more and 1×10 １７ ions / cm ２ or less.

[0037] As an optional step, an aluminum nitride-containing film 136 containing or made of aluminum nitride may be formed on the main surface 132a to be ion-implanted (Figure 8). The aluminum nitride-containing film 136 may be formed before or after ion implantation. The thickness of the aluminum nitride-containing film 136 is, for example, 16 nm to 110 nm. The aluminum nitride-containing film is provided such that its (0002) crystal plane constitutes the upper surface. The aluminum nitride-containing film 136 may be further irradiated with argon ions to activate its surface. Surface activation generates aluminum dangling bonds, so Al-N bonds are easily formed between it and the protective film 124. As a result, the glass substrate 110 and the single-crystal silicon substrate can be bonded more firmly.

[0038] Subsequently, the glass substrate 110 and the single-crystal silicon substrate 132 are joined (Figure 9). The joining is performed so that the ion-implanted main surface 132a of the single-crystal silicon substrate 132 is in contact with the protective film 124 on the glass substrate 110. That is, the joining is performed so that the portion corresponding to the single-crystal silicon film 130 is sandwiched between the glass substrate 110 and the single-crystal silicon substrate 132. Although not shown, if an aluminum nitride-containing film 136 is formed on the single-crystal silicon substrate 132, the joining is performed so that the portion corresponding to the single-crystal silicon film 130 and the aluminum nitride-containing film 136 are sandwiched between the single-crystal silicon substrate 132 and the glass substrate 110. Therefore, in this case, the light-emitting element 100 will have two films containing aluminum nitride (i.e., the first protective film 120, which is part of the protective film 124, and the aluminum nitride-containing film 136) beneath the single-crystal silicon film 130. When using a glass substrate 110 with inclinations on the upper and lower surfaces of the outer periphery, the single-crystal silicon substrate 132 is joined to the flat portion without inclinations (see Figure 10). This allows all light-emitting elements 100 to be formed on the same plane.

[0039] There is no restriction on the number of single-crystalline silicon substrates 132 joined to one glass substrate 110. Depending on the relationship between the sizes of the glass substrate 110 and the single-crystalline silicon substrate 132 and the arrangement of the light-emitting elements 100, a plurality of single-crystalline silicon substrates 132 may be joined to one glass substrate 110 (see FIGS. 9 to 11). For example, as shown in FIG. 11, the single-crystalline silicon substrates 132 may be arranged in a matrix. Adjacent single-crystalline silicon substrates 132 may be in contact with each other or may be separated from each other.

[0040] At the time of joining, appropriate pressure treatment and heat treatment may be performed on the glass substrate 110 and the single-crystalline silicon substrate 132. The pressure in the pressure treatment is appropriately selected within the range of 7 Pa or more and 35 Pa or less. The heat treatment is performed at a temperature below the strain point of the glass substrate 110, and for example, the heat treatment is performed at a temperature selected from the range of 50°C or more and 200°C or less.

[0041] In the joining, anodic bonding may be further utilized. Specifically, as shown in FIG. 12, electrodes 180 and 182 are connected to the single-crystalline silicon substrate 132 and the glass substrate 110, respectively, and a voltage is applied between the electrodes 180 and 182. At this time, the voltage is applied so that the electrodes 180 and 182 function as the positive electrode and the negative electrode, respectively. The voltage is, for example, 30 V or more and 1000 V or less. At this time, heat may be applied simultaneously. By performing anodic bonding, a strong electrostatic attraction acts between the glass substrate 110 and the single-crystalline silicon substrate 132, and as a result, the glass substrate 110 and the single-crystalline silicon substrate 132 can be joined more firmly.

[0042] Thereafter, the single-crystalline silicon substrate 132 is peeled off from the glass substrate 110. The peeling may be performed physically. As a result, the portion between the embrittlement layer 134 and the main surface 132a is peeled off with the embrittlement layer 134 as the cleavage plane, and as a result, a single-crystalline silicon film 130 having a single-crystalline morphology is transferred onto the glass substrate 110 (FIG. 13).

[0043] In this process, the embrittlement layer 134 is used as the cleavage plane. Therefore, the ion-implanted main surface 132a is located on the glass substrate 110 side, and the upper surface of the single-crystal silicon film 130 (the side opposite to the glass substrate 110) is on the embrittlement layer 134 side. Because voids are generated in the single-crystal silicon substrate 132 by ion implantation, the crystallinity of the embrittlement layer 134 decreases, and as a result, a part of the upper surface of the single-crystal silicon film 130 may have a polycrystalline or amorphous morphology. For this reason, the single-crystal silicon film 130 is subjected to a cleaning treatment to remove the polycrystalline or amorphous silicon present on the upper surface and form a single-crystal surface. In this cleaning treatment, a chemical solution containing hydrofluoric acid, which dissolves silicon, is used. This cleaning treatment realizes a single-crystal morphology throughout the entire single-crystal silicon film 130. In this cleaning process, a chemical solution containing hydrofluoric acid, which dissolves glass, is used. However, as described above, a protective film 124 that is inert to hydrofluoric acid is formed over the entire surface of the glass substrate 110. Therefore, it is possible to prevent the dissolution of the glass substrate 110, as well as deformation, defects, and delamination between the glass substrate 110 and the single-crystal silicon film 130 that result from the dissolution of the glass substrate 110.

[0044] Through the above steps, a single-crystal silicon film 130 having a (111) crystal plane can be formed on the glass substrate 110 on which the protective film 124 is provided.

[0045] (2) Formation of the electroluminescent layer, electrodes, and passivation film Thereafter, a buffer layer 140 is formed on the single crystal silicon film 130 (Figure 14). The buffer layer may also be formed by applying CVD or sputtering as appropriate. For example, a first buffer layer 142 containing or made of aluminum may be formed, and a second buffer layer 144 containing or made of aluminum nitride may be formed on top of it (see Figure 3).

[0046] Subsequently, the electroluminescent layer 150 is formed using a sputtering method (Figure 15). For example, each functional layer may be formed by sputtering a target containing a compound semiconductor, which is the material contained therein, with argon. If the functional layer contains a compound semiconductor containing multiple metal elements, the functional layer may be formed by co-sputtering using multiple targets, each containing a single type of compound semiconductor, or by sputtering a target containing a compound semiconductor containing multiple metal elements. Alternatively, the functional layer may be formed by reactive sputtering or reactive co-sputtering using a target containing a metal (zero-valent metal) and nitrogen as the reactive gas. For example, a functional layer containing indium gallium nitride can be obtained by co-sputtering with nitrogen using a target containing metallic gallium and a target containing metallic indium. If the functional layer contains a dopant, a corresponding target containing the dopant may be used.

[0047] A heat treatment may be performed to activate the dopants contained in each functional layer after each functional layer is formed, or after the electroluminescent layer 150 has been formed. The heat treatment may be performed, for example, at a temperature of 500°C to 700°C for 3 minutes to 60 minutes.

[0048] Compared to methods using CVD, when forming the electroluminescent layer 150 using the sputtering method, the high temperatures required for epitaxial growth are not necessary, and the electroluminescent layer 150 can be formed at a temperature below the strain point or glass transition temperature of the glass substrate 110. Therefore, the electroluminescent layer 150 can be formed without deformation of the glass substrate 110. Furthermore, since the electroluminescent layer 150 is formed on the buffer layer 140, the crystallization of each functional layer is promoted. For this reason, even when applying the sputtering method, which is performed at relatively low temperatures, it is possible to form an electroluminescent layer 150 with few crystal defects.

[0049] Each of the functional layers constituting the electroluminescent layer 150 is provided over almost the entire surface of the buffer layer 140, as shown in Figure 15. Therefore, when forming multiple light-emitting elements 100 using a single glass substrate 110, etching is performed for element isolation. The etching may be dry etching such as plasma etching, or wet etching. In the latter case, an etching method called photoelectrochemical etching (PEC etching) may be used. In this case, a hard mask (not shown in Figure 15) containing a metal such as titanium, gold, or platinum is formed on the electroluminescent layer 150, and then the glass substrate 110 on which the electroluminescent layer 150 is formed is irradiated with light with an energy greater than the band gap of the functional layers constituting the electroluminescent layer 150 (for example, light with a wavelength of less than 365 nm) in an electrolyte containing alkali metal hydroxide. As a result, the functional layers are anodized using holes emitted from the functional layers. By removing the generated oxide by wet etching, the portion exposed from the metal mask can be removed. Alternatively, contactless PEC etching may be used. In this method, an electrolyte containing an aqueous solution of potassium peroxodisulfate is used, and ultraviolet light with a wavelength of 310 nm or less is irradiated onto the electrolyte to generate sulfuric acid radicals, which act as an oxidizing agent. Of the electrons and holes generated by light irradiation of the functional layer, the electrons are consumed by the sulfuric acid radicals, so the functional layer can be oxidized by the excess holes. Contactless PEC etching eliminates the need for current flow for anodic oxidation, making etching simpler. Furthermore, etching damage caused by dry etching (such as the generation of crystal defects) can be avoided, allowing the electroluminescent layer 150 to be processed and formed while maintaining high crystallinity.

[0050] After separating the elements by etching, etching is performed to form the electrode 160 that functions as a cathode. Specifically, as shown in Figure 16, a mask (hard mask or resist mask) 184 is provided to cover a part of each electroluminescent layer 150, and the functional layers other than the electron injection layer 152 are etched. As a result, as shown in Figure 17, the electron injection layer 152 can be exposed from the other functional layers. The etching at this time may be dry etching or wet etching. In the latter case, a hard mask containing a metal such as titanium, gold, or platinum may be used as the mask 184, and the functional layers may be etched by PEC etching or contactless PEC etching. As described above, by using PEC etching or contactless PEC etching, precise etching can be performed on the electroluminescent layer 150 while suppressing etching damage to the electroluminescent layer 150 that may occur during dry etching.

[0051] After etching the electroluminescent layer 150 to remove the mask 184, electrodes 158 and 160 are formed (Figure 18). Electrodes 158 and 160 can also be formed using sputtering, CVD, or vapor deposition as appropriate. Electrode 158, which functions as an anode, is positioned in contact with the hole injection layer 156. On the other hand, electrode 160, which functions as a cathode, is positioned in contact with the electron injection layer 152.

[0052] The passivation film 170, which has any configuration, is formed to cover the pair of electrodes 158 and 160 after they have been formed (Figure 19). The passivation film 170 can also be formed using CVD, sputtering, or vapor deposition. After this, the portion of the passivation film 170 that overlaps with the pair of electrodes 158 and 160 is removed by etching.

[0053] (3) As an optional step, a process to reduce the thickness of the glass substrate 110 may be performed (Figure 20). This process can be performed, for example, by polishing the glass substrate 110. This process removes the protective film 124 on the bottom side of the glass substrate 110, and the remaining protective film 124 functions as the first protective film 120.

[0054] As described above, in the manufacturing method of the light-emitting element 100 according to one embodiment of the present invention, a single-crystal silicon film 130 is transferred onto a glass substrate 110 by cleaving the single-crystal silicon substrate 132 using an embrittlement layer 134 formed by ion implantation into the single-crystal silicon substrate 132. As a result, the upper surface of the single-crystal silicon film 130 formed on the glass substrate 110 has reduced crystallinity due to ion implantation, and polycrystalline or amorphous silicon is present. Hydrofluoric acid is used to remove the polycrystalline or amorphous silicon, but hydrofluoric acid dissolves glass. However, in this manufacturing method, a protective film 124 containing or made of aluminum nitride, which is resistant to hydrofluoric acid, is formed on the entire surface of the glass substrate 110. As a result, erosion of the glass substrate 110 by hydrofluoric acid is prevented, and the occurrence of defects caused by the dissolution of glass can be effectively prevented. Furthermore, although the glass substrate 110, single-crystal silicon film 130, and buffer layer 140 undergo thermal expansion and contraction due to temperature changes during the manufacturing process, the small thickness of the single-crystal silicon film 130 reduces the stress generated between the glass substrate 110 and the single-crystal silicon film 130, and between the single-crystal silicon film 130 and the buffer layer 140. As a result, delamination caused by stress and an increase in crystal defects in the electroluminescent layer 150 are suppressed. Therefore, by utilizing a large-area glass substrate 110, light-emitting elements with superior characteristics can be mass-produced with a high yield. This contributes to the low-cost manufacturing of light-emitting elements and electronic devices equipped with them.

[0055] 3. There are no restrictions on the type or function of the electronic device including the light-emitting element 100, and the light-emitting element 100 can be used in various electronic devices such as display devices and lighting devices. As an example of an electronic device, a schematic top view of a display device 200 is shown in Figure 21. The display device 200 includes an array substrate 202 on which various patterned conductive films, insulating films, and semiconductor films are deposited. By appropriately combining these conductive films, insulating films, and semiconductor films, multiple pixels 204, as well as drive circuits for driving the pixels 204 (scan line drive circuit 206, signal line drive circuit 208), multiple terminals 210, and various wiring (not shown in Figure 21) are formed. The terminals 210 are electrically connected to the scan line drive circuit 206 and the signal line drive circuit 208. Power and control signals for driving the display device 200 are input to the scan line drive circuit 206 and the signal line drive circuit 208 from an external circuit (not shown) via the terminals 210. The scan line drive circuit 206 and the signal line drive circuit 208 generate various signals (gate signal, video signal, reset signal, initialization signal, etc.) for driving the pixels 204 based on the control signal, and supply them to the pixels 204 along with power. This allows multiple pixels 204 to reproduce an image corresponding to the control signal.

[0056] A pixel circuit is formed in each pixel 204, and a light-emitting element 100 is electrically connected to the pixel circuit. There are no restrictions on the configuration of the pixel circuit. For example, as shown in the equivalent circuit diagram of Figure 22, each pixel 204 is configured to have a switching transistor 230, a driving transistor 232, and a capacitive element 234. The gate electrode of the switching transistor 230 is electrically connected to the gate line 222 extending from the scan line driving circuit 206. One terminal of the switching transistor 230 is electrically connected to the signal line 220 extending from the signal line driving circuit 208, and the other terminal is electrically connected to one electrode of the capacitive element 234 and the gate electrode of the driving transistor 232. One terminal of the driving transistor 232 is connected to the current supply line 226 to which a constant potential is supplied via terminal 210, and the other terminal is electrically connected to the other electrode of the capacitive element 234 and the electrode 158 of the light-emitting element 100. The electrodes 160 of the light-emitting element 100 are electrically connected to a common wiring 224 to which a constant potential lower than the potential applied to the current supply line 226 is supplied. Note that the configuration of the pixel circuit is not limited to the above configuration, and the pixel circuit may further include one or more transistors or one or more capacitive elements.

[0057] The light-emitting element 100 can be placed on the pixels 204 using a transfer method. Specifically, first, a pixel circuit is formed on the array substrate 202. Figure 23 is an example of a schematic end view showing a method for manufacturing the display device 200, in which the driving transistor 232 of the pixel circuit is shown. As shown in Figure 23, a pixel circuit including the driving transistor 232 is formed on the array substrate 202 either directly or via an undercoat 212 of any configuration. There are no restrictions on the configuration of the driving transistor 232 or the switching transistor 230; they may be top-gate type transistors or bottom-gate type transistors. In the example shown in Figure 23, the driving transistor 232 is a top-gate type transistor and includes a semiconductor film 240 containing a channel 240a and a source / drain region 240b, a gate insulating film 242 covering the semiconductor film 240, a gate electrode 244 overlapping the channel 240a via the gate insulating film 242, an interlayer insulating film 246 covering the gate electrode 244, and a pair of terminals 248, 250 electrically connected to the semiconductor film 240 via openings provided in the interlayer insulating film 246 and the gate insulating film 242.

[0058] A planarization film 252 is provided on the pixel circuit, and the planarization film 252 has an opening that exposes the terminal 250. Through this opening, the pixel electrode 254 formed on the planarization film 252 is electrically connected to the terminal 250. In addition, a connection pad 256 that is electrically connected to the common wiring 224 is provided on the planarization film 252. An insulating partition wall 260 is provided to cover the ends of the pixel electrode 254 and the connection pad 256.

[0059] The above-described configuration can be formed using known materials and methods, so a detailed explanation is omitted.

[0060] Subsequently, electrodes 158 and 160 of the light-emitting element 100 are electrically connected to the pixel electrode 254 and the connection pad 256, respectively, using a conductive adhesive 262 or the like (Figure 24). This connects the light-emitting element 100 to each pixel 204. As an optional step, after connecting the light-emitting element 100, the glass substrate 110 may be peeled off so that the first protective film 120 remains on the single-crystal silicon film 130. Aluminum nitride has a higher thermal conductivity than glass. Therefore, the remaining first protective film 120 containing aluminum nitride can function as a heat spreader that can dissipate the heat generated in the light-emitting element 100 when the light-emitting element 100 is lit at high brightness through the first protective film 120.

[0061] Alternatively, the light-emitting element 100 may be connected to the pixel circuit after the glass substrate 110 has been removed. Specifically, as shown in Figure 25, a first carrier substrate 270 is bonded to a glass substrate 110 which has an electroluminescent layer 150 and a pair of electrodes 158 and 160. The first carrier substrate 270 is also called a dicing film or dicing sheet and includes a base layer 272 and an adhesive layer 274. The base layer 272 may be a substrate with low flexibility, such as a quartz substrate, a glass substrate, or a metal substrate such as a stainless steel substrate, or it may be a flexible substrate (film) containing polyester such as polyethylene terephthalate or polyethylene naphthalate, nylon, polycarbonate, polyolefin such as polyethylene, polypropylene, or polystyrene, cycloolefin polymers containing polynorbornene as a basic skeleton, or ring-opening metathesis polymers of norbornene. On the other hand, the adhesive layer 274 may include polyolefin elastomers, polystyrene elastomers, vinyl chloride elastomers, polyurethane elastomers, polyester elastomers, polyacrylonitrile elastomers, polyamide elastomers, and the like. More specifically, the adhesive layer 274 may include styrene-butadiene rubber, isobutylene-isoprene rubber, ethylene-propylene-diene rubber, nitrile rubber, butadiene rubber, isoprene rubber, as well as silicone rubber and natural rubber. The adhesive layer 274 may also be a water-soluble adhesive.

[0062] Subsequently, the glass substrate 110 is peeled off. As a result, as shown in Figure 26, peeling occurs at the interface between the glass substrate 110 and the first protective film 120, allowing the first protective film 120, the single-crystal silicon film 130, the buffer layer 140, the electroluminescent layer 150, and the pair of electrodes 158 and 160 to be transferred onto the first carrier substrate 270.

[0063] Next, as shown in Figure 27, a second carrier substrate 280, comprising a base layer 282 and an adhesive layer 284, is bonded to the first carrier substrate 270. The bonding is carried out so that the first protective film 120, single-crystal silicon film 130, buffer layer 140, electroluminescent layer 150, and a pair of electrodes 158 and 160 are sandwiched between adhesive layers 274 and 284. The adhesive layer 284 may also contain materials usable for the adhesive layer 274, but in order to reliably transfer the electroluminescent layer 150 and the like onto the second carrier substrate 280, it is preferable to select a material for the adhesive layer 284 that adheres more strongly to the electroluminescent layer 150 and the like than the adhesive layer 274.

[0064] Next, the first carrier substrate 270 is peeled off (Figure 28). This transfers the first protective film 120, the single-crystal silicon film 130, the buffer layer 140, the electroluminescent layer 150, and the pair of electrodes 158 and 160 onto the second carrier substrate 280. After this, the electrodes 158 and 160 of the light-emitting element 100 are electrically connected to the pixel electrode 254 and the connection pad 256, respectively, using a conductive adhesive 262 or the like. This allows the light-emitting element 100 to be placed in each pixel 204, as shown in Figure 29. If the spacing of the electroluminescent layer 150 on the second carrier substrate 280 differs from the spacing of the pixels 204, the flexible second carrier substrate 280 may be deformed to match the spacing of the electroluminescent layer 150 and the spacing of the pixels 204. This makes it possible to place multiple light-emitting elements 100 in multiple pixels 204 simultaneously.

[0065] As described above, the light-emitting element 100 according to the embodiment of the present invention can be manufactured at low cost and exhibits excellent characteristics. For this reason, the display device 200 equipped with the light-emitting element 100 can also be manufactured at low cost and exhibit excellent characteristics (high luminous efficiency, low power consumption, and high reliability).

[0066] The embodiments described above as embodiments of the present invention can be combined and implemented as appropriate, insofar as they do not contradict each other. Furthermore, any additions, deletions, or design changes to components, or additions, omissions, or changes to processes based on these embodiments, made by those skilled in the art, are also included within the scope of the present invention, as long as they retain the essence of the present invention.

[0067] Any effects or benefits other than those brought about by the embodiments described above, if they are clear from the description herein or easily predictable to a person skilled in the art, are naturally considered to be brought about by the present invention.

[0068] 100: Light-emitting element, 110: Glass substrate, 120: First protective film, 122: Second protective film, 124: Protective film, 130: Single-crystal silicon film, 132: Single-crystal silicon substrate, 132a: Main surface, 134: Embrittlement layer, 136: Aluminum nitride-containing film, 140: Buffer layer, 142: First buffer layer, 144: Second buffer layer, 150: Electroluminescent layer, 152: Electron injection layer, 154: Light-emitting layer, 156: Hole injection layer, 158: Electrode, 160: Electrode, 170: Passivation film, 180: Electrode, 182: Electrode, 184: Mask, 200: Display device, 202: Array substrate, 204: Pixel, 206: Scan line driving circuit, 208: Signal line driving circuit , 210: terminal, 212: undercoat, 220: signal line, 222: gate line, 224: common wiring, 226: current supply line, 230: switching transistor, 232: drive transistor, 234: capacitive element, 240: semiconductor film, 240a: channel, 240b: source / drain region, 242: gate insulating film, 244: gate electrode, 246: interlayer insulating film, 248: terminal, 250: terminal, 252: planarization film, 254: pixel electrode, 256: connection pad, 260: partition, 262: conductive adhesive, 270: first carrier substrate, 272: base layer, 274: adhesive layer, 280: second carrier substrate, 282: base layer, 284: adhesive layer,

Claims

1. A light-emitting element comprising: a first protective film containing aluminum nitride; a single-crystal silicon film located on and in contact with the first protective film; a buffer layer located on and in contact with the single-crystal silicon film; an electroluminescent layer located on and in contact with the buffer layer and containing a compound semiconductor; and a pair of electrodes electrically connected to the electroluminescent layer.

2. The light-emitting element according to claim 1, further comprising an amorphous glass substrate located beneath the first protective film and in contact with the first protective film.

3. The light-emitting element according to claim 2, further comprising a second protective film located beneath the glass substrate, in contact with the glass substrate, and containing aluminum nitride.

4. The light-emitting element according to claim 3, wherein the first protective film and the second protective film are integrated and cover the entire surface of the glass substrate.

5. The light-emitting element according to claim 1, wherein the buffer layer comprises a first buffer layer containing metallic aluminum and a second buffer layer located on the first buffer layer and containing aluminum nitride.

6. The light-emitting element according to claim 1, wherein the upper surface of the single-crystal silicon film is composed of a (111) plane of single-crystal silicon.

7. The light-emitting element according to claim 1, wherein the electroluminescent layer includes an electron injection layer, a light-emitting layer on the electron injection layer, and a hole injection layer on the light-emitting layer.

8. The light-emitting element according to claim 7, wherein one of the pair of electrodes is located on the hole injection layer, and the other of the pair of electrodes is located on the light-emitting layer and the electron injection layer exposed from the hole injection layer.

9. An electronic device comprising the light-emitting element according to claim 1.

10. The electronic device according to claim 9, wherein the electronic device is selected from a display device and a lighting device.

11. A method for manufacturing a light-emitting element, comprising: forming a protective film containing aluminum nitride over the entire surface of an amorphous glass substrate; forming an embrittlement layer within a single-crystal silicon substrate by irradiating the single-crystal silicon substrate with ions through the main surface of the single-crystal silicon substrate; joining the glass substrate and the single-crystal silicon substrate such that the main surface is in contact with the protective film; transferring a single-crystal silicon film corresponding to the portion between the main surface and the embrittlement layer onto the glass substrate by peeling the single-crystal silicon substrate from the glass substrate; forming a buffer layer on the single-crystal silicon film; forming an electroluminescent layer containing a compound semiconductor on the buffer layer; and forming a pair of electrodes electrically connected to the electroluminescent layer.

12. The manufacturing method according to claim 11, wherein the buffer layer comprises a first buffer layer containing metallic aluminum and a second buffer layer located on the first buffer layer and containing aluminum nitride.

13. The manufacturing method according to claim 11, wherein the upper surface of the single-crystal silicon substrate is composed of a (111) plane of single-crystal silicon.

14. The manufacturing method according to claim 11, wherein the electroluminescent layer is formed by a sputtering method.

15. The manufacturing method according to claim 11, wherein the electroluminescent layer includes an electron injection layer, a light-emitting layer on the electron injection layer, and a hole injection layer on the light-emitting layer.

16. The manufacturing method according to claim 15, wherein one of the pair of electrodes is located on the hole injection layer, and the other of the pair of electrodes is located on the electron injection layer exposed from the light-emitting layer and the hole injection layer.

17. The manufacturing method according to claim 11, further comprising irradiating the protective film with argon ions before bonding the glass substrate and the single-crystal silicon substrate.

18. The manufacturing method according to claim 11, further comprising treating the single-crystal silicon film on the glass substrate with a chemical solution containing hydrofluoric acid before forming the buffer layer.

19. The manufacturing method according to claim 11, further comprising forming an aluminum nitride-containing film on the main surface of the single-crystal silicon substrate before bonding the glass substrate and the single-crystal silicon substrate.

20. The manufacturing method according to claim 19, further comprising irradiating the aluminum nitride-containing film with argon ions.

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