Method and apparatus for decoding and encoding base mesh

Abstract

An apparatus for decoding base-mesh is provided. One or more instructions may be executed by one or more processors individually or collectively, to cause the apparatus to receive a compressed bitstream comprising a base mesh sub-bitstream, to determine a value of a motion vector derivation disable flag, to obtain two syntax elements related to duplicate vertices, wherein values of the two syntax elements are based on the value of the motion vector derivation disable flag, and wherein the two syntax elements include a first syntax element for a last 1-bit position and a second syntax element for a trailing 0-bit, to determine one or more bitstream conformance conditions based on the two syntax elements, and to confirm, based on the one or more bitstream conformance conditions, a correct number of motion vectors being signaled in a bitstream.

Description

METHOD AND APPARATUS FOR DECODING AND ENCODING BASE MESH

[0001] This disclosure relates generally to multimedia devices and processes. More specifically, this disclosure relates to base mesh and vertex motion coding.

[0002] Three hundred sixty degree video and three dimensional (3D) volumetric video are emerging as new ways of experiencing immersive content due to the ready availability of powerful handheld devices such as smartphones. While 360 degree video enables an immersive "real life," "being-there," experience for consumers by capturing the 360 degree outside-in view of the world, 3D volumetric video can provide a complete six degrees of freedom (DoF) experience of being immersed and moving within the content. Users can interactively change their viewpoint and dynamically view any part of the captured scene or object they desire. Display and navigation sensors can track head movement of a user in real-time to determine the region of the 360 degree video or volumetric content that the user wants to view or interact with. Multimedia data that is 3D in nature, such as point clouds or 3D polygonal meshes, can be used in the immersive environment. This data can be stored in a video format and encoded and compressed for transmission as a bitstream to other devices.

[0003] This disclosure provides method and apparatus for encoding and decoding base mesh and vertex motion.

[0004] In an embodiment of the disclosure, an apparatus for decoding base-mesh is provided. The apparatus may comprise at least one memory storing one or more instructions, and one or more processors including processing circuitry. The one or more instructions may be executed by the one or more processors individually or collectively, to cause the apparatus to receive a compressed bitstream comprising a base mesh sub-bitstream. The one or more instructions may be executed by the one or more processors individually or collectively, to cause the apparatus to determine a value of a motion vector derivation disable flag. The one or more instructions may be executed by the one or more processors individually or collectively, to cause the apparatus to obtain two syntax elements related to duplicate vertices, wherein values of the two syntax elements are based on the value of the motion vector derivation disable flag, and wherein the two syntax elements include a first syntax element for a last 1-bit position and a second syntax element for a trailing 0-bit. The one or more instructions may be executed by the one or more processors individually or collectively, to cause the apparatus to determine one or more bitstream conformance conditions based on the two syntax elements; and The one or more instructions may be executed by the one or more processors individually or collectively, to cause the apparatus to confirm, based on the one or more bitstream conformance conditions, a correct number of motion vectors being signaled in a bitstream.

[0005] In an embodiment of the disclosure, an apparatus for decoding base-mesh is provided. The apparatus may comprise at least one memory storing one or more instructions, and one or more processors including processing circuitry. The one or more instructions may be executed by the one or more processors individually or collectively, to cause the apparatus to determine a value of a motion vector derivation disable flag and include the value of the motion vector derivation disable flag in signaling information. In an embodiment of the disclosure, an apparatus for decoding base-mesh is provided. The apparatus may comprise at least one memory storing one or more instructions, and one or more processors including processing circuitry. The one or more instructions may be executed by the one or more processors individually or collectively, to cause the apparatus to determine two syntax elements related to duplicate vertices and include the two syntax elements in the signaling information, wherein the two syntax elements include a first syntax element for a last 1-bit position and a second syntax element for a trailing 0-bit, and wherein one or more bitstream conformance conditions are related to the two syntax elements. In an embodiment of the disclosure, an apparatus for decoding base-mesh is provided. The apparatus may comprise at least one memory storing one or more instructions, and one or more processors including processing circuitry. The one or more instructions may be executed by the one or more processors individually or collectively, to cause the apparatus to create a compressed bitstream including the signaling information.

[0006] In an embodiment of the disclosure, a method for transmitting a compressed bitstream generated by an apparatus for encoding base mesh is provided. The method may include determine a value of a motion vector derivation disable flag and include the value of the motion vector derivation disable flag in signaling information. The method may include determine two syntax elements related to duplicate vertices and include the two syntax elements in the signaling information, wherein the two syntax elements include a first syntax element for a last 1-bit position and a second syntax element for a trailing 0-bit, and wherein one or more bitstream conformance conditions are related to the two syntax elements. The method may include create the compressed bitstream including the signaling information.

[0007] Other technical features may be readily apparent to one skilled in the art from the following figures, descriptions, and claims.

[0008] Before undertaking the DETAILED DESCRIPTION below, it may be advantageous to set forth definitions of certain words and phrases used throughout this patent document. The term "couple" and its derivatives refer to any direct or indirect communication between two or more elements, whether or not those elements are in physical contact with one another. The terms "transmit," "receive," and "communicate," as well as derivatives thereof, encompass both direct and indirect communication. The terms "include" and "comprise," as well as derivatives thereof, mean inclusion without limitation. The term "or" is inclusive, meaning and / or. The phrase "associated with," as well as derivatives thereof, means to include, be included within, interconnect with, contain, be contained within, connect to or with, couple to or with, be communicable with, cooperate with, interleave, juxtapose, be proximate to, be bound to or with, have, have a property of, have a relationship to or with, or the like. The term "controller" means any device, system, or part thereof that controls at least one operation. Such a controller may be implemented in hardware or a combination of hardware and software and / or firmware. The functionality associated with any particular controller may be centralized or distributed, whether locally or remotely. The phrase "at least one of," when used with a list of items, means that different combinations of one or more of the listed items may be used, and only one item in the list may be needed. For example, "at least one of: A, B, and C" includes any of the following combinations: A, B, C, A and B, A and C, B and C, and A and B and C.

[0009] Moreover, various functions described below can be implemented or supported by one or more computer programs, each of which is formed from computer readable program code and embodied in a computer readable medium. The terms "application" and "program" refer to one or more computer programs, software components, sets of instructions, procedures, functions, objects, classes, instances, related data, or a portion thereof adapted for implementation in a suitable computer readable program code. The phrase "computer readable program code" includes any type of computer code, including source code, object code, and executable code. The phrase "computer readable medium" includes any type of medium capable of being accessed by a computer, such as read only memory (ROM), random access memory (RAM), a hard disk drive, a compact disc (CD), a digital video disc (DVD), or any other type of memory. A "non-transitory" computer readable medium excludes wired, wireless, optical, or other communication links that transport transitory electrical or other signals. A non-transitory computer readable medium includes media where data can be permanently stored and media where data can be stored and later overwritten, such as a rewritable optical disc or an erasable memory device.

[0010] Definitions for other certain words and phrases are provided throughout this patent document. Those of ordinary skill in the art should understand that in many if not most instances, such definitions apply to prior as well as future uses of such defined words and phrases.

[0011] For a more complete understanding of the present disclosure and its advantages, reference is now made to the following description taken in conjunction with the accompanying drawings, in which like reference numerals represent like parts:

[0012] FIG. 1 illustrates an example communication system in accordance with this disclosure;

[0013] FIG. 2 illustrate example apparatus in accordance with this disclosure;

[0014] FIG. 3 illustrates example apparatus in accordance with this disclosure;

[0015] FIG. 4 illustrates an example mesh frame encoding process in accordance with this disclosure;

[0016] FIG. 5 illustrates an example mesh frame decoding process in accordance with this disclosure;

[0017] FIG. 6 illustrates an example encoding method in accordance with this disclosure;

[0018] FIG. 7 illustrates an example decoding method in accordance with this disclosure; and

[0019] FIG. 8 illustrates an example method of setting conformance conditions in accordance with this disclosure.

[0020] Hereinafter, embodiments of the disclosure will be described in detail with reference to the accompanying drawings.

[0021] In describing the embodiments, descriptions related to technical contents well-known in the art and not associated directly with the disclosure will be omitted. Such an omission of unnecessary descriptions is intended to prevent obscuring of the main idea of the disclosure and more clearly transfer the main idea.

[0022] For the purpose of promoting an understanding of the principles of the present disclosure, reference will now be made to the various embodiments and specific language will be used to describe the same. It will nevertheless be understood that no limitation of the scope of the present disclosure is thereby intended, such alterations and further modifications in the illustrated system, and such further applications of the principles of the present disclosure as illustrated therein being contemplated as would normally occur to one skilled in the art to which the present disclosure relates.

[0023] It will be understood by those skilled in the art that the foregoing general description and the following detailed description are explanatory of the present disclosure and are not intended to be restrictive thereof.

[0024] For the same reason, in the accompanying drawings, some elements may be exaggerated, omitted, or schematically illustrated. Further, the size of each element does not completely reflect the actual size. In the drawings, identical or corresponding elements are provided with identical reference numerals or different reference numerals. For the sake of clarity, the first digit of a reference numeral of each component of the present disclosure is indicative of the Figure number, in which the corresponding component is shown. For example, reference numerals starting with digit "1" are shown at least in Figure 1. Similarly, reference numerals starting with digit "2" are shown at least in Figure 2

[0025] The advantages and features of the disclosure and ways to achieve them will be apparent by making reference to embodiments as described below in detail in conjunction with the accompanying drawings. However, the disclosure is not limited to the embodiments set forth below, but may be implemented in various different forms. The following embodiments are provided only to completely disclose the disclosure and inform those skilled in the art of the scope of the disclosure, and the disclosure is defined only by the scope of the appended claims. Throughout the specification, the same or like reference numerals designate the same or like elements. Furthermore, in describing the disclosure, a detailed description of known functions or constitution incorporated herein will be omitted in the case that it is determined that the description may make the subject matter of the disclosure unnecessarily unclear. The terms which will be described below are terms defined in consideration of the functions in the disclosure, and may be different according to users, intentions of the operators, or customs. Therefore, the definitions of the terms should be made based on the contents throughout the specification.

[0026] Reference is made herein to some "embodiments." It should be understood that an embodiment is an example of a possible implementation of any features and / or elements of the present disclosure. Some embodiments have been described for the purpose of explaining one or more of the potential ways in which the specific features and / or elements of the proposed disclosure fulfil the requirements of uniqueness, utility, and non-obviousness.

[0027] Use of the phrases and / or terms including, but not limited to, "a first embodiment," "a further embodiment," "an alternate embodiment," "one embodiment," "an embodiment," "multiple embodiments," "some embodiments," "other embodiments," "further embodiment", "furthermore embodiment", "additional embodiment" or other variants thereof do not necessarily refer to the same embodiments. Unless otherwise specified, one or more particular features and / or elements described in connection with one or more embodiments may be found in one embodiment, or may be found in more than one embodiment, or may be found in all embodiments, or may be found in no embodiments. Although one or more features and / or elements may be described herein in the context of only a single embodiment, or in the context of more than one embodiment, or in the context of all embodiments, the features and / or elements may instead be provided separately or in any appropriate combination or not at all. Conversely, any features and / or elements described in the context of separate embodiments may alternatively be realized as existing together in the context of a single embodiment.

[0028] Any particular and all details set forth herein are used in the context of some embodiments and therefore should not necessarily be taken as limiting factors to the proposed disclosure.

[0029] Herein, it will be understood that each block of the flowchart illustrations, and combinations of blocks in the flowchart illustrations, may be performed based on computer program instructions. These computer program instructions may be loaded collectively onto at least one processor of a general purpose computer, special purpose computer, or other programmable data processing apparatus to produce a machine, such that the instructions, which perform through any one of, or in any combination of, the at least one processor of the computer or other programmable data processing apparatus, create means for performing the functions specified in the flowchart block(s). The entirety of the one or more computer programs may be stored in a single memory or the one or more computer programs may be divided with different portions stored in different multiple memories. The computer program instructions may also be stored in a non-transitory computer usable or computer-readable memory that may direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer usable or computer-readable memory produce an article of manufacture including instruction means that perform the function specified in the flowchart block(s). The computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable data processing apparatus to produce a computer executed process such that the instructions that perform on the computer or other programmable data processing apparatus provide steps for executing the functions specified in the flowchart block(s).

[0030] Further, each block may represent a module, segment, or portion of code, which includes one or more executable instructions for executing the specified logical function(s). It should also be noted that in some alternative implementations, the functions noted in the blocks may occur out of the order. For example, two blocks(or functions) shown in succession may in fact be performed substantially concurrently or the blocks may sometimes be performed in the reverse order, depending upon the functionality involved.

[0031] As used in embodiments of the disclosure, a "~unit" may refer to a software element or a hardware element, such as a field programmable gate array (FPGA) or an application specific integrated circuit (ASIC), which performs a predetermined function. However, the term including the word "~unit" does not always have a meaning limited to software or hardware. The "~unit" may be constructed either to be stored in an addressable storage medium or to execute one or more processors. Therefore, the "~unit" includes, for example, software elements, object-oriented software elements, components such as class elements and task elements, processes, functions, properties, procedures, sub-routines, segments of a program code, drivers, firmware, micro-codes, circuits, data, database, data structures, tables, arrays, and parameters. The components and functions provided by the "~unit" may be either combined into a smaller number of components and a "~unit," or divided into additional components and a "~unit." Moreover, the components and "~units" may be implemented to reproduce one or more central processing units (CPUs) within a device or a security multimedia card. Further, in the embodiments, the "~unit" may include one or more processors.

[0032] It should be appreciated that the blocks in each flowchart and combinations of the flowcharts may be performed by one or more computer programs which include instructions. The entirety of the one or more computer programs may be stored in a single memory device or the one or more computer programs may be divided with different portions stored in different multiple memory devices.

[0033] Any of the functions or operations described herein can be processed by one processor or a combination of processors. The one processor or the combination of processors is circuitry performing processing and includes circuitry like an application processor (AP, e.g. a CPU), a communication processor (CP, e.g., a modem), a graphics processing unit (GPU), a neural processing unit (NPU) (e.g., an artificial intelligence (AI) chip), a Wi-Fi chip, a Bluetooth® chip, a global positioning system (GPS) chip, a near field communication (NFC) chip, connectivity chips, a sensor controller, a touch controller, a finger-print sensor controller, a display driver integrated circuit (IC), an audio CODEC chip, a universal serial bus (USB) controller, a camera controller, an image processing IC, a microprocessor unit (MPU), a system on chip (SoC), an IC, or the like.

[0034] It will be appreciated that various embodiments of the disclosure according to the claims and description in the specification can be realized in the form of hardware, software or a combination of hardware and software.

[0035] Any such software may be stored in non-transitory computer readable storage media. The non-transitory computer readable storage media store one or more computer programs (software modules), the one or more computer programs include computer-executable instructions that, when executed by one or more processors of an apparatus individually or collectively, cause the apparatus to perform a method of the disclosure.

[0036] Any such software may be stored in the form of volatile or non-volatile storage such as, for example, a storage device like read only memory (ROM), whether erasable or rewritable or not, or in the form of memory such as, for example, random access memory (RAM), memory chips, device or integrated circuits or on an optically or magnetically readable medium such as, for example, a compact disk (CD), digital versatile disc (DVD), magnetic disk or magnetic tape or the like. It will be appreciated that the storage devices and storage media are various embodiments of non-transitory machine-readable storage that are suitable for storing a computer program or computer programs comprising instructions that, when executed, implement various embodiments of the disclosure. Accordingly, various embodiments of the present disclosure may provide a program comprising code for implementing apparatus or a method as claimed in any one of the claims of this specification and a non-transitory machine-readable storage storing such a program.

[0037] Hereinafter, the determination of priority between A and B in the present disclosure may refer to various actions such as selecting the one having a higher priority based on a predefined priority rule and performing an operation corresponding thereto, or omitting or dropping an operation corresponding to the one having a lower priority.

[0038] Hereinafter, "A or B" as described in the present disclosure may be understood as "A and / or B," which may include A, or B, or both A and B.

[0039] In addition, "at least one of A, B, and C" as described in the present disclosure may be understood to include A, or B, or C, or any combination of A, B, and C.

[0040] In addition, "at least one of A, B, or C" as described in the present disclosure may be understood to include A, or B, or C, or any combination of A, B, and C.

[0041] Furthermore, "A / B" as described in the present disclosure may be understood as "A and / or B," which may include A, or B, or both A and B.

[0042] Furthermore, "A, B" as described in the present disclosure may be understood as "A and / or B," which may include A, or B, or both A and B.

[0043] Furthermore, "A and B" as described in the present disclosure may be understood as "A and / or B," which may include A, or B, or both A and B.

[0044] Furthermore, "if condition A and condition B are satisfied," as described in the present disclosure, may not be limited to a case where both condition A and condition B are satisfied, but may be understood to include a case where either condition A or condition B is individually satisfied, both condition A and condition B are satisfied, or one or more additional conditions are satisfied in combination.

[0045] Furthermore, the terms "first ~", "second ~", etc., as described in the present disclosure with respect to various elements (e.g., information, objects, operation, sequences, or the like), should not limit those elements. These terms may only be intended to distinguish one element from another, and may not be intended to indicate a specific order. For example, a first element could be termed a second element, and, similarly, a second element could be termed a first element.

[0046] Furthermore, even if "first ~" and "second ~" are described in the present disclosure, it may be understood that element(s) referred to by "first ~" and "second ~" may be the same or different. For example, in case of element(s) being information, first information and second information may both be same information and, in some cases, are separate and different information.

[0047] Whether or not a certain feature or element was limited to being used only once, it may still be referred to as "one or more features" or "one or more elements" or "at least one feature" or "at least one element." Furthermore, the use of the terms "one or more" or "at least one" feature or element do not preclude there being none of that feature or element, unless otherwise specified by limiting language including, but not limited to, "there needs to be one or more..." or "one or more elements is required."

[0048] The terms "comprises", "comprising", or any other variations thereof, are intended to cover a non-exclusive inclusion, such that a process or method that comprises a list of steps does not include only those steps but may include other steps not expressly listed or inherent to such process or method. Similarly, one or more devices or sub-systems or elements or structures or components proceeded by "comprises... a" does not, without more constraints, preclude the existence of other devices or other sub-systems or other elements or other structures or other components or additional devices or additional sub-systems or additional elements or additional structures or additional components.

[0049] In addition, the terms "if ~" and "in case that ~" as used in the disclosure or claims may be interpreted to include the meanings of "when (or upon) ~," "in response to ~," "based on ~," or "according to ~," and may be used interchangeably with these expressions. In addition, expressions other than those exemplified herein may also be used, as long as they have substantially the same meaning and do not impair the technical features of the present disclosure.

[0050] In addition, the term "not perform" as used in the present disclosure or claims may, in context, be understood to mean that the corresponding step is omitted or skipped. Such a term may be replaced with other terms having the same or substantially equivalent meaning.

[0051] In the specific embodiments of the present disclosure described below, terms or components included in the disclosure may be expressed in singular or plural form depending on the specific embodiments presented. However, such singular or plural expressions are selected appropriately for convenience of description, and the present disclosure is not limited to a singular or plural number of components. A component expressed in the plural form may be implemented as a single component, and a component expressed in the singular form may be implemented as multiple components.

[0052] The drawings or flowcharts described below illustrate exemplary methods that may be implemented according to the principles of the present disclosure, and various modifications may be made to the methods illustrated in the flowcharts of the present disclosure. For example, although illustrated as a series of steps, various steps in each drawing or flowchart may overlap, occur in parallel, occur in a different order, or be repeated. In other examples, any step may be omitted or replaced with another step.

[0053] The methods and apparatuses proposed in the embodiments of the present disclosure are not limited to each embodiment individually, but may also be applied in combination of all or some of the embodiments proposed in the disclosure. Therefore, the embodiments of the present disclosure may be modified and applied without significantly departing from the scope of the present disclosure, as would be understood by those skilled in the art.

[0054] In this case, even if certain wordings are described differently across embodiments, they may be used interchangeably or in substitution or in combination if their underlying concepts are equivalent. For example, for the same or equivalent concept, even if one embodiment uses the expression "A" and another embodiment uses the expression "B", such expressions may be understood interchangeably, in substitution, or in combination.

[0055] FIGS. 1 through 8, described below, and the various embodiments used to describe the principles of the present disclosure are by way of illustration only and should not be construed in any way to limit the scope of the disclosure. Those skilled in the art will understand that the principles of the present disclosure may be implemented in any type of suitably arranged device or system.

[0056] As noted above, three hundred sixty degree (360°) video and three dimensional (3D) volumetric video are emerging as new ways of experiencing immersive content due to the ready availability of powerful handheld devices such as smartphones. While 360° video enables an immersive "real life," "being-there," experience for consumers by capturing the 360° outside-in view of the world, 3D volumetric video can provide a complete six degrees of freedom (DoF) experience of being immersed and moving within the content. Users can interactively change their viewpoint and dynamically view any part of the captured scene or object they desire. Display and navigation sensors can track head movement of a user in real-time to determine the region of the 360° video or volumetric content that the user wants to view or interact with. Multimedia data that is 3D in nature, such as point clouds or 3D polygonal meshes, can be used in the immersive environment. This data can be stored in a video format and encoded and compressed for transmission as a bitstream to other devices.

[0057] A point cloud is a set of 3D points along with attributes such as color, normal directions, reflectivity, point-size, etc. that represent an object's surface or volume. Point clouds are common in a variety of applications such as gaming, 3D maps, visualizations, medical applications, augmented reality, virtual reality, autonomous driving, multi-view replay, and six degrees of freedom (DoF) immersive media, to name a few. Point clouds, if uncompressed, generally require a large amount of bandwidth for transmission. Due to the large bitrate requirement, point clouds are often compressed prior to transmission. Compressing a 3D object such as a point cloud, often requires specialized hardware. To avoid specialized hardware to compress a 3D point cloud, a 3D point cloud can be transformed into traditional two-dimensional (2D) frames and that can be compressed and later reconstructed and viewable to a user.

[0058] Polygonal 3D meshes, especially triangular meshes, are another popular format for representing 3D objects. Meshes typically include a set of vertices, edges and faces that are used for representing the surface of 3D objects. Triangular meshes are simple polygonal meshes in which the faces are simple triangles covering the surface of the 3D object. Typically, there may be one or more attributes associated with the mesh. In one scenario, one or more attributes may be associated with each vertex in the mesh. For example, a texture attribute (RGB) may be associated with each vertex. In another scenario, each vertex may be associated with a pair of coordinates, (u,　v). The (u,　v) coordinates may point to a position in a texture map associated with the mesh. For example, the (u,　v) coordinates may refer to row and column indices in the texture map, respectively. A mesh can be thought of as a point cloud with additional connectivity information.

[0059] The point cloud or meshes may be dynamic, i.e., they may vary with time. In these cases, the point cloud or mesh at a particular time instant may be referred to as a point cloud frame or a mesh frame, respectively. Since point clouds and meshes contain a large amount of data, they require compression for efficient storage and transmission. This is particularly true for dynamic point clouds and meshes, which may contain 60 frames or higher per second.

[0060] As part of an encoding process, a base mesh can be coded using an existing mesh codec, and a reconstructed base mesh can be constructed from the coded original base mesh. The reconstructed base mesh can then be subdivided into one or more subdivided meshes and a displacement field is created for each subdivided mesh.

[0061] A standard for video-based dynamic mesh coding is being developed. As a part of the standard, a potentially simplified (lower resolution) base mesh is created and coded as a sub-bitstream. For base mesh coding, some frames are coded in inter mode. In this mode motion vectors for vertices are transmitted. The motion vectors are added to the corresponding vertex positions in a reference mesh frame to derive the position of the vertices in the current frame. When a vertex in the reference mesh frame is a duplicate of another vertex, a flag is signalled to indicate whether a motion vector needs to be signalled for that vertex. Two new syntax elements related to duplicate vertices are:bmidu_mv_signalled_flag_last1posandbmidu_mv_signalled_flag_last1pos. These may be inferred when the value of the bmptc_motion_vector_derivation_disable_flag is 1. This disclosure also introduces bitstream conformance constraints to ensure that enough motion vectors are signaled in the bitstream.

[0062] FIG. 1 illustrates an example communication system 100 in accordance with this disclosure. The embodiment of the communication system 100 shown in FIG.　1 is for illustration only. An embodiment of the communication system 100 may be used without departing from the scope of this disclosure.

[0063] As shown in FIG. 1, in an embodiment of the disclosure, the communication system　100 includes a network　102 that facilitates communication between various components in the communication system　100. For example, the network　102 may communicate IP packets, frame relay frames, Asynchronous Transfer Mode (ATM) cells, or other information between network addresses. The network　102 includes one or more local area networks (LANs), metropolitan area networks (MANs), wide area networks (WANs), all or a portion of a global network such as the Internet, or any other communication system or systems at one or more locations.

[0064] In an embodiment of the disclosure, the network　102 facilitates communications between a server 104 and various client devices 106-116. The client devices 106-116 may be, for example, a smartphone, a tablet computer, a laptop, a personal computer, a TV, an interactive display, a wearable device, a HMD, or the like. The server　104 may represent one or more servers. Each server　104 includes any suitable computing or processing device that may provide computing services for one or more client devices, such as the client devices 106-116. Each server　104 could, for example, include one or more processing devices, one or more memories storing instructions and data, and one or more network interfaces facilitating communication over the network　102. As described in more detail below, the server 104 may transmit a compressed bitstream, representing a point cloud or mesh, to one or more display devices, such as a client device 106-116. In an embodiment of the disclosure, each server 104 may include an encoder.

[0065] In an embodiment of the disclosure, each client device　106-116 represents any suitable computing or processing device that interacts with at least one server (such as the server 104) or other computing device(s) over the network　102. The client devices 106-116 include a desktop computer　106, a mobile telephone or mobile device　108 (such as a smartphone), a PDA　110, a laptop computer　112, a tablet computer　114, and a HMD 116. However, any other or additional client devices could be used in the communication system　100. Smartphones represent a class of mobile devices 108 that are handheld devices with mobile operating systems and integrated mobile broadband cellular network connections for voice, short message service (SMS), and Internet data communications. The HMD　116 may display　360° scenes including one or more dynamic or static 3D　point clouds. In an embodiment of the disclosure, any of the client devices　106-116 may include an encoder, decoder, or both. For example, the mobile device　108 may record a 3D volumetric video and then encode the video enabling the video to be transmitted to one of the client devices　106-116. In another example, the laptop computer　112 may be used to generate a 3D point cloud or mesh, which is then encoded and transmitted to one of the client devices　106-116.

[0066] In an embodiment of the disclosure, some client devices 108-116 communicate indirectly with the network 102. For example, the mobile device 108 and PDA　110 communicate via one or more base stations 118, such as cellular base stations or eNodeBs (eNBs). Also, the laptop computer　112, the tablet computer　114, and the HMD 116 communicate via one or more wireless access points　120, such as IEEE 802.11 wireless access points. Note that these are for illustration only and that each client device　106-116 could communicate directly with the network 102 or indirectly with the network　102 via any suitable intermediate device(s) or network(s). In an embodiment of the disclosure, the server 104 or any client device 106-116 may be used to compress a point cloud or mesh, generate a bitstream that represents the point cloud or mesh, and transmit the bitstream to another client device such as any client device 106-116.

[0067] In an embodiment of the disclosure, any of the client devices 106-114 transmit information securely and efficiently to another device, such as, for example, the server 104. Also, any of the client devices 106-116 may trigger the information transmission between itself and the server 104. Any of the client devices 106-114 may function as a VR display when attached to a headset via brackets, and function similar to HMD　116. For example, the mobile device 108 when attached to a bracket system and worn over the eyes of a user may function similarly as the HMD 116. The mobile device　108 (or any other client device 106-116) may trigger the information transmission between itself and the server 104.

[0068] In an embodiment of the disclosure, any of the client devices　106-116 or the server 104 may create a 3D point cloud or mesh, compress a 3D point cloud or mesh, transmit a 3D point cloud or mesh, receive a 3D point cloud or mesh, decode a 3D point cloud or mesh, render a 3D point cloud or mesh, or a combination thereof. For example, the server 104 may compress a 3D point cloud or mesh to generate a bitstream and then transmit the bitstream to one or more of the client devices　106-116. As another example, one of the client devices 106-116 may compress a 3D point cloud or mesh to generate a bitstream and then transmit the bitstream to another one of the client devices 106-116 or to the server 104. In accordance with this disclosure, the server 104 and / or the client devices 106-116 may use a number of vertices of the original base mesh and / or distortion information for each reconstruction iteration to simplify submeshes. Additionally or alternatively, in accordance with this disclosure, the server 104 and / or the client devices 106-116 may use a copy of a decimated mesh for reconstructing one or more submeshes. In some embodiments, the server 104 and / or the client devices 106-116 may construct and transmit signaling information instructing another device to use a number of vertices of the original base mesh and / or distortion information for each reconstruction iteration to simplify submeshes and / or create and use a copy of a decimated mesh for reconstructing one or more submeshes.

[0069] In an embodiment of the disclosure, although FIG.　1 illustrates one example of a communication system　100, various changes may be made to FIG.　1. For example, the communication system　100 could include any number of each component in any suitable arrangement. In general, computing and communication systems come in a wide variety of configurations, and FIG.　1 does not limit the scope of this disclosure to any particular configuration. While FIG.　1 illustrates one operational environment in which various features disclosed in this patent document may be used, these features could be used in any other suitable system.

[0070] FIG. 2 illustrates example apparatus in accordance with this disclosure. In particular, FIG. 2 illustrates an example server 200, and the server　200 could represent the server 104 in FIG. 1. The server 200 may represent one or more encoders, decoders, local servers, remote servers, clustered computers, and components that act as a single pool of seamless resources, a cloud-based server, and the like. The server 200 may be accessed by one or more of the client devices 106-116 of FIG. 1 or another server. Meanwhile, the apparatus of the present disclosure may be an electronic device. In addition, the description given with respect to the apparatus may equally or similarly apply to the electronic device. And, the description given with respect to the electronic device may equally or similarly apply to the apparatus.

[0071] As shown in FIG. 2, the server 200 may represent one or more local servers, one or more compression servers, or one or more encoding servers, such as an encoder. In an embodiment of the disclosure, the encoder may perform decoding. As shown in FIG. 2, the server　200 includes a bus system 205 that supports communication between at least one processing device (such as a processor 210), at least one storage device 215, at least one communications interface　220, and at least one input / output (I / O) unit 225.

[0072] In an embodiment of the disclosure, the processor 210 executes instructions that may be stored in a memory　230. The processor　210 may include any suitable number(s) and type(s) of processors or other devices in any suitable arrangement. Example types of processors　210 include microprocessors, microcontrollers, digital signal processors, field programmable gate arrays, application specific integrated circuits, and discrete circuitry.

[0073] In an embodiment of the disclosure, the processor 210 may encode a 3D point cloud or mesh stored within the storage devices 215. In an embodiment of the disclosure, encoding a 3D point cloud also decodes the 3D point cloud or mesh to ensure that when the point cloud or mesh is reconstructed, the reconstructed 3D point cloud or mesh matches the 3D point cloud or mesh prior to the encoding. In an embodiment of the disclosure, the processor 210 may use a number of vertices of the original base mesh and / or distortion information for each reconstruction iteration to simplify submeshes. Additionally or alternatively, the processor 210 may create and use a copy of a decimated mesh for reconstructing one or more submeshes as described in this disclosure. In some embodiments, the processor 210 may construct and transmit signaling information instructing another device to use a number of vertices of the original base mesh and / or distortion information for each reconstruction iteration to simplify submeshes and / or create and use a copy of a decimated mesh for reconstructing one or more submeshes.

[0074] In an embodiment of the disclosure, the memory 230 and a persistent storage 235 are examples of storage devices　215 that represent any structure(s) capable of storing and facilitating retrieval of information (such as data, program code, or other suitable information on a temporary or permanent basis). The memory　230 may represent a random access memory or any other suitable volatile or non-volatile storage device(s). For example, the instructions stored in the memory 230 may include instructions for decomposing a point cloud into patches, instructions for packing the patches on　2D frames, instructions for compressing the 2D frames, as well as instructions for encoding　2D frames in a certain order in order to generate a bitstream. The instructions stored in the memory　230 may also include instructions for rendering the point cloud on an omnidirectional　360° scene, as viewed through a VR headset, such as HMD 116 of FIG. 1. The persistent storage 235 may contain one or more components or devices supporting longer-term storage of data, such as a read only memory, hard drive, Flash memory, or optical disc.

[0075] In an embodiment of the disclosure, the communications interface 220 supports communications with other systems or devices. For example, the communications interface 220 could include a network interface card or a wireless transceiver facilitating communications over the network 102 of FIG. 1. The communications interface　220 may support communications through any suitable physical or wireless communication link(s). For example, the communications interface　220 may transmit a bitstream containing a 3D point cloud to another device such as one of the client devices　106-116.

[0076] In an embodiment of the disclosure, the I / O unit 225 allows for input and output of data. For example, the I / O unit　225 may provide a connection for user input through a keyboard, mouse, keypad, touchscreen, or other suitable input device. The I / O unit 225 may also send output to a display, printer, or other suitable output device. Note, however, that the I / O unit 225 may be omitted, such as when I / O interactions with the server 200 occur via a network connection.

[0077] In an embodiment of the disclosure, note that while FIG. 2 is described as representing the server 104 of FIG.　1, the same or similar structure could be used in one or more of the various client devices　106-116. For example, a desktop computer 106 or a laptop computer 112 could have the same or similar structure as that shown in FIG. 2.

[0078] FIG. 3 illustrates example apparatus in accordance with this disclosure.

[0079] In an embodiment of the disclosure, FIG. 3 illustrates an apparatus 300, and the apparatus　300 could represent one or more of the client devices 106-116 in FIG. 1. The apparatus 300 may be a mobile communication device, such as, for example, a mobile station, a subscriber station, a wireless terminal, a desktop computer (similar to the desktop computer　106 of FIG. 1), a portable electronic device (similar to the mobile device 108, the PDA　110, the laptop computer 112, the tablet computer 114, or the HMD 116 of FIG.　1), and the like. In an embodiment of the disclosure, one or more of the client devices 106-116 of FIG.　1 may include the same or similar configuration as the apparatus 300. In an embodiment of the disclosure, the apparatus 300 is an encoder, a decoder, or both. For example, the apparatus 300 is usable with data transfer, image or video compression, image or video decompression, encoding, decoding, and media rendering applications.

[0080] As shown in FIG. 3, in an embodiment of the disclosure, the apparatus 300 includes an antenna　305, a radio-frequency　(RF)　transceiver 310, transmit (TX) processing circuitry 315, a microphone 320, and receive (RX) processing circuitry 325. The RF transceiver 310 may include, for example, a RF transceiver, a BLUETOOTH transceiver, a WI-FI transceiver, a ZIGBEE transceiver, an infrared transceiver, and various other wireless communication signals. The apparatus　300 also includes a speaker　330, a processor 340, an input / output　(I / O) interface (IF) 345, an input 350, a display　355, a memory 360, and a sensor(s) 365. The memory 360 includes an operating system (OS)　361, and one or more applications 362.

[0081] In an embodiment of the disclosure, the RF transceiver 310 receives from the antenna 305, an incoming RF signal transmitted from an access point (such as a base station, WI-FI router, or BLUETOOTH device) or other device of the network 102 (such as a WI-FI, BLUETOOTH, cellular, 5G, LTE, LTE-A, WiMAX, or any other type of wireless network). The RF transceiver 310 down-converts the incoming RF signal to generate an intermediate frequency or baseband signal. The intermediate frequency or baseband signal is sent to the RX processing circuitry 325 that generates a processed baseband signal by filtering, decoding, and / or digitizing the baseband or intermediate frequency signal. The RX processing circuitry 325 transmits the processed baseband signal to the speaker　330 (such as for voice data) or to the processor 340 for further processing (such as for web browsing data).

[0082] In an embodiment of the disclosure, the TX processing circuitry 315 receives analog or digital voice data from the microphone 320 or other outgoing baseband data from the processor 340. The outgoing baseband data may include web data, e-mail, or interactive video game data. The TX processing circuitry　315 encodes, multiplexes, and / or digitizes the outgoing baseband data to generate a processed baseband or intermediate frequency signal. The RF transceiver　310 receives the outgoing processed baseband or intermediate frequency signal from the TX processing circuitry　315 and up-converts the baseband or intermediate frequency signal to an RF signal that is transmitted via the antenna 305.

[0083] In an embodiment of the disclosure, the processor 340 may include one or more processors or other processing devices. The processor 340 may execute instructions that are stored in the memory 360, such as the OS　361 in order to control the overall operation of the apparatus 300. For example, the processor　340 could control the reception of forward channel signals and the transmission of reverse channel signals by the RF transceiver 310, the RX processing circuitry 325, and the　TX processing circuitry　315 in accordance with well-known principles. The processor　340 may include any suitable number(s) and type(s) of processors or other devices in any suitable arrangement. For example, in an embodiment of the disclosure, the processor 340 includes at least one microprocessor or microcontroller. Example types of processor 340 include microprocessors, microcontrollers, digital signal processors, field programmable gate arrays, application specific integrated circuits, and discrete circuitry.

[0084] In an embodiment of the disclosure, the processor 340 is also capable of executing other processes and programs resident in the memory 360, such as operations that receive and store data. The processor 340 may move data into or out of the memory　360 as required by an executing process. In an embodiment of the disclosure, the processor 340 is configured to execute the one or more applications 362 based on the OS 361 or in response to signals received from external source(s) or an operator. Example, applications 362 may include an encoder, a decoder, a VR or AR application, a camera application (for still images and videos), a video phone call application, an email client, a social media client, a SMS messaging client, a virtual assistant, and the like. In an embodiment of the disclosure, the processor　340 is configured to receive and transmit media content.

[0085] In an embodiment of the disclosure, the processor 340 may use a number of vertices of the original base mesh and / or distortion information for each reconstruction iteration to simplify submeshes. Additionally or alternatively, the processor 340 may create and use a copy of a decimated mesh for reconstructing one or more submeshes as described in this disclosure. In some embodiments, the processor 340 may construct and transmit signaling information instructing another device to use a number of vertices of the original base mesh and / or distortion information for each reconstruction iteration to simplify submeshes and / or create and use a copy of a decimated mesh for reconstructing one or more submeshes.

[0086] In an embodiment of the disclosure, the processor 340 is also coupled to the I / O interface 345 that provides the apparatus 300 with the ability to connect to other devices, such as client devices 106-114. The I / O interface 345 is the communication path between these accessories and the processor　340.

[0087] In an embodiment of the disclosure, the processor 340 is also coupled to the input 350 and the display 355. The operator of the apparatus 300 may use the input 350 to enter data or inputs into the apparatus　300. The input 350 may be a keyboard, touchscreen, mouse, track ball, voice input, or other device capable of acting as a user interface to allow a user in interact with the apparatus　300. For example, the input 350 may include voice recognition processing, thereby allowing a user to input a voice command. In another example, the input 350 may include a touch panel, a (digital) pen sensor, a key, or an ultrasonic input device. The touch panel may recognize, for example, a touch input in at least one scheme, such as a capacitive scheme, a pressure sensitive scheme, an infrared scheme, or an ultrasonic scheme. The input　350 may be associated with the sensor(s)　365 and / or a camera　by providing additional input to the processor　340. In an embodiment of the disclosure, the sensor　365 includes one or more inertial measurement units (IMUs) (such as accelerometers, gyroscope, and magnetometer), motion sensors, optical sensors, cameras, pressure sensors, heart rate sensors, altimeter, and the like. The input 350 may also include a control circuit. In the capacitive scheme, the input 350 may recognize touch or proximity.

[0088] In an embodiment of the disclosure, the display 355 may be a liquid crystal display (LCD), light-emitting diode (LED) display, organic LED (OLED), active matrix OLED (AMOLED), or other display capable of rendering text and / or graphics, such as from websites, videos, games, images, and the like. The display　355 may be sized to fit within an HMD. The display 355 may be a singular display screen or multiple display screens capable of creating a stereoscopic display. In an embodiment of the disclosure, the display　355 is a heads-up display (HUD). The display 355 may display 3D objects, such as a 3D point cloud or mesh.

[0089] In an embodiment of the disclosure, the memory 360 is coupled to the processor 340. Part of the memory 360 could include a RAM, and another part of the memory 360 could include a Flash memory or other ROM. The memory　360 may include persistent storage (not shown) that represents any structure(s) capable of storing and facilitating retrieval of information (such as data, program code, and / or other suitable information). The memory 360 may contain one or more components or devices supporting longer-term storage of data, such as a read only memory, hard drive, Flash memory, or optical disc. The memory 360 also may contain media content. The media content may include various types of media such as images, videos, three-dimensional content, VR content, AR content, 3D point clouds, meshes, and the like.

[0090] In an embodiment of the disclosure, the apparatus 300 further includes one or more sensors 365 that may meter a physical quantity or detect an activation state of the apparatus 300 and convert metered or detected information into an electrical signal. For example, the sensor 365 may include one or more buttons for touch input, a camera, a gesture sensor, an IMU sensors (such as a gyroscope or gyro sensor and an accelerometer), an eye tracking sensor, an air pressure sensor, a magnetic sensor or magnetometer, a grip sensor, a proximity sensor, a color sensor, a bio-physical sensor, a temperature / humidity sensor, an illumination sensor, an Ultraviolet (UV) sensor, an Electromyography (EMG) sensor, an Electroencephalogram (EEG) sensor, an Electrocardiogram (ECG) sensor, an IR sensor, an ultrasound sensor, an iris sensor, a fingerprint sensor, a color sensor (such as a Red Green Blue (RGB) sensor), and the like. The sensor 365 may further include control circuits for controlling any of the sensors included therein.

[0091] In an embodiment of the disclosure, as discussed in greater detail below, one or more of these sensor(s) 365 may be used to control a user interface (UI), detect UI inputs, determine the orientation and facing the direction of the user for three-dimensional content display identification, and the like. Any of these sensor(s) 365 may be located within the apparatus 300, within a secondary device operably connected to the apparatus　300, within a headset configured to hold the apparatus　300, or in a singular device where the apparatus　300 includes a headset.

[0092] In an embodiment of the disclosure, the apparatus 300 may create media content such as generate a virtual object or capture (or record) content through a camera. The apparatus 300 may encode the media content to generate a bitstream, such that the bitstream can be transmitted directly to another electronic device or indirectly such as through the network 102 of FIG. 1. The apparatus 300 may receive a bitstream directly from another electronic device or indirectly such as through the network 102 of FIG. 1.

[0093] In an embodiment of the disclosure, although FIGS. 2 and 3 illustrate examples of apparatus, various changes can be made to FIGS. 2 and 3. For example, various components in FIGS. 2 and 3 could be combined, further subdivided, or omitted and additional components could be added according to particular needs. As a particular example, the processor 340 could be divided into multiple processors, such as one or more central processing units (CPUs) and one or more graphics processing units (GPUs). In addition, as with computing and communication, electronic devices and servers can come in a wide variety of configurations, and FIGS. 2 and 3 do not limit this disclosure to any particular electronic device or server.

[0094] FIG. 4 illustrates an example encoding process 400 in accordance with this disclosure. The encoding process 400 illustrated in FIG. 4 is for illustration only. FIG. 4 does not limit the scope of this disclosure to any particular implementation of an encoding process. For ease of explanation, the process 400 of FIG. 4 may be described as being performed using the apparatus 300 of FIG. 3. However, the process 400 may be used with any other suitable system and any other suitable electronic device.

[0095] In an embodiment of the disclosure, as shown in FIG. 4, the encoding process 400 performs pre-processing 402 on a dynamic mesh sequence using an encoder. The encoder may be represented by, or executed by, the server 200 shown in FIG. 2 or the apparatus 300 shown in FIG. 3. A base mesh, which typically has a smaller number of vertices compared to the original base mesh, is created via the pre-processing 402. A base mesh encoder 404 is used to quantize and compress the base mesh in either a lossy or lossless manner, and the base mesh is encoded as a compressed base mesh sub-bitstream. The base mesh may be intra coded (no prediction from neighboring base mesh frames) or inter coded (predicted from neighboring base mesh frames).

[0096] In an embodiment of the disclosure, the base mesh may then be reconstructed, providing a reconstructed base mesh. This reconstructed base mesh then undergoes one or more levels of subdivision and a displacement field is created by a displacement encoder 406 for each subdivision representing the difference between the original base mesh and the subdivided reconstructed base mesh. In inter-coding of a mesh frame, the base mesh is coded by sending vertex motions instead of compressing the base mesh directly. In either case, a displacement field is created. Each displacement of the displacement field has three components, denoted by x, y, and z. These may be with respect to a canonical coordinate system or a local coordinate system where x, y, and z represent the displacement in local normal, tangent, and bi-tangent directions. As shown in FIG. 4, a displacement sub-bitstream is provided by the displacement encoder 406.

[0097] In an embodiment of the disclosure, as also shown in FIG. 4, an attribute transfer operation may be performed using an video encoder 408. The video encoder 408 may use a deformed mesh, a static / dynamic mesh, and an attribute map to create an attribute sub-bitstream. A point cloud is a set of 3D points along with attributes such as color, normals, reflectivity, point-size, etc. that represent an object's surface or volume. These attributes are encoded as a compressed attribute bitstream. The encoding of the compressed attribute sub-bitstream may also include a padding operation, a color space conversion operation, and a video encoding operation. In various embodiments, an atlas may also be encoded as a compressed atlas sub-bitstream using an atlas encoder 410. The atlas component provides information to a decoding and / or rendering system on how to perform inverse reconstruction. For example, the atlas may provide information on how to perform the subdivision of a base mesh, how to apply the displacement vectors to the subdivided mesh vertices, and how to apply attributes to the reconstructed mesh.

[0098] In an embodiment of the disclosure, each of the sub-bitstreams are provided to a multiplexer 412. The multiplexer 412 multiplexes the sub-bitstreams and outputs a compressed bitstream (e.g., a V3C bitstream) that can, for example, be transmitted to, and decoded by, an electronic device such as the server 104 or the client devices 106-116. As shown in FIG. 4, the output compressed bitstream may include the compressed atlas bitstream, the compressed base mesh bitstream, the compressed displacements bitstream, and the compressed attribute bitstream as sub-bitstreams of the compressed bitstream.

[0099] Although FIG. 4 illustrates one example encoding process 400, various changes may be made to FIG. 4. For example, the number and placement of various components of the encoding process 400 may vary as needed or desired. In addition, the encoding process 400 may be used in any other suitable process and is not limited to the specific processes described above.

[0100] FIG. 5 illustrates an example mesh frame decoding process 500 in accordance with this disclosure. The decoding process 500 illustrated in FIG. 5 is for illustration only. FIG. 5 does not limit the scope of this disclosure to any particular implementation of a mesh frame decoding process. For ease of explanation, the process 500 of FIG. 5 may be described as being performed using the apparatus 300 of FIG. 3. However, the process 500 may be used with any other suitable system and any other suitable electronic device.

[0101] In an embodiment of the disclosure, the decoding process 500 involves a demultiplexer 502 of a decoder that receives an incoming bitstream, e.g., the bitstream output by the encoder of the process 400 of FIG. 4. The demultiplexer 502 separates out the various component sub-bitstreams from the incoming bitstream, including the compressed base mesh sub-bitstream, the compressed displacement sub-bitstream, the compressed attribute sub-bitstream, and the atlas sub-bitstream, such as described with respect to FIG. 4. The compressed attribute sub-bitstream is decoded using a video decoder 504, the decoded attributes are processed using a color space conversion operation, and the original attributes for the mesh are recovered. The decoding process also may include processing the atlas sub-bitstream using an atlas decoder 506 to obtain the atlas data for the base mesh. The atlas sub-bitstream may be decoded to obtain an atlas that provides information on how to perform inverse reconstruction. For example, the atlas may provide information on how to perform the subdivision of a base mesh, how to apply the displacement vectors to the subdivided mesh vertices, and how to apply attributes to the reconstructed mesh.

[0102] In an embodiment of the disclosure, the decoding process 500 also includes processing the base mesh sub-stream using a base mesh decoder 508. The base mesh decoder 508 decodes the base mesh sub-bitstream to form a reconstructed base mesh 512. A base mesh processing operation 509 is used with a displacement processing operation 511 to apply subdivision to the reconstructed base mesh 512. Particularly, the decoding process 500 includes decoding the displacements sub-bitstream using a displacement decoder 510, which can, in some embodiments, be the same decoder as the video decoder 504. The decoded displacements data may undergo an image unpacking operation, an inverse quantization operation, and an inverse wavelet transform operation, as part of recovering the positions displacements data. Recovering the positions displacements data may also include performing using displacement processing operation 511 on the mesh frames recovered using a base mesh decoder 508, and extracting x, y, z components (normal, tangent, bitangent) from the subdivided mesh frames. The received displacement field is decompressed and added to the reconstructed base mesh 512 as part of a reconstruction operation 514 to generate a final reconstructed mesh in the decoder, e.g., the reconstructed dynamic mesh sequence shown in FIG. 5.

[0103] In an embodiment of the disclosure, although FIG. 5 illustrates one example frame decoding process 500, various changes may be made to FIG. 5. For example, the number and placement of various components of the decoding process 500 may vary as needed or desired. In addition, the decoding process 500 may be used in any other suitable process and is not limited to the specific processes described above. Also, while shown as a series of steps, various steps in FIG. 5 may overlap, occur in parallel, or occur any number of times.

[0104] Various standards have been proposed with respect to vertex mesh and dynamic mesh coding. The following documents are hereby incorporated by reference in their entirety as if fully set forth herein:

[0105] "V-DMC TMM 9.0, ISO / IEC SC29 WG07 N00951, Sept. 2024; and

[0106] Study of technologies for Video-based mesh coding, ISO / IEC SC29 WG07 N00960, August 2024

[0107] In an embodiment of the disclosure, as noted herein, a base mesh may be intra-coded (no prediction from neighboring base mesh frames) or inter-coded (predicted from neighboring base mesh frames). This disclosure provides various improvements to inter-coding of base meshes. In inter-coding, the vertex positions of the current frame are predicted from corresponding vertex position in a reference frame(s). The connectivity is assumed to be identical with the connectivity in the reference frame(s). In some cases, a reference frame may have duplicate vertices. A vertex is defined as a duplicate vertex if its position is identical to the position of another vertex that occurs earlier in the scan order through the vertices.

[0108] In an embodiment of the disclosure, existing approaches use motion vector signaling where, for each non-duplicate vertex in the reference frame, a motion vector is always signaled. For each duplicate vertex in the reference frame, a flag is sent to indicate whether a motion vector is explicitly signaled for that vertex.

[0109] In an embodiment of the disclosure, existing syntax, semantics and decoding processes related to motion vectors for vertices are as follows in Table 1.

[0110]

[0111] Table 1 - Base mesh inter submesh data unit syntax

[0112] Here, the syntax elementsbmidu_mv_signalled_flag_last1pos[subMeshID] andbmidu_mv_signalled_flag_trailing0[　subMeshID　], together, signal whether a motion vector is signaled for each duplicate vertex in the reference frame.

[0113] The corresponding semantics are as follows:

[0114] H.8.5.1.4Base mesh Profile toolset constraints information semantics

[0115] ...

[0116] bmptc_motion_vector_derivation_disable_flagequal to 1 specifies the motion vector derivation is disabled. When bmptc_motion_vector_derivation_disable_flag equal to 1, bmidu_mv_signalled_flag_last1pos[　i　] is always 0 for any possible submesh with submeshID i. When bmptc_motion_vector_derivation_disable_flag is not present, bmptc_motion_vector_derivation_disable_flag is inferred to be equal to 0.

[0117] ...

[0118] H.8.5.8.1Base mesh inter submesh data unit default semantics

[0119] ...

[0120] bmidu_mv_signalled_flag_last1pos[　submeshID　] specifies the number of bmidu_mv_signalled_flag in the current submesh, with submesh ID equal to submeshID.

[0121] bmidu_mv_signalled_flag_trailing0[　submeshID　] specifies that bmidu_mv_signalled_flag_trailing0 BmiduMvFlag values are derived to be equal to 0 in the current submesh, with submesh ID equal to submeshID.

[0122] ...

[0123] bmidu_mv_signalled_flag[　submeshID　][　d　] indicates a motion vector for the vertex with index d, whose output of findIndexInArray() is not -1, is present in the bitstream. bmidu_mv_signalled_flag[　submeshID　][　d　] is used to derive BmiduMvFlag[　submeshID][　v　] variable, which indicates that a motion vector for the vertex with index v is present in the bitstream.

[0124]

[0125]

[0126] where findIndexInArray(　) function is defined in subclause H.5

[0127] In an embodiment of the disclosure, the structure bimdu_mv_signalled_flag[d] stores the value of the flag duplicate vertex with index d. The syntax elements bimdu_mv_signalled_flag_last1pos indicates the position of the last duplicate vertex for which motion vector is explicitly signalled. The syntax elements bimdu_mv_signalled_flag_trailing0 indicates the number of duplicate vertices following the last1pos for which no motion vector is signalled. The number of motion vectors that are parsed from the bitstream depend on the number of zeroes in bimdu_mv_signalled_flag, the number of vertices in the submesh and the value of bimdu_mv_signalled_flag_trailing0.

[0128] In an embodiment of the disclosure, this disclosure provides various ways in which the above inter-coding could be improved. Throughout this disclosure, changes to the existing inter-coding elements are shown inside bolded double brackets to show deletions. Additions are shown inside double dashes (--).

[0129] FIG. 6 illustrates an example encoding method 600 in accordance with this disclosure. For ease of explanation, the method 600 of FIG. 6 is described as being performed using the apparatus 300 of FIG. 3. However, the method 600 may be used with any other suitable system and any other suitable electronic device.

[0130] In an embodiment of the disclosure, the method 600 may be performed as part of creating a compressed bitstream having a base mesh sub-bitstream, such as that described with respect to FIG. 4. As shown in FIG. 6, at step 602, and as also described with respect to FIG. 4, the apparatus 300 determines a value of a motion vector derivation disable flag and includes the value of the motion vector derivation disable flag in signaling information. The apparatus 300 may determine a value of a motion vector derivation disable flag to be included in signaling information. At step 604, the electronic device determines two syntax elements related to duplicate vertices and include the two syntax elements in the signaling information, where the two syntax elements include a first syntax element for a last 1-bit position and a second syntax element for a trailing 0-bit. The apparatus 300 may determine a two syntax elements related to duplicate vertices to be included in the signaling information.

[0131] In an embodiment of the disclosure, at step 606, the apparatus 300 may provide signaling of the two syntax elements, where one or more bitstream conformance conditions are related to the two syntax elements. For example, a conformance condition may be that, when a motion vector derivation disable flag is equal to 1, the two syntax elements are always zero. A conformance condition may also be that the sum of the two syntax elements is equal to, or, in some embodiments, is less than or equal to, the number of duplicate vertices in the reference submesh.

[0132] In an embodiment of the disclosure, at step 608, the apparatus 300 creates the compressed bitstream including the signaling information. As described in this disclosure, the compressed bitstream may be multiplexed to include sub-bitstreams such as an atlas sub-bitstream, a base mesh sub-bitstream, a displacement sub-bitstream, and an attribute sub-bitstream. The output compressed bitstream may be transmitted to an external device or to a storage on the apparatus 300.

[0133] In an embodiment of the disclosure, although FIG. 6 illustrates one example of an encoding method 600, various changes may be made to FIG. 6. For example, while shown as a series of steps, various steps in FIG. 6 may overlap, occur in parallel, or occur any number of times. For example, in some embodiments, as also described in this disclosure, instead of using conformance conditions, conditional signaling of the two syntax elements may be used. For example, when using conditional signaling, in the syntax table, bmidu_mv_signalled_flag_last1pos[i] and bmidu_mv_signalled_flag_trailing0[i] are signaled only when bmptc_motion_vector_derivation_disable_flag is equal to 1. In this case, the semantics state a default value of 0 for bmidu_mv_signalled_flag_last1pos[i] and bmidu_mv_signalled_flag_trailing0[i] when they are not present. This alternative method may be used to achieve the same effect as the conformance condition.

[0134] FIG. 7 illustrates an example decoding method 700 in accordance with this disclosure.

[0135] In an embodiment of the disclosure, these conformance conditions may also be used during decoding. For ease of explanation, the method 700 of FIG. 7 is described as being performed using the apparatus 300 of FIG. 3. However, the method 700 may be used with any other suitable system and any other suitable electronic device.

[0136] In an embodiment of the disclosure, as shown in FIG. 7, at step 702, the apparatus 300 receives a compressed bitstream including a base mesh sub-bitstream, such as described with respect to FIG. 5. At step 704, the apparatus 300 decodes at least a portion of the compressed bitstream. At step 706, the apparatus 300 determines a value of a motion vector derivation disable flag in the signaling information.

[0137] In an embodiment of the disclosure, at step 708 signaling of two syntax elements related to duplicate vertices is received by the decoder. The apparatus 300 may obtain two syntax elements related to duplicate vertices. The values of the two syntax elements are based on the value of the motion vector derivation disable flag. The two syntax elements may include a first syntax element for a last 1-bit position and a second syntax element for a trailing 0-bit. At step 710, the apparatus 300 provides one or more bitstream conformance conditions based on the two syntax elements. The apparatus 300 may determine two syntax elements related to duplicate vertices.

[0138] In an embodiment of the disclosure, at step 712, the apparatus 300 confirms, based on the one or more bitstream conformance conditions, a correct number of motion vectors being signaled in a bitstream. For example, in some embodiments, the bitstream conformance conditions may include that, when bmptc_motion_vector_derivation_disable_flag is equal to 1, it is a requirement of bitstream conformance that bmidu_mv_signalled_flag_last1pos[i] and bmidu_mv_signalled_flag_trailing0[i] are is always 0. In some embodiments, a requirement of bitstream conformance may be that the sum of mcp_mv_signalled_flag_count and mcp_mv_signalled_flag_trailing0 is less than or equal to the number of duplicate vertices in the reference submesh. The decoder receiving the bitstream is thus able to verify these conformance conditions, as bmidu_mv_signalled_flag_last1pos[i] and bmidu_mv_signalled_flag_trailing0[i] are always signaled.

[0139] In an embodiment of the disclosure, the corresponding semantics may also specify the ranges. For instance, a mcp_mv_signalled_flag_count specifies the number of mcp_mv_signalled_flag[　d　] present in the bitstream. In various embodiments, the value of mcp_mv_signalled_flag_count shall be in the range of 0 to (　mcp_vertex_count　-　1　), inclusive. Additionally, mcp_mv_signalled_flag_trailing0 specifies the number of mcp_mv_signalled_flag[　d　] not present in the bitstream and assumed to be equal to 0. In various embodiments, the value of mcp_mv_signalled_flag_trailing0 shall be in the range of 0 to (　mcp_vertex_count　-　mcp_mv_signalled_flag_count　-　1　), inclusive.

[0140] In an embodiment of the disclosure, at step 714, the apparatus 300 outputs decoded content using a reconstructed base mesh, such as 3D video including a reconstructed mesh-frame, where the base mesh is reconstructed based on the conformance conditions. The output decoded content may be transmitted to an external device or to a storage on the apparatus 300, for instance.

[0141] In an embodiment of the disclosure, although FIG. 7 illustrates one example of a decoding method 700, various changes may be made to FIG. 7. For example, while shown as a series of steps, various steps in FIG. 7 may overlap, occur in parallel, or occur any number of times. For example, in some embodiments, as also described in this disclosure, instead of using conformance conditions, conditional signaling of the two syntax elements may be used. For example, when using conditional signaling, in the syntax table, bmidu_mv_signalled_flag_last1pos[i] and bmidu_mv_signalled_flag_trailing0[i] are signaled only when bmptc_motion_vector_derivation_disable_flag is equal to 1. In this case, the semantics state a default value of 0 for bmidu_mv_signalled_flag_last1pos[i] and bmidu_mv_signalled_flag_trailing0[i] when they are not present. This alternative method may be used to achieve the same effect as the conformance condition.

[0142] In an embodiment of the disclosure, as noted above, the conformance conditions may be associated with syntax elements related to duplicate vertices that are signaled in the bitstream. The two syntax elements may include a first syntax element for a last 1-bit position and a second syntax element for a trailing 0-bit, i.e., the bmidu_mv_signalled_flag_last1pos and bimdu_mv_signalled_flag_trailing0 syntax elements. FIG. 8 illustrates an example method 800 of setting conformance conditions in accordance with this disclosure. For ease of explanation, the method 800 of FIG. 8 is described as being performed using the apparatus 300 of FIG. 3. However, the method 800 may be used with any other suitable system and any other suitable electronic device.

[0143] In an embodiment of the disclosure, at step 802, one or more conformance conditions are set. This disclosure provides various conformance conditions as detailed below and as shown in steps 804-814 of FIG. 8.

[0144] In an embodiment of the disclosure, at step 804, a conformance condition may be that, when the value of the motion vector derivation disable flag is 1, the one or more bitstream conformation conditions include that the first syntax element for the last 1-bit position and the second syntax element for the trailing 0-bit are both a value of 0. That is, in existing semantics ofbmptc_motion_vector_derivation_disable_flag, when the flag is 1, bmidu_mv_signalled_flag_last1pos[ submeshID ] is always 0 for any possible submesh with submeshID i. But embodiments of this disclosure modify this language to indicate clear conformance conditions on bmidu_mv_signalled_flag_last1pos and bimdu_mv_signalled_flag_trailing0 when bmptc_motion_vector_derivation_disable_flag is equal to 1.

[0145] Thus, in some embodiments, the semantics ofbmptc_motion_vector_derivation_disable_flagis modified as follows:

[0146] bmptc_motion_vector_derivation_disable_flagequal to 1 specifies the motion vector derivation is disabled.

[0147] When bmptc_motion_vector_derivation_disable_flag equal to 1, --it is a requirement of bitstream conformance that--[[if]]bmidu_mv_signalled_flag_last1pos[　i　] is always 0 for any possible submesh with submeshID i. When bmptc_motion_vector_derivation_disable_flag is not present, bmptc_motion_vector_derivation_disable_flag is inferred to be equal to 0.

[0148] Furthermore, the same condition may be imposed on bmidu_mv_signalled_flag_trailing0 [submeshID]. This is because if bmidu_mv_signalled_flag_trailing0 [submeshID] is greater than 0, the decoder needs to determine duplicate vertices. This is contrary to the idea that no duplicate vertex determination should be necessary whenbmptc_motion_vector_derivation_disable_flagis equal to 1. Thus, in some embodiments, the semantics ofbmptc_motion_vector_derivation_disable_flagis modified as follows:

[0149] bmptc_motion_vector_derivation_disable_flagequal to 1 specifies the motion vector derivation is disabled.

[0150] When bmptc_motion_vector_derivation_disable_flag equal to 1, --it is a requirement of bitstream conformance that--[[if]]bmidu_mv_signalled_flag_last1pos[　i　] --and bmidu_mv_signalled_flag_trailing0[　i　] are--[[is]]always 0 for any possible submesh with submeshID i. When bmptc_motion_vector_derivation_disable_flag is not present, bmptc_motion_vector_derivation_disable_flag is inferred to be equal to 0.

[0151] In an embodiment of the disclosure, instead of the bitstream conformance conditions in the semantics, the signalling ofbmidu_mv_signalled_flag_last1pos[　submeshID　] andbmidu_mv_signalled_flag_trailing0[　submeshID　] is made conditional onbmptc_motion_vector_derivation_disable_flagbeing 0. The syntax and semantics are modified as follows in Table 2 and the following syntax and semantics recitation:

[0152]

[0153] Table 2 - Base mesh inter submesh data unit syntax

[0154] H.8.5.1.4Base mesh Profile toolset constraints information semantics

[0155] ...

[0156] bmptc_motion_vector_derivation_disable_flagequal to 1 specifies the motion vector derivation is disabled.[[When bmptc_motion_vector_derivation_disable_flag equal to 1, bmidu_mv_signalled_flag_last1pos[　i　] is always 0 for any possible submesh with submeshID i.]]When bmptc_motion_vector_derivation_disable_flag is not present, bmptc_motion_vector_derivation_disable_flag is inferred to be equal to 0.

[0157] ...

[0158] H.8.5.8.1Base mesh inter submesh data unit default semantics

[0159] ...

[0160] bmidu_mv_signalled_flag_last1pos[　submeshID　] specifies the number of bmidu_mv_signalled_flag in the current submesh, with submesh ID equal to submeshID.

[0161] --When bmidu_mv_signalled_flag_last1pos[　submeshID　] is not present, it is inferred to be equal to 0.--

[0162] bmidu_mv_signalled_flag_trailing0[　submeshID　] specifies that bmidu_mv_signalled_flag_trailing0 BmiduMvFlag values are derived to be equal to 0 in the current submesh, with submesh ID equal to submeshID.

[0163] --When bmidu_mv_signalled_flag_trailing0[　submeshID　] is not present, it is inferred to be equal to 0.--

[0164] ...

[0165] Since it is a requirement of bitstream conformance that (bmidu_mv_signalled_flag_last1pos + bmidu_mv_signalled_flag_trailing0) is less than bmidu_vertex_count,bmidu_mv_signalled_flag_last1posandbmidu_mv_signalled_flag_trailing0have to satisfy:

[0166] 0 <= bmidu_mv_signalled_flag_last1pos[　submeshID　] < bmidu_vertex_count[　submeshID　] and

[0167] 0 <= bmidu_mv_signalled_flag_trailing[　submeshID　] < bmidu_vertex_count[　submeshID　].

[0168] Thus, in some embodiments, as shown in FIG. 8, a conformance condition, shown at step 806, may include that the the first syntax element for the last 1-bit position and the second syntax element for the trailing 0-bit are each within a particular range. For example, the semanticsbmidu_mv_signalled_flag_last1pos[ submeshID] andbmidu_mv_signalled_flag_trailing0[　submeshID　] may be modified to reflect the valid ranges.

[0169] In an embodiment of the disclosure, as shown at step 808, the particular range for the first syntax element for the last 1-bit position may be set to be 0 to a first value corresponding to a base mesh vertex count for a submesh minus 1, inclusive. In various embodiments, as shown at step 810, the particular range for the second syntax element for the trailing 0-bit may be set to be 0 to a second value corresponding to the base mesh vertex count for the submesh minus the last 1-bit position minus 1, inclusive.

[0170] Based on these conformance conditions concerning the ranges, the signalling ofbmidu_mv_signalled_flag_trailing0[　submeshID　] is refined as follows:

[0171]

[0172] Table 3 - Base mesh inter submesh data unit syntax

[0173] H.8.5.1.4Base mesh Profile toolset constraints information semantics

[0174] ...

[0175] bmptc_motion_vector_derivation_disable_flagequal to 1 specifies the motion vector derivation is disabled.[[When bmptc_motion_vector_derivation_disable_flag equal to 1, bmidu_mv_signalled_flag_last1pos[　i　] is always 0 for any possible submesh with submeshID i.]]When bmptc_motion_vector_derivation_disable_flag is not present, bmptc_motion_vector_derivation_disable_flag is inferred to be equal to 0.

[0176] H.8.5.8.1 Base mesh inter submesh data unit default semantics

[0177] ...

[0178] bmidu_mv_signalled_flag_last1pos[　submeshID　] specifies the number of bmidu_mv_signalled_flag in the current submesh, with submesh ID equal to submeshID.

[0179] --The value of bmidu_mv_signalled_flag_last1pos[　submeshID　] shall be in the range of 0 to (bmidu_vertex_count[ submeshID ]-1), inclusive. When bmidu_mv_signalled_flag_last1pos[　submeshID　] is not present, it is inferred to be equal to 0.--

[0180] bmidu_mv_signalled_flag_trailing0[　submeshID　] specifies that bmidu_mv_signalled_flag_trailing0 BmiduMvFlag values are derived to be equal to 0 in the current submesh, with submesh ID equal to submeshID.

[0181] --The value of bmidu_mv_signalled_flag_trailing0[　submeshID　] shall be in the range of 0 to (bmidu_vertex_count[ submeshID ]-1), inclusive. When bmidu_mv_signalled_flag_trailing0[　submeshID　] is not present, it is inferred to be equal to 0.--

[0182] ...

[0183] In an embodiment of the disclosure, the range of bmidu_mv_signalled_flag_trailing0 is further tightened based on the value of bmidu_mv_signalled_flag_last1pos as follows:

[0184] 0 <= bmidu_mv_signalled_flag_last1pos[　submeshID　] < bmidu_vertex_count[　submeshID　]

[0185] and

[0186] 0 <= bmidu_mv_signalled_flag_trailing[　submeshID　] < (bmidu_vertex_count[　submeshID　] - bmidu_mv_signalled_flag_last1pos[　submeshID　]).

[0187] Thus, In an embodiment of the disclosure, the conformance condition on the sum of bmidu_mv_signalled_flag_last1pos and bmidu_mv_signalled_flag_trailing0 may be eliminated.

[0188] H.8.5.8.1 Base mesh inter submesh data unit default semantics

[0189] ...

[0190] bmidu_mv_signalled_flag_last1pos[　submeshID　] specifies the number of bmidu_mv_signalled_flag in the current submesh, with submesh ID equal to submeshID.

[0191] --The value of bmidu_mv_signalled_flag_last1pos[　submeshID　] shall be in the range of 0 to (bmidu_vertex_count[　submeshID　]　-　1), inclusive.--

[0192] bmidu_mv_signalled_flag_trailing0[　submeshID　] specifies that bmidu_mv_signalled_flag_trailing0 BmiduMvFlag values are derived to be equal to 0 in the current submesh, with submesh ID equal to submeshID.

[0193] --The value of bmidu_mv_signalled_flag_trailing0[　submeshID　] shall be in the range of 0 to (bmidu_vertex_count[ submeshID ]　-　bmidu_mv_signalled_flag_last1pos[　submeshID　]　-　1), inclusive.--

[0194] It is a requirement of bitstream conformance that if bmidu_mv_signalled_flag_last1pos[　submeshID　] plus bmidu_mv_signalled_flag_trailing0[　submeshID　]is larger than 0 for a submesh with submesh ID equal to submeshID, mesh_deduplicate_method, if present in the corresponding intra submesh data unit, shall be equal to MESH_POSITION_DEDUP_NONE.

[0195] [[It is a requirement of bitstream conformance that bmidu_mv_signalled_flag_last1pos[　submeshID　] plus bmidu_mv_signalled_flag_trailing0[　submeshID　] is smaller than bmidu_vertex_count[　submeshID　].]]

[0196] ...

[0197] In an embodiment of the disclosure, the above elimination of the conformance condition on the sum of bmidu_mv_signalled_flag_last1pos and bmidu_mv_signalled_flag_trailing0 may be combined with conditional signalling of bmidu_mv_signalled_flag_last1pos and bmidu_mv_signalled_flag_trailing0 based on the value of bmptc_motion_vector_derivation_disable_flag, such as shown in Table 4 below and the following syntax:

[0198]

[0199] Table 4 - Base mesh inter submesh data unit syntax

[0200] H.8.5.1.4Base mesh Profile toolset constraints information semantics

[0201] ...

[0202] bmptc_motion_vector_derivation_disable_flagequal to 1 specifies the motion vector derivation is disabled.[[When bmptc_motion_vector_derivation_disable_flag equal to 1, bmidu_mv_signalled_flag_last1pos[　i　] is always 0 for any possible submesh with submeshID i.]]When bmptc_motion_vector_derivation_disable_flag is not present, bmptc_motion_vector_derivation_disable_flag is inferred to be equal to 0.

[0203] H.8.5.8.1Base mesh inter submesh data unit default semantics

[0204] ...

[0205] bmidu_mv_signalled_flag_last1pos[　submeshID　] specifies the number of bmidu_mv_signalled_flag in the current submesh, with submesh ID equal to submeshID.

[0206] --The value of bmidu_mv_signalled_flag_last1pos[　submeshID　] shall be in the range of 0 to (bmidu_vertex_count[　submeshID　]　-　1), inclusive. When bmidu_mv_signalled_flag_last1pos[ submeshID ] is not present, it is inferred to be equal to 0.--

[0207] bmidu_mv_signalled_flag_trailing0[　submeshID　] specifies that bmidu_mv_signalled_flag_trailing0 BmiduMvFlag values are derived to be equal to 0 in the current submesh, with submesh ID equal to submeshID.

[0208] --The value of bmidu_mv_signalled_flag_trailing0[　submeshID　] shall be in the range of 0 to (bmidu_vertex_count[ submeshID ]　-　bmidu_mv_signalled_flag_last1pos[　submeshID　]　-　1), inclusive. When bmidu_mv_signalled_flag_trailing0[ submeshID ] is not present, it is inferred to be equal to 0.--

[0209] It is a requirement of bitstream conformance that if bmidu_mv_signalled_flag_last1pos[　submeshID　] plus bmidu_mv_signalled_flag_trailing0[　submeshID　]is larger than 0 for a submesh with submesh ID equal to submeshID, mesh_deduplicate_method, if present in the corresponding intra submesh data unit, shall be equal to MESH_POSITION_DEDUP_NONE.

[0210] [[It is a requirement of bitstream conformance that bmidu_mv_signalled_flag_last1pos[　submeshID　] plus bmidu_mv_signalled_flag_trailing0[　submeshID　] is smaller than bmidu_vertex_count[　submeshID　].]]

[0211] ...

[0212] It may happen that the number signalled motion vectors may not match the number of entries with value 1 in BmiduMvFlag[　submeshID　][　v　] if the sum of bmidu_mv_signalled_flag_last1pos and bmidu_mv_signalled_flag_trailing0 is not exactly equal to the number of duplicate vertices. Consider the following example:

[0213] In an embodiment of the disclosure, suppose that there are 50 total vertices and 7 duplicate vertices. Suppose that only the motion vectors corresponding to the first and third duplicate vertex need to be sent explicitly. In this case, bmidu_mv_signalled_flag_last1pos would be signalled as 3 and bmidu_mv_signalled_flag array would be

[0101] . The syntax element bmidu_mv_signalled_flag_trailing0 should be signalled as 4. In this case, there would be a total of 45 motion vectors signalled (43 motion vectors for non-duplicate vertices + 2 motion vectors for duplicate vertices).

[0214] However, in an embodiment of the disclosure, if an encoder incorrectly signals bmidu_mv_signalled_flag_trailing0 as 6, NoSignalledMvCount will be incremented by 6. Then, the number of motion vectors signalled in the bitstream will be 43 instead of 45. However, the derivation of BmiduMvFlag[　submeshID　][　v　] will assign a value of 1 to 45 entries. In this case, when assigning motion vectors to vertices, there will be two vertices which need a motion vector but it is not found in the bitstream.

[0215] To avoid this situation, in an embodiment of the disclosure, a bitstream conformance condition may be imposed as shown at step 812 of FIG. 8, such that, when the value of the motion vector derivation disable flag is 0, the one or more bitstream conformation conditions include that a sum of the first syntax element for the last 1-bit position and the second syntax element for the trailing 0-bit is equal to a number of the duplicate vertices in a submesh. This bitstream conformance condition may be imposed after the semantics ofbmidu_mv_signalled_flag_trailing0[　submeshID　] as follows:

[0216] bmidu_mv_signalled_flag_trailing0[　submeshID　] specifies that 쪋

[0217] --It is a requirement of bitstream conformance that when the value of bmptc_motion_vector_derivation_disable_flag is equal to 0, the sum of bmidu_mv_signalled_flag_last1pos[　submeshID　] and bmidu_mv_signalled_flag_trailing0[　submeshID　] is equal to the number of duplicate vertices in the reference submesh of the submesh with submesh ID equal to submeshID.--

[0218] ...

[0219] In an embodiment of the disclosure, a slightly weaker bitstream conformance condition may be imposed, as shown at step 814 of FIG. 8, such that, when the value of the motion vector derivation disable flag is 0, the one or more bitstream conformation conditions include that a sum of the first syntax element for the last 1-bit position and the second syntax element for the trailing 0-bit is less than or equal to a number of duplicate vertices in the reference submesh. This is shown as follows:

[0220] bmidu_mv_signalled_flag_trailing0[　submeshID　] specifies that ...

[0221] --It is a requirement of bitstream conformance that when the value of bmptc_motion_vector_derivation_disable_flag is equal to 0, the sum of bmidu_mv_signalled_flag_last1pos[　submeshID　] and bmidu_mv_signalled_flag_trailing0[　submeshID　] is less than or equal to the number of duplicate vertices in the reference submesh of the submesh with submesh ID equal to submeshID.--

[0222] ...

[0223] In an embodiment of the disclosure, the "less than or equal to" condition implies that it is possible for the bitstream to contain an excess number of motion vectors. That is, the number of motion vectors in the bitstream is greater than the number of ones in BmiduMvFlag array. In this case, the excess motion vectors will be discarded by the decoder.

[0224] In an embodiment of the disclosure, if the value of BmiduMvFlag[　submeshID　][　v　] indicates that a motion vector should be signalled for vertex v, but no motion vector is found in the bitstream, the signalled value is assigned a default of (0, 0, 0).

[0225] In an embodiment of the disclosure, when the value ofbmptc_intra_frames_only_flagis equal to 1,bmsh_typemay only be I_SUBMESH. So, in some embodiments, the signaling ofbmsh_typeis made conditional onbmptc_intra_frames_only_flag. The semantics ofbmptc_intra_frames_only_flagandbmsh_typeis also modified, as shown in the following Table 5 and the following syntax elements.

[0226]

[0227] Table 5 - Base mesh submesh header syntax

[0228] H.8.5.4Base mesh submesh header semantics

[0229] ...

[0230] bmsh_typespecifies the coding type of the current submesh according to Table　H-5. The value of bmsh_type shall be equal to 0, 1, or 2 in bitstreams conforming to this version of this document. Other values of bmsh_type are reserved for future use by ISO / IEC. Decoders conforming to this version of this document shall ignore reserved values of bmsh_type.

[0231] --When not present, the value of bmsh_type is inferred to be equal to 1.--

[0232] In an embodiment of the disclosure, Table 6 and the following syntax elements show the name association to the bmsh_type and toolset constraints information semantics.

[0233]

[0234] Table 6 - Name association to bmsh_type

[0235] H.8.5.1.4Base mesh Profile toolset constraints information semantics

[0236] ..

[0237] bmptc_intra_frames_only_flagequal to 1 specifies that the bitstream

[0238] --only contains frames with the value of bmsh_type equal to 1.--

[0239] When not present, the --value of-- bmptc_intra_frames_only_flag is inferred to be equal to 0.

[0240] In the 17th meeting of ISO / IEC SC29 WG07 held in Kemer, Turkiye, November 2024, it was decided to create a separate Annex (Annex L) for the motion codec part of the base mesh codec. The motion codec which is currently part of Annex H will be moved to a new Annex (Annex L). The base mesh codec will have the flexibility of using a different motion codec than the one specified in Annex L.

[0241] In an embodiment of the disclosure, this disclosure thus proposes changes necessitated by such changes. For example, the syntax elements bmidu_mv_signalled_flag_last1pos and bmidu_mv_signalled_flag_trailing0 will now belong to Annex L. Also, if a motion codec different from that in Annex L is used, those syntax elements will not be present at all. Thus, it may not be appropriate to refer to those syntax elements in the bitstream conformance conditions in Annex H as proposed above.

[0242] Therefore, in an embodiment of the disclosure, the bitstream conformance condition may be converted to a profile constraint. For example, when a base mesh profile uses Annex L as the motion codec, the bitstream will satisfy the following constraint:

[0243] When bmptc_motion_vector_derivation_disable_flag is equal to 1, the value of syntax elements bmidu_mv_signalled_flag_last1pos and bmidu_mv_signalled_flag_trailing0 shall be equal to 0.

[0244] In an embodiment of the disclosure, if a separate profile is created which uses Annex L as the motion codec and bmptc_motion_vector_derivation_disable_flag is constrained to be equal to 1, then the profile restriction will simply be that the value of syntax elements bmidu_mv_signalled_flag_last1pos and bmidu_mv_signalled_flag_trailing0 shall be equal to 0.

[0245] In an embodiment of the disclosure, the syntax element bmptc_motion_vector_derivation_disable_flag is explicitly passed to Annex L as input during the invocation of motion codec. Or alternatively, all the syntax elements from Annex H are made available to Annex L during invocation of motion codec. In this case, the bitstream conformance condition may be moved to Annex L after the semantics of bmidu_mv_signalled_flag_last1pos and bmidu_mv_signalled_flag_trailing0 as follows:

[0246] --When bmptc_motion_vector_derivation_disable_flag equal to 1, it is a requirement of bitstream conformance that bmidu_mv_signalled_flag_last1pos and bmidu_mv_signalled_flag_trailing0 are always 0.--

[0247] In an embodiment of the disclosure, the dependence on bmptc_motion_vector_derivation_disable_flag in the bitstream conformance condition may be eliminated. Consider that the bitstream conformance condition (or profile restriction) that was proposed earlier is included in the specification, which may be expressed as follows. When bmptc_motion_vector_derivation_disable_flag equal to 1, it is a requirement of bitstream conformance that bmidu_mv_signalled_flag_last1pos and bmidu_mv_signalled_flag_trailing0 are always 0. In this case, when bmptc_motion_vector_derivation_disable_flag equal to 1, the sum of bmidu_mv_signalled_flag_last1pos and bmidu_mv_signalled_flag_trailing0 is 0. This satisfies the condition that the sum is less than or equal to the number of duplicate vertices in the reference submesh.

[0248] Thus, in an embodiment of the disclosure, the bitstream conformance condition may be simplified as follows:

[0249] --It is a requirement of bitstream conformance that the sum of bmidu_mv_signalled_flag_last1pos and bmidu_mv_signalled_flag_trailing0 is less than or equal to the number of duplicate vertices in the reference submesh.--

[0250] Here in the interest of clarity and simplicity, the submesh IDs have been dropped from the syntax elements since Annex L will be invoked separately for each submesh.

[0251] In an embodiment of the disclosure, due to moving of the motion codec from Annex H to a separate (Annex L) described above, various syntax elements may be changed. For example, The prefix for all syntax elements may be changed from "bmidu_" to "mcp_." Also, "mv_signalled_flag_last1pos" may be renamed to "mv_signalled_flag_count," "bmidu_mv_signalled_flag_last1pos" may be renamed to "mcp_mv_signalled_flag_count," "bmidu_mv_signalled_flag_trailing0" may be renamed to "mcp_mv_signalled_flag_trailing0," and "bmidu_mv_signalled_flag" may be renamed to "mcp_mv_signalled_flag."

[0252] For completeness, example conformance conditions based on the above-described conformance conditions, but with the updated syntax elements, are provided as follows.

[0253] L.8.4.3 Motion coding payload semantics

[0254] ...

[0255] mcp_mv_signalled_flag_countspecifies the number of mcp_mv_signalled_flag[　d　] present in the bitstream. The value of mcp_mv_signalled_flag_count shall be in the range of 0 to (　mcp_vertex_count　-　1　), inclusive.

[0256] mcp_mv_signalled_flag[ d ]equal to 0 indicates that the motion vector for the duplicate vertex with index d is not present in the bitstream. mcp_mv_signalled_flag[ d ] equal to 1 indicates that the motion vector for the duplicate vertex with index d is present in the bitstream.

[0257] mcp_mv_signalled_flag_trailing0specifies the number of mcp_mv_signalled_flag[ d ] not present in the bitstream and assumed to be equal to 0. The value of mcp_mv_signalled_flag_trailing0 shall be in the range of 0 to ( mcp_vertex_count - mcp_mv_signalled_flag_count - 1 ), inclusive.

[0258] When bmptc_motion_vector_derivation_disable_flag is equal to 1, it is a requirement of bitstream conformance that mcp_mv_signalled_flag_count and mcp_mv_signalled_flag_trailing0 are always 0.

[0259] It may further be a requirement of bitstream conformance that the sum of mcp_mv_signalled_flag_count and mcp_mv_signalled_flag_trailing0 is less than or equal to the number of duplicate vertices in the reference submesh.

[0260] In an embodiment of the disclosure, it will be understood that the various conformance conditions described herein can be imposed on the bitstream. Although FIG. 8 illustrates one example of method 800 of setting conformance conditions, various changes may be made to FIG. 8. For example, while shown as a series of steps, various steps in FIG. 8 may overlap, occur in parallel, or occur any number of times. It will also be understood that various combinations of the conformance conditions described herein can be imposed on the bitstream.

[0261] In an embodiment of the disclosure, an apparatus for decoding base mesh may include at least one memory (360) storing one or more instructions, and one or more processors (340) including processing circuitry, wherein the one or more instructions executed by the one or more processors individually or collectively, to cause the apparatus to receive a compressed bitstream comprising a base mesh sub-bitstream, determine a value of a motion vector derivation disable flag, obtain two syntax elements related to duplicate vertices, wherein values of the two syntax elements are based on the value of the motion vector derivation disable flag, and wherein the two syntax elements include a first syntax element for a last 1-bit position and a second syntax element for a trailing 0-bit, determine one or more bitstream conformance conditions based on the two syntax elements, and confirm, based on the one or more bitstream conformance conditions, a correct number of motion vectors being signaled in a bitstream.

[0262] In an embodiment of the disclosure, when the value of the motion vector derivation disable flag is 1, the one or more bitstream conformation conditions include that the first syntax element for the last 1-bit position and the second syntax element for the trailing 0-bit are both a value of 0.

[0263] In an embodiment of the disclosure, the one or more bitstream conformation conditions include that the first syntax element for the last 1-bit position and the second syntax element for the trailing 0-bit are each within a particular range.

[0264] In an embodiment of the disclosure, the particular range for the first syntax element for the last 1-bit position is 0 to a first value corresponding to a base mesh vertex count for a submesh minus 1, inclusive.

[0265] In an embodiment of the disclosure, the particular range for the second syntax element for the trailing 0-bit is 0 to a second value corresponding to the base mesh vertex count for the submesh minus the last 1-bit position minus 1, inclusive.

[0266] In an embodiment of the disclosure, the value of the motion vector derivation disable flag is 0, the one or more bitstream conformation conditions include that a sum of the first syntax element for the last 1-bit position and the second syntax element for the trailing 0-bit is equal to a number of the duplicate vertices in a submesh.

[0267] In an embodiment of the disclosure, the value of the motion vector derivation disable flag is 0, the one or more bitstream conformation conditions include that a sum of the first syntax element for the last 1-bit position and the second syntax element for the trailing 0-bit is less than or equal to a number of duplicate vertices in a submesh.

[0268] In an embodiment of the disclosure, an apparatus (300) for encoding base mesh may include at least one memory (360) storing one or more instructions; and one or more processors (340) including processing circuitry, wherein the one or more instructions executed by the one or more processors (340) individually or collectively, to cause the apparatus to determine a value of a motion vector derivation disable flag to be included in signaling information, determine two syntax elements related to duplicate vertices to be included in the signaling information, wherein the two syntax elements include a first syntax element for a last 1-bit position and a second syntax element for a trailing 0-bit, and wherein one or more bitstream conformance conditions are related to the two syntax elements, create a compressed bitstream including the signaling information.

[0269] In an embodiment of the disclosure, the value of the motion vector derivation disable flag is 1, the one or more bitstream conformation conditions include that the first syntax element for the last 1-bit position and the second syntax element for the trailing 0-bit are both a value of 0.

[0270] In an embodiment of the disclosure, the one or more bitstream conformation conditions include that the first syntax element for the last 1-bit position and the second syntax element for the trailing 0-bit are each within a particular range.

[0271] In an embodiment of the disclosure, the particular range for the first syntax element for the last 1-bit position is 0 to a first value corresponding to a base mesh vertex count for a submesh minus 1, inclusive.

[0272] In an embodiment of the disclosure, the particular range for the second syntax element for the trailing 0-bit is 0 to a second value corresponding to the base mesh vertex count for the submesh minus the last 1-bit position minus 1, inclusive.

[0273] In an embodiment of the disclosure, the value of the motion vector derivation disable flag is 0, the one or more bitstream conformation conditions include that a sum of the first syntax element for the last 1-bit position and the second syntax element for the trailing 0-bit is less than or equal to a number of duplicate vertices in a submesh.

[0274] In an embodiment of the disclosure, the value of the motion vector derivation disable flag is 0, the one or more bitstream conformation conditions include that a sum of the first syntax element for the last 1-bit position and the second syntax element for the trailing 0-bit is less than or equal to a number of duplicate vertices in a submesh.

[0275] In an embodiment of the disclosure, a method for transmitting a compressed bitstream generated by an apparatus (300) for encoding base mesh. The method may include determine a value of a motion vector derivation disable flag to be included in signaling information (602). The method may include determine two syntax elements related to duplicate vertices to be included in the signaling information, wherein the two syntax elements include a first syntax element for a last 1-bit position and a second syntax element for a trailing 0-bit, and wherein one or more bitstream conformance conditions are related to the two syntax elements (604). The method may include create the compressed bitstream including the signaling information (608).

[0276] Although the present disclosure has been described with exemplary embodiments, various changes and modifications may be suggested to one skilled in the art. It is intended that the present disclosure encompass such changes and modifications as fall within the scope of the appended claims. None of the description in this application should be read as implying that any particular element, step, or function is an essential element that must be included in the claims scope. The scope of patented subject matter is defined by the claims.

Claims

1.An apparatus (300) for decoding base mesh comprising:at least one memory (360) storing one or more instructions; andone or more processors (340) including processing circuitry, wherein the one or more instructions executed by the one or more processors individually or collectively, to cause the apparatus to:receive a compressed bitstream comprising a base mesh sub-bitstream;determine a value of a motion vector derivation disable flag;obtain two syntax elements related to duplicate vertices, wherein values of the two syntax elements are based on the value of the motion vector derivation disable flag, and wherein the two syntax elements include a first syntax element for a last 1-bit position and a second syntax element for a trailing 0-bit;determine one or more bitstream conformance conditions based on the two syntax elements; andconfirm, based on the one or more bitstream conformance conditions, a correct number of motion vectors being signaled in a bitstream.2.The apparatus (300) of Claim 1, wherein, when the value of the motion vector derivation disable flag is 1, the one or more bitstream conformation conditions include that the first syntax element for the last 1-bit position and the second syntax element for the trailing 0-bit are both a value of 0.3.The apparatus (300) of any one of Claims 1 to 2, wherein the one or more bitstream conformation conditions include that the first syntax element for the last 1-bit position and the second syntax element for the trailing 0-bit are each within a particular range.4.The apparatus (300) of Claim 3, wherein the particular range for the first syntax element for the last 1-bit position is 0 to a first value corresponding to a base mesh vertex count for a submesh minus 1, inclusive.5.The apparatus (300) of Claim 4, wherein the particular range for the second syntax element for the trailing 0-bit is 0 to a second value corresponding to the base mesh vertex count for the submesh minus the last 1-bit position minus 1, inclusive.6.The apparatus (300) of any one of Claims 1 to 5, wherein, when the value of the motion vector derivation disable flag is 0, the one or more bitstream conformation conditions include that a sum of the first syntax element for the last 1-bit position and the second syntax element for the trailing 0-bit is equal to a number of the duplicate vertices in a submesh.7.The apparatus (300) of any one of Claims 1 to 6, wherein, when the value of the motion vector derivation disable flag is 0, the one or more bitstream conformation conditions include that a sum of the first syntax element for the last 1-bit position and the second syntax element for the trailing 0-bit is less than or equal to a number of duplicate vertices in a submesh.8.An apparatus (300) for encoding base mesh comprising:at least one memory (360) storing one or more instructions; andone or more processors (340) including processing circuitry, wherein the one or more instructions executed by the one or more processors (340) individually or collectively, to cause the apparatus to:determine a value of a motion vector derivation disable flag to be included in signaling information;determine two syntax elements related to duplicate vertices to be included in the signaling information, wherein the two syntax elements include a first syntax element for a last 1-bit position and a second syntax element for a trailing 0-bit, and wherein one or more bitstream conformance conditions are related to the two syntax elements; andcreate a compressed bitstream including the signaling information.9.The apparatus (300) of Claim 8, wherein, when the value of the motion vector derivation disable flag is 1, the one or more bitstream conformation conditions include that the first syntax element for the last 1-bit position and the second syntax element for the trailing 0-bit are both a value of 0.10.The apparatus (300) of any one of Claims 8 to 9, wherein the one or more bitstream conformation conditions include that the first syntax element for the last 1-bit position and the second syntax element for the trailing 0-bit are each within a particular range.11.The apparatus of Claim 10, wherein the particular range for the first syntax element for the last 1-bit position is 0 to a first value corresponding to a base mesh vertex count for a submesh minus 1, inclusive.12.The apparatus (300) of Claim 11, wherein the particular range for the second syntax element for the trailing 0-bit is 0 to a second value corresponding to the base mesh vertex count for the submesh minus the last 1-bit position minus 1, inclusive.13.The apparatus (300) of any one of Claims 8 to 12, wherein, when the value of the motion vector derivation disable flag is 0, the one or more bitstream conformation conditions include that a sum of the first syntax element for the last 1-bit position and the second syntax element for the trailing 0-bit is less than or equal to a number of duplicate vertices in a submesh.14.The apparatus (300) of any one of Claims 8 to 13, wherein, when the value of the motion vector derivation disable flag is 0, the one or more bitstream conformation conditions include that a sum of the first syntax element for the last 1-bit position and the second syntax element for the trailing 0-bit is less than or equal to a number of duplicate vertices in a submesh.15.A method for transmitting a compressed bitstream generated by an apparatus (300) for encoding base mesh, the method comprising:determine a value of a motion vector derivation disable flag to be included in signaling information (602);determine two syntax elements related to duplicate vertices to be included in the signaling information, wherein the two syntax elements include a first syntax element for a last 1-bit position and a second syntax element for a trailing 0-bit, and wherein one or more bitstream conformance conditions are related to the two syntax elements (604); andcreate the compressed bitstream including the signaling information (608).

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