Photodetector and electronic equipment

Abstract

The present disclosure relates to a photodetector and electronic equipment that can achieve miniaturization and improve performance of phase difference detection. This photodetector has a pixel array section in which hexagonal pixels are arranged in an array, each pixel having a microlens and a photoelectric conversion section that is divided into multiple sections in a planar view. The photodetector is configured so that a phase difference is detected by using signals obtained from the multiple photoelectric conversion sections below the microlenses. The present disclosure can be applied to, for example, a photodetector that photoelectrically converts incident light and detects a phase difference.

Description

Optical Detection Device and Electronic Device

[0001] The present disclosure relates to an optical detection device and an electronic device, and more particularly to an optical detection device and an electronic device that achieve miniaturization and improve the performance of phase difference detection.

[0002] There is disclosed an imaging device in which four photoelectric conversion units of 2x2 are arranged under one microlens, and phase difference is detected using pixel signals obtained by the four photoelectric conversion units (see, for example, Patent Document 1).

[0003] Japanese Patent Application Laid-Open No. 2016-144183

[0004] In the pixel structure of Patent Document 1, the area of the microlens is arranged to be larger than the area of the photoelectric conversion unit in plan view, and there is concern about an increase in the area of the imaging device. If an attempt is made to suppress the increase in size by reducing the area of the microlens, the area on which the microlens is arranged on the photoelectric conversion unit becomes smaller, resulting in a decrease in light collection efficiency and concern about deterioration in sensitivity.

[0005] The present disclosure has been made in view of such a situation, and aims to achieve miniaturization and improve the performance of phase difference detection.

[0006] The optical detection device according to the first aspect of the present disclosure has a pixel array portion in which hexagonal pixels are arranged in an array, and the pixel has a microlens and a photoelectric conversion unit divided into a plurality in plan view, and is configured to detect a phase difference using signals obtained by the plurality of photoelectric conversion units under the microlens.

[0007] The electronic device according to the second aspect of the present disclosure has a pixel array portion in which hexagonal pixels are arranged in an array, and the pixel has a microlens and a photoelectric conversion unit divided into a plurality in plan view, and includes an optical detection device configured to detect a phase difference using signals obtained by the plurality of photoelectric conversion units under the microlens.

[0008] In the first and second aspects of this disclosure, a pixel array is provided in which hexagonal pixels are arranged in an array, and each pixel is provided with a microlens and a photoelectric conversion unit that is divided into a plurality of sections in a plan view, and the phase difference is detected using the signals obtained by the plurality of photoelectric conversion units under the microlens.

[0009] The light detection device and electronic equipment may be independent devices or modules incorporated into other devices.

[0010] This figure shows a schematic configuration of a photodetector applying the technology of this disclosure. This is a plan view showing the pixel arrangement in the pixel array section of the first embodiment of the photodetector. This is a plan view showing the microlens arrangement in the first embodiment. This figure illustrates the microlens arrangement for pupil correction. This figure shows an example of the pixel circuit configuration in the first embodiment. This figure illustrates the phase difference detection mode of the photodetector according to the first embodiment. This figure illustrates a first wiring example of the pixel drive wiring. This figure illustrates a second wiring example of the pixel drive wiring. This is a plan view showing the pixel arrangement in the pixel array section of the second embodiment of the photodetector. This is a plan view showing a modified transfer transistor in the second embodiment. This is a plan view showing the microlens arrangement in the second embodiment. This figure illustrates the first phase difference detection mode in the second embodiment. This figure illustrates the second phase difference detection mode in the second embodiment. This figure illustrates the third and fourth phase difference detection modes in the second embodiment. This figure illustrates the driving of the HDR shooting mode. This is a plan view showing a first modified floating diffusion in the second embodiment. This figure illustrates the readout in the first modified floating diffusion of Figure 16. This is a plan view showing a second modified floating diffusion in the second embodiment. This is a plan view showing another example of a pixel structure. This is a block diagram showing an example of the configuration of an electronic device to which the technology of this disclosure is applied. This is a diagram illustrating an example of the use of an image sensor.

[0011] Hereinafter, embodiments for carrying out the technology of this disclosure (hereinafter referred to as "embodiments") will be described with reference to the attached drawings. In this specification and drawings, components having substantially the same functional configuration will be denoted by the same reference numerals, and redundant explanations will be omitted. The explanation will proceed in the following order: 1. Outline configuration example of the light detection device 2. Detailed configuration example of the pixel array section of the first embodiment 3. Pixel circuit configuration example 4. Pixel drive wiring wiring example 5. Detailed configuration example of the pixel array section of the second embodiment 6. Phase difference detection mode 7. HDR shooting mode 8. Other arrangement examples of floating diffusion 9. Summary of the first and second embodiments 10. Other pixel structure examples 11. Application examples to electronic devices 12. Image sensor usage examples

[0012] In the drawings referenced in the following explanation, identical or similar parts are denoted by the same or similar reference numerals, thereby omitting redundant explanations as appropriate. The drawings are schematic, and the relationship between thickness and planar dimensions, the ratio of the thickness of each layer, etc., may differ from the actual figures. Furthermore, there may be parts where the dimensional relationships and ratios differ between drawings.

[0013] Furthermore, the definitions of directions such as up and down in the following explanation are merely for explanatory convenience and do not limit the technical concept of this disclosure. For example, if an object is rotated 90° and observed, up and down will be converted to left and right and read accordingly, and if it is rotated 180° and observed, up and down will be inverted and read accordingly.

[0014] The technology disclosed herein can be applied to all types of photodetectors having a pixel array in which pixels are arranged two-dimensionally in a matrix, and which convert incident light into photoelectric signals and output a pixel signal corresponding to the amount of light. The light to be detected may be light in the visible light region including wavelengths such as R (Red), G (Green), and B (Blu), or it may be light in the invisible light region such as infrared light. Alternatively, it may be light from both the visible and invisible light regions. The photodetector can be used as a solid-state imaging device that generates and outputs an imaging signal corresponding to the amount of incident light, or as a light-receiving device (distance measuring sensor) in a distance measuring system that receives light (reflected light) reflected from an object after infrared light has been irradiated as active light, and measures the distance to the subject using a direct ToF (Time of Flight) or indirect ToF (Time of Flight) method. Below, an example of applying the technology disclosed herein to a photodetector that receives light in the visible light region and generates and outputs an imaging signal corresponding to the amount of incident light will be described.

[0015] <1. Schematic Configuration Example of a Photodetector> Figure 1 shows a schematic configuration of a photodetector to which the technology of this disclosure is applied.

[0016] Figure 1 shows the configuration of a CMOS image sensor, which is a type of XY address type photodetector. A CMOS image sensor is an image sensor manufactured using or partially using the CMOS process.

[0017] The photodetector 1 comprises a pixel array section 11 and a peripheral circuit section. The peripheral circuit section includes, for example, a vertical drive section 12, a column processing section 13, a horizontal drive section 14, and a system control section 15. The photodetector 1 further comprises a signal processing section 16 and a data storage section 17. The signal processing section 16 and the data storage section 17 may be mounted on the same substrate as the pixel array section 11, the vertical drive section 12, etc., or they may be arranged on a separate substrate. Furthermore, the processing of the signal processing section 16 and the data storage section 17 may be performed by an external signal processing section provided on a semiconductor chip separate from the photodetector 1, such as a DSP (Digital Signal Processor) circuit.

[0018] The pixel array section 11 has a configuration in which pixels 20, each having a photoelectric conversion unit that generates and stores an electric charge corresponding to the amount of light received, are arranged in a two-dimensional matrix in the row and column directions. Here, the row direction refers to the pixel rows of the pixel array section 11, i.e., the horizontal arrangement direction, and the column direction refers to the pixel columns of the pixel array section 11, i.e., the vertical arrangement direction. In the pixel array section 11, each pixel 20 has a hexagonal shape in plan view and is arranged in an array to form a honeycomb structure.

[0019] In the pixel array section 11, a pixel drive wiring 21 is routed along the row direction as a row signal line for each pixel row, and a vertical signal line 22 is routed along the column direction as a column signal line for each pixel column. The pixel drive wiring 21 transmits drive signals for driving when reading signals from the pixels 20. In Figure 1, the pixel drive wiring 21 is shown as a single wire, but it is not limited to one wire. One end of the pixel drive wiring 21 is connected to the output terminal corresponding to each row of the vertical drive section 12.

[0020] The vertical drive unit 12 is composed of a shift register, an address decoder, and the like, and drives each pixel 20 of the pixel array unit 11 simultaneously or row by row. Together with the system control unit 15, the vertical drive unit 12 constitutes a drive unit that controls the operation of each pixel 20 of the pixel array unit 11. The specific configuration of the vertical drive unit 12 is not shown in the diagram, but generally it has two scanning systems: a read scanning system and a sweep scanning system.

[0021] The readout scanning system sequentially selects and scans the pixels 20 of the pixel array 11 row by row in order to read signals from the pixels 20. The signals read from the pixels 20 are analog signals. The sweep scanning system performs a sweep scan ahead of the readout scan performed by the readout scanning system by the exposure time.

[0022] This sweep scanning system resets the photoelectric conversion unit of each pixel 20 by sweeping away unwanted charges from the photoelectric conversion unit of the pixels 20 in the readout row. This sweeping away (resetting) of unwanted charges by the sweep scanning system then performs what is known as an electronic shutter operation. Here, the electronic shutter operation refers to the operation of discarding the charge in the photoelectric conversion unit and starting a new exposure (starting charge accumulation).

[0023] The signal read out by the readout scanning system corresponds to the amount of light received since the previous readout operation or electronic shutter operation. The period from the readout timing of the previous readout operation or the sweep timing of the electronic shutter operation to the readout timing of the current readout operation is the exposure period for pixel 20.

[0024] The signals output from each pixel 20 of the pixel row selected and scanned by the vertical drive unit 12 are input to the column processing unit 13 through each of the vertical signal lines 22 for each pixel column. The column processing unit 13 performs predetermined signal processing on the signals output from each pixel 20 of the selected row through the vertical signal lines 22 for each pixel column of the pixel array unit 11, and temporarily holds the pixel signals after signal processing.

[0025] Specifically, the column processing unit 13 performs at least noise reduction processing as part of its signal processing, such as CDS (Correlated Double Sampling) processing or DDS (Double Data Sampling) processing. For example, CDS processing removes pixel-specific fixed pattern noise such as reset noise and threshold variations of amplification transistors within pixels. In addition to noise reduction processing, the column processing unit 13 can also be equipped with, for example, an AD (analog-to-digital) conversion function to convert analog pixel signals into digital signals and output them.

[0026] The horizontal drive unit 14 is composed of a shift register, an address decoder, and the like, and sequentially selects the unit circuits corresponding to the pixel rows of the column processing unit 13. Through this selective scanning by the horizontal drive unit 14, the pixel signals processed for each unit circuit in the column processing unit 13 are output sequentially.

[0027] The system control unit 15 is composed of a timing generator that generates various timing signals, and controls the drive of the vertical drive unit 12, column processing unit 13, and horizontal drive unit 14 based on the various timings generated by the timing generator.

[0028] The signal processing unit 16 has at least arithmetic processing capabilities and performs various signal processing, such as arithmetic processing, on the pixel signals output from the column processing unit 13. The data storage unit 17 temporarily stores the data necessary for the signal processing performed by the signal processing unit 16. The pixel signals processed by the signal processing unit 16 are converted to a predetermined format and output to the outside of the device from the output unit 18.

[0029] <2. Detailed Configuration Example of the Pixel Array Section of the First Embodiment> Figure 2 is a plan view showing the pixel arrangement in the pixel array section 11 of the first embodiment of the light detection device 1.

[0030] The pixels 20 have a hexagonal shape in plan view and are arranged in an array to form a honeycomb structure. Here, the hexagonal shape includes not only regular hexagons but also hexagons whose corners or sides are slightly rounded due to manufacturing process errors, etc. In the even and odd rows of the pixel array 11, the pixel positions of one row are shifted vertically by 1 / 2 pixels relative to the other row. Of the six sides of the hexagon of the pixel 20, the pixel transistors, the selection transistor SEL, the amplification transistor AMP, and the reset transistor RST, are arranged near the two sides (hereinafter referred to as the upper and lower sides) that are parallel to the row direction (horizontal direction) of the pixel array 11. No pixel transistors are arranged on the four diagonal sides that are connected at a 120-degree angle to the upper or lower side of the hexagon of the pixel 20. In addition, a dummy transistor may be placed next to the reset transistor RST to maintain symmetry in the transistor arrangement between the upper and lower sides. The transistor arrangement shown in Figure 2 is just one example, and the positions and number of each pixel transistor may be changed to obtain the desired characteristics and functions. If the hexagonal pixel region is rotated 90 degrees from the arrangement in Figure 2, and two predetermined sides of the hexagon of pixel 20 are parallel to the column direction (vertical direction), then the select transistor SEL, the amplification transistor AMP, and the reset transistor RST will be positioned near the two sides parallel to the column direction. By positioning the pixel transistors near two sides parallel to the column or row direction, rather than near the four diagonal sides, the degradation of transistor characteristics can be suppressed, and the desired performance can be obtained.

[0031] Each pixel transistor, such as the selection transistor SEL, the amplification transistor AMP, and the reset transistor RST, is shared by two adjacent pixels in the column direction (vertical direction). For example, the two pixels 20 below the selection transistor SEL and amplification transistor AMP, and the two pixels 20 below the reset transistor RST, are shared. Alternatively, each pixel transistor may be shared by three or more pixels.

[0032] Each pixel 20 has a photodiode PD divided into four sections as a photoelectric conversion unit. Specifically, the pixel 20 has photodiodes PDa, PDb, PDc, and PDd as photoelectric conversion units in regions obtained by dividing the hexagonal pixel region horizontally and vertically. A floating diffusion FD is placed in the center of the hexagonal pixel region, and a transfer transistor TG is placed near the floating diffusion FD of each of the photodiodes PDa, PDb, PDc, and PDd. Therefore, the pixel 20 has four photodiodes PDa, PDb, PDc, and PDd, and four transfer transistors TG that correspond to them one-to-one. In Figure 2, the triangular shape of the transfer transistor TG corresponds to the gate electrode of the transfer transistor TG. The pixel transistors, selection transistor SEL, amplification transistor AMP, and reset transistor RST, are shared by two pixels, but more specifically, they are shared by the photodiodes PDa, PDb, PDc, and PDd of two adjacent pixels.

[0033] Figure 3 is a plan view showing the arrangement of microlenses (on-chip lenses) in the first embodiment.

[0034] Each pixel 20 in the pixel array 11 is fitted with one microlens 31. By making the planar shape of the pixel 20 hexagonal, the area difference between the photodiodes PDa, PDb, PDc, and PDd, which are the photoelectric conversion parts of the pixel 20, and the microlens 31 can be minimized. In other words, while keeping the pixel area small, the proportion of the area on which the microlens 31 is fitted on the photoelectric conversion part can be increased.

[0035] Furthermore, the microlenses 31 of each pixel 20 are arranged within the pixel array 11 to perform pupil correction.

[0036] Figure 4 is a diagram illustrating the arrangement of the microlenses 31 that perform pupil correction.

[0037] In the central part of the pixel array section 11, the incident angle of the principal ray of the incident light from the optical lens (not shown) is 0 degrees, so pupil correction is not necessary. The microlenses 31 are positioned on the photoelectric conversion section so that the center of the photoelectric conversion section (photodiode PDa, PDb, PDc, PDd) of each pixel 20 coincides with the center of the microlenses 31.

[0038] On the other hand, in the peripheral (outer periphery) of the pixel array section 11, the incident angle of the principal rays of the incident light from the optical lens becomes a predetermined angle according to the lens design, so pupil correction is performed. That is, as shown in Figure 4, the center of the microlens 31 is positioned offset from the center of the photoelectric conversion section toward the center of the pixel array section 11. The amount of offset between the center position of the microlens 31 and the center position of the photoelectric conversion section increases as you move toward the outer periphery of the pixel array section 11. As a result, the positional relationship between the photoelectric conversion section and the microlens 31 can be optimized in each pixel 20, and the incident light from the optical lens can be efficiently directed into the photoelectric conversion section.

[0039] <3. Example of Pixel Circuit Configuration> Figure 5 shows an example of the circuit configuration of a pixel 20 in the first embodiment. Figure 5 shows the equivalent circuit of two pixels 20, which are a shared unit of pixel transistors.

[0040] Each pixel 20 has photodiodes PDa, PDb, PDc, and PDd, which are photoelectric conversion units, and transfer transistors TGa, TGb, TGc, and TGd, which are provided in a one-to-one relationship with them. The four transfer transistors TGa, TGb, TGc, and TGd of the pixel 20 are electrically connected to a floating diffusion FD located in the center of the pixel in a plan view. Here, since the pixel transistors SEL, AMP, and RST are shared by two pixels, the two pixels that share these pixel transistors will be referred to as the first pixel 20 and the second pixel 20. In Figure 5, floating diffusion FD-c1 is the floating diffusion FD located in the center of the first pixel 20, and floating diffusion FD-c2 is the floating diffusion FD located in the center of the second pixel 20. Floating diffusion transistors FD-c1 and FD-c2 are electrically connected to the gate of the amplification transistor AMP and the source of the reset transistor RST, with the reset transistor RST, amplification transistor AMP, and selection transistor SEL being shared by two pixels. The transfer transistor TG, reset transistor RST, amplification transistor AMP, and selection transistor SEL are composed of, for example, n-type MOS transistors (MOS FETs).

[0041] A photodiode PDa converts incident light into electricity, generating an electric charge (signal charge) corresponding to the amount of incident light received. In a photodiode PDa, the cathode is electrically connected to the source of a transfer transistor TGa, and the anode is electrically connected to a reference potential line (e.g., ground).

[0042] Transfer transistor TGa controls the transfer of charges generated by photodiode PDa. When transfer transistor TGa is turned on according to the transfer signal TRGa from the vertical drive unit 12, transfer transistor TGa transfers the charges generated by photodiode PDa to the floating diffusion FD (FD-c1, FD-c2). In transfer transistor TGa, the drain is electrically connected to the floating diffusion FD, and the gate is electrically connected to the pixel drive wiring 21Ta. The pixel drive wiring 21Ta that transmits the transfer signal TRGa is a part of the pixel drive wiring 21 described in FIG. 1.

[0043] Each of the photodiodes PDb, PDc, and PDd is the same as the above-described photodiode PDa, and each of the transfer transistors TGb, TGc, and TGd is the same as the above-described transfer transistor TGa, so the description is omitted. The pixel drive wiring 21Tb that transmits the transfer signal TRGb is connected to the gate of the transfer transistor TGb. The pixel drive wirings 21Tc and 21Td that transmit the transfer signals TRGc and TRGd are connected to the gates of the transfer transistors TGc and TGd, respectively.

[0044] The floating diffusion FD is a charge accumulation unit that temporarily accumulates the charges transferred from at least one of the photodiodes PDa to PDd, and is also a charge-voltage conversion unit that generates a voltage according to the amount of the charges. The floating diffusion FD is electrically connected to the gate of the amplification transistor AMP and the source of the reset transistor RST.

[0045] The reset transistor RST resets the potential of the floating diffusion FD to a predetermined potential. When the reset transistor RST is turned on according to the reset signal RSTp from the vertical drive unit 12, the reset transistor RST resets the potential of the floating diffusion FD to the potential of the power supply line VDD. The pixel drive wiring 21R that transmits the reset signal RSTp is a part of the pixel drive wiring 21 described in FIG. 1.

[0046] The amplification transistor AMP generates a voltage signal corresponding to the level of the charge accumulated in the floating diffusion FD as the pixel signal VSL. The amplification transistor AMP is connected in series with the selection transistor SEL and is connected to the vertical signal line 22 via the selection transistor SEL. This amplification transistor AMP constitutes a source follower together with a load MOS transistor (not shown) connected to the vertical signal line 22. When the selection transistor SEL is turned on according to the selection signal SELp from the vertical drive unit 12, the amplification transistor AMP outputs the voltage of the floating diffusion FD to the vertical signal line 22. The drain of the amplification transistor AMP is connected to the power supply line VDD, and the source of the amplification transistor AMP is connected to the drain of the selection transistor SEL.

[0047] The selection transistor SEL controls the output timing of the pixel signal VSL. The source of the selection transistor SEL is connected to the vertical signal line 22, and the gate of the selection transistor SEL is connected to the pixel drive wiring 21S. When the selection transistor SEL is turned on by the selection signal SELp supplied to the gate, the pixel signal VSL from the amplification transistor AMP is output to the vertical signal line 22. The pixel drive wiring 2IS that transmits the selection signal SELp is a part of the pixel drive wiring 21 described in FIG. 1.

[0048] The selection transistor SEL may be provided between the power supply line VDD and the amplification transistor AMP. In this case, the drain of the reset transistor RST is electrically connected to the power supply line VDD and the drain of the selection transistor SEL. The source of the selection transistor SEL is electrically connected to the drain of the amplification transistor AMP. The source (output end of the pixel 20) of the amplification transistor AMP is electrically connected to the vertical signal line 22, and the gate of the amplification transistor AMP is electrically connected to the source of the reset transistor RST.

[0049] The pixel 20 having the above configuration converts incident light into photoelectric light according to the control of the vertical drive unit 12 and outputs a pixel signal VSL corresponding to the amount of light received to the vertical signal line 22. The pixel 20 can control the transfer transistors TGa, TGb, TGc, and TGd to be turned on with a time difference and output the charge generated by the photodiodes PGa, PDb, PDc, and PDd as individual pixel signals VSL. A pair of pixel signals VSL from photodiodes PGa and PDc, and a pair of pixel signals VSL from photodiodes PDb and PDd, whose photoelectric conversion units are in a symmetrical positional relationship with respect to the optical axis, can be used as phase difference signals for detecting phase differences. Alternatively, the pixel 20 can also output pixel signals VSL by simultaneously controlling any two of the transfer transistors TGa, TGb, TGc, and TGd to be turned on, thereby generating a phase difference signal with improved sensitivity.

[0050] Figure 6 shows an example of a drive where two of the transfer transistors TGa, TGb, TGc, and TGd are controlled to be turned on simultaneously, and the pixel signals VSL generated by two of the photodiodes PDa, PDb, PDc, and PDd are output as a phase difference signal.

[0051] Figure 6A shows an example where the photodiodes PDa, PDb, PDc, and PDd are divided horizontally into two halves to form a phase difference signal.

[0052] In Figure 6A, the vertical drive unit 12 outputs the charges of photodiodes PDa and PDd as pixel signals VSL, and then outputs the charges of photodiodes PDb and PDc as pixel signals VSL.

[0053] Figure 6B shows an example where the photodiodes PDa, PDb, PDc, and PDd are split vertically into two to form a phase difference signal.

[0054] In Figure 6B, the vertical drive unit 12 outputs the charges of photodiodes PDa and PDb as pixel signals VSL, and then outputs the charges of photodiodes PDc and PDd as pixel signals VSL.

[0055] Figure 6C shows an example with two types of division directions: horizontal and vertical.

[0056] In Figure 6C, the vertical drive unit 12 outputs a phase difference signal by dividing the photodiodes PDa, PDb, PDc, and PDd horizontally into two halves in one of the even or odd rows of the pixel array unit 11, similar to Figure 6A, and by dividing them vertically into two halves in the other of the two halves, similar to Figure 6B.

[0057] As described above, the photodetector 1 according to the first embodiment divides the photoelectric conversion area of ​​the pixel 20 into four photodiodes PDa, PDb, PDc, and PDd, and can appropriately select between a phase difference detection mode in which the signals generated by the photodiodes PDa, PDb, PDc, and PDd are individually output as phase difference signals, and a phase difference detection mode in which any two of the photodiodes PDa, PDb, PDc, and PDd are output as phase difference signals.

[0058] Furthermore, if the priority is to improve sensitivity and it is sufficient to perform only the phase difference detection mode in which the phase difference signal is output as a unit of two of the photodiodes PDa, PDb, PDc, and PDd, then the number of divisions of the photoelectric conversion area of ​​the pixel 20 can be set to two in advance. In other words, as another embodiment of the photodetector 1, a configuration in which the number of divisions of the photoelectric conversion area of ​​the pixel 20 is set to two is also possible. The division direction of the photoelectric conversion area may be the horizontal direction in Figure 6A, the vertical direction in Figure 6B, or a mixture of the two types, the horizontal and vertical directions in Figure 6C.

[0059] <4. Wiring Examples for Pixel Drive Wiring> Next, we will explain an example of the wiring of the pixel drive wiring 21.

[0060] Figure 7 is a plan view showing a first wiring example of the pixel drive wiring 21S that supplies the selection signal SELp to the selection transistor SEL.

[0061] As described above, since each pixel 20 of the pixel array 11 is arranged in an array to form a honeycomb structure, the pixel positions of adjacent first columns (e.g., even-numbered columns) and second columns (odd-numbered columns) are shifted vertically by half a pixel. Therefore, the arrangement of pixel transistors such as the selection transistors SEL in each column is also shifted vertically by half a pixel between adjacent first and second columns.

[0062] In the first wiring example shown in Figure 7, pixel drive wiring 21S for transmitting the selection signal SELp is provided for both the first and second rows. More specifically, there is pixel drive wiring 21S-1 that supplies the selection signal SELp to the gate of the selection transistor SEL in the first row, and pixel drive wiring 21S-2 that supplies the selection signal SELp to the gate of the selection transistor SEL in the second row.

[0063] In this first wiring example, as the pixels 20 become smaller and the number of pixels increases, it becomes necessary to arrange the pixel drive wirings 21S-1 and 21S-2 more densely. For example, it becomes necessary to arrange the pixel drive wirings 21S-1 and 21S-2 on a different metal wiring layer within the multilayer wiring layer.

[0064] Figure 8 is a plan view showing a second wiring example of the pixel drive wiring 21S that transmits the selection signal SELp supplied to the gate of the selection transistor SEL.

[0065] In the second wiring example shown in Figure 8, a pixel drive wiring 21S for transmitting the selection signal SELp is provided between the selection transistor SEL of the first column and the selection transistor SEL of the second column. The selection transistor SEL of the first column and the pixel drive wiring 21S are connected by pixel drive wiring 21S-a, and the selection transistor SEL of the second column and the pixel drive wiring 21S are connected by pixel drive wiring 21S-b. Pixel drive wiring 21S is the main line for transmitting the selection signal SELp, while pixel drive wirings 21S-a and 21S-b correspond to secondary lines.

[0066] Thus, in the second wiring example, which consists of a main line connected to the vertical drive unit 12 that generates the selection signal SELp, and sub-lines branching from the main line to the selection transistors SEL of the adjacent first and second rows, the number of pixel drive wirings 21S connected to the vertical drive unit 12 can be reduced. As a result, even when the pixels 20 are miniaturized and the number of pixels increases, a predetermined amount of spacing can be maintained between the pixel drive wirings 21S of the main line.

[0067] In addition, while Figures 7 and 8 illustrate an example of the arrangement of the pixel drive wiring 21S that supplies the selection signal SELp to the selection transistor SEL, the pixel drive wiring 21R that supplies the reset signal RSTp to the reset transistor RST is wired in a similar manner.

[0068] <5. Detailed Configuration Example of the Pixel Array Section of the Second Embodiment> Figure 9 is a plan view showing the pixel arrangement in the pixel array section 11 of the second embodiment of the light detection device 1.

[0069] In the second embodiment shown in Figure 9, the planar shape of each pixel 20 is hexagonal and arranged in an array in a honeycomb structure, and the floating diffusion FD is located in the center of the hexagonal pixel region, which is common to the first embodiment shown in Figure 2.

[0070] On the other hand, in the second embodiment, which differs from the first embodiment, the pixel 20 is divided into six hexagonal pixel regions and has photodiodes PDa to PDf as photoelectric conversion units. The pixel 20 also has six transfer transistors TGa to TGf that correspond one-to-one with the six photodiodes PDa to PDf. The gate electrodes of the six transfer transistors TGa to TGf have a fan shape obtained by dividing the circular area around the floating diffusion FD into six parts. By making the gate electrodes of the transfer transistors TGa to TGf fan-shaped, a wider channel width can be secured and the transfer capability can be improved. Alternatively, the transfer capability can be maintained even if the unit area of ​​the transfer transistors TGa to TGf is reduced due to multiple divisions. In the second embodiment, when each of the six divided photodiodes PDa to PDf is not particularly distinguished, they are referred to as photodiode PDx.

[0071] In the second embodiment, the pixel transistors, namely the selection transistor SEL, the amplification transistor AMP, and the reset transistor RST, are provided on a pixel-by-pixel basis. In other words, the pixel transistors, namely the selection transistor SEL, the amplification transistor AMP, and the reset transistor RST, are shared by the six photodiodes Pda to PDf of one pixel. The pixel transistors, namely the selection transistor SEL, the amplification transistor AMP, and the reset transistor RST, are arranged near the top or bottom edge of the hexagonal shape of the pixel 20, and not on the diagonal edges. If the arrangement in Figure 9 is rotated 90 degrees so that two predetermined sides of the hexagon are parallel to the column direction (vertical direction), then the pixel transistors, namely the selection transistor SEL, the amplification transistor AMP, and the reset transistor RST, are arranged near the two sides parallel to the column direction. By arranging the pixel transistors near two sides parallel to the column or row direction, rather than near the diagonal edges, the degradation of transistor characteristics can be suppressed, and the desired performance can be obtained. In the second embodiment as well, a dummy transistor may be placed next to the reset transistor RST to maintain the symmetry of the transistor arrangement.

[0072] The equivalent circuit of the pixel 20 in the second embodiment is the same as in Figure 5, except that the photodiode PD and transfer transistor TG connected to the shared pixel transistor are changed to photodiodes Pda to PDf and transfer transistors TGa to TGf for a single pixel, so no explanation is provided.

[0073] Figure 10 is a plan view showing a modified example of the transfer transistor TG in the second embodiment.

[0074] As shown in Figure 9, the transfer transistor TG may have a fan-shaped gate electrode, or, as shown in Figure 10, the outer circumference of the arc portion may be connected by two or more straight lines to create a convex shape on the outer circumference of the pixel 20. Such a shape, which includes a convex shape on the outer circumference by connecting two or more straight lines on the outer circumference of the arc portion, is called a roughly fan-shaped shape. By connecting the outer circumference of the arc portion with two or more straight lines and creating an outward convex shape, rather than connecting it with a single straight line, a wider channel width can be secured and the transfer capability can be improved. Alternatively, the transfer capability can be maintained even if the unit area of ​​transfer transistors TGa to TGf is reduced by multi-division.

[0075] Figure 11 is a plan view showing the arrangement of microlenses (on-chip lenses) in the second embodiment.

[0076] Similar to the first embodiment, one microlens 31 is placed in each pixel 20 of the pixel array 11. Even when the photoelectric conversion area of ​​one pixel is divided into six parts, by making the planar shape of the pixel 20 a hexagon, it is possible to increase the area proportion on the photoelectric conversion area while keeping the pixel area small.

[0077] In the second embodiment as well, the microlenses 31 of each pixel 20 are arranged to perform pupil correction, similar to the first embodiment.

[0078] <6. Phase Difference Detection Mode> Figure 12 is a diagram illustrating the first phase difference detection mode for detecting the phase difference in the second embodiment.

[0079] The vertical drive unit 12 of the light detection device 1 sequentially reads the signals from the six photodiodes PDa to PDf of the pixel 20. The signal processing unit 16 appropriately selects and adds the signals from the six photodiodes PDa to PDf to generate three patterns of phase difference signals in the phase difference direction shown in Figures 12A to C.

[0080] In Figure 12, A is the phase difference signal in the first phase difference direction, obtained by adding the signals of photodiodes PDa, PDb, and PDc to form a first phase difference signal, and adding the signals of photodiodes PDd, Pde, and PDf to form a second phase difference signal.

[0081] Figure 12B is the second phase difference signal in the phase difference direction, obtained by adding the signals of the photodiodes PDb, Pdc, and PDd to form a first phase difference signal, and adding the signals of the photodiodes PDa, Pde, and PDf to form a second phase difference signal.

[0082] In Figure 12, C is a third phase difference signal in the phase difference direction, obtained by adding the signals of the photodiodes PDc, PDd, and PDe to a first phase difference signal and adding the signals of the photodiodes PDa, Pdb, and PDf to a second phase difference signal.

[0083] The signal processing unit 16 selects the phase difference direction with the highest contrast from the first to third phase difference directions, in other words, the phase difference direction in which the difference between the first phase difference signal and the second phase difference signal is large, and detects the phase difference. According to this first phase difference detection mode, the phase difference signal is the sum of the signals of three adjacent photodiodes PDx, and the phase difference direction with the highest contrast can be selected from the three phase difference directions. As a result, the variation in phase difference directions increases, which can improve the phase difference detection accuracy (AF performance). The first phase difference detection mode is suitable, for example, for detecting phase differences with higher accuracy in low-contrast environments such as dark places.

[0084] Other phase difference detection modes will be explained with reference to Figures 13 to 15.

[0085] In the examples in Figures 13-15, the contrast of the subject is assumed to be such that the upper left is brighter and the lower right is darker, as shown on the left side of Figure 13. In the pixel 20 divided into six photodiodes PDa to PDf, the subject in the photodiodes PDa and PDf is bright, the subject in the photodiodes PDc and PDd is dark, and the subject in the photodiodes PDb and PDe is of intermediate brightness.

[0086] The second phase difference detection mode will now be described.

[0087] In the first phase difference detection mode described above, the vertical drive unit 12 was controlled to sequentially read out the signals from the six photodiodes PDa to PDf of the pixel 20. However, in the case of rolling shutter readout, the timing difference in charge accumulation between photodiode PDa and photodiode PDf becomes large, and the timing difference in charge accumulation in the readout direction due to the order of signal readout becomes large. It is preferable to suppress the timing difference in charge accumulation in the readout direction due to the order of signal readout.

[0088] Therefore, in the second phase difference detection mode, the vertical drive unit 12 reads the signals from the photodiodes PDx in the order of, for example, photodiodes PDa, PDc, Pde, PDb, PDd, PDf. This suppresses the timing difference of charge accumulation in the reading direction due to the order of signal reading. The signal processing unit 16 detects the phase difference at which the six signals of photodiodes PDa, PDc, Pde, PDb, PDd, PDf become equal. With this second phase difference detection mode, for example, the phase difference can be detected with greater accuracy in low-contrast environments such as dark places. The order in which the signals from the photodiodes PDx are read is not limited to the order of photodiodes PDa, PDc, Pde, PDb, PDd, PDf; any order in which every other signal is read and the signals of adjacent photodiodes PDx are not read consecutively is acceptable.

[0089] Furthermore, in the first phase difference detection mode described above, the order in which the signals from the photodiode PDx are read out can be changed to, for example, the order of photodiodes PDa, PDc, Pde, PDb, PDd, PDf, thereby suppressing the timing difference in charge accumulation in the readout direction.

[0090] In the first and second phase-difference detection modes described above, it is necessary to perform six readouts per pixel. Next, a phase-difference detection mode that prioritizes AF speed by reducing the number of readouts per pixel will be described.

[0091] Figure 14A illustrates the third phase difference detection mode.

[0092] In the third phase difference detection mode, the signal processing unit 16 of the photodetector 1 sequentially acquires three phase difference signals: a first phase difference signal obtained by simultaneously reading the signals from photodiodes PDa and PDb under the control of the vertical drive unit 12; a second phase difference signal obtained by simultaneously reading the signals from photodiodes PDc and Pdd; and a third phase difference signal obtained by simultaneously reading the signals from photodiodes PDe and Pdf. The signal processing unit 16 then determines the magnitude of each of the first to third phase difference signals. In the example of the brightness of the subject explained in Figure 13, the first phase difference signal from photodiodes PDa and PDb is the largest, the third phase difference signal from photodiodes PDe and Pdf is the next largest, and the second phase difference signal from photodiodes PDc and Pdd is the smallest. In this case, the signal processing unit 16 uses the first and second phase difference signals, which have higher contrast, to detect the phase difference. In this third phase difference detection mode, the phase difference signal is the sum of the signals from two adjacent photodiodes (PDx). However, since the phase difference can be detected by selecting the phase difference direction with the highest contrast from the three phase difference directions, it is possible to detect the phase difference quickly while prioritizing AF speed.

[0093] Figures 14B and 14C illustrate the fourth phase difference detection mode.

[0094] In the fourth phase difference detection mode, the light detection device 1 acquires signals from three photodiodes PDx arranged symmetrically around the optical axis and adjusts the focus so that these three signals become equal. For example, the vertical drive unit 12 reads out the signals from photodiodes PDa, PDc, and PDe in order, as shown in Figure 14B. Alternatively, it may be the three signals from photodiodes PDb, PDd, and PDf, as shown in Figure 14C. The signal processing unit 16 detects the phase difference at which the three signals become equal. In this fourth phase difference detection mode, the phase difference signal is the signal from a single photodiode PDx, so it can be used in bright environments such as outdoors.

[0095] The system control unit 15 of the light detection device 1 can appropriately select and execute a predetermined phase-difference detection mode depending on the situation, such as whether the shooting location is a bright environment such as outdoors, a low-contrast environment such as a dark place, or whether AF speed should be prioritized. Alternatively, a predetermined phase-difference detection mode may be selected and executed based on user operation settings or external specification of the operation mode.

[0096] <7. HDR Shooting Mode> The light detection device 1 is equipped with an HDR shooting mode that generates an HDR (High Dynamic Range) image with an expanded dynamic range by driving the accumulation time (exposure time) for accumulating charge in the six photodiodes PDa to PDf of the pixel 20 by dividing it into a first accumulation time and a second accumulation time that is longer than the first accumulation time. Hereinafter, the first accumulation time, which is shorter, will be referred to as the short accumulation time, and the second accumulation time, which is longer, will be referred to as the long accumulation time.

[0097] Figure 15 is a diagram illustrating the operation of the HDR shooting mode.

[0098] For example, the vertical drive unit 12 sets the storage time of the photodiode PDx of each pixel 20 to a short storage time for photodiodes PDa, PDC, and PDe, and to a long storage time for photodiodes PDB, PDD, and PDF. This allows the six photodiodes PDa to PDF to alternate between signals set to a short storage time and signals set to a long storage time to generate an HDR image.

[0099] Although not shown in the diagram, instead of varying the storage time for each pixel 20 photodiode PDx, the storage time may be varied on a pixel-by-pixel basis. This allows for the generation of an HDR image using pixel signals set to short storage times and pixel signals set to long storage times.

[0100] <8. Other Arrangement Examples of Floating Diffusion> Next, with reference to Figures 16 to 18, other arrangement examples of the floating diffusion FD in the second embodiment will be described.

[0101] Figure 16 is a plan view showing a first modified example of the floating diffusion FD in the second embodiment.

[0102] In the basic arrangement example shown in Figure 9, the floating diffusion FD was positioned in the center of the hexagonal pixel region. In contrast, in the first modified example shown in Figure 16, the floating diffusion FD is positioned at three predetermined vertices of the six vertices of the hexagon, at equal intervals from each other.

[0103] If the three floating diffusion FDs positioned at the boundary of pixel 20 are designated as floating diffusion FD-1, FD-2, and FD-3 as shown in Figure 17, then the signals from photodiodes PDa and PDb are transferred to and read out by floating diffusion FD-1. The signals from photodiodes PDc and PDd are transferred to and read out by floating diffusion FD-2, and the signals from photodiodes PDe and PDf are transferred to and read out by floating diffusion FD-3.

[0104] In a configuration where one floating diffusion FD is placed in the center of the pixel area, reading out the signals from photodiodes PDa to PDf individually requires six readouts. In contrast, in the first modified example, by using floating diffusion FDs FD-1 to FD-3, the signals from three photodiodes PDx can be read out simultaneously. Therefore, by aligning the readout timing, the readout can be performed with fewer readouts (two readouts), enabling high-speed and high-precision detection of the phase difference.

[0105] In the first modified example, when acquiring an imaging signal for an image, the photodetector 1 uses floating diffusion FD-1 to FD-3 to acquire the signals of the six photodiodes PDa to PDf in two readouts, and generates an imaging signal for an image by adding them together. The process of adding the signals of the six photodiodes PDa to PDf to generate an imaging signal for an image can be performed by the column processing unit 13 or the signal processing unit 16.

[0106] Figure 18 is a plan view showing a second modified example of the floating diffusion FD in the second embodiment.

[0107] The second modified example shown in Figure 18 is a configuration in which the floating diffusion FD is placed at both the central part of the pixel region shown in Figure 9 and at three predetermined vertices of the pixel boundary shown in Figure 17. In Figure 18, in order to easily distinguish between the floating diffusion FD in the pixel center and the pixel boundary, the floating diffusion FD placed in the pixel center is designated as floating diffusion FD-c and represented by a rectangular shape.

[0108] In the configuration shown in Figure 18, the vertical drive unit 12 outputs the signal from the photodiode PDx using the three floating diffusion FDs at the pixel boundary during phase difference detection. The vertical drive unit 12 reads out the signal from the photodiode PDx by appropriately selecting any of the first to fourth phase difference detection modes described above. On the other hand, when generating an imaging signal for an image, the vertical drive unit 12 simultaneously outputs the signals from the six photodiodes Pda to PDf using the floating diffusion FD-c at the center of the pixel. This allows the signal readout from the photodiode PDx to be performed as simultaneously as possible using the three floating diffusion FDs during phase difference detection, and allows the imaging signal to be acquired in a single readout during imaging signal generation. Both the readout to the floating diffusion FD-c at the center of the pixel and the readout to the three floating diffusion FDs at the pixel boundary use the six transfer transistors TGa to TGf.

[0109] <9. Summary of the First and Second Embodiments> The light detection device 1 has a pixel array section 11 in which hexagonal pixels 20 are arranged in an array. Each pixel 20 has a microlens 31 and a photoelectric conversion section (e.g., a photodiode PDx) that is divided into multiple sections in a planar view. The device is configured to detect a phase difference using signals obtained from the multiple photoelectric conversion sections under the microlens 31. By making the planar shape of the pixel 20 hexagonal, the pixel area can be kept small while increasing the area ratio in which the microlens 31 is arranged on the photoelectric conversion section. This enables miniaturization and improves the performance of phase difference detection.

[0110] In the first embodiment of the photodetector 1, the hexagonal pixel region was divided horizontally and vertically, and four photodiodes PDa to PDd were provided in the pixel 20. In the second embodiment of the photodetector 1, the hexagonal pixel region was divided into six, and six photodiodes PDa to PDf were provided in the pixel 20. Therefore, although the above embodiments show examples of dividing the hexagonal pixel region into four and six, the number of divisions of the photoelectric conversion unit within the pixel may be five. By dividing the photoelectric conversion unit within the pixel into five or more divisions, the variation in the phase difference direction can be increased compared to two or four divisions, and the phase difference detection accuracy can be improved.

[0111] <10. Examples of Other Pixel Structures> In the embodiments described above, examples were given in which the planar shape of the pixel 20 is hexagonal. As an example of other pixel shapes and division of the phase-difference detectable photoelectric conversion unit, as shown in Figure 19, the planar shape of the pixel 20 may be rectangular (square or rectangle), and the rectangular pixel area may be divided into six photodiodes PDa to PDf. The area of ​​the photoelectric conversion area of ​​the six photodiodes PDa to PDf is divided equally. In this case, any of the first to fourth phase-difference detection modes described in Figures 12 to 15 can be appropriately selected. It is possible to select a phase-difference direction with high contrast or to adjust the output balance of the phase-difference signal, thereby improving AF performance in a typical rectangular pixel 20.

[0112] <11. Examples of Application to Electronic Devices> The technology of this disclosure is not limited to application to photodetectors. That is, the technology of this disclosure is applicable to all electronic devices that use a photodetector in the image acquisition unit, such as imaging devices such as digital still cameras and video cameras, portable terminal devices with imaging functions, and photocopiers that use a photodetector in the image reading unit. The photodetector may be formed as a single chip, or it may be in the form of a module with imaging functions in which the imaging unit and the signal processing unit or optical system are packaged together.

[0113] Figure 20 is a block diagram showing an example configuration of an electronic device to which the technology of this disclosure is applied.

[0114] The electronic device 100 in Figure 20 is composed of, for example, an imaging device such as a video camera or a digital still camera.

[0115] The electronic device 100 in Figure 20 includes an optical unit 101 consisting of a lens group and the like, a light detection device 102 employing the configuration of the light detection device 1 in Figure 1, and a DSP (Digital Signal Processor) circuit 103 which is a camera signal processing circuit. The electronic device 100 also includes a frame memory 104, a display unit 105, a recording unit 106, an operation unit 107, and a power supply unit 108. The DSP circuit 103, frame memory 104, display unit 105, recording unit 106, operation unit 107, and power supply unit 108 are interconnected via a bus line 109.

[0116] The optical unit 101 captures incident light (image light) from the subject and forms an image on the imaging surface of the light detection device 102. The light detection device 102 converts the amount of incident light formed on the imaging surface by the optical unit 101 into an electrical signal in units of pixels, photodiodes PDx, etc., and outputs it as a pixel signal. The light detection device 1 in Figure 1 is used as this light detection device 102. Specifically, as the light detection device 102, for example, a light detection device is used in which hexagonal pixels 20 are arranged in an array to form a honeycomb structure, thereby improving the phase difference detection accuracy.

[0117] The display unit 105 is composed of a thin display such as an LCD (Liquid Crystal Display) or an organic EL (Electro Luminescence) display, and displays a video or still image captured by the light detection device 102. The recording unit 106 records the video or still image captured by the light detection device 102 onto a recording medium such as a hard disk or semiconductor memory.

[0118] The operation unit 107 issues operation commands for various functions of the electronic device 100 under the user's input. The power supply unit 108 appropriately supplies various power sources to the DSP circuit 103, frame memory 104, display unit 105, recording unit 106, and operation unit 107.

[0119] By adopting the configuration of the above-described light detection device 1 as the light detection device 102 of the electronic device 100, miniaturization can be achieved and the phase difference detection performance can be improved. Therefore, even in electronic devices 100 such as video cameras, digital still cameras, and camera modules for mobile devices such as mobile phones, miniaturization can be achieved, the phase difference detection performance can be improved, and the image quality of captured images can be improved.

[0120] <12. Example of Image Sensor Use> Figure 21 shows an example of using an image sensor with the light detection device 1 described above.

[0121] The above-described light detection device 1 can be used as an image sensor in various cases where light such as visible light, infrared light, ultraviolet light, and X-rays is sensed, for example, as follows.

[0122] - Devices that capture images for viewing purposes, such as digital cameras and portable devices with camera functions. - Devices used for traffic purposes, such as in-vehicle sensors that capture images of the front, rear, surroundings, and interior of a vehicle for safe driving such as automatic stopping and recognition of the driver's condition, surveillance cameras that monitor moving vehicles and roads, and distance measuring sensors that measure distances between vehicles. - Devices used in home appliances such as TVs, refrigerators, and air conditioners that capture user gestures and allow device operation according to those gestures. - Devices used for medical and healthcare purposes, such as endoscopes and devices that perform angiography using infrared light reception. - Devices used for security purposes, such as surveillance cameras for crime prevention and cameras for person recognition. - Devices used for beauty purposes, such as skin measuring devices that capture images of skin and microscopes that capture images of the scalp. - Devices used for sports purposes, such as action cameras and wearable cameras for sports use. - Devices used for agriculture, such as cameras that monitor the condition of fields and crops.

[0123] Furthermore, this disclosure is not limited to applications to photodetectors that detect the distribution of incident light intensity of visible light and capture it as an image, but is also applicable to photodetectors that capture the distribution of incident amounts of infrared rays, X-rays, or particles as an image, and, in a broader sense, to all photodetectors (physical quantity distribution detection devices) such as fingerprint detection sensors that detect the distribution of other physical quantities such as pressure and capacitance and capture it as an image.

[0124] The embodiments of this disclosure are not limited to those described above, and various modifications are possible without departing from the gist of the technology of this disclosure.

[0125] For example, a combination of all or some of the above-described embodiments can be adopted.

[0126] The effects described herein are merely illustrative and not limiting; other effects may also occur.

[0127] The technology disclosed herein may adopt the following configurations: (1) A photodetector having a pixel array section in which hexagonal pixels are arranged in an array, wherein each pixel has a microlens and a photoelectric conversion section divided into a plurality of sections in a planar view, and is configured to detect a phase difference using signals obtained from the plurality of photoelectric conversion sections below the microlens. (2) The photodetector according to (1), wherein each pixel has a photoelectric conversion section divided into five or more sections. (3) The photodetector according to (2), wherein each pixel has a photoelectric conversion section divided into six sections. (4) The photodetector according to (3), having a phase difference detection mode in which signals obtained from the six photoelectric conversion sections are read out in sequence and a phase difference is detected. (5) The photodetector according to any one of (3) to (4), having a phase difference detection mode in which signals from the six photoelectric conversion sections are read out alternately and a phase difference is detected. (6) The photodetector according to any one of (3) to (5) above, having a phase difference detection mode in which a phase difference is detected using a signal obtained by adding the signals obtained from a plurality of adjacent photoelectric conversion units. (7) The photodetector according to any one of (3) to (6) above, having a phase difference detection mode in which a phase difference is detected using signals obtained from three of the six photoelectric conversion units that are symmetrically arranged around the optical axis. (8) The photodetector according to any one of (3) to (7) above, wherein the pixel further comprises a floating diffusion arranged in the center of the pixel region and six transfer transistors corresponding to the six photoelectric conversion units. (9) The photodetector according to any one of (3) to (7) above, wherein the pixel further comprises three floating diffusions arranged at three predetermined vertices of the hexagonal shape and six transfer transistors corresponding to the six photoelectric conversion units. (10) The photodetector according to any one of (3) to (7), wherein the pixel further comprises one floating diffusion arranged in the center of the pixel region, three floating diffusions arranged at three predetermined vertices of the hexagonal shape, and six transfer transistors corresponding to the six photoelectric conversion units.(11) The photodetector according to any one of (9) to (10), wherein the signals of three of the six photoelectric conversion units are controlled to be read out simultaneously using the three floating diffusions. (12) The photodetector according to any one of (8) to (11), wherein the transfer transistor has a substantially fan-shaped gate electrode. (13) The photodetector according to any one of (3) to (12), wherein the selection transistor, amplification transistor, and reset transistor are shared by the six photoelectric conversion units. (14) The photodetector according to (1), wherein the pixel has the photoelectric conversion unit divided into two or four in a plan view, and the phase difference is detected using the signals obtained from one or more photoelectric conversion units divided in the horizontal or vertical direction. (15) The photodetector according to any one of (1) to (14), wherein the selection transistor, amplification transistor, and reset transistor are arranged to be shared by a plurality of pixels. (16) The photodetector according to any one of (1) to (15), wherein the pixel drive wiring for transmitting a drive signal to drive a pixel transistor which is a selection transistor or a reset transistor comprises a main line connected to a drive unit that generates the drive signal and sub-lines branching from the main line to the pixel transistors of adjacent first and second rows. (17) The photodetector according to any one of (1) to (16), wherein the selection transistor, the amplification transistor, and the reset transistor are arranged in the vicinity of two sides parallel to the column or row direction of the hexagonal shape. (18) The photodetector according to any one of (1) to (17), wherein the microlens is arranged to perform pupil correction. (19) The photodetector according to any one of (1) to (18), wherein the photoelectric conversion unit divided into multiple parts comprises a photoelectric conversion unit that accumulates charge for a first accumulation time and a photoelectric conversion unit that accumulates charge for a second accumulation time longer than the first accumulation time. (20) An electronic device having a pixel array section in which hexagonal pixels are arranged in an array, wherein each pixel has a microlens and a photoelectric conversion section divided into multiple sections in a planar view, and a photodetector is configured to detect a phase difference using signals obtained from the multiple photoelectric conversion sections below the microlens.

[0128] 1. Photodetector, 11. Pixel array section, 12. Vertical drive section, 13. Column processing section, 15. System control section, 16. Signal processing section, 17. Data storage section, 18. Output section, 20. Pixel, Pda to PDf photodiode, TG transfer transistor, FD floating diffusion, RST reset transistor, SEL selection transistor, AMP amplification transistor, 21. Pixel drive wiring, 22. Vertical signal line, 31. Microlens, 100. Electronic equipment, 102. Photodetector

Claims

1. A light detection device having a pixel array section in which hexagonal pixels are arranged in an array, wherein each pixel has a microlens and a photoelectric conversion section divided into multiple sections in a planar view, and the device is configured to detect a phase difference using signals obtained from the multiple photoelectric conversion sections located beneath the microlens.

2. The photodetector according to claim 1, wherein the pixel has the photoelectric conversion unit divided into five or more parts.

3. The photodetector according to claim 2, wherein the pixel has the photoelectric conversion unit divided into six parts.

4. The photodetector according to claim 3, having a phase difference detection mode in which the signals obtained from the six photoelectric conversion units are read out in sequence and the phase difference is detected.

5. The photodetector according to claim 3, having a phase difference detection mode in which the signals of the six photoelectric conversion units are read out alternately and a phase difference is detected.

6. The photodetector according to claim 3, which has a phase difference detection mode in which a phase difference is detected using a signal obtained by adding the signals obtained from a plurality of adjacent photoelectric conversion units.

7. The photodetector according to claim 3, which has a phase difference detection mode in which a phase difference is detected using signals obtained from three of the six photoelectric conversion units that are symmetrically arranged around the optical axis.

8. The photodetector according to claim 3, wherein the pixel further comprises a floating diffusion arranged in the center of the pixel region and six transfer transistors corresponding to the six photoelectric conversion units.

9. The photodetector according to claim 3, wherein the pixel further comprises three floating diffusions arranged at three predetermined vertices of the hexagonal shape, and six transfer transistors corresponding to the six photoelectric conversion units.

10. The photodetector according to claim 3, wherein the pixel further comprises one floating diffusion arranged in the center of the pixel region, three floating diffusions arranged at three predetermined vertices of the hexagonal shape, and six transfer transistors corresponding to the six photoelectric conversion units.

11. The photodetector according to claim 9, wherein the signals of three of the six photoelectric conversion units are controlled to be read out simultaneously using the three floating diffusion units.

12. The photodetector according to claim 8, wherein the transfer transistor has a substantially fan-shaped gate electrode.

13. The photodetector according to claim 3, wherein the selection transistor, the amplification transistor, and the reset transistor are shared by the six photoelectric conversion units.

14. The photodetector according to claim 1, wherein the pixel has two or four photoelectric conversion units divided in a plan view, and a phase difference is detected using signals obtained from one or more photoelectric conversion units divided in a horizontal or vertical direction.

15. The photodetector according to claim 1, wherein the selection transistor, the amplification transistor, and the reset transistor are arranged to be shared by a plurality of pixels.

16. The photodetector according to claim 1, wherein the pixel drive wiring for transmitting a drive signal to drive a pixel transistor which is a selection transistor or a reset transistor comprises a main line connected to a drive unit that generates the drive signal, and sub-lines branching from the main line to the pixel transistors of adjacent first and second rows.

17. The photodetector according to claim 1, wherein the selection transistor, the amplification transistor, and the reset transistor are arranged near two sides parallel to the column or row direction of the hexagonal shape.

18. The light detection device according to claim 1, wherein the microlens is arranged to perform pupil correction.

19. The photodetector according to claim 1, wherein the photoelectric conversion unit, which is divided into multiple parts, comprises a photoelectric conversion unit that accumulates charge for a first accumulation time and a photoelectric conversion unit that accumulates charge for a second accumulation time longer than the first accumulation time.

20. An electronic device comprising a pixel array section having hexagonal pixels arranged in an array, wherein each pixel has a microlens and a photoelectric conversion section divided into multiple sections in a planar view, and a photodetector configured to detect a phase difference using signals obtained from the multiple photoelectric conversion sections beneath the microlens.

Images