Loading sequence for wafer processing in multi-station module

Abstract

Provided herein are methods of forming tungsten nitride (WN) barrier layers in features. Wafers may be loaded into a multi-station process chamber and metal is deposited into features. Deposition may occur across multiple stations to improve wafer to wafer uniformity. Preheating of wafers may be performed prior to deposition operations to improve metal layer properties.

Description

Docket No. LAMRP969WOLOADING SEQUENCE FOR WAFER PROCESSING IN MULTISTATION MODULECROSS-REFERENCE TO RELATED APPLICATIONS

[0001] A PCT Request Form is filed concurrently with this specification as part of the present application. Each application that the present application claims benefit of or priority to as identified in the concurrently filed PCT Request Form is incorporated by reference herein in its entirety and for all purposes.BACKGROUND

[0002] Deposition of materials including tungsten-containing materials is an integral part of many semiconductor fabrication processes. These materials may be used for horizontal interconnects, vias between adjacent metal layers, and contacts between metal layers and devices. As devices shrink and more complex patterning schemes are utilized in the industry, deposition of tungsten films becomes a challenge. The continued decrease in feature size and film thickness bring various challenges including high resistivity for thinner films and difficulty in obtaining void-free fill in features. Deposition in complex high aspect ratio structures such as 3D NAND structures is particularly challenging.

[0003] The background description provided herein is for the purposes of generally presenting the context of the disclosure. Work of the presently named inventors, to the extent it is described in this background section, as well as aspects of the description that may not otherwise qualify as prior art at the time of filing, are neither expressly nor impliedly admitted as prior art against the present disclosure.SUMMARY

[0004] Provided herein are methods of forming tungsten nitride (WN) barrier layers in features. In one aspect of the embodiments herein, a method includes: (a) receiving a plurality of substrates within a process chamber including a plurality of stations, wherein each substrate of the plurality of substrates is received at a different station of the plurality of stations; (b) after (a), performing a first set of deposition cycles at each station; (c) after (b), indexing each substrate of the plurality of substrates to a different station; and (d), after (c) performing a second set of deposition cycles at each station.

[0005] In some embodiments, the method further includes repeating steps (c) and (d) until each substrate of the plurality of substrates has been indexed to each station of the plurality ofDocket No. LAMRP969WO stations. In some embodiments, a total number of deposition cycles performed is not evenly divisible by the number of stations of the plurality of stations. In some embodiments, the process chamber further includes: an indexer; a plurality of carrier rings, each carrier ring corresponding to a different station of the plurality of stations; and a heating element at each station, the method further including: during (a), for each substrate of the plurality of substrates: placing a substrate on a corresponding carrier ring at a first station of the plurality of stations; and indexing each substrate to a different station than the first station except the last substrate of the plurality of substrates to be received on the first station; and between (a) and (b), preheating the plurality of substrates. In some embodiments, during preheating of the plurality of substrates each carrier ring is supported by the indexer, wherein the carrier rings are positioned at a first height above each station. In some embodiments, preheating is performed for between about 30 seconds and about 60 seconds. In some embodiments, preheating is performed at a temperature of at least about 200 °C. In some embodiments, the first height is less than a second height above each station, the second height corresponding to a height of the carrier rings when the indexer indexes carrier rings between stations. In some embodiments, each substrate has a 3-D structure including sidewalls, a plurality of openings in the sidewalls leading to a plurality of features having a plurality of interior regions fluidically accessible through the openings. In some embodiments, the first set of deposition cycles, the second set of deposition cycles, or both include depositing a tungsten-containing layer. In some embodiments, the tungsten-containing layer is deposited on an aluminum oxide film. In some embodiments, the tungsten-containing layer has a thickness of about 10 to about 20 A.

[0006] In some embodiments, depositing the tungsten-containing layer includes one or more cycles including (A)-(C) (A) causing formation of a tungsten sublayer by: (i) causing dosing of diborane to the process chamber and purging diborane from the process chamber one or more times; (ii) after (i), causing dosing of tungsten hexafluoride to the process chamber and purging tungsten hexafluoride from the process chamber one or more times; (B) after (A), causing dosing of diborane to the process chamber and purging diborane from the process chamber; and (C) after (B), causing dosing of a nitriding agent to the process chamber to convert the tungsten sublayer to a tungsten nitride layer and purging the nitriding agent from the process chamber. In some embodiments, the nitriding agent is ammonia. In some embodiments, each deposition cycle includes two or more iterations of (i) before a first iteration of (ii) in the deposition cycle. In some embodiments, each deposition cycle includes at least 3 iterations of (ii). In some embodiments, each deposition cycle includes at least 5 iterations of (ii). In some embodiments, each of (B) and (C) is performed only once per deposition cycle. InDocket No. LAMRP969WO some embodiments, a number of iterations of (ii) in each deposition cycle is greater than a number of iterations of (i). In some embodiments, each dose in (i) has a duration of between 1 and 2 seconds. In some embodiments, each purge in (i) has a duration of less than 5 seconds. In some embodiments, each dose in (ii) has a duration of less than 1 second. In some embodiments, each purge in (ii) has a duration of between 1 and 2 seconds. In some embodiments, a duration of the dosing in (B) is 2 to 10 times longer than a duration of each dose in (i). In some embodiments, a total volume of B2H6 to WFe in (A) is at least 2:1.

[0007] In another aspect of the embodiments herein, a system is provided, the system including: a process chamber including a plurality of stations; and a controller configured to execute machine-readable instructions for: indexing each substrate of a plurality of substrates to a different station of the plurality of stations; performing a first set of ALD cycles on the plurality of substrates; indexing each substrate of the plurality of substrates from the station that each substrate was on to a different station; and performing a second set of ALD cycles on the plurality of substrates; wherein the first set of ALD cycles, the second set of ALD cycles, or both include (a)-(c): (a) causing formation of a tungsten sublayer by: (i) causing dosing of diborane to the process chamber and purging diborane from the process chamber one or more times; (ii) after (i), causing dosing of tungsten hexafluoride to the process chamber and purging tungsten hexafluoride from the process chamber one or more times; (b) after (a), causing dosing of diborane to the process chamber and purging diborane from the process chamber; and (c) after (b), causing dosing of a nitriding agent to the process chamber to convert the tungsten sublayer to a tungsten nitride layer and purging the nitriding agent from the process chamber.

[0008] In another aspect of the embodiments herein, a system is provided, the system including: a process chamber, the process chamber including an indexer and N stations, each station including a heating element; and a controller configured to execute machine-readable instructions for: receiving N substrates at a first station of the N stations; causing the indexer to move each substrate of a first through Mth substrate, wherein M = N-l, to a different station than the first station; and preheating the N substrates, wherein during preheating the N substrates are supported by the indexer at a first height above the station.

[0009] These and other features of the disclosure are described further below.BRIEF DESCRIPTION OF DRAWINGS

[0010] Figures 1A-1E present different views and aspects of an example 3-D NAND structure.

[0011] Figures 2A and 2B present schematic representations of a features having conformal barrier layers.Docket No. LAMRP969WO

[0012] Figures 3 and 4 are process flow diagrams illustrating certain operations in methods of depositing tungsten nitride layers.

[0013] Figures 5 is a process flow diagram illustrating certain operations in methods of filling a feature with metal.

[0014] Figure 6 presents a graphical representation of indexing wafers according to various embodiments herein.

[0015] Figure 7 presents a process flow diagram of preheating wafers according to various embodiments herein.

[0016] Figure 8 presents a side-view representation of a wafer pedestal for loading and preheating according to various embodiments herein.

[0017] Figure 9 presents a perspective view of a carrier ring according to various embodiments herein.

[0018] Figures 10 and 11 shows a schematic representation of an apparatus that may be used to perform the methods described herein.DETAILED DESCRIPTION

[0019] In the following description, numerous specific details are set forth to provide a thorough understanding of the presented embodiments. The disclosed embodiments may be practiced without some or all these specific details. In other instances, well-known process operations have not been described in detail to not unnecessarily obscure the disclosed embodiments. While the disclosed embodiments will be described in conjunction with the specific embodiments, it will be understood that it is not intended to limit the disclosed embodiments.

[0020] Provided herein are methods of forming tungsten-containing layers in features, including tungsten nitride (WN) barrier layers. In particular embodiments, the methods are used to fill wordline features in 3D NAND structures. However, the methods may also be used for WN barrier layer formation in other features including tungsten vias and other vertically- oriented features.

[0021] The methods described herein are performed on a substrate that may be housed in a chamber. The substrate may be a silicon or other semiconductor wafer, e.g., a 200-mm wafer, a 300-mm wafer, or a 450-mm wafer, including wafers having one or more layers of material, such as dielectric, conducting, or semi-conducting material deposited thereon.

[0022] Substrates may have features such as via or contact holes, which may be characterized by one or more of narrow and / or re-entrant openings, constrictions within the feature, and highDocket No. LAMRP969WO aspect ratios. A feature may be formed in one or more of the above-described layers. For example, the feature may be formed at least partially in a dielectric layer. In some embodiments, a feature may have an aspect ratio of at least about 2: 1, at least about 4: 1, at least about 6:1, at least about 10:1, at least about 25:1, or higher. One example of a feature is a hole or via in a semiconductor substrate or a layer on the substrate.

[0023] For some metallization schemes, an adhesion layer and / or barrier layer may be formed to line a feature prior to filling it with metal. A diffusion barrier is a layer that prevents diffusion of species between layers. An adhesion layer is a layer that promotes adhesion of a layer to an underlying layer.

[0024] For certain tungsten metallization applications, tungsten nitride (WN) diffusion barriers may be used. WN barriers have several advantages over barriers such as a titanium adhesion / titanium nitride barrier (Ti / TiN) bilayers. These include the ability to conformally deposit thin WN layers and the ability to deposit WN directly on dielectrics without an adhesion layer. These advantages allow more of the space available to be filled with W, lowering the overall contact resistance. Further, deposition of a WN layer can be performed at much lower temperatures than Ti / TiN, making it advantageous for low thermal budget applications.

[0025] In some embodiments, the methods are used to deposit WN barrier layers prior to wordline fill in 3-D NAND structures. Figure 1A presents a cross-sectional side-view of a 3-D NAND structure 110 (formed on a silicon substrate 102) having VNAND stacks (left 125 and right 126), central vertical structure 130, and a plurality of stacked horizontal features 120 with openings 122 on opposite sidewalls 140 of central vertical structure 130. Note that Figure 1A displays two stacks of the exhibited 3-D NAND structure 110, which together form the trenchlike central vertical structure 130. There may be more than two such stacks arranged in sequence and running spatially parallel to one another with the gap between each adjacent pair of stacks forming a central vertical structure 130, like that illustrated in Figure 1A. The horizontal features 120 are 3-D memory wordline features that are fluidically accessible from the central vertical structure 130 through the openings 122. The horizontal features 120 present in both the 3-D NAND stacks 125 and 126 shown in Figure 1A (i.e., the left 3-D NAND stack 125 and the right 3-D NAND stack 126) are also accessible from the other sides of the stacks (far left and far right, respectively) through similar vertical structures formed by additional 3-D NAND stacks (to the far left and far right, but not shown). In other words, each 3-D NAND stack 125, 126 contains a stack of wordline features that are fluidically accessible from both sides of the 3-D NAND stack through a central vertical structure 130. In the particular example schematically illustrated in Figure 1A, each 3-D NAND stack contains 6 pairs of stackedDocket No. LAMRP969WO wordlines; however, in other embodiments, a 3-D NAND memory layout may contain any number of vertically stacked pairs of wordlines.

[0026] The wordline features in a 3-D NAND stack may be formed by depositing an alternating stack of silicon oxide and silicon nitride layers, and then selectively removing the nitride layers leaving a stack of oxide layers having gaps between them. These gaps are the wordline features. Any number of wordlines may be vertically stacked in such a 3-D NAND structure so long as there is a technique for forming them available, as well as a technique available to successfully accomplish (substantially) void-free fills of the vertical features. Thus, for example, a 3-D NAND stack may include between 2 and 512 horizontal wordline features, or between 2 and 256 horizontal wordline features, or between 8 and 128 horizontal wordline features, or between 16 and 64 horizontal wordline features, and so forth (the listed ranges understood to include the recited end points).

[0027] Figure IB presents a cross-sectional top-down view of the same 3-D NAND structure 110 shown in side-view in Figure 1A with the cross-section taken through the horizontal section 160 as indicated by the dashed horizontal line in Figure 1 A. The cross-section of Figure IB illustrates several rows of pillars 155, which run vertically from the base of semiconductor substrate 102 to the top of 3-D NAND stack 110. In some embodiments, these pillars 155 are formed from a polysilicon material. Polysilicon pillars may serve as gate electrodes for stacked memory cells formed within the pillars. The top- view of Figure IB illustrates that the pillars 155 form constrictions in the openings 122 to wordline features 120 - i.e. fluidic accessibility of wordline features 120 from the central vertical structure 130 via openings 122 (as indicated by the arrows in Figure 1G) is inhibited by pillars 155. This reduction in fluidic accessibility increases the difficulty of uniformly filling wordline features 120 with material. The structure of wordline features 120 and the challenge of uniformly filling them with material due to the presence of pillars 155 is further illustrated in Figures 1C, ID, and IE.

[0028] Figure 1C exhibits a vertical cut through a 3-D NAND structure similar to that shown in Figure 1A, but here focused on a single pair of wordline features 120. Figure 1C also schematically illustrates a void 175 in the filled wordline features 120. Figure ID also schematically illustrates void 175, but in this figure illustrated via a horizontal cut through pillars 155, similar to the horizontal cut exhibited in Figure 1G. Figure IE illustrates the accumulation of tungsten or other metal around the constriction-forming pillars 155, the accumulation resulting in the pinch-off of openings 122, so that no additional metal can be deposited in the region of voids 175. Apparent from Figures 1C and ID is that void-free wordline fill relies on migration of sufficient quantities of deposition precursor down throughDocket No. LAMRP969WO vertical structure 130, through openings 122, past the constricting pillars 155, and into the furthest reaches of wordline features 120, prior to the accumulated deposition of metal around pillars 155 causing a pinch-off of the openings 122 and preventing further precursor migration into wordline features 120. Similarly, Figure IE exhibits a single wordline feature 120 viewed cross-sectionally from above and illustrates how a generally conformal deposition of material begins to pinch-off the interior of wordline feature 120 because the significant width of pillars 155 acts to partially block, and / or narrow, and / or constrict what would otherwise be an open path through wordline feature 120. (It should be noted that the example in Figure IE can be understood as a 2-D rendering of the 3-D features of the structure of the pillar constrictions shown in Figure ID, thus illustrating constrictions that would be seen in a plan view rather than in a cross-sectional view.)

[0029] The challenges due to reduced fluidic accessibility similarly affect deposition of WN barrier layers. While deposition may be thin enough that pinch-off does not occur, obtaining WN barrier layers of uniform thickness can be challenging. These challenges increase as 3D NAND structure become more complex. In some embodiments, for example, reactants may diffuse past at least 5, at least 10, at least 15, at least 20, at least 25, or at least 30 pillars to reach the innermost wordline feature. With an increasing number of pillars, the opportunity for non-uniform deposition occurs.

[0030] Another challenge in depositing WN layers is preventing fluorine incorporation in the film and underlying dielectric. Tungsten hexafluoride (WFe) is a useful precursor as it is a gas at standard conditions, unlike many tungsten halide compounds. However, its use in typical tungsten deposition results in unacceptably high levels of fluorine. Described below are methods of depositing WN using WFe that result in WN films with very low levels of fluorine. As a result, the WN layers are very good diffusion barriers. Subsequent processing to fill the feature with tungsten can also employ WFe as the WN barrier layers prevent fluorine diffusion.

[0031] Examples of deposition in horizontally-oriented and vertically-oriented features are described herein. It should be noted that in at least most cases, the examples are applicable to both horizontally-oriented and vertically-oriented features. Moreover, it should also be noted that in the description below, the term “vertical” may be used to refer to a direction generally orthogonal to the plane of the substrate and the term “lateral” or “horizontal” to refer to a direction generally parallel to the plane of the substrate.

[0032] Figure 2A depicts a schematic example of a wordline feature 220 in a 3D NAND structure. In Figure 2A, a 2-D rendering of 3-D features of a partially-fabricated 3D NAND structure prior to tungsten fill, is shown including the wordline feature 220 and a conformalDocket No. LAMRP969WOWN barrier layer 221. The pillar constrictions are shown in the figure representing constrictions that would be seen in a plan rather than cross-sectional view. The conformal WN barrier layer 221 may be deposited on a dielectric layer (not shown) such an aluminum oxide or other dielectric.

[0033] Figure 2B depicts a schematic example a vertically-oriented feature 270 formed in a dielectric layer 280. Dielectric layer 280 may be silicon oxide, aluminum oxide, or any other appropriate dielectric material. A conformal WN barrier layer 221 lines the feature 270.

[0034] For conformal deposition of a WN layer, an atomic layer deposition (ALD) sequence may be used. Such a sequence can employ the following operations (performed in various orders): (i) providing a layer of reducing agent on a substrate surface, (ii) contacting the substrate surface with a tungsten-containing precursor to form a tungsten layer on the substrate, and (iii) nitriding the tungsten layer to form tungsten nitride. Each of these operations can involve delivering a dose of a reactant (reducing agent, tungsten-containing precursor, and / or nitriding agent) to a chamber housing a substrate including the feature. Purges are performed between these doses to purge out the reactants from the chamber.

[0035] For a diborane (EhFE) reducing agent, WFe precursor, and ammonia (NH3) nitriding agent, a sequence can be expressed as B / W / N, with B representing a B2H6 dose + purge, W representing a WFe dose + purge, and N representing a NH3 dose + purge. This sequence can be repeated for multiple cycles to deposit a WN layer. In other embodiments, hydrogen (H2) may be used as a reducing agent instead of diborane or in addition to diborane. Using H2 instead of or in addition to diborane may reduce boron concentration in the resulting WN film.

[0036] Another challenge in depositing WN layers is reducing surface moisture and evacuating undesirable species from the chamber, in particular nitriding agents such as NH3, which may undesirably react with the wafer. In some embodiments a “pump to base” operation may be performed, during which the pressure in the process chamber may be reduced below a pressure to be used for processing wafers. After the pump to base operation is performed the pressure in the process chamber may be increased prior to deposition operations. Performing a pump to base operation may improve evacuation of undesirable species and improve uniformity of deposition in 3D NAND structures. Various embodiments of pump to base operations are discussed further below in respect to Figures 6A-B and 7.

[0037] Figures 3 and 4 show examples of WN ALD sequences according to certain embodiments. While Figures 3 and 4 discuss WN nitride deposition using WFe and B2H6, other deposition species and reducing agents may be used, including hydrogen-containing species and reducing agents that do not include boron.Docket No. LAMRP969WO

[0038] First in Figure 3, one or more substrates may be received in a process chamber in an operation 300. In some embodiments, the substrates may already be present in the process chamber, while in other embodiments the substrates may be loaded into the process chamber by processes described herein. A pressure in the process chamber is reduced to a base pressure in an operation 301. Reducing pressure in the process chamber prior to deposition operations may evacuated reactants remaining from a prior process, in particular nitriding agents as discussed further below. During operation 301 the pressure may be reduced to a base pressure that is less than a pressure at which the other deposition processes may be performed. Then, B2H6 is dosed and purged one or more times in an operation 302. Then, in an operation 304, WF6is dosed and purged multiple times. Operations 302 and 304 are repeated one or more times to form a W sublayer in an operation 306. In some other embodiments, one iteration of operations 302 and 304 may be sufficient to form the W sublayer. The W sublayer is nitridized in an operation 308. Operation 308 can involve a NH3 dose and purge. In other embodiments, other nitriding agents may be used, with examples including a hydrazine dose or exposure to a plasma generated from N2. Operations 302 to 308 are then repeated one or more times to form the WN layer in an operation 310. In some embodiments, one iteration of operations 302 to 308 may be used to form the WN layer. In the example of Figure 3, at least the B2H6 and WFe doses may be pressurized to increase reaction efficiency.

[0039] Figure 4 shows another example of a process. One or more substrates may be received in a process chamber in an operation 400. In some embodiments, the substrates may already be present in the process chamber, while in other embodiments the substrates may be loaded into the process chamber by processes described herein. The pressure in the process chamber is reduced to a base pressure in an operation 401. Then, B2H6 is dosed and purged one or more times in an operation 402. Then, in an operation 404, WFe is dosed and purged one or more times. Operations 402 and 404 are repeated one or more times to form a W sublayer in an operation 406. In some other embodiments, one iteration of operations 402 and 404 may be sufficient to form the W sublayer. Prior to nitridization, B2H6 is dosed and purged in an operation 408. This is done without a subsequent WFe dose and without forming more W prior to nitridization. The W sublayer is nitridized in an operation 410. Operation 410 can involve a NH3 dose and purge. In other embodiments, other nitriding agents may be used, with examples including a hydrazine dose or exposure to a plasma generated from N2. Operations 402 to 410 are then repeated one or more times to form the WN layer in an operation 412. At least the B2H6 and WF6doses may be pressurized to increase reaction efficiency.

[0040] Examples of these and other sequences are described further below.Docket No. LAMRP969WO

[0041] According to the various embodiments, a sequence may be expressed as ((BP)x / (WP)y)zB / P / N / P, with “B” referring to a diborane pulse, “P” a purge, “W” a tungsten hexafluoride dose, and “N” an ammonia dose. To simplify, the sequence can be expressed without the purge operations as (BxWy)zBN. In these expressions, x is the number of consecutive B2H6 doses, y is the number of consecutive WFe doses, z is the number of times B2H6 and WF6are looped. Purges are used between all doses, though in some embodiments, they may be omitted between consecutive doses of the same reactant.

[0042] In some embodiments, x is an integer greater than or equal to 1, y is an integer greater than or equal to 5, and z is an integer greater than or equal to 1. In the same or other embodiments, x is an integer greater than or equal to 1, y is an integer greater than x, and z is an integer greater than or equal to 1.

[0043] According to various embodiments, the x B2H6 dose or doses in the (BxWy) loop may each have a duration of between 1 and 2 seconds. The x purge or purges following the B2H6 dose may have a duration of less than 5 seconds, or less than 3 seconds.

[0044] According to various embodiments, the x B2H6 dose or doses in the (BxWy) loop may each have a duration longer than the duration of each purge or purges following B2H6.

[0045] According to various embodiments, the y WFe dose or doses in the (BxWy) loop may each have a duration of less than 1 second. The y purge or purges following the WFe dose may have a duration of between 1 and 2 seconds.

[0046] According to various embodiments, the y WFe dose or doses in the (BxWy) loop may each have a duration less than the duration of the purge or purges following WFe.

[0047] The diborane dose after the (BxWy) loop and prior to the NH3 dose may be significantly longer than each x diborane dose. For example, it may be 2-10 times longer than each diborane dose in the (BxWy) loop. In some embodiments, it may be 10 seconds or less.

[0048] According to various embodiments, a charge volume (also referred to as a line changer) may be used to pressurize the reactants prior to each dose. The use of multiple short, pressurized doses facilitates an efficient reaction between B2H6 and WFe, resulting in less fluorine incorporation. It also improves throughput.

[0049] The use of a B2H6 pulse prior to the NH3 pulse allows B2H6 to react with incorporated fluorine, producing boron trifluoride (BF3), which can be purged prior to nitridation. In some embodiments, an H2 dose may be used instead or in addition to B2H6 to form hydrogen fluoride (HF). For example, a pulse sequence may be expressed as (BxWy)zHN or (BxWy)z(B+H)N, wherein H is a dose of H2.

[0050] A sequence described above, (BxWy)zBN, (BxWy)zHN, or (BxWy)z(B+H)N, can beDocket No. LAMRP969WO repeated one or more time to deposit the desired thickness of WN. According to various embodiments, 2 to 4 total sequences are used to form 10 to 20 A. Further, as described above, the diborane or hydrogen dose immediately prior to the ammonia dose may be omitted.

[0051] According to various embodiments, the total volume of B2H6 to WFe in the (BxWy) loop may be about 2: 1 or higher.

[0052] The ratio of reducing agent to precursor may be characterized as the ratio of molecules that the substrate is exposed to and are available to react. It may be calculated from:Reducing agent flow rate x (Reducing agent line charge time + Reducing agent dose time) Precursor flow rate x (Precursor line charge time + Precursor dose time)Line charges are pressurized distributions. Dose time refers to the amount of time the dose lasts. This may be simplified to the below where there is no line charge time:Reducing agent flow rate x Reducing agent dose time Precursor flow rate x Precursor dose timeThis ratio may be between 1.5:1 to 4:1 in some embodiments. In some embodiments, it may be about 2:1.

[0053] The reduction in fluorine was demonstrated as follows. WN was deposited on an AI2O3 aluminum oxide surface using different ALD sequences of B2H6 and WFe as shown in the table below. Fluorine concentration in the deposited WN film and at the WN:AhO3 was measured.

[0054] According to various embodiments, each of operations 302, 304, and 308 in Figure 3 and each of operations 402, 404, 408 and 410 in Figure 4 may be performed in the same processing chamber or in different processing chambers. If performed in the same chamber, they may be performed in a single-station or multi-station chamber. In a multi-station chamber, various operations may be performed at various stations. For example, operation 302 may be performed in a first station, operation 304 in a second station, and operation 308 in a third station.

[0055] After deposition of a WN layer, in some embodiments, the features may be filled withDocket No. LAMRP969WOW or other metal. Figure 5 is a process diagram illustrating operations in filling a structure with metal according to various embodiments. First, a WN film is deposited in the structure in an operation 502. This may be performed as described above and is a generally conformal deposition that lines the exposed surfaces of the structures. For example, in a 3D NAND structure such as that shown in Figure 1A, the film lines the wordline features 120. In some embodiments, W is deposited conformally in the structure in an operation that may be referred to as Depl. This can involve ALD deposition of W. In some embodiments, includes ALD deposition of a nucleation layer followed by ALD bulk deposition. Further description of ALD processes is given below.

[0056] Next, in an operation 504, the structure is non-conformally treated with a boron- containing compound. Non-conformal treatment in this context refers to the treatment being preferentially applied at least at narrow passage or feature opening than in the further in the feature interior. In many embodiments, the boron-containing compound is diborane (ELHe). Treating the features with a boron-containing chemistry increases the inhibition effect of the subsequently applied inhibition treatment. This effect may be due to elemental boron forming onto the surface, diborane (or other compound) adsorbing onto the surface, or some combination of these.

[0057] According to various embodiments, the treatment in operation 504 may be performed directly on the WN film formed in operation 502 or may be performed on a Depl W film if formed.

[0058] Examples of other boron-containing compounds include boranes including BnHn+4, BnHn+6, BnHn+s, BnHm, where n is an integer from 1 to 10, and m is a different integer than m. Other boron-containing compounds may be used, e.g., alkyl boranes, alkyl boron, aminoboranes (CH3) 2NB(CH2)2, carboranes such as C2BnHn+2, and borane halides such as B2F4.

[0059] The structure is non-conformally exposed to the boron-containing gas. Diborane is selfdecomposing gas. If the amount of diborane is limited (e.g., by one or more of diborane concentration, flow rate, and dose time), the gas will decompose closer to the feature opening without diffusing further into the feature. For 3D NAND structures, the treatment may be conformal in the vertical direction such that the bottom wordline feature is treated to approximately the same extent as the top wordline feature, while non-conformal in that the interior of the wordline features are not exposed to the treatment or to a significantly lesser extent than the narrow passage or feature opening.

[0060] In a 3D-NAND structure for example, the diborane will decompose at an outer wordlineDocket No. LAMRP969WO without diffusing into the innermost wordline. Since the diffusion of diborane is easier to control than the diffusion of an inhibition gas such as NF3 and diborane increases the inhibition effect of NF3, it can be used to control the inhibition profile.

[0061] Operation 504 can involve a continuous dose or multiple doses of a boron-containing chemistry, separated by purges. Using multiple short doses can facilitate in preventing diffusion further into the feature than desired.

[0062] According to various embodiments, diborane may be provided with a nitrogen carrier gas (e.g., 5% / 95% B2H6 / N2). Argon may be used to further dilute the diborane, e.g., 1:1 Ar:(B2H6 / N2) or 2:1 (B2H6 / N2).

[0063] Substrate temperature during operation 504 may be limited to control the extent of the inhibition. In some embodiments, it is no more than 300°C or no more than 250°C.

[0064] In some embodiments, diborane may be co-flowed with hydrogen (H2). Hydrogen may be used as parameter to control diborane exposure profile. Diborane decomposes more slowly in the presence of hydrogen than in another carrier gas such as nitrogen (N2). Thus, for faster decomposition at the outer wordline (or other feature opening), hydrogen may be omitted. For complex structures in which the diborane treatment reaches further into the structure, hydrogen may be added. For example, in some 3D NAND structures with multiple pillars, hydrogen may be added to allow the diborane to pass one or more pillars before decomposing or otherwise treating the film.

[0065] After the non-conformal treatment with a boron-containing compound, nucleation in the structure is non-conformally inhibited in an operation 506. As with operation 504, non- conformal treatment in this context refers to the treatment being preferentially applied at least at narrow passage or feature opening than in the further in the feature interior. For 3-D NAND structures, the treatment may be conformal in the vertical direction such that the bottom wordline feature is treated to approximately the same extent as the top wordline feature, while non-conformal in that the interior of the wordline features are not exposed to the treatment or to a significantly lesser extent than the narrow passage or feature opening.

[0066] Nucleation inhibition inhibits subsequent metal nucleation at the treated surfaces. It can involve one or more of: deposition of an inhibition film, reaction of treatment species with the metal film to form a compound film, and adsorption of inhibition species. During the subsequent deposition operation, there is a nucleation delay on the inhibited portions of the underlying film relative to the non- or lesser- inhibited portions.

[0067] In some embodiments, NF3 is used in a thermal inhibition process. Other nitrogencontaining gases such as ammonia (NH3) or hydrazine (N2H4) may be used for thermalDocket No. LAMRP969WO inhibition processes. The inhibition may also be a plasma inhibition, with a nitrogen-containing gas such as N2 used to generate a plasma in a remote or in- situ chamber.

[0068] To tailor lateral non-conformality in the wordlines, pressure and treatment gas flow rate may be adjusted. Higher chamber pressure and lower treatment gas flow rate (and / or concentration) promotes treatment at the openings of the wordline features over treatment within the interiors of the wordline features. Thus, in some embodiments, chamber pressure may lower from operation 502 to 506. Example chamber pressures range from 3 Torr to 40 Torr. And, because the diborane increases the inhibition effect, non-conformality of the inhibition can be controlled by the operation 504 as well as the parameters of operation 506.

[0069] In some embodiments, a treatment gas is pressurized to level significantly higher than the chamber pressure prior to introduction to chamber. This facilitates the gas reaching the bottommost portion of the vertical structure. In the example of NF3 gas, the NF3 gas may be pressurized in a charge volume to a pressure between 10 Torr and 1000 Torr. In some embodiments, the pressure is between 400 Torr and 500 Torr.

[0070] Operation 506 may be a continuous flow or pulsed process. In the latter case, different gases may be pulsed in sequence to tune the treatment.

[0071] After operation 506, a W deposition is performed in operation 508. Operation 508 may involve an AED or CVD process. For deposition into 3D NAND structures, an AED process may be used to allow for good step coverage throughout the structure. Gases more easily reach feature interiors due to the effects of the treatment. After an etch process, film deposited near the feature entrance is removed, allowing more space for gases to reach the interior of the feature and preventing pinch-off. In some embodiments, enough metal film may be removed such that an underlying surface is wholly or partially exposed, increasing nucleation delay at these areas. After an inhibition process, nucleation delay is increased, allowing an inside-out fill process. Operation 508 may complete fill of the structures in some embodiments. In other embodiments, one more additional treatment / deposition operations may be performed.

[0072] According to various embodiments, each of operations 502, 504, 506, and 508 may be performed in the same processing chamber or in different processing chambers. If performed in the same chamber, they may be performed in a single-station or multi-station chamber. In a multi-station chamber, various operations may be performed at various stations. For example, operation 502 may be performed in a first station, operation 504 in a second station, operation 506 in a third station, and operation 508 in a fourth station. Still further, operation 502 may be performed in multiple stations.

[0073] In some embodiments, while various operations are performed in separate stationsDocket No. LAMRP969WO within a single chamber, only a single operation, i.e., operation 502, depositing WN in a structure, may be performed at a time. In another embodiment, when multiple substrates are being processed, various operations may occur concurrently. For example, a first substrate is at station one for operation 502 and a second substrate is at station two for operation 506 in the same multi-station chamber. Both operation 504 and operation 506 may proceed concurrently in the same multi-station chamber. In some embodiments, chamber pressure may be low to prevent any cross -contamination or safety issues. In one example, in operation 504, a structure may be treated using a boron-containing compound (e.g., B2H6) in station one on a first substrate. A second substrate may be undergoing operation 504 using NF3 in a second station. Both the B2H6 treatment in station one and the NF3 in station two can occur concurrently in the same multi-station chamber. To achieve this, the chamber pressure is set to a lower pressure, such as a pressure below 25 Torr.

[0074] In the examples above, deposition of a conformal layer can involve deposition of a nucleation layer. While the nucleation layer can serve as the initial conformal layer in some embodiments, a conformal bulk layer may be deposited on the nucleation layer to form the conformal layer of the initial metal deposition.

[0075] A nucleation layer is a layer that facilitates subsequent deposition of bulk metalcontaining material thereon. It is typically thin and conformal. According to various implementations, a metal nucleation layer may be deposited prior to any fill of the feature and / or at subsequent points during fill of the feature.

[0076] In certain implementations, the nucleation layer is deposited using a cyclical process of sequentially adding reactants for reaction in the feature. The may be an atomic layer deposition (ALD) process and / or a pulsed nucleation layer (PNL) technique. In such a technique, pulses of a reducing agent, optional purge gases, and metal-containing precursor are sequentially injected into and purged from the reaction chamber. The process is repeated in a cyclical fashion until the desired thickness is achieved. PNL techniques for depositing tungsten nucleation layers are described in U.S. Patent Nos. 6,635,965; 7,005,372; 7,141,494; 7,589,017, 7,772,114, 7,955,972 and 8,058,170, and U.S. Patent Publication No. 2010- 0267235, all of which are incorporated by reference herein in their entireties.

[0077] Nucleation layer thickness can depend on the nucleation layer deposition method as well as the desired quality of bulk deposition. In general, nucleation layer thickness is sufficient to support high quality, uniform bulk deposition. Examples may range from 5A-100A, e.g., 5 A to 30 A.

[0078] In certain implementations, a bulk layer may be deposited directly in a feature withoutDocket No. LAMRP969WO use of a nucleation layer. For example, in some implementations, the feature surface and / or an already-deposited under-layer supports bulk deposition.

[0079] Tungsten nucleation layer deposition can involve exposure to alternating pulses of a tungsten-containing precursor (also referred to as a tungsten precursor) and a reducing agent, separated by an inert purge gas. For tungsten deposition, examples of precursors include tungsten hexafluoride (WFe). Chlorine-containing tungsten precursors (WC1X) such as tungsten pentachloride (WCI5) and tungsten hexachloride (WCE) may be used. These precursors may be reduced to elemental tungsten (W) by reaction with reducing agents such as silane (SiFU) and diborane (B2H6).

[0080] In alternate embodiments, a metal precursor and a reducing agent may be co-flowed. If co-flowed, a sequence in which the metal precursor and reducing agent are co-flowed in pulses may be used. During the reactant doses, the metal precursor and reducing agent are co-flowed into the chamber. Co-flowing the reactants is more similar to a CVD reaction, which results in a higher deposition rate and rougher nucleation layer. Various modifications may be made to the sequence. For example, the metal precursor and reducing agent reactant pulses may be offset but overlap with a delay for one reactant with respect to the other. In another example, the inert gas may be pulsed for the purge phase.

[0081] Examples of reducing agents can include boron-containing reducing agents including B2H6 and other boranes, silicon-containing reducing agents including SiFU and other silanes, hydrazine, and germanes. In some implementations, pulses of tungsten-containing precursors can be alternated with pulses of one or more reducing agents, e.g., S / W / S / W / B / W, etc., where W represents a tungsten-containing precursor, S represents a silicon-containing precursor, and B represents a boron-containing precursor. In some implementations, a separate reducing agent may not be used, e.g., an organometallic tungsten-containing precursor may undergo thermal or plasma-assisted decomposition.

[0082] According to various implementations, hydrogen may or may not be run in the background. Further, in some implementations, deposition of a tungsten nucleation layer may be followed by one or more treatment operations prior to tungsten bulk deposition. Treating a deposited tungsten nucleation layer to lower resistivity is described for example in U.S. Patent Nos. 7,772,114 and 8,058,170 and U.S. Patent Publication No. 2010-0267235, incorporated by reference herein.

[0083] Bulk deposition can occur by an ALD or CVD process. In a CVD process, a reducing agent and a metal precursor are co-flowed into a deposition chamber to deposit a bulk fill layer in the feature. An inert carrier gas may be used to deliver one or more of the reactant streams,Docket No. LAMRP969WO which may or may not be pre-mixed. This operation generally involves flowing the reactants continuously until the desired amount is deposited. In certain implementations, the CVD operation may take place in multiple stages, with multiple periods of continuous and simultaneous flow of reactants separated by periods of one or more reactant flows diverted.

[0084] For conformal deposition and deposition into complex structures such as 3D NAND structures, ALD deposition of a bulk layer may be used. ALD deposition of a bulk layer involves exposure to alternating pulses of a metal-containing precursor and a reducing agent, separated by an inert purge gas, using the metal precursors described above with reference to nucleation layer deposition. The same or different metal precursor used in nucleation layer deposition may be used for bulk deposition. In contrast to nucleation layer deposition in which a strong reducing agent such as diborane or silane may be used, hydrogen is often the reducing agent for bulk deposition.

[0085] Deposition may proceed according to various implementations until a certain feature profile is achieved and / or a certain amount of metal is deposited. In some implementations, the deposition time and other relevant parameters may be determined by modeling and / or trial and error. In some implementations, a process chamber may be equipped with various sensors to perform in-situ metrology measurements for end-point detection of a deposition operation. Examples of in-situ metrology include optical microscopy and X-Ray Fluorescence (XRF) for determining thickness of deposited films.

[0086] In some embodiments, the conformal tungsten layer may be characterized as low resistivity and, in some embodiments, low stress and / or low fluorine. Because the wordline features are unfilled (with the exception of the nucleation layer if deposited), a relatively fast deposition technique may be used. In some embodiments, this involves alternating pulses of a W-containing precursor, such as tungsten hexafluoride (WFe), and hydrogen (Fh) or other reducing agent to deposit the first tungsten layer in an ALD process. Purge operations may separate the pulses. Relatively short pulse times may be used for deposition to increase throughput.Metal-containing precursors

[0087] As described above, WFe is used to deposit a WN layer. WFe is a useful precursor as it is in the gas phase at deposition conditions. For deposition of W nucleation and bulk layer, WF6may also be used. In some embodiments, other tungsten-containing precursors may be suitable for performing disclosed embodiments. For example, a metal-organic tungsten- containing precursor may be used. Organo-metallic precursors and precursors that are free of fluorine, such as MDNOW (methylcyclopentadienyl-dicarbonylnitrosyl-tungsten) andDocket No. LAMRP969WOEDNOW (ethylcyclopentadienyl-dicarbonylnitrosyl-tungsten) may also be used. Chlorine- containing tungsten precursors (WC1X) such as tungsten pentachloride (WCI5) and tungsten hexachloride (WCE) may be used.

[0088] Deposition of other metals may be performed on the WN layers. These include molybdenum, ruthenium, and cobalt. To deposit molybdenum (Mo), Mo-containing precursors including molybdenum hexafluoride (MoFe), molybdenum pentachloride (M0CI5), molybdenum dichloride dioxide (MOO2CI2), molybdenum tetrachloride oxide (MoOCU), and molybdenum hexacarbonyl (Mo(CO)e) may be used.

[0089] To deposit ruthenium (Ru), Ru-precursors may be used. Examples of ruthenium precursors that may be used for oxidative reactions include (ethy lbenzyl)(l -ethyl- 1,4- cyclohexadienyl)Ru(O), ( 1 -isopropyl-4-methylbenzyl)( 1 ,3-cyclohexadienyl)Ru(0), 2,3- dimethyl- 1 ,3-butadienyl)Ru(0)tricarbonyl, ( 1 ,3-cyclohexadienyl)Ru(0)tricarbonyl, and (cyclopentadienyl)(ethyl)Ru(II)dicarbonyl. Examples of ruthenium precursors that react with non-oxidizing reactants are bis(5-methyl-2,4-hexanediketonato)Ru(II)dicarbonyl and bis(ethylcyclopentadienyl)Ru(II).

[0090] To deposit cobalt (Co), cobalt-containing precursors including dicarbonyl cyclopentadienyl cobalt (I), cobalt carbonyl, various cobalt amidinate precursors, cobalt diazadienyl complexes, cobalt amidinate / guanidinate precursors, and combinations thereof may be used.

[0091] The metal-containing precursor may be reacted with a reducing agent as described above. In some embodiments, H2 is used as a reducing agent for bulk layer deposition to deposit high purity films.Nucleation layer deposition

[0092] In some implementations, the methods described herein involve deposition of a nucleation layer prior to deposition of a bulk layer. In various implementations, nucleation layer deposition can involve exposure to a metal precursor as described above and a reducing agent. Examples of reducing agents can include boron-containing reducing agents including diborane (B2H6) and other boranes, silicon-containing reducing agents including silane (SilE) and other silanes, hydrazines, and germanes. In some implementations, pulses of metalcontaining can be alternated with pulses of one or more reducing agents, e.g., S / W / S / W / B / W, etc., W representing a tungsten-containing precursor, S represents a silicon-containing precursor, and B represents a boron-containing precursor. In some implementations, a separate reducing agent may not be used, e.g., a tungsten-containing precursor may undergo thermal or plasma-assisted decomposition.Docket No. LAMRP969WOBulk Deposition

[0093] As described above, bulk deposition may be performed across a wafer. In some implementations, bulk deposition can occur by a CVD process in which a reducing agent and a metal-containing precursor are flowed into a deposition chamber to deposit a bulk fill layer in the feature. An inert carrier gas may be used to deliver one or more of the reactant streams, which may or may not be pre-mixed. In some embodiments, deposition may be performed in the presence of a plasma. Unlike PNL or ALD processes, this operation generally involves flowing the reactants continuously until the desired amount is deposited. In certain implementations, the CVD operation may take place in multiple stages, with multiple periods of continuous and simultaneous flow of reactants separated by periods of one or more reactant flows diverted. Bulk deposition may also be performed using ALD processes in which a metalcontaining precursor is alternated with a reducing agent such as H2. In some implementations, ALD may be used to deposit an initial bulk layer in a Depl process with CVD used for the remaining feature fill after inhibition. In some implementations, ALD may be used for feature fill with CVD used for an overburden layer. In some implementations, ALD may be used for all of the bulk layer deposition.

[0094] It should be understood that the metal films described herein may include some amount of other compounds, dopants and / or impurities such as nitrogen, carbon, oxygen, boron, phosphorous, sulfur, silicon, germanium and the like, depending on the particular precursors and processes used. The metal content in the film may range from 20% to 100% (atomic) metal. In many implementations, the films are metal-rich, having at least 50% (atomic) metal, or even at least about 60%, 75%, 90%, or 99% (atomic) metal. In some implementations, the films may be a mixture of metallic or elemental metal (e.g., W, Mo, Co, or Ru) and other metal-containing compounds such as tungsten carbide (WC), tungsten nitride (WN), molybdenum nitride (MoN) etc. CVD and ALD deposition of these materials can include using any appropriate precursors as described above.Inhibition of metal nucleation

[0095] Plasma inhibition processes involve exposure to a plasma generated from a nitrogen containing compound, such as N2. Plasma power, chamber pressure, and / or process gases may be pulsed in some embodiments.

[0096] Thermal inhibition processes generally involve exposing the feature to a nitrogencontaining compound such as ammonia (NH3) or hydrazine (N2H4) to non-conformally inhibit the feature near the feature opening. In some embodiments, the thermal inhibition processes are performed at temperatures ranging from 250°C to 450°C. At these temperatures, exposureDocket No. LAMRP969WO of a previously formed tungsten or other layer to NH3 results in an inhibition effect. Other potentially inhibiting chemistries such as nitrogen (N2) or hydrogen (H2) may be used for thermal inhibition at higher temperatures (e.g., 900°C). For many applications, however, these high temperatures exceed the thermal budget. In addition to ammonia, other hydrogencontaining nitriding agents such as hydrazine may be used at lower temperatures appropriate for back end of line (BEOL) applications. During thermal inhibition, a metal precursor may be flowed with the inhibition gas or in alternating pulses with the gas.

[0097] Nitridation of a surface can passivate it. Subsequent deposition of tungsten or other metal such as molybdenum or cobalt on a nitrided surface is significantly delayed, compared to on a regular bulk tungsten film. In addition to NF3, fluorocarbons such as CF4 or C2F8 may be used. However, in certain implementations, the inhibition species are fluorine-free to prevent etching during inhibition.

[0098] In addition to the surfaces described above, nucleation may be inhibited on liner / barrier layers surfaces such as TiN and / or WN surfaces. Any chemistry that passivates these surfaces may be used. Inhibition chemistry can also be used to tune an inhibition profile, with different ratios of active inhibiting species used. For example, for inhibition of W surfaces, nitrogen may have a stronger inhibiting effect than hydrogen; adjusting the ratio of N2 and H2 gas in a forming gas can be used to tune a profile.

[0099] In certain implementations, the substrate can be heated up or cooled down before inhibition. A predetermined temperature for the substrate can be selected to induce a chemical reaction between the feature surface and inhibition species and / or promote adsorption of the inhibition species, as well as to control the rate of the reaction or adsorption. For example, a temperature may be selected to have high reaction rate such that more inhibition occurs near the gas source.

[0100] After inhibition, the inhibition effect may be modulated as described above. In the same or other embodiments, it may also be modulated by soaking it in a reducing agent or metal precursor, exposing it to a hydrogen-(H-)containing plasma, performing a thermal anneal, exposing it an air, which can reduce the inhibition effect.Wafer Loading

[0101] In various embodiments herein, processes for depositing tungsten nitride (WN) barrier layers and other layers are described. These deposition processes may be performed in a process chamber or tool having two, three, four, five, or even more deposition stations positioned within a single process chamber or tool. In some embodiments each station simultaneously performs an operation, while in other embodiments each station may performDocket No. LAMRP969WO different operations.

[0102] As noted above, in various embodiments substrates are received in a process chamber, as described in operations 300 and 400, above. In some embodiments, this may include loading wafers into a process chamber and onto one of a plurality of stations of a process chamber, which may also be referred to as a tool.

[0103] Figure 6 illustrates various methods for loading wafers into a quad-station tool. Each station is labelled 1-4 (station 1 is obscured by wafer A in the first set of operations). There may also be various processing operations performed, indicated by first, second, third, and fourth sets of operations. There is a traditional indexing mode, a static mode, and a helicopter mode. In a traditional indexing mode, each wafer is sequentially loaded and processed at each station. E.g., wafer A will be processed at each of stations 1, 2, 3, and 4. This may improve wafer non-uniformity and wafer to wafer (W2W) non-uniformity, as the processing is averaged over multiple stations. However, this mode also requires that if each station has the same hardware configurations, then the total number of cycles is a multiple of the number of stations, e.g., four, as each wafer is processed at each station. One method to achieve an odd number of cycles is to have one or more stations be “turned off’ for one or more cycles, but this reduces throughput as some stations are idling while others are performing cycles. Furthermore, one or more stations may need separate hardware than other stations. Stations may typically share hardware, e.g., fluid paths for reagents, which make it difficult to perform cycles on only one station. For example, if station 1 is used to perform additional cycles that are not performed on stations 2, 3, and 4, then station 1 may have separate hardware to facilitate these additional cycles, which is more expensive.

[0104] In static mode, all wafers are loaded prior to performing any cycles. This allows for any number of cycles to be performed without any stations not performing a cycle, as each station performs the same process. However, this may increase W2W non-uniformity, as any differences between stations will be apparent in the processed wafers. This can complicate trouble-shooting and recipe adjustment, as wafers processed on station 2 may have different characteristics than wafers processed on station 4. This is undesirable as it is difficult to track which station a wafer was processed on and requires extensive calibration between stations.

[0105] One technique to combine the benefits of traditional indexing mode and static mode is a helicopter mode. In a helicopter mode, all wafers are loaded into the tool prior to performing any cycles. Each wafer may be processed at a given station for some cycles, and then all wafers are indexed to a different station for additional cycles. Any number of cycles can be performed without skipping cycles on one or more stations. Instead, if a number of cycles is desired thatDocket No. LAMRP969WO is not a multiple of the number of stations, then additional cycles may be performed for one orientation of wafers and stations. For example, during the first set of operations, when wafer A is on station 1, an additional cycle may be performed compared to when wafer A is on stations 2-4, allowing for 5 total cycles to be performed without any station not running for any given cycle. Thus, unlike the traditional indexing mode, which requires the first through fourth set of operations to have the same number of cycles or idling stations, helicopter mode can have a different number of cycles between the first set of operations and the second, third, or fourth operations, without any stations idling during a cycle. Furthermore, helicopter mode has the improved W2W uniformity of a traditional indexing mode because each wafer is processed at each station.

[0106] Thus, in various embodiments herein, the first, second, third, and fourth set of operations may have non-equal numbers of deposition cycles. For example, the first set of operations may perform 3 cycles, while the second, third, and fourth set of operations perform 2 cycles, for a total of 9 cycles. The total number of cycles performed may not be evenly divisible by the number of stations, but all stations are used for each cycle. This provides a distinct advantage over a traditional indexing mode, where the total cycle number would either be a multiple of the number of stations or one or more stations would be turned off for one or more cycles.Preheating

[0107] This disclosure also relates to a preheating treatment of wafers prior to various processing operations described herein. As described above, various processes may be performed at elevated temperatures, e.g., temperatures greater than about 200°C or greater than about 300°C. Wafers may be preheated prior to processing operations to reduce the risk of thermal shock and improve wafer temperature uniformity, which improves processing uniformity. Figure 7 presents a flowchart for preheating wafers. This process may be performed as part of receiving substrates in a process chamber, as described in operations 300 and 400, above. In some embodiments, this may include loading wafers into a process chamber and onto one of a plurality of stations of a process chamber, which may also be referred to as a tool. Figure 8 presents an illustration of two different processes for wafer preheating, including a process 830 that corresponds to the process of Figure 7. Preheating operations described herein may be used in conjunction with various wafer processing modes described herein, including static and helicopter modes.

[0108] Processes 820 and 830 of Figure 8 illustrate two different methods of loading wafers into a multi-station tool and preheating, showing four side-views of a first station duringDocket No. LAMRP969WO loading. A pedestal 802 has a carrier ring 900 and lift pins 808. The lift pins may raise and lower to support the carrier ring 900, raising and lowering it. Dashed lines 812, 814 816 represent different heights of the carrier ring (with reference to a bottom of the carrier ring, though other positions may be used as reference). Dashed line 816 represents the carrier ring resting on the pedestal 802 at a first height. Dashed line 812 represents a pin-lifted position of the carrier ring at a second height, which may be used when loading the carrier ring with a substrate and / or indexing carrier rings (which may or may not be supporting substrates) between stations. Dashed line 814 represents a middle position that may be used when preheating the wafer at a third height. Operations 822 and 832 each provide a view of a carrier ring without a wafer resting on a first station / pedestal with lift pins 808.

[0109] In some semiconductor processing tools, a single chamber may include a plurality of stations / pedestals, as noted above. Such multi-station chambers may include, in some instances, a rotational indexer which can be used to transfer wafers from station / pedestal to station / pedestal within the chamber in between various semiconductor processing operations. An indexer typically includes a center hub and a plurality of equal-length indexer arms. A proximal end of each indexer arm is generally connected with the central hub and a wafer support is typically located at a distal end of each indexer arm; the indexer arms are generally evenly spaced around the center hub. A rotational drive system may be provided to cause the center hub and the indexer arms and wafer supports attached thereto to rotate about a common rotational axis. An example of an indexer is shown in Figure 10 as indexer 1024, discussed further below.

[0110] Operations 824 and 834 illustrate the carrier ring raised by the lift pins 808 so that a wafer may be placed onto the carrier ring 900. A substrate 806 is loaded onto the carrier ring. In some embodiments, the second height corresponds to a height that a wafer transfer system is programmed to place a wafer when transferring a wafer into the multi-station tool. In a multistation chamber with an indexer, a first station / pedestal may have lift pins such as lift pins 808 in Figure 8, while other stations / pedestals may not have lift pins. The lift pins may function to lift the carrier ring to a first height so that a wafer transfer device may move wafers into the chamber and place them on the carrier ring. The lift pins may be used to support the carrier ring instead of the indexer arm to provide additional clearance for the wafer transfer device; the wafer transfer device may be unable to load a wafer while the indexer is supporting the carrier ring.

[0111] Figure 9 presents a perspective view of an example carrier ring 900. Carrier ring 900 may have one or more interior flanges 904 (two are shown in Figure 9). Interior flanges 904Docket No. LAMRP969WO may support a wafer placed thereon. Carrier ring 900 may also have one or more exterior flanges 906. Exterior flanges 906 may allow an indexer and / or lift pins to lift and support the carrier ring, including a wafer supported by the interior flanges 904 of the carrier ring. Thus, when wafers are indexed between pedestals / stations, an indexer may lift the carrier ring and move it between pedestals / stations. In some embodiments, this is performed regardless of whether a wafer is present on the carrier ring. For example, when a second wafer is loaded into a quad- station tool, one carrier ring is supporting a wafer, a second carrier ring receives the second wafer, and the third and fourth carrier rings are not supporting wafers. Each carrier ring may then be indexed, moving the second wafer / carrier ring to a subsequent station while the third, empty carrier ring is moved to the first pedestal / station for receiving a third wafer.

[0112] In a multi- station chamber with an indexer, the stations / pedestals of the chamber may be arranged in a circular array around the rotational axis of the indexer such that each indexer arm may be simultaneously positioned over one of the stations / pedestals when the center hub of the indexer is rotated into any of a first set of angular positions and simultaneously positioned in between two adjacent stations / pedestals when the center hub of the indexer is rotated into any of a second set of angular positions. During semiconductor processing operations, the indexer may be rotated into one of the angular positions in the second set of angular positions, thereby stowing each indexer arm in between adjacent pairs of stations / pedestals. When semiconductor operations are completed, the wafers may be lifted off their respective pedestals by the indexer, which may then rotate into one of the angular positions in the first set of angular positions to position each wafer support at the distal end of each indexer arm under a corresponding one of the wafers / carrier rings.

[0113] As noted above, during wafer loading, lift pins 808 extend up from the pedestal, lifting a carrier ring, and a wafer transfer device loads a wafer onto the carrier ring. This is shown in operations 824 and 834 of Figure 8. In operation 826, the lift pins may then partially retract, supporting the carrier ring and wafer above the pedestal at a third height as shown by line 814. The wafer may be supported at this height while a heating element in the pedestal is turned on, preheating the wafer. Preheating above the pedestal improves heating uniformity and inhibits excessive heating of materials closest to the heater, reducing thermal shock. This preheating may be performed on the first station for various durations, e.g., at least about 10 seconds or about 20 seconds.

[0114] After preheating the wafer, the wafer / carrier ring may then be indexed to a different station, as shown in operation 828. Here, the indexer (not shown) supports the wafer at the second height, indexing the wafer to a subsequent station. A new carrier ring may then beDocket No. LAMRP969WO indexed to the first pedestal, which may be supported by lift pins for loading an additional wafer and preheating, repeating the steps shown in operations 824-28. When the final wafer is loaded into the chamber, the final wafer may then be preheated at the third height, supported by the lift pins, while the other wafers may be additionally preheated directly on the pedestal. The other wafers do not experience thermal shock as they have been previously preheated, unlike the final wafer. After all wafers have been preheated, various fabrication operations may begin as described above.

[0115] Preheating by process 820 may present various challenges. In particular, preheating may be performed for at least about 15 or about 20 seconds for the non-final wafers, and the final wafer preheating may be performed for at least about 30 to about 60 seconds. The total duration of preheating may thus be at least about 75 seconds or at least about 120 seconds, which reduces throughput. Furthermore, the temperature of the final wafer may be different than the temperature of the other wafers, as the final wafer has the least amount of time to preheat. This can cause W2W non-uniformity, which is undesirable. While additional preheating time may reduce W2W temperature non-uniformity, additional preheating time also reduces throughput, which is undesirable.

[0116] Process 830 provides an alternative process that reduces W2W temperature non- uniformity and decreases overall preheating time compared to process 820. In process 830 and also described in Figure 7, all wafers are loaded prior to preheating. Then, all wafers are preheated at the third height. Rather than preheating wafers on lift pins, as shown in process 820, the wafers are preheating on the indexer arms, which may support the wafers above the pedestals at the third height. By preheating all wafers simultaneously, a single preheating operation may be performed, reducing the total time spent preheating and improving throughput. Furthermore, as each wafer is preheated simultaneously, there is reduced W2W temperature non-uniformity. In some embodiments, simultaneous preheating of all wafers may be performed for about 30 to about 60 seconds, reducing the total time spent preheating compared to the process of 820 by at least about 45 seconds or at least about 60 seconds.

[0117] Figure 7 presents a flowchart that corresponds to the operations shown in process 830. The flowchart of Figure 7 begins with loading a wafer onto a first pedestal. (702). This is illustrated in Figure 8 by operation 834. Then, the wafer is indexed to a subsequent pedestal by an indexer. (704). This operation is illustrated by operation 836. Operations 702 and 704 (e.g., operations 834 and 836) are repeated one or more times to load additional wafers. (706) In some embodiments, the loading is repeated based on the number of stations in a tool. For example, a four-station tool may perform three sets of operations 702 and 704 to load threeDocket No. LAMRP969WO wafers, one at each pedestal except the first pedestal. The last wafer is then loaded onto the first pedestal. (708). As the last wafer may be initially processed on the first pedestal, it does not need to be indexed to a subsequent pedestal.

[0118] The wafers are then preheated at the third height while supported by an indexer. (710). In operation 838, the carrier ring / wafer is supported at the third height by the indexer, rather than the lift pins. In some embodiments, as lift pins are used for assisting with wafer loading at the first pedestal, other pedestals may not have lift pins. In such embodiments, the wafers may only be supportable above a pedestal by the indexer. In some embodiments, a carrier ring may be used to support wafers and index wafers between stations with an indexer. In some embodiments, a carrier ring is not used, and wafers may be directly supported by an indexer.

[0119] In some embodiments, preheating may be performed for at least about 30 seconds, at least about 60 seconds, or between about 30 and about 60 seconds. In some embodiments, all wafers are preheated simultaneously. In some embodiments, preheating is performed at a temperature of a heating element of at least about 200 °C. In some embodiments, a wafer is preheated at a height above a pedestal that is lower than a height used for indexing wafers. In some embodiments, the wafer is about 0.1 inches, or at least about 0.015 inches above the pedestal during preheating.APPARATUS

[0120] Any suitable chamber may be used to implement the disclosed embodiments. Example deposition apparatuses include various systems, e.g., ALTUS® and ALTUS® Max, available from Lam Research Corp., of Eremont, California, or any of a variety of other commercially available processing systems.

[0121] In some embodiments, a tool may have two, three, four, five, or even more deposition stations positioned within a single deposition chamber or tool. In some embodiments, each station may perform the same operations or different operations. Thus, for example, hydrogen (H2) and tungsten hexafluoride (WEe) may be introduced in alternating pulses to the surface of the semiconductor substrate at each station, using an individual gas supply system that creates a localized atmosphere at the substrate surface. The same stations may be used for boron treatment and NE3 treatment. In some embodiments the same stations or different stations or tools may be used for subsequent ALD bulk fill.

[0122] Eigure 10 is a schematic of a process system suitable for conducting deposition processes in accordance with embodiments. The system 1000 includes a transfer module 1003. The transfer module 1003 provides a clean, pressurized environment to minimize risk of contamination of substrates being processed as they are moved between various reactorDocket No. LAMRP969WO modules. Mounted on the transfer module 1003 is a multi-station reactor 1009 capable of performing ALD deposition of WN and / or other metal films, treatment, and CVD according to various embodiments. Multi- station reactor 1009 may include multiple stations 1011, 1013, 1015, and 1017 that may sequentially or simultaneously perform operations in accordance with disclosed embodiments. For example, multi-station reactor 1009 may be configured such that station 1011 performs a W sub-layer deposition using a WFe and B2H6, station 1013 performs a nitridation using NH3, station 1015 performs ALD tungsten bulk deposition of a conformal layer using H2 as reducing agent. In another example, station 1011 may perform deposition of WN layer, station 1013 performs ALD deposition of a conformal layer, station 1015 performs a NF3 treatment operation, and station 1017 may perform a bulk ALD fill after treatment using H2 ae reducing agent.

[0123] As noted above, in some embodiments, wafers are indexed to each of stations 1011, 1013, 1015, and 1017 prior to deposition operations described herein. As shown in Figure 10, each station is marked with a number 1-4. The labels 1-4 may correspond with stations 1-4 in Figure 6. Thus, during a wafer loading operation, wafer D may be placed onto station 1, and while wafer D is indexed to station 2, wafer C may be placed onto station 1. This may be repeated, indexing each wafer to the subsequent station until each station has a wafer. While the stations 1011, 1013, 1015, and 1017 have been labeled 1-4 in Figure 10, station 1011 is not necessarily station 1 and other methods of indexing wafers onto stations may be used.

[0124] Stations may include a heated pedestal or substrate support, one or more gas inlets or showerhead or dispersion plate.

[0125] One or more single or multi-station modules 1007 capable of performing plasma or chemical (non-plasma) pre-cleans, other deposition operations, or etch operations may be mounted on the transfer module 1003. The module may also be used for various treatments to, for example, prepare a substrate for a deposition process. The system 1000 also includes one or more wafer source modules 1000, where wafers are stored before and after processing. An atmospheric robot (not shown) in the atmospheric transfer chamber 1019 may first remove wafers from the source modules 1001 to loadlocks 1021. A wafer transfer device 1004 (generally a robot arm unit) in the transfer module 1003 moves the wafers from loadlocks 1021 to and among the modules mounted on the transfer module 1003.

[0126] In various embodiments, a system controller 1029 is employed to control process conditions during deposition. The controller 1029 will typically include one or more memory devices and one or more processors. A processor may include a CPU or computer, analog and / or digital input / output connections, stepper motor controller boards, etc.Docket No. LAMRP969WO

[0127] The controller 1029 may control all of the activities of the deposition apparatus. The system controller 1029 executes system control software, including sets of instructions for controlling the timing, mixture of gases, chamber pressure, chamber temperature, wafer temperature, radio frequency (RF) power levels, wafer chuck or pedestal position, and other parameters of a particular process. Other computer programs stored on memory devices associated with the controller 1029 may be employed in some embodiments.

[0128] Typically, there will be a user interface associated with the controller 1029. The user interface may include a display screen, graphical software displays of the apparatus and / or process conditions, and user input devices such as pointing devices, keyboards, touch screens, microphones, etc.

[0129] System control logic may be configured in any suitable way. In general, the logic can be designed or configured in hardware and / or software. The instructions for controlling the drive circuitry may be hard coded or provided as software. The instructions may be provided by “programming.” Such programming is understood to include logic of any form, including hard coded logic in digital signal processors, application-specific integrated circuits, and other devices which have specific algorithms implemented as hardware. Programming is also understood to include software or firmware instructions that may be executed on a general- purpose processor. System control software may be coded in any suitable computer readable programming language.

[0130] The computer program code for controlling the germanium-containing reducing agent pulses, hydrogen flow, and tungsten-containing precursor pulses, and other processes in a process sequence can be written in any conventional computer readable programming language: for example, assembly language, C, C++, Pascal, Fortran, or others. Compiled object code or script is executed by the processor to perform the tasks identified in the program. Also as indicated, the program code may be hard coded.

[0131] The controller parameters relate to process conditions, such as, for example, process gas composition and flow rates, temperature, pressure, cooling gas pressure, substrate temperature, and chamber wall temperature. These parameters are provided to the user in the form of a recipe and may be entered utilizing the user interface.

[0132] Signals for monitoring the process may be provided by analog and / or digital input connections of the system controller 1029. The signals for controlling the process are output on the analog and digital output connections of the deposition apparatus 1000.

[0133] The system software may be designed or configured in many different ways. For example, various chamber component subroutines or control objects may be written to controlDocket No. LAMRP969WO operation of the chamber components necessary to carry out the deposition processes in accordance with the disclosed embodiments. Examples of programs or sections of programs for this purpose include substrate positioning code, process gas control code, pressure control code, and heater control code.

[0134] In some implementations, a controller 1029 is part of a system, which may be part of the above-described examples. Such systems can include semiconductor processing equipment, including a processing tool or tools, chamber or chambers, a platform or platforms for processing, and / or specific processing components (a wafer pedestal, a gas flow system, etc.). These systems may be integrated with electronics for controlling their operation before, during, and after processing of a semiconductor wafer or substrate. The electronics may be referred to as the “controller,” which may control various components or subparts of the system or systems. The controller 1029, depending on the processing requirements and / or the type of system, may be programmed to control any of the processes disclosed herein, including the delivery of processing gases, temperature settings (e.g., heating and / or cooling), pressure settings, vacuum settings, power settings, radio frequency (RF) generator settings in some systems, RF matching circuit settings, frequency settings, flow rate settings, fluid delivery settings, positional and operation settings, wafer transfers into and out of a tool and other transfer tools and / or load locks connected to or interfaced with a specific system.

[0135] Broadly speaking, the controller may be defined as electronics having various integrated circuits, logic, memory, and / or software that receive instructions, issue instructions, control operation, enable cleaning operations, enable endpoint measurements, and the like. The integrated circuits may include chips in the form of firmware that store program instructions, digital signal processors (DSPs), chips defined as application specific integrated circuits (ASICs), and / or one or more microprocessors, or microcontrollers that execute program instructions (e.g., software). Program instructions may be instructions communicated to the controller in the form of various individual settings (or program files), defining operational parameters for carrying out a particular process on or for a semiconductor wafer or to a system. The operational parameters may, in some embodiments, be part of a recipe defined by process engineers to accomplish one or more processing steps during the fabrication of one or more layers, materials, metals, oxides, silicon, silicon dioxide, surfaces, circuits, and / or dies of a wafer.

[0136] The controller 1029, in some implementations, may be a part of or coupled to a computer that is integrated with, coupled to the system, otherwise networked to the system, or a combination thereof. For example, the controller 1029 may be in the “cloud” or all or a partDocket No. LAMRP969WO of a fab host computer system, which can allow for remote access of the wafer processing. The computer may enable remote access to the system to monitor current progress of fabrication operations, examine a history of past fabrication operations, examine trends or performance metrics from a plurality of fabrication operations, to change parameters of current processing, to set processing steps to follow a current processing, or to start a new process. In some examples, a remote computer (e.g. a server) can provide process recipes to a system over a network, which may include a local network or the Internet. The remote computer may include a user interface that enables entry or programming of parameters and / or settings, which are then communicated to the system from the remote computer. In some examples, the controller receives instructions in the form of data, which specify parameters for each of the processing steps to be performed during one or more operations. The parameters may be specific to the type of process to be performed and the type of tool that the controller is configured to interface with or control. As described above, the controller may be distributed, such as by including one or more discrete controllers that are networked together and working towards a common purpose, such as the processes and controls described herein. An example of a distributed controller for such purposes would be one or more integrated circuits on a chamber in communication with one or more integrated circuits located remotely (such as at the platform level or as part of a remote computer) that combine to control a process on the chamber.

[0137] Without limitation, example systems may include a plasma etch chamber or module, a deposition chamber or module, a spin-rinse chamber or module, a metal plating chamber or module, a clean chamber or module, a bevel edge etch chamber or module, a physical vapor deposition (PVD) chamber or module, a CVD chamber or module, an ALD chamber or module, an atomic layer etch (ALE) chamber or module, an ion implantation chamber or module, a track chamber or module, and any other semiconductor processing systems that may be associated or used in the fabrication and / or manufacturing of semiconductor wafers.

[0138] As noted above, depending on the process step or steps to be performed by the tool, the controller might communicate with one or more of other tool circuits or modules, other tool components, cluster tools, other tool interfaces, adjacent tools, neighboring tools, tools located throughout a factory, a main computer, another controller, or tools used in material transport that bring containers of wafers to and from tool locations and / or load ports in a semiconductor manufacturing factory.

[0139] The controller 1029 may include various programs. A substrate positioning program may include program code for controlling chamber components that are used to load the substrate onto a pedestal or chuck and to control the spacing between the substrate and otherDocket No. LAMRP969WO parts of the chamber such as a gas inlet and / or target. A process gas control program may include code for controlling gas composition, flow rates, pulse times, and optionally for flowing gas into the chamber prior to deposition in order to stabilize the pressure in the chamber. A pressure control program may include code for controlling the pressure in the chamber by regulating, e.g., a throttle valve in the exhaust system of the chamber. A heater control program may include code for controlling the current to a heating unit that is used to heat the substrate. Alternatively, the heater control program may control delivery of a heat transfer gas such as helium to the wafer chuck.

[0140] Examples of chamber sensors that may be monitored during deposition include mass flow controllers, pressure sensors such as manometers, and thermocouples located in the pedestal or chuck. Appropriately programmed feedback and control algorithms may be used with data from these sensors to maintain desired process conditions.

[0141] Figure 11 schematically shows an embodiment of a process station 1100 that may be used to deposit material using atomic layer deposition (ALD) and / or chemical vapor deposition (CVD).For simplicity, the process station 1100 is depicted as a standalone process station having a process chamber body 1102 for maintaining a low-pressure environment. However, it will be appreciated that a plurality of process stations 1100 may be included in a common process tool environment. Further, it will be appreciated that, in some embodiments, one or more hardware parameters of process station 1100, including those discussed in detail below, may be adjusted programmatically by one or more computer controllers.

[0142] Process station 1100 fluidly communicates with reactant delivery system 1101 for delivering process gases to a distribution showerhead 1106. Reactant delivery system 1101 includes a mixing vessel 1104 for blending and / or conditioning process gases for delivery to showerhead 1106. One or more mixing vessel inlet valves 1120 may control introduction of process gases to mixing vessel 1104. Similarly, a showerhead inlet valve 1105 may control introduction of process gasses to the showerhead 1106.

[0143] Some reactants may be stored in liquid form prior to vaporization at and subsequent delivery to the process station. For example, the embodiment of Figure 11 includes a vaporization point 1103 for vaporizing liquid reactant to be supplied to mixing vessel 1104. In some embodiments, vaporization point 1103 may be a heated vaporizer. The reactant vapor produced from such vaporizers may condense in downstream delivery piping. Exposure of incompatible gases to the condensed reactant may create small particles. These small particles may clog piping, impede valve operation, contaminate substrates, etc. Some approaches to addressing these issues involve sweeping and / or evacuating the delivery piping to removeDocket No. LAMRP969WO residual reactant. However, sweeping the delivery piping may increase process station cycle time, degrading process station throughput. Thus, in some embodiments, delivery piping downstream of vaporization point 1103 may be heat traced. In some examples, mixing vessel 1104 may also be heat traced. In one non-limiting example, piping downstream of vaporization point 1103 has an increasing temperature profile extending from approximately 100°C to approximately 150°C at mixing vessel 1104.

[0144] In some embodiments, reactant liquid may be vaporized at a liquid injector. For example, a liquid injector may inject pulses of a liquid reactant into a carrier gas stream upstream of the mixing vessel. In one scenario, a liquid injector may vaporize reactant by flashing the liquid from a higher pressure to a lower pressure. In another scenario, a liquid injector may atomize the liquid into dispersed microdroplets that are subsequently vaporized in a heated delivery pipe. It will be appreciated that smaller droplets may vaporize faster than larger droplets, reducing a delay between liquid injection and complete vaporization. Faster vaporization may reduce a length of piping downstream from vaporization point 1103. In one scenario, a liquid injector may be mounted directly to mixing vessel 1104. In another scenario, a liquid injector may be mounted directly to showerhead 1106.

[0145] In some embodiments, a liquid flow controller upstream of vaporization point 1103 may be provided for controlling a mass flow of liquid for vaporization and delivery to process station 1100. For example, the liquid flow controller (LFC) may include a thermal mass flow meter (MFM) located downstream of the LFC. A plunger valve of the LFC may then be adjusted responsive to feedback control signals provided by a proportional-integral-derivative (PID) controller in electrical communication with the MFM. However, it may take one second or more to stabilize liquid flow using feedback control. This may extend a time for dosing a liquid reactant. Thus, in some embodiments, the LFC may be dynamically switched between a feedback control mode and a direct control mode. In some embodiments, the LFC may be dynamically switched from a feedback control mode to a direct control mode by disabling a sense tube of the LFC and the PID controller.

[0146] Showerhead 1106 distributes process gases toward substrate 1112. In the embodiment shown in FIG. 8, substrate 1112 is located beneath showerhead 1106, and is shown resting on a pedestal 1108. It will be appreciated that showerhead 1106 may have any suitable shape and may have any suitable number and arrangement of ports for distributing processes gases to substrate 1112.

[0147] In some embodiments, a microvolume 1107 is located beneath showerhead 1106. Performing an ALD and / or CVD process in a microvolume rather than in the entire volume ofDocket No. LAMRP969WO a process station may reduce reactant exposure and sweep times, may reduce times for altering process conditions (e.g., pressure, temperature, etc.), may limit an exposure of process station robotics to process gases, etc. Example microvolume sizes include, but are not limited to, volumes between 0.1 liter and 2 liters. This microvolume also impacts productivity throughput. While deposition rate per cycle drops, the cycle time also simultaneously reduces. In certain cases, the effect of the latter is dramatic enough to improve overall throughput of the module for a given target thickness of film.

[0148] In some embodiments, pedestal 1108 may be raised or lowered to expose substrate 1112 to microvolume 1107 and / or to vary a volume of microvolume 1107. For example, in a substrate transfer phase, pedestal 1108 may be lowered to allow substrate 1112 to be loaded onto pedestal 1108. During a deposition process phase, pedestal 1108 may be raised to position substrate 1112 within microvolume 1107. In some embodiments, microvolume 1107 may completely enclose substrate 1112 as well as a portion of pedestal 1108 to create a region of high flow impedance during a deposition process.

[0149] Optionally, pedestal 1108 may be lowered and / or raised during portions the deposition process to modulate process pressure, reactant concentration, etc., within microvolume 1107. In one scenario where process chamber body 1102 remains at a base pressure during the deposition process, lowering pedestal 1108 may allow microvolume 1107 to be evacuated. Example ratios of microvolume to process chamber volume include, but are not limited to, volume ratios between 1:800 and 1:10. It will be appreciated that, in some embodiments, pedestal height may be adjusted programmatically by a suitable computer controller.

[0150] In another scenario, adjusting a height of pedestal 1108 may allow a plasma density to be varied during plasma activation and / or treatment cycles included in the deposition process. At the conclusion of the deposition process phase, pedestal 1108 may be lowered during another substrate transfer phase to allow removal of substrate 1112 from pedestal 1108.

[0151] While the example microvolume variations described herein refer to a height-adjustable pedestal, it will be appreciated that, in some embodiments, a position of showerhead 1106 may be adjusted relative to pedestal 1108 to vary a volume of microvolume 1107. Further, it will be appreciated that a vertical position of pedestal 1108 and / or showerhead 1106 may be varied by any suitable mechanism within the scope of the present disclosure. In some embodiments, pedestal 1108 may include a rotational axis for rotating an orientation of substrate 1112. It will be appreciated that, in some embodiments, one or more of these example adjustments may be performed programmatically by one or more suitable computer controllers.Docket No. LAMRP969WO

[0152] In some embodiments, pedestal 1108 may be temperature controlled via heater 1110. Further, in some embodiments, pressure control for deposition process station 1100 may be provided by butterfly valve 1118. As shown in the embodiment of FIG. 8, butterfly valve 1118 throttles a vacuum provided by a downstream vacuum pump (not shown). However, in some embodiments, pressure control of process station 1100 may also be adjusted by varying a flow rate of one or more gases introduced to process station 1100.

[0153] The foregoing describes implementation of disclosed embodiments in a single or multichamber semiconductor processing tool. The apparatus and process described herein may be used in conjunction with lithographic patterning tools or processes, for example, for the fabrication or manufacture of semiconductor devices, displays, LEDs, photovoltaic panels, and the like. Typically, though not necessarily, such tools / processes will be used or conducted together in a common fabrication facility. Lithographic patterning of a film typically includes some or all of the following steps, each step provided with a number of possible tools: (1) application of photoresist on a workpiece, i.e., substrate, using a spin-on or spray-on tool; (2) curing of photoresist using a hot plate or furnace or UV curing tool; (3) exposing the photoresist to visible or UV or x-ray light with a tool such as a wafer stepper; (4) developing the resist so as to selectively remove resist and thereby pattern it using a tool such as a wet bench; (5) transferring the resist pattern into an underlying film or workpiece by using a dry or plasma- assisted etching tool; and (6) removing the resist using a tool such as an RF or microwave plasma resist stripper.CONCLUSION

[0154] As used in this specification and appended claims, the singular forms “a”, “an”, and “the” include plural referents unless the content and context dictates otherwise. Lor example, reference to “a cell” includes a combination of two or more such cells. Unless indicated otherwise, an “or” conjunction is used in its correct sense as a Boolean logical operator, encompassing both the selection of features in the alternative (A or B, where the selection of A is mutually exclusive from B) and the selection of features in conjunction (A or B, where both A and B are selected).

[0155] It is to be understood that the phrases “for each <item> of the one or more <items>,” “each <item> of the one or more <items>,” or the like, if used herein, are inclusive of both a single-item group and multiple-item groups, i.e., the phrase “for ... each” is used in the sense that it is used in programming languages to refer to each item of whatever population of items is referenced. Bor example, if the population of items referenced is a single item, then “each” would refer to only that single item (despite the fact that dictionary definitions of “each”Docket No. LAMRP969WO frequently define the term to refer to “every one of two or more things”) and would not imply that there must be at least two of those items. Similarly, the term “set” or “subset” should not be viewed, in itself, as necessarily encompassing a plurality of items — it will be understood that a set or a subset can encompass only one member or multiple members (unless the context indicates otherwise).

[0156] The use, if any, of ordinal indicators, e.g., (a), (b), (c)... or the like, in this disclosure and claims is to be understood as not conveying any particular order or sequence, except to the extent that such an order or sequence is explicitly indicated. For example, if there are three steps labeled (i), (ii), and (iii), it is to be understood that these steps may be performed in any order (or even concurrently, if not otherwise contraindicated) unless indicated otherwise. For example, if step (ii) involves the handling of an element that is created in step (i), then step (ii) may be viewed as happening at some point after step (i). Similarly, if step (i) involves the handling of an element that is created in step (ii), the reverse is to be understood. It is also to be understood that use of the ordinal indicator “first” herein, e.g., “a first item,” should not be read as suggesting, implicitly or inherently, that there is necessarily a “second” instance, e.g., “a second item.”

[0157] Ranges of numerical values described herein are inclusive of the disclosed values except to the extent that such values are explicitly excluded. For example, a “range between X and Y” is inclusive of X and Y.

[0158] Various computational elements including processors, memory, instructions, routines, models, or other components may be described or claimed as “configured to” perform a task or tasks. In such contexts, the phrase “configured to” is used to connote structure by indicating that the component includes structure (e.g., stored instructions, circuitry, etc.) that performs the task or tasks during operation. As such, the unit / circuit / component can be said to be configured to perform the task even when the specified component is not necessarily currently operational (e.g., is not on).

[0159] The components used with the “configured to” language may refer to hardware — for example, circuits, memory storing program instructions executable to implement the operation, etc. Additionally, “configured to” can refer to generic structure (e.g., generic circuitry) that is manipulated by software and / or firmware (e.g., an FPGA or a general -purpose processor executing software) to operate in manner that is capable of performing the recited task(s). Additionally, “configured to” can refer to one or more memories or memory elements storing computer executable instructions for performing the recited task(s). Such memory elements may include memory on a computer chip having processing logic. In some contexts,Docket No. LAMRP969WO“configured to” may also include adapting a manufacturing process (e.g., a semiconductor fabrication facility) to fabricate devices (e.g., integrated circuits) that are adapted to implement or perform one or more tasks.

[0160] Although the foregoing embodiments have been described in some detail for purposes of clarity of understanding, it will be apparent that certain changes and modifications may be practiced within the scope of the appended claims. It should be noted that there are many alternative ways of implementing the processes, systems, and apparatus of the present embodiments. Accordingly, the present embodiments are to be considered as illustrative and not restrictive, and the embodiments are not to be limited to the details given herein.

Claims

1. Docket No. LAMRP969WOCLAIMSWhat is claimed is:

1. A method comprising:(a) receiving a plurality of substrates within a process chamber comprising a plurality of stations, wherein each substrate of the plurality of substrates is received at a different station of the plurality of stations;(b) after (a), performing a first set of deposition cycles at each station;(c) after (b), indexing each substrate of the plurality of substrates to a different station; and(d) after (c), performing a second set of deposition cycles at each station.

2. The method of claim 1, further comprising repeating steps (c) and (d) until each substrate of the plurality of substrates has been indexed to each station of the plurality of stations.

3. The method of claim 1, wherein a total number of deposition cycles performed is not evenly divisible by the number of stations of the plurality of stations.

4. The method of claim 1, wherein the process chamber further comprises: an indexer; a plurality of carrier rings, each carrier ring corresponding to a different station of the plurality of stations; and a heating element at each station, the method further comprising: during (a), for each substrate of the plurality of substrates: placing a substrate on a corresponding carrier ring at a first station of the plurality of stations; and indexing each substrate to a different station than the first station except the last substrate of the plurality of substrates to be received on the first station; and between (a) and (b), preheating the plurality of substrates.

5. The method of claim 4, wherein during preheating of the plurality of substrates each carrier ring is supported by the indexer, wherein the carrier rings are positioned at a first height above each station.Docket No. LAMRP969WO6. The method of claim 5, wherein preheating is performed for between about 30 seconds and about 60 seconds.

7. The method of claim 5, wherein preheating is performed at a temperature of at least about 200 °C.

8. The method of claim 5, wherein the first height is less than a second height above each station, the second height corresponding to a height of the carrier rings when the indexer indexes carrier rings between stations.

9. The method of claim 1, wherein each substrate has a 3-D structure comprising sidewalls, a plurality of openings in the sidewalls leading to a plurality of features having a plurality of interior regions fluidically accessible through the openings.

10. The method of claim 1, wherein the first set of deposition cycles, the second set of deposition cycles, or both comprise depositing a tungsten-containing layer.

11. The method of claim 10, wherein the tungsten-containing layer is deposited on an aluminum oxide film.

12. The method of claim 10, wherein the tungsten-containing layer has a thickness of about 10 to about 20 A.

13. The method of claim 10, wherein depositing the tungsten-containing layer comprises one or more cycles comprising (A)-(C)(A) causing formation of a tungsten sublayer by:(i) causing dosing of diborane to the process chamber and purging diborane from the process chamber one or more times;(ii) after (i), causing dosing of tungsten hexafluoride to the process chamber and purging tungsten hexafluoride from the process chamber one or more times;(B) after (A), causing dosing of diborane to the process chamber and purging diborane from the process chamber; and(C) after (B), causing dosing of a nitriding agent to the process chamber to convert the tungsten sublayer to a tungsten nitride layer and purging the nitriding agent from the processDocket No. LAMRP969WO chamber.

14. The method of claim 13, wherein the nitriding agent is ammonia.

15. The method of claim 13, wherein each deposition cycle comprises two or more iterations of (i) before a first iteration of (ii) in the deposition cycle.

16. The method of claim 13, wherein each deposition cycle comprises at least 3 iterations of (ii).

17. The method of claim 13, wherein each deposition cycle comprises at least 5 iterations of (ii).

18. The method of claim 13, wherein each of (B) and (C) is performed only once per deposition cycle.

19. The method of claim 13, wherein a number of iterations of (ii) in each deposition cycle is greater than a number of iterations of (i).

20. The method of claim 13, wherein each dose in (i) has a duration of between 1 and 2 seconds.

21. The method of claim 20, wherein each purge in (i) has a duration of less than 5 seconds.

22. The method of claim 20, wherein each dose in (ii) has a duration of less than 1 second.

23. The method of claim 20, wherein each purge in (ii) has a duration of between 1 and 2 seconds.

24. The method of claim 13, wherein a duration of the dosing in (B) is 2 to 10 times longer than a duration of each dose in (i).Docket No. LAMRP969WO25. The method of claim 13, wherein a total volume of B2H6 to WFe in (A) is at least 2:1.

26. A system, comprising: a process chamber comprising a plurality of stations; and a controller configured to execute machine-readable instructions for: indexing each substrate of a plurality of substrates to a different station of the plurality of stations; performing a first set of ALD cycles on the plurality of substrates; indexing each substrate of the plurality of substrates from the station that each substrate was on to a different station; and performing a second set of ALD cycles on the plurality of substrates; wherein the first set of ALD cycles, the second set of ALD cycles, or both comprise(a)-(c):(a) causing formation of a tungsten sublayer by:(i) causing dosing of diborane to the process chamber and purging diborane from the process chamber one or more times;(ii) after (i), causing dosing of tungsten hexafluoride to the process chamber and purging tungsten hexafluoride from the process chamber one or more times;(b) after (a), causing dosing of diborane to the process chamber and purging diborane from the process chamber; and(c) after (b), causing dosing of a nitriding agent to the process chamber to convert the tungsten sublayer to a tungsten nitride layer and purging the nitriding agent from the process chamber.

27. A system, comprising: a process chamber, the process chamber comprising an indexer and N stations, each station comprising a heating element; and a controller configured to execute machine-readable instructions for: receiving N substrates at a first station of the N stations; causing the indexer to move each substrate of a first through Mth substrate, wherein M = N-l, to a different station than the first station; and preheating the N substrates, wherein during preheating the N substrates are supported by the indexer at a first height above the station.

Images