Inspection device and semiconductor chip production method

Abstract

The present invention comprises a wafer chuck (10) that fixes a semiconductor wafer (1) by vacuum suction and a probe card (20) that inspects the electrical characteristics of the semiconductor wafer (1). The probe card (20) has a pressure chamber (60) which has a pressure space (PS) and in which the pressure space (PS) is sealed by bringing a one end (61)-side into contact with a one surface (1a)-side of the semiconductor wafer (1). The pressure chamber (60) has a cylindrical surrounding wall (40) and a contact shield (50) which is provided on a one end (42)-side of the surrounding wall (40), and which is made of a softer material than is a surrounding wall (41) and also constitutes the one end (61)-side of the pressure chamber (60), to contact the one surface (1a)-side of the semiconductor wafer (1). The present invention is configured such that when the one end (61)-side contacts the one surface (1a)-side of the semiconductor wafer (1), some of a plurality of chip formation regions (Ra) on the one surface (1a)-side of the semiconductor wafer (1) are positioned inside the pressure space (PS) and the remaining chip formation regions (Ra) are positioned outside the pressure space (PS).

Description

Inspection Device and Method for Manufacturing Semiconductor Chips Cross - Reference to Related Applications

[0001] This application is based on Japanese Patent Application No. 2024 - 179932 filed on October 15, 2024, the content of which is incorporated herein by reference.

[0002] The present disclosure relates to an inspection device and a method for manufacturing semiconductor chips.

[0003] Conventionally, there has been proposed an inspection method for performing an electrical characteristic inspection on a semiconductor wafer having a plurality of chip formation regions in which semiconductor elements are formed and having electrodes electrically connected to the semiconductor elements on one side. For example, in Patent Document 1, an inspection method for performing an electrical characteristic inspection is proposed as follows. That is, in this inspection method, first, the semiconductor wafer is fixed to the wafer chuck by vacuum - sucking the other side of the semiconductor wafer by the wafer chuck. Then, a surrounding wall is arranged so as to accommodate the entire one - side of the semiconductor wafer, the probe needles are brought into contact with the electrodes, and the inside of the surrounding wall is evacuated to a vacuum state. After that, in the vacuum state, the electrical characteristics of each chip formation region are inspected.

[0004] Japanese Patent No. 5436146

[0005] However, in the above - described inspection method, the entire one - side of the semiconductor wafer is arranged inside the surrounding wall in a vacuum state. For this reason, the pressure difference between the one - side and the other - side of the semiconductor wafer becomes small, and the adhesion force by which the semiconductor wafer adheres to the wafer chuck side becomes small. Therefore, the semiconductor wafer is likely to warp, and a gap is formed between the semiconductor wafer and the wafer chuck due to the warping of the semiconductor wafer, which may reduce the reliability of the inspection.

[0006] An object of the present disclosure is to provide an inspection device and a method for manufacturing semiconductor chips that can suppress a decrease in inspection reliability.

[0007] According to one aspect of this disclosure, the inspection apparatus comprises a wafer chuck on which a semiconductor wafer is placed, having one side and the other side opposite to the first side, with semiconductor elements formed in a plurality of chip formation regions and electrodes connected to the semiconductor elements formed on the one side, and which fixes the other side of the semiconductor wafer by vacuum suction; a probe card for performing electrical characteristic testing of the semiconductor wafer; and a state control unit for performing predetermined processing. The probe card comprises a pressure chamber having a pressure space, the pressure space being sealed when one end is brought into contact with the one side of the semiconductor wafer, and a probe needle drawn into the pressure chamber. The pressure chamber comprises a cylindrical surrounding wall having one end and the other end and a hollow portion, and a component provided on one end of the surrounding wall that is softer than the surrounding wall. The device comprises a contact shield made of a material that forms one end of a pressure chamber and is in contact with one side of a semiconductor wafer, and a pressure space is formed in the space enclosed by the surrounding wall and the contact shield. When one end of the pressure chamber is in contact with one side of the semiconductor wafer, the probe needle comes into contact with the electrode, and a portion of the multiple chip formation regions on one side of the semiconductor wafer is located within the pressure space, while the remaining chip formation regions are located outside the pressure space. The state control unit adjusts the pressure in the pressure space to a predetermined vacuum pressure after one end of the pressure chamber is in contact with one side of the semiconductor wafer and the pressure space is sealed, and the probe card performs electrical characteristic testing after the pressure space reaches the predetermined vacuum pressure.

[0008] According to this design, the pressure chamber is shaped such that some of the multiple chip formation regions on one side of the semiconductor wafer are located within the pressure space, while the remaining chip formation regions are located outside the pressure space. Therefore, when one end of the pressure chamber is brought into contact with one side of the semiconductor wafer and the pressure space is reduced to a vacuum, atmospheric pressure is applied to the chip formation regions located outside the pressure space on that side of the semiconductor wafer. Consequently, the pressure difference between the portion outside the pressure space and the portion being sucked by the wafer chuck becomes larger, which can suppress warping of the semiconductor wafer. This helps to prevent a decrease in the reliability of the inspection.

[0009] According to another aspect of this disclosure, a method for manufacturing a semiconductor chip involves preparing a semiconductor wafer having one side and another side opposite to the first side, with semiconductor elements formed in each of a plurality of chip formation regions and electrodes connected to the semiconductor elements formed on the one side; placing the semiconductor wafer on a wafer chuck with the other side facing the wafer chuck and fixing the semiconductor wafer to the wafer chuck by vacuum suction; preparing a probe card having a pressure chamber having a pressure space, with one end in contact with one side of the semiconductor wafer to seal the pressure space, and a probe needle drawn out into the pressure chamber; performing an electrical characteristic test by contacting the electrodes of the semiconductor wafer with the probe needle; and after performing the electrical characteristic test, dividing the semiconductor wafer along the chip formation region, wherein the probe card has one end and another end and has a hollow portion. The device has a cylindrical surrounding wall and a contact shield provided at one end of the surrounding wall, made of a softer material than the surrounding wall, which forms one end of the pressure chamber and is brought into contact with one side of the semiconductor wafer. The space enclosed by the surrounding wall and the contact shield constitutes a pressure space, and when one end of the pressure chamber is brought into contact with one side of the semiconductor wafer, the probe needle comes into contact with the electrode, and a portion of the multiple chip formation regions on one side of the semiconductor wafer is located within the pressure space, while the remaining chip formation regions are located outside the pressure space. Before performing the electrical characteristic test, the pressure space is sealed by bringing one end of the pressure chamber into contact with one side of the semiconductor wafer and bringing the probe needle into contact with the electrode, and the pressure space is evacuated to a predetermined vacuum pressure. The electrical characteristic test is performed after the pressure space has reached the predetermined vacuum pressure.

[0010] According to this method, a pressure chamber is prepared in which some of the multiple chip formation regions on one side of a semiconductor wafer are located within the pressure space, while the remaining chip formation regions are located outside the pressure space. Therefore, when one end of the pressure chamber is brought into contact with one side of the semiconductor wafer and the pressure space is made into a vacuum, atmospheric pressure is applied to the chip formation regions located outside the pressure space on one side of the semiconductor wafer. Consequently, the pressure difference between the portion located outside the pressure space and the portion sucked by the wafer chuck becomes large, which can suppress warping of the semiconductor wafer. This can suppress a decrease in the reliability of the inspection.

[0011] This is a schematic diagram showing the inspection apparatus in the first embodiment. This is a flowchart showing the inspection process in the semiconductor chip manufacturing process. This is a schematic diagram showing one end of a pressure chamber in contact with one side of a semiconductor wafer. This is a schematic diagram showing one end of a pressure chamber in contact with one side of a semiconductor wafer in a modified example of the first embodiment. This is a schematic diagram showing the inspection apparatus in the second embodiment. This is a schematic diagram showing the inspection apparatus in the third embodiment. This is a schematic diagram showing one end of a pressure chamber in contact with one side of a semiconductor wafer in the third embodiment. This is a schematic diagram showing one end of a pressure chamber in contact with one side of a semiconductor wafer in a modified example of the third embodiment.

[0012] The embodiments of this disclosure will be described below with reference to the drawings. In the following embodiments, parts that are the same or equivalent to each other will be denoted by the same reference numerals.

[0013] (First Embodiment) The first embodiment will be described with reference to the drawings. First, the configuration of the inspection apparatus S1 of this embodiment will be described. In this embodiment, as shown in Figure 1, the inspection apparatus S1 is used as an example to describe an inspection apparatus S1 that performs electrical characteristic testing of a semiconductor wafer 1 having one surface 1a and another surface 1b, with a plurality of chip formation regions Ra partitioned by dicing lines DL, and contact electrodes 2 formed on the side of one surface 1a of the chip formation region Ra. The contact electrodes 2 here include, for example, a plurality of electrodes such as source electrodes, drain electrodes, and gate electrodes when a MOSFET (abbreviation for Metal Oxide Semiconductor Field Effect Transistor) is formed as a semiconductor element.

[0014] The inspection device S1 is configured to include a wafer chuck 10, a probe card 20, a state control unit 100, and the like.

[0015] The wafer chuck 10 holds the semiconductor wafer 1 in place and secures it by vacuum suction. For example, the wafer chuck 10 is configured to include a stage 11 having an internal space and a plurality of holes in its mounting surface 11a that communicate with the space, a vacuum source that vacuum-suctions the semiconductor wafer 1 through the space and holes, and a heating device that heats the stage 11. When the semiconductor wafer 1 is placed on the wafer chuck 10, it secures the semiconductor wafer 1 by vacuum suction while maintaining the semiconductor wafer 1 at a predetermined temperature (for example, 200°C). The wafer chuck 10 is also connected to a displacement mechanism (not shown), and can be displaced when the displacement mechanism is activated.

[0016] In this embodiment, the probe card 20 is a cantilever-type probe card and includes a probe card board 30, a pressure chamber 60 having a surrounding wall 40 and a contact shield 50, a probe needle 70, etc. In this embodiment, the probe card 20 is fixed in place. However, the probe card 20 may be connected to a displacement mechanism (not shown), similar to the wafer chuck 10, and may be displaceable when the displacement mechanism is activated. The probe card 20 is also connected to a tester (not shown) that performs electrical characteristic testing.

[0017] The probe cardboard 30 is made of a plate-shaped printed circuit board or the like, on which wiring sections (not shown) are formed, and has one surface 30a and another surface 30b opposite to the surface 30a. In addition, the probe cardboard 30 of this embodiment has a through hole 31 formed in approximately the center.

[0018] The surrounding wall 40 is cylindrical with a hollow section 41. In this embodiment, the surrounding wall 40 is a bottomed cylindrical shape with one end 42 being an open end and the other end 43 being the bottom, and the space between the one end 42 and the other end 43 being the side section 44. The surrounding wall 40 is provided to close the through hole 31 formed in the probe cardboard 30. In this embodiment, the surrounding wall 40 is provided on the probe cardboard 30 such that one end 42 is located on the other side 30b of the probe cardboard 30 and the other end 43 is located on the one side 30a. Furthermore, the surrounding wall 40 has a through hole 43a formed in the other end 43 which is the bottom, and a communication pipe 45 that communicates with the hollow section 41 is provided in the through hole 43a. The surrounding wall 40 is made of, for example, a peak material.

[0019] The contact shield 50 is frame-shaped and, in this embodiment, is provided over the entire end 42 of the surrounding wall 40. The contact shield 50 is made of a softer material than the surrounding wall 40. For example, the contact shield 50 is made of a fluororesin or the like. In this embodiment, the pressure chamber 60 having the surrounding wall 40 and the contact shield 50 is configured in this way. In this embodiment, the pressure space PS is configured in the space surrounded by the surrounding wall 40 and the contact shield 50 (i.e., the space inside the pressure chamber 60). Hereinafter, the end of the pressure chamber 60 on the contact shield 50 side will be described as one end 61 of the pressure chamber 60. In other words, one end 61 of the pressure chamber 60 is made of the contact shield 50.

[0020] Here, the pressure chamber 60, as will be described in more detail later, has one end 61 (i.e., the contact shield 50) that contacts one surface 1a of the semiconductor wafer 1, thereby sealing the pressure space PS. The pressure chamber 60 has the following shape at the end 61. That is, when the end 61 of the pressure chamber 60 contacts one surface 1a of the semiconductor wafer 1, some of the multiple chip formation regions Ra on one surface 1a of the semiconductor wafer 1 are located within the pressure space PS, while the remaining chip formation regions Ra are located outside the pressure space PS. In other words, the end 61 of the pressure chamber 60 is not sized so that when the end 61 contacts one surface 1a of the semiconductor wafer 1, all of the chip formation regions Ra on one surface 1a of the semiconductor wafer 1 are located within the pressure space PS. In this embodiment, the end 61 of the pressure chamber 60 is shaped so that one of the chip formation regions Ra on one surface 1a of the semiconductor wafer 1 is located within the pressure space PS.

[0021] The probe needle 70 is connected to the probe cardboard 30 at one end and extends outwards to the pressure space PS at the other end. When performing electrical characteristic testing of the semiconductor wafer 1, the probe needle 70 is brought into contact with the contact electrode 2 on the semiconductor wafer 1 at one end. The length of the probe needle 70 is set to allow the one end to contact the contact electrode 2, and is adjusted taking into account the material of the contact shield 50, but the details will be described later.

[0022] The above describes the configuration of the probe card 20 in this embodiment. Specifically, as will be described later, the probe card 20 is arranged such that one end 61 of the pressure chamber 60 contacts one side 1a of the semiconductor wafer 1 to seal the pressure space PS, and the probe needle 70 contacts the contact electrode 2 to perform electrical characteristic testing of the semiconductor wafer 1.

[0023] The state control unit 100 is the part that controls the state (i.e., pressure) of the pressure space PS, and includes connecting piping 101, a vacuum-side valve 110, a vacuum-side pressure gauge 120, a vacuum-side filter 130, a vacuum-side regulator 140, and a vacuum source 150. The state control unit 100 also includes a gas-side valve 160, a gas-side pressure gauge 170, a gas-side filter 180, a gas-side regulator 190, a gas-side supply source 200, a control device 300, and the like.

[0024] Specifically, the connecting pipe 101 is connected to the pressure space PS by connecting to the communication pipe 45, and the opposite side of the communication pipe 45 is separated into two. A vacuum path is provided on one of the separated sides of the connecting pipe 101, and from the communication pipe 45 side, a vacuum valve 110, a vacuum filter 130, a vacuum regulator 140, and a vacuum source 150 are provided in that order. The vacuum pressure gauge 120 is provided between the vacuum filter 130 and the vacuum valve 110 so as to be able to detect the pressure in the pressure space PS. The relative positions of the vacuum filter 130 and the vacuum regulator 140 may be reversed. Furthermore, the placement of the vacuum pressure gauge 120 is not particularly limited as long as it can detect the pressure in the pressure space PS.

[0025] Then, when the vacuum valve 110 is opened while the vacuum source 150 is operating, the pressure space PS is evacuated by the vacuum filter 130, removing dust, moisture, oil, etc., and the vacuum pressure is set to a predetermined vacuum pressure set in the vacuum regulator. Here, according to Paschen's law, below -0.4 atmospheres, the voltage at which surface discharge occurs increases significantly as the pressure decreases. For this reason, in this embodiment, the pressure space PS is evacuated to a vacuum pressure of -0.4 atmospheres or less.

[0026] On the other side of the separated connecting pipe 101, a gas supply path is provided, and from the side of the connecting pipe 45, a gas-side valve 160, a gas-side filter 180, a gas-side regulator 190, and a gas-side supply source 200 are provided in that order. A gas-side pressure gauge 170 is provided to detect the pressure between the gas-side filter 180 and the gas-side valve 160. The relative positions of the gas-side filter 180 and the gas-side regulator 190 may be reversed. Furthermore, the placement of the gas-side pressure gauge 170 is not particularly limited as long as it can detect the pressure in the pressure space PS.

[0027] Then, when the gas-side valve 160 is open while the gas-side supply source 200 is operating, gas is supplied to the pressure space PS while being filtered by the gas-side filter 180 to remove dust, moisture, oil, etc., and the pressure is set to a predetermined pressure set in the gas-side regulator 190. In this embodiment, the pressure space PS is adjusted to a pressure equal to or greater than atmospheric pressure. In this embodiment, the gas-side supply source 200 supplies, for example, air, an inert gas, an active gas, etc.

[0028] The control device 300 has a configuration as a microcomputer equipped with a CPU, RAM, ROM, and non-volatile rewritable memory (not shown), and is connected to the vacuum valve 110, gas valve 160, vacuum regulator 140, gas regulator 190, vacuum pressure gauge 120, gas pressure gauge 170, vacuum source 150, gas supply source 200, etc. The control device 300 is also connected to the displacement mechanism of the probe card board 30 and the wafer chuck 10 (not shown). If the probe card 20 is equipped with a displacement mechanism, the control device 300 is also connected to this displacement mechanism. The control device 300 reads and executes a computer program stored in the ROM or non-volatile rewritable memory, which is a non-transitional physical recording medium. When this computer program is executed, a method corresponding to the computer program is executed. Note that the control device 300 in this embodiment also includes a PLC (Programmable Logic Controller).

[0029] In this embodiment, the control device 300 controls the displacement mechanism of the wafer chuck 10 (not shown). If the probe card 20 is equipped with a displacement mechanism, the control device 300 also controls the displacement mechanism of the probe card 20. The control device 300 then displaces the wafer chuck 10 and the probe card 20 relative to each other, so that the pressure space PS is sealed and the probe needle 70 contacts the untested contact electrode 2, bringing one end 61 of the pressure chamber 60 into contact with one side 1a of the semiconductor wafer 1. The control device 300 controls the operation of the vacuum source 150 and the gas supply source 200, and also controls the open and closed states of the vacuum valve 110 and the gas valve 160. The control device 300 then evacuates the pressure space PS by operating the vacuum source 150 and opening the vacuum valve 110. The control device 300 supplies gas to the pressure space PS by operating the gas supply source 200 and opening the gas valve 160. The control device 300 determines whether the pressure state of the pressure space PS is in a desired state based on the detection results of the vacuum-side pressure gauge 120 and the gas-side pressure gauge 170. The control device 300 then controls the probe cardboard 30 and a tester (not shown) to perform an electrical characteristic test of the semiconductor wafer 1.

[0030] The above describes the configuration of the inspection apparatus S1 in this embodiment. Next, a method for manufacturing a semiconductor chip, including the inspection method, will be described.

[0031] First, a semiconductor wafer 1 is prepared, on which semiconductor elements are formed in multiple chip formation regions Ra. Contact electrodes 2, which are connected to the semiconductor elements, are formed on one surface 1a of the semiconductor wafer 1. Next, an inspection process is performed to check the electrical characteristics of each chip formation region Ra. In this embodiment, the inspection process for checking electrical characteristics is performed using the inspection apparatus S1 as shown in Figure 2.

[0032] Specifically, in step S101, the semiconductor wafer 1 is placed on the wafer chuck 10 so that the other surface 1b faces the mounting surface 11a, and the semiconductor wafer 1 is fixed in place by vacuum suction.

[0033] Next, in step S102, the control device 300 displaces the wafer chuck 10 and the probe card 20 relative to each other, and while sealing the pressure space PS by bringing one end 61 of the pressure chamber 60 (i.e., the contact shield 50) into contact with one side 1a of the semiconductor wafer 1, the probe needle 70 is brought into contact with the contact electrode 2 in the uninspected chip formation region Ra. In this embodiment, since the contact shield 50 is made of a softer material than the surrounding wall 40, damage to the semiconductor wafer 1 is suppressed compared to, for example, the case where the surrounding wall 40 is in contact with one side 1a of the semiconductor wafer 1. Also, since the contact shield 50 is made of a softer material than the surrounding wall 40, the adhesion to the semiconductor wafer 1 can be strengthened and the sealing performance can be improved compared to, for example, the case where the surrounding wall 40 is in contact with one side 1a of the semiconductor wafer 1.

[0034] Here, when the contact shield 50 contacts one surface 1a of the semiconductor wafer 1 and seals the pressure space PS, the contact shield 50 is compressed, so the relative positional relationship between one end of the probe needle 70 and the part of the contact shield 50 that contacts one surface 1a of the semiconductor wafer 1 changes. Specifically, if the contact shield 50 is made of a harder material than the surrounding wall 40, the contact shield 50 is less likely to be compressed. In other words, compared to the state in which the contact shield 50 is not compressed, the length from the probe cardboard 30 to the part of the contact shield 50 that contacts the semiconductor wafer 1 is shortened, but the shortening is small. Therefore, the probe needle 70 is set to a length that protrudes from the contact shield 50 when the contact shield 50 is not compressed. That is, the probe needle 70 is set to a length that protrudes from the pressure space PS when the contact shield 50 is not compressed. This suppresses the occurrence of a problem in which the probe needle 70 does not come into contact with the contact electrode 2.

[0035] On the other hand, if the contact shield 50 is made of a softer material than the surrounding wall 40, the contact shield 50 is more easily compressed. In other words, compared to the state in which the contact shield 50 is not compressed, the length from the probe cardboard 30 to the part of the contact shield 50 that contacts the semiconductor wafer 1 becomes shorter, and the shortening is significant. Therefore, the probe needle 70 is set to a length that does not protrude beyond the contact shield 50 when the contact shield 50 is not compressed. That is, the probe needle 70 is set to a length that does not protrude from the pressure space PS when the contact shield 50 is not compressed. This makes it possible to improve the adhesion of the pressure space PS while suppressing damage to the contact electrode 2 by the probe needle 70.

[0036] Furthermore, as described above, the pressure chamber 60 is shaped such that one end 61 of the multiple chip formation regions Ra on one side 1a of the semiconductor wafer 1 is located within the pressure space PS, while the remaining chip formation regions Ra are located outside the pressure space. For example, in this embodiment, as shown in Figure 3, the end 61 of the pressure chamber 60 is shaped such that the entire chip formation region Ra is located within the pressure space PS, while contacting the outer edge of this chip formation region Ra. Therefore, when the end 61 of the pressure chamber 60 is brought into contact with one side 1a of the semiconductor wafer 1 in step S102, there is a chip formation region Ra located outside the pressure space PS on one side 1a of the semiconductor wafer 1, and atmospheric pressure is applied to this region. Consequently, the pressure difference between the portion of one side 1a located outside the pressure space PS and the portion sucked by the wafer chuck 10 becomes large. As a result, warping of the semiconductor wafer 1 can be suppressed in this embodiment. In Figure 3, one end 61 of the pressure chamber 60 that contacts one surface 1a of the semiconductor wafer 1 is shown by a dashed line.

[0037] Next, in step S103, the control device 300 opens the vacuum-side valve 110 with the vacuum source 150 activated, and evacuates the pressure space PS. In this embodiment, the probe needle 70 is in contact with the contact electrode 2 in step S102, making it difficult for the probe needle 70 to vibrate. Therefore, when evacuating the pressure space PS, it is possible to suppress damage to the contact electrode 2 caused by vibration of the probe needle 70.

[0038] Then, in step S104, the control device 300 determines whether the pressure detected by the vacuum-side pressure gauge 120 (i.e., the pressure in the pressure space PS) is below the first threshold pressure. In this embodiment, it determines whether the pressure in the pressure space PS is below -0.4 atmospheres.

[0039] If the control device 300 determines that the pressure measured by the vacuum-side pressure gauge 120 is higher than the first threshold pressure (i.e., step S104: NO), it waits until the pressure falls below the first threshold pressure. On the other hand, if the control device 300 determines that the pressure detected by the vacuum-side pressure gauge 120 is below the first threshold pressure (i.e., step S104: YES), in step S105, it performs an electrical characteristic test on the chip formation region Ra having the contact electrode 2 to which the probe needle 70 is in contact. In this embodiment, the pressure in the pressure space PS is set to -0.4 atmospheres or less. Therefore, according to Paschen's law, the voltage at which surface discharge occurs is large, so the electrical characteristic test can be performed while suppressing the occurrence of surface discharge.

[0040] After performing an electrical characteristic test in step S105, the control device 300 closes the vacuum-side valve 110 in step S106. Then, in step S107, with the gas-side supply source 200 activated, the gas-side valve 160 is opened to supply gas to the pressure space PS and release the vacuum state of the pressure space PS. Then, in step S108, the control device 300 determines whether the pressure detected by the gas-side pressure gauge 170 (i.e., the pressure in the pressure space PS) is equal to or greater than the second threshold pressure. In this embodiment, it is determined whether or not the pressure in the pressure space PS is equal to or greater than atmospheric pressure.

[0041] If the control device 300 determines that the pressure measured by the gas-side pressure gauge 170 is less than the second threshold pressure (i.e., step S108: NO), it waits until the pressure reaches or exceeds the second threshold pressure. On the other hand, if the control device 300 determines that the pressure detected by the gas-side pressure gauge 170 is equal to or greater than the second threshold pressure (i.e., step S108: YES), the control device 300 closes the gas-side valve 160 in step S109. Then, in step S110, the control device 300 displaces the wafer chuck 10 and the probe card 20 relative to each other, moving the probe card 20 away from one side 1a of the semiconductor wafer 1. By releasing the vacuum state of the pressure space PS in this way before moving the probe card 20 away from one side 1a of the semiconductor wafer 1, damage to the semiconductor wafer 1 can be suppressed.

[0042] Next, in step S111, the control device 300 determines whether or not electrical characteristic testing has been performed on all chip formation areas Ra. If the control device 300 determines that electrical characteristic testing has been completed for all chip formation areas Ra (i.e., step S111: YES), it terminates the inspection process. On the other hand, if the control device 300 determines that electrical droplet characteristic testing has not been completed for all chip formation areas Ra (i.e., step S111: NO), it proceeds sequentially from step S102 onwards for the uninspected chip formation areas Ra.

[0043] In this manner, the electrical characteristics of each chip formation region Ra are tested. Subsequently, semiconductor chips are manufactured by dividing the semiconductor wafer 1 into chip units along the dicing line DL.

[0044] According to the present embodiment described above, one end portion 61 of the pressure chamber 60 is sized such that some of the chip formation regions Ra on the one surface 1a side of the semiconductor wafer 1 are located within the pressure space PS and the remaining chip formation regions Ra are located outside the pressure space PS. Therefore, when one end portion 61 of the pressure chamber 60 is brought into contact with the one surface 1a of the semiconductor wafer 1 and the pressure space PS is evacuated, atmospheric pressure is applied to the chip formation regions Ra located outside the pressure space PS on the one surface 1a side of the semiconductor wafer 1. Thus, in the portion located outside the pressure space PS, the pressure difference from the portion sucked by the wafer chuck 10 becomes large, and warping of the semiconductor wafer 1 can be suppressed. Thereby, it is possible to suppress a decrease in the reliability of the inspection.

[0045] Also, in the present embodiment, the pressure chamber 60 has a surrounding wall 40 and a contact shield 50 that is softer than the surrounding wall 40, and the contact shield 50 is brought into contact with the one surface 1a side of the semiconductor wafer 1. Therefore, it is possible to prevent the semiconductor wafer 1 from being damaged.

[0046] In the present embodiment, when performing the electrical characteristic inspection, the pressure space PS is set to -0.4 atm or less. Therefore, it is possible to suppress the occurrence of surface discharge.

[0047] In the present embodiment, the state control unit 100 includes a vacuum source 150, a vacuum side valve 110, a vacuum side filter 130, and a vacuum side regulator 140, and uses these to evacuate the pressure space PS. Therefore, the pressure space PS can be evacuated with a simple configuration.

[0048] In the present embodiment, after the detection result of the vacuum side pressure gauge 120 becomes the vacuum pressure, the electrical characteristic inspection is performed. Therefore, the occurrence of surface discharge can be further suppressed.

[0049] In the present embodiment, after performing the electrical characteristic inspection, the pressure space PS is set to a predetermined pressure, and then one end portion 61 of the pressure chamber 60 and the one surface 1a of the semiconductor wafer 1 are separated. Therefore, it is possible to prevent the semiconductor wafer 1 from being damaged.

[0050] (5) In this embodiment, the state control unit 100 includes a gas-side supply source 200, a gas-side valve 160, a gas-side filter 180, and a gas-side regulator 190, and these are used to release the vacuum state of the pressure space PS. Therefore, the vacuum state of the pressure space PS can be released with a simple configuration.

[0051] (6) In this embodiment, after the gas-side pressure gauge 170 detects a predetermined pressure, one end 61 of the pressure chamber 60 and one surface 1a of the semiconductor wafer 1 are separated. This further suppresses damage to the semiconductor wafer 1.

[0052] (Modification of the First Embodiment) A modification of the first embodiment described above will now be explained. In the first embodiment, the shape of one end 61 of the pressure chamber 60 can be changed as appropriate. For example, as shown in Figure 4, one end 61 of the pressure chamber 60 may be shaped such that the entire chip forming region Ra is located within the pressure space PS, while contacting the chip forming region Ra and the dicing line DL located around this chip forming region Ra.

[0053] (Second Embodiment) The second embodiment will now be described. This embodiment is a modification of the probe card 20 compared to the first embodiment. Other aspects are the same as in the first embodiment, so their explanation will be omitted here.

[0054] The probe card 20 in this embodiment is a wire-type probe card, as shown in Figure 5. Specifically, the surrounding wall 40 has a thicker side portion 44 between one end 42 and the other end 43 than in the first embodiment. In other words, the through hole 43a of the surrounding wall 40 is formed to penetrate between the one end 42 and the other end 43. The other end 43 side of the surrounding wall 40 is provided on the other side 30b of the probe card board 30 such that the hollow portion 41 communicates with the through hole 31. The communication pipe 45 is provided in the through hole 31 of the probe card board 30 and communicates with the hollow portion 41.

[0055] The contact shield 50 is provided on the outer edge side of one end 42 of the surrounding wall 40. In other words, in this embodiment, the inner edge of the end face of the surrounding wall 40 on the end 42 side is exposed from the contact shield 50. The pressure space PS is composed of the space enclosed by the contact shield 50 and the hollow portion 41 of the surrounding wall 40.

[0056] The probe needle 70 is made of wire and is provided so that one end protrudes from one end 42 of the surrounding wall 40. In this embodiment, since the probe needle 70 is made of wire, the portion between the one end and the other end is provided and fixed to the side 44 of the surrounding wall 40.

[0057] As described above in this embodiment, even if the probe card 20 is configured as a wire-type probe card, the same effects as in the first embodiment can be obtained. Furthermore, when the probe card 20 is a wire-type probe card, for example, it is easier to increase the number of probe needles 70 compared to a cantilever-type probe card, making it easier to handle high currents. In this embodiment, an example in which the probe card 20 is a wire-type probe card has been described, but the probe card 20 may also be a pop-pin type lobe card. In other words, the detailed configuration of the probe card 20 can be changed as appropriate.

[0058] (Third Embodiment) The third embodiment will now be described. This embodiment is a modification of the probe card 20 compared to the first embodiment. Other aspects are the same as in the first embodiment, so the explanation will be omitted here.

[0059] In this embodiment, as shown in Figure 6, the probe card 20 has a surrounding wall 40 on the other side 30b of the probe card board 30. Specifically, the other end 43 of the surrounding wall 40 is provided on the other side 30b of the probe card board 30 such that the hollow portion 41 (i.e., the through hole 43a) communicates with the through hole 31 of the probe card board 30. In addition, the communication piping 45 is provided in the through hole 31 of the probe card board 30 and the through hole 43a of the surrounding wall 40 and communicates with the hollow portion 41.

[0060] Furthermore, as shown in Figures 6 and 7, the pressure chamber 60 is shaped such that two or more of the multiple chip formation regions Ra on one side 1a of the semiconductor wafer 1 are located within the pressure space PS. However, similar to the first embodiment described above, the pressure chamber 60 is not shaped such that one end 61 is located within the pressure space PS for all of the chip formation regions Ra on one side 1a of the semiconductor wafer 1. For example, in this embodiment, one end 61 of the pressure chamber 60 is shaped such that the entirety of three chip formation regions Ra are located within the pressure space PS, while contacting the outer edges of these chip formation regions Ra.

[0061] Furthermore, multiple probe needles 70 are provided so that they can simultaneously contact the contact electrodes 2 of multiple chip formation regions Ra.

[0062] According to the embodiment described above, one end 61 of the pressure chamber 60 is sized such that a portion of the multiple chip formation regions Ra on one side 1a of the semiconductor wafer 1 are located within the pressure space PS, while the remaining chip formation regions Ra are located outside the pressure space PS. Therefore, the same effects as in the first embodiment can be obtained.

[0063] (1) In this embodiment, one end 61 of the pressure chamber 60 is sized such that two or more chip formation regions Ra on one side 1a of the semiconductor wafer 1 are located within the pressure space PS, while the remaining chip formation region Ra is located outside the pressure space PS. Therefore, multiple semiconductor elements can be inspected simultaneously, and the inspection time can be shortened.

[0064] (Modification of the Third Embodiment) A modification of the third embodiment described above will now be explained. In the third embodiment described above, the shape of one end 61 of the pressure chamber 60 can be changed as appropriate. For example, as shown in Figure 8, one end 61 of the pressure chamber 60 may be shaped so that the entirety of the three chip forming regions Ra are located within the pressure space PS, and in contact with the chip forming regions Ra and dicing lines DL located around these chip forming regions Ra.

[0065] (Other Embodiments) While this disclosure has been described in accordance with embodiments, it is understood that this disclosure is not limited to such embodiments or structures. This disclosure also includes various modifications and variations within the scope of equivalents. In addition, various combinations and forms, as well as other combinations and forms that include only one, more, or fewer of those elements, fall within the scope and idea of ​​this disclosure.

[0066] For example, each of the above embodiments can also be applied to the inspection process of a semiconductor wafer 1 that has electrodes on the other side 1b. In particular, when performing the inspection process of a semiconductor wafer 1 that has electrodes on the other side 1b, if the semiconductor wafer 1 warps and a gap is formed between the other side 1b and the wafer chuck 10, the resistance component changes and reliability tends to decrease. Therefore, by configuring the inspection apparatus S1 as in each of the above embodiments, it is possible to suppress the decrease in reliability.

[0067] Furthermore, in each of the above embodiments, a configuration comprising one control device 300 has been described. However, for example, a control device for controlling the vacuum-side valve 110, vacuum-side pressure gauge 120, vacuum-side regulator 140, and vacuum source 150 may be provided separately, as may a control device for controlling the gas-side valve 160, gas-side pressure gauge 170, gas-side regulator 190, and gas-side supply source 200. Alternatively, control devices may be provided separately for each of the vacuum-side valve 110, vacuum-side pressure gauge 120, vacuum-side regulator 140, vacuum source 150, gas-side valve 160, gas-side pressure gauge 170, gas-side regulator 190, and gas-side supply source 200.

[0068] Furthermore, the above embodiments can be combined. For example, the second embodiment and the third embodiment may be combined.

[0069] The control unit (i.e., state control unit 100) and its method described herein may be implemented by a dedicated computer provided by configuring a processor and memory programmed to perform one or more functions embodied by a computer program. Alternatively, the control unit and its method described herein may be implemented by a dedicated computer provided by configuring a processor by one or more dedicated hardware logic circuits. Alternatively, the control unit and its method described herein may be implemented by one or more dedicated computers configured by a combination of a processor and memory programmed to perform one or more functions and a processor configured by one or more hardware logic circuits. Furthermore, the computer program may be stored as instructions executed by the computer on a computer-readable non-transitional tangible recording medium. In this disclosure or claims, the term “processor” means one or more hardware processors configured to read computer program code (i.e., one or more instructions of the computer program) contained in a computer program and execute the processing defined by said computer program code each time. In other words, “processor” is a hardware device that executes one or more programmed processes. Therefore, computer program code can also be said to be software that can define the processing of the processor according to its content. "Processor" refers to a general-purpose or application-specific processor, which may include, but is not limited to, a CPU, microprocessor, GPU, and DFP (Data Flow Processor). Alternatively, a "circuit" may be provided in place of, or together with, the "processor," and processing may be performed by at least one of the "processor" and the "circuit." In this disclosure or claims, the term "memory" refers to one or more hardware memories that are non-transitional tangible recording media and are configured to record computer program code and / or data in a manner accessible from the processor."Memory" can be implemented by memory technologies such as SRAM, SDRAM, non-volatile / flash memory, or other types of memory. The computer program code that constitutes the program is recorded in memory and executed by the processor, thereby enabling the processor to implement the various functions described above. In this disclosure or claims, the term "circuit" refers to one or more logic circuits as hardware, configured to perform specific processing defined based on a pre-designed circuit configuration. In other words (and in contrast to "processor"), "circuit" in this disclosure or claims refers to a hardware device that performs specific processing based on a circuit configuration, rather than processing defined by software such as the computer program code described above. For example, "circuit" may include custom ICs such as ASICs (Application Specific Integrated Circuits) and FPGAs (Field Programmable Gate Arrays) designed with a Hardware Description Language (HDL). That is, "circuit" in this disclosure or claims includes all hardware circuits except for the processor described above that performs processing by reading computer program code. In this disclosure or claims, the expression "at least one of the circuits and processors" should be interpreted as disjunctive (logical OR) and not as "at least one circuit and at least one processor." Therefore, in this disclosure or claims, "at least one of the circuits and processors causes the state control unit 100 to perform functions" includes the case where the circuit alone causes the state control unit 100 to perform all functions. Furthermore, "at least one of the circuits and processors causes the state control unit 100 to perform functions" includes the case where the processor alone causes the state control unit 100 to perform all functions. In addition, "at least one of the circuits and processors causes the state control unit 100 to perform functions" includes the case where the circuit causes the state control unit 100 to perform some functions and the processor causes the state control unit 100 to perform the remaining functions.In the last example, for instance, when the state control unit 100 performs functions A to C, functions A and B may be implemented by the circuit, while the remaining function C may be implemented by the processor.

[0070] [Disclosure of the Invention] The above disclosure can be understood, for example, from the following viewpoints. [First viewpoint] An inspection apparatus comprising: a wafer chuck (10) on which a semiconductor wafer (1) having one surface (1a) and another surface (1b) opposite to the one surface, wherein semiconductor elements are formed in a plurality of chip formation regions (Ra) and electrodes (2) connected to the semiconductor elements are formed on the one surface, and the other surface of the semiconductor wafer is fixed by vacuum suction; a probe card (20) for performing electrical characteristic testing of the semiconductor wafer; and a state control unit (100) for performing predetermined processing, wherein the probe card has a pressure chamber (60) having a pressure space (PS) and one end (61) side is in contact with the one surface of the semiconductor wafer to seal the pressure space, and a probe needle (70) drawn out into the pressure chamber, The pressure chamber comprises a cylindrical surrounding wall (40) having one end (42) and the other end (43) and a hollow portion (41), and a contact shield (50) provided on the one end side of the surrounding wall, made of a material softer than the surrounding wall, and forming one end side of the pressure chamber and in contact with one side of the semiconductor wafer, wherein the pressure space is formed in the space surrounded by the surrounding wall and the contact shield, and when one end side of the pressure chamber is in contact with one side of the semiconductor wafer, the probe needle contacts the electrode, and a portion of the plurality of chip formation regions on one side of the semiconductor wafer is located within the pressure space, while the remaining chip formation regions are located outside the pressure space, the state control unit adjusts the pressure in the pressure space to a predetermined vacuum pressure after one end side of the pressure chamber is in contact with one side of the semiconductor wafer and the pressure space is sealed, and the probe card is an inspection device that performs the electrical characteristic test after the pressure space has reached the predetermined vacuum pressure. [Second viewpoint] The inspection apparatus according to the first viewpoint, wherein the state control unit sets the pressure space to -0.4 atmospheres or less as the predetermined vacuum pressure.[Third viewpoint] The inspection apparatus according to the first or second viewpoint, wherein the state control unit comprises a vacuum source (150), a vacuum-side valve (110) provided between the vacuum source and the pressure chamber, a vacuum-side filter (130) and a vacuum-side regulator (140) provided between the vacuum source and the vacuum-side valve, and before performing the electrical characteristic test, the pressure in the pressure space is adjusted to the predetermined vacuum pressure set by the vacuum-side regulator by operating the vacuum source and opening the vacuum-side valve. [Fourth viewpoint] The inspection apparatus according to the third viewpoint, wherein the state control unit comprises a vacuum-side pressure gauge (120) provided between the vacuum source and the vacuum-side valve for detecting the pressure in the pressure space, and the probe card performs the electrical characteristic test after the detection result of the vacuum-side pressure gauge reaches the predetermined vacuum pressure. [Fifth viewpoint] The inspection apparatus according to any one of the first to fourth viewpoints, wherein the state control unit, after performing the electrical characteristic test, separates one end of the pressure chamber from one side of the semiconductor wafer while the pressure space is adjusted to a predetermined pressure higher than the predetermined vacuum pressure. [Sixth viewpoint] The inspection apparatus according to the fifth viewpoint, wherein the state control unit comprises a gas-side supply source (200), a gas-side valve (160) provided between the gas-side supply source and the pressure chamber, a gas-side filter (160) and a gas-side regulator (190) provided between the gas-side supply source and the gas-side valve, and after performing the electrical characteristic test, the gas-side supply source is activated and the gas-side valve is opened to adjust the pressure in the pressure space to the predetermined pressure set by the gas-side regulator. [Seventh viewpoint] The inspection apparatus according to the sixth viewpoint, wherein the state control unit is provided between the gas-side supply source and the gas-side valve and has a gas-side pressure gauge (170) for detecting the pressure in the pressure space, and the state control unit separates one end of the pressure chamber from one side of the semiconductor wafer after the detection result of the gas-side pressure gauge reaches the predetermined pressure.[Eighth viewpoint] The inspection apparatus according to any one of the first to seventh viewpoints, wherein the pressure chamber is shaped such that when one end is brought into contact with one side of the semiconductor wafer, two or more of the plurality of chip formation regions on one side of the semiconductor wafer are located within the pressure space and the remaining chip formation regions are located outside the pressure space.[Ninth Perspective] A method for manufacturing a semiconductor chip, comprising: preparing a semiconductor wafer (1) having one surface (1a) and another surface (1b) opposite to the one surface, wherein semiconductor elements are formed in a plurality of chip formation regions (Ra) and electrodes (2) connected to the semiconductor elements are formed on the one surface; placing the semiconductor wafer on the wafer chuck (10) with the other surface facing the wafer chuck, and fixing the semiconductor wafer to the wafer chuck by vacuum suction; preparing a probe card (20) having a pressure chamber (60) having a pressure space (PS) and one end (61) side being in contact with the one surface side of the semiconductor wafer to seal the pressure space, and a probe needle (70) drawn out into the pressure chamber; performing an electrical characteristic test by bringing the probe needle into contact with the electrodes of the semiconductor wafer; and after performing the electrical characteristic test, dividing the semiconductor wafer along the chip formation region. The probe card is prepared such that it has a cylindrical surrounding wall (40) having one end (42) and the other end (43) and a hollow portion (41), and a contact shield (50) provided on one end side of the surrounding wall, made of a material softer than the surrounding wall, and forming one end side of the pressure chamber and in contact with one side of the semiconductor wafer, and the pressure space is formed in the space surrounded by the surrounding wall and the contact shield, and when one end side of the pressure chamber is brought into contact with one side of the semiconductor wafer, the probe needle comes into contact with the electrode, and a part of the plurality of chip formation regions on one side of the semiconductor wafer is located within the pressure space and the remaining chip formation regions are located outside the pressure space, and before performing the electrical characteristic test, the pressure space is sealed by bringing one end side of the pressure chamber into contact with one side of the semiconductor wafer and bringing the probe needle into contact with the electrode, and the pressure space is evacuated to a predetermined vacuum pressure, The method for manufacturing a semiconductor chip involves performing the electrical characteristic test after the pressure space has reached the predetermined vacuum pressure.[Tenth viewpoint] A method for manufacturing a semiconductor chip according to the ninth viewpoint, comprising: after performing the electrical characteristic test, supplying gas to the pressure space so that the pressure space becomes a predetermined pressure higher than the predetermined vacuum pressure; and after the pressure space becomes a predetermined pressure or higher, separating the probe card from one side of the semiconductor wafer.

Claims

1. An inspection apparatus comprising: a wafer chuck (10) on which a semiconductor wafer (1) having one side (1a) and another side (1b) opposite to the one side, wherein semiconductor elements are formed in a plurality of chip formation regions (Ra) and electrodes (2) connected to the semiconductor elements are formed on the one side, and which fixes the other side of the semiconductor wafer by vacuum suction; a probe card (20) for performing electrical characteristic testing of the semiconductor wafer; and a state control unit (100) for performing predetermined processing, wherein the probe card has a pressure chamber (60) having a pressure space (PS) and one end (61) side is in contact with the one side of the semiconductor wafer to seal the pressure space, and a probe needle (70) drawn out into the pressure chamber, The pressure chamber comprises a cylindrical surrounding wall (40) having one end (42) and the other end (43) and a hollow portion (41), and a contact shield (50) provided on the one end side of the surrounding wall, made of a material softer than the surrounding wall, and forming one end side of the pressure chamber and in contact with one side of the semiconductor wafer, wherein the pressure space is formed in the space surrounded by the surrounding wall and the contact shield, and when one end side of the pressure chamber is in contact with one side of the semiconductor wafer, the probe needle contacts the electrode, and a portion of the plurality of chip formation regions on one side of the semiconductor wafer is located within the pressure space, while the remaining chip formation regions are located outside the pressure space, the state control unit adjusts the pressure in the pressure space to a predetermined vacuum pressure after one end side of the pressure chamber is in contact with one side of the semiconductor wafer and the pressure space is sealed, and the probe card is an inspection device that performs the electrical characteristic test after the pressure space has reached the predetermined vacuum pressure.

2. The inspection apparatus according to claim 1, wherein the state control unit sets the pressure space to -0.4 atmospheres or less as the predetermined vacuum pressure.

3. The inspection apparatus according to claim 1 or 2, wherein the state control unit comprises a vacuum source (150), a vacuum-side valve (110) provided between the vacuum source and the pressure chamber, a vacuum-side filter (130) and a vacuum-side regulator (140) provided between the vacuum source and the vacuum-side valve, and before performing the electrical characteristic test, the vacuum source is activated and the vacuum-side valve is opened to adjust the pressure in the pressure space to the predetermined vacuum pressure set by the vacuum-side regulator.

4. The inspection apparatus according to claim 3, wherein the state control unit is provided between the vacuum source and the vacuum side valve and has a vacuum side pressure gauge (120) for detecting the pressure in the pressure space, and the probe card performs the electrical characteristic test after the detection result of the vacuum side pressure gauge reaches the predetermined vacuum pressure.

5. The inspection apparatus according to claim 1 or 2, wherein, after performing the electrical characteristic inspection, the state control unit separates one end of the pressure chamber from one side of the semiconductor wafer while adjusting the pressure space to a predetermined pressure higher than the predetermined vacuum pressure.

6. The inspection apparatus according to claim 5, wherein the state control unit comprises a gas-side supply source (200), a gas-side valve (160) provided between the gas-side supply source and the pressure chamber, a gas-side filter (160) provided between the gas-side supply source and the gas-side valve, and a gas-side regulator (190), and after performing the electrical characteristic test, the gas-side supply source is activated and the gas-side valve is opened to adjust the pressure in the pressure space to the predetermined pressure set by the gas-side regulator.

7. The inspection apparatus according to claim 6, wherein the state control unit is provided between the gas-side supply source and the gas-side valve and has a gas-side pressure gauge (170) for detecting the pressure in the pressure space, and the state control unit separates one end of the pressure chamber from one side of the semiconductor wafer after the detection result of the gas-side pressure gauge reaches the predetermined pressure.

8. The inspection apparatus according to claim 1, wherein the pressure chamber is shaped such that when one end is brought into contact with one side of the semiconductor wafer, two or more of the plurality of chip formation regions on one side of the semiconductor wafer are located within the pressure space and the remaining chip formation regions are located outside the pressure space.

9. A method for manufacturing a semiconductor chip, comprising: preparing a semiconductor wafer (1) having one surface (1a) and another surface (1b) opposite to the one surface, wherein semiconductor elements are formed in a plurality of chip formation regions (Ra) and electrodes (2) connected to the semiconductor elements are formed on the one surface; placing the semiconductor wafer on the wafer chuck (10) with the other surface facing the wafer chuck, and fixing the semiconductor wafer to the wafer chuck by vacuum suction; preparing a probe card (20) having a pressure chamber (60) having a pressure space (PS) and one end (61) side being in contact with the one surface side of the semiconductor wafer to seal the pressure space, and a probe needle (70) drawn out into the pressure chamber; performing an electrical characteristic test by bringing the probe needle into contact with the electrodes of the semiconductor wafer; and after performing the electrical characteristic test, dividing the semiconductor wafer along the chip formation region. The probe card is prepared such that it has a cylindrical surrounding wall (40) having one end (42) and the other end (43) and a hollow portion (41), and a contact shield (50) provided on one end side of the surrounding wall, made of a material softer than the surrounding wall, and forming one end side of the pressure chamber and in contact with one side of the semiconductor wafer, and the pressure space is formed in the space surrounded by the surrounding wall and the contact shield, and when one end side of the pressure chamber is brought into contact with one side of the semiconductor wafer, the probe needle comes into contact with the electrode, and a part of the plurality of chip formation regions on one side of the semiconductor wafer is located within the pressure space and the remaining chip formation regions are located outside the pressure space, and before performing the electrical characteristic test, the pressure space is sealed by bringing one end side of the pressure chamber into contact with one side of the semiconductor wafer and bringing the probe needle into contact with the electrode, and the pressure space is evacuated to a predetermined vacuum pressure, The method for manufacturing a semiconductor chip involves performing the electrical characteristic test after the pressure space has reached the predetermined vacuum pressure.

10. A method for manufacturing a semiconductor chip according to claim 9, comprising: after performing the electrical characteristic test, supplying gas to the pressure space so that the pressure space becomes a predetermined pressure higher than the predetermined vacuum pressure; and after the pressure space becomes a predetermined pressure or higher, moving the probe card away from one side of the semiconductor wafer.

Images