Inspection device and method for manufacturing semiconductor chip

Abstract

The present invention comprises: a wafer chuck (10) that vacuum-suctions and fixes the other surface (1b) side of a semiconductor wafer (1); a probe card (20) that performs electrical characteristic inspection of the semiconductor wafer (1); and a state control unit (100) that performs a prescribed process. After one end (61) of a pressure chamber (60) is brought into contact with one surface (1a) side of the semiconductor wafer (1) and a pressure space (PS) is sealed, the state control unit (100) adjusts the pressure in the pressure space (PS) so as to reach a prescribed pressure by supplying a heated gas, and stops the supply of the gas after the pressure in the pressure space (PS) reaches the prescribed pressure. The probe card (20) is configured to perform the electrical characteristic inspection after the pressure space (PS) reaches the prescribed pressure and the supply of the gas is stopped.

Description

Inspection Device and Method for Manufacturing Semiconductor Chips Cross - Reference to Related Applications

[0001] This application is based on Japanese Patent Application No. 2024 - 179933 filed on October 15, 2024, the contents of which are incorporated herein by reference.

[0002] This disclosure relates to an inspection device and a method for manufacturing semiconductor chips.

[0003] Conventionally, there has been proposed an inspection method in which probe needles are brought into contact with electrodes of a semiconductor wafer having a plurality of chip formation regions in which semiconductor elements are formed and having electrodes electrically connected to the semiconductor elements on one side, to perform an electrical characteristic inspection. For example, in Patent Document 1, an inspection method for performing an electrical characteristic inspection is proposed as follows. That is, in this inspection method, first, the other side of the semiconductor wafer is fixed by vacuum suction with a wafer chuck. And in this inspection method, a surrounding wall is arranged on one side of the semiconductor wafer, and while supplying a heated and pressurized gas into the surrounding wall, a probe needle is brought into contact with the contact electrode of the chip formation region located in the surrounding wall to perform an electrical characteristic inspection. Note that in this inspection method, the opening end of the surrounding wall is arranged in a state of having a minute gap with the one side of the semiconductor wafer. Therefore, in this inspection method, the electrical characteristic inspection is performed while continuously supplying the heated and pressurized gas.

[0004] Japanese Unexamined Patent Application Publication No. 2022 - 70357

[0005] However, in the above - mentioned inspection method, since the electrical characteristic inspection is performed while supplying a heated and pressurized gas, a temperature gradient occurs on one side of the semiconductor wafer. For example, according to the study by the present inventors, when a gas at 150°C and 5 atm is supplied into the surrounding wall, it has been confirmed that a temperature difference of about 7°C occurs on one side of the semiconductor wafer due to the gas flow. Therefore, especially when performing an electrical characteristic inspection of a semiconductor element having temperature dependence, the reliability of the inspection may decrease. Also, since the electrical characteristic inspection is performed while supplying a gas, static electricity may be generated due to friction between the gas and the semiconductor wafer or the like, and there is also a possibility that the semiconductor wafer may be damaged by the static electricity.

[0006] This disclosure aims to provide an inspection apparatus and a semiconductor chip manufacturing method that can suppress the destruction of semiconductor wafers while suppressing a decrease in the reliability of the inspection.

[0007] According to one aspect of this disclosure, the inspection apparatus comprises a wafer chuck on which a semiconductor wafer having one side and the other side opposite to the first side is placed, on which semiconductor elements are formed in a plurality of chip formation regions and electrodes connected to the semiconductor elements are formed on the one side, and which fixes the other side of the semiconductor wafer by vacuum suction; a probe card for performing electrical characteristic testing of the semiconductor wafer; and a state control unit for performing predetermined processing, wherein the probe card has a pressure chamber having a pressure space, and one end of the pressure chamber is in contact with the one side of the semiconductor wafer to seal the pressure space, and a probe needle drawn out into the pressure chamber, the pressure chamber having one end and the other end and being cylindrical with a hollow portion. The device comprises a surrounding wall and a contact shield provided at one end of the surrounding wall, made of a softer material than the surrounding wall, and forming one end of the pressure chamber which is brought into contact with one side of the semiconductor wafer. When one end of the pressure chamber is brought into contact with one side of the semiconductor wafer, the probe needle comes into contact with the electrode. The state control unit adjusts the pressure in the pressure space to a predetermined pressure by supplying heated gas after one end of the pressure chamber is brought into contact with one side of the semiconductor wafer and the pressure space is sealed, and stops the gas supply after the pressure in the pressure space reaches the predetermined pressure. The probe card then performs electrical characteristic testing after the pressure space reaches the predetermined pressure and the gas supply is stopped.

[0008] According to this method, the pressure space is sealed and maintained at a predetermined pressure, and the supply of gas to the pressure space is stopped when electrical characteristic testing is performed. Therefore, temperature differences on one side of the semiconductor wafer can be suppressed during electrical characteristic testing, thus preventing a decrease in the reliability of the test. In addition, since the supply of gas to the pressure space is stopped during electrical characteristic testing, the generation of static electricity can be suppressed, thus preventing damage to the semiconductor wafer.

[0009] Furthermore, according to another aspect of this disclosure, a method for manufacturing a semiconductor chip includes: preparing a semiconductor wafer having one side and another side opposite to the first side, with semiconductor elements formed in each of a plurality of chip formation regions and electrodes connected to the semiconductor elements formed on the one side; placing the semiconductor wafer on a wafer chuck with the other side facing the wafer chuck, and fixing the semiconductor wafer to the wafer chuck by vacuum suction; and a probe car having a pressure chamber having a pressure space, with one end of which is in contact with one side of the semiconductor wafer to seal the pressure space, and a probe needle drawn out into the pressure chamber. The procedure involves preparing a device, contacting the probe needle with the electrodes of the semiconductor wafer to perform an electrical characteristic test, and after the electrical characteristic test, dividing the semiconductor wafer along the chip formation region. Before performing the electrical characteristic test, one end of the pressure chamber is brought into contact with one side of the semiconductor wafer to seal the pressure space and the probe needle is brought into contact with the electrodes, heated gas is supplied to the pressure space to reach a predetermined pressure, and after the pressure space reaches the predetermined pressure, the gas supply is stopped. The electrical characteristic test is performed after the pressure space reaches the predetermined pressure and the gas supply is stopped.

[0010] According to this method, the pressure space is sealed and maintained at a predetermined pressure, and the supply of gas to the pressure space is stopped when electrical characteristic testing is performed. Therefore, when performing electrical characteristic testing, the occurrence of temperature differences on one side of the semiconductor wafer can be suppressed, resulting in a semiconductor chip manufacturing method that suppresses a decrease in the reliability of the test. In addition, since the supply of gas to the pressure space is stopped when performing electrical characteristic testing, the generation of static electricity can also be suppressed, thereby suppressing damage to the semiconductor wafer.

[0011] This is a schematic diagram showing the inspection apparatus in the first embodiment. This is a flowchart showing the inspection process in the semiconductor chip manufacturing process. This is a schematic diagram showing one end of a pressure chamber in contact with one side of a semiconductor wafer. This is a schematic diagram showing one end of a pressure chamber in contact with one side of a semiconductor wafer in a modified example of the first embodiment. This is a schematic diagram showing the inspection apparatus in the second embodiment. This is a schematic diagram showing the inspection apparatus in the third embodiment. This is a schematic diagram showing one end of a pressure chamber in contact with one side of a semiconductor wafer in the third embodiment. This is a schematic diagram showing one end of a pressure chamber in contact with one side of a semiconductor wafer in a modified example of the third embodiment. This is a flowchart showing the inspection process in the fourth embodiment. This is a schematic diagram showing the inspection apparatus in the fifth embodiment. This is a schematic diagram showing the inspection apparatus in the sixth embodiment. This is a schematic diagram showing the inspection apparatus in the seventh embodiment.

[0012] The embodiments of this disclosure will be described below with reference to the drawings. In the following embodiments, parts that are the same or equivalent to each other will be denoted by the same reference numerals.

[0013] The first embodiment will be described with reference to the drawings. First, the configuration of the inspection apparatus S1 of this embodiment will be described. In this embodiment, as shown in Figure 1, the inspection apparatus S1 is used as an example to describe an inspection apparatus S1 that performs electrical characteristic testing of a semiconductor wafer 1 having one surface 1a and another surface 1b, with a plurality of chip formation regions Ra partitioned by dicing lines DL, and contact electrodes 2 formed on the side of one surface 1a of the chip formation region Ra. Here, the contact electrodes 2 include, for example, a plurality of electrodes such as source electrodes, drain electrodes, and gate electrodes when a MOSFET (abbreviation for Metal Oxide Semiconductor Field Effect Transistor) is formed as a semiconductor element.

[0014] The inspection device S1 is configured to include a wafer chuck 10, a probe card 20, a state control unit 100, and the like.

[0015] The wafer chuck 10 holds the semiconductor wafer 1 in place and secures it by vacuum suction. For example, the wafer chuck 10 is configured to include a stage 11 having an internal space and a plurality of holes in its mounting surface 11a that communicate with the space, a vacuum source that vacuum-suctions the semiconductor wafer 1 through the space and holes, and a heating device that heats the stage 11. When the semiconductor wafer 1 is placed on the wafer chuck 10, it secures the semiconductor wafer 1 by vacuum suction while maintaining the semiconductor wafer 1 at a predetermined temperature (for example, 200°C). The wafer chuck 10 is also connected to a displacement mechanism (not shown), and can be displaced when the displacement mechanism is activated.

[0016] In this embodiment, the probe card 20 is a cantilever-type probe card and includes a probe card board 30, a pressure chamber 60 having a surrounding wall 40 and a contact shield 50, a probe needle 70, etc. In this embodiment, the probe card 20 is fixed in place. However, the probe card 20 may be connected to a displacement mechanism (not shown), similar to the wafer chuck 10, and may be displaceable when the displacement mechanism is activated. The probe card 20 is also connected to a tester (not shown) that performs electrical characteristic testing.

[0017] The probe cardboard 30 is made of a plate-shaped printed circuit board or the like, on which wiring sections (not shown) are formed, and has one surface 30a and another surface 30b opposite to the surface 30a. In addition, the probe cardboard 30 of this embodiment has a through hole 31 formed in approximately the center.

[0018] The surrounding wall 40 is cylindrical with a hollow section 41. In this embodiment, the surrounding wall 40 is a bottomed cylindrical shape with one end 42 being an open end and the other end 43 being the bottom, and the space between the one end 42 and the other end 43 being the side section 44. The surrounding wall 40 is provided to close the through hole 31 formed in the probe cardboard 30. In this embodiment, the surrounding wall 40 is provided on the probe cardboard 30 such that one end 42 is located on the other side 30b of the probe cardboard 30 and the other end 43 is located on the one side 30a. Furthermore, the surrounding wall 40 has a through hole 43a formed in the other end 43 which is the bottom, and a communication pipe 45 that communicates with the hollow section 41 is provided in the through hole 43a. The surrounding wall 40 is made of, for example, a peak material.

[0019] The contact shield 50 is frame-shaped and, in this embodiment, is provided over the entire end 42 of the surrounding wall 40. The contact shield 50 is made of a softer material than the surrounding wall 40. For example, the contact shield 50 is made of a fluororesin or the like. In this embodiment, the pressure chamber 60 having the surrounding wall 40 and the contact shield 50 is configured in this way. In this embodiment, the pressure space PS is configured in the space surrounded by the surrounding wall 40 and the contact shield 50 (i.e., the space inside the pressure chamber 60). Hereinafter, the end of the pressure chamber 60 on the contact shield 50 side will be described as one end 61 of the pressure chamber 60. In other words, one end 61 of the pressure chamber 60 is made of the contact shield 50.

[0020] Furthermore, as will be described in detail later, the pressure chamber 60 of this embodiment has one end 61 (i.e., the contact shield 50) that contacts one surface 1a of the semiconductor wafer 1, thereby sealing the pressure space PS. The pressure chamber 60 has the following shape at the end 61. That is, when the end 61 of the pressure chamber 60 contacts one surface 1a of the semiconductor wafer 1, some of the multiple chip formation regions Ra on one surface 1a of the semiconductor wafer 1 are located within the pressure space PS, while the remaining chip formation regions Ra are located outside the pressure space PS. In other words, the end 61 of the pressure chamber 60 is not sized so that when the end 61 contacts one surface 1a of the semiconductor wafer 1, all of the chip formation regions Ra on one surface 1a of the semiconductor wafer 1 are located within the pressure space PS. In this embodiment, the end 61 of the pressure chamber 60 is shaped so that one of the chip formation regions Ra on one surface 1a of the semiconductor wafer 1 is located within the pressure space PS.

[0021] The probe needle 70 is connected to the probe cardboard 30 at one end and extends outwards to the pressure space PS at the other end. When performing electrical characteristic testing of the semiconductor wafer 1, the probe needle 70 is brought into contact with the contact electrode 2 on the semiconductor wafer 1 at one end. The length of the probe needle 70 is set to allow the one end to contact the contact electrode 2, and is adjusted taking into account the material of the contact shield 50, but the details will be described later.

[0022] The above describes the configuration of the probe card 20 in this embodiment. Specifically, as will be described later, the probe card 20 is arranged such that one end 61 of the pressure chamber 60 contacts one side 1a of the semiconductor wafer 1 to seal the pressure space PS, and the probe needle 70 contacts the contact electrode 2 to perform electrical characteristic testing of the semiconductor wafer 1.

[0023] The state control unit 100 is the part that controls the state of the pressure space PS (i.e., the pressure), and includes connecting pipes 101, a heater 110, a pressure gauge 120, a valve 130, a pressure tank 140, a static eliminator 150, a regulator 160, a filter 170, a gas supply source 180, a control device 300, and the like.

[0024] Specifically, the connecting pipe 101 is connected to the pressure space PS by being connected to the communication pipe 45. The connecting pipe 101 is equipped with a gas supply path, and from the communication pipe 45 side, a heater 110, a valve 130, a pressure tank 140, a regulator 160, a filter 170, and a gas supply source 180 are provided in that order. A pressure gauge 120 is provided between the valve 130 and the heater 110 so as to be able to detect the pressure in the pressure space PS. The static eliminator 150 is connected to the pressure tank 140. The relative positions of the regulator 160 and the filter 170 may be reversed. Also, the placement of the pressure gauge 120 is not particularly limited as long as it can detect the pressure in the pressure space PS.

[0025] When the gas supply source 180 is activated, the gas, which has been dehumidified, deoiled, etc. by the filter 170, is stored in the pressure tank 140 at the pressure set by the regulator 160. The gas stored in the pressure tank 140 is then statically neutralized by the static eliminator 150. When the valve 130 is opened, the gas released from the pressure tank 140 is heated by the heater 110 and then supplied to the pressure space PS, where the pressure space PS is brought to a predetermined pressure.

[0026] Here, according to Paschen's law, above 1 atmosphere, the voltage at which surface discharge occurs increases as the atmospheric pressure increases. For this reason, in this embodiment, gas is supplied so that the pressure space PS is 1 atmosphere or higher, for example, 4 atmospheres. The gas released from the pressure tank 140 is heated by the heater 110, which heats the gas to a suitable temperature for electrical characteristic testing. For example, the heater 110 heats the gas (i.e., the temperature in the pressure space PS) to 200°C. However, the temperature of the heated gas can be changed as appropriate, and the gas may be heated to room temperature by the heater 110, or to 200°C or lower, or to 200°C or higher. In this embodiment, the gas supply source 180 supplies, for example, air, inert gas, or active gas. The pressure tank 140 is one that has a larger capacity than the pressure space PS in the pressure chamber 60.

[0027] The control device 300 has the configuration of a microcomputer equipped with a CPU, RAM, ROM, and non-volatile rewritable memory (not shown), and is connected to a heater 110, pressure gauge 120, valve 130, static eliminator 150, regulator 160, gas supply source 180, etc. The control device 300 is also connected to the displacement mechanism of the probe card board 30 and the wafer chuck 10 (not shown). If the probe card 20 is equipped with a displacement mechanism, the control device 300 is also connected to this displacement mechanism. The control device 300 reads and executes a computer program stored in the ROM or non-volatile rewritable memory, which is a non-transitional physical recording medium. When this computer program is executed, a method corresponding to the computer program is executed. Note that the control device 300 in this embodiment also includes a PLC (Programmable Logic Controller), etc.

[0028] In this embodiment, the control device 300 controls the displacement mechanism of the wafer chuck 10 (not shown). If the probe card 20 is equipped with a displacement mechanism, the control device 300 also controls the displacement mechanism of the probe card 20. The control device 300 then displaces the wafer chuck 10 and the probe card 20 relative to each other, so that the pressure space PS is sealed and the probe needle 70 contacts the untested contact electrode 2, bringing one end 61 of the pressure chamber 60 into contact with one side 1a of the semiconductor wafer 1. The control device 300 controls the gas supply source 180, valve 130, and heater 110 to supply gas so that the pressure space PS reaches a predetermined pressure and temperature. Based on the detection result of the pressure gauge 120, the control device 300 determines whether the pressure state of the pressure space PS is in a desired state. The control device 300 then controls the probe card board 30 and a tester (not shown) to perform electrical characteristic testing of the semiconductor wafer 1.

[0029] The above describes the configuration of the inspection apparatus S1 in this embodiment. Next, a method for manufacturing a semiconductor chip, including the inspection method, will be described.

[0030] First, a semiconductor wafer 1 is prepared, on which semiconductor elements are formed in multiple chip formation regions Ra. Contact electrodes 2, which are connected to the semiconductor elements, are formed on one surface 1a of the semiconductor wafer 1. Next, an inspection process is performed to check the electrical characteristics of each chip formation region Ra. In this embodiment, the inspection process for checking electrical characteristics is performed using the inspection apparatus S1 as shown in Figure 2.

[0031] Specifically, in step S101, the semiconductor wafer 1 is placed on the wafer chuck 10 so that the other surface 1b faces the mounting surface 11a, and the semiconductor wafer 1 is fixed in place by vacuum suction.

[0032] Next, in step S102, the control device 300 displaces the wafer chuck 10 and the probe card 20 relative to each other, and while sealing the pressure space PS by bringing one end 61 of the pressure chamber 60 (i.e., the contact shield 50) into contact with one side 1a of the semiconductor wafer 1, the probe needle 70 is brought into contact with the contact electrode 2 in the uninspected chip formation region Ra. In this embodiment, since the contact shield 50 is made of a softer material than the surrounding wall 40, damage to the semiconductor wafer 1 is suppressed compared to, for example, the case where the surrounding wall 40 is in contact with one side 1a of the semiconductor wafer 1. Also, since the contact shield 50 is made of a softer material than the surrounding wall 40, the adhesion to the semiconductor wafer 1 can be strengthened and the sealing performance can be improved compared to, for example, the case where the surrounding wall 40 is in contact with one side 1a of the semiconductor wafer 1.

[0033] Here, when the contact shield 50 contacts one surface 1a of the semiconductor wafer 1 and seals the pressure space PS, the contact shield 50 is compressed, so the relative positional relationship between one end of the probe needle 70 and the part of the contact shield 50 that contacts one surface 1a of the semiconductor wafer 1 changes. Specifically, if the contact shield 50 is made of a harder material than the surrounding wall 40, the contact shield 50 is less likely to be compressed. In other words, compared to the state in which the contact shield 50 is not compressed, the length from the probe cardboard 30 to the part of the contact shield 50 that contacts the semiconductor wafer 1 is shortened, but the shortening is small. Therefore, the probe needle 70 is set to a length that protrudes from the contact shield 50 when the contact shield 50 is not compressed. That is, the probe needle 70 is set to a length that protrudes from the pressure space PS when the contact shield 50 is not compressed. This suppresses the occurrence of a problem in which the probe needle 70 does not come into contact with the contact electrode 2.

[0034] On the other hand, if the contact shield 50 is made of a softer material than the surrounding wall 40, the contact shield 50 is more easily compressed. In other words, compared to the state in which the contact shield 50 is not compressed, the length from the probe cardboard 30 to the part of the contact shield 50 that contacts the semiconductor wafer 1 becomes shorter, and the shortening is significant. Therefore, the probe needle 70 is set to a length that does not protrude beyond the contact shield 50 when the contact shield 50 is not compressed. That is, the probe needle 70 is set to a length that does not protrude from the pressure space PS when the contact shield 50 is not compressed. This makes it possible to improve the adhesion of the pressure space PS while suppressing damage to the contact electrode 2 by the probe needle 70.

[0035] Furthermore, as described above, the pressure chamber 60 is shaped such that one end 61 is positioned within the pressure space PS while one of the multiple chip formation regions Ra on one side 1a of the semiconductor wafer 1 is positioned outside the pressure space. For this reason, in this embodiment, as shown in Figure 3, for example, the end 61 of the pressure chamber 60 is brought into contact with the outer edge of the chip formation region Ra such that the entire chip formation region Ra is positioned within the pressure space PS. In Figure 3, the end 61 of the pressure chamber 60 that is in contact with one side 1a of the semiconductor wafer 1 is shown by a dashed line.

[0036] Next, in step S103, the control device 300 opens the valve 130 while operating the heater 110, supplying heated and pressurized gas to the pressure space PS. In this embodiment, the probe needle 70 is in contact with the contact electrode 2 in step S102, making it difficult for the probe needle 70 to vibrate. Therefore, when supplying gas to the pressure space PS, it is possible to suppress damage to the contact electrode 2 due to vibration of the probe needle 70. In this embodiment, before step S103, gas at the pressure set by the regulator 160 is stored in the pressure tank 140, and the stored gas is electrostatically removed by the static eliminator 150. Therefore, electrostatically removed gas is supplied to the pressure space PS.

[0037] Then, in step S104, the control device 300 determines whether the pressure detected by the pressure gauge 120 (i.e., the pressure in the pressure space PS) is equal to or greater than the threshold pressure. In this embodiment, it determines whether the pressure in the pressure space PS is 1 atmosphere or greater.

[0038] If the control device 300 determines that the pressure measured by the pressure gauge 120 is below the threshold pressure (i.e., step S104: NO), it waits until the pressure reaches or exceeds the threshold pressure. On the other hand, if the control device 300 determines that the pressure detected by the pressure gauge 120 is above the threshold pressure (i.e., step S104: YES), it closes the valve 130 in step S105 and stops supplying gas to the pressure space PS. In this embodiment, the pressure space PS is sealed by bringing one end 61 of the pressure chamber 60 into contact with one side 1a of the semiconductor wafer 1, so the pressure in the pressure space PS is maintained.

[0039] Next, in step S106, an electrical characteristic test is performed on the chip formation region Ra having the contact electrode 2 in contact with the probe needle 70. In this embodiment, the pressure in the pressure space PS is set to 1 atmosphere or higher. Therefore, according to Paschen's law, the voltage at which surface discharge occurs is large, so the electrical characteristic test can be performed while suppressing the occurrence of surface discharge.

[0040] After performing the electrical characteristic test in step S106, the control device 300 displaces the wafer chuck 10 and the probe card 20 relative to each other in step S107, separating the probe card 20 from one side 1a of the semiconductor wafer 1. Next, in step S108, the control device 300 determines whether or not the electrical characteristic test has been performed on all chip formation areas Ra. If the control device 300 determines that the electrical characteristic test has been completed for all chip formation areas Ra (i.e., step S108: YES), it terminates the inspection process. On the other hand, if the control device 300 determines that the electrical droplet characteristic test has not been completed for all chip formation areas Ra (i.e., step S108: NO), it performs steps S102 onwards sequentially for the uninspected chip formation areas Ra.

[0041] In this way, the electrical characteristics of each chip formation region Ra are inspected. After that, the semiconductor wafer 1 is divided into chips along the dicing line DL, thereby manufacturing semiconductor chips.

[0042] According to the present embodiment described above, the inspection device S1 seals the pressure space PS so that the pressure space PS reaches a predetermined pressure, and stops the supply of gas to the pressure space PS when performing the electrical characteristics inspection. Therefore, it is possible to suppress the occurrence of a temperature difference on one side of the semiconductor wafer 1, and it is possible to suppress the reduction of the reliability of the inspection. Further, since the supply of gas to the pressure space PS is stopped when performing the electrical characteristics inspection, it is possible to suppress the generation of static electricity and suppress the destruction of the semiconductor wafer 1. Furthermore, since the supply of gas to the pressure space PS is stopped when performing the electrical characteristics inspection, the gas consumption can be reduced compared to the case where the electrical characteristics inspection is performed while supplying gas, and thus the cost can be reduced.

[0043] Further, in the present embodiment, the pressure chamber 60 has a surrounding wall 40 and a contact shield 50 that is softer than the surrounding wall 40, and the contact shield 50 is brought into contact with the one surface 1a side of the semiconductor wafer 1. Therefore, it is possible to suppress the breakage of the semiconductor wafer 1.

[0044] (1) In the present embodiment, when performing the electrical characteristics inspection, the pressure space PS is set to 1 atm or more. Therefore, it is possible to suppress the occurrence of surface discharge.

[0045] (2) In the present embodiment, the state control unit 100 includes a gas supply source 180, a valve 130, a regulator 160, and a filter 170, and uses these to set the pressure of the pressure space PS to a predetermined pressure. Therefore, the pressure of the pressure space PS can be set to a predetermined pressure with a simple configuration.

[0046] (3) In the present embodiment, the state control unit 100 includes a static eliminator 150. Therefore, it is possible to suppress the charging of the gas supplied to the pressure space PS and suppress the destruction of the semiconductor wafer 1.

[0047] (Modification of the First Embodiment) A modification of the above first embodiment will be described. In the above first embodiment, the shape of one end portion 61 of the pressure chamber 60 can be appropriately changed. For example, as shown in FIG. 4, one end portion 61 of the pressure chamber 60 may be shaped such that the entire chip formation region Ra is located within the pressure space PS and contacts the chip formation region Ra and the dicing line DL located around this chip formation region Ra.

[0048] (Second Embodiment) The second embodiment will be described. This embodiment is a modification of the first embodiment in which the configuration of the probe card 20 is changed. Since other aspects are the same as those of the first embodiment, the description thereof will be omitted here.

[0049] The probe card 2 of this embodiment is a wire type probe card as shown in FIG. 5. Specifically, in the surrounding wall 40, the side portion 44 between the one end portion 42 and the other end portion 43 is made thicker than in the above first embodiment. In other words, the through hole 43a of the surrounding wall 40 is formed so as to penetrate between the one end portion 42 and the other end portion 43. And the surrounding wall 40 is provided on the other surface 30b of the probe card board 30 such that the hollow portion 41 communicates with the through hole 3 at the other end portion 43 side. Also, the communication pipe 45 is provided in the through hole 31 of the probe card board 30 and communicates with the hollow portion 41.

[0050] The contact shield 50 is provided on the outer edge side at the one end portion 42 of the surrounding wall 40. That is, in this embodiment, the end surface on the one end portion 42 side of the surrounding wall 40 is in a state where the inner edge portion is exposed from the contact shield 50. And the pressure space PS is composed of the space surrounded by the contact shield 50 and the hollow portion 41 of the surrounding wall 40.

[0051] The probe needle 70 is composed of a wire and is provided such that one end portion protrudes from the one end portion 42 of the surrounding wall 40. Note that since the probe needle 70 of this embodiment is composed of a wire, the portion between the one end portion and the other end portion is provided and fixed to the side portion 44 of the surrounding wall 40.

[0052] As described above in this embodiment, even if the probe card 20 is configured as a wire-type probe card, the same effects as in the first embodiment can be obtained. Furthermore, when the probe card 20 is a wire-type probe card, for example, it is easier to increase the number of probe needles 70 compared to a cantilever-type probe card, making it easier to handle high currents. In this embodiment, an example in which the probe card 20 is a wire-type probe card has been described, but the probe card 20 may also be a pop-pin type lobe card. In other words, the detailed configuration of the probe card 20 can be changed as appropriate.

[0053] (Third Embodiment) The third embodiment will now be described. This embodiment is a modification of the probe card 20 compared to the first embodiment. Other aspects are the same as in the first embodiment, so the explanation will be omitted here.

[0054] In this embodiment, as shown in Figure 6, the probe card 20 has a surrounding wall 40 on the other side 30b of the probe card board 30. Specifically, the other end 43 of the surrounding wall 40 is provided on the other side 30b of the probe card board 30 such that the hollow portion 41 (i.e., the through hole 43a) communicates with the through hole 31 of the probe card board 30. In addition, the communication piping 45 is provided in the through hole 31 of the probe card board 30 and the through hole 43a of the surrounding wall 40 and communicates with the hollow portion 41.

[0055] Furthermore, as shown in Figures 6 and 7, the pressure chamber 60 is sized such that one end 61 is located within the pressure space PS, with two or more of the multiple chip formation regions Ra on one side 1a of the semiconductor wafer 1 being within the pressure space PS. For example, in this embodiment, the one end 61 of the pressure chamber 60 is sized so that the entirety of the three chip formation regions Ra are located within the pressure space PS, while still contacting the outer edges of these chip formation regions Ra.

[0056] Furthermore, multiple probe needles 70 are provided so that they can simultaneously contact the contact electrodes 2 of multiple chip formation regions Ra.

[0057] According to the embodiment described above, the inspection device S1 ensures that the pressure space PS is sealed and reaches a predetermined pressure, and stops supplying gas to the pressure space PS when performing electrical characteristic testing. Therefore, the same effects as in the first embodiment can be obtained.

[0058] (1) In this embodiment, one end 61 of the pressure chamber 60 is shaped such that two or more chip formation regions Ra on one side 1a of the semiconductor wafer 1 are located within the pressure space PS. Therefore, multiple semiconductor elements can be inspected simultaneously, and the inspection time can be shortened.

[0059] (Modification of the Third Embodiment) A modification of the third embodiment described above will now be explained. In the third embodiment described above, the shape of one end 61 of the pressure chamber 60 can be changed as appropriate. For example, as shown in Figure 8, one end 61 of the pressure chamber 60 may be shaped so that the entirety of the three chip forming regions Ra are located within the pressure space PS, and in contact with the chip forming regions Ra and dicing lines DL located around these chip forming regions Ra.

[0060] Furthermore, in the third embodiment described above, an example was described in which one end 61 of the pressure chamber 60 is shaped such that the entirety of the three chip formation regions Ra are located within the pressure space PS. However, one end 61 of the pressure chamber 60 may be shaped such that the entirety of all chip formation regions Ra are located within the pressure space PS.

[0061] (Fourth Embodiment) The fourth embodiment will now be described. This embodiment is a modification of the inspection process compared to the first embodiment. Other aspects are the same as in the first embodiment, so further explanation will be omitted here.

[0062] In this embodiment, when performing the inspection process, as shown in Figure 9, before performing step S102, the control device 300 opens the valve 130 in step S110 and supplies heated gas to the portion of the connecting pipe 101 that connects the heater 110 and the communication pipe 45 in step S111. Then, in step S112, the control device 300 closes the valve 130 after a predetermined period of time has elapsed. As a result, the connecting pipe 101 contains heated gas in the portion between the heater 110 and the communication pipe 45.

[0063] Subsequently, the processes from step S102 onward are carried out. Then, when the valve 130 is opened in step S103 to supply gas to the pressure space PS, the gas supplied is heated from the beginning by performing steps S110 to S112 above. As a result, it becomes easier to maintain the pressure space PS at a predetermined temperature early on, and the inspection time can be shortened.

[0064] According to the embodiment described above, the inspection device S1 ensures that the pressure space PS is sealed and reaches a predetermined pressure, and stops supplying gas to the pressure space PS when performing electrical characteristic testing. Therefore, the same effects as in the first embodiment can be obtained.

[0065] (1) In this embodiment, before bringing one end 61 of the pressure chamber 60 into contact with one surface 1a of the semiconductor wafer 1, the portion of the connecting pipe 101 between the heater 110 and the communication pipe 45 is filled with heated gas. Therefore, when supplying gas after sealing the pressure space PS, heated gas is supplied from the beginning, which can shorten the inspection time.

[0066] (Fifth Embodiment) The fifth embodiment will now be described. This embodiment is a modification of the state control unit 100 compared to the first embodiment. Other aspects are the same as in the first embodiment, so a detailed explanation will be omitted here.

[0067] In this embodiment, as shown in Figure 10, the heater 110 is located on the gas supply source 180 side of the pressure tank 140 and is positioned between the regulator 160 and the pressure tank 140. The pressure tank 140 stores the gas heated by the heater 110. The pressure tank 140 is designed to maintain the gas temperature, for example, by having a thermos-like structure with a vacuum between the outer and inner walls.

[0068] According to the embodiment described above, the inspection device S1 ensures that the pressure space PS is sealed and reaches a predetermined pressure, and stops supplying gas to the pressure space PS when performing electrical characteristic testing. Therefore, the same effects as in the first embodiment can be obtained.

[0069] (1) In this embodiment, the heater 110 is provided to the gas supply source 180 from the pressure tank 140, and heated gas is stored in the pressure tank 140. Therefore, fluctuations in the temperature of the heated gas can be suppressed.

[0070] (Sixth Embodiment) The sixth embodiment will now be described. This embodiment is a modification of the configuration of the state control unit 100 compared to the first embodiment. Other aspects are the same as in the first embodiment, so a detailed explanation will be omitted here.

[0071] In this embodiment, as shown in Figure 11, there is no pressure tank 140. Therefore, in this embodiment, when the valve 130 is open, the gas from the gas supply source 180 is directly heated by the heater 110 and supplied to the pressure space PS. The static eliminator 150 is provided between the heater 110 and the valve 130.

[0072] According to the embodiment described above, the inspection device S1 ensures that the pressure space PS is sealed and reaches a predetermined pressure, and stops supplying gas to the pressure space PS when performing electrical characteristic testing. Therefore, the same effects as in the first embodiment can be obtained.

[0073] (1) In this embodiment, the pressure tank 140 is not provided. Therefore, the number of parts can be reduced, and consequently, costs can be reduced.

[0074] (Seventh Embodiment) The seventh embodiment will now be described. This embodiment is a modification of the state control unit 100 compared to the first embodiment. Other aspects are the same as in the first embodiment, so their explanation will be omitted here.

[0075] In this embodiment, as shown in Figure 12, the static eliminator 150 is provided between the heater 110 and the valve 130.

[0076] As described above in this embodiment, even if the location of the static eliminator 150 is changed, the same effects as in the first embodiment can be obtained by ensuring that the pressure space PS reaches a predetermined pressure while the pressure space PS is sealed, and by stopping the supply of gas to the pressure space PS when performing electrical characteristic testing. In this embodiment, an example in which the static eliminator 150 is provided between the heater 110 and the valve 130 has been described, but the static eliminator 150 may be placed anywhere between the gas supply source 180 and the pressure chamber 60 as long as the statically eliminated gas is supplied to the pressure space PS.

[0077] (Other Embodiments) While this disclosure has been described in accordance with embodiments, it is understood that this disclosure is not limited to such embodiments or structures. This disclosure also includes various modifications and variations within the scope of equivalents. In addition, various combinations and forms, as well as other combinations and forms that include only one, more, or fewer of those elements, fall within the scope and idea of ​​this disclosure.

[0078] For example, each of the above embodiments can also be applied to the inspection process of a semiconductor wafer 1 that also has electrodes on the other side 1b.

[0079] Furthermore, in each of the above embodiments, a configuration comprising one control device 300 has been described. However, for example, separate control devices may be provided for controlling the heater 110, pressure gauge 120, valve 130, static eliminator 150, regulator 160, and gas supply source 180.

[0080] Furthermore, the above embodiments can be combined. For example, the second and third embodiments may be combined with the fourth to seventh embodiments to change the configuration of the probe card 20. The fourth embodiment may be combined with the fifth to seventh embodiments so that heated gas is included in the connecting pipe 101 before sealing the pressure space PS. The fifth embodiment may be combined with the seventh embodiment so that heated gas is supplied to the pressure tank 140.

[0081] The control unit (i.e., state control unit 100) and its method described herein may be implemented by a dedicated computer provided by configuring a processor and memory programmed to perform one or more functions embodied by a computer program. Alternatively, the control unit and its method described herein may be implemented by a dedicated computer provided by configuring a processor by one or more dedicated hardware logic circuits. Alternatively, the control unit and its method described herein may be implemented by one or more dedicated computers configured by a combination of a processor and memory programmed to perform one or more functions and a processor configured by one or more hardware logic circuits. Furthermore, the computer program may be stored as instructions executed by the computer on a computer-readable non-transitional tangible recording medium. In this disclosure or claims, the term “processor” means one or more hardware processors configured to read computer program code (i.e., one or more instructions of the computer program) contained in a computer program and execute the processing defined by said computer program code each time. In other words, “processor” is a hardware device that executes one or more programmed processes. Therefore, computer program code can also be said to be software that can define the processing of the processor according to its content. "Processor" refers to a general-purpose or application-specific processor, which may include, but is not limited to, a CPU, microprocessor, GPU, and DFP (Data Flow Processor). Alternatively, a "circuit" may be provided in place of, or together with, the "processor," and processing may be performed by at least one of the "processor" and the "circuit." In this disclosure or claims, the term "memory" refers to one or more hardware memories that are non-transitional tangible recording media and are configured to record computer program code and / or data in a manner accessible from the processor."Memory" can be implemented by memory technologies such as SRAM, SDRAM, non-volatile / flash memory, or other types of memory. The computer program code that constitutes the program is recorded in memory and executed by the processor, thereby enabling the processor to implement the various functions described above. In this disclosure or claims, the term "circuit" refers to one or more logic circuits as hardware, configured to perform specific processing defined based on a pre-designed circuit configuration. In other words (and in contrast to "processor"), "circuit" in this disclosure or claims refers to a hardware device that performs specific processing based on a circuit configuration, rather than processing defined by software such as the computer program code described above. For example, "circuit" may include custom ICs such as ASICs (Application Specific Integrated Circuits) and FPGAs (Field Programmable Gate Arrays) designed with a Hardware Description Language (HDL). That is, "circuit" in this disclosure or claims includes all hardware circuits except for the processor described above that performs processing by reading computer program code. In this disclosure or claims, the expression "at least one of the circuits and processors" should be interpreted as disjunctive (logical OR) and not as "at least one circuit and at least one processor." Therefore, in this disclosure or claims, "at least one of the circuits and processors causes the state control unit 100 to perform functions" includes the case where the circuit alone causes the state control unit 100 to perform all functions. Furthermore, "at least one of the circuits and processors causes the state control unit 100 to perform functions" includes the case where the processor alone causes the state control unit 100 to perform all functions. In addition, "at least one of the circuits and processors causes the state control unit 100 to perform functions" includes the case where the circuit causes the state control unit 100 to perform some functions and the processor causes the state control unit 100 to perform the remaining functions.In the last example, for instance, when the state control unit 100 performs functions A to C, functions A and B may be implemented by the circuit, while the remaining function C may be implemented by the processor.

[0082] [Disclosure of the Invention] The above disclosure can be understood, for example, from the following viewpoints. [First viewpoint] An inspection apparatus comprising: a wafer chuck (10) on which a semiconductor wafer (1) having one surface (1a) and another surface (1b) opposite to the one surface, wherein semiconductor elements are formed in a plurality of chip formation regions (Ra) and electrodes (2) connected to the semiconductor elements are formed on the one surface, and the other surface of the semiconductor wafer is fixed by vacuum suction; a probe card (20) for performing electrical characteristic testing of the semiconductor wafer; and a state control unit (100) for performing predetermined processing, wherein the probe card has a pressure chamber (60) having a pressure space (PS) and one end (61) side is in contact with the one surface of the semiconductor wafer to seal the pressure space, and a probe needle (70) drawn out into the pressure chamber, The pressure chamber has a cylindrical surrounding wall (40) having one end (42) and the other end (43) and a hollow portion (41), and a contact shield (50) provided on the one end side of the surrounding wall, made of a material softer than the surrounding wall, and forming one end side of the pressure chamber and in contact with one side of the semiconductor wafer, wherein when one end side of the pressure chamber is in contact with one side of the semiconductor wafer, the probe needle comes into contact with the electrode, the state control unit adjusts the pressure in the pressure space to a predetermined pressure by supplying heated gas after one end of the pressure chamber is in contact with one side of the semiconductor wafer and the pressure space is sealed, and stops supplying the gas after the pressure in the pressure space reaches the predetermined pressure, and the probe card is an inspection device that performs the electrical characteristic test after the pressure space reaches the predetermined pressure and the supply of the gas is stopped. [Second viewpoint] The inspection device according to the first viewpoint, wherein the state control unit sets the pressure space to 1 atmosphere or more as the predetermined pressure.[Third viewpoint] The inspection apparatus according to the first or second viewpoint, wherein the state control unit has a gas supply source (180), a heater (110), a valve (130), a regulator (160), and a filter (170) provided between the gas supply source and the pressure chamber, and supplies heated gas to the pressure space by operating the heater and opening the valve to adjust the pressure in the pressure space to the predetermined pressure set by the regulator. [Fourth viewpoint] The inspection apparatus according to the third viewpoint, wherein the state control unit operates the heater and opens the valve before one end of the pressure chamber is brought into contact with one side of the semiconductor wafer, and then closes the valve after a predetermined period of time, so that heated gas is contained in the connecting pipe (101) connecting the heater and the pressure chamber. [Fifth viewpoint] The inspection apparatus according to the third or fourth viewpoint, further comprising a static eliminator (150) provided between the gas supply source and the pressure chamber. [Sixth viewpoint] An inspection apparatus according to any one of the third to fifth viewpoints, further comprising a pressure tank (140) provided between the regulator and the pressure chamber. [Seventh viewpoint] An inspection apparatus according to the sixth viewpoint, wherein the heater is provided between the pressure tank and the gas supply source. [Eighth viewpoint] An inspection apparatus according to any one of the first to seventh viewpoints, wherein the pressure chamber is shaped such that when one end of the pressure chamber is brought into contact with one side of the semiconductor wafer, at least a portion of the plurality of chip formation regions on one side of the semiconductor wafer is located within the pressure space.[Ninth Perspective] A method for manufacturing a semiconductor chip, comprising: preparing a semiconductor wafer (1) having one surface (1a) and another surface (1b) opposite to the one surface, wherein semiconductor elements are formed in a plurality of chip formation regions (Ra) and electrodes (2) connected to the semiconductor elements are formed on the one surface; placing the semiconductor wafer on the wafer chuck (10) with the other surface facing the wafer chuck, and fixing the semiconductor wafer to the wafer chuck by vacuum suction; preparing a probe card (20) having a pressure chamber (60) having a pressure space (PS) and one end (61) side being in contact with the one surface side of the semiconductor wafer to seal the pressure space, and a probe needle (70) drawn out into the pressure chamber; performing an electrical characteristic test by bringing the probe needle into contact with the electrodes of the semiconductor wafer; and after performing the electrical characteristic test, dividing the semiconductor wafer along the chip formation region. A semiconductor chip manufacturing method comprising: sealing the pressure space by bringing one end of the pressure chamber into contact with one side of the semiconductor wafer and bringing the probe needle into contact with the electrode before performing the electrical characteristic test; supplying heated gas to the pressure space to a predetermined pressure; stopping the supply of gas after the pressure space has reached the predetermined pressure; and performing the electrical characteristic test after the pressure space has reached the predetermined pressure and the supply of gas has been stopped.

Claims

1. An inspection apparatus comprising: a wafer chuck (10) on which a semiconductor wafer (1) having one side (1a) and another side (1b) opposite to the one side, wherein semiconductor elements are formed in a plurality of chip formation regions (Ra) and electrodes (2) connected to the semiconductor elements are formed on the one side, and which fixes the other side of the semiconductor wafer by vacuum suction; a probe card (20) for performing electrical characteristic testing of the semiconductor wafer; and a state control unit (100) for performing predetermined processing, wherein the probe card has a pressure chamber (60) having a pressure space (PS) and one end (61) side is in contact with the one side of the semiconductor wafer to seal the pressure space, and a probe needle (70) drawn out into the pressure chamber, The pressure chamber comprises a cylindrical surrounding wall (40) having one end (42) and the other end (43) and a hollow portion (41), and a contact shield (50) provided on the one end side of the surrounding wall, made of a material softer than the surrounding wall, and constituting the one end side of the pressure chamber and in contact with one side of the semiconductor wafer, wherein when the one end side of the pressure chamber is in contact with one side of the semiconductor wafer, the probe needle comes into contact with the electrode, the state control unit adjusts the pressure in the pressure space to a predetermined pressure by supplying heated gas after the one end side of the pressure chamber is in contact with one side of the semiconductor wafer and the pressure space is sealed, and stops the supply of the gas after the pressure in the pressure space reaches the predetermined pressure, and the probe card is an inspection device that performs the electrical characteristic test after the pressure space reaches the predetermined pressure and the supply of the gas is stopped.

2. The inspection apparatus according to claim 1, wherein the state control unit sets the pressure space to 1 atmosphere or more as the predetermined pressure.

3. The inspection apparatus according to claim 1, wherein the state control unit comprises a gas supply source (180), a heater (110), a valve (130), a regulator (160), and a filter (170) provided between the gas supply source and the pressure chamber, and by operating the heater and opening the valve, heated gas is supplied to the pressure space to adjust the pressure in the pressure space to the predetermined pressure set by the regulator.

4. The inspection apparatus according to claim 3, wherein the state control unit opens the valve while operating the heater before one end of the pressure chamber is brought into contact with one side of the semiconductor wafer, and closes the valve after a predetermined period of time has elapsed, so that heated gas is contained in the connecting pipe (101) connecting the heater and the pressure chamber.

5. The inspection apparatus according to claim 3, further comprising a static eliminator (150) provided between the gas supply source and the pressure chamber.

6. The inspection apparatus according to claim 3, further comprising a pressure tank (140) provided between the regulator and the pressure chamber.

7. The inspection apparatus according to claim 6, wherein the heater is provided between the pressure tank and the gas supply source.

8. The inspection apparatus according to claim 1, wherein the pressure chamber is shaped such that when one end of the pressure chamber is brought into contact with one side of the semiconductor wafer, at least a portion of the plurality of chip formation regions on one side of the semiconductor wafer is located within the pressure space.

9. A method for manufacturing a semiconductor chip, comprising: preparing a semiconductor wafer (1) having one surface (1a) and another surface (1b) opposite to the one surface, wherein semiconductor elements are formed in a plurality of chip formation regions (Ra) and electrodes (2) connected to the semiconductor elements are formed on the one surface; placing the semiconductor wafer on the wafer chuck (10) with the other surface facing the wafer chuck, and fixing the semiconductor wafer to the wafer chuck by vacuum suction; preparing a probe card (20) having a pressure chamber (60) having a pressure space (PS) and one end (61) side being in contact with the one surface side of the semiconductor wafer to seal the pressure space, and a probe needle (70) drawn out into the pressure chamber; performing an electrical characteristic test by bringing the probe needle into contact with the electrodes of the semiconductor wafer; and after performing the electrical characteristic test, dividing the semiconductor wafer along the chip formation region. A semiconductor chip manufacturing method comprising: sealing the pressure space by bringing one end of the pressure chamber into contact with one side of the semiconductor wafer and bringing the probe needle into contact with the electrode before performing the electrical characteristic test; supplying heated gas to the pressure space to a predetermined pressure; stopping the supply of gas after the pressure space has reached the predetermined pressure; and performing the electrical characteristic test after the pressure space has reached the predetermined pressure and the supply of gas has been stopped.

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