Method for manufacturing glass substrate having copper interconnects

Abstract

The present invention relates to a method for manufacturing a glass substrate having copper interconnects and, more particularly, to a method for manufacturing a glass substrate which can be used in semiconductor 2.5D and 3D PCB packaging and has copper interconnects by forming copper interconnects and horizontal copper lines having a high aspect ratio (1:4 or more) on a silicon-based substrate.

Description

Method for manufacturing a glass substrate with through-hole copper wiring formed

[0001] The present invention relates to a method for manufacturing a glass substrate having through-hole copper wiring formed thereon, and more specifically, to a method for manufacturing a glass substrate having through-hole copper wiring formed thereon that can be used for semiconductor 2.5D and 3D PCB packaging by forming through-hole copper wiring and / or horizontal copper wiring with a high aspect ratio (1:4 or higher) on a silicon-based substrate.

[0002] Recently, the miniaturization of circuits in the semiconductor manufacturing process has successfully reached the 3nm circuit linewidth stage, and while linewidths of 1.5nm and 2nm are being developed, development is facing difficulties due to physical limitations and low yields. Furthermore, as the AI ​​industry develops rapidly, semiconductors such as GPUs (Graphics Processing Units) and HBMs (High Bandwidth Memory) capable of rapidly computing and processing AI data are being developed, and performance is being improved by mounting these chips on a single PCB substrate.

[0003] As part of that method, there is a 2.5D packaging method that uses an interposer to horizontally arrange 3D-formed HBM and GPU and mounts them on a motherboard.

[0004] Conventional 2.5D packaging methods utilize organic substrates and silicon substrates. In the case of organic substrates, the limit for circuit miniaturization is a line / space of 8㎛. Additionally, organic substrates require the formation of a buffer layer using a build-up film called ABF (Ajinomoto Build-up Film), which presents issues such as limitations on circuit miniaturization and increased manufacturing costs. In the case of silicon substrates, while circuit miniaturization is possible indefinitely, there is a problem of very high manufacturing costs because the formation of TSV (Through Silicon Via) and RDL (Re-Distribution Layer) requires passing through the entire semiconductor manufacturing process.

[0005] Efforts to use glass substrates are increasing to solve the problems of the aforementioned organic and silicon substrates. Although glass possesses excellent electrical, physical, and thermal properties, low adhesion to copper wiring and breakage are emerging as the biggest obstacles to product commercialization.

[0006] The inventors recognized the need to provide a glass substrate for semiconductor processes by improving the adhesion of the glass and compensating for glass breakage, and by forming copper wiring in through holes that connect signals vertically and / or horizontally in 2.5D packaging.

[0007] The present invention aims to solve the above-mentioned problems by using glass with a relatively thick thickness to compensate for the disadvantage of glass, which is breakage, and forming vertical and / or horizontal through holes in the glass and forming copper wiring therein. At this time, in order to achieve miniaturization and high integration of the circuit, the diameter of the hole on the glass surface must be reduced, which results in a larger aspect ratio of the through hole (ratio of the hole diameter to the glass thickness) (high aspect ratio). As the aspect ratio increases to a high ratio of 1:4 or higher, there is a limit to the depth at which deposition can be performed on the inner wall of the hole using the PVD deposition method. This causes the wiring to break during the process of filling the copper wiring through electroplating after deposition, making it unusable for subsequent packaging processes.

[0008] As a solution to this problem, a method was proposed in which a seed layer is formed on the inner wall of the hole using a wet electroless plating method, and copper wiring is formed through electroplating; however, difficulties are being encountered in ensuring reliability when subsequently used as a packaging material due to limitations in adhesion. Specifically, in the case of glass substrates, the adhesion between the copper wiring within the through-hole and the glass is poor, leading to wire breakage, and delamination occurs during the packaging process due to the difference in thermal expansion coefficients between copper and glass. Furthermore, problems such as delamination are occurring due to thermal stress caused by repeated heating and cooling during reliability testing and actual usage environments.

[0009] The inventors have developed a glass substrate having high adhesion, and based on this, the purpose is to provide a glass substrate material that forms reliable copper wiring without disconnection or voids in the center of the wiring for vertical through-holes and / or horizontal through-holes with a high aspect ratio, thereby connecting signals of semiconductors such as GPUs and HBMs and normally transmitting input / output signals to these semiconductors and the motherboard.

[0010] The objectives of the present invention are not limited to those mentioned above, and other objectives and advantages will become apparent from the following description describing preferred embodiments.

[0011] To achieve the above objective, the present invention provides a method for manufacturing a glass substrate having through-hole copper wiring, comprising the steps of: preparing a glass material having through-holes formed therein; surface treating the surface of the glass material and the inner wall of the through-holes; forming a first metal layer on both sides of the surface-treated glass material; forming a second metal layer on the first metal layer on both sides; forming a catalyst layer on the second metal layer on both sides; forming a third metal layer on the catalyst layer on both sides; forming copper wiring on the third metal layer on both sides; and heat treating the glass material having the copper wiring formed therein.

[0012] The present invention ensures reliability when forming copper wiring in vertical and / or horizontal through-holes of a glass substrate by securing adhesion between the glass substrate and the metal electrode layer. In manufacturing glass substrates, relatively thick glass (0.4t or thicker) is used to prevent breakage caused by accumulated impact during multiple process steps. Additionally, to achieve high integration of semiconductor chips, the formation of copper wiring with a high aspect ratio and through-hole diameters of 10-100㎛ is required. The present invention has the effect of forming copper wiring that is free of breakage and voids in the glass material and has a high adhesion force of 7N / cm or more. Furthermore, it has the effect of increasing process yield in a 2.5D semiconductor packaging process for forming circuits with a line / space of 1-2㎛. The present invention has the effect of providing a substrate that can achieve circuit miniaturization and high integration (line / space 8㎛ -> 1-2㎛) by replacing an organic substrate, and can have competitiveness such as increasing the substrate area (Si wafer Ø 300mm -> 510x515mm) and reducing manufacturing costs by replacing a silicon substrate.

[0013] The effects of the present invention are not limited to the effects described above, and should be understood to include all effects that can be inferred from the configuration of the invention described in the detailed description or claims of the present invention.

[0014] FIG. 1 is a flowchart showing the method for manufacturing a glass substrate having through-type copper wiring formed thereon according to one embodiment of the present invention.

[0015] FIG. 2 is a cross-sectional image of a glass through-hole (TGV, Through Glass Via) after surface treatment and deposition of first and second metal layers on one surface of a glass material according to one embodiment of the present invention.

[0016] FIG. 3 is a cross-sectional image of a glass TGV after surface treatment and deposition of first and second metal layers on both sides of a glass material according to one embodiment of the present invention.

[0017] FIG. 4 is a cross-sectional image of a glass TGV after surface treatment, first and second metal layers, a catalyst layer, and a third metal layer are deposited on both sides of a glass material according to one embodiment of the present invention.

[0018] FIG. 5 is a glass substrate manufactured according to one embodiment of the present invention.

[0019] Figure 6 is an X-ray result photograph of part ② of the glass substrate in Figure 5.

[0020] Figure 7 is an X-ray result photograph of part ③ of the glass substrate in Figure 5.

[0021] Figure 8 is an X-ray result photograph of part ⑤ of the glass substrate in Figure 5.

[0022] Figure 9 is the result of a peel strength test of a glass substrate according to one embodiment of the present invention.

[0023] The present invention provides a method for manufacturing a glass substrate having through-hole copper wiring, comprising the steps of: preparing a glass material having through-holes formed therein; surface treating both surfaces of the glass material and the inner wall of the through-holes; forming a first metal layer on both sides of the surface-treated glass material; forming a second metal layer on the first metal layer on both sides; forming a catalyst layer on the second metal layer on both sides; forming a third metal layer on the catalyst layer on both sides; forming copper wiring on the third metal layer on both sides; and heat treating the glass material having the copper wiring formed therein.

[0024] The above glass substrate is for semiconductors or displays.

[0025] FIG. 1 is a flowchart illustrating, in sequence, a method for manufacturing a glass substrate having through-type copper wiring formed thereon according to one embodiment of the present invention. The present invention will be described in detail below with reference thereto.

[0026] 1) Glass material with through holes formed

[0027] The glass material of the present invention is a silicon-based material and may include silicon-based oxides such as silicate glass, borate glass, phosphate glass, germanate glass, aluminate glass, vanadate glass, tungstate glass, molybdate glass, quartz, etc., and is characterized by not being limited by differences in metal oxide composition such as Al, Ca, Mg, Na, K, Pb, B, Ba, Ce, Fe, Zn, etc.

[0028] It is preferable that the thickness of the above glass material be formed to be 100-1,500㎛, 150-1,200㎛, 200-1,000㎛, 300-1,000㎛, 400-1,000, 500-1,000, or 600-1,000㎛. The thickness is not fixed and may vary depending on the application of the substrate. However, if the thickness is smaller than this, there is a risk of it breaking easily, and if it is thicker, there is less risk of it breaking, but the entire device becomes thicker, which may not be efficient.

[0029] A through hole is formed in the glass material. The through hole is a vertical through hole and / or a horizontal through hole, and the diameter of the vertical through hole is 10-100㎛, or 20-80㎛, or 30-70㎛.

[0030] The vertical through hole of the glass material of the present invention is characterized by having a large aspect ratio (ratio of the diameter of the hole to the thickness of the glass) of the through hole, preferably 1:4 to 1:100, more preferably 1:4 to 1:20, and even more preferably 1:4 to 1:10.

[0031] 2) Surface treatment

[0032] The glass material having through holes formed according to the present invention undergoes surface treatment before forming a metal layer, and the present invention performs surface treatment by an ion beam before forming a metal layer. The surface treatment is performed on both sides of the glass material and the through holes, and can be performed one or more times.

[0033] Conventional surface treatments can be divided into general plasma treatment and wet surface treatment. In the case of general surface treatment (atmospheric pressure or glow discharge), it is difficult to achieve reproducibility, and not only is it difficult to modify the surface with active gases, but it is also impossible to implant internally. Even in the case of wet surface treatment, chemicals are used to roughen the surface to increase the peel strength of glass and metal, but the effect is not significant.

[0034] In contrast, the present invention performs ion beam surface treatment. Ion beam surface treatment not only chemically modifies the glass surface by controlling the energy (eV) of the ion beam but also enables the implantation of reactive gases to a depth of several to tens of nanometers inside the glass. As a result, the adhesion can be enhanced by reacting with the subsequently formed metal layer. Furthermore, regarding through holes, since the ion beam possesses energy and propagates in a straight line, it can penetrate to the depth of the through hole and perform surface treatment up to the inner wall of the through hole.

[0035] Specifically, the surface of a glass material can be subjected to primary surface treatment using an ion beam.

[0036] The above first surface treatment is performed using an ion beam to minimize changes in the shape of the glass surface and to enable the formation of hydrophilic functional groups and dangling bonds.

[0037] The glass material of the present invention includes a through hole, and the surface of the through hole is also surface treated by the surface treatment of the glass material.

[0038] The above primary surface treatment may involve irradiating the surface of a glass material with an ion beam, specifically a linear ion beam, by ionizing an active gas or an inert gas using a reaction gas. Surface treatment using an ion beam may involve irradiating the surface of the glass material with an ion beam containing a reaction gas accelerated to an energy range of a specific area. For example, the primary surface treatment reaction gas may include O2, N2, H2, or Ar gas, and may be performed by mixing two or more types.

[0039] The present invention preferably uses a low-energy ion beam as the ion beam, and the voltage input to the ion beam can be applied in the range of 0.5 to 3.0 kV. When the input voltage of the ion beam of the present invention is as described above, the surface can be modified without deformation of the material, thereby achieving effects such as a cleaning effect, increased hydrophilicity, increased adhesion, and the formation of nanostructures.

[0040] The amount of the reaction gas injected above may be, for example, 1 to 100 sccm (Standard Cubic Centimeter per Minute), preferably 30 to 100 sccm, more preferably 40 to 70 sccm, and within this range, an ion beam can be stably irradiated onto the surface of the glass material.

[0041] The irradiation time of the above ion beam is not specifically limited and can be appropriately adjusted according to the purpose.

[0042] The ion dose density irradiated onto the surface of the glass material through the above low-energy ion beam is 1 x 10⁻⁶ -14 Up to 5x10 -19 dose / cm 2 , preferably 1x10 -16 Up to 5x10 -19 dose / cm 2 , more preferably 1x10 -16 Up to 5x10 -18 dose / cm 2It can be adjusted to consist of the area.

[0043] When an ion beam is irradiated under the aforementioned conditions, the effects of high adhesion to metal and excellent surface properties can be maximized, and subsequently, the bonding stability between the glass material and the metal electrode layer can be enhanced.

[0044] Next, the glass material that has undergone the first surface treatment (201) can be subjected to a second surface treatment.

[0045] The above secondary surface treatment can be performed using an ion beam, specifically a linear ion beam, with an ionized active gas or an inert gas as the reaction gas. Similar to the primary surface treatment, it may include O2, N2, H2, or Ar gas, and can be performed by mixing two or more types. The conditions for the secondary surface treatment may be the same or different from the conditions for the primary surface treatment, and preferably, they are the same.

[0046] Subsequently, the glass material that has undergone secondary surface treatment can be treated sequentially up to n times. This means that the surface of the glass material that has undergone secondary surface treatment is treated multiple times in succession. In this case, the n-th surface treatment may include at least three or more surface treatments, specifically three to eight times, but is not limited thereto. When performing three or more surface treatments, the surface treatment conditions may be the same or different from the first surface treatment conditions, and preferably, they are the same.

[0047] In the present invention, by sequentially performing a first surface treatment and a second to nth surface treatment on a glass material as described above, the formation of functional groups such as carboxyl groups and hydroxyl groups is promoted on the glass surface and the surface of the through hole, thereby inducing chemical interactions with glass oxide chains and significantly improving adhesion to heterogeneous materials or substances. That is, when forming various types of conductive metal layers on the surface formed through surface treatment, excellent reliability (thermal shock, high temperature, moisture, etc.) between the heterogeneous materials of the glass material and the metal electrode layer can be secured.

[0048] 3) Formation of the first metal layer and the second metal layer

[0049] A first metal layer and a second metal layer are sequentially formed on a glass material having a surface-treated through hole.

[0050] The first metal layer can be formed from one or more metals selected from copper (Cu), nickel (Ni), chromium (Cr), titanium (Ti), zinc (Zn), aluminum (Al), zirconium (Zr), molybdenum (Mo), niobium (Nb), and ruthenium (Ru) as a tie layer to improve the bonding strength between the glass material and the second metal layer. The first metal layer can be formed by methods such as magnetron DC sputtering, magnetron RF sputtering, evaporation with ion assisted deposition, and ion beam sputtering, and can be performed on each side of the surface-treated glass material. At this time, the distance from the metal target to the target deposited glass material can be set to 0.4 to 2.2 times the diameter or width of the metal target, preferably 0.5 to 2 times. If the distance from the metal target to the target deposition glass material is shorter than the above distance, there is a disadvantage that the deposition depth of the through hole becomes shallow, and if the distance is longer than the above distance, there is a problem that the deposition speed decreases and productivity is low.

[0051] The deposition thickness of the first metal layer is 10-100 nm, preferably 20-100 nm. If the deposition thickness is less than 10 nm, it is too thin to form adhesion with the glass, and if it is more than 100 nm, it takes too long to etch the first metal layer to form a circuit pattern later, causing a bottleneck in the process.

[0052] After forming the first metal layer, the second metal layer is intended to form a conductive layer for bonding with the first metal layer and forming copper wiring. Copper (Cu) can be formed by methods such as magnetron DC sputtering, magnetron RF sputtering, evaporation with ion assisted deposition, and ion beam sputtering. In this case, the distance from the metal target to the target glass material can be set to 0.4 to 2.2 times the diameter or width of the metal target, preferably 0.5 to 2.0 times. If the distance between the metal target and the target glass material is less than 0.4 times the diameter or width of the target, the aspect ratio of the through-hole that can be processed is only 1:3 at most, and if it exceeds 2.2 times, the deposition rate decreases significantly, resulting in a loss of process time.

[0053] The deposition thickness of the second metal layer is preferably 200-600 nm; if it is less than 200 nm, the deposition depth on the inner wall of the through-hole is too thin and it is difficult to form adhesion with the glass, and if it exceeds 600 nm, it is not suitable because it exceeds the surface resistance required for electroplating to form copper wiring. The present invention is characterized in that the deposition thickness of the second metal layer is at least 2 times, or at least 5 times, or at least 10 times, compared to the deposition thickness of the first metal layer. By making the second metal layer such a ratio relative to the first metal layer as described above, the present invention has the advantage of facilitating the formation of the electrode layer without the substrate becoming unnecessarily thick.

[0054] 4) Formation of catalyst layer

[0055] A catalyst layer can be formed on a glass substrate having the above-mentioned through hole after surface treatment and the formation of first and second metal layers. The present invention allows a third metal layer to be subsequently formed in the portions where the first and second metal layers were not formed due to the formation of the catalyst layer, thereby forming a conformally metal layer and forming a conductive layer with reduced hole defects such as voids and seams. The catalyst layer is a layer comprising a metal selected from the group consisting of Pd, Pt, Au, Ag, Rh, Ru, Sn, Ni, Co, Cu, and combinations thereof, and can be formed using a colloidal catalyst solution or an ionic catalyst solution of said metal.

[0056] Colloidal catalyst solutions utilize a colloidal solution of metal in a metallic state, preferably of nanoparticle size, and possess high activity. In this case, when catalyst particles are dispersed on the material surface, the surface area of ​​the particles increases, which enhances the reaction rate and offers the advantage of effectively forming a catalyst layer on glass materials. When using colloidal catalysts, an accelerator process to remove Sn and impurities may be required after the catalyst layer formation process to improve adhesion. Ionic catalyst solutions utilize a solution in the state of metal ions and require electrical activation through a conductive material, specifically an electrolyte. Although ionic catalysts do not have as high activity as colloidal catalysts, they offer the advantages of being relatively stable and consistent, free from precipitation issues, and relatively easy to manage.

[0057] In the case of the catalyst layer formation process, degreasing, acid washing, and pre-dip processes are generally performed before the catalyst layer is formed. However, the present invention has the advantage of not requiring a separate acid washing process, which is a preliminary step for conventional catalyst layer formation, by forming first and second metal layers on the entire or part of the inner wall of the through-hole through surface treatment and sputtering. However, before forming the catalyst layer, it is necessary to remove organic matter that may remain on the substrate through a degreasing process using an alkaline or acidic-based degreasing solution and to lower the surface tension so that chemicals can be effectively delivered into the interior of the through-hole. Meanwhile, although the catalyst layer can be formed after the degreasing process and before forming the catalyst layer by removing surface impurities and oxides through a pre-dip process to improve the adhesion of the catalyst, the present invention does not necessarily require the inclusion of the pre-dip process.

[0058] An example of a catalyst used in the above catalyst layer formation process is a palladium ion catalyst, which may be one of acidic, neutral, or alkaline types, and a colloidal catalyst may also be used. When forming a catalyst layer using an ion-type catalyst solution, the process can be performed at 30-50°C and can be formed to a thickness of several nanometers. At temperatures below 30°C, activity decreases, resulting in poor quality and a high probability of defects occurring during the electroless plating of the third metal layer; at temperatures above 50°C, bubbles may form, and simultaneously, due to the overactivity of the palladium ion catalyst, metallic palladium may precipitate, increasing the probability of the liquid breaking down.

[0059] 5) Formation of the third metal layer

[0060] The present invention involves surface treatment, the formation of first and second metal layers and a catalyst layer, and the formation of a third metal layer on a glass material having the through hole formed therein, wherein the third metal layer is intended to form a conductive layer in a place where the first metal layer and the second metal layer were not deposited, and conformal copper plating is performed through electroless copper plating.

[0061] In the present invention, electroless copper plating can be carried out according to commonly used methods, and Cu 2+ + HCHO + OH - → Cu 0 + HCOO - Copper ions (Cu) according to the reaction with H2 2+ ) is palladium metal (Pd 0 ) is reduced by a catalyst to copper metal (Cu 0 It is deposited on the surface of the through hole. The plating solution temperature can be performed at approximately 30-40°C, and the plating thickness is about 0.5-1 μm, but is not limited thereto. In the case of the plating, a conductive layer can be formed in the area where the first metal layer and the second metal layer were not deposited in the dry method by forming copper by forming a chemical gradient on a metal catalyst, preferably a Pd catalyst, formed on the inner wall of the through hole.

[0062] The present invention has the advantage of reducing the occurrence of peeling or undercut defects in the metal layer compared to the case where the metal layer is formed solely by conventional electroless plating, by forming a third metal layer by electroless plating after forming a first metal layer and a second metal layer.

[0063] 6) Forming copper wiring

[0064] A general electroplating method is used to form copper wiring on a glass substrate having the above-mentioned through-hole after surface treatment and the formation of the first and second metal layers, the catalyst layer, and the third metal layer. The electrolyte used at this time may be a mixture of copper sulfate, sulfuric acid, distilled water, a leveler, a brightener, an accelerator, etc., and the current density at this time is 0.1-0.5 mA / cm² 2 It can be set to.

[0065] The present invention can ensure reliability when forming copper wiring in the vertical and horizontal through holes of a glass substrate by ensuring adhesion between a glass substrate with through holes and a metal electrode layer.

[0066] 7) Heat treatment step

[0067] The present invention can perform a heat treatment step after forming copper wiring.

[0068] The above heat treatment can be performed using an electric furnace, but is not limited thereto, and may also be performed using a heater and other furnaces. The heat treatment can be performed under an inert gas, preferably Ar gas.

[0069] The above heat treatment may vary depending on the type and composition of the glass material, but, for example, it is preferable to perform it at a temperature of 100-600°C. If the temperature of the heat treatment is below 100°C, it is difficult to form intermetallic compounds between the metal layers, and if it exceeds 600°C, it is heated more than necessary, and problems such as warpage or cracking may occur due to the difference in the coefficient of thermal expansion between the glass and the metal.

[0070] The present invention has the effect of being able to compensate for the breakage, which is a disadvantage of conventional glass substrates, by using glass with a thickness of 100-1,500㎛, and to form copper wiring with a high adhesion force of 7N / cm or more without breakage or voids while forming through holes with a diameter of 10-100㎛. In addition, when forming circuits with a line / space of 1-2㎛, it is possible to increase the process yield in the 2.5D semiconductor packaging process. It has the effect of providing a substrate that can replace organic substrates to achieve circuit miniaturization and high integration with a line / space of 1-2㎛, and replace silicon substrates to achieve a large substrate area of ​​510x515mm compared to the Ø300mm of a silicon wafer, and possess competitiveness such as reduced manufacturing costs.

[0071] Hereinafter, the structure of the present invention and the resulting effects are to be explained in more detail through specific embodiments and comparative examples. However, these embodiments are intended to explain the present invention more specifically, and the scope of the present invention is not limited to these embodiments.

[0072] [Example]

[0073] <Example 1: Surface Treatment and Formation of First and Second Metal Layers>

[0074] Using O2 gas on both sides of a 250㎛ thick glass material having vertical through-holes with a diameter of 50㎛ at 1.0kV and an ion dose density of 5x10 -18 dose / cm 2 Surface treatment was performed in five stages. A first metal layer of 30 nm of Ti was formed on one surface of the surface-treated glass material through a DC sputtering process, and a second metal layer of 500 nm of Cu was formed on the first metal layer. The diameters of the Ti and Cu targets used were each 10 cm, and the distances between the targets and the substrate were 5 cm, 10 cm, 15 cm, and 20 cm, respectively.

[0075] <Experimental Example 1: Verification of deposition effect according to distance between target and substrate in deposition chamber>

[0076] To verify the deposition effect of vertical through-holes according to the distance between the target and the substrate in the chamber during deposition, the vertical through-hole portion was broken with a glass cutter after the formation of the first and second metal layers in Example 1 and cross-sectionally analyzed under a microscope. The analysis results showed that the first and second metal layers were formed on the inner wall of the through-hole, and that as the distance between the target and the substrate increased, the straightness of titanium and copper atoms improved during DC sputtering, resulting in deeper deposition on the inner wall of the through-hole. Specifically, it was confirmed that the deposition results were 1:1.4, 1:1.3, 1:1.9, and 1:2.5 when the distance between the target and the substrate was 5 cm, 10 cm, 15 cm, and 20 cm, respectively.

[0077] Figure 2 shows the results of a microscopic cross-sectional analysis (10x magnification image) when the distance between the target and the substrate is 10 cm.

[0078] <Example 2: Surface Treatment and Formation of First and Second Metal Layers>

[0079] Using O2 gas on both sides of a 400㎛ thick glass material having vertical through-holes with a diameter of 87㎛ at 1.0kV and an ion dose density of 5x10 -18 dose / cm 2 Surface treatment was performed in five stages. On both sides of the surface-treated glass material, a first metal layer of 30 nm of Ti was formed, and a second metal layer of 500 nm of Cu was formed on the first metal layer through a DC sputtering process. The diameters of the Ti and Cu targets used were each 10 cm, and the distance between the target and the substrate was 15 cm.

[0080] <Experimental Example 2: Verification of Deposition Effect>

[0081] After forming the first and second metal layers of Example 2, the vertical through-hole portion was cut with a glass cutter and the cross-section was analyzed using a microscope. As a result of the analysis, there is an un-deposited region of approximately 40-50 μm in the middle of the cross-section of the through-hole in the depth direction. The results are illustrated in Fig. 3.

[0082] <Example 3: Formation of catalyst layer and third metal layer>

[0083] A Pd catalyst layer was formed on the second metal layer of Example 2 by immersing it in a hydrochloric acid-based palladium catalyst solution at 40°C for 1 minute without a pre-dip process after alkaline degreasing. Subsequently, a third metal layer with a thickness of 0.8 μm was formed on the catalyst layer by electroless plating using copper.

[0084] <Experimental Example 3: Verification of Deposition Effect>

[0085] After forming the first and second metal layers, catalyst layer, and third metal layer of Example 3, the vertical through-hole portion was cut with a glass cutter and the cross-section was analyzed under a microscope. The analysis results showed that there were no un-deposited regions in the depth direction of the cross-section of the through-hole and that a copper metal layer had been formed. The results are illustrated in Fig. 4.

[0086] <Example 4: Copper Wiring Formation and Heat Treatment>

[0087] For a glass material measuring 5x5 cm and 400 μm thick, with 4,000 through holes of 87 μm in diameter formed therein, surface treatment was performed as in Example 3, and after forming the first and second metal layers, the catalyst layer, and the third metal layer, a plating solution was prepared using the following recipe with a McDiarmid MICROFAB DVF-200 product and plating was performed under the following conditions. Subsequently, a vacuum level of 10 -2 After performing a heat treatment at 300℃ for 2 hours at a pressure below torr, it was naturally cooled.

[0088] [Plating Solution]

[0089] Cu 2+ 80g / L

[0090] MICROFAB NF ACID 952g / L

[0091] Cl - 50ppm

[0092] Accelerator 5mL / L

[0093] 1 st Suppressor 12mL / L

[0094] 2 nd Suppressor 8mL / L

[0095] [Plating Conditions]

[0096] Current density 0.3 A / cm² 2 Plating for 8 hours with air stirring at a flow rate of 0.5 L / min

[0097] <Experimental Example 4: X-ray Measurement>

[0098] X-ray measurements were taken on the glass substrate prepared in Example 4, and the results are shown in FIGS. 6 to 8.

[0099] Figure 5 is a manufactured glass substrate. Figure 6 is an X-ray result photograph of part ② of the glass substrate of Figure 5. Figure 7 is an X-ray result photograph of part ③ of the glass substrate of Figure 5. Figure 8 is an X-ray result photograph of part ⑤ of the glass substrate of Figure 5. According to the above X-ray result photographs, it can be confirmed that the copper wiring is completely filled in the through-hole.

[0100] <Example 5: Verification of Peel Strength>

[0101] For 500㎛ thick Borosilicate Glass (Eagle XG) material, O2 was used as a reaction gas on the glass surface using a linear ion beam at an input voltage of 1.0kV, a velocity of 0.5m / min, and an ion dose density of 5X10 -18 dese / cm 2 Surface treatment was carried out in five stages.

[0102] Subsequently, 30 nm of Ti was deposited as the first metal layer and 500 nm of Cu as the second metal layer. After alkaline degreasing, a Pd catalyst layer was formed by immersing the substrate in a hydrochloric acid-based palladium catalyst solution at 40°C for 1 minute without a pre-dip process. Subsequently, a third metal layer was formed to a thickness of 0.8 μm by electroless plating using copper. Then, copper wiring was formed by electroplating to a thickness of 18 μm. Afterward, heat treatment was performed at 250°C for 1 hour in an electric furnace under an Ar atmosphere, and the peel strength was verified using the 90° peel strength measurement method according to JIS C 6481. It can be seen that the glass substrate of the present invention has a high peel strength of 7.5 N / cm or higher. The results are shown in Fig. 9.

[0103] According to the method for manufacturing a glass substrate of the present invention, by forming copper wiring on the surface and through holes of a glass substrate having through holes, particularly a glass substrate having through holes with a high aspect ratio (1:4 or higher), the glass substrate can be utilized for semiconductor 2.5D and 3D PCB packaging.

Claims

1. A step of preparing a glass material with a through hole formed therein; A step of surface treating the surface of the glass material and the inner wall of the through hole; A step of forming a first metal layer on both sides of the surface-treated glass material; A step of forming a second metal layer on the first metal layer on both sides above; A step of forming a catalyst layer on the second metal layer on both sides above; A step of forming a third metal layer on the above-mentioned catalyst layers; A step of forming copper wiring on the third metal layer on both sides above; and A method for manufacturing a glass substrate having through-type copper wiring formed thereon, comprising the step of heat-treating the glass material having the copper wiring formed thereon.

2. A method for manufacturing a glass substrate having through-hole copper wiring formed thereon, wherein, in claim 1, the glass material is silicate glass, borate glass, phosphate glass, germanate glass, aluminate glass, vanadate glass, tungstate glass or molybdate glass or quartz.

3. A method for manufacturing a glass substrate having through-hole copper wiring formed thereon, wherein the through-hole comprises a vertical through-hole and / or a horizontal through-hole, and the aspect ratio, which is the ratio of the diameter of the vertical through-hole to the thickness of the glass, is 1:4 to 1:

100.

4. A method for manufacturing a glass substrate having through-type copper wiring formed thereon, wherein, in claim 1, the surface treatment is performed in 1 to 8 stages, and each surface treatment is performed by irradiating the surface of a glass material with an ion beam containing an active gas or an inert gas as a reaction gas and ionizing it using said reaction gas.

5. A method for manufacturing a glass substrate having through-hole copper wiring formed thereon, wherein, in claim 1, the first metal layer is formed from one or more metals selected from copper (Cu), nickel (Ni), chromium (Cr), titanium (Ti), zinc (Zn), aluminum (Al), zirconium (Zr), molybdenum (Mo), niobium (Nb), and ruthenium (Ru), and is formed through a process of magnetron DC sputtering, magnetron RF sputtering, evaporation with ion assisted deposition, or ion beam sputtering.

6. A method for manufacturing a glass substrate having through-type copper wiring formed thereon, characterized in that, in claim 5, the thickness of the first metal layer is 10-100 nm.

7. A method for manufacturing a glass substrate having through-hole copper wiring formed thereon, wherein, in claim 1, the second metal layer is formed by forming copper (Cu) through a process of magnetron DC sputtering, magnetron RF sputtering, evaporation with ion assisted deposition, or ion beam sputtering.

8. A method for manufacturing a glass substrate having through-hole copper wiring formed thereon, characterized in that, in claim 1, the thickness of the second metal layer is 200-700 nm.

9. A method for manufacturing a glass substrate having through-type copper wiring formed thereon, characterized in that, in claim 5, when forming the first metal layer, the distance from the metal target to the target deposition material is set to 0.4 to 2.2 times the diameter or width of the metal target.

10. A method for manufacturing a glass substrate having through-type copper wiring formed thereon, characterized in that, in claim 7, when forming the second metal layer, the distance from the metal target to the target deposition material is set to 0.4 to 2.2 times the diameter or width of the metal target.

11. A method for manufacturing a glass substrate having through-type copper wiring formed thereon, wherein the formation of the catalyst layer according to claim 1 can omit the acid cleaning process.

12. A method for manufacturing a glass substrate having through-hole copper wiring formed thereon, wherein, in claim 1, the catalyst layer comprises a catalyst selected from the group consisting of Pd, Pt, Au, Ag, Rh, Ru, Sn, Ni, Co, Cu, and combinations thereof.

13. A method for manufacturing a glass substrate having through-hole copper wiring formed thereon, wherein the third metal layer is formed by conformal copper plating through electroless copper plating.

14. In claim 1, the copper wiring is formed using an electroplating method at a current density of 0.1-0.5 mA / cm² 2 A method for manufacturing a glass substrate having through-type copper wiring formed by forming it.

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