Array substrate and display panel

Abstract

An array substrate (100) and a display panel (1000). A light-shielding electrode (40) of the array substrate (100) is located outside a pixel opening area (PD), and the light-shielding electrode (40) is configured to cooperate with a common electrode (30) so as to form at least some slits (301). The common electrode (30) comprises a plurality of first electrode lines (31) arranged in different layers from the light-shielding electrode (40), and at least one first electrode line (31) runs through the pixel opening area (PD) to form at least two slits (301) in the pixel opening area (PD) together with the light-shielding electrode (40), such that the range of a liquid crystal dark area can be reduced, and a bright area can be enlarged, thereby improving transmittance.

Description

Array substrate and display panel Technical Field

[0001] This application relates to the field of display technology, and more particularly to an array substrate and a display panel. Background Technology

[0002] With the development of display technology, Liquid Crystal Display (LCD) panels are widely used in many electronic products, such as mobile phones and tablets. As users' demands for electronic products increase, these products are increasingly developing towards higher transmittance and higher resolution. An LCD panel typically consists of an array substrate, a color filter substrate, and a liquid crystal layer sandwiched between the array substrate and the color filter substrate. With increasing resolution, more thin-film transistor devices and signal traces need to be placed on the array substrate, resulting in a smaller aperture area, which in turn affects the improvement of transmittance.

[0003] Therefore, how to achieve high transmittance while maintaining high resolution in the display panel has become an urgent problem to be solved. Invention Overview

[0004] This application provides an array substrate and a display panel to achieve both high resolution and high transmittance in the display panel.

[0005] The technical solution provided in this application is as follows:

[0006] In a first aspect, embodiments of this application provide a display panel, which includes:

[0007] Substrate;

[0008] Multiple data lines are arranged at intervals along a first direction on the substrate;

[0009] Multiple scan lines are spaced apart on the substrate along a second direction, which is different from the first direction. The multiple scan lines and multiple data lines intersect to define multiple pixel opening regions.

[0010] Multiple pixel electrodes are disposed above the substrate, and each pixel electrode is located within a pixel opening region;

[0011] A common electrode is patterned and disposed above the substrate, and the common electrode is spaced apart from the pixel electrode in the thickness direction of the array substrate;

[0012] A light-shielding electrode is patterned above the data line and / or the scan line and located outside the pixel opening area. The light-shielding electrode is configured to cooperate with the common electrode to form at least a partial slit.

[0013] The common electrode includes multiple first electrode lines disposed in a different layer from the light-shielding electrode, and at least one of the first electrode lines passes through the pixel opening area when viewed from above on the array substrate.

[0014] Secondly, embodiments of this application also provide a display panel, which includes an array substrate, the array substrate comprising:

[0015] Substrate;

[0016] Multiple data lines are arranged at intervals along a first direction on the substrate;

[0017] Multiple scan lines are spaced apart on the substrate along a second direction, which is different from the first direction. The multiple scan lines and multiple data lines intersect to define multiple pixel opening regions.

[0018] Multiple pixel electrodes are disposed above the substrate, and each pixel electrode is located within a pixel opening region;

[0019] A common electrode is patterned and disposed above the substrate, and the common electrode is spaced apart from the pixel electrode in the thickness direction of the array substrate;

[0020] A light-shielding electrode is patterned above the data line and / or the scan line and located outside the pixel opening area. The light-shielding electrode is configured to cooperate with the common electrode to form at least a partial slit.

[0021] The common electrode includes multiple first electrode lines disposed in a different layer from the light-shielding electrode, and at least one of the first electrode lines passes through the pixel opening area when viewed from above on the array substrate. Attached Figure Description

[0022] To more clearly illustrate the technical solutions in the embodiments or prior art, the drawings used in the description of the embodiments or prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0023] Figure 1 is a partial planar structure diagram of the array substrate provided in an embodiment of this application.

[0024] Figure 2 is a schematic diagram of the first planar structure of the common electrode and the light-shielding electrode provided in the embodiment of this application.

[0025] Figure 3 is a schematic diagram of the cross-sectional structure along the M-M' direction in Figure 2.

[0026] Figure 4 is a schematic diagram of the cross-sectional structure along the N-N' direction in Figure 2.

[0027] Figure 5 is a schematic diagram of a second planar structure of the common electrode and the light-shielding electrode provided in the embodiments of this application.

[0028] Figure 6 is a schematic diagram of a third planar structure of the common electrode and the light-shielding electrode provided in the embodiments of this application.

[0029] Figure 7 is a schematic diagram of the fourth planar structure of the common electrode and the light-shielding electrode provided in the embodiments of this application.

[0030] Figure 8 is a schematic diagram of the cross-sectional structure along the S-S' direction in Figure 7.

[0031] Figure 9 is a schematic diagram of the cross-sectional structure along the T-T' direction in Figure 7.

[0032] Figure 10 is a schematic diagram of the fifth planar structure of the common electrode and the light-shielding electrode provided in the embodiments of this application.

[0033] Figure 11 is a schematic diagram of the sixth planar structure of the common electrode and the light-shielding electrode provided in the embodiments of this application.

[0034] Figure 12 is a schematic diagram of a planar structure of a common electrode in related technologies.

[0035] Figure 13 is a schematic diagram of the seventh planar structure of the common electrode and the light-shielding electrode provided in the embodiments of this application.

[0036] Figure 14 is a schematic diagram of the eighth planar structure of the common electrode and the light-shielding electrode provided in the embodiments of this application.

[0037] Figure 15 is a schematic diagram of the ninth planar structure of the common electrode and the light-shielding electrode provided in the embodiments of this application.

[0038] Figure 16 is a schematic diagram of a planar structure of a common electrode provided in an embodiment of this application.

[0039] Figure 17 is a schematic diagram of the tenth planar structure of the common electrode and the light-shielding electrode provided in the embodiments of this application.

[0040] Figure 18 is a schematic diagram of the eleventh planar structure of the common electrode and the light-shielding electrode provided in the embodiments of this application.

[0041] Figure 19 is a schematic diagram of another planar structure of the common electrode provided in the embodiment of this application.

[0042] Figure 20 is a schematic diagram of the twelfth planar structure of the common electrode and the light-shielding electrode provided in the embodiments of this application.

[0043] Figure 21 is a schematic diagram of the thirteenth planar structure of the common electrode and the light-shielding electrode provided in the embodiments of this application.

[0044] Figure 22 is a partial cross-sectional structural diagram of the display panel provided in an embodiment of this application. Embodiments of the present invention

[0045] The following descriptions of the embodiments are based on the accompanying illustrations, illustrating specific embodiments in which this application can be implemented. Directional terms used in this application, such as [up], [down], [front], [back], [left], [right], [inner], [outer], [side], etc., are merely for reference to the accompanying drawings. Therefore, the directional terms used are for illustration and understanding of this application, and not for limiting this application. In the figures, structurally similar units are denoted by the same reference numerals. In the figures, the thickness of some layers and regions is exaggerated for clarity and ease of description. That is, the dimensions and thicknesses of each component shown in the figures are arbitrarily shown, but this application is not limited thereto.

[0046] Please refer to Figures 1 to 4. Figure 1 is a partial planar structure schematic diagram of the array substrate provided in an embodiment of this application. Figure 2 is a first planar structure schematic diagram of the common electrode and light-shielding electrode provided in an embodiment of this application. Figure 3 is a cross-sectional structure schematic diagram along the M-M' direction in Figure 2. Figure 4 is a cross-sectional structure schematic diagram along the N-N' direction in Figure 2. The array substrate 100 includes a substrate 10 and multiple data lines DL, multiple scan lines SL, multiple pixel electrodes 20, a common electrode 30, and a light-shielding electrode 40 disposed on the substrate 10.

[0047] Referring to Figure 1, multiple data lines DL are arranged at intervals along a first direction X on the substrate 10, and each data line DL extends along a second direction Y. Multiple scan lines SL are arranged at intervals along the second direction Y on the substrate 10, and each scan line SL extends along the first direction X. The multiple scan lines SL and the multiple data lines DL intersect to define multiple pixel aperture regions PD. A sub-pixel is disposed within each pixel aperture region PD. The second direction Y is different from the first direction X, and the angle between the first direction X and the second direction Y is greater than 0 degrees and less than or equal to 90 degrees. When the angle between the first direction X and the second direction Y is 90 degrees, the first direction X and the second direction Y are perpendicular. In this case, the first direction X can be a row direction, and the second direction Y can be a column direction.

[0048] Multiple pixel electrodes 20 are disposed on the substrate 10, each pixel electrode 20 being located within a pixel opening region PD, i.e., one pixel electrode 20 is disposed within each pixel opening region PD. Each pixel electrode 20 can be characterized as a sub-pixel. The pixel electrodes 20 of two adjacent pixel opening regions PD are spaced apart and insulated from each other. It should be noted that the pixel electrodes 20 illustrated in FIG1 are for illustrating the correspondence between the pixel electrodes 20 and the pixel opening regions PD, and do not constitute a specific limitation on the structure and position of the pixel electrodes 20. The pixel electrodes 20 of this application may also partially cover the data line DL and / or the scan line SL, and each pixel electrode 20 may also include multiple main electrodes and branch electrodes, etc., to form multiple slits on the pixel electrode 20. The slits on the pixel electrode 20 are also the hollow patterns formed on the pixel electrode 20.

[0049] Referring to Figures 1 and 2, the common electrode 30 is patterned on the substrate 10 and spaced apart from the pixel electrode 20. A horizontal electric field can be formed between the pixel electrode 20 and the common electrode 30 to drive the liquid crystal molecules to deflect. The spaced arrangement of the pixel electrode 20 and the common electrode 30 refers to their spatial correspondence along the thickness direction of the array substrate 100. For example, the common electrode 30 can be located below or above the pixel electrode 20, and the common electrode 30 and the pixel electrode 20 are insulated from each other. The thickness direction of the array substrate 100 is perpendicular to the horizontal plane of the substrate 10. The material of the common electrode 30 can be the same as that of the pixel electrode 20; for example, the pixel electrode 20 may be made of a transparent conductive material such as indium tin oxide.

[0050] This embodiment illustrates the application by taking the patterned arrangement of the common electrode 30 above the pixel electrode 20 as an example. In the thickness direction of the array substrate 100, the common electrode 30 and the pixel electrode 20 are spaced apart. A portion of the common electrode 30 is located within the pixel aperture region PD and is disposed opposite to the pixel electrode 20. The common electrode 30 located within the pixel aperture region PD forms at least two slits 301 within the corresponding pixel aperture region PD.

[0051] The light-shielding electrode 40 is patterned above the data line DL and / or the scan line SL, and located outside the pixel aperture region PD. The light-shielding electrode 40 is configured to cooperate with the common electrode 30 to form at least a partial slit 301. The common electrode 30 includes multiple first electrode lines 31 disposed on a different layer from the light-shielding electrode 40. From a top view of the array substrate 100, at least one first electrode line 31 passes through the pixel aperture region PD to form at least two slits 301 with the light-shielding electrode 40 within the pixel aperture region PD. This reduces the range of dark areas in the liquid crystal and increases the size of bright areas, thereby improving transmittance. Furthermore, by forming slits between the light-shielding electrode 40 and the common electrode 30 disposed on different layers, the morphology at the corners of the slits can be optimized, making the morphology at the corners of the slits clearer and improving the problem of local liquid crystal disorder.

[0052] Optionally, the light-shielding electrode 40 is located on the side of the pixel electrode 20 away from the substrate 10. The light-shielding electrode 40 is used to shield the data line DL and / or the scan line SL from light, preventing reflection from the data line DL and the scan line SL. The material of the light-shielding electrode 40 includes at least one of the materials with light-shielding and conductive properties, such as molybdenum and molybdenum oxide. It should be noted that in this application, the terms "above or below one structure" and "on the side of one structure away from or near the substrate 10" refer to the positional relationship determined by the order in which the structures are fabricated during the fabrication process of the array substrate 100. For example, if the light-shielding electrode 40 is located on the side of the pixel electrode 20 away from the substrate 10, it means that the pixel electrode 20 is formed on the substrate 10 first, and then the light-shielding electrode 40 is formed on the side of the pixel electrode 20 away from the substrate 10.

[0053] In one embodiment, referring to FIG2, the light-shielding electrode 40 is configured to cooperate with the common electrode 30 to form at least a portion of the slits 301. For example, the light-shielding electrode 40 and the common electrode 30 intersect to form a mesh structure, and each slit 301 is located within one mesh of the mesh structure. Each slit 301 is surrounded by the light-shielding electrode 40 and the common electrode 30, and the slit 301 is a hollow pattern formed by the light-shielding electrode 40 and the common electrode 30. Specifically, the common electrode 30 includes a plurality of first electrode lines 31 spaced apart in the first direction X. Each pixel opening region PD corresponds to at least one first electrode line 31, and each first electrode line 31 corresponding to the pixel opening region PD spans multiple pixel opening regions PD. The line shape of the first electrode line 31 includes at least one of straight line, broken line, etc. In this embodiment, the line shape of the first electrode line 31 is described as straight line.

[0054] The light-shielding electrode 40 includes multiple first light-shielding portions 41 spaced apart in the first direction X and multiple second light-shielding portions 42 spaced apart in the second direction Y. The second light-shielding portions 42 are located on the same layer as the first light-shielding portions 41 and are intersecting and connected. The first light-shielding portions 41 are configured corresponding to the data line DL, and the second light-shielding portions 42 are configured corresponding to the scan line SL. In this case, the area enclosed by the first light-shielding portions 41 and the second light-shielding portions 42 is the pixel aperture area PD. The first light-shielding portions 41 and the first electrode line 31 extend in the same direction, for example, both the first light-shielding portions 41 and the first electrode line 31 extend in the second direction Y. The first light-shielding portions 41, the second light-shielding portions 42 and the common electrode 30 intersect to form the mesh structure. Specifically, the first light-shielding portions 41, the second light-shielding portions 42 and the first electrode line 31 intersect to form the mesh structure. Each slit 301 is located within one mesh of the mesh structure. That is, each slit 301 is formed by the first light-shielding part 41, the second light-shielding part 42 and the first electrode line 31. The slit 301 is a hollow pattern formed by the first light-shielding part 41, the second light-shielding part 42 and the first electrode line 31.

[0055] Optionally, the first electrode line 31 is located in the middle region of the pixel opening region PD, so that the size of the plurality of slits 301 formed by the first light-shielding part 41, the second light-shielding part 42, and the first electrode line 31 is uniform in each pixel opening region PD. For example, when each pixel opening region PD corresponds to one first electrode line 31, the first electrode line 31 bisects each pixel opening region PD, that is, the first electrode line 31 is located on the center line of the pixel opening region PD. At this time, the two slits 301 formed by the first electrode line 31, the first light-shielding part 41, and the second light-shielding part 42 are symmetrical about the first electrode line 31.

[0056] The voltage on the light-shielding electrode 40 is the same as that on the common electrode 30. For example, the light-shielding electrode 40 can directly contact the common electrode 30 to form an electrical connection; or, an insulating layer is provided between the light-shielding electrode 40 and the common electrode 30, and an electrical connection is formed in the area outside the pixel aperture region PD; or, the light-shielding electrode 40 and the common electrode 30 are respectively connected to the same electrical signal.

[0057] In one embodiment, referring to Figures 3 and 4, the common electrode 30 is located on the side of the pixel electrode 20 away from the substrate 10, and the common electrode 30 is also located on the side of the light-shielding electrode 40 close to the pixel electrode 20, that is, the common electrode 30 is located between the light-shielding electrode 40 and the pixel electrode 20. The common electrode 30 is in direct contact with and electrically connected to the light-shielding electrode 40. The film thickness of the common electrode 30 is less than the film thickness of the light-shielding electrode 40.

[0058] The specific film structure of the array substrate 100 will be described in detail below:

[0059] Specifically, the array substrate 100 further includes a thin-film transistor 50 disposed on the substrate 10. The pixel electrode 20 is located on the side of the thin-film transistor 50 away from the substrate 10 and is electrically connected to the thin-film transistor 50. The thin-film transistor 50 includes an active layer 51 and a source electrode 52. The source electrode 52 is electrically connected to the active layer 51 and is also electrically connected to the data line DL. Optionally, the source electrode 52 and the data line DL are disposed on the same layer and can be integrally disposed. The thin-film transistor 50 also includes a gate electrode and a drain electrode. The gate electrode is electrically connected to the scan line SL. Optionally, the gate electrode and the scan line SL are disposed on the same layer and can be integrally disposed. The drain electrode is electrically connected to the active layer 51 and is also electrically connected to the pixel electrode 20.

[0060] In this application, "same-layer configuration" is used in contrast to "different-layer configuration." "Same-layer configuration" refers to a fabrication process where at least two different structures are obtained by patterning films formed from the same material. For example, in this embodiment, the source electrode 52 and the data line DL are obtained by patterning the same conductive film layer, thus the source electrode 52 and the data line DL are configured as a same layer. Conversely, "different-layer configuration" refers to a fabrication process where different film layers are obtained by patterning films formed from different materials. For example, in this application, the common electrode 30 and the light-shielding electrode 40 are obtained by patterning different conductive film layers, thus the common electrode 30 and the light-shielding electrode 40 are configured as different layers.

[0061] The array substrate 100 further includes multiple insulating layers, including a gate insulating layer 11 covering the active layer 51 and the substrate 10, a first interlayer insulating layer 12 covering the gate insulating layer 11, a passivation layer 13 covering the source electrode 52 and the first interlayer insulating layer 12, a planarization layer 14 covering the passivation layer 13, and a second interlayer insulating layer 15 covering the pixel electrode 20 and the planarization layer 14. The source electrode 52 is disposed on the first interlayer insulating layer 12, the pixel electrode 20 is disposed on the planarization layer 14, the common electrode 30 is disposed on the second interlayer insulating layer 15, and the light-shielding electrode 40 is disposed on the common electrode 30.

[0062] Optionally, the array substrate 100 further includes a color filter layer 60, which is disposed on the passivation layer 13, and the planarization layer 14 covers the color filter layer 60 and the passivation layer 13. The color filter layer 60 includes multiple color filter blocks of different colors, such as red color filter blocks, green color filter blocks, and blue color filter blocks, with each pixel aperture region PD corresponding to one color filter block.

[0063] In one embodiment, referring to Figures 1 to 5, Figure 5 is a schematic diagram of a second planar structure of the common electrode and the light-shielding electrode provided in an embodiment of this application. Referring to Figure 5, the difference from the embodiment exemplified in Figure 2 is that the light-shielding electrode 40 includes a first light-shielding portion 41 corresponding to the data line DL, but does not include a second light-shielding portion 42 corresponding to the scan line SL. The first light-shielding portion 41 and the first electrode line 31 form the slit 301. Other descriptions are as described in the above embodiments and will not be repeated here.

[0064] In one embodiment, referring to Figures 1 to 6, Figure 6 is a schematic diagram of a third planar structure of the common electrode 30 and the light-shielding electrode 40 provided in this application embodiment. Referring to Figure 6, the difference from the embodiment exemplified in Figure 2 is that the first electrode line 31 has a broken line shape, and correspondingly, the first light-shielding portion 41 also has a broken line shape. In the first direction X, the inflection point of the broken line of the first electrode line 31 and the inflection point of the broken line of the first light-shielding portion 41 coincide, and both are located on the second light-shielding portion 42. Other descriptions are as described in the above embodiments and will not be repeated here.

[0065] In one embodiment, referring to Figures 1 to 9, Figure 7 is a fourth planar structural schematic diagram of the common electrode 30 and the light-shielding electrode 40 provided in the embodiment of this application, Figure 8 is a cross-sectional structural schematic diagram along the S-S' direction in Figure 7, and Figure 9 is a cross-sectional structural schematic diagram along the T-T' direction in Figure 7. Referring to Figure 7, the embodiment exemplified in Figure 2 differs in that the common electrode 30 includes multiple first electrode lines 31 spaced apart along the first direction X and multiple second electrode lines 32 spaced apart along the second direction Y. The second electrode lines 32 are located on the same layer as the first electrode lines 31 and are intersecting and connected. Each pixel opening region PD corresponds to at least one first electrode line 31. Each first electrode line 31 corresponding to the pixel opening region PD spans multiple pixel opening regions PD. At least a portion of the second electrode lines 32 are corresponding to the scan line SL. The light-shielding electrode 40 includes multiple first light-shielding portions 41 spaced apart along the first direction X. The first light-shielding portions 41 are corresponding to the data line DL. At this time, the area enclosed by the two adjacent first light-shielding portions 41 and the two adjacent second electrode lines 32 is the pixel opening area PD.

[0066] The first light-shielding portion 41 intersects with the common electrode 30 to form the mesh structure. Specifically, the first light-shielding portion 41 intersects with the first electrode line 31 and the second electrode line 32 to form the mesh structure. Each slit 301 is located within one mesh of the mesh structure, that is, each slit 301 is surrounded by the first light-shielding portion 41, the first electrode line 31, and the second electrode line 32, and the slit 301 is a hollow pattern formed by the first light-shielding portion 41, the first electrode line 31, and the second electrode line 32.

[0067] Referring to Figures 8 and 9, the common electrode 30 is located on the side of the pixel electrode 20 away from the substrate 10, and the light-shielding electrode 40 is located on the side of the common electrode 30 closer to the pixel, that is, the light-shielding electrode 40 is located between the pixel electrode 20 and the common electrode 30. The array substrate 100 further includes a first insulating layer 16 located between the common electrode 30 and the light-shielding electrode 40. The common electrode 30 and the light-shielding electrode 40 form an electrical connection in a region outside the pixel opening region PD, or the light-shielding electrode 40 and the common electrode 30 are respectively connected to the same electrical signal so that the voltage on the common electrode 30 and the light-shielding electrode 40 is the same. Other descriptions are as described in the above embodiments and will not be repeated here.

[0068] In one embodiment, referring to Figures 1 to 10, Figure 10 is a fifth planar structural schematic diagram of the common electrode 30 and the light-shielding electrode 40 provided in this application embodiment. Referring to Figure 10, the difference from the embodiment exemplified in Figure 7 is that the first electrode line 31 is a broken line, and correspondingly, the first light-shielding portion 41 is also a broken line. In the first direction X, the inflection point of the broken line of the first electrode line 31 and the inflection point of the broken line of the first light-shielding portion 41 coincide, and both are located on the second electrode line 32. Other descriptions are as described in the above embodiments and will not be repeated here.

[0069] In one embodiment, referring to Figures 1 to 12, Figure 11 is a sixth planar structure schematic diagram of the common electrode 30 and the light-shielding electrode 40 provided in the embodiment of this application, and Figure 12 is a planar structure schematic diagram of a common electrode in the related art. Referring to Figure 11, the difference from the embodiment exemplified in Figure 2 is that the common electrode 30 includes a plurality of first electrode lines 31 arranged at intervals along the second direction Y, each pixel opening region PD corresponds to at least one first electrode line 31, and each first electrode line 31 corresponding to the pixel opening region PD spans multiple pixel opening regions PD. The light-shielding electrode 40 includes a plurality of first light-shielding portions 41 arranged at intervals along the first direction X, the first light-shielding portions 41 being disposed corresponding to the data line DL, and the first light-shielding portions 41 intersecting with the common electrode 30 to form the mesh structure.

[0070] Optionally, the common electrode 30 further includes a plurality of second electrode lines 32 spaced apart in the second direction Y. The second electrode lines 32 are configured corresponding to the scan lines and located between partially adjacent first electrode lines 31. The extension direction of the second electrode lines 32 is the same as the extension direction of the first electrode lines 31; for example, both the second electrode lines 32 and the first electrode lines 31 extend along the first direction X. Two adjacent second electrode lines 32 and two adjacent first light-shielding portions 41 form the pixel opening region PD, and the first electrode lines 31 are located within the pixel opening region PD. The line shapes of both the first electrode lines 31 and the second electrode lines 32 include at least one of straight lines and curved lines. This embodiment uses the example of both the first electrode lines 31 and the second electrode lines 32 being straight lines.

[0071] The angle between the first electrode line 31 and the first light-shielding part 41 is a first angle α, which ranges from 45° to 90°, such as 45°, 50°, 60°, 70°, 80°, 85°, 90°, etc. The first light-shielding part 41 is configured corresponding to the data line DL, such that the angle between the first electrode line 31 and the data line DL also ranges from 45° to 90°. When the angle between the first electrode line 31 and the first light-shielding part 41 is 90°, the first electrode line 31 and the first light-shielding part 41 intersect perpendicularly.

[0072] The first light-shielding portion 41 intersects with the first electrode line 31 to form the mesh structure. Each slit 301 is located within one mesh of the mesh structure. The first electrode line 31 and the first light-shielding portion 41, or the first light-shielding portion 41 and the second electrode line 32, form the slit 301.

[0073] At this time, each of the two adjacent sides of the slit 301 is formed by the light-shielding electrode 40 and the common electrode 30, so that the shape of the corner of the slit 301 is the same as the design value. For example, if the corner of the slit 301 is designed to be a right angle, then the corner of the slit 301 actually manufactured is also a right angle. In related technologies, referring to Figure 12, the slit 301' on the common electrode 30' is formed by the intersection of the first electrode line 31' and the second electrode line 32'. The area enclosed by the first electrode line 31' and the second electrode line 32' is a pixel aperture region PD'. One slit 301' corresponds to one pixel aperture region PD'. In high-resolution products, the area of ​​the pixel aperture region PD' is small. The corner of the slit 301' is designed as a right angle, but the corner of the slit 301' actually manufactured is an arc corner. That is, the slit 301' designed as a rectangle is actually elliptical. This changes the shape of the corner of the slit 301'. The change in the shape of the corner will cause a change in the direction of the local liquid crystal electric field, affecting the deflection of the liquid crystal at the four corners of the slit 301', which in turn leads to local liquid crystal disorder and affects the transmittance.

[0074] Therefore, compared to the single-layer common electrode 30' used to form the slit 301' in Figure 12, this embodiment uses a double-layer structure of the common electrode 30 and the light-shielding electrode 40 arranged in different layers to form the slit 301. This eliminates the need for a perforation design. In high-resolution products, multiple slits 301 can be formed within a relatively small pixel opening area (PD). Furthermore, the morphology at the corners of the slits 301 can be optimized, making the corners clearer, improving local liquid crystal disturbance, and increasing transmittance. Other details are provided in the above embodiment and will not be repeated here.

[0075] In one embodiment, referring to Figures 1 to 13, Figure 13 is a schematic diagram of a seventh planar structure of the common electrode 30 and the light-shielding electrode 40 provided in this application embodiment. Referring to Figure 13, the difference from the embodiment exemplified in Figure 11 is that the first electrode line 31 and the second electrode line 32 are both curved to improve the response speed of the liquid crystal. Other descriptions are as described in the above embodiments and will not be repeated here.

[0076] In one embodiment, referring to Figures 1 to 14, Figure 14 is a schematic diagram of an eighth planar structure of the common electrode 30 and the light-shielding electrode 40 provided in this application embodiment. Referring to Figure 14, the difference from the embodiment exemplified in Figure 11 is that the light-shielding electrode 40 further includes second light-shielding portions 42 spaced apart in the second direction Y, the second light-shielding portions 42 being disposed corresponding to the scan line SL. In this case, the common electrode only includes the first electrode lines 31 spaced apart in the second direction Y, and the second electrode lines 32 are not provided.

[0077] Specifically, the common electrode 30 includes multiple first electrode lines 31 spaced apart along the second direction Y. Each pixel aperture region PD corresponds to at least one first electrode line 31, and each first electrode line 31 corresponding to a pixel aperture region PD spans multiple pixel aperture regions PD. The light-shielding electrode 40 includes multiple first light-shielding portions 41 spaced apart along the first direction X and multiple second light-shielding portions 42 spaced apart along the second direction Y. The second light-shielding portions 42 are located on the same layer as the first light-shielding portions 41 and are intersectingly connected. In this case, the area enclosed by the first light-shielding portions 41 and the second light-shielding portions 42 is one pixel aperture region PD. The first light-shielding portions 41 are configured corresponding to the data line DL, and the second light-shielding portions 42 are configured corresponding to the scan line SL.

[0078] The first light-shielding portion 41, the second light-shielding portion 42, and the common electrode 30 intersect to form the mesh structure. Specifically, the first light-shielding portion 41, the second light-shielding portion 42, and the first electrode line 31 form the mesh structure, and each slit 301 corresponds to one mesh of the mesh structure. That is, each slit 301 is formed by the first light-shielding portion 41, the second light-shielding portion 42, and the first electrode line 31, or by the first light-shielding portion 41 and the first electrode line 31. Other descriptions are as described in the above embodiments and will not be repeated here.

[0079] In one embodiment, referring to Figures 1 to 15, Figure 15 is a ninth planar structural schematic diagram of the common electrode 30 and the light-shielding electrode 40 provided in this application embodiment. Referring to Figure 15, the difference from the embodiment exemplified in Figure 14 is that the first electrode line 31 is curved, and correspondingly, the second light-shielding portion 42 is also curved to improve the response speed of the liquid crystal. Other descriptions are as described in the above embodiments and will not be repeated here.

[0080] In one embodiment, referring to Figures 1 to 16, Figure 16 is a schematic planar structure of a common electrode 30 provided in an embodiment of this application. Referring to Figure 16, unlike the above embodiment, the slit 301 within each pixel opening region PD is formed separately by the common electrode 30. Each pixel opening region PD is divided into at least two domain regions, and at least one slit 301 is provided in each domain region. The slit 301 in each domain region is formed by partially hollowing out the common electrode 30 in that domain region. The common electrode 30 between two slits 301 in two adjacent domain regions is triangular, and the extension directions of the slits 301 in two adjacent domain regions are different to improve the large viewpoint color offset problem.

[0081] Specifically, taking the example of dividing each pixel aperture region PD into four domains, with one slit 301 set in each domain, the four domains are a first domain DM1, a second domain DM2, a third domain DM3, and a fourth domain DM4. A first slit 301-1 is set in the first domain DM1, a second slit 301-2 is set in the second domain DM2, a third slit 301-3 is set in the third domain DM3, and a fourth slit 301-4 is set in the fourth domain DM4. The extension direction of the first slit 301-1 is different from the extension directions of the second slit 301-2 and the fourth slit 301-4, and the extension direction of the third slit 301-3 is different from the extension directions of the second slit 301-2 and the fourth slit 301-4.

[0082] Optionally, the slits 301 in two adjacent domain regions are symmetrically arranged so that the plurality of slits 301 in each pixel opening region PD are evenly distributed, improving the uniformity of the display. Moreover, at least some of the slits 301 in two adjacent domain regions are interconnected to reduce the corners of the slits 301, thereby reducing the risk of local liquid crystal disorder caused by corner deformation of the slits 301.

[0083] The included angle between the two slits 301 in two adjacent domain regions ranges from 0° to 45° or from 135° to 180°, and the included angle between each slit 301 and the corresponding data line DL ranges from 0° to 45°, in order to further improve the large viewpoint color shift problem. Other descriptions are as described in the above embodiments and will not be repeated here.

[0084] In one embodiment, referring to Figures 1 to 17, Figure 17 is a tenth planar structure schematic diagram of the common electrode 30 and the light-shielding electrode 40 provided in an embodiment of this application. Referring to Figure 17, the difference from the embodiment exemplified in Figure 16 is that the array substrate 100 further includes a light-shielding electrode 40, which includes multiple second light-shielding portions 42 spaced apart in the second direction Y. The second light-shielding portions 42 are disposed corresponding to the scan line SL, and the second light-shielding portions 42 intersect with the common electrode 30 to form the mesh structure. The second light-shielding portions 42 cooperate with the common electrode 30 to form the slit 301, and the area enclosed by the second light-shielding portion 42 and the two slits 301 in the two adjacent domain regions is a triangular region. Thus, by setting the second light-shielding portion 42 to cooperate with the common electrode 30 to form the slit 301, the morphology at the corner of the slit 301 can be optimized, making the morphology at the corner of the slit 301 clearer and improving the problem of local liquid crystal disorder. Furthermore, due to the provision of the second light-shielding portion 42, the slits 301 within two adjacent pixel opening regions PD arranged in the second direction Y can be connected, thereby further reducing the corners of the slits 301 and thus further reducing the risk of local liquid crystal scrambling caused by corner deformation of the slits 301. Other descriptions are provided in the above embodiments and will not be repeated here.

[0085] In one embodiment, referring to Figures 1 to 18, Figure 18 is an eleventh planar structural schematic diagram of the common electrode 30 and the light-shielding electrode 40 provided in this application embodiment. Referring to Figure 18, the difference from the embodiment exemplified in Figure 5 is that each pixel aperture region PD is divided into at least two domain regions, and at least one first electrode line 31 is provided in each domain region. The first electrode lines 31 in adjacent domain regions are symmetrically arranged. The light-shielding electrode 40 includes a plurality of first light-shielding portions 41 arranged at intervals in the first direction X. The first light-shielding portions 41 are correspondingly arranged with the data line DL. The first electrode lines 31 and the first light-shielding portions 41 form a portion of the slit 301, and two adjacent first electrode lines 31 form another portion of the slit 301, so that at least two slits 301 are provided in each domain region.

[0086] Specifically, taking the example of dividing each pixel aperture region PD into four domain regions and setting two slits 301 in each domain region, the four domain regions are the first domain region DM1, the second domain region DM2, the third domain region DM3 and the fourth domain region DM4. The first domain region DM1 is provided with a first slit 301-1, the second domain region DM2 is provided with a second slit 301-2, the third domain region DM3 is provided with a third slit 301-3, and the fourth domain region DM4 is provided with a fourth slit 301-4.

[0087] Optionally, the slits 301 in two adjacent domain regions are symmetrically arranged so that the plurality of slits 301 in each pixel opening region PD are evenly distributed, improving the uniformity of the display. Moreover, at least some of the slits 301 in two adjacent domain regions are interconnected to reduce the corners of the slits 301, thereby reducing the risk of local liquid crystal disorder caused by corner deformation of the slits 301 and improving transmittance.

[0088] The included angle between two symmetrically arranged first electrode lines 31 in two adjacent domain regions is 0°~45° or 135°~180°. For example, the included angle between the first electrode line 31 in the first domain region DM1 and the first electrode line 31 in the second domain region DM2 is the second included angle b, and the included angle b is in the range of 0°~45°, such as 10°, 20°, 25°, 30°, 35°, 40°, 45°, etc.; the included angle between the first electrode line 31 in the first domain region DM1 and the first electrode line 31 in the fourth domain region DM4 is the third included angle c, and the included angle c is in the range of 135°~180°, such as 135°, 140°, 145°, 150°, 155°, 160°, 170°, etc. Correspondingly, the included angle between the two symmetrically arranged slits 301 in two adjacent domain regions ranges from 0° to 45° or from 135° to 180°, and the included angle between each slit 301 and the corresponding data line DL ranges from 0° to 45°, in order to further improve the large viewpoint color shift problem. Other descriptions are as described in the above embodiments and will not be repeated here.

[0089] In one embodiment, referring to Figures 1 to 19, Figure 19 is a schematic diagram of another planar structure of the common electrode 30 provided in an embodiment of this application. Referring to Figure 19, the difference from the embodiment exemplified in Figure 16 is that each domain region includes a plurality of slits 301. As schematically shown in Figure 19, each domain region is provided with three slits 301. The three adjacent slits 301 in each domain region extend in the same direction, and some of the slits 301 in adjacent domain regions are connected to each other to further improve the large viewpoint color offset problem. Other descriptions are as described in the above embodiments and will not be repeated here.

[0090] In one embodiment, referring to Figures 1 to 20, Figure 20 is a schematic diagram of the twelfth planar structure of the common electrode 30 and the light-shielding electrode 40 provided in the embodiments of this application. Referring to Figure 20, the difference from the embodiment exemplified in Figure 18 is that at least two first electrode lines 31 are provided in each domain region, the first electrode lines 31 in two adjacent domain regions are symmetrically arranged, and some of the first electrode lines 31 in two adjacent domain regions are interconnected. The first electrode lines 31 in each domain region extend in the same direction, thereby forming a plurality of slits 301 with the same extension direction in each domain region. At the same time, the common electrode 30 also includes a plurality of second electrode lines 32 spaced apart in the second direction Y, the second electrode lines 32 being arranged corresponding to the scan lines.

[0091] A portion of the slit is formed between the first electrode line 31 and the first light-shielding portion 41, and another portion of the slit is formed between the first electrode line 31 and the second electrode line 32. The first light-shielding portion 41 has a protrusion near the connection point of two adjacent first electrode lines 31, so that a uniform slit 301 is formed between the first light-shielding portion 41 and the first electrode line 31. Other details are as described in the above embodiment and will not be repeated here.

[0092] In one embodiment, referring to Figures 1 to 21, Figure 21 is a thirteenth planar structure schematic diagram of the common electrode 30 and the light-shielding electrode 40 provided in this application embodiment. Referring to Figure 21, the difference from the embodiment exemplified in Figure 20 is that the light-shielding electrode 40 further includes second light-shielding portions 42 spaced apart in the second direction Y, the second light-shielding portions 42 being disposed corresponding to the scan line SL. In this case, the common electrode only includes the first electrode line 31, and the second electrode line 32 is not provided.

[0093] Specifically, the light-shielding electrode 40 includes multiple first light-shielding portions 41 spaced apart in the first direction X and multiple second light-shielding portions 42 spaced apart in the second direction Y. The second light-shielding portions 42 are located on the same layer as the first light-shielding portions 41 and are intersecting and connected. The first light-shielding portions 41 are configured corresponding to the data line DL, and the second light-shielding portions 42 are configured corresponding to the scan line SL. The first light-shielding portions 41, the second light-shielding portions 42, and the common electrode 30 intersect to form the mesh structure. By setting the first light-shielding portions 41 and the second light-shielding portions 42 in conjunction with the common electrode 30 to form the slit 301, the morphology at the corner of the slit 301 can be further optimized, making the morphology at the corner of the slit 301 clearer and improving the problem of local liquid crystal disorder. Other descriptions are provided in the above embodiment and will not be repeated here.

[0094] Based on the same inventive concept, this application also provides a display panel. Please refer to Figures 1 to 22, where Figure 22 is a partial cross-sectional structural diagram of the display panel provided in this application. The display panel includes an array substrate 100 of one of the aforementioned embodiments. The display panel is a liquid crystal display panel, etc., and this embodiment uses a liquid crystal display panel as an example. Specifically, referring to Figure 22, the display panel 1000 includes a first substrate and a second substrate disposed opposite to each other, and one of the first substrate and the second substrate is an array substrate 100 of one of the aforementioned embodiments. In this embodiment, the first substrate is the array substrate 100, and the second substrate 200 is a color filter substrate. The display panel 1000 also includes liquid crystal molecules 300 sandwiched between the array substrate 100 and the second substrate 200.

[0095] As can be seen from the above embodiments:

[0096] In the array substrate and display panel provided in this application, the array substrate includes a substrate and multiple data lines, multiple scan lines, multiple pixel electrodes, and a common electrode disposed on the substrate. The multiple scan lines and multiple data lines intersect to define multiple pixel opening regions. Each pixel electrode is located within a pixel opening region. The common electrode is patterned above the pixel electrode and spaced apart from the pixel electrode. A light-shielding electrode is located outside the pixel opening region and is configured to form at least a partial slit with the common electrode. The common electrode includes multiple first electrode lines disposed on a different layer from the light-shielding electrode. At least one first electrode line passes through the pixel opening region to form at least two slits with the light-shielding electrode within the pixel opening region. This can reduce the range of dark areas in the liquid crystal and increase the size of bright areas, thereby improving transmittance. Moreover, by forming slits between the light-shielding electrode and the common electrode disposed on different layers, the morphology at the corner of the slit can be optimized, making the morphology at the corner of the slit clearer and improving the problem of local liquid crystal disorder, thereby further improving transmittance.

[0097] In the above embodiments, the descriptions of each embodiment have different focuses. For parts not described in detail in a certain embodiment, please refer to the relevant descriptions in other embodiments.

[0098] The embodiments of this application have been described in detail above. Specific examples have been used to illustrate the principles and implementation methods of this application. The description of the above embodiments is only for the purpose of helping to understand the technical solutions and core ideas of this application. Those skilled in the art should understand that they can still modify the technical solutions described in the foregoing embodiments or make equivalent substitutions for some of the technical features. These modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of this application.

Claims

1. An array substrate, comprising: Substrate; Multiple data lines are arranged at intervals along a first direction on the substrate; Multiple scan lines are spaced apart on the substrate along a second direction, which is different from the first direction. The multiple scan lines and multiple data lines intersect to define multiple pixel opening regions. Multiple pixel electrodes are disposed above the substrate, and each pixel electrode is located within a pixel opening region; as well as, A common electrode is patterned and disposed above the substrate, and the common electrode is spaced apart from the pixel electrode in the thickness direction of the array substrate; A light-shielding electrode is patterned above the data line and / or the scan line and located outside the pixel opening area. The light-shielding electrode is configured to cooperate with the common electrode to form at least a partial slit. The common electrode includes multiple first electrode lines disposed in a different layer from the light-shielding electrode, and at least one of the first electrode lines passes through the pixel opening area when viewed from above on the array substrate.

2. The array substrate according to claim 1, wherein, Multiple first electrode lines are arranged at intervals in the first direction, and each pixel opening region corresponds to at least one first electrode line; The light-shielding electrode includes a plurality of first light-shielding portions arranged at intervals in the first direction. The first light-shielding portions are correspondingly disposed to the data line, and the first light-shielding portions and the first electrode lines form the slit.

3. The array substrate according to claim 2, wherein, The first electrode line extends in the same direction as the first light-shielding portion, and the shape of the first electrode line includes at least one of a straight line and a broken line.

4. The array substrate according to claim 1, wherein, Multiple first electrode lines are arranged at intervals in the second direction, and each pixel opening region corresponds to at least one first electrode line; The light-shielding electrode includes a plurality of first light-shielding portions arranged at intervals in the first direction. The first light-shielding portions are correspondingly disposed to the data line, and the first light-shielding portions and the first electrode lines form the slit.

5. The array substrate according to claim 4, wherein, The shape of the first electrode line includes at least one of straight line and curved line.

6. The array substrate according to claim 4, wherein, The angle between the first electrode line and the first light-shielding part is in the range of 45° to 90°.

7. The array substrate according to claim 1, wherein, Each pixel opening region is divided into at least two domain regions, and at least one first electrode line is provided in each domain region. The first electrode lines in two adjacent domain regions are symmetrically arranged. The light-shielding electrode includes a plurality of first light-shielding portions arranged at intervals in the first direction. The first light-shielding portions are correspondingly disposed to the data line, and the first light-shielding portions and the first electrode lines form the slit.

8. The array substrate according to claim 7, wherein, The included angle between the two first electrode lines symmetrically arranged in two adjacent domain regions is 0°~45° or 135°~180°.

9. The array substrate according to any one of claims 2 to 8, wherein, The light-shielding electrode further includes a plurality of second light-shielding portions arranged at intervals in the second direction, the second light-shielding portions being arranged corresponding to the scan lines.

10. The array substrate according to any one of claims 2 to 8, wherein, The common electrode also includes a plurality of second electrode lines arranged at intervals in the second direction, the second electrode lines being configured corresponding to the scan lines.

11. The array substrate according to any one of claims 1 to 8, wherein, Both the common electrode and the light-shielding electrode are located on the side of the pixel electrode away from the substrate, and the common electrode is in direct contact with and electrically connected to the light-shielding electrode.

12. The array substrate according to any one of claims 1 to 8, wherein, The common electrode is located on the side of the pixel electrode away from the substrate, and the array substrate further includes a first insulating layer located between the common electrode and the light-shielding electrode. The voltage on the common electrode and the light-shielding electrode is the same.

13. The array substrate according to any one of claims 1 to 8, wherein, The material of the common electrode is the same as that of the pixel electrode, the material of the pixel electrode includes indium tin oxide, and the material of the light-shielding electrode includes at least one of molybdenum and molybdenum oxide.

14. A display panel comprising an array substrate, the array substrate comprising: Substrate; Multiple data lines are arranged at intervals along a first direction on the substrate; Multiple scan lines are spaced apart on the substrate along a second direction, which is different from the first direction. The multiple scan lines and multiple data lines intersect to define multiple pixel opening regions. Multiple pixel electrodes are disposed above the substrate, and each pixel electrode is located within a pixel opening region; as well as, A common electrode is patterned and disposed above the substrate, and the common electrode is spaced apart from the pixel electrode in the thickness direction of the array substrate; A light-shielding electrode is patterned above the data line and / or the scan line and located outside the pixel opening area. The light-shielding electrode is configured to cooperate with the common electrode to form at least a partial slit. The common electrode includes multiple first electrode lines disposed in a different layer from the light-shielding electrode, and at least one of the first electrode lines passes through the pixel opening area when viewed from above on the array substrate.

15. The display panel according to claim 14, wherein, Multiple first electrode lines are arranged at intervals in the first direction, and each pixel opening region corresponds to at least one first electrode line; The light-shielding electrode includes a plurality of first light-shielding portions arranged at intervals in the first direction. The first light-shielding portions are correspondingly disposed to the data line, and the first light-shielding portions and the first electrode lines form the slit.

16. The display panel according to claim 14, wherein, Multiple first electrode lines are arranged at intervals in the second direction, and each pixel opening region corresponds to at least one first electrode line; The light-shielding electrode includes a plurality of first light-shielding portions arranged at intervals in the first direction. The first light-shielding portions are correspondingly disposed to the data line, and the first light-shielding portions and the first electrode lines form the slit.

17. The display panel according to claim 14, wherein, Each pixel opening region is divided into at least two domain regions, and at least one first electrode line is provided in each domain region. The first electrode lines in two adjacent domain regions are symmetrically arranged. The light-shielding electrode includes a plurality of first light-shielding portions arranged at intervals in the first direction. The first light-shielding portions are correspondingly disposed to the data line, and the first light-shielding portions and the first electrode lines form the slit.

18. The display panel according to any one of claims 15 to 17, wherein, The light-shielding electrode further includes a plurality of second light-shielding portions arranged at intervals in the second direction, the second light-shielding portions being arranged corresponding to the scan lines.

19. The display panel according to any one of claims 14 to 17, wherein, Both the common electrode and the light-shielding electrode are located on the side of the pixel electrode away from the substrate, and the common electrode is in direct contact with and electrically connected to the light-shielding electrode.

20. The display panel according to any one of claims 14 to 17, wherein, The common electrode is located on the side of the pixel electrode away from the substrate, and the array substrate further includes a first insulating layer located between the common electrode and the light-shielding electrode. The voltage on the common electrode and the light-shielding electrode is the same.

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