Preparation method for semiconductor substrate, and solar cell
By treating the silicon wafer surface with metal chemical etching and acid etching processes, the problem of line marks was solved, a semiconductor substrate with high flatness was achieved, and the light reflectivity and conversion efficiency of solar cells were improved.
Patent Information
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- ANHUI HUASUN ENERGY CO LTD
- Filing Date
- 2025-10-27
- Publication Date
- 2026-05-07
AI Technical Summary
Existing technologies struggle to effectively remove line marks from silicon wafer surfaces, resulting in excessive step height differences that affect the grid line printing quality and light reflectivity of the cells, thereby impacting the cell's conversion efficiency.
The silicon wafer surface is treated with metal chemical etching and acid etching processes, combined with alkaline etching and polishing. The etching rate is accelerated by metal catalytic reaction. The surface is modified with hydrofluoric acid and strong oxidant surface modification solution to control the step height difference within 0.15μm.
It significantly reduces the number of lines on the silicon wafer surface, improves surface flatness, enhances the reflectivity of the silicon wafer, and improves the light absorption efficiency and battery performance of solar cells.
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Figure CN2025130310_07052026_PF_FP_ABST
Abstract
Description
Semiconductor substrate fabrication methods and solar cells
[0001] Cross-reference to related applications
[0002] This application claims priority to Chinese patent application No. 202411522993.9, filed on October 29, 2024, the entire contents of which are incorporated herein by reference. Technical Field
[0003] This invention relates to a method for preparing a semiconductor substrate and a solar cell, belonging to the field of crystalline silicon processing technology. Background Technology
[0004] In the semiconductor and solar photovoltaic industries, dicing silicon rods into wafers is a crucial process, as the quality of the wafers directly impacts subsequent manufacturing and processing. Line marks left on the wafer surface after dicing are a significant factor affecting surface quality. Even after deposition processes such as transparent conductive films, the step height difference caused by these line marks can still affect the grid line printing quality, leading to grid breakage. Furthermore, line marks can also affect passivation performance, increasing the cell's load. Additionally, the back of solar cells typically uses a polished surface to improve long-wave absorption. The flatness of this polished surface affects light reflection, and the presence of line marks reduces the reflectivity of the polished back surface, thus impacting the cell's conversion efficiency.
[0005] Currently, the semiconductor industry has high requirements for the surface quality of silicon wafers. The main method for removing line marks is chemical polishing, but this method requires specialized equipment and polishing slurry, making it costly. The silicon wafers used in the photovoltaic industry are very thin, and chemical polishing would cause excessive loss to the already thin wafers, leading to defects. Currently, the photovoltaic industry generally uses high-concentration alkaline solutions for isotropic polishing to improve the surface quality of silicon wafers, but this method cannot completely eliminate line marks; wafers treated with this method still have a step height difference of 2-4 micrometers.
[0006] Therefore, how to prepare a semiconductor substrate with high surface flatness is an urgent problem to be solved. Summary of the Invention
[0007] To address the aforementioned deficiencies, this invention provides a method for preparing a semiconductor substrate and a solar cell. After processing the diced silicon wafer using this method, the weight of the silicon wafer does not decrease significantly, and the step height difference at the line marks on the silicon wafer surface does not exceed 0.15 μm, thus significantly eliminating the line marks on the silicon wafer surface. Furthermore, this method has a simple preparation process and is easy to mass-produce.
[0008] The present invention provides a semiconductor substrate, which is prepared by the above-described method for preparing a semiconductor substrate. The semiconductor substrate has a high surface flatness, which can meet the needs of the photovoltaic industry, which has high requirements for the flatness of silicon wafers.
[0009] This invention provides a solar cell comprising a semiconductor substrate as described above as a back reflective layer, or a texturing process using the semiconductor substrate as described above. The back reflective layer of the silicon wafer in this solar cell has a high reflectivity, which can reflect unabsorbed light back to the active layer, thereby improving light absorption efficiency and thus enhancing the performance of the solar cell. Texturing using the semiconductor substrate as described above can provide a more uniform texture, thereby improving the efficiency of the solar cell.
[0010] One aspect of the present invention provides a method for preparing a semiconductor substrate, the method comprising the following steps:
[0011] Step 1) Perform metal chemical etching and metal particle cleaning on the pretreated silicon wafer to obtain a semi-finished silicon wafer;
[0012] Step 2) The semi-finished silicon wafer is subjected to a primary surface modification treatment using a primary surface modification solution to obtain a primary silicon wafer; the primary surface modification solution includes hydrofluoric acid and a strong oxidizing agent;
[0013] Step 3) The primary silicon wafer is subjected to secondary surface modification treatment using a secondary surface modification liquid to obtain the semiconductor substrate; the secondary surface modification liquid includes an alkaline solution; the step height difference at the line marks on the surface of the semiconductor substrate does not exceed 0.15 μm.
[0014] The preparation method described above, wherein the metal chemical etching process includes:
[0015] The pretreated silicon wafer is immersed in a first metal chemical etching solution containing metal salt, first oxidant and hydrofluoric acid at 25-50°C for 20-240 seconds to obtain an intermediate silicon wafer.
[0016] In the preparation method described above, the metal salt is a salt containing ions of at least one metal selected from Pt, Au, Ag, Cu, and Ni; and the molar concentration of the metal salt in the first metal chemical etching solution is 0.5–10 M; and / or,
[0017] The first oxidant is at least one selected from H₂O₂, HNO₃, and KMnO₄, and the molar concentration of the first oxidant in the first metal chemical etching solution is 5–20 M; and / or,
[0018] In the first metal chemical etching solution, the molar concentration of hydrofluoric acid is 1 to 10 M.
[0019] The preparation method described above, wherein the metal chemical etching process includes:
[0020] The pretreated silicon wafer is subjected to metal deposition to obtain a metal-attached silicon wafer, wherein the thickness of the attached metal layer in the metal-attached silicon wafer is 1 to 10 nm.
[0021] The silicon wafer with attached metal is immersed in a second metal chemical etching solution containing hydrofluoric acid and a second oxidant at 25–50°C for 20–240 seconds to obtain an intermediate silicon wafer.
[0022] In the preparation method described above, the attached metal layer is an attached metal layer obtained by metal deposition of at least one metal selected from Pt, Au, Ag, Cu, and Ni; and / or,
[0023] In the second metal chemical etching solution, the molar concentration of the hydrofluoric acid is 1–10 M; and / or,
[0024] The second oxidant is at least one of H2O2, HNO3, and KMnO4, and the molar concentration of the second oxidant in the second metal chemical etching solution is 1 to 20 M.
[0025] The preparation method described above includes the following steps: immersing the intermediate silicon wafer in a metal cleaning agent at 20–25°C for 3–10 minutes to obtain the semi-finished silicon wafer.
[0026] in,
[0027] The metal cleaning agent comprises a mixed solution of HCl, H2O2, and H2O, wherein the molar concentration ratio of HCl, H2O2, and H2O in the mixed solution is (1–3):(1–3):(3–8); or,
[0028] The metal cleaning agent includes nitric acid, wherein the nitric acid has a mass fraction of 30–50 wt%; or,
[0029] The metal cleaning agent includes aqua regia; or,
[0030] The metal cleaning agent includes ammonia water, wherein the mass fraction of the ammonia water is 5-25 wt%.
[0031] In the preparation method described above, the molar concentration of hydrofluoric acid in the primary surface modification solution is 0.1–5 M; and / or,
[0032] The strong oxidant in the primary surface modification solution is at least one selected from nitric acid, concentrated sulfuric acid, and KMnO4; the concentration of the strong oxidant in the primary surface modification solution is 0.1–5 M; and / or,
[0033] The surface modification treatment is performed at a temperature of 20–30°C for 30–120 seconds.
[0034] The preparation method described above, wherein the alkali in the alkaline solution includes at least one selected from KOH, NaOH, and tetramethylammonium hydroxide, and the mass fraction of the alkaline solution is 5-30 wt%; and / or,
[0035] The secondary surface modification treatment is carried out at a temperature of 45–60°C for 10–60 seconds.
[0036] The preparation method described above further includes: after step 3), cleaning the semiconductor substrate, wherein the cleaning process includes cleaning with a mixed solution of alkali and hydrogen peroxide, cleaning with a mixed solution of hydrochloric acid and hydrogen peroxide, and cleaning the semiconductor substrate with hydrofluoric acid.
[0037] or,
[0038] The preparation method further includes: after step 3), texturing the semiconductor substrate.
[0039] The present invention also provides a solar cell comprising a semiconductor substrate as described above or a semiconductor substrate prepared by the preparation method described above;
[0040] An intrinsic passivation layer, a doped layer, a transparent conductive layer, and a metal electrode are deposited sequentially on both sides of the substrate.
[0041] In the solar cell described above, one side of the semiconductor substrate has a textured surface, and the other side has a polished surface.
[0042] The semiconductor substrate fabrication method provided by this invention is based on metal chemical catalytic reaction for etching the surface of a rough silicon wafer, combined with acid etching and alkaline etching processes for polishing the rough surface. When using this method to process a rough silicon wafer, the metal chemical etching solution can react rapidly with the damaged areas of the silicon wafer, accelerating the etching rate and thus quickly removing line marks. The silicon wafer is immersed in the metal chemical etching solution for a short time, thus reducing the step height difference without excessive etching of the remaining parts of the wafer. Therefore, the weight of the silicon wafer is not significantly reduced, and the step height difference at the line marks on the silicon wafer surface does not exceed 0.15 μm. The line marks are significantly eliminated, meeting the damage removal requirements of thin silicon wafers in the solar photovoltaic industry. The reflectivity of the semiconductor substrate surface prepared using the semiconductor substrate fabrication method provided by this invention is greatly improved, and the fabrication process is simple and easy to mass-produce. Attached Figure Description
[0043] Figure 1 is a process flow diagram of an embodiment of the present invention;
[0044] Figure 2 shows the morphology of the semiconductor substrate provided in Embodiment 1 of the present invention;
[0045] Figure 3 shows the morphology of the silicon wafer of Comparative Example 4 after rough polishing by the BL process. Detailed Implementation
[0046] To make the objectives, technical solutions, and advantages of this invention clearer, the technical solutions in the embodiments of this invention will be clearly and completely described below in conjunction with the embodiments of this invention. Obviously, the described embodiments are only some embodiments of this invention, not all embodiments. Based on the embodiments of this invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this invention.
[0047] As shown in Figure 1, a first aspect of the present invention provides a method for preparing a semiconductor substrate, comprising the following steps:
[0048] Step 1) Perform metal chemical etching and metal particle cleaning on the pretreated silicon wafer to obtain a semi-finished silicon wafer;
[0049] Step 2) The semi-finished silicon wafer is subjected to a primary surface modification treatment using a primary surface modification solution to obtain a primary silicon wafer; the primary surface modification solution includes hydrofluoric acid and a strong oxidizing agent;
[0050] Step 3) The primary silicon wafer is subjected to secondary surface modification treatment using a secondary surface modification liquid to obtain the semiconductor substrate; the secondary surface modification liquid includes an alkaline solution; the step height difference at the line marks on the surface of the semiconductor substrate does not exceed 0.15 μm.
[0051] In step 1), the present invention does not limit the pretreatment method, as long as it can remove impurities from the silicon wafer surface. For example, a mixed solution of alkali and hydrogen peroxide can be used for cleaning. The alkali can be potassium hydroxide and / or sodium hydroxide. In the mixed solution, the mass fraction of alkali can be 1-10 wt%, and the mass fraction of hydrogen peroxide can be 0.5-10 wt%.
[0052] The pretreatment temperature can be 50–80℃, and the pretreatment time can be 2–4 minutes. By pretreating the silicon wafer, impurities such as oil stains on the surface of the silicon wafer can be removed, which is beneficial to the contact reaction between the reagents and the silicon wafer in the subsequent metal chemical etching process, thereby improving the reaction efficiency of the subsequent metal chemical etching process.
[0053] The metal chemical etching process in this invention utilizes metal chemical catalysis to etch the surface of silicon wafers. Metal chemical catalysis refers to the process of using metals or metal compounds as catalysts to accelerate chemical reactions. The surface of a metal catalyst has multiple active sites, where reactant molecules can be adsorbed and undergo chemical changes; metal catalysts can also significantly increase the reaction rate by lowering the activation energy required for the reaction.
[0054] This invention utilizes a metal-chemical catalytic reaction in the metal-chemical etching process to etch silicon wafers. This provides more active sites for the reactants in the metal-chemical etching process, accelerating the etching of the silicon wafer surface and facilitating the rapid removal of traces. The step height difference at the traces on the obtained semiconductor substrate surface does not exceed 0.15 μm, and the metal-chemical etching process significantly reduces the time consumed by the etching reaction. The short immersion time of the silicon wafer in the metal-chemical etching solution can significantly reduce the step height difference without excessive etching of other parts of the silicon wafer, thus without a significant decrease in the weight of the silicon wafer. Therefore, the semiconductor substrate preparation method of this invention is beneficial for efficient silicon wafer polishing, suitable for processing thinner silicon wafers, and can be applied to large-scale industrial production, reducing industrial costs.
[0055] In this invention, the step height difference at the line marks on the surface of the semiconductor substrate is calculated as an average value. For example, 50 line marks are randomly selected, the step height difference is tested, and the average value is calculated.
[0056] In addition, metal particle cleaning can remove residual metal particles without obscuring the silicon wafer surface that needs to undergo a subsequent surface modification process, which helps to improve the reaction rate of the subsequent surface modification process.
[0057] In step 2), the primary surface modification solution is a mixed solution of hydrofluoric acid and a strong oxidant.
[0058] When a surface treatment solution contains a strong oxidizing agent, the agent can convert elemental silicon in the wafer into oxides, which are easier to remove in subsequent processes. Furthermore, the strong oxidizing agent can accelerate the etching rate, further improving the flatness of the wafer surface.
[0059] When the primary surface modification solution contains hydrofluoric acid, the hydrofluoric acid can remove unnecessary oxide layers or expose a clean silicon surface, which is beneficial for the contact between the primary surface modification solution and the silicon substrate, further improving the efficiency of the primary surface modification process. Using a primary surface modification solution to perform a primary surface modification process on a semi-finished silicon wafer can further reduce the step difference of the line marks.
[0060] In step 3), the secondary surface modification solution is an alkaline solution. In this invention, the alkaline solution is used to perform secondary surface modification on the primary silicon wafer, which can further polish the primary silicon wafer to obtain a semiconductor substrate with high reflectivity.
[0061] In one specific embodiment, the metal chemical etching process includes:
[0062] The pretreated silicon wafer is immersed in a first metal chemical etching solution containing a metal salt, a first oxidant, and hydrofluoric acid at a temperature of 25–50°C for 20–240 seconds to obtain an intermediate silicon wafer. The immersion process is performed at a temperature of 25–50°C, including but not limited to 25°C, 30°C, 35°C, 40°C, 45°C, 50°C, or any combination thereof. The immersion time is 20–240 seconds, for example, including but not limited to 20 seconds, 80 seconds, 120 seconds, 160 seconds, 200 seconds, 240 seconds, or any combination thereof.
[0063] This invention uses a first metal chemical etching solution containing metal salt, a first oxidant, and hydrofluoric acid to etch silicon wafers. The metal salt acts as a catalyst, effectively promoting the etching rate on the silicon wafer surface and facilitating surface planarization. Controlling the immersion time and temperature of the silicon wafer within the aforementioned range helps control the degree of etching and reduces the step height difference at the line marks on the silicon wafer surface.
[0064] In one specific embodiment, the metal salt in the first metal chemical etching solution is a salt containing ions of at least one metal selected from Pt, Au, Ag, Cu, and Ni. The metal salt is selected from salts containing at least one of Pt, Au, Ag, Cu, and Ni ions. In the first metal chemical etching solution, the molar concentration of the metal salt is 0.5–10 M. For example, the metal salt may contain only one metal ion as described above, or it may contain two or more metal ions as described above. The molar concentration of the metal salt includes, but is not limited to, a range of 0.5 M, 1 M, 3 M, 5 M, 7 M, 9 M, 10 M, or any combination thereof.
[0065] This invention does not limit the type of acid radical ion in the metal salt. For example, the acid radical ion in the metal salt can be at least one of chloride ion, sulfate ion, nitrate ion, and carbonate ion.
[0066] This invention effectively catalyzes the etching reaction of silicon wafers by using the aforementioned metal salts. Furthermore, the use of these metal salts does not damage the silicon wafer, and the metal particles can be removed in subsequent steps without causing new contamination on the wafer. Controlling the metal salt concentration within the aforementioned range effectively increases the reaction rate of the metal chemical etching process, which is beneficial for rapidly reducing the step height difference at the line marks on the silicon wafer surface.
[0067] In another embodiment, the first oxidant in the first metal chemical etching solution includes at least one of H2O2, HNO3, and KMnO4, preferably at least one of H2O2, HNO3, and KMnO4. The molar concentration of the first oxidant in the first metal chemical etching solution is 5–20 M. For example, the molar concentration of the first oxidant includes, but is not limited to, a range of 5 M, 10 M, 15 M, 20 M, or any combination thereof. Using the above-mentioned types of first oxidants and controlling the concentration of the first oxidant within the above range is beneficial for converting elemental silicon in the silicon wafer into oxides during the metal chemical etching process, thereby accelerating the etching rate.
[0068] In another embodiment, the molar concentration of hydrofluoric acid in the first metal chemical etching solution is 1 to 10 M. For example, the molar concentration of hydrofluoric acid includes, but is not limited to, a range of 1 M, 3 M, 5 M, 7 M, 9 M, 10 M, or any combination thereof. Using hydrofluoric acid and controlling its concentration within the above range is beneficial for removing unnecessary oxide layers or exposing a clean silicon surface during the metal chemical etching process, thereby making the silicon wafer surface flatter.
[0069] In another embodiment, the molar ratio of the metal salt, the first oxidant, and hydrofluoric acid in the first metal chemical etching solution is 1:(0.5-20):(0.1-10).
[0070] In one specific embodiment, the metal chemical etching process includes:
[0071] The pretreated silicon wafer is subjected to metal deposition to obtain a metal-attached silicon wafer, wherein the thickness of the attached metal layer in the metal-attached silicon wafer is 1 to 10 nm.
[0072] The silicon wafer with attached metal is immersed in a second metal chemical etching solution containing hydrofluoric acid and a second oxidant at 25–50°C for 20–240 seconds to obtain an intermediate silicon wafer.
[0073] This invention does not limit the method of metal deposition, as long as an attached metal layer with a thickness of 1 to 10 nm can be obtained. For example, physical methods such as sputtering deposition and evaporation deposition can be used to prepare the attached metal layer; chemical methods can also be used for deposition.
[0074] The thickness of the attached metal layer is 1–10 nm. For example, the thickness of the attached metal layer includes, but is not limited to, a range of 1 nm, 3 nm, 5 nm, 7 nm, 9 nm, 10 nm, or any combination thereof. The "thickness of the attached metal layer" is an average value; for example, 20 points on the attached metal layer are randomly selected for thickness testing, and the average value is calculated. Preparing an attached metal layer with the above-mentioned thickness facilitates the use of a second metal chemical etching solution containing hydrofluoric acid and a second oxidant to catalytically etch the pretreated silicon wafer using the attached metal layer as a medium, achieving better polishing results. Furthermore, controlling the thickness of the attached metal layer within the above-mentioned range also helps to further control industrial costs.
[0075] The temperature for the metal chemical etching process is between 25 and 50°C, for example, including but not limited to 25°C, 30°C, 35°C, 40°C, 45°C, 50°C, or any combination thereof. The immersion time of the metal-coated silicon wafer in a second metal chemical etching solution containing hydrofluoric acid and a second oxidant is between 20 and 240 seconds, for example, including but not limited to 20 seconds, 80 seconds, 120 seconds, 160 seconds, 200 seconds, 240 seconds, or any combination thereof.
[0076] Controlling the temperature and time of the metal chemical etching process within the above range is beneficial for controlling the degree of silicon wafer etching, which in turn helps to obtain silicon wafers with a smooth surface.
[0077] In one specific embodiment, the attached metal layer is an attached metal layer obtained by metal deposition of at least one metal selected from Pt, Au, Ag, Cu, and Ni. For example, one metal as described above can be used for metal deposition, or two or more metals as described above can be used for metal deposition.
[0078] The attached metal layer can be prepared using physical methods. When prepared using physical methods, the resulting attached metal layer has a denser structure and better uniformity. One or more of the above metals can be deposited using appropriate physical deposition methods as needed.
[0079] The attached metal layer can also be prepared using a chemical method. In this method, a metal deposition treatment solution containing a metal salt and HF is used to deposit the metal layer. The metal salt contains at least one of Pt, Au, Ag, Cu, and Ni. In the metal deposition treatment solution, the molar concentration of HF is 1–10 M, and the molar concentration of the metal salt is 0.5–10 M. The metal deposition treatment can be carried out at room temperature for 20–120 s.
[0080] In another embodiment, the molar concentration of hydrofluoric acid in the second metal chemical etching solution is 1 to 10 M. For example, the molar concentration of hydrofluoric acid includes, but is not limited to, a range of 1 M, 3 M, 5 M, 7 M, 9 M, 10 M, or any two of these.
[0081] In another embodiment, the second oxidant in the second metal chemical etching solution includes at least one of H2O2, HNO3, and KMnO4, preferably at least one of H2O2, HNO3, and KMnO4. For example, the second oxidant can be any one of H2O2, HNO3, and KMnO4, or a mixed solution of two or more of the oxidants described above can be used for metal chemical etching. The molar concentration of the second oxidant in the second metal chemical etching solution is 1 to 20 M. For example, the molar concentration of the second oxidant includes, but is not limited to, a range of 1 M, 5 M, 10 M, 15 M, 20 M, or any combination thereof.
[0082] In another embodiment, the molar ratio of hydrofluoric acid to the second oxidant in the second metal chemical etching solution is 1:(0.5-10).
[0083] In one specific embodiment, the metal particle cleaning process includes: immersing an intermediate silicon wafer in a metal cleaning agent at 20–25°C for 3–10 minutes to obtain a semi-finished silicon wafer. For example, the processing temperature for the metal particle cleaning process includes, but is not limited to, 20°C, 23°C, 25°C, or any combination thereof. The processing time for the metal particle cleaning process includes, but is not limited to, 3 minutes, 5 minutes, 7 minutes, 9 minutes, 10 minutes, or any combination thereof.
[0084] For example, the metal cleaning agent comprises a mixed solution of HCl, H2O2, and H2O, wherein the molar concentration ratio of HCl, H2O2, and H2O in the mixed solution is (1–3):(1–3):(3–8). For instance, the molar concentration ratio includes, but is not limited to, 1:1:3, 2:2:5, 3:3:7, 3:3:8, or any combination thereof.
[0085] For example, the metal cleaning agent includes nitric acid, with a mass concentration of 30 to 50 wt%. For instance, the mass concentration of nitric acid includes, but is not limited to, a range of 30 wt%, 35 wt%, 40 wt%, 45 wt%, 50 wt%, or any combination thereof.
[0086] For example, metal cleaning agents include aqua regia.
[0087] For example, the metal cleaning agent includes ammonia water with a mass concentration of 5 to 25 wt%. For instance, the mass concentration of ammonia water includes, but is not limited to, a range of 5 wt%, 10 wt%, 15 wt%, 20 wt%, 25 wt%, or any combination thereof.
[0088] Using the aforementioned metal cleaning agent to clean metal particles, and controlling the temperature and time of the metal particle cleaning process within the above-mentioned range, can effectively remove residual metal particles from the silicon wafer surface without damaging the silicon wafer. This facilitates good contact between the reagent and the silicon wafer in subsequent steps, and thus promotes the planarization of the silicon wafer.
[0089] In one specific embodiment, the molar concentration of hydrofluoric acid in the primary surface modification solution is 0.1–5 M. For example, the molar concentration of hydrofluoric acid includes, but is not limited to, a range of 0.1 M, 1 M, 2 M, 3 M, 4 M, 5 M, or any combination thereof. The presence of hydrofluoric acid in the primary surface modification solution facilitates further removal of impurities from the silicon wafer surface, resulting in a silicon wafer with a smoother surface.
[0090] In another embodiment, the strong oxidant in the primary surface modification solution includes at least one of nitric acid, concentrated sulfuric acid, and KMnO4; preferably, at least one of nitric acid, concentrated sulfuric acid, and KMnO4. For example, the strong oxidant can be one, two, or more of nitric acid, concentrated sulfuric acid, and KMnO4. The molar concentration of the strong oxidant in the primary surface modification solution is 0.1–5 M. For example, the molar concentration of the strong oxidant includes, but is not limited to, 0.1 M, 1 M, 2 M, 3 M, 4 M, 5 M, or any combination thereof. The presence of a strong oxidant in the primary surface modification solution allows for further modification of uneven areas on the silicon wafer, resulting in a smoother silicon wafer surface.
[0091] In another embodiment, the processing temperature for a single surface modification treatment is 20–30°C, for example, including but not limited to a range of 20°C, 25°C, 30°C, or any combination thereof. The processing time is 30–120 seconds, for example, including but not limited to a range of 30 seconds, 50 seconds, 80 seconds, 120 seconds, or any combination thereof.
[0092] In another embodiment, the alkali in the alkaline solution includes at least one of KOH, NaOH, and tetramethylammonium hydroxide (TMAH), and the mass fraction of the alkaline solution is 5-30 wt%. For example, the alkaline solution can be prepared using one of the alkalis described above, or it can be prepared using two or more of the alkalis described above. The mass fraction of the alkaline solution is 5-30 wt%, for example, including but not limited to 5 wt%, 10 wt%, 15 wt%, 20 wt%, 25 wt%, 30 wt%, or any combination thereof. The alkaline solution of the above concentration, as a secondary surface modification solution, can selectively etch away surface irregularities, thereby making the surface smoother.
[0093] In another embodiment, the secondary surface modification treatment is carried out at a temperature of 45 to 60°C and for a time of 10 to 60 seconds. For example, the secondary surface modification treatment temperature includes, but is not limited to, a range of 45°C, 50°C, 55°C, 60°C or any combination thereof; the secondary surface modification treatment time includes, but is not limited to, a range of 10 seconds, 20 seconds, 30 seconds, 40 seconds, 50 seconds, 60 seconds or any combination thereof.
[0094] By performing primary and secondary surface modification treatments on semi-finished silicon wafers and controlling the processing time and temperature, the surface flatness of the semi-finished silicon wafers can be further improved, resulting in a semiconductor substrate with high surface flatness.
[0095] In one specific embodiment, the preparation method further includes: after step 3), cleaning the semiconductor substrate, wherein the cleaning process includes cleaning the semiconductor substrate sequentially with a mixed solution of alkali and hydrogen peroxide, a mixed solution of hydrochloric acid and hydrogen peroxide, and a hydrofluoric acid solution.
[0096] This invention does not limit the cleaning process; it can be a standard RCA cleaning procedure or any other cleaning method, as long as it can remove impurities from the surface of the semiconductor substrate. For example, it can first be cleaned at 50-80°C for 2-4 minutes using a mixed solution of 1-15 wt% alkali and 1-15 wt% hydrogen peroxide; then cleaned at 50-80°C for 2-4 minutes using a mixed solution of 1-15 wt% hydrochloric acid and 1-15 wt% hydrogen peroxide; finally, it can be immersed in 25°C for 2-4 minutes using 8-15 wt% hydrofluoric acid to remove the oxide layer on the silicon wafer surface, thus obtaining a clean semiconductor substrate.
[0097] In another embodiment, the preparation method further includes: after step 3), texturing the semiconductor substrate.
[0098] This invention does not impose any specific limitations on the method of flocking; the flocking method can be selected according to actual needs.
[0099] The present invention also provides a solar photovoltaic cell, comprising a semiconductor substrate prepared by the above-described preparation method;
[0100] An intrinsic passivation layer, a doped layer, a transparent conductive layer, and a metal electrode (optional) are deposited sequentially on both sides of the substrate.
[0101] In one embodiment, one side of the semiconductor substrate is textured and the other side is polished, with the polished side being suitable as a backlight surface.
[0102] The intrinsic passivation layer can be prepared by chemical vapor deposition or physical deposition using at least one compound selected from amorphous silicon, silicon nitride, silicon dioxide, and aluminum oxide. The doped layer can be prepared by chemical vapor deposition or physical deposition using at least one compound selected from phosphorus-doped polycrystalline silicon and boron-doped polycrystalline silicon. The transparent conductive layer can be prepared by chemical vapor deposition or physical deposition using at least one compound selected from indium tin oxide, fluorine-doped tin oxide, aluminum-doped zinc oxide, and gallium-doped zinc oxide. The metal electrode can be prepared by screen printing, electroplating, or other processes using at least one substance selected from silver, copper, aluminum, nickel, and gold.
[0103] In one embodiment, the semiconductor substrate has an n-type doped side and a p-type doped side, respectively, wherein the n-type doped side serves as the front side of the solar photovoltaic cell, and the p-type doped side serves as the back side of the solar photovoltaic cell.
[0104] The solar photovoltaic cell provided by this invention has a high reflectivity of the back reflective layer, which can reflect unabsorbed light back to the front active layer, thereby improving the light absorption efficiency and thus improving the working efficiency of the cell.
[0105] The present invention will be further described in detail below through specific embodiments.
[0106] Example 1
[0107] The semiconductor substrate fabrication method provided in this embodiment includes the following steps:
[0108] 1) The pretreated silicon wafers are subjected to metal chemical etching and metal particle cleaning to obtain semi-finished silicon wafers.
[0109] The metal chemical etching process involves immersing the pretreated silicon wafer in a first metal chemical etching solution containing a metal salt, a first oxidant, and hydrofluoric acid to obtain an intermediate silicon wafer. In the first metal chemical etching solution, the metal salt is silver nitrate with a molar concentration of 0.5 M; the first oxidant is hydrogen peroxide with a molar concentration of 5 M; and the molar concentration of hydrofluoric acid is 5 M. The molar ratio of the metal salt, the first oxidant, and the hydrofluoric acid is 1:10:10.
[0110] The reaction temperature for the metal chemical etching process is 30℃, and the reaction time is 60s.
[0111] The intermediate silicon wafer is subjected to metal particle cleaning treatment to obtain a semi-finished silicon wafer. The metal particle cleaning treatment is to immerse the intermediate silicon wafer in nitric acid as a metal cleaning agent. The mass fraction of nitric acid is 30wt%, the treatment temperature is 25℃, and the treatment time is 3min.
[0112] 2) The above semi-finished silicon wafers are subjected to a surface modification treatment using a surface modification solution to obtain a primary silicon wafer.
[0113] The primary surface modification solution is a mixture of hydrofluoric acid and nitric acid, with a molar concentration of 1M for both hydrofluoric acid and nitric acid.
[0114] The surface finishing treatment was carried out at a temperature of 25℃ for 30 seconds.
[0115] 3) The above-mentioned primary silicon wafer is subjected to secondary surface modification treatment using a secondary surface modification liquid to obtain a semiconductor substrate.
[0116] The alkaline solution used in the secondary surface modification solution is a potassium hydroxide solution with a mass fraction of 30 wt%.
[0117] The secondary surface modification treatment was performed at a temperature of 50℃ for 20 seconds.
[0118] The surface structure of the semiconductor substrate provided in this embodiment is shown in Figure 2, which was obtained through Keyence microscopy. As can be seen from Figure 2, the surface of the semiconductor substrate is relatively flat.
[0119] Example 2
[0120] The semiconductor substrate preparation method provided in this embodiment is basically the same as that in Embodiment 1. The difference is that in step 1), the molar concentration of the metal salt in the first metal chemical etching solution used for the metal chemical etching process is 1M; the molar concentration ratio of the metal salt, the first oxidant and hydrofluoric acid is 1:5:5.
[0121] The reaction temperature for the metal chemical etching process is 30℃, and the reaction time is 50s.
[0122] Example 3
[0123] The semiconductor substrate preparation method provided in this embodiment is basically the same as that in Embodiment 1. The difference is that in step 1), the molar concentration of the metal salt in the first metal chemical etching solution used for the metal chemical etching process is 2M; the molar concentration ratio of the metal salt, the first oxidant and hydrofluoric acid is 1:2.5:2.5.
[0124] Example 4
[0125] The semiconductor substrate preparation method provided in this embodiment is basically the same as that in Embodiment 1, except that in step 1), the metal chemical etching process includes:
[0126] The pretreated silicon wafer is subjected to metal deposition, specifically by using magnetron sputtering (PVD) to prepare an attached metal layer, the metal being silver, to obtain a metal-attached silicon wafer, wherein the thickness of the attached metal layer is 5 nm;
[0127] The above-mentioned metal-coated silicon wafer was immersed in a second metal chemical etching solution containing hydrofluoric acid and a second oxidant at 40°C for 120 seconds to obtain an intermediate silicon wafer.
[0128] The molar concentration of hydrofluoric acid is 3M.
[0129] The second oxidant is hydrogen peroxide, and its molar concentration is 3M. In the second metal chemical etching solution, the molar ratio of hydrofluoric acid to the second oxidant is 1:1.
[0130] The subsequent processing of the above intermediate silicon wafer is the same as in Example 1.
[0131] The thickness of the attached metal layer is measured as an average thickness. The specific testing method is as follows: 20 points are randomly selected on the attached metal layer, and the thickness is measured using a step meter, and the average value is calculated.
[0132] Example 5
[0133] The semiconductor substrate preparation method provided in this embodiment is basically the same as that in embodiment 4, except that in step 1), the thickness of the attached metal layer is 30 nm.
[0134] Example 6
[0135] The semiconductor substrate preparation method provided in this embodiment is basically the same as that in Embodiment 1, except that in step 1), the metal cleaning agent used includes ammonia water with a concentration of 20 wt%.
[0136] Comparative Example 1
[0137] The method for preparing the semiconductor substrate provided in this comparative example is basically the same as that in Example 1, except that step 1) is omitted, and the pretreated silicon wafer is directly subjected to step 2).
[0138] Comparative Example 2
[0139] The method for preparing the semiconductor substrate provided in this comparative example is basically the same as that in Example 1, except that step 2) is omitted, and the semi-finished silicon wafer obtained in step 1) is directly proceeded to step 3).
[0140] Comparative Example 3.
[0141] The method for preparing the semiconductor substrate provided in this comparative example is basically the same as that in Example 1, except that step 3) is not performed, and the silicon wafer obtained in step 2) is the semiconductor substrate.
[0142] Comparative Example 4
[0143] This comparative example uses the BL process to prepare silicon substrates. The main process involves immersing the silicon wafers in a 2wt% alkaline solution at 80°C for 120 seconds; the alkaline solution is sodium hydroxide.
[0144] The surface structure of the semiconductor substrate provided in this comparative example is shown in Figure 3, which was obtained through Keyence microscopy. As can be seen from Figure 3, there are also obvious line marks on the surface of this semiconductor substrate.
[0145] Test case
[0146] The surface reflectance of the semiconductor substrates in Examples 1-6 and Comparative Examples 1-4 was measured using a standard 8-degree (D8) reflectance testing device. The test results are shown in Table 1.
[0147] The step height difference at the traces on the semiconductor substrates of Examples 1-6 and Comparative Examples 1-4 was detected using a 3D microscope. The test results are shown in Table 1. In Table 1, the step height difference at the traces is expressed as an average value. Specifically, 50 traces were randomly selected to measure the height difference and calculate the average value.
[0148] The weight of the semiconductor substrates in Examples 1-6 and Comparative Examples 1-4 was weighed before and after preparation, and the weight loss was calculated. The test results are shown in Table 1.
[0149] Table 1
[0150] As can be seen from the results in the table above, the semiconductor substrates prepared in Examples 1 to 6 have higher surface reflectivity and higher step height difference at the line marks compared to the semiconductor substrates prepared in Comparative Examples 1 to 4. In addition, the semiconductor substrates prepared in Examples 1 to 6 have a significantly lower weight reduction value compared to the semiconductor substrate prepared in Comparative Example 4, which reduces the mass loss of the silicon wafer during the polishing process.
[0151] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and not to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.
Claims
1. A method for preparing a semiconductor substrate, characterized in that, Includes the following steps: Step 1) Perform metal chemical etching and metal particle cleaning on the pretreated silicon wafer to obtain a semi-finished silicon wafer; Step 2) The semi-finished silicon wafer is subjected to a primary surface modification treatment using a primary surface modification solution to obtain a primary silicon wafer; the primary surface modification solution includes hydrofluoric acid and a strong oxidizing agent; Step 3) The primary silicon wafer is subjected to secondary surface modification treatment using a secondary surface modification liquid to obtain the semiconductor substrate; the secondary surface modification liquid includes an alkaline solution; the step height difference at the line marks on the surface of the semiconductor substrate does not exceed 0.15 μm.
2. The preparation method according to claim 1, characterized in that, The metal chemical etching process includes: The pretreated silicon wafer is immersed in a first metal chemical etching solution containing metal salt, first oxidant and hydrofluoric acid at 25-50°C for 20-240 seconds to obtain an intermediate silicon wafer.
3. The preparation method according to claim 2, characterized in that, The metal salt is a salt containing ions of at least one metal selected from Pt, Au, Ag, Cu, and Ni, and the molar concentration of the metal salt in the first metal chemical etching solution is 0.5–10 M; and / or, The first oxidant is at least one selected from H₂O₂, HNO₃, and KMnO₄, and the molar concentration of the first oxidant in the first metal chemical etching solution is 5–20 M; and / or, In the first metal chemical etching solution, the molar concentration of hydrofluoric acid is 1 to 10 M.
4. The preparation method according to claim 1, characterized in that, The metal chemical etching process includes: The pretreated silicon wafer is subjected to metal deposition to obtain a metal-attached silicon wafer, wherein the thickness of the attached metal layer in the metal-attached silicon wafer is 1 to 10 nm. The silicon wafer with attached metal is immersed in a second metal chemical etching solution containing hydrofluoric acid and a second oxidant at 25–50°C for 20–240 seconds to obtain an intermediate silicon wafer.
5. The preparation method according to claim 4, characterized in that, The attached metal layer is obtained by depositing at least one metal selected from Pt, Au, Ag, Cu, and Ni; and / or, In the second metal chemical etching solution, the molar concentration of the hydrofluoric acid is 1–10 M; and / or, The second oxidant is at least one of H2O2, HNO3, and KMnO4, and the molar concentration of the second oxidant in the second metal chemical etching solution is 1 to 20 M.
6. The preparation method according to any one of claims 2 to 5, characterized in that, The metal particle cleaning process includes: immersing the intermediate silicon wafer in a metal cleaning agent at 20-25°C for 3-10 minutes to obtain the semi-finished silicon wafer; in, The metal cleaning agent comprises a mixed solution of HCl, H2O2, and H2O, wherein the molar concentration ratio of HCl, H2O2, and H2O in the mixed solution is (1–3):(1–3):(3–8); or, The metal cleaning agent includes nitric acid, wherein the nitric acid has a mass fraction of 30–50 wt%; or, The metal cleaning agent includes aqua regia; or, The metal cleaning agent includes ammonia water, wherein the mass fraction of the ammonia water is 5-25 wt%.
7. The preparation method according to any one of claims 1 to 6, characterized in that, In the primary surface modification solution, the molar concentration of hydrofluoric acid is 0.1–5 M; and / or, The strong oxidant in the primary surface modification solution is at least one selected from nitric acid, concentrated sulfuric acid, and KMnO4; the molar concentration of the strong oxidant in the primary surface modification solution is 0.1–5 M; and / or, The surface modification treatment is performed at a temperature of 20–30°C for 30–120 seconds.
8. The preparation method according to any one of claims 1 to 7, characterized in that, The alkali in the alkaline solution includes at least one of KOH, NaOH, and tetramethylammonium hydroxide, and the mass fraction of the alkaline solution is 5-30 wt%; and / or, The secondary surface modification treatment is carried out at a temperature of 45–60°C for 10–60 seconds.
9. The preparation method according to any one of claims 1 to 8, characterized in that, The preparation method further includes: after step 3), the semiconductor substrate is cleaned, and the cleaning process includes cleaning the semiconductor substrate sequentially with a mixed solution of alkali and hydrogen peroxide, a mixed solution of hydrochloric acid and hydrogen peroxide, and a hydrofluoric acid solution. or, The preparation method further includes: after step 3), texturing the semiconductor substrate.
10. A solar cell comprising a semiconductor substrate prepared by any one of claims 1 to 9; An intrinsic passivation layer, a doped layer, a transparent conductive layer, and a metal electrode are deposited sequentially on both sides of the semiconductor substrate.
11. The solar cell according to claim 10, characterized in that, The semiconductor substrate has a textured surface on one side and a polished surface on the other side.
Citation Information
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