Heteroepitaxial substrate and production method for same

Abstract

The present invention is a heteroepitaxial substrate which has a substrate, an intermediate layer on the substrate, and a heteroepitaxial layer on the intermediate layer, wherein the thermal expansion coefficient of the intermediate layer is an intermediate thermal expansion coefficient between the thermal expansion coefficient of the substrate and the thermal expansion coefficient of the heteroepitaxial layer. The present invention is also a production method for the heteroepitaxial substrate. In this way, by means of a structure obtained using a single index, a heteroepitaxial substrate in which warping or cracking is suppressed and a production method for the same are provided.

Description

Heteroepitaxial substrate and method for manufacturing the same

[0001] The present invention relates to a heteroepitaxial substrate and a method for manufacturing the same.

[0002] The need for power devices is increasing in a very wide range of fields, including the electrification of automobiles and FA (Factory Automation). Furthermore, energy loss in power semiconductors can no longer be ignored, and research into energy-efficient structures is being conducted, yielding significant results. This energy loss occurs when electrical energy is converted into heat, and while many efforts are being made to dissipate this heat, constraints are also arising. For example, with regard to IGBTs used in automobiles, the increasing sophistication of HVs and EVs has led to an expansion and increase in the amount of electronic equipment installed, resulting in larger cooling systems, which are even affecting the design of automobiles.

[0003] Meanwhile, in the field of communications, discussions are underway regarding next-generation and beyond communication technologies, and it is easy to imagine that communication frequencies will become even higher than those currently in use.

[0004] Furthermore, significant advancements in AR and VR technologies have led to a surge in the development of small, personal displays.

[0005] With the development of such social infrastructure, in addition to silicon, SiC, GaN, and other substrates are expected to be promising for power, communication, and light-emitting devices, and numerous studies are underway.

[0006] In this context, in addition to devices using SiC, GaN, and other freestanding single substrates, a great deal of research and development is being conducted on techniques for epitaxially growing these materials on silicon substrates, which are relatively inexpensive. In particular, silicon has already been put into practical use at a diameter of 300 mm in semiconductor mass production plants, and if it is possible to fabricate substrates on which various materials have been grown, even if there are performance limitations compared to single substrates, it will be a very attractive material from a practical standpoint.

[0007] In substrates where different materials are grown on a silicon substrate, which holds such promise, the problem is that the substrate warps or cracks.

[0008] This warping and cracking is caused by growing materials with different properties on a silicon substrate. Therefore, numerous prior studies and developments exist to address this issue.

[0009] One method involves focusing on the difference in lattice constants between silicon and the material grown on it, and mitigating this difference through structural means. For example, Patent Document 1 discloses a method for resolving the difference in lattice constants between silicon and the material grown on it using a strained superlattice layer. The strained superlattice layer described in Patent Document 1 is mitigated by alternately stacking a first semiconductor layer with a different lattice constant than the substrate and a second semiconductor layer with the same lattice constant as the substrate. The total thickness of the first semiconductor layer is set to exceed the critical thickness of the first semiconductor layer. Furthermore, if the lattice constant of the device layer is larger than that of the substrate, the first semiconductor layer has a larger lattice constant than the device layer. On the other hand, if the lattice constant of the device layer is smaller than that of the substrate, the first semiconductor layer has a smaller lattice constant than the substrate. This is said to provide a higher dislocation reduction effect without increasing manufacturing costs. In other words, the semiconductor stacked structure described in Patent Document 1 is a method for overcoming this difference by focusing on the microscopic structure of the crystal structure.

[0010] Furthermore, from a more macroscopic perspective, there are examples such as Patent Document 2, which focuses on grain boundaries and attempts to solve the problem from a structural standpoint. Specifically, Patent Document 2 describes a heteroepitaxial film substrate in which a heteroepitaxial film is formed on a substrate via a columnar structure film consisting of numerous columnar bodies extending in a direction nonparallel to the substrate surface. The invention describes a heteroepitaxial film substrate and a method for manufacturing the same, which effectively relieves the stress on the epitaxial film during and / or after film formation without going through a complex process, thereby growing a high-quality heteroepitaxial film.

[0011] Furthermore, as an approach that addresses the problem from the growth conditions, Patent Document 3 describes a heteroepitaxial substrate and a method for manufacturing it, in which, when epitaxially growing 3C-SiC or GaN on a Si substrate, a buffer layer is epitaxially grown at a temperature of 500 to 900°C and a speed of 0.1 to 1 μm / h in the case of SiC, and then the main layer is epitaxially grown on top of it at a temperature of 1000 to 1300°C and a speed of 1 to 15 μm / h. This method controls the process from the conditions during film formation rather than from the structure of the substrate.

[0012] Various approaches have been taken in this manner, and Non-Patent Document 1 further mentions the coefficient of thermal expansion. Silicon (coefficient of thermal expansion: 2.6 × 10⁻⁶) －６ GaN (thermal expansion coefficient: 5.6 × 10) on K) －６ When stacking GaN and AlN (thermal expansion coefficient: 6.4 × 10⁻¹⁰), a method is described that utilizes the difference in lattice constants to reduce stress in order to account for this difference in thermal expansion coefficient. Specifically, GaN and AlN (thermal expansion coefficient: 6.4 × 10⁻¹⁰) are used. －６ It employs a superlattice structure of / K.

[0013] Japanese Patent Publication No. 2017-112198, Japanese Patent Publication No. 2007-287771, Japanese Patent Publication No. 2004-039766

[0014] Matsumoto et al., "Current Status and Challenges of Organometallic Vapor Deposition Apparatus for Epitaxial Growth of GaN Power Devices on Silicon Substrates," J. Vac. Soc. Jpn., 54, 376 (2011). Kagaya et al., "Calculation of Specific Heat and Thermal Expansion Coefficient of Si-Ge Systems," Journal of Solid State Physics, 45(1), 1 (1985).

[0015] As described above, conventional technologies have provided solutions to substrate warping and cracking from microscopic points of the crystal structure, such as lattice constant differences (Patent Document 1 and Non-Patent Document 1) and grain boundaries (Patent Document 2). However, actual substrate fabrication involves a complex process in which epitaxial growth is carried out in a high-temperature environment and then returned to room temperature.

[0016] Furthermore, since the structure of the outer periphery (edge ​​shape) differs from the crystal structure inside the substrate, it is undeniable that there are aspects that are difficult to explain solely by lattice constants and grain boundaries. For this reason, as in Patent Document 3, it becomes necessary to define the optimal conditions from the epitaxial growth conditions.

[0017] The present invention has been made to solve the above problems, and aims to provide a heteroepitaxial substrate and a method for manufacturing the same, which suppresses warping or cracking of the substrate by using a structure that utilizes a single indicator as a countermeasure against warping or cracking of the substrate.

[0018] The present invention has been made to achieve the above objective, and provides a heteroepitaxial substrate having a substrate, an intermediate layer on the substrate, and a heteroepitaxial layer on the intermediate layer, wherein the thermal expansion coefficient of the intermediate layer is intermediate between the thermal expansion coefficient of the substrate and the thermal expansion coefficient of the heteroepitaxial layer.

[0019] Such a heteroepitaxial substrate has an intermediate layer with a thermal expansion coefficient intermediate between that of the substrate and the heteroepitaxial layer. This allows it to absorb the difference in shrinkage between the substrate and the heteroepitaxial layer that occurs during the cooling process of the epitaxially grown substrate, thereby suppressing warping or cracking of the heteroepitaxial substrate.

[0020] In this case, the substrate is plastically deformed and can contain dislocations throughout its entire surface.

[0021] This makes it a more effective countermeasure against warping and cracking of heteroepitaxial substrates.

[0022] The present invention has also been made to achieve the above objective, and provides a method for manufacturing a heteroepitaxial substrate, comprising forming an intermediate layer on a substrate and growing a heteroepitaxial layer on the intermediate layer, wherein the intermediate layer has a thermal expansion coefficient intermediate between the thermal expansion coefficient of the substrate and the thermal expansion coefficient of the heteroepitaxial layer.

[0023] According to this method for manufacturing heteroepitaxial substrates, by forming an intermediate layer having a thermal expansion coefficient intermediate between that of the substrate and the heteroepitaxial layer, it is possible to absorb the difference in shrinkage between the substrate and the heteroepitaxial layer that occurs during the cooling process of the epitaxially grown substrate, thereby suppressing warping or cracking of the heteroepitaxial substrate.

[0024] In this case, the substrate after the heteroepitaxial layer has been grown can be plastically deformed and contain dislocations throughout its entire surface.

[0025] This makes it possible to manufacture heteroepitaxial substrates that are more effective in preventing warping and cracking.

[0026] As described above, the heteroepitaxial substrate of the present invention has an intermediate layer between the substrate and the heteroepitaxial layer, which has a thermal expansion coefficient intermediate between the thermal expansion coefficients of the substrate and the heteroepitaxial layer. This intermediate layer can absorb the difference in shrinkage between the substrate and the heteroepitaxial layer that occurs during the cooling process of the epitaxially grown substrate, thereby suppressing warping or cracking of the heteroepitaxial substrate. As a result, it becomes possible to supply large-diameter heteroepitaxial substrates, which were previously difficult to manufacture due to warping and cracking problems. Furthermore, there is no need to make the base substrate particularly thick, thus enabling resource conservation.

[0027] Furthermore, according to the method for manufacturing heteroepitaxial substrates of the present invention, by forming an intermediate layer between the substrate and the heteroepitaxial layer, which has a thermal expansion coefficient intermediate between that of the substrate and the heteroepitaxial layer, the difference in the degree of shrinkage between the substrate and the heteroepitaxial layer that occurs during the cooling process of the epitaxially grown substrate can be absorbed, thereby suppressing warping or cracking of the heteroepitaxial substrate. As a result, it becomes possible to supply large-diameter heteroepitaxial substrates, which were previously difficult to manufacture due to warping and cracking problems. Moreover, there is no need to make the base substrate particularly thick, thus achieving resource conservation.

[0028] This shows a schematic cross-sectional view of an example of a heteroepitaxial substrate according to an embodiment of the present invention. This shows a schematic cross-sectional view of the heteroepitaxial substrate of Example 1. This shows the XRT measurement results of the heteroepitaxial substrate of Example 1. This shows schematic cross-sectional views of the heteroepitaxial substrates of Comparative Examples 1 and 2. This shows a schematic cross-sectional view of the heteroepitaxial substrate of Example 2. This shows a schematic cross-sectional view of the heteroepitaxial substrate of Comparative Example 3.

[0029] The present invention will be described in detail below, but the present invention is not limited to these descriptions.

[0030] As described above, there has been a need for a heteroepitaxial substrate and a method for manufacturing the same that suppresses warping or cracking of the substrate, using a structure based on a single indicator, as a countermeasure against warping or cracking of the substrate.

[0031] As a result of diligent study on the above-mentioned problems, the inventors have found that a heteroepitaxial substrate having a substrate, an intermediate layer on the substrate, and a heteroepitaxial layer on the intermediate layer, wherein the intermediate layer has a thermal expansion coefficient intermediate between the thermal expansion coefficient of the substrate and the thermal expansion coefficient of the heteroepitaxial layer, allows the intermediate layer between the substrate and the heteroepitaxial layer to absorb the difference in shrinkage between the substrate and the heteroepitaxial layer that occurs during the cooling process of the epitaxially grown substrate. This suppresses warping or cracking of the heteroepitaxial substrate, making it possible to supply large-diameter heteroepitaxial substrates that were previously difficult to manufacture due to warping and cracking problems. Furthermore, it eliminates the need to make the base substrate particularly thick, thus enabling resource conservation, and thus the inventors have completed the present invention.

[0032] As a result of intensive studies on the above problems, the present inventors have also developed a method for manufacturing a heteroepitaxial substrate in which an intermediate layer is formed on a substrate and a heteroepitaxial layer is grown on the intermediate layer. In this method, the intermediate layer has a coefficient of thermal expansion intermediate between the coefficient of thermal expansion of the substrate and the coefficient of thermal expansion of the heteroepitaxial layer. By forming an intermediate layer having a coefficient of thermal expansion intermediate between the coefficient of thermal expansion of the substrate and the coefficient of thermal expansion of the heteroepitaxial layer between the substrate and the heteroepitaxial layer, it is possible to absorb the difference in the degree of shrinkage between the substrate and the heteroepitaxial layer that occurs during the cooling process of the epitaxially grown substrate. As a result, warping or cracking of the heteroepitaxial substrate can be suppressed. Therefore, it becomes possible to supply large-diameter heteroepitaxial substrates, which have conventionally been difficult to manufacture due to warping and cracking problems. Furthermore, it has been found that there is no need to make the base substrate particularly thick, and resource savings can be achieved, and thus the present invention has been completed.

[0033] (Heteroepitaxial Substrate) Hereinafter, embodiments of the present invention will be described with reference to the drawings. FIG. 1 shows a schematic cross-sectional view of an example of a heteroepitaxial substrate according to an embodiment of the present invention. As shown in FIG. 1, the heteroepitaxial substrate 1 according to the embodiment of the present invention includes a base substrate 2, an intermediate layer 3 on the substrate 2, and a heteroepitaxial layer 4 of a desired material on the intermediate layer 3.

[0034] The intermediate layer 3 has a coefficient of thermal expansion intermediate between the coefficient of thermal expansion of the substrate 2 and the coefficient of thermal expansion of the heteroepitaxial layer 4.

[0035] The thickness of the intermediate layer 3 is not particularly limited, but for example, it can be 50 to 200 nm. Also, the intermediate layer 3 may be a single layer or a multilayer.

[0036] The material of the heteroepitaxial layer 4 is not particularly limited and can be appropriately selected according to the intended device application. For example, GaN, SiGe, SiC, GaAs, etc. can be mentioned. Also, the thickness of the heteroepitaxial layer 4 is not particularly limited and can be appropriately selected according to the material, but for example, it can be 1000 to 5000 nm.

[0037] Although the epitaxial growth is carried out at a high temperature, the substrate used as a product is the one cooled to room temperature. In this cooling process, due to the difference in the thermal expansion coefficients of the substrate 2 and the epitaxial layer 4, it leads to warping or cracking of the heteroepitaxial substrate 1. However, by having a material with a thermal expansion coefficient intermediate between that of the substrate and the heteroepitaxial layer as the intermediate layer 3, it becomes possible to absorb the difference in the degree of shrinkage between the substrate 2 and the heteroepitaxial layer 4 generated in this cooling process.

[0038] If film formation can be uniformly performed on the outer periphery of the substrate 2 (in the range of approximately 1 mm from the outer peripheral edge toward the inside), the occurrence rate of such warping and cracking will be extremely low. However, in actual epitaxial growth, since the substrate 2 is mounted on a tray called a susceptor and epitaxial growth is carried out, film formation is not performed on the back surface of the substrate 2. Therefore, when film formation is performed only on one side compared to when film formation is performed on both sides of the substrate 2, the influence of the thermal expansion coefficient becomes even greater.

[0039] At this time, the substrate 2 can be plastically deformed and can be considered to contain dislocations throughout the surface. In other words, conventionally, the base substrate 2 was designed with the idea of using only the elastic region, but it can also be said that by plastically deforming the base substrate 2, it is a measure against cracking.

[0040] In other words, conventionally, materials have been used in the elastic region, resulting in a state where no dislocations exist in the base substrate 2. However, the heteroepitaxial substrate 1 according to the present invention has an intermediate layer 3 with a thermal expansion coefficient intermediate between that of the base substrate 2 and the heteroepitaxial layer 4. This allows for a gentler stress on the base substrate 2 during cooling compared to a heteroepitaxial substrate without the intermediate layer 3, generating dislocations in the base substrate 2 and inducing plastic deformation. This makes the heteroepitaxial substrate 1 more effective in preventing warping and cracking.

[0041] The substrate 2 is not particularly limited, but can be a single-crystal silicon substrate, and its diameter may be 150 mm or more, or 300 mm or more. It may be doped, the conductivity type may be p-type or n-type, and it may have low resistivity or high resistivity. It can be a single-crystal silicon substrate manufactured using the same single-crystal manufacturing equipment and procedures as conventional methods. There are no particular restrictions on the surface orientation, but it can be appropriately selected depending on the material of the desired epitaxial layer. The thickness can be 250 to 5000 nm.

[0042] (Method for Manufacturing Hetero-Epitaxial Substrates) Next, a method for manufacturing hetero-epitaxial substrates according to an embodiment of the present invention will be described with reference to Figure 1. Note that the matters described above regarding hetero-epitaxial substrates may be omitted.

[0043] The present invention relates to a method for manufacturing a heteroepitaxial substrate, which involves forming an intermediate layer 3 on a substrate 2 and growing a heteroepitaxial layer 4 on the intermediate layer 3. In this method, the intermediate layer 3 is provided to have a thermal expansion coefficient that is intermediate between the thermal expansion coefficient of the substrate 2 and the thermal expansion coefficient of the heteroepitaxial layer 4.

[0044] In the example of a GaN on Si substrate where a GaN layer is grown on a silicon substrate, the silicon (111) substrate (thermal expansion coefficient: 2.59 × 10⁻¹⁰) －６ GaN(0001) layer (thermal expansion coefficient: 5.59 × 10) / K －６ / (K) is grown, but conventionally, AlN is often used as an intermediate layer. However, the thermal expansion coefficient of AlN is as large as 6.43×10 －６ / K, and therefore, as described in Non-Patent Document 1, a superlattice structure in which thin films of GaN and AlN are repeatedly grown has been proposed. However, due to the large difference in thermal expansion coefficient, cracks occur in a normal-thickness silicon substrate, for example, a substrate with a diameter of 300 mm and a thickness of 0.7 mm, and growth cannot be achieved.

[0045] However, for example, by growing 3C-SiC (thermal expansion coefficient: 4.0×10 －６ / K) having a thermal expansion coefficient intermediate between silicon and GaN on silicon (111) and growing GaN thereon, it becomes possible to grow GaN on a silicon substrate with a diameter of 300 mm and a thickness of 0.7 mm.

[0046] Also, in a virtual SiGe substrate in which relaxed SiGe is grown on a silicon (100) substrate, SiGe is grown on the silicon (100) substrate (thermal expansion coefficient: 2.60×10 －６ / K). It has been found that the thermal expansion coefficient of SiGe changes depending on the Ge concentration (Non-Patent Document 2). For example, in the case of growing SiGe (thermal expansion coefficient: 3.0×10 －６ / K) with a Ge concentration of 30%, it becomes possible to produce a substrate with less warping by inserting a SiGe layer with a Ge concentration of 30% or less.

[0047] In the method for manufacturing a heteroepitaxial substrate according to the present invention, the substrate 2 after growing the heteroepitaxial layer 4 can be plastically deformed and can be considered to contain dislocations throughout the surface. Thereby, it becomes more effective as a countermeasure against warping and cracking of the heteroepitaxial substrate 1.

[0048] In the case of SiGe on a silicon substrate, the difference in thermal expansion coefficients between silicon and SiGe is small, and the growth temperature range is relatively low, below 1000°C. Therefore, plastic deformation (introduction of dislocations) of the base silicon substrate is not necessary. However, in the case of GaN on a silicon substrate, where the difference in thermal expansion coefficients is large and the film deposition temperature range sometimes exceeds 1100°C, it is preferable to introduce dislocations into the base silicon substrate and induce plastic deformation.

[0049] The present invention will be described in detail below with reference to examples, but this is not intended to limit the present invention.

[0050] (Example 1) A silicon (111) substrate 5 with a diameter of 300 mm (coefficient of thermal expansion: 2.59 × 10⁻¹⁰) as shown in Figure 2. －６ On top of the K layer, there is a 3C-SiC layer 6 (thermal expansion coefficient: 4.0 × 10⁻⁶). －６ ( / K) and GaN layer 7 (thermal expansion coefficient: 5.59 × 10⁻¹⁰) －６ A GaN on 3C-SiC on Si substrate was fabricated, equipped with (K).

[0051] A boron-doped high-resistance single-crystal silicon substrate with a standard thickness of 775 μm, a diameter of 300 mm, a crystal orientation (111), and boron doping was prepared. This substrate was placed on a susceptor in the reactor of a reduced-pressure CVD apparatus and subjected to H2C CVD at 1080°C for 1 minute. ２ We performed annealing.

[0052] Next, trimethylsilane gas was introduced at a growth temperature of 900°C and a growth pressure of 667 Pa (5 Torr) to perform the SiC nucleation process and grow a 3C-SiC single crystal film. After 10 minutes of growth, a 3C-SiC single crystal film with a thickness of 100 nm was grown.

[0053] Subsequently, the substrate was introduced into the reaction furnace of the MOCVD apparatus, and nitrogen was used to purge the atmosphere and remove oxygen and moisture. Next, the pressure inside the furnace was reduced to 5000 Pa (50 mbar), the temperature was raised to 1050°C, and the surface was cleaned by holding it in a hydrogen atmosphere for 10 minutes.

[0054] To grow the GaN layer, the furnace pressure was maintained at 20,000 Pa (200 mbar) and the substrate temperature at 1,120°C. Trimethylgallium and ammonia were introduced into the furnace, and a 900 nm thick GaN film was deposited. Figure 3 is a quarter-view of the XRT measurement results of the substrate fabricated in this manner.

[0055] Figure 3 is a photograph showing dislocations observed by XRT (X-ray-topography). As shown, the heteroepitaxial substrate of Example 1 shows no cracks, even though there are areas that appear white due to warping and focus shift (defocused areas 11). Furthermore, the base substrate underwent plastic deformation, and dislocations, as shown in area a, occurred throughout the substrate.

[0056] (Comparative Example 1) As a comparative example to Example 1, a silicon (111) substrate 5 with a diameter of 300 mm (coefficient of thermal expansion: 2.59 × 10⁻¹⁰) is shown in Figure 4. －６ GaN layer 7 (thermal expansion coefficient: 5.59 × 10) on top of / K －６ We attempted to fabricate a GaN on Si substrate equipped with ( / K).

[0057] A boron-doped, high-resistance single-crystal silicon substrate with a standard thickness of 775 μm, a diameter of 300 mm, a crystal orientation (111), and boron doping was prepared. This substrate was introduced into the reaction furnace of the MOCVD apparatus, and the atmosphere was purged with nitrogen to remove oxygen and moisture from the air. Subsequently, the furnace pressure was reduced to 50 mbar, the temperature was raised to 1050°C, and the surface was cleaned by holding it in a hydrogen atmosphere for 10 minutes.

[0058] To grow the GaN layer, the furnace pressure was maintained at 20,000 Pa (200 mbar) and the substrate temperature at 1,120°C. Trimethylgallium and ammonia were introduced into the furnace to start GaN growth. However, the substrate was damaged inside the furnace during the growth process, and growth could not be completed.

[0059] (Comparative Example 2) Next, a silicon (111) substrate 5 with a thickness of 1.5 mm and a diameter of 300 mm, as shown in Figure 4 (coefficient of thermal expansion: 2.59 × 10 －６ GaN layer 7 (thermal expansion coefficient: 5.59 × 10) on top of / K －６ We attempted to fabricate a GaN on Si substrate equipped with ( / K).

[0060] A 1.5 mm thick, 300 mm diameter, (111) face orientation, boron-doped high-resistance single-crystal silicon substrate was prepared. This substrate was introduced into the reaction furnace of the MOCVD apparatus, and the atmosphere was purified with nitrogen to remove oxygen and moisture. Subsequently, the furnace pressure was reduced to 5000 Pa (50 mbar), the temperature was raised to 1050°C, and the surface was cleaned by holding it in a hydrogen atmosphere for 10 minutes.

[0061] To grow the GaN layer, the furnace pressure was maintained at 20,000 Pa (200 mbar) and the substrate temperature at 1,120°C. Trimethylgallium and ammonia were introduced into the furnace to start GaN growth. However, the substrate was damaged inside the furnace during the growth process, and growth could not be completed.

[0062] (Example 2) A silicon (100) substrate 10 with a diameter of 300 mm as shown in Figure 5 (coefficient of thermal expansion: 2.60 × 10 －６ On top of the 10°C (K), there is a SiGe intermediate layer 8 with a Ge concentration of 30% or less, and on top of the SiGe intermediate layer 8, there is a SiGe layer 9 with a Ge concentration of 30% (thermal expansion coefficient: 3.0 × 10°C). －６ A SiGe on Si substrate was fabricated, comprising a SiGe interlayer 8. The thermal expansion coefficient of the SiGe interlayer 8 was set to an intermediate value between that of the silicon (100) substrate 10 and the SiGe layer 9.

[0063] A boron-doped high-resistance single-crystal silicon substrate with a standard thickness of 775 μm, a diameter of 300 mm, a crystal orientation of (100), and boron doping was prepared. This substrate was placed on a susceptor in the reactor of a reduced-pressure CVD apparatus and subjected to H2C for 1 minute at 1080°C. ２ We performed annealing.

[0064] Next, a gas containing dichlorosilane and monogermane was introduced at a growth temperature of 610°C and a growth pressure of 1333 Pa (10 Torr) to grow the SiGe layer. During this process, a 100 nm SiGe intermediate layer with a Ge concentration of 15% was grown on the silicon substrate, followed by a 3000 nm SiGe layer with a Ge concentration.

[0065] The warp (BOW) of the fabricated substrate was measured using an LNSW manufactured by Kobelco Research Institute and was found to be -2 μm.

[0066] (Comparative Example 3) A silicon (100) substrate 10 with a diameter of 300 mm as shown in Figure 6 (coefficient of thermal expansion: 2.60 × 10 －６ On top of the (K) layer, there is a SiGe layer 9 with a Ge concentration of 30% (thermal expansion coefficient: 3.0 × 10 －６ A SiGe on Si substrate was fabricated by growing (K) ions.

[0067] A boron-doped high-resistance single-crystal silicon substrate with a standard thickness of 775 μm, a diameter of 300 mm, a crystal orientation of (100), and boron doping was prepared. This substrate was placed on a susceptor in the reactor of a reduced-pressure CVD apparatus and subjected to H2C for 1 minute at 1080°C. ２ We performed annealing.

[0068] Next, a gas containing dichlorosilane and monogermane was introduced at a growth temperature of 610°C and a growth pressure of 1333 Pa (10 Torr), and a SiGe layer with a Ge concentration of 30% was grown to a depth of 3000 nm.

[0069] The warp (BOW) of the fabricated substrate was measured in the same manner as in Example 2, and was found to be +32 μm.

[0070] As described above, according to the embodiments of the present invention, it was possible to manufacture large-diameter heteroepitaxial substrates with suppressed warping or cracking.

[0071] It should be noted that the present invention is not limited to the embodiments described above. The embodiments described above are illustrative, and any configuration that is substantially identical to the technical idea described in the claims of the present invention and achieves similar effects is included within the technical scope of the present invention.

Claims

1. A heteroepitaxial substrate having a substrate, an intermediate layer on the substrate, and a heteroepitaxial layer on the intermediate layer, wherein the thermal expansion coefficient of the intermediate layer is intermediate between the thermal expansion coefficient of the substrate and the thermal expansion coefficient of the heteroepitaxial layer.

2. The heteroepitaxial substrate according to claim 1, characterized in that the substrate is plastically deformed and contains dislocations throughout its entire surface.

3. A method for manufacturing a heteroepitaxial substrate, comprising epitaxially growing an intermediate layer on a substrate and growing a heteroepitaxial layer on the intermediate layer, characterized in that the thermal expansion coefficient of the intermediate layer is set to be intermediate between the thermal expansion coefficient of the substrate and the thermal expansion coefficient of the heteroepitaxial layer.

4. The method for manufacturing a heteroepitaxial substrate according to claim 3, characterized in that the substrate after growing the heteroepitaxial layer is plastically deformed and contains dislocations throughout its entire surface.

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