Amplifier to suppress multiple harmonics

Abstract

In an example, an amplifier is provided. The comprises a first pair of transistors comprising a first transistor and a second transistor. The amplifier also comprises a first trace connected to a drain of the first transistor, and a second trace connected to a drain of the second transistor. The amplifier also comprises a harmonic reduction first circuit comprising a harmonic reduction first subcircuit and a harmonic reduction second subcircuit. The harmonic reduction first subcircuit comprises a first inductor and a first capacitor. The first inductor and the first capacitor are connected between a first node and a first reference voltage. The harmonic reduction first subcircuit also comprises a second inductor. The second inductor and one of the first capacitor and a second capacitor are connected between a second node and the first reference voltage. The harmonic reduction second subcircuit comprises a third inductor and a third capacitor. The third inductor and the third capacitor are connected between the first node and the first reference voltage. The harmonic reduction second subcircuit also comprises a fourth inductor. The fourth inductor and one of the third capacitor and a fourth capacitor are connected between the second node and the first reference voltage. The amplifier further comprises a third trace connected to the first node. At least part of the third trace is adjacent and substantially parallel to a first at least part of the first trace. The amplifier further comprises a fourth trace connected to the second node. At least part of the fourth trace is adjacent and substantially parallel to a first at least part of the second trace.

Description

[0001] P114096W001

[0002] 1

[0003] AMPLIFIER TO SUPPRESS MULTIPLE HARMONICS

[0004] Technical Field

[0005] 5 Example embodiments of this disclosure relate to an amplifier with improved harmonic rejection, for example including one or more harmonic reduction circuits.

[0006] Background

[0007] 10 A power amplifier (PA) is a key building block in many transmitter chains, and usually consumes the majority of the power budget for the transmitter chain. For the PA, there is a trade-off between efficiency and linearity. Generally, the linearity of the PA can be enhanced and corrected by using Digital Pre-Distortion (DPD), but this is generally only feasible for PAs with large output power levels.

[0008] 15

[0009] Large Antennas are antenna solutions which are gaining interest and considered to be one way forward to improve network performance. The antenna gain can also be used to reduce the output power per PA to enable use of technologies, such as CMOS, and a high-level of integration to reduce cost and give scalable solutions. When the PA output power becomes relatively low, such as in the order of a few hundred mW, the power consumption of DPD of around 0.5W becomes very costly. Consequently, CMOS may require solutions without DPD to reach an acceptable power consumption and cost budget and could be based on PA with an enhanced intrinsic level of linearity.

[0010] 25 One way to improve linearity and efficiency is the dual-drive technique, as illustrated for example in Zhang et al, “A 20-GHz 1.9-mW LNA Using gm-Boost and Current-Reuse Techniques in 65-nm CMOS for Satellite Communications,” IEEE Journal of Solid-State Circuits, vol. 55, no. 10, October 2020, and Zhang etal, “Broadband Gm-Boosted Differential HBT Doublers with Transformer Balun,” IEEE Transactions on Microwave Theory and 30 Techniques, vol. 59, no. 11, November 2011. In these references, both the gate and source are driven in anti-phase and virtually lower the threshold voltage.

[0011] The derivative superposition (DS) technique, as illustrated for example in Martinez et al, “Linearity Performance of Derivative Superposition in GaN HEMTs: A Device-to-Circuit 35 Perspective,” IEEE Transactions on Electron Devices, vol. 70, no. 5, May 2023, focuses on linearizing the transconductance (gm1) profile by employing third-order transconductance (gm3) cancellation via the derivative superposition of multi-transistor devices of varying P114096W001

[0012] 2

[0013] threshold voltages at the device level (i.e., embedded within a single device footprint), since any reduction in gm3 will directly translate to an improvement in the output third-order intercept point (01 P3).

[0014] 5 An additional improvement to PA performance is to use cancellation of the feedforward path in the active device, i.e. cancellation of the gate-drain parasitic capacitance (also referred to as cgd). To cancel the feedforward path cross coupled capacitors (Cn) are used, and these capacitors can either be implemented (in CMOS) by nMOS or MOM (metal-oxide-metal) capacitors.

[0015] 10

[0016] Instead of using nMOS or MOS capacitors, pMOS devices may be used to improve Amplitude-to-Phase (AM-PM) linearity specifically. pMOS are complementary to nMOS and the input gate-source parasitic capacitance (cgs) changes inversely to how nMOS input capacitance changes. The difference between cgd and Cn dominates the imaginary part of 15 the of vout / vin transfer function in a common source (CS) stage. Using a nMOS device as Cn would increase the cgd-Cn difference, while a pMOS device would limit the difference and limit the AM-PM distortion.

[0017] Another measure to achieve a good linearity is to use harmonic cancellation or suppression at the interstage and output stage matching networks. In Park et al, “Highly Linear CMOS Power Amplifier for mm-Wave Applications,” IEEE MTTS- International Microwave Symposium (IMS), 2017, and Park et al, “A High Efficiency 39GHz CMOS Cascode Power Amplifier for 5G Applications,” IEEE Radio Frequency Integrated Circuits (RFIC) Symposium, pp. 179-182, 2019, a two-step (L-C and C-L) second harmonic termination 25 scheme for CMOS cascode PAs suitable for cm-Wave / mm-Wave frequencies and crosscoupled capacitor neutralization is provided.

[0018] In this disclosure, the term “harmonic reduction” is used to describe reducing harmonic signals in a circuit, including for example harmonic cancellation, in which specific

[0019] 30 frequencies may be short-circuited to ground, and harmonic suppression, which provides high impedance for specific frequencies in the signal path.

[0020] While the cross-coupled neutralization capacitors referred to above may improve gain and stability, they cause more second harmonics to leak back to the PA input gates which 35 creates distortion. To improve linearity and harmonic cancellation, traps can be placed at the drains of a common-source (CS) stage or in between CS and common-gate (CG) stages, for example in a cascode amplifier. To suppress the additional frequency P114096W001

[0021] 3

[0022] components, the traps provide a low impedance towards ground for the unwanted signals, as illustrated in the Park et al reference, “A High Efficiency 39GHz CMOS Cascode Power Amplifier for 5G Applications,” referred to above.

[0023] 5 In this reference, two harmonic cancellation / suppression networks are highlighted and both will consume physical space and impact the layout of the circuit, particularly the network based on Lp1 ,2 and Cs1 (capacitors at cm-Wave / mm-Wave, such as Cp1,2, are relatively small in size and a single inductance, such as Ls1, can be routed to from a “distant” location to the connection point of Cp1 ,2). The layout of the interstage matching may separate the 10 CS and CG stages physically and introduce parasitic inductance, which can have an impact on output power, bandwidth, and linearity.

[0024] Summary

[0025] 15 One or more embodiments of this disclosure may have one or more advantages. For example, examples of this disclosure may mitigate problems referred to above regarding output power, bandwidth and / or linearity of amplifiers, such as for example those problems referred to above regarding output power, bandwidth and linearity of a multi-stage or cascode amplifier that includes one or more harmonic reduction circuits.

[0026] One aspect of the present disclosure provides an amplifier comprising a first pair of transistors comprising a first transistor and a second transistor. The amplifier also comprises a first trace connected to a drain of the first transistor, and a second trace connected to a drain of the second transistor. The amplifier also comprises a harmonic 25 reduction first circuit comprising a harmonic reduction first subcircuit and a harmonic reduction second subcircuit. The harmonic reduction first subcircuit comprises a first inductor and a first capacitor. The first inductor and the first capacitor are connected between a first node and a first reference voltage. The harmonic reduction first subcircuit also comprises a second inductor. The second inductor and one of the first capacitor and a 30 second capacitor are connected between a second node and the first reference voltage.

[0027] The harmonic reduction second subcircuit comprises a third inductor and a third capacitor. The third inductor and the third capacitor are connected between the first node and the first reference voltage. The harmonic reduction second subcircuit also comprises a fourth inductor. The fourth inductor and one of the third capacitor and a fourth capacitor are 35 connected between the second node and the first reference voltage. The amplifier further comprises a third trace connected to the first node. At least part of the third trace is adjacent and substantially parallel to a first at least part of the first trace. The amplifier further P114096W001

[0028] 4

[0029] comprises a fourth trace connected to the second node. At least part of the fourth trace is adjacent and substantially parallel to a first at least part of the second trace.

[0030] Another aspect of the present disclosure comprises an amplifier comprising a first pair of 5 transistors comprising a first transistor and a second transistor. The amplifier also comprises a first trace connected to a drain of the first transistor. The amplifier also comprises a second trace connected to a drain of the second transistor. The amplifier also comprises a harmonic reduction first circuit comprising a harmonic reduction first subcircuit. The harmonic reduction first subcircuit comprises a first inductor and a first capacitor. The 10 first inductor and the first capacitor are connected between a first node and a first reference voltage. The harmonic reduction first subcircuit also comprises a second inductor. The second inductor and one of the first capacitor and a second capacitor are connected between a second node and the first reference voltage. The amplifier further comprises a third trace connected to the first node. At least part of the third trace is adjacent and

[0031] 15 substantially parallel to a first at least part of the first trace. The amplifier further comprises a fourth trace connected to the second node. At least part of the fourth trace is adjacent and substantially parallel to a first at least part of the second trace. The harmonic reduction first circuit further comprises a harmonic reduction third subcircuit. The harmonic reduction third subcircuit comprises a fifth inductor and a fifth capacitor. The fifth inductor and the fifth capacitor are connected between a third node and a first reference voltage. The harmonic reduction third subcircuit also comprises a sixth inductor. The sixth inductor and one of the fifth capacitor and a sixth capacitor are connected between a fourth node and the first reference voltage. The amplifier further comprises a fifth trace connected to the third node. At least part of the fifth trace is adjacent and substantially parallel to the first at least part of 25 the first trace. The amplifier further comprises a sixth trace connected to the fourth node. At least part of the sixth trace is adjacent and substantially parallel to the first at least part of the second trace.

[0032] Other aspects of the present disclosure provide an integrated circuit comprising the amplifier 30 of the above aspect, and an electronic apparatus comprising the amplifier of the above aspect.

[0033] Brief Description of the Drawings

[0034] 35 For a better understanding of examples of the present disclosure, and to show more clearly how the examples may be carried into effect, reference will now be made, by way of example only, to the following drawings in which: P114096W001

[0035] 5

[0036] Figure 1 is a circuit diagram of an amplifier including a harmonic reduction circuit; Figures 2A and 2B are circuit diagrams of amplifiers according to examples of this disclosure;

[0037] 5 Figure 3 is a circuit diagram of another amplifier according to an example of this disclosure;

[0038] Figure 4 is a circuit diagram of another amplifier according to an example of this disclosure;

[0039] Figure 5 is a circuit diagram of another amplifier according to an example of this 10 disclosure;

[0040] Figure 6 is a circuit diagram of another amplifier according to an example of this disclosure;

[0041] Figure 7 is a circuit diagram of another amplifier according to an example of this disclosure;

[0042] 15 Figure 8 is a circuit diagram of another amplifier according to an example of this disclosure;

[0043] Figure 9 is a circuit diagram of another amplifier according to an example of this disclosure;

[0044] Figure 10 illustrates an example of an integrated circuit according to an example of this disclosure; and

[0045] Figure 11 illustrates an example of an electronic apparatus according to an example of this disclosure.

[0046] Detailed Description

[0047] 25

[0048] The following sets forth specific details, such as particular embodiments or examples for purposes of explanation and not limitation. It will be appreciated by one skilled in the art that other examples may be employed apart from these specific details.

[0049] 30 Examples of this disclosure provide amplifiers including one or more harmonic reduction circuits and subcircuits. A harmonic reduction circuit or subcircuit may have traces at least part of which may be located adjacent and substantially parallel to at least part of traces in the amplifier, for example to at least partially mitigate negative effects of traces in the amplifier. Additionally or alternatively, a harmonic reduction circuit or subcircuit may at least 35 partially reduce harmonics and their effects in the amplifier or at the output of the amplifier.

[0050] Examples of this disclosure may provide one or more of the following advantages: P114096W001

[0051] 6

[0052] • Radio Frequency (RF) trace inductance is reduced or eliminated completely (if a perfect coupling factor can be provided) and RF performance can be enhanced. • Harmonic cancellation may be provided by the leakage inductance of secondary inductance or an additional inductance, introduced on purpose, together with a 5 capacitance.

[0053] • Examples of this disclosure may not require any additional space on an integrated circuit (IC) but can be merged with existing RF traces or harmonic cancellation circuitry.

[0054] • The linear output power can be increased almost 1 dB.

[0055] 10 • Harmonic suppression may be provided by two coupled inductors together with one or two capacitances.

[0056] • The harmonic cancellation and harmonic suppression techniques may be based on transformers (i.e. coupling of adjacent inductances) and can be combined to enhance the overall harmonic reduction, both within and between amplifier stages as well as part of load matching networks.

[0057] • Examples of this disclosure may be applicable in both base station (BS) and User Equipment (UE) applications.

[0058] • Examples of this disclosure may reduce multiple harmonics, further reduce a specific frequency like clock spurs to protect sensitive RX bands, and / or further increase PA efficiency and / or linearity.

[0059] Examples of this disclosure may effectively create a transformer between parts of a harmonic reduction circuit and RF traces in an amplifier. The transformer may in some examples be routed in two different layers such that the traces have as large as possible 25 coupling factor and the currents may have different directions. When the currents have different directions in some examples, the mutual inductance may reduce or cancel the electrical field and apparent inductances in both traces constituting the transformer.

[0060] In some examples, harmonic suppression circuitry can be combined with harmonic

[0061] 30 cancellation circuitry, i.e. combining a low impedance path together with a high impedance path, enhancing the total reduction of harmonics.

[0062] Figure 1 is a circuit diagram of an amplifier 100 including a harmonic reduction circuit. The amplifier 100 comprises a first pair of transistors comprising a first transistor 102 and a 35 second transistor 104. The amplifier 100 also comprises a first trace connected to a drain of the first transistor 102, and a second trace connected to a drain of the second transistor 104. P114096W001

[0063] 7

[0064] A harmonic reduction first circuit 110 of the amplifier 100 comprises at least one first inductor connected between a first node 112 and a second node 114. The harmonic reduction first circuit 110 further comprises a third trace connected to the first node 112, and a fourth trace 5 connected to the second node 114.

[0065] At least part of the third trace 116 is adjacent and substantially parallel to a first at least part of the first trace 118. Similarly, at least part of the fourth trace 120 is adjacent and substantially parallel to a first at least part of the second trace 122.

[0066] 10

[0067] The at least parts of the first trace 118, second trace 122, third trace 116 and fourth trace 120 (and other traces and parts of traces) are shown in the Figures as being inductances. However, this does not mean that the traces or parts thereof are necessarily implemented as inductors, but instead to illustrate their inherent inductance, which (at least in the case of the 15 first and second traces, and other traces outside of the harmonic reduction circuits described herein) is generally undesirable. This inductance may arise for example due to the separation of a pair of transistors from other components or nodes, such as for example separation from another pair of transistors or output nodes of an amplifier. The separation may arise in some examples as a result of inclusion of one or more harmonic reduction circuits.

[0068] The aim of having least part of the third trace 116 adjacent and substantially parallel to a first at least part of the first trace 118, and at least part of the fourth trace 120 adjacent and substantially parallel to a first at least part of the second trace 122, is to increase the

[0069] 25 inductive coupling between the at least part of the third trace 116 and the first at least part of the first trace 118, and between the at least part of the fourth trace 120 and the first at least part of the second trace 122.

[0070] These features and properties of the first, second, third and fourth traces may also be 30 applicable to similar traces in other amplifiers according to this disclosure and described below.

[0071] In some examples, at least parts of the first trace 118 and third trace 116 are in different layers of an integrated circuit. For example, the at least part of the third trace 116 is in a 35 different layer of an integrated circuit to the first at least part of the first trace 118, wherein the first at least part of the first trace 118 is positioned over the at least part of the third trace 116 or the at least part of the third trace 116 is positioned over the first at least part of the P114096W001

[0072] 8

[0073] first trace 118. Similarly, in some examples, at least parts of the second trace 122 and fourth trace 120 are in different layers of an integrated circuit. For example, the at least part of the fourth trace 120 is in a different layer of an integrated circuit to the first at least part of the second trace 122, wherein the first at least part of the second trace 122 is positioned 5 over the at least part of the fourth trace 120 or the at least part of the fourth trace 120 is positioned over the first at least part of the second trace 122. Having parts of traces in different layers of an integrated circuit may allow for example pairs of parts of traces to be closer together than if they are in the same layer, and thus increase the mutual inductance between them (e.g. between at least parts of the first trace 118 and third trace 116, and 10 between at least parts of the second trace 122 and fourth trace 120). For example, the parts of traces may be in adjacent layers, with no other layers in between, though the parts of traces in different layers do not touch, except where they are connected electrically, for example as in the case of the first at least part of the first trace 118 and the at least part of the third trace 116, which are electrically connected at the drain of the transistor 102.

[0074] 15

[0075] In some examples, a coupling factor between the first at least part of the first trace 118 and he at least part of the third trace 116 is greater than or substantially equal to 0.5, or is in the range 0.5-1.0. Similarly, in some examples, a coupling factor between the first at least part of the second trace 122 and the at least part of the fourth trace 120 is greater than or substantially equal to 0.5, or is in the range 0.5-1.0. Generally, in some examples, it is desirable to achieve a higher coupling factor so as to further reduce the effects of inductance in the first and second traces. Additionally or alternatively, in some examples, an inductance of the first at least part of the first trace 118 is substantially the same as an inductance of the at least part of the third trace 116, and an inductance of the first at least part of the second 25 trace 122 is substantially the same as an inductance of the at least part of the fourth trace 120.

[0076] The first trace may be connected in some examples between the drain of the first transistor 102 and a first output node 154 of the amplifier 100, and second trace may be connected in 30 some examples between the drain of the second transistor 104 and a second output node 156 of the amplifier 100. The output nodes 154 and 156 may thus in some examples provide a differential output signal from the amplifier 100. The output nodes may be connected in some examples to another amplifier, another amplifier stage or another pair of transistors, or alternatively to a load. In some examples, a differential input voltage may be 35 provided to the gates of the first transistor 102 and the second transistor 104, suitably biased for example. P114096W001

[0077] 9

[0078] In the example shown in Figure 1 , the sources of the first transistor 102 and the second transistor 104 are connected to a first reference voltage, such as for example a first power supply voltage, Vss, ground, zero volts or any other suitable reference voltage. However, in other examples, the sources may be connected otherwise, such as for example to outputs of 5 another pair of transistors, another amplifier, or another amplifier stage.

[0079] In some examples, for example as shown in Figure 1, the third trace is connected between the first node 112 and the drain of the first transistor 102, and the fourth trace is connected between the second node 114 and the drain of the second transistor 104.

[0080] 10

[0081] In some examples, the physical directions of at least the parts of the third trace 116 and the fourth trace 120 are chosen relative to the physical directions of at least the parts of the first trace 118 and second trace 122 respectively. For example, a physical direction of the first at least part of the first trace 118 away from the drain of the first transistor 102 is substantially 15 the same physical direction as the physical direction of the at least part of the third trace 116 towards the first node 112. In addition, for example, a physical direction of the first at least part of the second trace 122 away from the drain of the second transistor 104 is substantially the same physical direction as the physical direction of the at least part of the fourth trace 120 towards the second node 114. The physical directions of at least the parts of the third trace 116 and the fourth trace 120 may be chosen for example to ensure that the currents of signals in the at least parts of the third trace 116 and the fourth trace 120 are in a direction to at least partially cancel the effects of inductance in at least the parts of the first trace 118 and second trace 122 respectively.

[0082] 25 In this disclosure, it is proposed to include multiple resonance networks in an amplifier such that harmonic suppression is more broadband, reduce specific harmonics even further, and / or suppress multiple harmonics. Examples of this disclosure may use a single transformer or may add additional transformers with harmonic suppression networks.

[0083] Example amplifiers of this disclosure may include one or more harmonic reduction circuits 30 that can cancel the two key contributors to a device’ nonlinearity, for example second and third order non-linearities, and potentially increase amplifier efficiency, for example when moving from Class-A towards Class-C.

[0084] Figure 2A is a circuit diagram of an amplifier 200 according to an example of this disclosure.

[0085] 35 The amplifier 200 comprises a first pair of transistors comprising a first transistor 202 and a second transistor 204. The amplifier 200 also comprises a first trace connected to a drain of the first transistor 202. The amplifier 200 also comprises a second trace connected to a P114096W001

[0086] 10

[0087] drain of the second transistor 204. The amplifier 200 also comprises a harmonic reduction first circuit 210 comprising a harmonic reduction first subcircuit and a harmonic reduction second subcircuit.

[0088] 5 The harmonic reduction first subcircuit comprises a first inductor 212 and a first capacitor 214. The first inductor 212 and the first capacitor 214 are connected between a first node 216 and a first reference voltage, for example ground. The harmonic reduction first subcircuit also comprises a second inductor 218. In the example amplifier 200 shown in Figure 2A, the second inductor 218 and the first capacitor 214 are connected between the 10 second node 220 and the first reference voltage, though in other examples the second inductor 218 and a second capacitor may instead be connected between the second node 220 and the first reference voltage. Figure 2B illustrates this arrangement, where the harmonic reduction first subcircuit comprises the first inductor 212 and the first capacitor 214 connected between a first node 216 and the first reference voltage, and the harmonic 15 reduction first subcircuit also comprises the second inductor 218 and a second capacitor 215 connected between the second node 220 and the first reference voltage. In this disclosure, an inductor and capacitor connected between two nodes means for example connected as shown in Figure 2A or 2B and not connected in parallel between the two nodes.

[0089] The harmonic reduction second subcircuit comprises a third inductor 222 and a third capacitor 224. The third inductor 222 and the third capacitor 224 are connected between the first node 216 and the first reference voltage. The harmonic reduction second subcircuit also comprises a fourth inductor 226. In the example amplifier 200 shown in Figure 2A, the fourth inductor 226 and the third capacitor 224 are connected between the second node 220 and 25 the first reference voltage, though in other examples the fourth inductor 226 and a fourth capacitor (not shown) may instead be connected between the second node 220 and the first reference voltage. That is, in some examples, the harmonic reduction second subcircuit may have the same structure as the example of the harmonic reduction first subcircuit shown in Figure 2B, which comprises the inductors 212 and 218 and capacitors 214 and 30 215.

[0090] The amplifier 200 further comprises a third trace 228 connected to the first node 216. At least part of the third trace 228 is adjacent and substantially parallel to a first at least part of the first trace 206. The amplifier further comprises a fourth trace 230 connected to the 35 second node 220. At least part of the fourth trace 230 is adjacent and substantially parallel to a first at least part of the second trace 208. P114096W001

[0091] 11

[0092] In the example shown in Figure 2A or 2B, the third trace 228 is connected between the first node 216 and the drain of the first transistor 202, and the fourth trace 230 is connected between the second node 220 and the drain of the second transistor 204. However, other connection arrangements are possible. Figure 3 is a circuit diagram of another amplifier 300 5 according to an example of this disclosure. Components that are similar to those of the amplifier 200 shown in Figure 2A or 2B are given like reference numerals. In the amplifier 300 of Figure 3, the first at least part of the first trace 206 and the third trace 228 are connected between the first node 216 and the drain of the first transistor 202, and the first at least part of the second trace 208 and the fourth trace 230 are connected between the 10 second node 220 and the drain of the second transistor 204. In this disclosure, inductors connected between two nodes means for example connected or end-to-end between the two nodes, or not connected in parallel between the two nodes. Figure 4 is a circuit diagram of another amplifier 400 according to an example of this disclosure. Components that are similar to those of the amplifier 200 shown in Figure 2A or 2B are given like reference 15 numerals. In the amplifier 400 of Figure 4, the third trace 228 is connected between the first node 216 and a first reference voltage, and the fourth trace 230 is connected between the second node 220 and the first reference voltage.

[0093] The arrangements shown in Figures 2 and 3 may provide a low impedance or short circuit for specific frequencies (e.g. the resonant frequencies of subcircuits) to a first reference voltage such as ground. Thus, the harmonic reduction in such cases may also be referred to as harmonic cancellation. On the other hand, The arrangement shown in Figure 4 may present a high impedance in the signal path for specific frequencies (e.g. the resonant frequencies of subcircuits). Thus, the harmonic reduction in such cases may also be 25 referred to as harmonic suppression.

[0094] Figure 5 is a circuit diagram of another amplifier 500 according to an example of this disclosure. Components that are similar to those of the amplifier 500 shown in Figure 5 are given like reference numerals. The amplifier 500 of Figure 5 comprises a first pair of 30 transistors comprising a first transistor 202 and a second transistor 204. The amplifier 500 also comprises a first trace connected to a drain of the first transistor 202. The amplifier 500 also comprises a second trace connected to a drain of the second transistor 204. The amplifier 500 also comprises a harmonic reduction first circuit 210 comprising a harmonic reduction first subcircuit and a harmonic reduction third subcircuit.

[0095] 35

[0096] The harmonic reduction first subcircuit comprises a first inductor 212 and a first capacitor 214. The first inductor 212 and the first capacitor 214 are connected between a first node P114096W001

[0097] 12

[0098] 216 and a first reference voltage, for example ground. The harmonic reduction first subcircuit also comprises a second inductor 218. In the example amplifier 500 shown in Figure 5, the second inductor 218 and the first capacitor 214 are connected between the second node 220 and the first reference voltage, though in other examples the second 5 inductor 218 and a second capacitor (not shown) may instead be connected between the second node 220 and the first reference voltage.

[0099] The amplifier 500 further comprises a third trace 228 connected to the first node 216. At least part of the third trace 228 is adjacent and substantially parallel to a first at least part of 10 the first trace 206. The amplifier further comprises a fourth trace 230 connected to the second node 220. At least part of the fourth trace 230 is adjacent and substantially parallel to a first at least part of the second trace 208.

[0100] The harmonic reduction third subcircuit comprises a fifth inductor 232 and a fifth capacitor 15 234. The fifth inductor 232 and the fifth capacitor 234 are connected between a third node 236 and a first reference voltage. The harmonic reduction third subcircuit also comprises a sixth inductor 238. In the example shown in Figure 5, the sixth inductor 238 and the fifth capacitor 234 are connected between a fourth node 240 and the first reference voltage, though in other examples the sixth inductor 238 and a sixth capacitor (not shown) may be connected between a fourth node 240 and the first reference voltage.

[0101] The amplifier 500 further comprises a fifth trace 242 connected to the third node 236. At least part of the fifth trace 242 is adjacent and substantially parallel to the first at least part of the first trace 206. The amplifier 500 further comprises a sixth trace 244 connected to the 25 fourth node 240. At least part of the sixth trace 244 is adjacent and substantially parallel to the first at least part of the second trace 208.

[0102] In some examples, the third subcircuit may also be included in the amplifier 200 shown in Figure 2A or 2B. That is, in some examples, the amplifier 200 of Figure 2A or 2B may 30 further comprise a harmonic reduction third subcircuit comprising a fifth inductor 232 and a fifth capacitor 234. The fifth inductor 232 and the fifth capacitor 234 are connected between a third node 236 and a first reference voltage. The amplifier 200 of Figure 2A or 2B may further comprise a sixth inductor 238. The sixth inductor 238 and one of the fifth capacitor 234 and a sixth capacitor are connected between a fourth node 240 and the first reference 35 voltage. The amplifier 200 may further comprise a fifth trace 242 connected to the third node 236. At least part of the fifth trace 242 is adjacent and substantially parallel to the first at least part of the first trace 206. The amplifier 200 may further comprise a sixth trace 244 P114096W001

[0103] 13

[0104] connected to the fourth node 240. At least part of the sixth trace 244 is adjacent and substantially parallel to the first at least part of the second trace 208.

[0105] In the example shown in Figure 5, the fifth trace 242 is connected between the third node 5 236 and the drain of the first transistor 202, and the sixth trace 244 is connected between the fourth node 240 and the drain of the second transistor 204. In other examples, the first trace and the fifth trace 242 are connected between the third node 236 and the drain of the first transistor 202, and the second trace and the sixth trace 244 are connected between the fourth node 240 and the drain of the second transistor 204. In other examples, the fifth trace 10 242 is connected between the third node 236 and a first reference voltage, and the sixth trace 244 is connected between the fourth node 240 and the first reference voltage.

[0106] In the example shown in Figure 5, the third trace 228 is connected between the first node 216 and the drain of the first transistor 202, and the fourth trace 230 is connected between 15 the second node 220 and the drain of the second transistor 204. However, other connection arrangements are possible, such as for example the arrangements shown in Figures 3 and 4 for the third trace 228 and the fourth trace 230. For example, the third trace 228 may be connected between the first node 216 and the first reference voltage (e.g. ground), and the fourth trace 230 may be connected between the second node 220 and the first reference voltage. Similarly, in some examples, the fifth trace 242 may be connected between the third node 236 and the first reference voltage, and the sixth trace 244 may be connected between the fourth node 240 and the first reference voltage.

[0107] In some examples, a further inductor may be included in any one or more of the harmonic 25 reduction subcircuits described herein. The further inductor may be connected for example with the capacitor in the subcircuit, or between the capacitors and the first reference voltage. In a particular example, Figure 6 is a circuit diagram of another amplifier 600 according to an example of this disclosure. In the example shown in Figure 6, the harmonic reduction first subcircuit comprises a first further inductor 246, which is connected in series between the 30 first capacitor 214 and the first reference voltage. In an alternative example arrangement, the first capacitor 214 may be connected between the first further inductor 246 and the first reference voltage. In another alternative example arrangement, the first further inductor 246 may be connected between the first reference voltage and each of the first capacitor 214 and second capacitor (not shown).

[0108] 35

[0109] In the example shown in Figure 6, the harmonic reduction second subcircuit also comprises a second further inductor 248, which is connected between the third capacitor 224 and the P114096W001

[0110] 14

[0111] first reference voltage. In an alternative example arrangement, the third capacitor 224 may be connected between the second further inductor 248 and the first reference voltage. In another alternative example arrangement, the second further inductor 248 may be connected between the first reference voltage and each of the third capacitor 224 and fourth 5 capacitor (not shown).

[0112] Some examples of this disclosure may include cross-coupled capacitors. For example, an amplifier as disclosed herein may in some examples include a first capacitor connected between the gate of the first transistor 202 and the drain of the second transistor 204, and a 10 second capacitor connected between the gate of the second transistor 204 and the drain of the first transistor 202.

[0113] In some examples, an amplifier according to this disclosure may include a load (not shown) connected between a first load node and a second load node of the amplifier. The first trace 15 may be connected between a drain of the first transistor 202 and the first load node, and the second trace may be connected between a drain of the second transistor 204 and the second load node.

[0114] In some examples, in an amplifier according to this disclosure, the first trace may be connected between a drain of the first transistor 202 and a first output node of the amplifier, and the second trace may be connected between a drain of the second transistor 204 and a second output node of the amplifier. The first and second output nodes may be for example differential output nodes of the amplifier. A load may in some examples be connected between the first output node and the second output node.

[0115] 25

[0116] An amplifier according to any of the examples disclose herein may in some examples include a second pair of transistors. Figure 7 is a circuit diagram of another amplifier 700 according to an example of this disclosure, which shows the example amplifier 200 of Figure 2A including a second pair of transistors. As shown in Figure 7, the amplifier 700 comprises 30 a third transistor 702 and a fourth transistor 704. The drain of the first transistor 202 is connected to a source of the third transistor 702 via the first trace 206, and a drain of the second transistor 204 is connected to a source of the fourth transistor 704 via the second trace 208. Thus, in some examples, an amplifier according to this disclosure may be a cascode amplifier or may be part of a cascode amplifier. In some examples, a load (not 35 shown) may be connected between a drain of the third transistor 702 and a drain of the fourth transistor 704. In some examples, a drain of the third transistor and a drain of the fourth transistor comprise differential output nodes of the amplifier 700. P114096W001

[0117] 15

[0118] Some examples of this disclosure may also include a third pair of transistors comprising a fifth transistor and a sixth transistor. In such examples, a source of the fifth transistor and a drain of the sixth transistor are connected to a first reference voltage, a drain of the fifth 5 transistor is connected to a source of the first transistor 202, and a drain of the sixth transistor is connected to a source of the second transistor 204. A gate of the fifth transistor and a gate of the sixth transistor may in such examples comprise differential voltage input nodes of the amplifier.

[0119] 10 Figure 8 is a circuit diagram of another amplifier 800 according to an example of this disclosure. The amplifier 800 includes a harmonic reduction first circuit 210 that includes the first, second and third subcircuits described above. In addition, the harmonic reduction first circuit comprises a harmonic reduction fourth subcircuit. The harmonic reduction fourth subcircuit comprises a seventh inductor 250 and a seventh capacitor 252. The seventh 15 inductor 250 and the seventh capacitor 252 are connected between the third node 236 and the first reference voltage. The harmonic reduction fourth subcircuit also comprises an eighth inductor 254. The eighth inductor 254 and one of the seventh capacitor 252 and an eighth capacitor are connected between the fourth node 240 and the first reference voltage.

[0120] In some examples of amplifiers disclosed herein, a physical direction of the first at least part of the first trace 206 away from the drain of the first transistor 202 is substantially the same physical direction as the physical direction of the at least part of the third trace 228 towards the first node 216. Additionally or alternatively, in some examples, a physical direction of the first at least part of the second trace 208 away from the drain of the second transistor 204 is 25 substantially the same physical direction as the physical direction of the at least part of the fourth trace 230 towards the second node 220.

[0121] In some examples of amplifiers disclosed herein, the at least part of the third trace 228 is in a different layer of an integrated circuit to the first at least part of the first trace 206, wherein 30 the first at least part of the first trace 206 is positioned over the at least part of the third trace 228 or the at least part of the third trace 228 is positioned over the first at least part of the first trace 206. Additionally or alternatively, in some examples, the at least part of the fourth trace 230 is in a different layer of an integrated circuit to the first at least part of the second trace 208, wherein the first at least part of the second trace 208 is positioned over the at 35 least part of the fourth trace 230 or the at least part of the fourth trace 230 is positioned over the first at least part of the second trace 208. P114096W001

[0122] 16

[0123] In some examples of amplifiers disclosed herein, a physical direction of the first at least part of the first trace 206 away from the drain of the first transistor 202 is substantially the same physical direction as the physical direction of the at least part of the fifth trace 242 towards the third node 236. Additionally or alternatively, in some examples, a physical direction of 5 the first at least part of the second trace 208 away from the drain of the second transistor 204 is substantially the same physical direction as the physical direction of the at least part of the sixth trace 244 towards the fourth node 240.

[0124] In some examples of amplifiers disclosed herein, the at least part of the fifth trace 242 is in a 10 different layer of an integrated circuit to the first at least part of the first trace 206, wherein the first at least part of the first trace 206 is positioned over the at least part of the fifth trace 242 or the at least part of the fifth trace 242 is positioned over the first at least part of the first trace 206. Additionally or alternatively, in some examples, the at least part of the sixth trace 244 is in a different layer of an integrated circuit to the first at least part of the second trace 15 208, wherein the first at least part of the second trace 208 is positioned over the at least part of the sixth trace 244 or the at least part of the sixth trace 244 is positioned over the first at least part of the second trace 208.

[0125] In some examples of amplifiers disclosed herein, the at least part of the third trace 228 is in a different layer of an integrated circuit to the at least part of the fifth trace 242, and the at least part of the fourth trace 230 is in a different layer of an integrated circuit to the at least part of the sixth trace 244. Additionally or alternatively, in some examples, the first at least part of the first trace 206 is positioned between the at least part of the third trace 228 and the at least part of the fifth trace 242, and the first at least part of the second trace 208 is 25 positioned between the at least part of the fourth trace 230 and the at least part of the sixth trace 244.

[0126] In some examples of amplifiers of this disclosure, a coupling factor between the first at least part of the first trace and the at least part of the third trace is greater than or substantially 30 equal to 0.5, or is in the range 0.5-1.0. Additionally or alternatively, in some examples, a coupling factor between the first at least part of the second trace and the at least part of the fourth trace is greater than or substantially equal to 0.5, or is in the range 0.5-1.0.

[0127] Similarly, in some examples, a coupling factor between the first at least part of the first trace 35 and the at least part of the fifth trace is greater than or substantially equal to 0.5, or is in the range 0.5-1.0. Additionally or alternatively, in some examples, a coupling factor between the P114096W001

[0128] 17

[0129] first at least part of the second trace and the at least part of the sixth trace is greater than or substantially equal to 0.5, or is in the range 0.5-1.0.

[0130] Similarly, in some examples, a coupling factor between the second part of the first trace and 5 the at least part of the seventh trace is greater than or substantially equal to 0.5, or is in the range 0.5-1.0. Additionally or alternatively, in some examples, a coupling factor between the second part of the second trace and the at least part of the eighth trace is greater than or substantially equal to 0.5, or is in the range 0.5-1.0.

[0131] 10 The resonant frequency of each of the harmonic reduction subcircuits may in some examples be different to the resonant frequency of any one or more, or all, of the other harmonic reduction subcircuits in an amplifier according to this disclosure. Furthermore, in some examples, the resonant frequency of each of the harmonic reduction subcircuits may in some examples be the same as the resonant frequency of of any one or more, or all, of 15 the other harmonic reduction subcircuits in an amplifier according to this disclosure.

[0132] Figure 9 is a circuit diagram of another amplifier 900 according to an example of this disclosure. The amplifier 900 includes a harmonic reduction first circuit 210 that is the same as the harmonic reduction first circuit 210 shown in Figure 8, though in other examples the harmonic reduction first circuit 210 of the amplifier 900 of Figure 9 may include any two or more of the harmonic reduction first, second, third and fourth subcircuits described herein.

[0133] The amplifier 900 of Figure 9 includes a harmonic reduction second circuit 256. The harmonic reduction second circuit 256 comprises a harmonic reduction fifth subcircuit 25 comprising a ninth inductor 258 and a ninth capacitor 260. The ninth inductor 258 and the ninth capacitor 260 are connected between a fifth node 262 and the first reference voltage (e.g. ground). The harmonic reduction fifth subcircuit also comprises a tenth inductor 264. The tenth inductor 264 and one of the ninth capacitor 260 and a tenth capacitor (not shown) are connected between a sixth node 266 and the first reference voltage.

[0134] 30

[0135] The amplifier 900 further comprises a seventh trace 268 connected to the fifth node 262, wherein at least part of the seventh trace 268 is adjacent and substantially parallel to a second part of the first trace 270. The amplifier 900 further comprises an eighth trace 272 connected to the sixth node 266, wherein at least part of the eighth trace 272 is adjacent and 35 substantially parallel to a second part of the second trace 274. P114096W001

[0136] 18

[0137] In some examples, the seventh trace 268 is connected between the fifth node 262 and the first at least part of the first trace 206, and the eighth trace 272 is connected between the sixth node 266 and the first at least part of the second trace 208. Alternatively, in some examples, the seventh trace 268 and the first at least part of the first trace 206 are

[0138] 5 connected between the fifth node 262 and the drain of the first transistor 202, and the eighth trace 272 and first at least part of the second trace 208 are connected between the sixth node 266 and the drain of the second transistor 204. Alternatively, in some examples, the seventh trace 268 is connected between the fifth node 262 and the first reference voltage, and the eighth trace 272 is connected between the sixth node 266 and the first reference 10 voltage.

[0139] The first at least part of the first trace 206 and the second part of the first trace 270 may for example comprise different parts of the first trace. Additionally or alternatively, the first at least part of the second trace 208 and the second part of the second trace 274 may for 15 example comprise different parts of the second trace.

[0140] In some examples, a physical direction of the second part of the first trace 270 away from the drain of the first transistor 202 is substantially the same physical direction as the physical direction of the at least part of the seventh trace 268 towards the fifth node 262. Additionally or alternatively, in some examples, a physical direction of the second part of the second trace 274 away from the drain of the second transistor 204 is substantially the same physical direction as the physical direction of the at least part of the eighth trace 272 towards the sixth node 266.

[0141] 25 In some examples, the at least part of the seventh trace 268 is in a different layer of an integrated circuit to the second part of the first trace 270, wherein the second part of the first trace 270 is positioned over the at least part of the seventh trace 268 or the at least part of the seventh trace 268 is positioned over the second part of the first trace 270. Additionally or alternatively, in some examples, the at least part of the eighth trace 272 is in a different 30 layer of an integrated circuit to the second part of the second trace 274, wherein the second part of the second trace 274 is positioned over the at least part of the eighth trace 272 or the at least part of the eighth trace 272 is positioned over the second part of the second trace 274.

[0142] 35 The harmonic reduction fifth subcircuit may in some examples comprises a fifth further inductor. The fifth further inductor may be connected to the ninth capacitor 260 connected between the first reference voltage and the node between the ninth inductor 258 and the P114096W001

[0143] 19

[0144] tenth inductor 264. Alternatively, the fifth further inductor may be connected between the first reference voltage and each of the ninth 260 and tenth capacitors.

[0145] In some examples, the harmonic reduction second circuit comprises a harmonic reduction 5 sixth subcircuit comprising an eleventh inductor 276 and an eleventh capacitor 278. The eleventh inductor 276 and the eleventh capacitor 278 are connected between the fifth node 262 and the first reference voltage. The harmonic reduction sixth subcircuit also comprises a twelfth inductor 280. The twelfth inductor 280 and one of the eleventh capacitor 278 and a twelfth capacitor are connected between the sixth node 266 and the first reference voltage.

[0146] 10

[0147] In some examples, the harmonic reduction sixth subcircuit comprises a sixth further inductor. The sixth further inductor may be connected to the eleventh capacitor 278 connected between the first reference voltage and the node between the eleventh inductor 276 and the twelfth inductor 280. Alternatively, the sixth further inductor may be connected between the 15 first reference voltage and each of the eleventh 278 and twelfth capacitors.

[0148] In some examples, the harmonic reduction second circuit comprises a harmonic reduction seventh subcircuit comprising a thirteenth inductor 282 and a thirteenth capacitor 284. The thirteenth inductor 282 and the thirteenth capacitor 284 are connected between a seventh node 286 and the first reference voltage. The harmonic reduction seventh subcircuit also comprises a fourteenth inductor 288. The fourteenth inductor 288 and one of the thirteenth capacitor 284 and a fourteenth capacitor are connected i between an eighth node 290 and the first reference voltage. The amplifier 900 may also further comprise a ninth trace 291 connected to the seventh node 286, wherein at least part of the ninth trace 291 is adjacent 25 and substantially parallel to the second part of the first trace 270. The amplifier 900 may also further comprise a tenth trace 292 connected to the eighth node 290, wherein at least part of the tenth trace 292 is adjacent and substantially parallel to the second part of the second trace 274.

[0149] 30 In some examples, the ninth trace 291 is connected between the seventh node 286 and the first at least part of the first trace 206, and the tenth trace 292 is connected between the eighth node 290 and the first at least part of the second trace 208. Alternatively, in some examples, the ninth trace 291 and the first at least part of the first trace 206 are connected between the seventh node 286 and the drain of the first transistor 202, and the tenth trace 35 292 and first at least part of the second trace 208 are connected between the eighth node 290 and the drain of the second transistor 204. Alternatively, in some examples, the ninth trace 291 is connected between the seventh node 286 and the first reference voltage, and P114096W001

[0150] 20

[0151] the tenth trace 292 is connected between the eighth node 290 and the first reference voltage.

[0152] In some examples, a physical direction of the second part of the first trace 270 away from 5 the drain of the first transistor 202 is substantially the same physical direction as the physical direction of the at least part of the ninth trace 291 towards the seventh node 286.

[0153] Additionally or alternatively, in some examples, a physical direction of the second part of the second trace 292 away from the drain of the second transistor 204 is substantially the same physical direction as the physical direction of the at least part of the tenth trace 292 towards 10 the eighth node 290.

[0154] In some examples, the at least part of the ninth trace 291 is in a different layer of an integrated circuit to the second part of the first trace 270, wherein the second part of the first trace 270 is positioned over the at least part of the ninth trace 291 or the at least part of the 15 ninth trace 291 is positioned over the second part of the first trace 270. Additionally or alternatively, in some examples, the at least part of the tenth trace 292 is in a different layer of an integrated circuit to the second part of the second trace 274, wherein the second part of the second trace 274 is positioned over the at least part of the tenth trace 292 or the at least part of the tenth trace 292 is positioned over the second part of the second trace 274.

[0155] In some examples, the at least part of the seventh trace 268 is in a different layer of an integrated circuit to the at least part of the ninth trace 291 , and the at least part of the eighth trace 272 is in a different layer of an integrated circuit to the at least part of the tenth trace 292. Additionally or alternatively, in some examples, the second at least part of the first 25 trace 270 is positioned between the at least part of the seventh trace 268 and the at least part of the ninth trace 291, and the second at least part of the second trace 274 is positioned between the at least part of the eighth trace 272 and the at least part of the tenth trace 292.

[0156] In some examples the harmonic reduction seventh subcircuit comprises a seventh further 30 inductor. The seventh further inductor may be connected to the thirteenth capacitor 284 connected between the first reference voltage and the node between the thirteenth inductor 282 and the fourteenth inductor 288. Alternatively, the seventh further inductor may be connected between the first reference voltage and each of the thirteenth 284 and fourteenth capacitors.

[0157] 35

[0158] In some examples, the harmonic reduction second circuit comprises a harmonic reduction eighth subcircuit comprising a fifteenth inductor 293 and a fifteenth capacitor 294. The P114096W001

[0159] 21

[0160] fifteenth inductor 293 and the fifteenth capacitor 294 are connected between the seventh node 286 and the first reference voltage. The harmonic reduction eighth subcircuit also comprises a sixteenth inductor 295. The sixteenth inductor 295 and one of the fifteenth capacitor 294 and a sixteenth capacitor are connected between the eighth node 290 and 5 the first reference voltage.

[0161] The harmonic reduction eighth subcircuit in some examples comprises an eighth further inductor. The eighth further inductor may be connected to the fifteenth capacitor 294 connected between the first reference voltage and the node between the fifteenth inductor 10 293 and the sixteenth inductor 295. Alternatively, the eighth further inductor is connected between the first reference voltage and each of the fifteenth 294 and sixteenth capacitors.

[0162] In general, an amplifier according to this disclosure may include the harmonic reduction first circuit and / or the harmonic reduction second circuit describe herein. The harmonic reduction 15 first circuit may include any one or more of the first, second, third and / or fourth subcircuits, and the harmonic reduction second circuit may include any one or more of the fifth, sixth, seventh and / or eighth subcircuits.

[0163] In examples of this disclosure, NMOS transistors are used for the first, second, third, fourth, fifth and sixth transistors (where present). However, in other examples, a PMOS transistor may instead be used for each of one or more of these transistors.

[0164] In examples of this disclosure, input voltages comprising a differential input voltage signal may be provided to the gates of the first and second transistors. However, in other

[0165] 25 examples, current input signals may be provided instead, for example to the drains of the first transistor 202 and second transistor 204. In such examples, a bias voltage may be provided to the gates of the first transistor 202 and second transistor 204, or the first transistor 202 and second transistor 204 may be configured as current sources.

[0166] 30 In some examples, the amplifier according to any of the examples described herein may include or be connected to a load. For example, a load may be connected across output nodes 154 and 156. Therefore, in some examples, a load may be connected across the drains of the first transistor 102 and second transistor 104 via the first and second traces (in the case of the amplifiers 100, 200, 300, 400 and 500 shown in Figures 1-5) or across the 35 drains of the third transistor 106 and fourth transistor 108 via the fifth and sixth traces (in the case of the amplifier 600 shown in Figure 6). P114096W001

[0167] 22

[0168] Figure 10 illustrates an example of an integrated circuit 1000 comprising an amplifier 1002 according to examples of this disclosure, such as for example the amplifier 200, 300, 400, 500, 600, 700, 800 and / or 900 shown in Figures 1 to 9. Figure 11 illustrates an example of an electronic apparatus 1100 comprising an amplifier 1102 according to examples of this 5 disclosure, such as for example the amplifier 200, 300, 400, 500, 600, 700, 800 and / or 900 shown in Figures 1 to 9. The electronic apparatus may in some examples be a communication apparatus. For example, the communication apparatus may be a wireless communication device for a cellular communications system. Alternatively, for example, the communication apparatus may be a base station for a cellular communications system.

[0169] In the examples described herein, “connected to” may mean connected directly, with no additional components in between, or alternatively may mean connected via one or more additional components not shown in the Figures, such as for example cascode transistors, other transistors, resistors, capacitors, inductors and / or other electronic components.

[0170] 15

[0171] It should be noted that the above-mentioned examples illustrate rather than limit the invention, and that those skilled in the art will be able to design many alternative examples without departing from the scope of the appended statements. The word “comprising” does not exclude the presence of elements or steps other than those listed in a claim, “a” or “an” does not exclude a plurality, and a single processor or other unit may fulfil the functions of several units recited in the statements below. Where the terms, “first”, “second” etc. are used they are to be understood merely as labels for the convenient identification of a particular feature. In particular, they are not to be interpreted as describing the first or the second feature of a plurality of such features (i.e. , the first or second of such features to 25 occur in time or space) unless explicitly stated otherwise. Steps in the methods disclosed herein may be carried out in any order unless expressly otherwise stated. Any reference signs in the statements shall not be construed so as to limit their scope.

Claims

P114096W00123Claims1. An amplifier (200, 300, 400, 600, 700, 800, 900) comprising:a first pair of transistors comprising a first transistor (202) and a second transistor 5 (204);a first trace connected to a drain of the first transistor (202);a second trace connected to a drain of the second transistor (204);a harmonic reduction first circuit (210) comprising a harmonic reduction first subcircuit and a harmonic reduction second subcircuit;10 wherein the harmonic reduction first subcircuit comprises:a first inductor (212) and a first capacitor (214), wherein the first inductor (212) and the first capacitor (214) are connected between a first node (216) and a first reference voltage, anda second inductor (218), wherein the second inductor (218) and one of the first 15 capacitor (214) and a second capacitor are connected between a second node (220) and the first reference voltage;wherein the harmonic reduction second subcircuit comprises:a third inductor (222) and a third capacitor (224), wherein the third inductor (222) and the third capacitor (224) are connected between the first node (216) and the first reference voltage, anda fourth inductor (226), wherein the fourth inductor (226) and one of the third capacitor (224) and a fourth capacitor are connected between the second node (220) and the first reference voltage;wherein the amplifier (200, 300, 400, 600, 700, 800, 900) further comprises:25 a third trace (228) connected to the first node (216), wherein at least part of the third trace (228) is adjacent and substantially parallel to a first at least part of the first trace (206); anda fourth trace (230) connected to the second node (220), wherein at least part of the fourth trace (230) is adjacent and substantially parallel to a first at least part of the second 30 trace (208).

2. An amplifier (500, 800, 900) comprising:a first pair of transistors comprising a first transistor (202) and a second transistor (204);35 a first trace connected to a drain of the first transistor (202);a second trace connected to a drain of the second transistor (204);P114096W00124a harmonic reduction first circuit (210) comprising a harmonic reduction first subcircuit;wherein the harmonic reduction first subcircuit comprises:a first inductor (212) and a first capacitor (214), wherein the first inductor (212) and 5 the first capacitor (214) are connected between a first node (216) and a first reference voltage, anda second inductor (218), wherein the second inductor (218) and one of the first capacitor (214) and a second capacitor are connected between a second node (220) and the first reference voltage;10 wherein the amplifier (500, 800, 900) further comprises:a third trace (228) connected to the first node (216), wherein at least part of the third trace (228) is adjacent and substantially parallel to a first at least part of the first trace (206); anda fourth trace (230) connected to the second node (220), wherein at least part of the 15 fourth trace (230) is adjacent and substantially parallel to a first at least part of the second trace 908).wherein the harmonic reduction first circuit (210) further comprises a harmonic reduction third subcircuit;wherein the harmonic reduction third subcircuit comprises:a fifth inductor (232) and a fifth capacitor (234), wherein the fifth inductor (232) and the fifth capacitor (234) are connected between a third node (236) and a first reference voltage, anda sixth inductor (238), wherein the sixth inductor (238) and one of the fifth capacitor (234) and a sixth capacitor are connected between a fourth node (240) and the first25 reference voltage;wherein the amplifier (500, 800, 900) further comprises:a fifth trace (242) connected to the third node (236), wherein at least part of the fifth trace (242) is adjacent and substantially parallel to the first at least part of the first trace (206); and30 a sixth trace (244) connected to the fourth node (240), wherein at least part of the sixth trace (244) is adjacent and substantially parallel to the first at least part of the second trace (208).

3. The amplifier of claim 1 , wherein the harmonic reduction first circuit further comprises 35 a harmonic reduction third subcircuit comprising:P114096W00125a fifth inductor (232) and a fifth capacitor (234), wherein the fifth inductor (232) and the fifth capacitor (234) are connected between a third node (236) and a first reference voltage, anda sixth inductor (238), wherein the sixth inductor (238) and one of the fifth capacitor 5 (234) and a sixth capacitor are connected between a fourth node (240) and the first reference voltage;wherein the amplifier (200, 300, 400, 600, 700, 800, 900) further comprises:a fifth trace (242) connected to the third node (236), wherein at least part of the fifth trace (242) is adjacent and substantially parallel to the first at least part of the first trace 10 (206); anda sixth trace (244) connected to the fourth node (240), wherein at least part of the sixth trace (244) is adjacent and substantially parallel to the first at least part of the second trace (208).15 4. The amplifier of claim 2 or 3, wherein:the fifth trace (242) is connected between the third node (236) and the drain of the first transistor (202), and the sixth trace (244) is connected between the fourth node (240) and the drain of the second transistor (204); orthe first trace and the fifth trace (242) are connected between the third node (236) and the drain of the first transistor (202), and the second trace and the sixth trace (244) are connected between the fourth node (240) and the drain of the second transistor (204).

5. The amplifier of any of claims 2 to 4, wherein:the fifth trace (242) is connected between the third node (236) and a first reference 25 voltage; andthe sixth trace (244) is connected between the fourth node (240) and the first reference voltage.

6. The amplifier of any of claims 2 to 5, wherein:30 a physical direction of the first at least part of the first trace (206) away from the drain of the first transistor (202) is substantially the same physical direction as the physical direction of the at least part of the fifth trace (242) towards the third node (236); and / or a physical direction of the first at least part of the second trace (208) away from the drain of the second transistor (204) is substantially the same physical direction as the 35 physical direction of the at least part of the sixth trace (244) towards the fourth node (240).

7. The amplifier of any of claims 2 to 6, wherein:P114096W00126the at least part of the fifth trace (242) is in a different layer of an integrated circuit to the first at least part of the first trace (206), wherein the first at least part of the first trace (206) is positioned over the at least part of the fifth trace (242) or the at least part of the fifth trace (242) is positioned over the first at least part of the first trace (206); and / or5 the at least part of the sixth trace (244) is in a different layer of an integrated circuit to the first at least part of the second trace (208), wherein the first at least part of the second trace (208) is positioned over the at least part of the sixth trace (244) or the at least part of the sixth trace (244) is positioned over the first at least part of the second trace (208).10 8. The amplifier of any of claims 2 to 7, wherein:the at least part of the third trace (228) is in a different layer of an integrated circuit to the at least part of the fifth trace (242), and the at least part of the fourth trace (230) is in a different layer of an integrated circuit to the at least part of the sixth trace (244); and / or the first at least part of the first trace (206) is positioned between the at least part of 15 the third trace (228) and the at least part of the fifth trace (242), and the first at least part of the second trace (208) is positioned between the at least part of the fourth trace (230) and the at least part of the sixth trace (244).

9. The amplifier of any of claims 2 to 8, wherein the harmonic reduction third subcircuit comprises a third further inductor, wherein:the third further inductor is connected with the fifth capacitor (234) connected between the first reference voltage and the node between the fifth inductor (232) and the sixth inductor (238); orthe third further inductor is connected between the first reference voltage and each of 25 the fifth (234) and sixth capacitors.

10. The amplifier of any of claims 2 to 9, wherein the harmonic reduction first circuit comprises a harmonic reduction fourth subcircuit comprising:a seventh inductor (250) and a seventh capacitor (252), wherein the seventh inductor 30 (250) and the seventh capacitor (252) are connected between the third node (236) and the first reference voltage, andan eighth inductor (254), wherein the eighth inductor (254) and one of the seventh capacitor (252) and an eighth capacitor are connected between the fourth node (240) and the first reference voltage.3511. The amplifier of claim 10, wherein the harmonic reduction fourth subcircuit comprises a fourth further inductor, wherein:P114096W00127the fourth further inductor is connected with the seventh capacitor (252) connected between the first reference voltage and the node between the seventh inductor (250) and the eighth inductor (254); orthe fourth further inductor is connected between the first reference voltage and each 5 of the seventh (252) and eighth capacitors.

12. The amplifier of any of claims 1 to 11 , wherein:the third trace (228) is connected between the first node (216) and the drain of the first transistor (202), and the fourth trace (230) is connected between the second node (220) 10 and the drain of the second transistor (204); orthe first at least part of the first trace (206) and the third trace (228) are connected between the first node (216) and the drain of the first transistor (202), and the first at least part of the second trace (208) and the fourth trace (230) are connected between the second node (220) and the drain of the second transistor (204).1513. The amplifier of any of claims 1 to 11 , wherein:the third trace (228) is connected between the first node (216) and a first reference voltage; andthe fourth trace (230) is connected between the second node (220) and the first reference voltage.

14. The amplifier of any of claims 1 to 13, wherein:a physical direction of the first at least part of the first trace (206) away from the drain of the first transistor (202) is substantially the same physical direction as the physical 25 direction of the at least part of the third trace (228) towards the first node (216); and / or a physical direction of the first at least part of the second trace (208) away from the drain of the second transistor (204) is substantially the same physical direction as the physical direction of the at least part of the fourth trace (230) towards the second node (220).30 15. The amplifier of any of claims 1 to 14, wherein:the at least part of the third trace (228) is in a different layer of an integrated circuit to the first at least part of the first trace (206), wherein the first at least part of the first trace (206) is positioned over the at least part of the third trace (228) or the at least part of the third trace (228) is positioned over the first at least part of the first trace (206); and / or35 the at least part of the fourth trace (230) is in a different layer of an integrated circuit to the first at least part of the second trace (208), wherein the first at least part of the secondP114096W00128trace (208) is positioned over the at least part of the fourth trace (230) or the at least part of the fourth trace (230) is positioned over the first at least part of the second trace (208).

16. The amplifier of any of claims 1 to 15, wherein the harmonic reduction first subcircuit 5 comprises a first further inductor (246), wherein:the first further inductor (246) is connected between the first capacitor (214) and the first reference voltage, or the first capacitor (214) is connected between the first further inductor (246) and the first reference voltage; orthe first further inductor (246) is connected between the first reference voltage and 10 each of the first (214) and second capacitors.

17. The amplifier of any of claims 1 to 16, wherein the harmonic reduction second subcircuit comprises a second further inductor (248), wherein:the second further inductor (248) is connected between the third capacitor (224) and 15 the first reference voltage, or the third capacitor (224) is connected between the second further inductor (248) and the first reference voltage; orthe second further inductor (248) is connected between the first reference voltage and each of the third (224) and fourth capacitors.

18. The amplifier of any of claims 1 to 17, comprising a harmonic reduction second circuit (256), wherein the harmonic reduction second circuit comprises a harmonic reduction fifth subcircuit comprising:a ninth inductor (258) and a ninth capacitor (260), wherein the ninth inductor (258) and the ninth capacitor (260) are connected between a fifth node (262) and the first25 reference voltage, anda tenth inductor (264), wherein the tenth inductor (264) and one of the ninth capacitor (260) and a tenth capacitor are connected between a sixth node (266) and the first reference voltage;wherein the amplifier (900) further comprises:30 a seventh trace (268) connected to the fifth node (262), wherein at least part of the seventh trace (268) is adjacent and substantially parallel to a second part of the first trace (270); andan eighth trace (272) connected to the sixth node (266), wherein at least part of the eighth trace (272) is adjacent and substantially parallel to a second part of the second trace 35 (274).P114096W0012919. The amplifier of any of claims 1 to 18, wherein the first trace (206, 270) is connected between a drain of the first transistor (202) and a first output node of the amplifier (200, 300, 400, 500, 600, 700, 800, 900), and the second trace (208, 274) is connected between a drain of the second transistor (204) and a second output node of the amplifier (200, 300, 5 400, 500, 600, 700, 800, 900).

20. The amplifier of claim 19, comprising a load connected between the first output node and the second output node.10 21. The amplifier of any of claims 1 to 20, further comprising a second pair of transistors comprising a third transistor (702) and a fourth transistor (704), wherein the drain of the first transistor (202) is connected to a source of the third transistor (702) via the first trace (206, 270), and a drain of the second transistor (204) is connected to a source of the fourth transistor (704) via the second trace (208, 274).1522. The amplifier of claim 21 , comprising a load connected between a drain of the third transistor (702) and a drain of the fourth transistor (704).

23. The amplifier of claim 21 or 22, wherein a drain of the third transistor (702) and a drain of the fourth transistor (704) comprise differential output nodes of the amplifier (700).

24. The amplifier of any of claims 1 to 23, wherein:a source of the first transistor (202) and a source of the second transistor (204) are connected to a first reference voltage; and / or25 a gate of the first transistor and a gate of the second transistor comprise differential voltage input nodes of the amplifier.

25. The amplifier of any of claims 1 to 24, comprising a third pair of transistors comprising a fifth transistor and a sixth transistor, wherein a source of the fifth transistor and 30 a drain of the sixth transistor are connected to a first reference voltage, a drain of the fifth transistor is connected to a source of the first transistor (202), and a drain of the sixth transistor is connected to a source of the second transistor (204).

26. The amplifier of claim 25, wherein a gate of the fifth transistor and a gate of the sixth 35 transistor comprise differential voltage input nodes of the amplifier.P114096W0013027. An integrated circuit comprising the amplifier (200, 300, 400, 500, 600, 700, 800, 900) of any one of claims 1 to 26.

28. An electronic apparatus comprising the amplifier (200, 300, 400, 500, 600, 700, 800, 5 900) of any one of claims 1 to 26.

29. A wireless communication device for a cellular communications system comprising the electronic apparatus of claim 28.

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