Magnetoresistive storage device based on topological spin material

By introducing a nickel oxide layer and a TMR enhancement layer into the topological insulator SOT-MTJ device, the problems of shunt effect and spin memory loss are solved, and the performance of the high-efficiency spin memory device is improved, especially the write efficiency and tunneling magnetoresistivity.

WO2026112881A1PCT designated stage Publication Date: 2026-06-04INST OF MICROELECTRONICS CHINESE ACAD OF SCI LTD

Patent Information

Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
INST OF MICROELECTRONICS CHINESE ACAD OF SCI LTD
Filing Date
2024-11-28
Publication Date
2026-06-04

AI Technical Summary

Technical Problem

Existing topological insulator SOT-MTJ devices suffer from shunt effects and spin memory losses, resulting in high power consumption and limited read performance. Their small TMR limits the efficiency improvement of the spin-orbit coupling layer.

Method used

Nickel oxide layer is used as intercalation material to suppress the shunting effect of metal layer, and tunneling magnetoresistivity is improved by TMR enhancement layer. Combined with topological insulator materials such as Bi1-xSbx and Bi2Se3, spin current transport and anisotropy of ferromagnetic layer are enhanced, and spin memory loss and backflow are improved.

Benefits of technology

It improves the write efficiency of spin memory devices, enhances tunneling magnetoresistivity, improves spin transfer efficiency and read performance, and reduces energy consumption.

✦ Generated by Eureka AI based on patent content.

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Abstract

Provided is a magnetoresistive storage device based on a topological spin material. The magnetoresistive storage device comprises: a spin-orbit coupling layer, which is made of a topological insulator and used for generating a spin current; a nickel oxide layer, which is formed on the spin-orbit coupling layer; an interface layer, which is formed on the nickel oxide layer; and a magnetic tunnel junction, which is formed on the interface layer and comprises ferromagnetic layers that are formed on the upper and lower sides of a barrier layer. The spin current is transmitted in the nickel oxide layer in the form of magnons and then acts on the ferromagnetic layers, and the interface layer is used for enhancing the anisotropy of the ferromagnetic layers.
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Description

Topological spin-based magnetoresistive storage devices Technical Field

[0001] This disclosure relates to the field of magnetic storage technology, and more particularly to a topological spin material-based magnetoresistive storage device. Background Technology

[0002] Topological insulators (TIs) possess spin Hall angles significantly larger than those of conventional heavy metals, making them a candidate material system for realizing ultra-low-power spin-orbit magnetic random access memory (SOT-MRAM). Prototype devices using topological insulators as the spin-orbit coupling layer in SOT-MTJs (spin-orbit magnetic tunnel junctions) have already been reported. However, due to the bulk insulation properties of topological insulators and their much higher resistivity compared to metallic materials, severe shunting effects exist in topological insulator SOT-MTJs, preventing a significant increase in actual power consumption. At the interface between topological materials or heavy metals and ferromagnetic layers, significant spin memory loss and spin backflow occur due to the strong spin-orbit coupling effect, limiting the improvement of spin-transformation efficiency in the spin-orbit coupling layer. Furthermore, existing topological insulator magnetic tunnel junctions have relatively low TMR (tunnel magnetoresistance ratio), limiting their read performance.

[0003] Public content

[0004] In view of this, in order to at least partially solve at least one of the aforementioned technical problems, this disclosure provides a topological spin material-based magnetoresistive storage device.

[0005] To achieve the above objectives, the technical solution disclosed herein is as follows:

[0006] According to one embodiment of this disclosure, a topological spin-based magnetoresistive storage device is provided, comprising: a spin-orbit coupling layer, a nickel oxide layer, an interface layer, and a magnetic tunnel junction.

[0007] The spin-orbit coupling layer material is a topological insulator configured to generate spin current; a nickel oxide layer is formed on the spin-orbit coupling layer; an interface layer is formed on the nickel oxide layer; a magnetic tunnel junction is formed on the interface layer, including ferromagnetic layers formed on the upper and lower sides of the barrier layer; the spin current is transmitted in the nickel oxide layer in the form of magnons and then acts on the ferromagnetic layer; the interface layer is configured to enhance the anisotropy of the ferromagnetic layer and improve the thermal budget.

[0008] According to an embodiment of this disclosure, the ferromagnetic layer includes a ferromagnetic reference layer located above the barrier layer and a ferromagnetic free layer located below the barrier layer; the magnetic tunnel junction includes, from bottom to top, a ferromagnetic free layer, a barrier layer, a ferromagnetic reference layer, a synthetic antiferromagnetic layer, and a capping layer.

[0009] According to an embodiment of this disclosure, the magnetoresistive memory device further includes a TMR enhancement layer, namely a first TMR enhancement layer formed on the underside of the ferromagnetic free layer and a second TMR enhancement layer formed on the upper side of the ferromagnetic reference layer, wherein the TMR enhancement layer is configured to further improve the tunneling magnetoresistivity.

[0010] According to embodiments of this disclosure, the material of the topological insulator is selected from Bi. 1-x Sb x (Bi) 1-x Sb x One or a combination of 2Te3, Bi2Se3, Sb2Te3, and Bi2Te3.

[0011] According to embodiments of this disclosure, the interface layer material is selected from one or a combination of Ti, Mo, Hf, Ta, and Cu.

[0012] According to the embodiments of this disclosure, when etching to form a magnetic tunnel junction, the etching is stopped at the spin-orbit coupling layer; when a write current is applied along the topological insulator of the spin-orbit coupling layer, since the nickel oxide layer is an insulator along the current direction, the shunting effect of each metal material layer on the nickel oxide layer is effectively suppressed, further improving the write efficiency of the topological insulator magnetoresistive memory device.

[0013] According to embodiments of this disclosure, the thickness of the nickel oxide layer is less than 1 nm.

[0014] According to embodiments of this disclosure, the TMR enhancement layer may be an antiferromagnetic material IrMn; the tunneling magnetic resistivity may be modulated and enhanced by the configuration of antiferromagnetic spins in the antiferromagnetic material IrMn and ferromagnetic spins in the ferromagnetic free layer.

[0015] According to embodiments of this disclosure, the storage device further includes a read control transistor T. R Write control transistor T W The write control transistor has its gate connected to the write bit line WWL, its drain connected to the write byte line WBL, and its source connected to one side of the spin-orbit coupling layer; the read control transistor has its gate connected to the read bit line RWL, its drain connected to the read byte line RBL, and its source connected to the top electrode.

[0016] According to embodiments of this disclosure, during a write operation, the write bit line WWL is pulled high, and the write byte line WBL or the source line SL is pulled to the write voltage V. Write The remaining metal wires are grounded, generating a write current flowing through the topological surface states of the topological insulator; during a read operation, the read bit line RWL is pulled high, and the read byte line RBL is pulled to the read voltage V.Read The remaining metal wires are grounded, generating a reading current that flows through the magnetic tunnel junction.

[0017] The nickel oxide intercalation in the topological spin material-based magnetoresistive memory device disclosed herein improves the spin transport efficiency at the TI / FM interface; the nickel oxide intercalation suppresses the shunt effect of the metal layer, so that the write current mainly flows through the TI surface state, further improving the energy efficiency; the TMR enhancement layer improves the tunneling magnetoresistivity. Attached Figure Description

[0018] The above and other objects, features and advantages of this disclosure will become clearer from the following description of embodiments with reference to the accompanying drawings, in which:

[0019] Figure 1A shows a main film stack structure of a topological spin material-based magnetoresistive storage device according to an embodiment of the present disclosure;

[0020] Figure 1B shows another topological spin material-based magnetoresistive storage device main film stack structure according to an embodiment of this disclosure;

[0021] Figure 2A is a schematic diagram of a topological spin material-based magnetoresistive storage device structure based on the main membrane stack structure shown in Figure 1A;

[0022] Figure 2B is a schematic diagram of a topological spin material-based magnetoresistive storage device structure based on the main membrane stack structure shown in Figure 1B.

[0023] Figure 3 is a schematic diagram of the efficiency enhancement mechanism of the nickel oxide layer in an embodiment of this disclosure;

[0024] Figure 4 is a schematic diagram of the working principle of the TMR enhancement layer in an embodiment of this disclosure;

[0025] Figure 5 is a schematic diagram of a topological spin-based magnetoresistive storage device with added external circuitry according to an embodiment of this disclosure. Detailed Implementation

[0026] This disclosure provides a topological spin material-based magnetoresistive memory device. The fabrication method is simple and reliable. The fabricated detector has high gain for high-energy particle detection, good gain uniformity, good two-dimensional position resolution, and can withstand very high particle irradiation count rates, which can overcome the main shortcomings and deficiencies of existing through-radiation detectors.

[0027] To make the objectives, technical solutions, and advantages of this disclosure clearer, the following detailed description is provided in conjunction with specific embodiments and the accompanying drawings.

[0028] In this embodiment of the disclosure, a topological spin-based magnetoresistive memory device is provided, as shown in Figures 1A, 1B, 2A, and 2B. The topological spin-based magnetoresistive memory device includes: a spin-orbit coupling layer, a nickel oxide layer, an interface layer, and a magnetic tunnel junction. Wherein:

[0029] The spin-orbit coupling layer material is a topological insulator (i.e., a topological insulator layer) and is configured to generate spin current.

[0030] A nickel oxide layer is formed on the spin-orbit coupling layer;

[0031] An interface layer is formed on the nickel oxide layer; and

[0032] The magnetic tunnel junction is formed on the interface layer, including ferromagnetic layers formed on the upper and lower sides of the barrier layer;

[0033] The spin current, transmitted in the nickel oxide layer in the form of a magnon, acts on the ferromagnetic layer, and the interface layer is configured to enhance the anisotropy of the ferromagnetic layer.

[0034] According to an embodiment of this disclosure, the ferromagnetic layer includes a ferromagnetic reference layer located above the barrier layer and a ferromagnetic free layer located below the barrier layer; the magnetic tunnel junction includes, from bottom to top, a ferromagnetic free layer, a barrier layer, a ferromagnetic reference layer, a synthetic antiferromagnetic layer, and a capping layer.

[0035] According to embodiments of this disclosure, the magnetoresistive memory device further includes a TMR enhancement layer, namely a first TMR enhancement layer formed below the ferromagnetic free layer and a second TMR enhancement layer formed above the ferromagnetic reference layer, configured to further improve the tunneling magnetoresistivity. The TMR enhancement layer may be an antiferromagnetic material IrMn; the tunneling magnetoresistivity may be modulated and enhanced by the configuration of antiferromagnetic spins in the antiferromagnetic material IrMn and ferromagnetic spins in the ferromagnetic free layer.

[0036] According to embodiments of this disclosure, the topological insulator layer may be Bi 1-x Sb x (Bi) 1-x Sb x The topological insulator layer can be one or a combination of Sb2Te3, Bi2Se3, Sb2Te3, and Bi2Te3, where x represents the stoichiometric ratio of element Sb. The spin current generated by the topological insulator layer is transported in the form of magnons, thus improving the spin memory loss (SML) and spin backflow (SBF) at the TI / FM (topological insulator / ferromagnetic layer) interface, and increasing the spin transport efficiency at the TI / FM interface. The ferromagnetic layer can be prepared from materials such as CoFeB, CoFe, Co, and CoPt, while the barrier layer can be prepared from materials such as MgO and AlO. x The material used to prepare the capping layer can be one or a combination of Ta, Ru, Pt, etc.

[0037] The interface layer is configured to enhance the anisotropy of the ferromagnetic layer and improve the thermal budget of the device. The interface layer material is selected from one or a combination of Ti, Mo, Hf, Ta, and Cu.

[0038] In this embodiment of the disclosure, as shown in Figures 2A and 2B, the etching to form the tunnel junction is stopped at the topological insulator. When a write current is applied, the NiO oxide layer effectively suppresses the metal layer shunt effect because it insulates the remaining metal layers, allowing the write current (indicated by the long arrow pointing to the right in the figure) to mainly flow through the topological surface states, thus improving the write efficiency. Since the NiO layer is very thin, it does not disrupt the read TMR ratio (tunneling magnetoresistivity) through the tunneling magnetoresistance effect.

[0039] In this embodiment, as shown in Figure 3, the spin current generated by the topological insulator is transported in the nickel oxide layer in the form of magnons. In the figure, Jc represents the charge current, and Js represents the polarized spin current. Because the nickel oxide layer is insulating, the charge current cannot flow through it, so Jc = 0. However, the spin current can be transmitted through the nickel oxide layer in the form of magnons, therefore Js ≠ 0 in the nickel oxide layer. After passing through the nickel oxide layer, it acts on the adjacent ferromagnetic layer (e.g., a ferromagnetic free layer located on the interface layer or TMR enhancement layer). Since no electron flow is involved, interface spin backflow is suppressed. Because there is no strong interface spin-orbit coupling (ISCO) effect at the interface between the nickel oxide layer and the ferromagnetic layer, interface spin memory loss is improved. Therefore, nickel oxide layer intercalation can effectively improve the spin transport efficiency at the interface between the topological insulator and the ferromagnetic layer, thereby improving write efficiency.

[0040] In this embodiment of the disclosure, as shown in FIG4, the left side is the crystal structure of IrMn, where light-colored spheres represent Mn atoms and dark-colored spheres represent Ir atoms. This indicates that the lattice constants are the same along the x and y directions. z / x = 0.945 indicates that the lattice constant along the z-direction is The antiferromagnetic spin configuration of Mn in the TMR reinforcement layer material results in hybrid Bloch symmetry. This enhances both majority and minority carrier spin channels in the parallel state of the magnetic tunnel junction, achieving high tunneling magnetoresistivity. During a write operation on this structure, the spin-orbit moment generated by the topological insulator flips the magnetic moment of IrMn in the TMR reinforcement layer material. Due to the exchange bias at the interface between IrMn and the ferromagnetic free layer, the magnetic moment of the ferromagnetic free layer also flips accordingly, enabling resistive state writing.

[0041] In this embodiment of the disclosure, as shown in FIG5, a topological spin-based magnetoresistive memory device with added external circuitry is included, mainly comprising a read control transistor T. R Write control transistor T WThe write control transistor has its gate connected to the write bit line WWL, its drain connected to the write byte line WBL, and its source connected to one side of the spin-orbit coupling layer. The read control transistor has its gate connected to the read bit line RWL, its drain connected to the read byte line RBL, and its source connected to the top electrode. During a write operation, the write bit line WWL is pulled high, and the write byte line WBL or the source line SL is pulled to the write voltage V. Write The remaining metal wires are grounded, generating a write current flowing through the topological surface states of the topological insulator; during a read operation, the read bit line RWL is pulled high, and the read byte line RBL is pulled to the read voltage V. Read The remaining metal wires are grounded, generating a reading current that flows through the magnetic tunnel junction.

[0042] The embodiments of this disclosure have been described in detail above with reference to the accompanying drawings. It should be noted that implementations not illustrated or described in the drawings or the main text of the specification are forms known to those skilled in the art and are not described in detail. Furthermore, the definitions of the various elements and methods described above are not limited to the specific structures, shapes, or methods mentioned in the embodiments, and those skilled in the art can easily modify or substitute them.

[0043] Based on the above description, those skilled in the art should have a clear understanding of the topological spin-based magnetoresistive storage devices disclosed herein.

[0044] In summary, this disclosure provides a topological spin-based magnetoresistive memory device. Its nickel oxide layer improves spin transport efficiency, suppresses the shunting effect of the metal layer, and enhances the write efficiency of the topological insulator magnetoresistive memory device. The interface layer improves the anisotropy of the ferromagnetic free layer, thereby increasing the device's thermal budget. The TMR enhancement layer enhances the device's TMR. The topological spin-based magnetoresistive memory proposed in this disclosure combines multifunctionality, high energy efficiency, and fabrication feasibility, meeting the diverse needs of large-scale integrated applications.

[0045] The specific embodiments described above do not constitute a limitation on the scope of protection of this disclosure. Any other corresponding changes and modifications made based on the technical concept of this disclosure should be included within the scope of protection of the claims of this disclosure.

Claims

1. A topological spin-based magnetoresistive storage device, comprising: A spin-orbit coupling layer, made of a topological insulator, is configured to generate spin current; A nickel oxide layer is formed on the spin-orbit coupling layer; An interface layer is formed on the nickel oxide layer; as well as A magnetic tunnel junction is formed on the interface layer, including ferromagnetic layers formed on the upper and lower sides of the barrier layer. The spin current, transmitted in the nickel oxide layer in the form of a magnon, acts on the ferromagnetic layer, and the interface layer is configured to enhance the anisotropy of the ferromagnetic layer.

2. The storage device according to claim 1, wherein the ferromagnetic layer comprises a ferromagnetic reference layer located above the barrier layer and a ferromagnetic free layer located below the barrier layer; The magnetic tunnel junction comprises, from bottom to top, a ferromagnetic free layer, a barrier layer, a ferromagnetic reference layer, a synthetic antiferromagnetic layer, and a capping layer.

3. The memory device according to claim 1 or 2 further includes a TMR enhancement layer, namely a first TMR enhancement layer formed below the ferromagnetic free layer and a second TMR enhancement layer formed above the ferromagnetic reference layer, wherein the TMR enhancement layer is configured to further improve the tunneling magnetoresistivity.

4. The storage device according to any one of claims 1-3, wherein the material of the topological insulator is selected from Bi. 1-x Sb x (Bi) 1-x Sb x One or a combination of 2Te3, Bi2Se3, Sb2Te3, and Bi2Te3.

5. The storage device according to any one of claims 1-3, wherein the interface layer material is selected from one or a combination of Ti, Mo, Hf, Ta, and Cu.

6. In the memory device according to any one of claims 1-3, when etching to form a magnetic tunnel junction, the etching is stopped at the spin-orbit coupling layer; When a write current is applied along the topological insulator of the spin-orbit coupling layer, the nickel oxide layer is an insulator along the current direction, which effectively suppresses the shunting effect of the metal material layers on the nickel oxide layer, further improving the write efficiency of the topological insulator memory device.

7. The memory device according to claim 6, wherein the nickel oxide layer thickness is less than 1 nm.

8. The storage device according to any one of claims 1-3, wherein the TMR enhancement layer may be an antiferromagnetic material IrMn; the tunneling magnetic resistivity may be modulated and enhanced by the configuration of antiferromagnetic spins in the antiferromagnetic material IrMn and ferromagnetic spins in the ferromagnetic free layer.

9. The memory device according to any one of claims 1-8 further includes a read control transistor T. R Write control transistor T W ; The gate of the write control transistor is connected to the write bit line WWL, the drain is connected to the write byte line WBL, and the source is connected to one side of the spin-orbit coupling layer. The gate of the read control transistor is connected to the read bit line RWL, the drain is connected to the read byte line RBL, and the source is connected to the top electrode.

10. The storage device according to claim 9, During a write operation, the write bit line WWL is pulled high, and the write byte line WBL or the source line SL is pulled to the write voltage V. Write The remaining metal wires are grounded, generating a write current that flows through the topological surface states of the topological insulator; During a read operation, the read bit line RWL is pulled high, and the read byte line RBL is pulled to the read voltage V. Read The remaining metal wires are grounded, generating a reading current that flows through the magnetic tunnel junction.