Printed circuit board and semiconductor package

Abstract

Provided is a printed circuit board comprising: a ceramic substrate that has silicon nitride as a main component; a conductive part that is formed of copper and is connected to a semiconductor element; and a bonding part that bonds the ceramic substrate and the conductive part, contains titanium, and has a plurality of protrusions on a surface in contact with the ceramic substrate. The plurality of protrusions contain titanium nitride and copper, and the average of the ratio of the length to the width of each of the plurality of protrusions is 0.7 or greater.

Description

Circuit board and semiconductor package

[0001] The present invention relates to a circuit board and a semiconductor package.

[0002] Conventionally, a circuit board including a conductive portion connected to a semiconductor element and a ceramic substrate has been known (for example, Patent Document 1).

[0003] Japanese Patent Application Laid-Open No. 2014-118310

[0004] However, even with the prior art such as Patent Document 1, there is still room for improvement in the technology for improving the thermal conductivity between the conductive portion and the ceramic substrate while suppressing breakage in the circuit board.

[0005] An object of the present invention is to provide a technology for improving the thermal conductivity between a conductive portion and a ceramic substrate while suppressing breakage in a circuit board.

[0006] The present invention has been made to solve at least a part of the above-described problems and can be realized in the following forms.

[0007] (1) According to one aspect of the present invention, a circuit board is provided. The circuit board includes a ceramic substrate mainly composed of silicon nitride, a conductive portion formed of a conductive material and connected to a semiconductor element, and a joining portion that joins the ceramic substrate and the conductive portion, the joining portion containing titanium and having a plurality of convex portions on a surface contacting the ceramic substrate, the plurality of convex portions containing titanium nitride and copper, and an average of a ratio of a length to a width of each of the plurality of convex portions being 0.7 or more.

[0008] In this configuration, the joint connecting the ceramic substrate and the conductive part has multiple protrusions on the surface that contacts the ceramic substrate. The average ratio of the length of each protrusion to its width is 0.7 or higher. This makes it easier for the multiple protrusions to engage with the surface of the ceramic substrate that contacts the joint, thereby improving the bonding strength between the ceramic substrate and the joint. Furthermore, since the protrusions contain copper, which has a relatively high thermal conductivity, heat from the semiconductor element connected to the conductive part can be efficiently transferred to the ceramic substrate via the protrusions. Therefore, it is possible to improve the thermal conductivity between the conductive part and the ceramic substrate while suppressing damage to the circuit board.

[0009] (2) In the circuit board of the above form, the length of each of the plurality of protrusions may be 2 nm or more and 142 nm or less, the width of each of the plurality of protrusions may be 2 nm or more and 65 nm or less, and the average length of each of the plurality of protrusions may be 18 nm or more. With this configuration, each of the plurality of protrusions has an elongated shape in which the length is greater than the width. As a result, the plurality of protrusions can engage more easily with the surface of the ceramic substrate that is in contact with the joint, and thus the bonding strength between the ceramic substrate and the joint can be further improved.

[0010] (3) In the circuit board of the above form, the joint portion has a titanium nitride layer on which the plurality of protrusions are formed, and the thickness of the titanium nitride layer may be 100 nm or more and 1000 nm or less. With this configuration, the joint portion has a titanium nitride layer on the ceramic substrate side formed by titanium contained in the joint portion and nitrogen contained in the ceramic substrate. The titanium nitride layer has a thickness of 100 nm or more and 1000 nm or less, and is relatively thin. This makes it possible to efficiently transfer the heat of the semiconductor element connected to the conductive portion to the ceramic substrate.

[0011] (4) In the above-described configuration of the circuit board, the joint portion does not need to contain silver. With this configuration, the joint portion does not contain expensive silver. This makes it possible to reduce the manufacturing cost of the circuit board.

[0012] (5) In the circuit board of the above form, the ceramic substrate has a pair of main surfaces, the conductive portion has a first conductive portion disposed on one of the pair of main surfaces of the ceramic substrate and a second conductive portion disposed on the other of the pair of main surfaces of the ceramic substrate, the joint portion has a first joint portion that joins the ceramic substrate and the first conductive portion and a second joint portion that joins the ceramic substrate and the second conductive portion, and the thermal conductivity between the first conductive portion and the second conductive portion may be 170 W / (m·K) or more. With this configuration, a circuit board having two conductive portions sandwiched between a ceramic substrate can efficiently transfer heat from, for example, a semiconductor element or electronic component connected to the first conductive portion to the second conductive portion.

[0013] (6) According to another embodiment of the present invention, a semiconductor package is provided. This semiconductor package comprises the circuit board described above and a power semiconductor element connected to the conductive part. With this configuration, the semiconductor package can efficiently dissipate the heat generated by the power semiconductor element, which generates a relatively large amount of heat, through the circuit board.

[0014] Furthermore, the present invention can be realized in various forms, for example, in the form of a method for manufacturing a circuit board and a semiconductor package, an apparatus and system comprising a circuit board and a semiconductor package, a method for controlling such apparatus and system, a computer program that causes such apparatus and system to supply power to electronic equipment and to perform mutual conversion between AC and DC, a server apparatus for distributing the computer program, and a non-temporary storage medium that stores the computer program.

[0015] This is a cross-sectional view of the circuit board of the first embodiment. This is a cross-sectional view of the semiconductor package of the first embodiment. This is an enlarged view of part A in Figure 1. This is an enlarged view of part B in Figure 3. This is a cross-sectional TEM photograph of the circuit board of the first embodiment. This is a diagram illustrating the results of the evaluation test of the circuit board.

[0016] <First Embodiment> Figure 1 is a cross-sectional view of the circuit board 1 of this embodiment. Figure 2 is a cross-sectional view of the semiconductor package P1 of this embodiment. The circuit board 1 of this embodiment is a substrate on which a power semiconductor element 5 can be mounted, and as shown in Figure 1, comprises a ceramic substrate 10, conductive parts 21, 22, and bonding parts 31, 32. The semiconductor package P1 shown in Figure 2 comprises the circuit board 1 and a power semiconductor element 5 connected to the conductive part 21. The semiconductor package P1 performs various power conversions by switching operation, specifically supplying power to electronic devices and performing mutual conversion between AC and DC. In Figures 1 and 2, the direction along the stacking direction of the ceramic substrate 10, conductive parts 21, 22, and bonding parts 31, 32 is defined as the z-axis direction, the direction perpendicular to the z-axis is defined as the x-axis direction, and the direction perpendicular to the z-axis and x-axis is defined as the y-axis direction. Note that the thickness relationships between the ceramic substrate 10, the conductive parts 21 and 22, and the bonding parts 31 and 32 in Figure 1, and the thickness relationship between the circuit board 1 and the power semiconductor element 5 in Figure 2, are illustrated in a way that differs from the actual thickness relationships for the sake of explanation.

[0017] The ceramic substrate 10 is a flat plate-shaped member whose main component is silicon nitride (Si3N4). Here, "main component is silicon nitride" means that it contains 86 wt% or more of silicon nitride. The ceramic substrate 10 may also contain SiAlON. The ceramic substrate 10 has a pair of main surfaces 10a and 10b. The thickness of the ceramic substrate 10 is, for example, 220 μm or more and 690 μm or less. However, the thickness of the ceramic substrate 10 is not limited to these ranges. In this embodiment, the arithmetic mean roughness Ra of each of the pair of main surfaces 10a and 10b of the ceramic substrate 10 is 0.5 μm or less.

[0018] Each of the conductive parts 21 and 22 is formed of a conductive material, and conductive part 21 is connected to the power semiconductor element 5. Conductive part 21 becomes part of the electrical circuit in the semiconductor package P1. Each of the conductive parts 21 and 22 is formed of a metal mainly composed of copper, for example, oxygen-free copper. Here, "metal mainly composed of copper" refers to a metal containing 99 wt% or more of copper. The thickness of each of the conductive parts 21 and 22 is, for example, 200 μm or more and 1500 μm or less. Conductive part 21 is arranged on one of the pair of main surfaces 10a and 10b of the ceramic substrate 10. Conductive part 22 is arranged on the other of the pair of main surfaces 10a and 10b of the ceramic substrate 10. Conductive part 21 corresponds to the "first conductive part" in the claims, and conductive part 22 corresponds to the "second conductive part" in the claims.

[0019] The joints 31 and 32 contain titanium nitride and copper. The copper in the joints 31 and 32 is due to the diffusion of copper forming the conductive parts 21 and 22 into the metal film that becomes the joints 31 and 32 during the manufacturing of the circuit board 1. Neither of the joints 31 and 32 in this embodiment contains silver. Here, "does not contain silver" means that no silver element is detected in the analysis of silver by an energy dispersive X-ray spectroscope, and specifically, that the silver element content is less than 1 at%. Joint 31 joins the ceramic substrate 10 and the conductive part 21, and joint 32 joins the ceramic substrate 10 and the conductive part 22. Joint 31 corresponds to the "first joint" in the claims, and joint 32 corresponds to the "second joint" in the claims.

[0020] The thickness of each of the joints 31 and 32 is, for example, 0.3 μm or more and 3 μm or less. The thickness of the joints 31 and 32 can be determined using a scanning electron microscope. For example, to determine the thickness of the joint 31, five locations are randomly selected on the polished surface of a cross section perpendicular to one of the main surfaces 10a of the ceramic substrate 10, and an image of a 120 μm × 90 μm area is taken at a magnification of 2000x. Next, the lengths of 10 line segments drawn perpendicular to a 100 μm line segment drawn at the interface between the ceramic substrate 10 and the joint 31, and at equal intervals, are determined. In this embodiment, the average of these determined values ​​is taken as the thickness of the joint 31. The same procedure is followed for the joint 32. Note that the thickness of the joints 31 and 32 tends to be thicker than the thickness of the metal film produced in the manufacturing method of the circuit board 1 described later. This is because, during the bonding of the ceramic substrate 10 and the conductive parts 21 and 22 via the bonding portions 31 and 32, nitrogen atoms and silicon atoms are supplied from the ceramic substrate 10, and copper atoms are supplied from the conductive parts 21 and 22.

[0021] Figure 3 is an enlarged view of section A in Figure 1. Figure 3 is an enlarged schematic diagram of the portion included in section A shown in Figure 1, and includes the cross-section of the ceramic substrate 10, the cross-section of the joint 31, and the cross-section of the conductive portion 21. Note that the size relationships of the parts shown in Figure 3 differ from the actual size relationships for the sake of explanation. As shown in Figure 3, the joint 31 has a titanium nitride layer 311 and a titanium-containing layer 312. Figure 3 shows a dashed line BL for convenience, indicating the boundary between the titanium nitride layer 311 and the titanium-containing layer 312 in the joint 31. The titanium nitride layer 311 is located on the ceramic substrate 10 side in the joint 31 and is formed to follow one of the main surfaces 10a of the ceramic substrate 10. In this embodiment, the titanium nitride layer 311 is defined as the area within a 33 μm × 33 μm range including the joint 31 as shown in Figure 3, in which both titanium and nitrogen elements are detected using an energy-dispersive X-ray analyzer (EDS). The thickness of the titanium nitride layer 311 is determined by randomly measuring the length at three locations in a direction parallel to the stacking direction (z-axis direction) between the ceramic substrate 10, the joints 31 and 32, and the conductive parts 21 and 22, within the range where both titanium and nitrogen elements are detected, and taking the average value of these measurements. In this embodiment, the thickness of the titanium nitride layer 311 is between 100 nm and 1000 nm. The joint 32 also has a titanium nitride layer with a thickness of between 100 nm and 1000 nm on the ceramic substrate 10 side, similar to the joint 31.

[0022] Figure 4 is an enlarged view of section B in Figure 3. Figure 4 is an enlarged schematic diagram of the portion where the ceramic substrate 10 and the joint 31 are joined, and is a schematic diagram of a cross-sectional TEM image with a field of view of 170 nm × 170 nm. The joint 31 in this embodiment has a titanium nitride layer 311 on which a plurality of protrusions 313 are formed. The plurality of protrusions 313 are formed of titanium nitride and copper, and at least a portion of the titanium nitride is replaced by copper diffused from the conductive portion 21. Whether or not copper is contained in the plurality of protrusions 313 is determined by EDS analysis for copper in a field of view of 33 μm × 33 μm in the protrusions 313. Specifically, if the copper element is detected, that is, if the copper element content is 1 at% or more, it is assumed that copper is contained in the protrusions 313. The joint 32 also has a plurality of protrusions formed on the ceramic substrate 10 side of the titanium nitride layer, similar to the joint 31.

[0023] The multiple protrusions 313 of the joint 31 have an average ratio of length Lc to width Wc of each of the multiple protrusions 313 of which is 0.7 or more. Here, the method for calculating the average of the width Wc, length Lc, and the ratio Rc of length Lc to width Wc of the protrusions 313 will be explained. In calculating the average of the width Wc, length Lc, and the ratio of length Lc to width Wc, first, three cross-sectional TEM images with a field of view of 170 nm × 170 nm, as shown in Figure 4, are acquired. Next, from among the multiple protrusions 313 included in each of the three cross-sectional TEM images, one protrusion 313a and two protrusions 313b adjacent to protrusion 313a are focused on. Among the contact portions of the focused protrusion 313a and the two protrusions 313b, the positions furthest to the negative side in the z-axis direction are designated as positions Pa1 and Pa2. A virtual line VL3 is set extending perpendicular to the z-axis, using either position Pa1 or Pa2, which is located on the positive side in the z-axis direction, as the reference point. The distance between the virtual line VL3 and the tip A1 of the protrusion 313a is defined as the length Lc of the protrusion 313a. Also, using either position Pa1 or Pa2 as the reference point, the length of the virtual line VL3 between the two protrusions 313b is defined as the width Wc of the protrusion 313a. The ratio Rc of length Lc to width Wc is calculated using the following formula (1). The two protrusions 313c located at both ends of Figure 4 are not included in their entirety in Figure 4 (only a portion is shown in Figure 4), and therefore are not included in the calculation of the average ratio Rc of length Lc to width Wc. Rc = Lc / Wc ... (1)

[0024] In the circuit board 1 of this embodiment, the length Lc of each of the multiple protrusions 313 is between 2 nm and 142 nm, and the average length Lc of each of the multiple protrusions 313 is 18 nm or more. In addition, the width Wc of each of the multiple protrusions 313 is between 2 nm and 65 nm.

[0025] Figure 5 is a cross-sectional photograph of the circuit board 1 of this embodiment. Figure 5 shows a cross-sectional TEM photograph of the portion of the circuit board 1 where the ceramic substrate 10 and the joint portion 31 are joined. As shown in Figure 5, the joint portion 31 has a plurality of protrusions 313 on the surface that contacts the ceramic substrate 10. The presence of copper has been detected in the plurality of protrusions 313 in the copper analysis using EDS described above.

[0026] In the circuit board 1 of this embodiment, the thermal conductivity between the conductive part 21 and the conductive part 22 is 170 W / (m·K) or higher. Specifically, when the relationship between the thickness of the conductive part 21, the thickness of the ceramic substrate 10, and the thickness of the conductive part 22 is, for example, 0.5:0.32:0.5, the thermal conductivity of the circuit board 1 is 170 W / (m·K) or higher. As a result, even if the power semiconductor elements 5 arranged on both sides of the circuit board 1 generate a large amount of heat, the heat can be released to the outside through the ceramic substrate 10.

[0027] Next, the manufacturing method of the circuit board 1 will be described. In the manufacturing method of the circuit board 1, a ceramic substrate 10 is first manufactured. In the manufacture of the ceramic substrate 10, the raw material powder of the silicon nitride sintered body is weighed. The raw material powder of the silicon nitride sintered body may be oxides, carbonates, hydroxides, nitrides, etc. of each element contained in the silicon nitride sintered body. In addition to silicon nitride, the raw material powder of the silicon nitride sintered body may include, for example, magnesium carbonate, calcium carbonate, yttrium oxide, etc. In this embodiment, the powders are weighed to be 94 wt% silicon nitride powder (average particle size 1.4 μm), 3 wt% magnesium carbonate powder (average particle size 2.5 μm), and 3 wt% yttrium oxide powder (average particle size 1.0 μm). These weighed powders and ethanol are added to a resin pot, and a mixed slurry is produced by wet mixing and grinding using a ball mill, for example at 60 rpm for 24 hours. The prepared slurry is dried by a water bath to produce a mixed powder.

[0028] In the fabrication of the ceramic substrate 10, the mixed powder is then filled into a mold and molded by, for example, uniaxial pressing at a pressure of 30 MPa. After that, a molded body is produced by, for example, CIP treatment (cold isohydrostatic pressing) at a pressure of 150 MPa. The fabricated molded body is then placed in, for example, a silicon carbide mold coated with BN on the inside and fired in a nitrogen atmosphere of 0.9 MPa at a maximum temperature of 1900°C for 10 hours to produce a silicon nitride sintered body. The ceramic substrate 10 is manufactured by processing the outer shape of the produced silicon nitride sintered body to a predetermined shape, for example, a flat plate shape and thickness. Processing can be done by, for example, cutting, grinding, polishing, etc. At this time, each of the pair of main surfaces 10a and 10b on which the conductive parts 21 and 22 of the ceramic substrate 10 are arranged is polished so that the arithmetic mean roughness Ra is 0.5 μm or less.

[0029] In the manufacturing method of the circuit board 1, separate from the manufacturing of the ceramic substrate 10, a plate material of a predetermined thickness made of oxygen-free copper, which will become the conductive parts 21 and 22, is prepared. The plate material that will become the conductive parts 21 and 22 may be made of a metal containing copper or a metal mainly composed of copper, in addition to oxygen-free copper. Next, a metal film mainly composed of titanium, which will become the joint parts 31 and 32, is formed on the surface of each of the two plate materials that will become the conductive parts 21 and 22, or on each of the pair of main surfaces 10a and 10b of the ceramic substrate 10. The metal film can be made by sputtering, vapor deposition, plating, etc. The thickness of the metal film is preferably 3 μm or less. It is desirable to remove organic matter such as oil adhering to the surface of the ceramic substrate 10 and the plate material before forming the metal film. It is thought that by sufficiently removing organic matter from the surface, the gas generated during heat treatment is suppressed and contributes to the diffusion of copper that forms the conductive parts 21 and 22. The process of removing organic matter can be carried out by, for example, degreasing, washing with water, washing with acetone, etc. These steps may be combined, or a surface drying step may be included. Furthermore, if a thin titanium metal foil with a thickness of 3 μm or less is available, the metal foil may be attached to the surfaces of the two plate materials that will form the conductive parts 21 and 22, or to the pair of main surfaces 10a and 10b of the ceramic substrate 10. Even in this case, a step to remove organic matter and a step to dry the surface may be included before attaching the metal foil.

[0030] Next, the plate material that will become the conductive parts 21 and 22 and the ceramic substrate 10 are laminated so that a metal film is sandwiched between the plate material that will become the conductive parts 21 and 22 and the ceramic substrate 10. If metal foil is available, the plate material that will become the conductive part 21, one of the two metal foils, the ceramic substrate 10, the other of the two metal foils, and the plate material that will become the conductive part 22 are laminated in that order. The laminate in which the plate material that will become the conductive parts 21 and 22 and the ceramic substrate 10 are laminated is subjected to HP treatment (hot pressing treatment) or HIP treatment (hot isostatic pressing treatment) to bond the plate material that will become the conductive parts 21 and 22 and the ceramic substrate 10. The conditions for HP treatment are, for example, a pressure of 5 MPa or more and 30 MPa or less, a maximum temperature of 850°C or more and 1050°C or less, and a maximum temperature holding time of 10 minutes or more and 2 hours or less. Note that the manufacturing method of the circuit board 1 is not limited to these methods.

[0031] Next, we will explain the results of the circuit board evaluation test. In this evaluation test, for each of the six types of circuit boards (hereinafter simply referred to as "samples") with different methods of creating the joints, we measured or calculated and evaluated the relationship between the presence or absence of specific atoms, numerical values ​​related to the shape of the protrusions, and mechanical strength, thermal properties, and heat resistance.

[0032] Figure 6 illustrates the results of the circuit board evaluation test. Each of the samples 1 to 6 shown in Figure 6 was manufactured by a method corresponding to the manufacturing method of the circuit board 1 of this embodiment. In the manufacture of sample 1, titanium, which will form the bonding area, was sputtered onto both sides of the ceramic substrate to a thickness of 1.0 μm. In the manufacture of sample 2, titanium, which will form the bonding area, was sputtered onto both sides of the ceramic substrate to a thickness of 0.5 μm. In the manufacture of sample 3, titanium, which will form the bonding area, was sputtered onto both sides of the ceramic substrate to a thickness of 0.2 μm. In the manufacture of sample 4, titanium, which will form the bonding area, was sputtered onto both sides of the ceramic substrate to a thickness of 3.0 μm. The conditions for the hot press treatment (hot pressure treatment) in each of samples 1 to 4 were a pressure of 10 MPa, a maximum temperature of 900°C, and a maximum temperature holding time of 30 minutes. In the preparation of Sample 5, a soldering agent containing titanium, copper, and silver was applied to a ceramic substrate to a thickness of 15 μm, and the ceramic substrate and the conductive part were bonded by heating to 800°C. In the preparation of Sample 6, a soldering agent containing titanium, copper, and silver was applied to a ceramic substrate to a thickness of 30 μm, and the ceramic substrate and the conductive part were bonded by heating to 800°C. The dimensions of each sample are 100 mm × 100 mm × 0.32 mm for the ceramic substrate and 100 mm × 100 mm × 0.5 mm for the conductive part.

[0033] The "presence or absence of copper atoms" shown in Figure 6 indicates the presence or absence of copper atoms at the interface between the ceramic and the bonding portion. The presence or absence of copper atoms at the interface between the ceramic and the bonding portion was determined using the same method as the EDS analysis of copper in the convex portion of the circuit board 1 of this embodiment. Specifically, if the copper element content concentration in the EDS analysis of the target element was 1 at% or more, it was determined that copper atoms were present and marked as "present," and if the copper element content concentration was less than 1 at%, it was determined that copper atoms were not present and marked as "absent."

[0034] The value "Lc (nm)" shown in Figure 6 represents the length of the protrusions containing titanium nitride and copper. Figure 6 shows the average length of the protrusions for each of Samples 1 to 6, along with the range of the protrusion lengths in parentheses. "Lc (nm)" was calculated using the same method as the calculation method for the length Lc of the protrusions in the circuit board 1 of this embodiment.

[0035] The value "Wc (nm)" shown in Figure 6 indicates the width of the protrusion at the joint. Figure 6 shows the average value of the protrusion width for each of Samples 1 to 6, along with the range of the protrusion width in parentheses. "Wc (nm)" was calculated using the same method as the calculation method for the length Lc of the protrusion in the circuit board 1 of this embodiment.

[0036] The "Lc / Wc(-)" shown in Figure 6 represents the ratio of the length to the width of the protrusions in the joint. "Lc / Wc(-)" is the ratio Rc of the length Lc to the width Wc of the protrusions 313 in the circuit board 1 of this embodiment, and was calculated for each of samples 1 to 6 using the "Lc(nm)" and "Wc(nm)" described above.

[0037] The value "Th_TiN(nm)" shown in Figure 6 indicates the thickness of the titanium nitride layer at the junction. "Th_TiN(nm)" was measured using the same method as the method used to measure the thickness of the titanium nitride layer 311 in the circuit board 1 of this embodiment.

[0038] The "Presence or Absence of Silver Atoms" shown in Figure 6 indicates the presence or absence of silver atoms at the junction. The presence or absence of silver atoms at the junction was determined using the concentration of silver element contained in the junction of the circuit board 1 of this embodiment. Specifically, in the analysis of silver element by EDS for a field of view of 33 μm × 33 μm, if the concentration of silver element was 1 at% or more, it was determined that silver atoms were present and marked as "present". If the concentration of silver element was less than 1 at%, it was determined that silver atoms were not present and marked as "absent".

[0039] The value "Sp (kN / m)" shown in Figure 6 represents the peel strength of the sample. For the measurement of "Sp (kN / m)", for each of the six types of samples, first, a 5 mm wide slit was made in a copper plate bonded to a ceramic substrate, then a portion of the edge of the copper plate was peeled off, and the plate was clamped in a tensile testing machine and pulled vertically to measure the load value when the copper plate was peeled off. Next, the measured load value was divided by the measured peel width and averaged to calculate the value.

[0040] The value "K(W / (m·K))" shown in Figure 6 represents the thermal conductivity of the sample. For the measurement of "K(W / (m·K))", a measurement sample with sides of 10 mm was first prepared for each of the six types of samples. After applying blackbody spray, the thermal diffusivity and specific heat were measured using the flash method. Next, the thermal conductivity was calculated as the product of the thermal diffusivity, specific heat, and density, using the density measured separately. Note that the measurement sample may also be prepared using a semiconductor package from which the semiconductor element has been removed.

[0041] The "Cold and Heat Cycle Test Results" shown in Figure 6 indicate resistance to thermal shock. For each of the samples from Sample 1 to Sample 6, the ceramic substrate was etched so that the conductive part bonded to the ceramic substrate was 50 mm x 50 mm, exposing the ceramic substrate. Then, the temperature was raised from -25°C to 150°C, and then cooled down to -25°C for 3000 cycles. Ultrasonic testing was used to check for any damage such as cracks or delamination. If no damage was found, the "Cold and Heat Cycle Test Results" were recorded as "No damage," and if damage was found, the "Cold and Heat Cycle Test Results" were recorded as "Damage present."

[0042] As shown in Fig. 6, it was confirmed that for Samples 1 to 4 where "Lc / Wc (-)" is 0.7 or more, the peel strength ("Sp (kN / m)") is greater than that of Samples 5 and 6 where no convex portions are formed. This is because a plurality of convex portions on the ceramic substrate side formed at the joint cause the convex portions to engage with the surface in contact with the joint of the ceramic substrate since "Lc / Wc (-)" is 0.7 or more, thus exerting an anchor effect and improving the bonding strength between the ceramic substrate and the joint.

[0043] As shown in Fig. 6, it was confirmed that in Samples 1 to 4, as "Lc / Wc (-)" increases, the thermal conductivity ("K (W / (m·K))") increases. Specifically, for Samples 1 to 3 where "Lc / Wc (-)" is 1.0 or more, "K (W / (m·K))" is greater than that of Sample 4 where "Lc / Wc (-)" is 0.7, and for Samples 2 and 3 where "Lc / Wc (-)" is 1.3 or more, "K (W / (m·K))" is greater than that of Sample 1 where "Lc / Wc (-)" is 1.0. Further, it was confirmed that for Sample 4 where "Lc / Wc (-)" is 1.8, "K (W / (m·K))" is greater than that of Sample 2 where "Lc / Wc (-)" is 1.3.

[0044] Regarding the silver atoms contained in the joint, it was confirmed that Samples 1 to 4 do not contain silver atoms, while Samples 5 and 6 where the joint was fabricated using a brazing material contain silver atoms. It was confirmed that Samples 1 to 4 have a greater thermal conductivity ("K (W / (m·K))") compared to Samples 5 and 6.

[0045] As shown in Fig. 6, in the "thermal cycle test results", Samples 1 to 4 with relatively high peel strength showed "no damage", while Samples 5 and 6 with relatively low peel strength showed "damage". From this, it was confirmed that Samples 1 to 4 where "Lc / Wc (-)" is 0.7 or more have improved resistance to thermal cycles.

[0046] According to the circuit board 1 of the present embodiment described above, the joint portion 31 that joins the ceramic substrate 10 and the conductive portion 21 has a plurality of convex portions 313 on the surface that contacts the ceramic substrate 10, and the joint portion 32 that joins the ceramic substrate 10 and the conductive portion 22 has a plurality of convex portions on the surface that contacts the ceramic substrate 10. The average of the ratio of the length Lc to the width Wc of each of the plurality of convex portions 313 of the joint portion 31 and the plurality of convex portions of the joint portion 32 is 0.7 or more. Thereby, since the plurality of convex portions are likely to engage with the ceramic substrate 10, the joining strength between the ceramic substrate 10 and the joint portions 31 and 32 can be improved. Further, since the convex portions of the joint portions 31 and 32 contain copper having a relatively high thermal conductivity, the heat of the power semiconductor element 5 connected to the conductive portions 21 and 22 can be efficiently transmitted to the ceramic substrate 10 through the convex portions. Therefore, while suppressing breakage of the circuit board 1, the thermal conductivity between the conductive portions 21 and 22 and the ceramic substrate 10 can be improved.

[0047] Further, according to the circuit board 1 of the present embodiment, each of the plurality of convex portions 313 of the joint portion 31 and the plurality of convex portions of the joint portion 32 has an elongated shape in which the length Lc is larger than the width Wc. Thereby, since the plurality of convex portions are more likely to engage with the ceramic substrate, the joining strength between the ceramic substrate 10 and the joint portions 31 and 32 can be further improved.

[0048] Further, according to the circuit board 1 of the present embodiment, the joint portion 31 has a titanium nitride layer 311 formed on the ceramic substrate 10 side by titanium contained in the joint portion 31 and nitrogen contained in the ceramic substrate 10, and the joint portion 32 has a titanium nitride layer on the ceramic substrate 10 side. These titanium nitride layers have a thickness of 100 nm or more and 1000 nm or less, and are relatively thin. Thereby, the heat of the power semiconductor element 5 connected to the conductive portion 21 can be efficiently transmitted to the ceramic substrate 10.

[0049] Further, according to the circuit board 1 of the present embodiment, each of the joint portions 31 and 32 does not contain silver, which is costly. Thereby, the manufacturing cost of the circuit board 1 can be reduced.

[0050] Furthermore, according to the circuit board 1 of this embodiment, the circuit board 1, which has two conductive parts 21 and 22 sandwiching the ceramic substrate 10, has a relatively high thermal conductivity in the two conductive parts 21 and 22, so that the heat of the power semiconductor element 5 connected to the conductive part 21 can be efficiently transferred to the conductive part 22.

[0051] Furthermore, according to the semiconductor package P1 of this embodiment, the semiconductor package P1 can efficiently dissipate the heat generated by the power semiconductor element 5, which generates a relatively large amount of heat, through the circuit board 1.

[0052] <Modifications of this Embodiment> The present invention is not limited to the above-described embodiments, and can be implemented in various forms without departing from the spirit of the invention. For example, the following modifications are also possible.

[0053] [Modification 1] In the above embodiment, the length of each of the multiple protrusions of the joint was set to be between 2 nm and 142 nm, and the width was set to be between 2 nm and 65 nm. The average length of each of the multiple protrusions was set to be 18 nm or more. The length, width, and average length of each of the multiple protrusions are not limited to these; the length may be greater than 142 nm, and the average length may be less than 18 nm. The goal is to achieve a stronger anchoring effect by engaging the protrusions with the ceramic substrate.

[0054] [Modification 2] In the above embodiment, the joint portion was assumed to have a titanium nitride layer with a thickness of 100 nm or more and 1000 nm or less. The titanium nitride layer is not required, and the thickness of the titanium nitride layer may be less than 100 nm or greater than 1000 nm.

[0055] [Modification 3] In the above embodiment, the joint portion did not contain silver. The joint portion may contain silver.

[0056] [Modification 4] In the above embodiment, the circuit board is provided with two conductive parts on a single ceramic substrate. The configuration of the circuit board is not limited to this. A configuration in which one conductive part is arranged on a single ceramic substrate is also possible.

[0057] [Modification 5] In the above embodiment, the semiconductor package comprises a circuit board and a power semiconductor element connected to a conductive part. The electronic component connected to the conductive part of the circuit board is not limited to a power semiconductor element.

[0058] The embodiments of this specification have been described above based on the embodiments and modifications described above. The embodiments described above are for the purpose of facilitating understanding of this specification and do not limit it. This specification may be modified and improved without departing from its spirit and the scope of the claims, and equivalents thereof are included in this specification. Furthermore, any technical features that are not described as essential in this specification may be deleted as appropriate.

[0059] <Application Example 1> A circuit board comprising: a ceramic substrate mainly composed of silicon nitride; a conductive portion formed of copper and connected to a semiconductor element; and a joint portion joining the ceramic substrate and the conductive portion, the joint portion containing titanium and having a plurality of protrusions on the surface in contact with the ceramic substrate, wherein the plurality of protrusions contain titanium nitride and copper, and the average ratio of the length to the width of each of the plurality of protrusions is 0.7 or more. <Application Example 2> The circuit board according to Application Example 1, wherein the length of each of the plurality of protrusions is 2 nm or more and 142 nm or less, the width of each of the plurality of protrusions is 2 nm or more and 65 nm or less, and the average length of each of the plurality of protrusions is 18 nm or more. <Application Example 3> The circuit board according to Application Example 1 or Application Example 2, wherein the joint portion has a titanium nitride layer on which the plurality of protrusions are formed, and the thickness of the titanium nitride layer is 100 nm or more and 1000 nm or less. <Application Example 4> A circuit board according to any one of Application Examples 1 to 3, characterized in that the joint portion does not contain silver. <Application Example 5> A circuit board according to any one of Application Examples 1 to 4, characterized in that the ceramic substrate has a pair of main surfaces, the conductive portion has a first conductive portion disposed on one of the pair of main surfaces of the ceramic substrate and a second conductive portion disposed on the other of the pair of main surfaces of the ceramic substrate, the joint portion has a first joint portion that joins the ceramic substrate and the first conductive portion and a second joint portion that joins the ceramic substrate and the second conductive portion, and the thermal conductivity between the first conductive portion and the second conductive portion is 170 W / (m·K) or more. <Application Example 6> A semiconductor package comprising a circuit board described in any one of Application Examples 1 to 5, and a power semiconductor element connected to the conductive portion.

[0060] 1...Circuit board 5...Power semiconductor element 10...Ceramic substrate 10a, 10b...Main surface (of ceramic substrate) 21, 22...Conductive part 31, 32...Bond part 311...Titanium nitride layer 313, 313a, 313b, 313c...Protrusion Lc...Length P1...Semiconductor package Rc...Ratio Wc...Width

Claims

1. A circuit board comprising: a ceramic substrate mainly composed of silicon nitride; a conductive portion formed of copper and connected to a semiconductor element; and a joint portion for joining the ceramic substrate and the conductive portion, the joint portion containing titanium and having a plurality of protrusions on the surface in contact with the ceramic substrate, wherein the plurality of protrusions contain titanium nitride and copper, and the average ratio of the length to the width of each of the plurality of protrusions is 0.7 or more.

2. A circuit board according to claim 1, characterized in that the length of each of the plurality of protrusions is 2 nm or more and 142 nm or less, the width of each of the plurality of protrusions is 2 nm or more and 65 nm or less, and the average length of each of the plurality of protrusions is 18 nm or more.

3. A circuit board according to claim 1 or claim 2, wherein the joint portion has a titanium nitride layer on which the plurality of protrusions are formed, and the thickness of the titanium nitride layer is 100 nm or more and 1000 nm or less.

4. A circuit board according to claim 1 or claim 2, characterized in that the joint portion does not contain silver.

5. A circuit board according to claim 1 or claim 2, wherein the ceramic substrate has a pair of main surfaces, the conductive portion has a first conductive portion disposed on one of the pair of main surfaces of the ceramic substrate and a second conductive portion disposed on the other of the pair of main surfaces of the ceramic substrate, the joint portion has a first joint portion that joins the ceramic substrate and the first conductive portion and a second joint portion that joins the ceramic substrate and the second conductive portion, and the thermal conductivity between the first conductive portion and the second conductive portion is 170 W / (m·K) or more.

6. A semiconductor package comprising a circuit board according to claim 1 or claim 2, and a power semiconductor element connected to the conductive portion.

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