Circuit board
The circuit board design addresses inefficiencies in connecting members by using inkjet-printed adhesive grooves for direct semiconductor connections, improving yield and reducing costs and thickness.
Patent Information
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- LG INNOTEK CO LTD
- Filing Date
- 2025-12-16
- Publication Date
- 2026-06-25
AI Technical Summary
Conventional circuit boards with mounted connecting members require additional processes like insulating layer stacking and circuit formation to connect semiconductor devices, leading to manufacturing inefficiencies and misalignment issues that reduce reliability.
A circuit board design using inkjet printing to form a protective layer with adhesive grooves and layers, allowing direct connection of semiconductor devices to connecting members without additional stacking, reducing process complexity and misalignment.
This design improves yield and reduces manufacturing costs by minimizing process steps, enhances reliability through stable electrical connections, and allows for thinner circuit boards.
Smart Images

Figure KR2025021887_25062026_PF_FP_ABST
Abstract
Description
circuit board
[0001] This embodiment relates to a circuit board.
[0002] Recently, technologies related to electronic products, such as AI and servers, are progressing toward multifunctionality and high speed, and to respond to this trend, semiconductor device manufacturing technology is also developing rapidly.
[0003] In particular, as the density of transistors and wiring within semiconductor devices increases, the number of I / O terminals on these devices is growing. To meet this trend, not only are the wiring densities, lengths, and widths of circuit boards becoming finer, but there is also a trend toward high-layer, large-area designs.
[0004] Furthermore, from the perspective of miniaturizing finished electronic products, the thickness of the applied circuit boards is also decreasing, and technologies related to multilayer circuit boards, which configure more circuit layers within a circuit board of the same thickness, are being actively researched. In addition, as the pitch of semiconductor devices narrows and the size of chips increases, chiplet technology for separating semiconductor chips by function is being researched. Moreover, technologies for connecting separated chiplets on circuit boards are being actively researched. Furthermore, by connecting semiconductor chips with different functions on circuit boards, technologies regarding the connection relationship between circuit boards and semiconductor devices are being actively researched, such as the circuit board connecting semiconductor chips to one another, which was previously considered only from the perspective of conventional semiconductor packaging.
[0005] A circuit board is a device in which circuit line patterns are arranged using a conductive material, such as copper, on an electrically insulating substrate; it is a general term for the package board immediately before mounting electronic components. To densely mount many different types of electronic components on a flat surface, the mounting positions of each component are determined, and circuit patterns connecting the components are printed and fixed onto the surface.
[0006] The circuit board includes a build-up insulating layer arranged in a vertical direction. The build-up insulating layer may be electrically connected to wiring layers arranged on each surface by vias connecting different wiring layers. In this case, via holes for the arrangement of vias may be formed in each of the build-up insulating layers. Additionally, a circuit layer may be formed for stacking a plurality of substrates or dies so that the circuit board is formed into a semiconductor package.
[0007] If necessary, a connecting member, including an interposer, may be mounted on the circuit board. The connecting member serves as a means to establish electrical connections between semiconductor devices when they are placed in different regions of the circuit board. Mounting such a connecting member on the circuit board enables various arrangements of semiconductor devices.
[0008] However, conventional circuit boards with mounted connecting members have a problem in that, after mounting the connecting members, an additional build-up insulating layer must be formed to electrically connect the semiconductor device and the connecting member while simultaneously preventing the connecting member from being exposed to the outside.
[0009] When forming a build-up insulating layer, multiple circuits and vias must be additionally placed on the upper surface of the connecting member, and for this purpose, additional processes such as insulating layer stacking and circuit and via formation are required to electrically connect the semiconductor substrate to the upper surface of the connecting member, which results in wasted manufacturing time and manufacturing costs for the circuit board.
[0010] Furthermore, conventionally, a paste-type adhesive layer was used to mount connecting members on a circuit board; however, in this case, the movement of the paste during the mounting process causes the connecting members to be misaligned, which not only reduces the reliability of the device but also creates a void between the connecting member and the insulating layer during the flow of the paste adhesive layer, resulting in a problem where electrical connection is not properly performed.
[0011] To solve the aforementioned problems, there is an urgent need to develop technology for stably mounting connection components on circuit boards.
[0012] The present invention provides a circuit board capable of forming a protective layer using inkjet printing to solve the above-mentioned problem.
[0013] A circuit board according to the present embodiment comprises: a first build-up insulating layer; a second build-up insulating layer laminated on top of the first build-up insulating layer and having an adhesive groove formed therein; a connecting member disposed in the adhesive groove; a first adhesive layer adhered to the lower surface of the connecting member; and a second adhesive layer disposed between the side surface of the connecting member and the inner surface of the adhesive groove of the second insulating layer, wherein the upper surface of the second adhesive layer may be formed to have a curved surface that is convex toward the upper side.
[0014] Additionally, the apparatus further includes a first build-up wiring layer comprising vias and a circuit layer penetrating the first build-up insulating layer; and a second build-up wiring layer comprising vias and a circuit layer penetrating the second build-up insulating layer, wherein one or more first bonding portions may be disposed on a portion of the circuit layer included in the second build-up wiring layer.
[0015] In addition, if there are multiple first bonding parts, the heights of the multiple first bonding parts may be the same.
[0016] In addition, one or more second bonding portions may be disposed on the upper surface of the connecting member.
[0017] In addition, if there are multiple second bonding parts, the height of the multiple second bonding parts may be the same.
[0018] In addition, the upper surface of the first bonding part and the height of the second bonding part may differ by a set value.
[0019] In addition, it may further include a first solder portion disposed on the upper surface of the first bonding portion and a second solder portion disposed on the upper surface of the second bonding portion.
[0020] In addition, the upper surface of the first solder part and the upper surface of the second solder part may be formed at the same height.
[0021] In addition, the first adhesive layer may be in the form of a film, and the second adhesive layer may be in the form of a paste.
[0022] Additionally, the second adhesive layer comprises a second-1 adhesive layer disposed between the lower surface of the first adhesive layer and the lower surface of the adhesive groove, and a second-2 adhesive layer disposed between the side of the connecting member and the side of the adhesive groove, and the upper surface of the second-2 adhesive layer may be formed convexly upward.
[0023] The circuit board according to the present embodiment has the following effects.
[0024] Since the connecting member including the interposer is placed on the upper side of the build-up insulating layer rather than inside the build-up insulating layer, the semiconductor device can be directly connected to the second bonding portion placed in the connecting member, thereby reducing the stacking process and the plating process associated therewith. Due to this reduction in processes, the circuit board yield is improved and the unit cost is reduced, while the thickness of the circuit board can be thinner than conventional ones.
[0025] In addition, since the separate cavity formation using a laser is omitted during the process step, there is a significant reduction in process efficiency.
[0026] In addition, when the heights of the first bonding part formed on the build-up insulating layer and the second bonding part formed on the connecting member are different during the process of forming the bonding part, the heights can be made equal through the formation of the solder part. Furthermore, since the second bonding part can be formed even when the bonding part is not formed on the connecting member, the electrical connection of the external semiconductor device is stably established, and consequently, the thickness of the semiconductor package can be reduced.
[0027] In addition, by placing the first adhesive layer in the form of a film on the connecting member in the adhesive groove formed in the second build-up insulating layer, as well as placing the second adhesive layer in the form of a paste, there is an effect of minimizing separate alignment misalignment during the process in which the interposer, which is the connecting member, is adhered into the adhesive groove.
[0028] In addition, a second adhesive layer in the form of a paste can be formed to fill the gap between the connecting member and the adhesive groove while having an upper surface that is curved. In particular, when the upper surface of the second adhesive layer is formed concavely downward, it has the effect of preventing a short circuit caused by interference of the adhesive layer during connection with an external semiconductor device.
[0029] FIG. 1 is a cross-sectional view of a circuit board according to an embodiment of the present invention.
[0030] FIG. 2 is a diagram illustrating the process of mounting a connecting member on a circuit board according to an embodiment of the present invention.
[0031] FIG. 3 is a drawing illustrating a first process for forming a bonding portion after mounting a connecting member having a bonding portion arranged on a circuit board according to an embodiment of the present invention.
[0032] FIG. 4 is a diagram illustrating a second process for forming a bonding portion after mounting a connecting member on a circuit board in which a bonding portion is not disposed, according to an embodiment of the present invention.
[0033] Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the attached drawings.
[0034] However, the technical concept of the present invention is not limited to some of the described embodiments but can be implemented in various different forms, and within the scope of the technical concept of the present invention, one or more of the components among the embodiments may be selectively combined or substituted.
[0035] In addition, terms used in the embodiments of the present invention (including technical and scientific terms) may be interpreted in a sense that is generally understood by those skilled in the art to which the present invention belongs, unless explicitly and specifically defined otherwise. Terms that are commonly used, such as terms defined in advance, may be interpreted in consideration of their meaning in the context of the relevant technology.
[0036] Additionally, the terms used in the embodiments of the present invention are for describing the embodiments and are not intended to limit the present invention. In this specification, the singular form may include the plural form unless specifically stated otherwise in the text, and when described as “at least one of A and B and C (or more than one),” it may include one or more of all combinations that can be combined with A, B, and C.
[0037] In addition, terms such as first, second, A, B, (a), (b), etc. may be used to describe the components of the embodiments of the present invention.
[0038] These terms are intended merely to distinguish a component from other components and are not limited by the nature, order, sequence, etc., of the said component.
[0039] And, where it is stated that a component is 'connected', 'combined', or 'joined' to another component, this may include not only cases where the component is directly connected, combined, or joined to the other component, but also cases where it is 'connected', 'combined', or 'joined' due to another component located between the component and the other component.
[0040] Furthermore, when described as being formed or placed "above or below" each component, "above" or "below" includes not only cases where two components are in direct contact with each other, but also cases where one or more other components are formed or placed between the two components. Additionally, when expressed as "above or below," it may include the meaning of a downward direction as well as an upward direction relative to a single component.
[0041] In addition, the expression that configuration A is positioned between configuration B and configuration C must include the meaning that configuration A is positioned such that at least a portion of it overlaps with configurations B and C in the horizontal and / or vertical directions.
[0042] Expressions referring to directions include horizontal and vertical directions, and the horizontal direction includes a first horizontal direction and a second horizontal direction perpendicular to the first horizontal direction. These are referred to as the first horizontal direction (X-axis), the second horizontal direction (Y-axis), and the vertical direction (Z-axis) according to the Cartesian coordinate system, and the meaning of being superimposed along the horizontal direction must include the meaning of being superimposed along the first horizontal direction and / or superimposed along the second horizontal direction.
[0043] Furthermore, the statement that Configuration A is exposed from Configuration B should be understood as meaning that Configuration A is exposed from Configuration B, not that Configuration A is exposed from the entire product. In other words, when Configuration A is stated to be exposed from Configuration B, it should be understood to mean that Configuration A is covered by at least a portion of Configuration C.
[0044] Furthermore, when it is stated that Component A 'contacts' Component B, this may include not only cases where the component 'contacts' the other component directly, but also cases where it 'contacts' due to another component located between the component and the other component. Therefore, if Component A is to be understood only as 'directly contacting' Component B, it is described as 'directly contacting'.
[0045] In addition, when it is stated that configuration A is 'covered' by configuration B, it should be understood that configuration A is covered by configuration B, and that the part intended for the function and purpose to be resolved is covered, and unless there are special circumstances, it should not be understood that the entire configuration A is covered by configuration B.
[0046] FIG. 1 is a cross-sectional view of a circuit board according to an embodiment of the present invention.
[0047] Referring to FIG. 1, a circuit board according to an embodiment of the present invention may include a build-up structure, a connecting member (300), an adhesive layer, and a protective layer. In this embodiment, a coreless structure in which a core layer within the circuit board is omitted has been described as an example, but the circuit board may include a core layer.
[0048] The circuit board may include a build-up structure. In this case, the circuit board may include a first region and a second region. The first region may be defined as a build-up structure region where a connecting member (300), to be described later, is not placed, and the second region may be defined as a build-up structure region where a connecting member (300), to be described later, is placed. The build-up structure may include a first build-up structure and a second build-up structure. The second build-up structure may be placed to be stacked on the upper surface of the first build-up structure.
[0049] The first build-up structure may include a first build-up insulating layer (110) and a first build-up wiring layer.
[0050] The first build-up insulating layer (110) may be arranged such that a plurality of insulating layers are stacked along a vertical direction. The build-up insulating layer may include a first insulating layer (111), a second insulating layer (112) disposed on the first insulating layer (111), and a third insulating layer (113) disposed on the second insulating layer (112). However, as this is just one example, the insulating layer may include only some of the first to third insulating layers (113) or additional insulating layers exceeding these may be disposed.
[0051] The first to third insulating layers (113) may be made of the same material. The first to third insulating layers (113) may be made of the same height. However, not limited thereto, the first to third insulating layers (113) may be made of different materials and / or different heights.
[0052] The first build-up insulating layer (110) may be any insulating material, such as a photocurable and / or thermosetting material. If the first build-up insulating layer (110) is thermosetting, the thermosetting insulating material may be an insulating material in which inorganic and / or organic fillers are dispersed within a resin, such as ABF (Ajinomoto Build-up Film), a product released by Ajinomoto Corporation, or a prepreg (PPG) containing glass fibers within a resin may be used. Additionally, the resin described above may be, for example, an epoxy resin, a bismaleimide triazine resin (BT resin), a phenolic resin, etc., and the inorganic and / or organic fillers may be provided with materials such as silica or plastic. Furthermore, in addition to this, the insulating material may include a reinforcing material provided with glass fibers or aramid fibers. If a plurality of insulating materials are photocurable insulating materials, each of the plurality of insulating materials may be a PID (Photo Imageable Dielectric).
[0053] The first build-up wiring layer is disposed on the first build-up insulating layer (110) and is a means for transmitting electrical signals and / or power to an electronic device such as a semiconductor chip. The first build-up wiring layer may include one or more wiring portions, one or more vias, and one or more electrical circuit layers (230).
[0054] One or more wiring sections may include one or more circuit layers. One or more circuit layers may be arranged to be electrically connected to one or more vias or to form a circuit on the surface of the first build-up insulating layer (110). Here, being arranged on the surface may also mean that at least a portion of the circuit layer is embedded within the insulating layer or protective layer and exposed to the outside from the surface. The circuit layer may be defined as a metal layer. The surface of the first build-up insulating layer (110) includes a first surface and a second surface, and a side between the first surface and the second surface. Here, the first surface of the insulating layer may be understood as the upper surface, and the second surface of the insulating layer may be understood as the lower surface. Being arranged on the surface means that the circuit layer is arranged on at least one of the first surface, the second surface, and the side between the first build-up insulating layer (110). The structure may have a circuit layer arranged on the first surface and the second surface of a portion of the insulating layer of the first build-up insulating layer (110), and a circuit layer arranged only on the first surface or the second surface of a portion of the first build-up insulating layer (110).
[0055] The circuit layer may include a first circuit layer (221, 231) disposed on the upper surface of a first insulating layer (111), a second circuit layer (222, 232) disposed on the upper surface of a second insulating layer (112), and a third circuit layer (223) disposed on the upper surface of a third insulating layer (113).
[0056] The first circuit layer (221, 231) may include a first-1 circuit layer (221) disposed in a first region of the first insulating layer (111) and a first-2 circuit layer (231) disposed in a second region of the first insulating layer (111). The first-1 circuit layer (221) may be disposed on the upper surface of the first insulating layer (111) in the first region of the first insulating layer (111). The first-2 circuit layer (231) may be disposed on the upper surface of the first insulating layer (111) in the second region of the first insulating layer (111).
[0057] The second circuit layer (222, 232) may include a second-1 circuit layer (222) disposed in a first region of the second insulating layer (112) and a second-2 circuit layer (232) disposed in a second region of the second insulating layer (112). The second-1 circuit layer (222) may be disposed on the upper surface of the second insulating layer (112) in the first region of the second insulating layer (112). The second-2 circuit layer (232) may be disposed on the upper surface of the second insulating layer (112) in the second region of the second insulating layer (112).
[0058] The third circuit layer (223) may be disposed on the upper surface of the third insulating layer (113) in the first region of the third insulating layer (113). The third circuit layer (223) may be electrically connected to the second build-up structure to be described later.
[0059] One or more vias may be a metallic material disposed in via holes formed in each of the first build-up insulating layers (110) to connect a plurality of circuit layers facing each other in a vertical direction. Here, the via holes penetrate at least a portion of each of the first build-up insulating layers (110) in a vertical direction, and vias may be disposed within the via holes. A plurality of vias may each be disposed to be electrically connected to a circuit layer.
[0060] The via may include a first via (211) penetrating at least a portion of the first insulating layer (111), a second via (212) penetrating at least a portion of the second insulating layer (112), and a third via (231) penetrating at least a portion of the third insulating layer (113). The first via (211), the second via (212), and the third via (231) may each have a shape in which the horizontal width decreases as it goes downward, but are not limited thereto.
[0061] The first via (211) can electrically connect the first circuit layer (221, 231) and the electrical circuit layer (230). The second via (212) can electrically connect the second circuit layer (222, 232) and the first circuit layer (221, 231). The third via (231) can electrically connect the third circuit layer (223) and the second circuit layer (222, 232). Specifically, the first via (211) can electrically connect the first-1 circuit layer (221) and the electrical circuit layer (230), the second via (212) can electrically connect the first-1 circuit layer (221) and the second-1 circuit layer (222), and the third via (231) can electrically connect the second-1 circuit layer (222) and the third circuit layer (223).
[0062] The electrical circuit layer (230) may be placed on the lower surface of the first build-up insulating layer (110) and electrically connected to an external component. The electrical circuit layer (230) may be placed on the lower surface of the third insulating layer (113). The electrical circuit layer (230) may be electrically connected to the first circuit layer (221, 231) by the first via (211). The electrical circuit layer (230) may be placed so that a portion of the lower surface is exposed to the outside, allowing an external component to be electrically connected.
[0063] The second build-up structure may include a second build-up insulating layer (120) and a second build-up wiring layer.
[0064] The second build-up insulating layer (120) may be disposed so as to be laminated on the upper surface of the first build-up insulating layer (110). The build-up insulating layer may include a fourth insulating layer (120) disposed on the third insulating layer (113). However, as this is just one example, the second build-up insulating layer (120) may additionally have insulating layers laminated thereon in addition to the fourth insulating layer (120).
[0065] The second build-up insulating layer (120) may be any insulating material, such as a photocurable and / or thermosetting material. If the second build-up insulating layer (120) is thermosetting, the thermosetting insulating material may be an insulating material in which inorganic and / or organic fillers are dispersed within a resin, such as ABF (Ajinomoto Build-up Film), a product released by Ajinomoto Corporation, or a prepreg (PPG) containing glass fibers within a resin may be used. Additionally, the resin described above may be, for example, an epoxy resin, a bismaleimide triazine resin (BT resin), a phenolic resin, etc., and the inorganic and / or organic fillers may be provided with materials such as silica or plastic. Furthermore, in addition to this, the insulating material may include a reinforcing material provided with glass fibers or aramid fibers. If a plurality of insulating materials are photocurable insulating materials, each of the plurality of insulating materials may be a PID (Photo Imageable Dielectric).
[0066] The fourth insulating layer (120) may be disposed on the upper surface of the third insulating layer (113). The fourth insulating layer (120) may have a second build-up wiring layer disposed in a first area, and a connecting member (300) disposed in a second area. The fourth insulating layer (120) may have an adhesive groove (121) formed in the second area for the connecting member (300) to be adhered to. In this case, the height of the adhesive groove (121) may be greater than the height of the connecting member (300), and the width of the adhesive groove (121) may be greater than the width of the connecting member (300).
[0067] The second build-up wiring layer is disposed on the second build-up insulating layer (120) and is a means for transmitting electrical signals and / or power to an electronic device such as a semiconductor chip. The second build-up wiring layer may include one or more wiring portions and one or more vias.
[0068] One or more wiring sections may include one or more circuit layers, one or more bonding sections, and one or more solder sections.
[0069] One or more circuit layers may be disposed on the surface of the second build-up insulating layer (120) to be electrically connected to one or more vias or to form a circuit. Here, being disposed on the surface may also mean that at least a portion of the circuit layer is embedded within the insulating layer or protective layer and exposed to the outside from the surface. The circuit layer may be defined as a metal layer. The surface of the second build-up insulating layer (120) includes a first surface and a second surface, and a side between the first surface and the second surface. Here, the first surface of the insulating layer may be understood as the upper surface, and the second surface of the insulating layer may be understood as the lower surface. Being disposed on the surface means that the circuit layer is disposed on at least one of the first surface, the second surface, and the side. The structure may have a circuit layer disposed on the first surface and the second surface of a portion of the second build-up insulating layer (120), and a circuit layer disposed only on the first surface or the second surface of a portion of the second build-up insulating layer (120).
[0070] The circuit layer may include a fourth circuit layer (224) disposed such that its surface is exposed on the upper surface of the fourth insulating layer (120). The fourth circuit layer (224) may be disposed in a first region of the fourth insulating layer (120). The fourth circuit layer (224) may be disposed such that its side is embedded in the fourth insulating layer (120) and its upper surface is exposed to the outside.
[0071] One or more bonding portions are arranged to protrude in a vertical direction and their lower surfaces are electrically connected to at least a portion of the second build-up insulating layer (120) and / or the connecting member (300), and a solder portion is arranged on one surface to electrically connect an external semiconductor device.
[0072] The bonding section may include a first bonding section (710) electrically connected to the fourth circuit layer (224) and a second bonding section (720) electrically connected to the connecting member (300).
[0073] The first bonding portion (710) may be formed to be electrically connected to the fourth circuit layer (224) and protrude upward. The first bonding portion (710) may be positioned so that a portion of its lower surface is covered by the first protective layer (600) among the protective layers to be described later. Accordingly, the first bonding portion (710) may have an area that protrudes upward from the first protective layer (600) and is exposed to the outside. The height from the upper surface of the first protective layer (600) to the upper surface of the first bonding portion (710) may be defined as the first set length (L1).
[0074] The second bonding portion (720) may be formed to be electrically connected to the connecting member (300) and protrude upward. The second bonding portion (720) may be positioned so that a portion of its lower surface is covered by the first protective layer (600) among the protective layers to be described later. Accordingly, the second bonding portion (720) may have an area that protrudes upward from the first protective layer (600) and is exposed to the outside. The height from the upper surface of the first protective layer (600) to the upper surface of the second bonding portion (720) may be defined as the second set length (L2).
[0075] The first bonding part (710) and the second bonding part (720) may be formed with different widths. The width of the first bonding part (710) may be formed to be larger than the width of the second bonding part (720). In this case, the second set length (L2) may be formed to have a longer length than the first set length (L1). However, as an example, the second bonding part (720) may be formed longer by the first bonding part (710). That is, the height of the first bonding part (710) and the second bonding part (720) may differ by a set value. This is a characteristic formed during the manufacturing process of the bonding part, and a detailed explanation thereof will be provided later.
[0076] One or more solder portions are each disposed in one or more bonding portions and are means for electrically connecting external semiconductor devices by bonding external semiconductor devices. The solder portions may include a first solder portion (711) and a second solder portion (721).
[0077] The first solder portion (711) is disposed on one side of the first bonding portion (710) and is a means for electrically connecting to an external semiconductor device. The first solder portion (711) may be disposed on the upper surface of the first bonding portion (710). The first solder portion (711) may have a height of a third set length.
[0078] The second solder portion (721) is a means for being electrically connected to an external semiconductor device by being disposed on one side of the second bonding portion (720). The second solder portion (721) may be disposed on the upper surface of the second bonding portion (720). The second solder portion (721) may have a height of a fourth set length. The fourth set length may have a longer length than the third set length. However, as an example, the first solder portion (711) may be formed longer by the second solder portion (721). That is, the first bonding portion (710) and the second bonding portion (720) may differ in height by a set value.
[0079] A semiconductor device can be electrically connected to the upper surfaces of the first solder section (711) and the second solder section (721). For a stable connection of the semiconductor device, the upper surfaces of the first solder section (711) and the second solder section (721) can be formed to have the same height. That is, the upper surfaces of the first solder section (711) and the second solder section (721) can be arranged to have heights parallel to each other.
[0080] The sum of the first set length (L1) of the first bonding part (710) and the third set length of the first solder part (711) may have the same height as the sum of the second set length (L2) of the second bonding part (720) and the fourth set length of the second solder part (721). That is, the first set length (L1) may be longer than the second set length (L2), and the third set length may be shorter than the fourth set length. Accordingly, the height of the exposed area of the first bonding part (710) and the first solder part (711) may be the same as the height of the exposed area of the second bonding part (720) and the second solder part (721).
[0081] One or more vias may be a metallic material disposed in via holes formed in the second build-up insulating layer (120) to connect a plurality of circuit layers facing each other in a vertical direction. Here, the via holes penetrate at least a portion of the second build-up insulating layer (120) in a vertical direction, and vias may be disposed within the via holes. A plurality of vias may each be disposed to be electrically connected to a circuit layer.
[0082] The via may include a fourth via (214) that penetrates at least a portion of the fourth insulating layer (120). Each of the fourth vias (214) may have a shape in which the horizontal width decreases as it goes downward, but is not limited thereto. The fourth via (214) may electrically connect the third circuit layer (223) and the fourth circuit layer (224).
[0083] A connecting member (300) is disposed in a second build-up structure and is a means for performing electrical connections between external semiconductor devices. Specifically, the connecting member (300) can connect a plurality of semiconductor devices and can perform electrical connections between the connected semiconductor devices. As an example, the connecting member (300) may include an interposer. The connecting member (300) may be made of one or more materials selected from silicon, glass, organic materials, and polymers.
[0084] The connecting member (300) may be disposed in the second build-up insulating layer (120) of the second build-up structure. The connecting member (300) may be disposed in the fourth insulating layer (120). The connecting member (300) may be disposed in the adhesive groove (121) disposed in the fourth insulating layer (120).
[0085] A bonding portion may be disposed on the upper surface of the connecting member (300) for electrical connection between semiconductor devices. One or more second bonding portions (720) may be disposed on the upper surface of the connecting member (300). An adhesive layer may be disposed on the lower surface and side of the connecting member (300). A first adhesive layer (400) may be disposed on the lower surface of the connecting member (300), and a second adhesive layer (500) may be disposed on the side. A detailed explanation thereof will be provided later.
[0086] The adhesive layer is a means for fixing the connecting member (300) to the second build-up structure. Specifically, the adhesive layer is disposed on the lower surface and side of the connecting member (300) to bond the connecting member (300) to the adhesive groove (121) of the fourth insulating layer (120) of the second build-up structure. The adhesive layer may be made of a material for providing electrical and thermal connections of the circuit board. For example, the adhesive layer may include one or more materials selected from epoxy, silicone, polyimide, solder paste, thermosetting resin, and metal nanomaterial. The adhesive layer may include a first adhesive layer (400) disposed on the lower surface of the connecting member (300) and a second adhesive layer (500) disposed on the lower surface of the first adhesive layer (400) and on the side of the connecting member (300).
[0087] The first adhesive layer (400) is disposed on the lower surface of the connecting member (300) and is a means for placing the connecting member (300) into the adhesive groove (121). The first adhesive layer (400) may be in the form of a film. For example, the first adhesive layer (400) may include a Die Attach Film (DAF). The upper surface of the first adhesive layer (400) may be adhered to the lower surface of the connecting member (300), and the lower surface may be disposed on the second adhesive layer (500).
[0088] The second adhesive layer (500) is arranged in a manner that wraps around a portion of the side of the connecting member (300) and the side and bottom surface of the first adhesive layer (400), serving as a means to place the connecting member (300) in the adhesive groove (121). The second adhesive layer (500) may be arranged in a paste form. The second adhesive layer (500) may be arranged to adhere to the adhesive groove (121) formed in the fourth insulating layer (120).
[0089] The second adhesive layer (500) may include a second-1 adhesive layer (510) disposed on the lower surface of the first adhesive layer (400) and a second-2 adhesive layer (520) disposed on the side of the first adhesive layer (400) and a part of the side of the connecting member (300). The gap between the adhesive groove (121) and the connecting member (300) may be filled by the second adhesive layer (500).
[0090] The second adhesive layer (500) can adhere the connecting member (300) to the adhesive groove (121) as it hardens during the process in which the connecting member (300), which is attached to the lower surface of the first adhesive layer (400), is pressed into the adhesive groove (121). In this process, since the second adhesive layer (500) is fluid in the form of a paste, adhesion can be achieved by filling the space between the adhesive groove (121) and the connecting member (300). Accordingly, the upper surface of the second adhesive layer (500) can form a curved surface.
[0091] The second adhesive layer (500) may have an upper surface (521) formed convexly upward. The second adhesive layer (500) may have an upper surface (521) protruding convexly toward the side of the connecting member (300). Specifically, the upper surface (521) of the second adhesive layer (500) may be formed convexly upward. Here, the upper surface of the second adhesive layer (500) may be defined as the upper surface of the adhesive paste placed in the space between the connecting member (300) and the adhesive groove (121). That is, the upper surface (521) of the second adhesive layer (500) may be formed convexly upward and positioned higher than the upper surface of the connecting member (300).
[0092] The upper surface (521) of the second adhesive layer (500) may be formed concavely downward. The upper surface (521) of the second adhesive layer (500) may be formed concavely on the side of the connecting member (300). Specifically, the upper surface (521) of the second adhesive layer (500) may be formed concavely downward. Here, the upper surface (521) of the second adhesive layer (500) may be defined as the upper surface of the adhesive paste placed in the space between the connecting member (300) and the adhesive groove (121). That is, the upper surface (521) of the second adhesive layer (500) may be formed convexly downward and positioned lower than the upper surface of the connecting member (300).
[0093] When a semiconductor device is electrically connected to the surface of a circuit board, specifically on the upper surface of the second build-up insulating layer (120) by a material such as solder, the protective layer can perform the function of preventing short circuits between solders due to low wettability with the solder, and can prevent problems where external contaminants penetrate into the build-up structure and reduce reliability. A photocurable insulating material may be used for the protective layer. As an example, a solder resist or a PID (Photo Imageable Dielectric) may be used for the protective layer.
[0094] The protective layer may include a first protective layer (600) disposed on the upper surface of the second build-up insulating layer (120) and a second protective layer (130) disposed on the lower surface of the first build-up insulating layer (110).
[0095] The first protective layer (600) may be placed on the upper surface of the second build-up insulating layer (120). The first protective layer (600) may be placed on the upper surface of the fourth insulating layer (120). The first protective layer (600) may be placed to cover the upper surface of the fourth insulating layer (120), a portion of the upper surface of the fourth circuit layer (224), the upper surface of the connecting member (300), and the upper surface of the second adhesive layer (500). The first protective layer (600) may be placed to cover the lower surface of the bonding portion. The upper surface of the first protective layer (600) may be formed to have the same height. Accordingly, the bonding portion may be exposed to the outside from the upper surface of the first protective layer (600).
[0096] The second protective layer (130) may be placed on the lower surface of the first build-up insulating layer (110). The second protective layer (130) may be placed on the lower surface of the first insulating layer (111). The second protective layer (130) may be placed to cover the lower surface of the first insulating layer (111) and a portion of the side and lower surface of the electrical circuit layer (230). A cavity may be formed in the second protective layer (130). A portion of the lower surface of the electrical circuit layer (230) may be exposed to the outside through the cavity. An external component may be electrically connected to the electrical circuit layer (230) through the cavity.
[0097] Below, a circuit board manufacturing step according to an embodiment of the present invention is described. FIG. 2 is a diagram illustrating the process of mounting a connecting member (300) on a circuit board according to an embodiment of the present invention, and FIG. 3 is a diagram illustrating a first process for forming a bonding part after mounting a connecting member (300) having a bonding part arranged on a circuit board according to an embodiment of the present invention.
[0098] Referring to FIGS. 2 and 3, a base substrate may be prepared in step (a) to manufacture a circuit board according to an embodiment of the present invention. The base substrate may include a first build-up structure, a second build-up structure, and a seed structure. Here, the seed structure may include a first seed (292) disposed on the upper surface of the second build-up structure to cover an adhesive groove (121) and a second seed (291) covering the upper surface of the second build-up insulating layer (120). The seed structure may be a component that is subsequently removed during the circuit board manufacturing process according to an embodiment of the present invention. The seed structure may have the same material as the first build-up wiring layer and the second build-up wiring layer, and its upper surface may be disposed in a flat shape. The base substrate may be manufactured by a plate separation process, but is not limited thereto.
[0099] (b) In step (b), the second seed among the seed structures can be etched by an etching process. As the second seed (291) is etched, the upper surface of the fourth insulating layer (120), which is the second build-up insulating layer (120), the upper surface of the fourth circuit layer (224), and the upper surface of the first seed (292) can be exposed to the outside.
[0100] (c) In step (c), the first seed (292) among the seed structures can be etched by an etching process. By etching the first seed (292), an adhesive groove (121) for subsequently attaching a connecting member (300) can be formed on the upper surface of the fourth insulating layer (120), which is the second build-up insulating layer (120).
[0101] (d) In step (d), a second adhesive layer (500) of the adhesive layer may be disposed on the lower surface of the adhesive groove (121). The second adhesive layer (500) may be disposed in the form of a paste. In this case, the amount of the second adhesive layer (500) may be sufficient to fill the gap between the adhesive groove (121) and the connecting member (300) when the connecting member (300) is adhered to the adhesive groove (121).
[0102] (e) In step (e), a connecting member (300) to be placed in the adhesive groove (121) may be prepared. The connecting member (300) may be prepared as either a first connecting member (300) having a second bonding portion (720) placed on its upper surface, or a second connecting member (300) in which the second bonding portion (720) is not placed on its upper surface or the length of the second bonding portion (720) is short. A first adhesive layer (400) may be prepared on the lower surface of the connecting member (300).
[0103] (f) In step (f), the connecting member (300) can be placed in the adhesive groove (121). In this step, the connecting member (300) can undergo a heat curing process while pressure is applied downward from the placement position. Accordingly, the upper surface of the first adhesive layer (400) can be adhered to the lower surface of the connecting member (300), and the lower surface can be adhered to the second adhesive layer (500). Additionally, since the second adhesive layer (500) is in the form of a paste, when pressure is applied to the connecting member (300) and the first adhesive layer (400) presses the second adhesive layer (500), the second adhesive layer (500) can flow upward to fill the gap between the connecting member (300) and the adhesive groove (121). Accordingly, the exposed upper surface of the second adhesive layer (500) between the second build-up insulating layer and the connecting member (300) can be formed convexly upward.
[0104] Afterwards, the manufacturing process of the circuit board in which the heights of the bonding part and the solder part are manufactured to be the same may vary depending on the type of connecting member (300). FIG. 3 is a manufacturing process of the circuit board when the connecting member (300) is the first connecting member (300).
[0105] Referring to FIG. 3, in step (g), a mask (810) may be placed on the upper surface of the substrate prepared in step (f). As an example, a Dry Film Resist (DFR) may be used for the mask (810). In the mask (810), a first bonding space (811) may be formed in the upper region of the upper surface of the fourth circuit layer (224) for placing a first bonding portion (710). The width of the first bonding space (811) may be formed to have the same width as the width of the first bonding portion (710). Accordingly, the upper surface of the fourth circuit layer (224) may be exposed to the outside by the first bonding space (811).
[0106] (h) In step (h), a first bonding section (710) can be formed in the first bonding space (811). In this case, since the patterning process or material injection process is performed for the same amount of time and according to the same criteria in the first bonding space (811) having the same width, the height of the first bonding section (710) can be formed to be the same.
[0107] (i) In step (i), a process for removing the mask may be performed. After forming the first bonding part (710), a process for removing the mask may be performed. Accordingly, the first bonding part (710) may be exposed to the outside.
[0108] (j) In step (j), a solder resist may be placed on the upper surface of the second build-up structure to form the first protective layer (600). As an example, the solder resist may be a Dry File Solder Resist (DFSR) placed on the upper surface of the second build-up structure.
[0109] (k) In step (k), the thickness of the first protective layer (600) can be controlled through an etching process of the solder resist. The first protective layer (600) can be formed with a thickness such that the upper surface is formed in a flat shape, but a part of the bonding portion is exposed to the outside. Accordingly, the upper surface of the first bonding portion (710) and the second bonding portion (720) can be exposed to the outside.
[0110] (l) In step (1), a mask (900) may be placed on the upper surface of the first protective layer (600). As an example, the mask (900) may be a DFR. The upper surface of the mask (900) may be formed in a flat shape. In the mask (900), a first solder space (901) and a second solder space (902) may be formed in the upper regions of the first bonding portion (710) and the second bonding portion (720), respectively. Accordingly, the upper surfaces of the first bonding portion (710) and the second bonding portion (720) may be exposed to the outside through the first solder space (901) and the second solder space (902), respectively.
[0111] (m) Step (m) is a step of placing a solder portion in the bonding portion. Specifically, a first solder portion (711) and a second solder portion (721) can be placed on the upper surfaces of the first bonding portion (710) and the second bonding portion (720), respectively. In this step, a first solder portion (711) can be formed in the first solder space (901), and a second solder portion (721) can be formed in the second solder space (902). Since the upper surface height of the mask (900) is the same, the first solder portion (711) and the second solder portion (721) in the first solder space (901) and the second solder space (902), respectively, can be formed at a height corresponding to the upper surface height of the mask, and accordingly, the upper surfaces of the first solder portion (711) and the second solder portion (721) can be formed to have the same height.
[0112] (n) In step (n), a process for removing the mask (900) may be performed. After forming the first solder part (711) and the second solder part (721), a process for removing the mask (900) may be performed. Accordingly, the first bonding part (710), the first solder part (711), the second bonding part (720), and the second solder part (721) may be exposed to the outside, and the upper surfaces of the first solder part (711) and the second solder part (721) may be formed to have the same height.
[0113] FIG. 4 is a diagram illustrating a second process for forming a bonding portion after mounting a connecting member in which a bonding portion is not disposed on a circuit board according to an embodiment of the present invention. Here, FIG. 4 is a manufacturing process of a circuit board in which the connecting member (300) is a second connecting member (300).
[0114] Referring to FIGS. 2 and 4, the processes of steps (a) through (f) are performed identically, and in steps (g') through (n'), the remaining processes, excluding steps (g') and (h'), are performed identically to steps (g) through (n). Therefore, only the processes of steps (g') and (h') will be described below.
[0115] In step (g'), a mask (810) may be placed on the upper surface of the substrate prepared in step (f). As an example, a Dry Film Resist (DFR) may be used for the mask (810). In the upper region of the upper surface of the fourth circuit layer (224) in the mask (810), a first bonding space (811) for placing a first bonding part (710) may be formed. The width of the first bonding space (811) may be formed to have the same width as the width of the first bonding part (710). Accordingly, the upper surface of the fourth circuit layer (224) may be exposed to the outside by the first bonding space (811). In the upper region of the mask (810) where a set position of the connecting member (300) or a short bonding part is formed, a second bonding space (812) for placing a second bonding part (720) may be formed. The width of the second bonding space (812) may be formed to have the same width as the width of the second bonding part (720). The width of the second bonding space (812) may be formed to have a width smaller than the width of the first bonding space (811). Accordingly, the upper surface of the connecting member (300) or the upper surface of the short bonding part disposed on the connecting member (300) may be exposed to the outside by the second bonding space (812).
[0116] In step (h'), a first bonding part (710) can be formed in the first bonding space (811) and a second bonding part (720) can be formed in the second bonding space (812). In this case, since the patterning process or material injection process is performed in the first bonding space (811) and the second bonding space (812) for the same amount of time and according to the same criteria, the same amount of metal material can be used, and due to the difference in width between the first bonding space (811) and the second bonding space (812), the height of the first bonding part (710) can be greater than the height of the second bonding part (720). That is, the first bonding part (710) can have a height of the first set length (L1), and the second bonding part (720) can have a height of the second set length (L2). In addition, when there are multiple first bonding spaces (811) and second bonding spaces (812), since each bonding space has the same width, all first bonding parts (710) can have the same height, and all second bonding parts (720) can also have the same height.
[0117] The processes of steps (i') through (n') that follow are identical to the processes of steps (i) through (n), so a redundant explanation thereof is omitted.
[0118] In the foregoing, although all components constituting an embodiment of the present invention have been described as being combined or operating in combination, the present invention is not necessarily limited to such embodiments. That is, within the scope of the purpose of the present invention, all components may be selectively combined in one or more ways to operate. Furthermore, terms such as "include," "constitute," or "have" described above, unless specifically stated otherwise, mean that the relevant component may be inherent; thus, they should be interpreted as allowing for the inclusion of additional components rather than excluding other components. All terms, including technical or scientific terms, have the same meaning as generally understood by those skilled in the art to which the present invention pertains, unless otherwise defined. Terms commonly used, such as those defined in advance, should be interpreted in accordance with their meaning in the context of the relevant technology and should not be interpreted in an ideal or overly formal sense unless explicitly defined in the present invention.
[0119] The foregoing description is merely an illustrative explanation of the technical concept of the present invention, and those skilled in the art to which the present invention pertains will be able to make various modifications and variations within the scope of the essential characteristics of the present invention. Accordingly, the embodiments disclosed in the present invention are intended to explain, not limit, the technical concept of the present invention, and the scope of the technical concept of the present invention is not limited by such embodiments. The scope of protection of the present invention shall be interpreted by the claims below, and all technical concepts within an equivalent scope shall be interpreted as being included within the scope of rights of the present invention.
[0120] Meanwhile, when a circuit board having the features of the invention described above is used in IT devices or home appliances such as smartphones, server computers, and TVs, it can stably perform functions such as signal transmission or power supply. For example, when a circuit board having the features of the invention performs a semiconductor package function, it can safely protect the semiconductor chip from external moisture or contaminants, and can resolve issues such as leakage current, electrical short circuits between terminals, or electrical open circuits of terminals supplying power to the semiconductor chip. In addition, when it is responsible for signal transmission, it can resolve noise issues. Through this, the circuit board having the features of the invention described above enables the stable operation of IT devices or home appliances, thereby allowing the entire product and the circuit board to which the invention is applied to achieve functional integration or technical interoperability.
[0121] When a circuit board having the features of the invention described above is used in a transportation device such as a vehicle, it can resolve the problem of signal distortion transmitted to the transportation device, or safely protect a semiconductor chip controlling the transportation device from the outside, and further improve the stability of the transportation device by resolving problems such as leakage current, electrical short circuits between terminals, or electrical open circuits of terminals supplying power to the semiconductor chip. Accordingly, the transportation device and the circuit board to which the present invention is applied can achieve functional integration or technical interoperability with each other.
Claims
1. First build-up insulating layer; A second build-up insulating layer laminated on top of the first build-up insulating layer and having an adhesive groove formed therein; A connecting member disposed in the adhesive groove above; A first adhesive layer adhered to the lower surface of the above-mentioned connecting member; and It includes a second adhesive layer disposed between the side of the connecting member and the inner surface of the adhesive groove of the second insulating layer, and A circuit board formed such that the upper surface of the second adhesive layer has a curved surface.
2. In Paragraph 1, A first build-up wiring layer comprising vias and a circuit layer penetrating the first build-up insulating layer; and a second build-up wiring layer comprising vias and a circuit layer penetrating the second build-up insulating layer, further comprising A circuit board having one or more first bonding portions disposed on a portion of the circuit layer included in the second build-up wiring layer.
3. In Paragraph 1, When there are multiple first bonding parts, the circuit board has the same height for the multiple first bonding parts.
4. In Paragraph 2, A circuit board having one or more second bonding portions disposed on the upper surface of the above-mentioned connecting member.
5. In Paragraph 4, When there are multiple second bonding parts, the height of the multiple second bonding parts is the same on the circuit board..
6. In Paragraph 5, A circuit board in which the upper surface of the first bonding part and the height of the second bonding part differ by a set value.
7. In Paragraph 4, A circuit board further comprising a first solder portion disposed on the upper surface of the first bonding portion and a second solder portion disposed on the upper surface of the second bonding portion.
8. In Paragraph 7, A circuit board formed with the same height on the upper surface of the first solder portion and the upper surface of the second solder portion.
9. In Paragraph 1, The first adhesive layer is in the form of a film, and The above second adhesive layer is a circuit board in the form of a paste.
10. In Paragraph 1, The second adhesive layer above is, It includes a 2-1 adhesive layer disposed between the lower surface of the 1 adhesive layer and the lower surface of the adhesive groove, and a 2-2 adhesive layer disposed between the side of the connecting member and the side of the adhesive groove. A circuit board having a curved upper surface of the above-mentioned second-2 adhesive layer.