Laser chip and method for preparation thereof

By designing oxide holes and trench structures with specific morphologies in the laser chip, the problem of transverse multimode lasing in high-speed VCSEL laser chips was solved, realizing vertical cavity surface lasing and improving optical power and modulation rate.

WO2026138027A1PCT designated stage Publication Date: 2026-07-02HISENSE BROADBAND MULTIMEDIA TECH

Patent Information

Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
HISENSE BROADBAND MULTIMEDIA TECH
Filing Date
2025-09-23
Publication Date
2026-07-02

AI Technical Summary

Technical Problem

High-speed VCSEL laser chips cannot achieve transverse single-mode lasing, resulting in reduced optical power and modulation rate.

Method used

By forming oxide holes with specific morphologies in the laser chip, and utilizing the design of oxide and reflective layers, a resonant cavity is formed to suppress transverse multimode lasing. The direction of photon oscillation is controlled by using oxide holes and trench structures with specific morphologies.

Benefits of technology

Vertical cavity surface lasing (VCS) of laser chips was achieved, which improved optical power and modulation rate, and enhanced the transmission efficiency of optical signals.

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Abstract

A laser chip (500) and a method for preparation thereof. A first reflective layer (520), an active area (530), an oxide layer (540) and a second reflective layer (550) are sequentially provided above a substrate (510). A first trench portion (560) and a second trench portion (570) are formed in the laser chip (500), so as to perform oxidation etching on the oxide layer (540). A first connecting portion (561) is connected between one end of the first trench portion (560) and one end of the second trench portion (570), and a second connecting portion (562) is connected between the other end of the first trench portion (560) and the other end of the second trench portion (570). Under the synergistic effect of crystallographic anisotropy and the first connecting portion (561) and the second connecting portion (562) on the rate of oxidation, an oxide aperture (541) comprises a first oxide arc region (5411), a second oxide arc region (5412), a third oxide arc region (5413) and a fourth oxide arc region (5414), wherein the first oxide arc region (5411) and the second oxide arc region (5412) are arranged opposite each other, the third oxide arc region (5413) and the fourth oxide arc region (5414) are arranged opposite each other, and the radius of curvature of the third oxide arc region (5413) is different from that of the fourth different arc region (5414), so as to form specific irregular morphology. The oxide hole (541) having irregular morphology can effectively suppress lateral multi-mode lasing of an optical signal, thereby reducing mode degeneracy.
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Description

A laser chip and its fabrication method

[0001] This application claims priority to Chinese Patent Application No. 202411920125.6, filed on December 24, 2024; and priority to Chinese Patent Application No. 202411921645.9, filed on December 24, 2024; the entire contents of which are incorporated herein by reference. Technical Field

[0002] This disclosure relates to the field of optical communication technology, and in particular to a laser chip and its fabrication method. Background Technology

[0003] With the development of new business and application models such as cloud computing, mobile internet, and video, advancements in optical communication technology have become increasingly important. In optical communication technology, the optical module, as one of the key components in optical communication equipment, enables photoelectric signal conversion; and in the development of optical communication technology, the data transmission rate of optical modules is required to continuously improve.

[0004] The optical module includes an optical emitting component, which in turn includes a laser chip. This laser chip can be a Vertical Cavity Surface Emitting Laser (VCSEL). In a VCSEL, the laser emission direction is perpendicular to the resonant cavity surface. High-speed VCSELs cannot achieve transverse single-mode lasing, thus reducing optical power and modulation rate. Summary of the Invention

[0005] Some embodiments provide a laser chip and a method for fabricating the same, which suppresses lateral multimode lasing of the laser chip by forming oxide holes with specific morphology.

[0006] In some embodiments, a laser chip is provided, comprising:

[0007] Substrate;

[0008] A first reflective layer is located above the substrate;

[0009] An active region, located above the first reflective layer, is configured such that N-type carriers and P-type carriers recombine in the active region to generate photons; the first reflective layer provides the N-type carriers to the active region;

[0010] An oxide layer is located above the active region;

[0011] The second reflective layer, located above the oxide layer, is configured to provide P-type carriers to the active region;

[0012] The structure of the oxide layer satisfies any one of the following:

[0013] The oxide layer includes oxide holes surrounded by a first oxide region. Each oxide hole includes a first oxide arc, a second oxide arc, a third oxide arc, and a fourth oxide arc. The first oxide arc and the second oxide arc are positioned opposite each other, as are the third and fourth oxide arcs. The third and fourth oxide arcs have different radii of curvature. P-type charge carriers flow into the active region along the oxide holes. The second reflective layer and the first reflective layer form a resonant cavity. Photons oscillate within the resonant cavity to generate laser light, and a corresponding modulated optical signal is generated by modulating an electrical signal. The optical signal is output from the oxide holes in a direction perpendicular to the substrate surface.

[0014] The laser chip also includes:

[0015] The first trench extends downward along the surface of the second reflective layer to above the active region, and the first trench is located on one side of the first oxide region;

[0016] The second trench extends downward along the surface of the second reflective layer to above the active region, and the second trench is located on the other side of the first oxide region; a first connecting portion is connected between one end of the second trench and one end of the first trench, and a second connecting portion is connected between the other end of the second trench and the other end of the first trench.

[0017] Alternatively, the oxide layer may include:

[0018] The first oxide hole includes a third oxide arc and a fourth oxide arc arranged opposite to each other, wherein the third oxide arc and the fourth oxide arc have different radii of curvature; the long axis of the first oxide hole is arranged parallel to the long side extension direction of the substrate.

[0019] The second oxide hole includes a seventh oxide arc and an eighth oxide arc arranged opposite each other, the seventh oxide arc and the eighth oxide arc having different radii of curvature; the long axis of the second oxide hole is arranged parallel to the long side extension direction of the substrate; the P-type charge carriers flow into the active region along the first oxide hole and the second oxide hole respectively; the photons oscillate between the first reflective layer and the second reflective layer, thereby generating a first optical signal and a second optical signal, the first optical signal being output from the first oxide hole perpendicular to the substrate surface, and the second optical signal being output from the second oxide hole perpendicular to the substrate surface.

[0020] In some embodiments, a method for fabricating a laser chip is provided, comprising:

[0021] A first reflective layer, an active region, an oxide layer, and a second reflective layer are sequentially grown on the substrate surface, and the crystal plane index of the substrate surface is at a preset angle to the crystal plane.

[0022] The second reflective layer is etched downwards along its surface to above the active region to form a first trench and a second trench, thereby exposing the inner sidewalls of the oxide layer for oxidation etching. A first connection is provided between one end of the second trench and one end of the first trench, and a second connection is provided between the other end of the second trench and the other end of the first trench.

[0023] When placed in a high-temperature water vapor oxidation environment, the oxygen in the first groove and the second groove comes into contact with the oxide layer and oxidizes the oxide layer inward, forming a first oxidation zone in the oxidized area;

[0024] When the oxide layer includes oxide pores, the unoxidized area forms oxide pores, and the oxide pores are surrounded by the first oxide area; wherein the oxide pores include a first oxide arc, a second oxide arc, a third oxide arc and a fourth oxide arc, the first oxide arc and the second oxide arc are arranged opposite to each other, the third oxide arc and the fourth oxide arc are arranged opposite to each other, and the third oxide arc and the fourth oxide arc have different radii of curvature.

[0025] When the oxide layer includes a first oxide pore and a second oxide pore, the unoxidized area forms the first oxide pore, and the first oxide pore is surrounded by the first oxide region; the oxygen in the third trench and the fourth trench comes into contact with the oxide layer and oxidizes the oxide layer inward, the oxidized area forms the fifth oxide region, the unoxidized area forms the second oxide pore, and the second oxide pore is surrounded by the fifth oxide region;

[0026] The first oxide hole includes a third oxide arc and a fourth oxide arc arranged opposite to each other, the third oxide arc and the fourth oxide arc having different radii of curvature; the long axis of the first oxide hole is arranged parallel to the long side extension direction of the substrate;

[0027] The second oxide hole includes a seventh oxide arc and an eighth oxide arc arranged opposite each other, the seventh oxide arc and the eighth oxide arc having different radii of curvature; the long axis of the second oxide hole is arranged parallel to the long side extension direction of the substrate. Attached Figure Description

[0028] To more clearly illustrate the technical solutions in this disclosure, the accompanying drawings used in some embodiments of this disclosure will be briefly described below. Obviously, the drawings described below are merely drawings of some embodiments of this disclosure, and those skilled in the art can obtain other drawings based on these drawings. Furthermore, the drawings described below can be regarded as schematic diagrams and are not intended to limit the actual size of the product, the actual flow of the method, the actual timing of the signals, etc. involved in the embodiments of this disclosure.

[0029] Figure 1 is a partial architecture diagram of an optical communication system according to some embodiments of the present disclosure;

[0030] Figure 2 is a partial structural diagram of a host computer according to some embodiments of the present disclosure;

[0031] Figure 3 is a structural diagram of an optical module according to some embodiments of the present disclosure;

[0032] Figure 4 is an exploded view of an optical module according to some embodiments of the present disclosure;

[0033] Figure 5 is an internal structural diagram of an optical module according to some embodiments of the present disclosure;

[0034] Figure 6 is an exploded view of the internal structure of an optical module according to some embodiments of the present disclosure;

[0035] Figure 7 is a cross-sectional view of the internal structure of an optical module according to some embodiments of the present disclosure;

[0036] Figure 8 is a cross-sectional view of the internal structure of an optical module according to some embodiments of the present disclosure;

[0037] Figure 9 is a cross-sectional view of the internal structure of an optical module according to some embodiments of the present disclosure;

[0038] Figure 10 is a cross-sectional structural diagram of a laser chip according to some embodiments of the present disclosure;

[0039] Figure 11 is a partial top view of a laser chip according to some embodiments of the present disclosure;

[0040] Figure 12 is a schematic diagram of an oxide pore morphology structure according to some embodiments of the present disclosure;

[0041] Figure 13 is a flowchart of a method for fabricating a laser chip according to some embodiments of the present disclosure;

[0042] Figure 14 is a schematic diagram of a laser chip array emitting light according to some embodiments of the present disclosure;

[0043] Figure 15 is a cross-sectional structural diagram of another laser chip according to some embodiments of the present disclosure;

[0044] Figure 16 is a partial top view of another laser chip according to some embodiments of the present disclosure;

[0045] Figure 17 is a diagram of the internal structure of another laser chip according to some embodiments of the present disclosure;

[0046] Figure 18 is a flowchart of another method for fabricating a laser chip according to some embodiments of the present disclosure. Detailed Implementation

[0047] The embodiments of this disclosure will now be described clearly and in detail with reference to the accompanying drawings. However, the described embodiments are merely some, and not all, of the embodiments of this disclosure. All other embodiments obtained by those skilled in the art based on the embodiments provided in this disclosure are within the scope of protection of this disclosure.

[0048] Unless the context otherwise requires, throughout the specification and claims, the term "comprising" is interpreted as open and inclusive, meaning "including, but not limited to"; the terms "first" and "second" should not be construed as indicating or implying relative importance or an upper limit on the number; the term "multiple" means two or more; the term "connection" should be interpreted broadly; for example, "connection" can be a fixed connection; "connection" can also be a detachable connection; "connection" can be integral; "connection" can be a direct connection; "connection" can also be an indirect connection through an intermediate medium; the use of the terms "applicable to" or "configured to" implies open and inclusive language; the terms "applicable to" or "configured to" do not exclude applicability to or configuration for performing additional tasks or steps; descriptions such as "parallel," "perpendicular," "identical," "consistent," and "aligned" are not limited to absolute mathematical theoretical relationships; descriptions such as "parallel," "perpendicular," "identical," "consistent," and "aligned" also include acceptable error ranges arising in practice; descriptions such as "parallel," "perpendicular," "identical," "consistent," and "aligned" also include differences based on the same design concept but due to manufacturing reasons.

[0049] In optical communication technology, information is loaded onto light to establish information transmission between information processing devices. The speed of light propagation is then utilized for information transmission. The light carrying the information is called an optical signal. When optical signals are transmitted in optical information transmission equipment, power loss is reduced, facilitating long-distance transmission. Furthermore, the cost of optical information transmission equipment, such as fiber optic cables, is lower than that of electrical information transmission equipment, such as copper wires. Therefore, optical communication technology can achieve high-speed, long-distance, and low-cost information transmission.

[0050] Information processing equipment typically includes optical network units (ONUs). Information processing equipment typically includes gateways. Information processing equipment typically includes routers. Information processing equipment typically includes switches. Information processing equipment typically includes mobile phones. Information processing equipment typically includes computers. Information processing equipment typically includes servers. Information processing equipment typically includes tablets. Information processing equipment typically includes televisions. Optical information transmission equipment typically includes optical fibers. Optical information transmission equipment typically includes optical waveguides. The signals that information processing equipment can recognize and process are electrical signals. Optical communication technology uses optical signals for transmission. To achieve signal transmission between optical information transmission equipment and information processing equipment, optical modules are needed to convert between optical and electrical signals.

[0051] An optical module enables the conversion between optical signals and electrical signals between information processing equipment and optical information transmission equipment. In some embodiments, at least one of the optical signal input or output terminals of the optical module is connected to an optical fiber. At least one of the electrical signal input or output terminals of the optical module is connected to an optical network terminal. A first optical signal from the optical fiber is transmitted to the optical module. The optical module converts the first optical signal into a first electrical signal. The optical module transmits the first electrical signal to the optical network terminal. A second electrical signal from the optical network terminal is transmitted to the optical module. The optical module converts the second electrical signal into a second optical signal. The optical module transmits the second optical signal back to the optical fiber.

[0052] Since multiple information processing devices can transmit information via electrical signals, at least one of these devices needs to be directly connected to the optical module. It is not necessary for all information processing devices to be directly connected to the optical module. The information processing device directly connected to the optical module is also called the host computer of the optical module. The optical signal input or output terminal of the optical module is called the optical port. The electrical signal input or output terminal of the optical module is called the electrical port.

[0053] Figure 1 is a partial structural diagram of an optical communication system according to some embodiments. As shown in Figure 1, the optical communication system mainly includes a remote information processing device 1000. The optical communication system mainly includes a local information processing device 2000. The optical communication system mainly includes a host computer 100 with optical modules. The optical communication system mainly includes optical modules 200. The optical communication system mainly includes optical fiber 101. The optical communication system mainly includes network cable 103. Optical fiber 101 is an optical information transmission device. Network cable 103 is an electrical information transmission device.

[0054] In some embodiments, one end of the optical fiber 101 extends toward the remote information processing device 1000. The other end of the optical fiber 101 is connected to the optical module 200 through its optical port. Optical signals can undergo total internal reflection in the optical fiber 101. The propagation of the optical signal in the direction of total internal reflection almost maintains its original optical power. Multiple total internal reflections occur in the optical fiber 101 to transmit the optical signal from the remote information processing device 1000 to the optical module 200, thereby achieving long-distance information transmission with low power loss. Multiple total internal reflections occur in the optical fiber 101 to transmit the optical signal from the optical module 200 to the remote information processing device 1000, thereby achieving long-distance information transmission with low power loss.

[0055] The optical communication system includes one or more optical fibers 101. In some embodiments, the optical fiber 101 is detachably connected to the optical module 200. In some embodiments, the optical fiber 101 is non-detachably connected to the optical module 200.

[0056] The host computer 100 is configured to provide data signals to the optical module 200. The host computer 100 is configured to receive data signals from the optical module 200. The host computer 100 is configured to monitor or control the operating status of the optical module 200.

[0057] The host computer 100 includes a housing for accommodating the optical module 200. The host computer 100 includes an optical module interface 102 disposed on the housing. The optical module 200 is inserted into the housing through the optical module interface 102 to establish a unidirectional or bidirectional electrical signal connection between the host computer 100 and the optical module 200.

[0058] The host computer 100 also includes an external power interface. This external power interface can connect to an electrical signal network. In some embodiments, the external power interface includes a Universal Serial Bus (USB) interface. In some embodiments, the external power interface includes a network cable interface 104. The network cable interface 104 is configured to connect a network cable 103 to establish a unidirectional or bidirectional electrical signal connection between the host computer 100 and the network cable 103.

[0059] One end of the network cable 103 is connected to the local information processing device 2000, and the other end is connected to the host computer 100. An electrical signal connection is established between the local information processing device 2000 and the host computer 100 via the network cable 103. In some embodiments, a third electrical signal emitted by the local information processing device 2000 is transmitted to the host computer 100 via the network cable 103. The host computer 100 generates a second electrical signal based on the third electrical signal. This second electrical signal from the host computer 100 is transmitted to the optical module 200. The optical module 200 converts the second electrical signal into a second optical signal. The optical module 200 transmits the second optical signal to the optical fiber 101. The second optical signal is transmitted in the optical fiber 101 to the remote information processing device 1000.

[0060] In some embodiments, a first optical signal from a remote information processing device 1000 propagates through an optical fiber 101. The first optical signal from the optical fiber 101 is transmitted to an optical module 200. The optical module 200 converts the first optical signal into a first electrical signal. The optical module 200 transmits the first electrical signal to a host computer 100. The host computer 100 generates a fourth electrical signal based on the first electrical signal. The host computer 100 transmits the fourth electrical signal to a local information processing device 2000.

[0061] In some embodiments, the optical module is a tool for converting optical signals to electrical signals. During the optical-to-electrical signal conversion process, the information itself remains unchanged. However, the encoding or decoding method of the information changes during the optical-to-electrical signal conversion process.

[0062] In addition to optical network terminals, the host computer 100 also includes optical line terminals (OLTs), optical network equipment (ONTs), and data center servers.

[0063] Figure 2 is a partial structural diagram of a host computer according to some embodiments. To clearly show the connection relationship between the optical module 200 and the host computer 100, Figure 2 only shows the structure of the host computer 100 related to the optical module 200. As shown in Figure 2, in some embodiments, the host computer 100 further includes a PCB circuit board 105 disposed within a receiving cavity. In some embodiments, the host computer 100 further includes a cage 106 disposed on the surface of the PCB circuit board 105. The optical module 200 is inserted into the cage 106. The optical module 200 is fixed by the cage 106.

[0064] In some embodiments, a heat sink 107 is provided on the cage 106. The heat sink 107 is capable of dissipating heat for the optical module. In some embodiments, the heat sink 107 has protruding structures such as fins to increase the heat dissipation area.

[0065] In some embodiments, an electrical connector is provided inside the cage 106. This electrical connector is configured to connect to the electrical port of the optical module 200.

[0066] In some embodiments, the optical module 200 is inserted into the cage 106 of the host computer 100. The cage 106 secures the optical module 200. The heat generated by the optical module 200 is conducted to the cage 106 and then diffused through the heat sink 107.

[0067] In some embodiments, the optical module 200 is inserted into the cage 106 of the host computer 100. The electrical port of the optical module 200 is connected to the electrical connector inside the cage 106. The optical module 200 establishes an electrical signal connection with the host computer 100.

[0068] In some embodiments, the optical port of the optical module 200 is connected to the optical fiber 101, thereby enabling the optical module 200 to establish an optical signal connection with the optical fiber 101.

[0069] Figure 3 is a structural diagram of an optical module according to some embodiments. Figure 4 is an exploded view of an optical module according to some embodiments. As shown in Figures 3 and 4, in some embodiments, the optical module 200 includes a shell. The shell includes an upper shell 201. The shell includes a lower shell 202. The upper shell 201 covers the lower shell 202. The shell forms two openings 204 and 205. One of the two openings 204 and 205 is an electrical port, and the other opening is an optical port. In some embodiments, the shell forms a single opening. This opening serves as both an electrical port and an optical port.

[0070] In some embodiments, the upper housing 201 and the lower housing 202 are made of metal. Metal materials are advantageous for achieving electromagnetic shielding and heat dissipation.

[0071] The assembly method using an upper housing 201 and a lower housing 202 facilitates the installation of circuit boards 300 and other components into the aforementioned housings. The upper housing 201 and lower housing 202 can encapsulate and protect the aforementioned devices.

[0072] The direction of the line connecting the two openings 204 and 205 can be consistent with the length direction of the optical module 200. Alternatively, the direction of the line connecting the two openings 204 and 205 can be inconsistent with the length direction of the optical module 200. In some embodiments, opening 204 is located at the end of the optical module 200 (right end of FIG. 3), and opening 205 is also located at the end of the optical module 200 (left end of FIG. 3). In some embodiments, opening 204 is located at the end of the optical module 200, while opening 205 is located on the side of the optical module 200.

[0073] In some embodiments, the lower housing 202 includes a base plate 2021. The lower housing 202 includes two lower side plates 2022 located on both sides of the base plate 2021. The two lower side plates 2022 are disposed perpendicular to the base plate 2021. The upper housing 201 includes a cover plate 2011. The cover plate 2011 covers the two lower side plates 2022 of the lower housing 202 to form the aforementioned housing.

[0074] In some embodiments, the lower housing 202 includes a base plate 2021. The lower housing 202 includes two lower side plates 2022 located on both sides of the base plate 2021. The two lower side plates 2022 are disposed perpendicular to the base plate 2021. The upper housing 201 includes a cover plate 2011. The upper housing 201 includes two upper side plates located on both sides of the cover plate 2011. The two upper side plates are disposed perpendicular to the cover plate 2011. The two upper side plates and the two lower side plates 2022 are combined to allow the upper housing 201 to cover the lower housing 202.

[0075] As shown in Figures 3 and 4, in some embodiments, the optical module includes a circuit board 300 disposed within a housing. The circuit board 300 includes circuit traces. The circuit board 300 includes electronic components. The circuit board 300 includes chips. The electronic components and chips are connected according to a circuit design via the circuit traces to achieve power supply functionality. The electronic components and chips are connected according to a circuit design via the circuit traces to achieve electrical signal transmission functionality. The electronic components and chips are connected according to a circuit design via the circuit traces to achieve grounding functionality. Electronic components may include capacitors. Electronic components may include resistors. Electronic components may include transistors. Electronic components may include metal-oxide-semiconductor field-effect transistors (MOSFETs). Chips may include microcontroller units (MCUs). Chips may include laser driver chips. Chips may include transimpedance amplifiers (TIAs). Chips may include limiting amplifiers (LAs). Chips may include clock and data recovery chips (CDRs). Chips may include power management chips. Chips can include digital signal processing (DSP) chips.

[0076] In some embodiments, the circuit board includes a rigid circuit board. Due to its relatively rigid material, the rigid circuit board can also serve a load-bearing function. The rigid circuit board can stably support the aforementioned electronic components and chips. The rigid circuit board can also be inserted into an electrical connector within the cage 106 of the host computer 100.

[0077] In some embodiments, the circuit board further includes a flexible circuit board. The flexible circuit board can be used independently. The flexible circuit board can also be used in conjunction with a rigid circuit board.

[0078] In some embodiments, the circuit board further includes gold fingers formed on its end surfaces. The gold fingers consist of a plurality of independent pins.

[0079] In some implementations, the gold fingers 301 are disposed on one side of the surface of the circuit board 300 (e.g., the upper surface shown in Figure 4). In some implementations, the gold fingers 301 are disposed on the upper and lower surfaces of the circuit board 300 to provide a greater number of pins, thereby adapting to applications with high pin count requirements.

[0080] In some implementations, the gold fingers of the circuit board extend from opening 204. The gold fingers of the circuit board are inserted into the electrical connector of the host computer 100. The circuit board is inserted into cage 106. The gold fingers 301 are connected to the electrical connector within cage 106. The gold fingers 301 are configured to establish an electrical connection with the host computer. The gold fingers 301 can provide power. The gold fingers 301 can provide grounding. The gold fingers 301 can provide two-wire synchronous serial (Inter-Integrated Circuit, I2C) signal transmission. The gold fingers 301 can provide data signal transmission. The gold fingers 301 can provide electrical connection.

[0081] In some embodiments, the optical module 200 further includes an unlocking component 600 located outside its housing. The unlocking component 600 is configured to establish a fixed connection between the optical module 200 and a host computer. The unlocking component 600 is also configured to release the fixed connection between the optical module 200 and the host computer.

[0082] In some embodiments, the unlocking component 600 is located outside the two lower side plates 2022 of the lower housing 202. The unlocking component 600 includes a locking component that matches the cage 106 of the host computer 100. When the optical module 200 is inserted into the cage 106, the locking component of the unlocking component 600 fixes the optical module 200 in the cage 106. When the unlocking component 600 is pulled, the locking component of the unlocking component 600 moves accordingly, thereby changing the connection relationship between the locking component and the host computer, so as to release the fixation between the optical module 200 and the host computer, thereby allowing the optical module 200 to be pulled out of the cage 106.

[0083] In some embodiments, the optical module may include a lens assembly 400. The lens assembly 400 is projected onto the surface of the circuit board 300.

[0084] In some embodiments, the optical module may include an optical fiber support 410. An optical fiber ribbon 420 is fixed inside the optical fiber support 410.

[0085] In some embodiments, the lens assembly 400 is assembled and connected to the fiber optic bracket 410. The lens assembly 400 is optically coupled to the fiber optic ribbon 420, thereby allowing optical signals to be input / output to the lens assembly 400 via the fiber optic ribbon 420.

[0086] Figure 5 is an internal structural diagram of an optical module according to some embodiments. Figure 6 is an exploded view of the internal structure of an optical module according to some embodiments. As shown in Figures 5 and 6, in some embodiments, the lens assembly 400 is located on the surface of the circuit board 300. The lens assembly 400 is located on one side of the DSP chip 302.

[0087] In some embodiments, a photodetector 320 is provided on the surface of the circuit board 300. A laser chip 500 is provided on the surface of the circuit board 300. A TIA 330 is provided on the surface of the circuit board 300. A laser driver chip 310 is provided on the surface of the circuit board 300.

[0088] In some embodiments, photodetector 320 and TIA 330 are arranged adjacent to each other. Photodetector 320 is used to convert the received optical signal into a photocurrent signal. TIA 330 is used to convert the photocurrent signal into a voltage signal. TIA 330 is used to amplify the voltage signal. The processed electrical signal is transmitted to DSP chip 302.

[0089] In some embodiments, the laser chip 500 and the laser driver chip 310 are arranged adjacent to each other. The laser driver chip 310 is used to generate a drive signal based on the digital signal output by the DSP chip 302. The drive signal is transmitted to the laser chip 500. Under the action of the drive signal, the laser chip 500 converts the received electrical signal into an optical signal.

[0090] In some embodiments, the lens assembly 400 is disposed on the surface of the photodetector 320. The lens assembly 400 is disposed on the surface of the TIA 330. The lens assembly 400 is disposed on the surface of the laser chip 500. The lens assembly 400 is disposed on the surface of the laser driver chip 310.

[0091] In some embodiments, the light receiving direction of the photodetector 320 is perpendicular to the surface of the circuit board 300. The transmission direction of the optical fiber ribbon in the fiber optic bracket 410 is parallel to the surface of the circuit board 300. The lens assembly 400 has an optical path reversing function to reverse the transmission direction of the optical signal transmitted within the optical fiber ribbon in the fiber optic bracket 410 from parallel to the surface of the circuit board 300 to perpendicular to the circuit board 300, so as to transmit it into the photodetector 320.

[0092] In some embodiments, the laser chip 500 emits light perpendicular to the surface of the circuit board 300. The laser chip 500 emits light upwards perpendicular to the circuit board 300. The fiber optic ribbon in the fiber optic bracket 410 transmits light parallel to the surface of the circuit board 300. The lens assembly 400 has an optical path reversing function to redirect the transmission direction of the optical signal emitted upwards from the laser chip 500 along the surface of the circuit board 300 to be parallel to the surface of the circuit board 300, thereby coupling the optical signal into the fiber optic ribbon in the fiber optic bracket 410 for transmission.

[0093] Figure 7 is a cross-sectional view of the internal structure of an optical module according to some embodiments. Figure 8 is a cross-sectional view of the internal structure of an optical module according to some embodiments. As shown in Figures 7 and 8, in some embodiments, a reflective surface 401 is formed on the surface of the lens assembly 400. The reflective surface 401 is set as an inclined surface. The reflective surface 401 can reflect the light signal incident on its surface.

[0094] In some embodiments, the laser chip 500 is located below the reflective surface 401. The fiber optic bracket 410 is located on the reflected light path of the reflective surface 401.

[0095] In some embodiments, the laser chip 500 emits light upwards perpendicular to the surface of the circuit board 300 and incident on the first reflective surface 401. The first reflective surface 401 reflects the light emitted by the laser chip 500 parallel to the surface of the circuit board 300, so as to couple it into the fiber optic bracket 410. This enables the transmission of optical signals.

[0096] In some embodiments, the laser chip 500 can be a vertical cavity surface emitting laser (VCSEL). The light emission direction of the VCSEL laser chip is perpendicular to the pn junction plane. The resonant cavity surface of the VCSEL laser chip is parallel to the pn junction plane.

[0097] In some embodiments, multiple independent laser chips 500 can be used to improve the transmission rate. These multiple independent laser chips 500 emit multiple beams of light signals, enabling multi-channel transmission. In some embodiments, the laser chip 500 is a 1×1 type chip.

[0098] Figure 9 is a cross-sectional view of the internal structure of an optical module according to some embodiments. As shown in Figure 9, in some embodiments, the laser chip 500 can be a 1×N array packaged chip to achieve multi-channel transmission and improve the transmission rate. In some embodiments, the laser chip 500 is a 1×4 array packaged chip, which emits 4 beams of light signals to achieve four-channel transmission.

[0099] Figure 10 is a cross-sectional structural diagram of a laser chip according to some embodiments. Figure 11 is a partial top view of a laser chip according to some embodiments. As shown in Figures 10 and 11, in some embodiments, the laser chip 500 can be a 1×1 type chip. Figure 10 is a structural diagram obtained by cross-sectioning along the dashed line shown in Figure 11.

[0100] In some embodiments, the laser chip 500 may include a substrate 510. The substrate 510 is located at the bottom. In some embodiments, the substrate 510 may be a highly doped GaAs layer. The light emission direction of the laser chip 500 is perpendicular to the surface of the substrate 510.

[0101] In some embodiments, the laser chip 500 may include a first reflective layer 520. The first reflective layer 520 may be an N-type distributed Bragg reflector (N-DBR) layer. The first reflective layer 520 is located above the substrate 510. The first reflective layer 520 is an N-type doped distributed Bragg reflector. The first reflective layer 520 is composed of stacked AlxGa1-xAs layers with different refractive indices. The refractive index of the material can be controlled by changing the aluminum composition. Two AlxGa1-xAs dielectric layers with different refractive indices—one with a high refractive index and the other with a low refractive index—form a pair of DBRs. A large refractive index difference in each pair of DBRs achieves higher reflectivity.

[0102] In some embodiments, the laser chip 500 may include an active region 530. The active region 530 is located above the first reflective layer 520. The active region 530 includes quantum wells to provide optical gain. A quantum well layer with a high crystal orientation index is selected to obtain a better band structure. A better band structure facilitates higher gain and differential gain of charge carriers at the target wavelength, resulting in higher optical power and modulation rate.

[0103] In some embodiments, the laser chip 500 may include an oxide layer 540. The oxide layer 540 is located above the active region 530. The oxide layer 540 may be AlGaAs with a high Al content. In some embodiments, Al0.98Ga0.02As is selected as the oxide layer 540. The Al and As elements in Al0.98Ga0.02As are easily oxidized. Optical and electric field confinement is achieved by oxidizing the oxide layer 540, and the oxidized region generates a low-refractive-index, insulating oxide. The oxide surrounds the unoxidized region. The low refractive index of the oxide provides optical field confinement. The high insulation of the oxide provides current confinement. The oxide includes insulating aluminum oxide (AlxOy) and a small amount of arsenic oxide. In some embodiments, the optical signal generated by the laser chip 500 is output from the oxide aperture 541 in a direction perpendicular to the surface of the substrate 510.

[0104] In some embodiments, the laser chip 500 may include a second reflective layer 550. The second reflective layer 550 may be a P-type Distributed Bragg Reflection (P-DBR) layer. The second reflective layer 550 is a P-type doped distributed Bragg mirror. The second reflective layer 550 is located above the oxide layer 540. The second reflective layer 550 is also composed of AlxGa1-xAs stacks with different refractive indices. The refractive index of the material can be controlled by changing the aluminum composition. A pair of DBRs consists of two dielectric layers with different refractive indices: one with a high refractive index and the other with a low refractive index. A larger refractive index difference in each pair of DBRs results in higher reflectivity.

[0105] In some embodiments, the laser chip 500 may include a P-type metal electrode layer 580. The P-type metal electrode layer 580 is electrically connected to the second reflective layer 550.

[0106] In some embodiments, the laser chip 500 may include an N-type metal electrode layer 590. The N-type metal electrode layer 590 is electrically connected to the first reflective layer 520.

[0107] In some embodiments, metal electrode layers are deposited using electron beam evaporation. The P-type metal electrode layer 580 is made of Ti / Pt / Au. The N-type metal electrode layer 590 is made of Au / Ge / Ni. Ti gold is used to increase the adhesion between the electrode and the semiconductor material. Through Ge atoms, the contact between the Au alloy and n-GaAs changes from a Schottky barrier contact to an ohmic contact.

[0108] In some embodiments, the second reflective layer 550, the active region 530, and the first reflective layer 520 are arranged in a vertical direction.

[0109] In some embodiments, the second reflective layer 550 provides P-type charge carriers downward to the active region 530. The first reflective layer 520 provides N-type charge carriers upward to the active region 530. P-type and N-type charge carriers are injected into the active region 530. The P-type and N-type charge carriers undergo radiative recombination in the active region 530 and release photons. In some embodiments, the P-type charge carriers are holes, and the N-type charge carriers are electrons.

[0110] In some embodiments, the second reflective layer 550, the active region 530, and the first reflective layer 520 constitute a photonic resonant cavity (FP cavity). The FP cavity has resonant cavity modes. The FP cavity only allows light near the cavity mode to pass through. The second reflective layer 550 and the first reflective layer 520 each have high reflectivity. Photons pass through the resonant cavity and are mirrored by a diffracted beam backlight (DBR). Photons select a specific oscillation mode and repeatedly feed back between the second reflective layer 550 and the first reflective layer 520 to form laser oscillations, thus generating laser light. Photons generate corresponding modulated optical signals by modulating electrical signals.

[0111] In some embodiments, the recombination rate of P-type and N-type carriers within the active region 530 can be controlled by varying the magnitude of the current injected into the active region 530. Increasing the current leads to more recombination of P-type and N-type carriers, thereby generating more photons. More photons increase the intensity of the laser beam. Conversely, decreasing the current leads to a decrease in the intensity of the laser beam. An optical signal is generated through intensity modulation. Ultimately, the optical signal is output along a direction perpendicular to the surface of the substrate 510, forming a vertical-cavity laser emission.

[0112] In some embodiments, to reduce optical losses, the reflectivity of the first reflective layer 520 is close to 100%. The first reflective layer 520 can serve as a total internal reflection mirror of the resonant cavity. The second reflective layer 550 has a relatively low reflectivity. The second reflective layer 550 can serve as an exit mirror of the resonant cavity.

[0113] In some embodiments, when the oxide layer 540 is oxidized, a low-refractive-index, insulating oxide is generated in the oxidized region. An oxide hole 541 with a specific morphology is formed in the unoxidized region. The oxide hole 541 is surrounded by oxide. Since the oxide hole 541 is not oxidized, its refractive index is relatively greater than that of the oxidized aluminum oxide (AlxOy) and arsenic oxide. The conductivity of the oxide hole 541 is also higher than that of the oxidized aluminum oxide (AlxOy) and arsenic oxide. It is understood that the oxide hole 541 is not a hollow hole. The oxide hole 541 is simply referred to as a "hole" because the light and electric fields are concentrated through it due to its unoxidized state.

[0114] In some embodiments, the light field and charge carriers flow concentratedly through the unoxidized oxide holes 541. This confines the light field and charge carriers in the vertical direction, mitigating the effects of lateral carrier and light field diffusion. Confining the light field and charge carriers in the vertical direction forms a photoelectric convergence structure in the active region 530, achieving a high-efficiency photoelectric confinement effect.

[0115] In some embodiments, to better confine the optical field and charge carriers, the oxide layer 540 cannot be located too far from the active region 530. Nor can the oxide layer 540 be located too close to the active region 530. When the oxide layer 540 is too close to the active region 530, oxidation shrinkage has a greater impact on the active region 530, and the absorption loss of photoelectric signals is also greater. In some embodiments, the oxide layer 540 can be placed on the first phase layer of the active region 530.

[0116] In some embodiments, the oxide aperture area of ​​the high-speed VCSEL laser chip is in the range of 5µm to 7µm in diameter, which makes lateral single-mode lasing impossible. For high-speed VCSELs, lateral multimode lasing can be effectively suppressed and mode degeneracy reduced by forming oxide apertures 541 with specific irregular morphologies. In some embodiments, the present disclosure provides oxide apertures 541 with a diameter of 4µm to 6µm.

[0117] In some embodiments, to oxidize and etch the oxide layer 540 to form oxide holes 541 with a specific morphology, the laser chip 500 may include a first trench portion 560 and a second trench portion 570. The first trench portion 560 extends downward along the second reflective layer 550 above the active region 530, exposing one sidewall of the interior of the oxide layer 540. The second trench portion 570 extends downward along the second reflective layer 550 above the active region 530, exposing the other sidewall of the interior of the oxide layer 540.

[0118] In some embodiments, the first trench portion 560 and the second trench portion 570 are disposed opposite to each other. The first trench portion 560 and the second trench portion 570 may each be an arc-shaped trench portion to form an oxide hole 541 morphology. The two arc-shaped trench portions face the same center.

[0119] In some embodiments, the oxide layer 540 is oxidized and etched in a high-temperature water vapor environment. The first trench portion 560 and the second trench portion 570 are in full contact with the high-temperature water vapor. The high-temperature water vapor in the first trench portion 560 and the second trench portion 570 diffuses inward, thereby oxidizing the oxide layer 540 inward. At high temperature, Al and As react with water, and the water is decomposed into oxygen by the high temperature, thereby Al and As are oxidized to form insulating oxides. These insulating oxides have a low refractive index.

[0120] In some embodiments, the crystal plane index of the substrate 510 forms a 15° angle with its {111} crystal plane. Similarly, the crystal plane index of each layer above the substrate 510, such as the oxide layer 540 and the second reflective layer 550, also forms a 15° angle with its {111} crystal plane. The oxide layer 540 and the second reflective layer 550 exhibit anisotropic crystal orientations. This anisotropy results in different atomic compositions, spatial structures, and interlayer distances in different crystal orientations. These differences in atomic composition, spatial structure, and interlayer distances lead to different degrees of bonding between the material inside the oxide layer 540 and oxygen. When oxidizing inwards from the first trench portion 560 and the second trench portion 570, the oxidation rate varies along different directions. The different oxidation rates of the material inside the oxide layer 540 result in different oxidized regions and extents.

[0121] In some embodiments, a crystal plane with a crystal orientation index or higher of the substrate 111 is used as the substrate. The substrate 111 is used to grow a first reflective layer 520, a quantum well, an oxide layer, etc.

[0122] In some embodiments, to facilitate the formation of oxide holes 541 with a specific morphology, a first connecting portion 561 is connected between one end of the first trench portion 560 and one end of the second trench portion 570. A second connecting portion 562 is connected between the other end of the first trench portion 560 and the other end of the second trench portion 570. That is, when etching is performed to form the first trench portion 560 and the second trench portion 570, the first connecting portion 561 and the second connecting portion 562 are not etched away, but are retained.

[0123] In some embodiments, the first trench portion 560, the first connecting portion 561, the second trench portion 570, and the second connecting portion 562 form a closed loop to form a closed-loop oxide hole 541. The surfaces of the first connecting portion 561 and the second connecting portion 562 are respectively higher than the groove surface of the first trench portion 560. In some embodiments, the first trench portion 560 is a C-shaped trench with a certain depth, facing the oxide hole 541 from one side. The second trench portion 570 is also a C-shaped trench with a certain depth, facing the oxide hole 541 from the opposite side. The ends of the two C-shaped trenches are respectively connected to the second connecting portion 562 via the first connecting portion 561.

[0124] In some embodiments, the oxide layer 540 exhibits anisotropy in its crystal orientation, resulting in variations in atomic composition, spatial structure, and interlayer spacing across different crystal orientations. These variations lead to different degrees of bonding between the material and oxygen within the oxide layer. Oxidation occurs inwards from the first trench 560 and the second trench 570, with varying oxidation rates along different directions. Different oxidation rates within the oxide layer result in different oxidized regions. Simultaneously, the positions of the first connector 561 and the second connector 562 make it difficult for oxygen to penetrate the oxide layer, thus affecting the oxidation rate of the corresponding oxide layer 540. The oxidation rate of the oxide layer 540 further affects the oxidized region of the oxide layer 540. By combining the effects of crystal anisotropy on the oxidation rate with the combined effects of the first connector 561 and the second connector 562, a specific morphology oxide hole 541 can be formed. This specific morphology oxide hole 541 effectively suppresses transverse multimode laser lasing and reduces mode degeneracy.

[0125] In some embodiments, the oxidation rate is controlled by the anisotropy of the crystal orientation and the cooperation between the first connection portion 561 and the second connection portion 562. By controlling the oxidation rate, the morphology of the oxide hole 541 is controlled. An irregular morphology is formed, effectively suppressing transverse multimode laser lasing and reducing mode degeneracy.

[0126] It is understandable that the morphology of the oxide hole 541 is due to the anisotropy of the crystal orientation. The morphology of the oxide hole 541 is due to the influence and balance between the first connection portion 561 and the second connection portion 562 on the oxidation rate of the crystal orientation.

[0127] Figure 12 is a schematic diagram of an oxide hole morphology structure according to some embodiments. As shown in Figure 12, in some embodiments, an oxide hole 541 with a specific irregular morphology is formed by the anisotropy of the crystal orientation of the oxide layer 540 and the cooperation of the first connecting portion 561 and the second connecting portion 562.

[0128] In some embodiments, the oxide aperture 541 includes a first oxide arc 5411 and a second oxide arc 5412. The oxide aperture 541 is asymmetrically arranged with respect to the line connecting the first oxide arc 5411 and the second oxide arc 5412, forming a specific irregular morphology. The oxide aperture based on the irregular morphology can effectively suppress transverse multimode laser lasing and reduce mode degeneracy.

[0129] In some embodiments, the first oxidation arc 5411 faces the first trench portion 560. The second oxidation arc 5412 faces the second trench portion 570. In some embodiments, the first oxidation arc 5411 may face the center of the first trench portion 560. The second oxidation arc 5412 may face the center of the second trench portion 570. The oxidation rate corresponding to the crystal direction where the center of the first trench portion 560 is located is small, thereby forming the first oxidation arc 5411. Similarly, on the opposite side, the oxidation rate corresponding to the crystal direction where the center of the second trench portion 570 is located is small, thereby forming the second oxidation arc 5412.

[0130] In some embodiments, the oxide hole 541 includes a third oxide arc 5413 and a fourth oxide arc 5414. The third oxide arc 5413 is disposed toward the first connecting portion 561. The fourth oxide arc 5414 is disposed toward the second connecting portion 562.

[0131] In some embodiments, the oxide hole 541 includes a major axis and a minor axis. Compared to a circular or elliptical shape, the ratio of the major axis to the minor axis length of the oxide hole 541 is increased. This increased ratio of the major axis to the minor axis length of the oxide hole 541 can compress the number of transverse modes and suppress transverse multimode laser lasing. In some embodiments, the oxide hole 541 has a shield-like morphology.

[0132] In some embodiments, the oxidation rate along the crystal direction from the first connecting portion 561 to the center of the oxide hole 541 is high. The oxidation rate along the crystal direction from the second connecting portion 562 to the hollow part of the oxide hole 541 is low. The arrangement of the first connecting portion 561 and the second connecting portion 562 can affect the crystal direction oxidation rate, thereby affecting the oxidation range.

[0133] In some embodiments, the first connecting portion 561 and the second connecting portion 562 make it difficult for oxygen to enter the oxide layer 540, thereby affecting the oxidation rate of the corresponding oxide layer 540. The oxidation rate of the oxide layer 540 further affects the range of the oxidized area of ​​the oxide layer 540. Until a third oxidation arc 5413 is formed downward from the first connecting portion 561 corresponding to the oxide layer position, and a fourth oxidation arc 5414 is formed downward from the second connecting portion 562 corresponding to the oxide layer position, a specific morphology oxide hole 541 is formed. That is, the first connecting portion 561 and the second connecting portion 562, in conjunction with the anisotropy of the oxidation rate, further influence and balance the oxidation rate, thereby controlling the oxidation rate. By controlling the oxidation rate, the formation of the third oxidation arc 5413 and the fourth oxidation arc 5414 is ensured, thereby ensuring the formation of the specific oxide hole 541.

[0134] In some embodiments, the third oxidation arc 5413 and the fourth oxidation arc 5414 have different radii of curvature, forming a specific irregular morphology. The oxide holes based on the irregular morphology can effectively suppress transverse multimode lasing of optical signals and reduce mode degeneracy.

[0135] In some embodiments, the oxidation rate varies in different directions, resulting in different oxidation regions at different locations. These different oxidation regions at different locations manifest as varying inclination angles on the edges of the oxide pores. The radius of curvature of the third oxidation arc 5413 is greater than that of the fourth oxidation arc 5414, forming oxide pores with a specific irregular morphology.

[0136] In some embodiments, during the formation of oxide holes with a specific morphology, the first connecting portion 561 and the second connecting portion 562 can serve as control variables for the formation of the specific morphology of the oxide holes. By combining the crystal orientation oxidation rate, the width and width dimensions of the first connecting portion 561 and the second connecting portion 562 are controlled until the size of the first connecting portion 561 is larger than the size of the second connecting portion 562, thereby adjusting the morphology of the oxide holes.

[0137] In some embodiments, when the width of the first connecting portion 561 is greater than the width of the second connecting portion 562, an oxide hole morphology as shown in FIG12 is formed. When the width of the first connecting portion 561 is less than the width of the second connecting portion 562, an opposite oxide hole morphology is formed.

[0138] As shown in Figures 11 and 12, the first trench portion 560 and the second trench portion 570 are in full contact with high-temperature water vapor, causing oxygen inside the first trench portion 560 and the second trench portion 570 to move towards the oxide layer 540, thereby oxidizing the oxide layer 540. A first oxide region 542 is formed by the oxidized area. Since both sides of the second reflective layer 550 are also exposed, the second reflective layer 550 is also oxidized, forming a second oxide region 551.

[0139] In some embodiments, the first oxide region 542 comprises aluminum oxide and arsenic oxide. The second oxide region 551 comprises aluminum oxide and arsenic oxide. The first oxide region 542 and the second oxide region 551 are both low-refractive-index insulating regions.

[0140] In some embodiments, the oxide aperture 541 is surrounded by a first oxide region 542. The oxide aperture 541 does not include aluminum oxide or arsenic oxide. The oxide aperture 541 is an unoxidized region with high refractive index and good conductivity. The light field is output along the oxide aperture, and charge carriers are transported along the oxide aperture to the active region, thereby producing a high-efficiency photoelectric confinement effect.

[0141] In some embodiments, the first oxide region 542 is located between the first trench portion 560 and the second trench portion 570. The second oxide region 551 is located between the first trench portion 560 and the second trench portion 570. The first trench portion 560 and the second trench portion 570 are disposed opposite to each other. The first trench portion 560 and the second trench portion 570 are connected in a closed loop by a first connecting portion 561 and a second connecting portion 562. The first oxide region 542 and the second oxide region 551 are annular regions composed of oxides.

[0142] In some embodiments, oxygen in the first trench portion 560 and the second trench portion 570 is oxidized inwards, forming a first oxidation region 542 in the oxide layer 540 and a second oxidation region 551 in the second reflective layer 550. Therefore, the outer contours of the first oxidation region 542 and the second oxidation region 551 are both formed along the first trench portion 560 and the second trench portion 570.

[0143] In some embodiments, both the oxide layer 540 and the second reflective layer 550 are AlGaAs. The molar content of Al components differs between the oxide layer 540 and the second reflective layer 550. In some embodiments, the molar content of Al in the oxide layer 540 is greater than that in the second reflective layer 550, resulting in a higher oxidation rate for the oxide layer 540. The oxide layer 540 is oxidized over a larger area, and the resulting first oxide region 542 extends inwards a greater distance. The oxide pores 541 have a smaller diameter, which helps reduce pattern degeneracy.

[0144] In some embodiments, the inner contour line of the second oxide region 551 is further away from the oxide hole 541 than the inner contour line of the first oxide region 542. The area occupied by the first oxide region 542 is larger than the area occupied by the second oxide region 551. The smaller aperture of the oxide hole 541 is beneficial for reducing pattern degeneracy.

[0145] In some embodiments, the oxygen filling the first trench portion 560 and the second trench portion 570 oxidizes inwards and outwards simultaneously. A third oxide region 543 is formed in the oxide layer 540. A fourth oxide region 552 is formed in the second reflective layer 550. The third oxide region 543 and the first oxide region 542 are formed simultaneously through oxidation. The third oxide region 543 and the first oxide region 542 are symmetrically arranged with respect to the region enclosed by the first trench portion 560 and the second trench portion 570. Similarly, the fourth oxide region 552 is symmetrically arranged with respect to the second oxide region 551.

[0146] In some embodiments, the second oxide region 551 and the fourth oxide region 552 are located on the sides, which can further reduce the lateral diffusion of the light field and charge carriers. Reducing the lateral diffusion of the light field and charge carriers causes the light field and charge carriers to converge and concentrate at the oxide hole 541.

[0147] Based on the laser chip provided in the above embodiments, this disclosure provides a method for fabricating a laser chip. Figure 13 is a flowchart of a method for fabricating a laser chip according to some embodiments. As shown in Figure 13, this disclosure provides a method for fabricating a laser chip, including:

[0148] S110: A first reflective layer, an active region, an oxide layer, and a second reflective layer are sequentially grown on the substrate surface. The crystal plane index of the substrate surface is at a preset angle to the crystal plane.

[0149] In some embodiments, the second reflective layer 550 and the first reflective layer 520 inject P-type carriers and N-type carriers, respectively, into the active region 530. The P-type and N-type carriers recombine radiatively in the active region 530, releasing photons. These photons, in a specific oscillation mode, repeatedly feed back between the second reflective layer 550 and the first reflective layer 520, forming laser oscillations and generating a laser beam. A corresponding modulated optical signal is then generated by modulating an electrical signal. This optical signal is output along a direction perpendicular to the surface of the substrate 510, achieving vertical-cavity surface laser emission.

[0150] In some embodiments, a substrate 510 is selected where the surface crystal plane index forms a predetermined angle with its {111} crystal plane. A first reflective layer 520, an active region 530, an oxide layer 540, and a second reflective layer 550 are sequentially grown on the surface of the substrate 510. The substrate 510, with its surface crystal plane index forming a predetermined angle with its {111} crystal plane, ensures that the layers above the substrate 510, such as the oxide layer 540 and the second reflective layer 550, also have surface crystal plane indices forming predetermined angles with their {111} crystal planes. The oxide layer 540 and the second reflective layer 550 exhibit anisotropic crystal orientations. This anisotropy results in different atomic compositions, spatial structures, and interlayer distances for different crystal orientations. These differences in atomic composition, spatial structure, and interlayer distances lead to varying degrees of bonding between the material and oxygen within the oxide layer 540.

[0151] S120: Etch downwards along the surface of the second reflective layer to above the active region to form a first trench and a second trench, exposing the inner sidewalls of the oxide layer for oxidation etching. A first connecting portion connects one end of the second trench to one end of the first trench. A second connecting portion connects the other end of the second trench to the other end of the first trench.

[0152] In some embodiments, to oxidize and etch the oxide layer 540 to form oxide holes 541 with a specific morphology, the laser chip 500 may include a first trench portion 560 and a second trench portion 570. The first trench portion 560 extends downward along the second reflective layer 550 above the active region 530, exposing one sidewall of the interior of the oxide layer 540. The second trench portion 570 extends downward along the second reflective layer 550 above the active region 530, exposing the other sidewall of the interior of the oxide layer 540.

[0153] In some embodiments, the first trench portion 560 and the second trench portion 570 are disposed opposite to each other. The first trench portion 560 and the second trench portion 570 may each be an arc-shaped trench portion to form an oxide hole 541 morphology. The two arc-shaped trench portions face the same center.

[0154] In some embodiments, the oxide layer 540 is oxidized and etched in a high-temperature water vapor environment. The first trench portion 560 and the second trench portion 570 are in full contact with the high-temperature water vapor. The high-temperature water vapor in the first trench portion 560 and the second trench portion 570 diffuses inward, thereby oxidizing the oxide layer 540 inward. At high temperature, the Al and As in the oxide layer 540 react with water, and the water is decomposed into oxygen by the high temperature. As a result, Al and As are oxidized to form insulating oxides. These insulating oxides have a low refractive index.

[0155] In some embodiments, to facilitate the formation of oxide holes 541 with a specific morphology, a first connecting portion 561 is connected between one end of the first trench portion 560 and one end of the second trench portion 570. A second connecting portion 562 is connected between the other end of the first trench portion 560 and the other end of the second trench portion 570. That is, when etching is performed to form the first trench portion 560 and the second trench portion 570, the first connecting portion 561 and the second connecting portion 562 are not etched away, but are retained.

[0156] In some embodiments, photolithography is used to form the first trench portion 560 and the second trench portion 570. Photolithography is a process that uses the principle of photochemical reaction to transfer a pattern on a photomask onto a substrate. The pattern on the photomask includes the pattern associated with the first trench portion 560. The pattern on the photomask includes the pattern associated with the second trench portion 570.

[0157] In some embodiments, the photolithography process includes uniformly coating photoresist. The photolithography process includes exposure. The photolithography process includes development. The photolithography process includes etching. Photoresist refers to a thin film material. After being irradiated with light of a certain wavelength, the exposed area of ​​the thin film material undergoes a photochemical reaction. This photochemical reaction causes a change in the solubility of the photoresist in the developer. The photoresist is photochemically sensitive. After spin coating, pre-baking, exposure, and development, the pattern on the photomask is transferred to the substrate to obtain the desired circuit pattern. Based on the change in solubility before and after exposure, photoresist is classified into positive photoresist and negative photoresist. Positive photoresist, after exposure, has increased solubility in the developer and is dissolved. The unexposed area left after development is the desired pattern. Negative photoresist, after exposure, has decreased solubility in the developer and remains on the substrate. The unexposed area can dissolve in the developer, and the obtained pattern is complementary to the pattern on the photomask.

[0158] S130: Placed in a high-temperature water vapor oxidation environment. Oxygen in the first trench contacts the oxide layer and oxidizes it inward. Oxygen in the second trench contacts the oxide layer and oxidizes it inward. The oxidized area forms a first oxidation zone. The unoxidized area forms an oxidation pore. The oxidation pore is surrounded by the first oxidation zone. The oxidation pore includes a first oxidation arc. The oxidation pore includes a second oxidation arc. The oxidation pore includes a third oxidation arc. The oxidation pore includes a fourth oxidation arc. The first oxidation arc and the second oxidation arc are positioned opposite each other. The third oxidation arc and the fourth oxidation arc are positioned opposite each other. The radii of curvature of the third oxidation arc and the fourth oxidation arc are different.

[0159] In some embodiments, the first trench portion 560 is in full contact with high-temperature water vapor. The second trench portion 570 is in full contact with high-temperature water vapor. Oxygen inside the first trench portion 560 moves toward the oxide layer 540. Oxygen inside the second trench portion 570 moves toward the oxide layer 540. The oxygen oxidizes the oxide layer 540. The oxidized area forms a first oxide region 542. The unoxidized area forms oxide pores 541.

[0160] In some embodiments, the oxide layer 540 exhibits anisotropic crystal orientation. This anisotropy results in differences in atomic composition, spatial structure, and interlayer distances across different crystal orientations. These differences lead to varying degrees of bonding between the material within the oxide layer and oxygen. Oxidation occurs inward from the first trench portion 560, with different oxidation rates along different directions. Oxidation also occurs inward from the second trench portion 570, with different oxidation rates along different directions. The oxidation rates of the material within the oxide layer differ, resulting in different oxidized regions. The position of the first connection portion 561 makes it difficult for oxygen to enter the oxide layer. The position of the second connection portion 562 also makes it difficult for oxygen to enter the oxide layer. The difficulty in oxygen entering the oxide layer affects the oxidation rate of the corresponding oxide layer 540, thereby affecting the oxidized region of the oxide layer 540. Under the influence of crystal orientation anisotropy on the oxidation rate, and the mutual coordination of the first connection portion 561 and the second connection portion 562 on the oxidation rate, oxide holes with specific morphologies can be formed. The specific morphology of the oxide holes 541 effectively suppresses transverse multimode laser lasing and reduces mode degeneracy.

[0161] In some embodiments, the oxidation rate is controlled by the anisotropy of the crystal orientation and the cooperation between the first connection portion 561 and the second connection portion 562. The morphology of the oxide hole 541 is controlled by controlling the oxidation rate. The oxide hole 541 forms an irregular morphology. The irregular morphology of the oxide hole 541 effectively suppresses transverse multimode laser lasing and reduces mode degeneracy.

[0162] In some embodiments, the formed oxide hole 541 includes a first oxide arc 5411. The oxide hole 541 includes a second oxide arc 5412. The oxide hole 541 includes a third oxide arc 5413. The oxide hole 541 includes a fourth oxide arc 5414. The first oxide arc 5411 and the second oxide arc 5412 are disposed opposite to each other. The third oxide arc 5413 and the fourth oxide arc 5414 are disposed opposite to each other. The first oxide arc 5411 faces the first trench portion 560. The second oxide arc 5412 faces the second trench portion 570. The third oxide arc 5413 is disposed facing the first connecting portion 561. The fourth oxide arc 5414 is disposed facing the second connecting portion 562.

[0163] In some embodiments, the third oxidation arc 5413 and the fourth oxidation arc 5414 have different radii of curvature, forming a specific irregular morphology. The oxide holes based on the irregular morphology can effectively suppress transverse multimode lasing of optical signals and reduce mode degeneracy.

[0164] As mentioned earlier, the laser chip 500 can be packaged as a 1×N array chip to achieve multi-channel transmission.

[0165] Figure 14 is a schematic diagram of a laser chip array emitting light according to some embodiments of the present disclosure. As shown in Figure 14, in some embodiments, the laser chip 500 is a 1×4 array packaged chip. The laser chip 500 emits four light signals to achieve four-channel transmission. In some embodiments, the four light signals emitted by the laser chip 500 have the same wavelength.

[0166] The following example uses the laser chip 500 as a 1×2 array packaged chip for illustrative purposes.

[0167] Figure 15 is a cross-sectional structural diagram of another laser chip according to some embodiments of the present disclosure, and Figure 16 is a partial top view of another laser chip according to some embodiments of the present disclosure. As shown in Figures 15 and 16, in some embodiments, the laser chip 500 emits a first optical signal and a second optical signal to achieve array light emission.

[0168] In some embodiments, the laser chip 500 may include a substrate 510a. Features of the substrate 510a may be referenced to the substrate 510.

[0169] In some embodiments, the laser chip 500 may include a first reflective layer 520a. The first reflective layer 520a is located above the substrate 510a. The first reflective layer 520a may be an N-type distributed Bragg reflector (N-DBR) layer.

[0170] In some embodiments, the laser chip 500 may include an active region 530a. The active region 530a is located above the first reflective layer 520a.

[0171] In some embodiments, the laser chip 500 may include an oxide layer 540a. The oxide layer 540a is located above the active region 530a. The oxide layer 540a includes a first oxide aperture 541a. The oxide layer 540a includes a second oxide aperture 541b.

[0172] In some embodiments, the laser chip 500 may include a second reflective layer 550a. The second reflective layer 550a is located above the oxide layer 540a. The second reflective layer 550a may be a P-type Distributed Bragg Reflection (P-DBR) layer.

[0173] In some embodiments, the first reflective layer 520a provides N-type charge carriers to the active region 530a. The second reflective layer 550a provides P-type charge carriers to the active region 530a. N-type and P-type charge carriers recombine in the active region 530a to generate photons. The second reflective layer 550a and the first reflective layer 520a form a resonant cavity. Photons oscillate within the resonant cavity to generate laser light, and a corresponding modulated optical signal is generated by modulating an electrical signal.

[0174] In some embodiments, based on the high refractive index and conductivity of the oxide aperture, a portion of the P-type charge carriers flow through the first oxide aperture 541a. The charge carriers flowing through the first oxide aperture 541a are injected into the active region 530a, correspondingly generating a first optical signal. A portion of the P-type charge carriers also flow through the second oxide aperture 541b, and the charge carriers flowing through the second oxide aperture 541b are injected into the active region 530a, correspondingly generating a second optical signal. The first and second optical signals have the same wavelength.

[0175] In some embodiments, a first optical signal is output from a first oxide hole 541a perpendicular to the surface of the substrate 510a. A second optical signal is output from a second oxide hole 541b perpendicular to the surface of the substrate 510a, thereby achieving array light emission.

[0176] In some embodiments, the first oxide aperture 541a has the same morphological characteristics as oxide aperture 541. Furthermore, the first oxide aperture 541a includes a first oxide arc 5411a. The first oxide aperture 541a includes a second oxide arc 5412a. The first oxide aperture 541a includes a third oxide arc 5413a. The first oxide aperture 541a includes a fourth oxide arc 5414a. The third oxide arc 5413a and the fourth oxide arc 5414a have different radii of curvature, forming an irregular morphology, effectively suppressing transverse multimode lasing of the first optical signal and reducing mode degeneracy.

[0177] In some embodiments, the second oxide aperture 541b has the same morphological characteristics as oxide aperture 541. Furthermore, the second oxide aperture 541b includes a fifth oxide arc 5411b, a sixth oxide arc 5412b, a seventh oxide arc 5413b, and an eighth oxide arc 5414b. The seventh oxide arc 5413b and the eighth oxide arc 5414b have different radii of curvature, forming an irregular morphology, effectively suppressing transverse multimode lasing of the second optical signal and reducing mode degeneracy.

[0178] In some embodiments, during the array chip packaging process, the long side of the chip is susceptible to stress due to the expansion / contraction deformation of the circuit board at different temperatures. Under different temperature conditions, the quantum well gain of the active region 530a changes under external stress, leading to an increase in laser lasing modes. This increase in laser lasing modes affects factors such as extinction ratio and output power. To reduce the impact of stress on the transverse multimode of the device, the long axis of the first oxide hole 541a is aligned parallel to the extension direction of the long side of the substrate 510a, and the long axis of the second oxide hole 541b is also aligned parallel to the extension direction of the long side of the substrate 510a, thereby improving the stress application direction. When the device cools down, the compressive strain from the long side has a gain-enhancing effect on the quantum well material in the active region, reducing the impact of stress on the transverse multimode of the device, thus helping to balance the optical power and the number of modes at low temperatures.

[0179] In some embodiments, since the first oxide pore 541a has the same morphological characteristics as the oxide pore 541, and similarly, the second oxide pore 541b has the same morphological characteristics as the oxide pore 541, the first oxide pore 541a and the second oxide pore 541b have the same formation conditions as the oxide pore 541.

[0180] In some embodiments, the crystal plane index of the substrate 510a forms a predetermined angle with its {111} crystal plane. The crystal plane index of the oxide layer 540a forms a predetermined angle with its {111} crystal plane. The crystal plane index of the second reflective layer 550a forms a predetermined angle with its {111} crystal plane. This allows the influence of crystal anisotropy on the oxidation rate to be utilized.

[0181] In some embodiments, etching is performed downwards along the surface of the second reflective layer 550a. Etching extends above the active region 530a. A first trench portion 571 and a second trench portion 572 are formed to expose the internal sidewalls of the oxide layer 540a, thereby performing oxidation etching on the oxide layer 540a. A first connecting portion 561a connects one end of the first trench portion 571 to one end of the second trench portion 572, and a second connecting portion 562a connects the other end of the first trench portion 571 to the other end of the second trench portion 572.

[0182] In some embodiments, etching is performed downwards along the surface of the second reflective layer 550a. Etching extends above the active region 530a. A third trench portion 573 and a fourth trench portion 574 are formed to expose the internal sidewalls of the oxide layer 540a, thereby performing oxidation etching on the oxide layer 540a. To form a second oxide hole 541b with a specific morphology, a third connecting portion 561b is connected between one end of the third trench portion 573 and one end of the fourth trench portion 574. To form a second oxide hole 541b with a specific morphology, a fourth connecting portion 562b is connected between the other end of the third trench portion 573 and the other end of the fourth trench portion 574.

[0183] In some embodiments, anisotropy results in different atomic compositions in different crystal orientations. Anisotropy also results in different spatial structures in different crystal orientations. Anisotropy further results in different distances between atomic layers. The degree of bonding between the material inside oxide layer 540a and oxygen varies. When oxidizing inward from the first trench portion 571, the oxidation rate varies along different directions. When oxidizing inward from the second trench portion 572, the oxidation rate varies along different directions. The different oxidation rates of the material inside oxide layer 540a result in different oxidized areas. The position of the first connecting portion 561a makes it difficult for oxygen to enter oxide layer 540a. The position of the second connecting portion 562a makes it difficult for oxygen to enter oxide layer 540a. The difficulty for oxygen to enter oxide layer 540a affects the oxidation rate of the corresponding oxide layer, thereby affecting the oxidized area of ​​oxide layer 540a. The oxidation rate is controlled by the influence of crystal anisotropy on the oxidation rate and the mutual cooperation between the first connecting portion 561a and the second connecting portion 562a on the oxidation rate, thereby controlling the formation of the first oxide hole 541a with a specific morphology. The formation process of the second oxide hole 541b is similar and will not be described in detail.

[0184] In some embodiments, the oxide layer 540a is oxidized by oxygen in the first trench portion 571. The oxide layer 540a is oxidized by oxygen in the second trench portion 572. The oxidized area forms a first oxide region 542a. The unoxidized area forms a first oxide hole 541a. The first oxide hole 541a is surrounded by the first oxide region 542a. The first oxide region 542a is oxidized to generate a low refractive index, insulating oxide. The first oxide hole 541a is not oxidized. The refractive index of the first oxide hole 541a is greater than that of the first oxide region 542a. The conductivity of the first oxide hole 541a is greater than that of the first oxide region 542a, thereby producing a high-efficiency photoelectric confinement effect. The same applies to the second oxide hole 541b. The oxide layer 540a is oxidized by oxygen in the third trench portion 573. The oxide layer 540a is oxidized by oxygen in the fourth trench portion 574. The oxidized area forms a fifth oxide region 542b. The unoxidized area forms a second oxide hole 541b. The second oxide pore 541b is surrounded by the fifth oxide region 542b.

[0185] In some embodiments, the first oxide hole 541a includes a third oxide arc 5413a. The first oxide hole 541a includes a fourth oxide arc 5414a. The third oxide arc 5413a is disposed toward the first connecting portion 561a. The fourth oxide arc 5414a is disposed toward the second connecting portion 562a. The first oxide hole 541a includes a first oxide arc 5411a. The first oxide arc 5411a is disposed toward the first trench portion 571. The first oxide hole 541a includes a second oxide arc 5412a. The second oxide arc 5412a is disposed toward the second trench portion 572.

[0186] In some embodiments, the first connecting portion 561a is larger than the second connecting portion 562a. The radius of curvature of the third oxidation arc 5413a is larger than the radius of curvature of the fourth oxidation arc 5414a.

[0187] In some embodiments, the second oxide hole 541b includes a seventh oxide arc 5413b. The second oxide hole 541b includes an eighth oxide arc 5414b. The seventh oxide arc 5413b is disposed toward the third connecting portion 561b. The eighth oxide arc 5414b is disposed toward the fourth connecting portion 562b. The second oxide hole 541b includes a fifth oxide arc 5411b. The fifth oxide arc 5411b is disposed toward the third trench portion 573. The second oxide hole 541b includes a sixth oxide arc 5412b. The sixth oxide arc 5412b is disposed toward the fourth trench portion 574.

[0188] In some embodiments, the size of the third connecting portion 561b is larger than the size of the fourth connecting portion 562b. The radius of curvature of the seventh oxidation arc 5413b is larger than the radius of curvature of the eighth oxidation arc 5414b.

[0189] In some embodiments, other technical features of the laser chip 500 when it is a 1×N array package can be referred to when the laser chip is a 1×1 type, and will not be elaborated further.

[0190] Figure 17 is a schematic diagram of the internal structure of another laser chip according to some embodiments of the present disclosure. As shown in Figure 17, in some embodiments, the long axis of the first oxide hole 541a is parallel to the long side extension direction of the substrate 510a, and the long axis of the second oxide hole 541b is parallel to the long side extension direction of the substrate 510a, thereby improving the stress application direction. When the device is cooled, the compressive strain from the long side will have the effect of improving the gain of the quantum well material in the active region, reducing the influence of stress on the transverse multimode of the device, thereby helping to balance the optical power and the number of modes at low temperatures.

[0191] Based on the laser chip provided in the above embodiments, this disclosure provides a method for fabricating a laser chip. Figure 18 is a flowchart of another method for fabricating a laser chip according to some embodiments of this disclosure. As shown in Figure 18, this disclosure provides a method for fabricating a laser chip, including:

[0192] S210: A first reflective layer, an active region, an oxide layer, and a second reflective layer are sequentially grown on the substrate surface. The crystal plane index of the substrate surface is at a preset angle to the crystal plane.

[0193] In some embodiments, the steps are the same as S110, so they will not be described in detail here.

[0194] S220: Etch downwards along the surface of the second reflective layer. Etch to above the active region. Form the first trench and the second trench. Form the third trench and the fourth trench. The inner sidewalls of the oxide layer are exposed, thereby oxidizing and etching the oxide layer.

[0195] In some embodiments, a first trench portion 571 and a second trench portion 572 are simultaneously etched using a photomask. A third trench portion 573 and a fourth trench portion 574 are simultaneously etched using a photomask.

[0196] In some embodiments, a first connecting portion 561a is connected between one end of the second groove portion 572 and one end of the first groove portion 571. A second connecting portion 562a is connected between the other end of the second groove portion 572 and the other end of the first groove portion 571.

[0197] A third connecting portion 561b is connected between one end of the fourth groove portion 574 and one end of the third groove portion 573. A fourth connecting portion 562b is connected between the other end of the fourth groove portion 574 and the other end of the third groove portion 573.

[0198] In some embodiments, the first connecting portion 561a can be adapted to the anisotropy of the crystal orientation, affecting the oxidation rate. The second connecting portion 562a can be adapted to the anisotropy of the crystal orientation, affecting the oxidation rate, thereby controlling the oxidation rate and thus controlling the morphology of the first oxide hole 541a. Similarly, the third connecting portion 561b can be adapted to form the morphology of the second oxide hole 541b. The fourth connecting portion 562b can be adapted to form the morphology of the second oxide hole 541b.

[0199] S230: Placed in a high-temperature steam oxidation system. Oxygen in the first trench contacts the oxide layer and oxidizes it inwards. Oxygen in the second trench contacts the oxide layer and oxidizes it inwards. The oxidized area forms a first oxidation zone. The unoxidized area forms a first oxidation pore. The first oxidation pore is surrounded by the first oxidation zone. Oxygen in the third trench contacts the oxide layer and oxidizes it inwards. Oxygen in the fourth trench contacts the oxide layer and oxidizes it inwards. The oxidized area forms a fifth oxidation zone. The unoxidized area forms a second oxidation pore. The second oxidation pore is surrounded by the fifth oxidation zone.

[0200] In some embodiments, the first oxide aperture 541a exhibits an irregular morphology. The second oxide aperture 541b also exhibits an irregular morphology. The first oxide aperture 541a effectively suppresses transverse multimode lasing of the first optical signal. The second oxide aperture 541b effectively suppresses transverse multimode lasing of the second optical signal, reducing mode degeneracy.

[0201] In some embodiments, the long axis of the first oxide hole 541a is parallel to the long side extension direction of the substrate 510a, and the long axis of the second oxide hole 541b is parallel to the long side extension direction of the substrate 510a, thereby improving the stress application direction. During device cooling, the compressive strain from the long side has a gain-enhancing effect on the quantum well material in the active region, reducing the impact of stress on the device's lateral multimode. Reducing the impact of stress on the device's lateral multimode helps balance the optical power and mode number at low temperatures.

[0202] The above description is merely a specific embodiment of this disclosure, but the scope of protection of this disclosure is not limited thereto. Any variations or substitutions conceived by those skilled in the art within the scope of the technology disclosed in this disclosure should be included within the scope of protection of this disclosure. Therefore, the scope of protection of this disclosure should be determined by the scope of the claims.

Claims

1. A laser chip, comprising: Substrate; A first reflective layer is located above the substrate; An active region, located above the first reflective layer, is configured such that N-type carriers and P-type carriers recombine in the active region to generate photons; the first reflective layer provides the N-type carriers to the active region; An oxide layer is located above the active region; The second reflective layer, located above the oxide layer, is configured to provide P-type carriers to the active region; The structure of the oxide layer satisfies any one of the following: The oxide layer includes oxide holes surrounded by a first oxide region. Each oxide hole includes a first oxide arc, a second oxide arc, a third oxide arc, and a fourth oxide arc. The first oxide arc and the second oxide arc are positioned opposite each other, as are the third and fourth oxide arcs. The third and fourth oxide arcs have different radii of curvature. P-type charge carriers flow into the active region along the oxide holes. The second reflective layer and the first reflective layer form a resonant cavity. Photons oscillate within the resonant cavity to generate laser light, and a corresponding modulated optical signal is generated by modulating an electrical signal. The optical signal is output from the oxide holes in a direction perpendicular to the substrate surface. The laser chip also includes: The first trench extends downward along the surface of the second reflective layer to above the active region, and the first trench is located on one side of the first oxide region; The second trench extends downward along the surface of the second reflective layer to above the active region, and the second trench is located on the other side of the first oxide region; a first connecting portion is connected between one end of the second trench and one end of the first trench, and a second connecting portion is connected between the other end of the second trench and the other end of the first trench. Alternatively, the oxide layer may include: The first oxide hole includes a third oxide arc and a fourth oxide arc arranged opposite to each other, wherein the third oxide arc and the fourth oxide arc have different radii of curvature; the long axis of the first oxide hole is arranged parallel to the long side extension direction of the substrate. The second oxide hole includes a seventh oxide arc and an eighth oxide arc arranged opposite each other, the seventh oxide arc and the eighth oxide arc having different radii of curvature; the long axis of the second oxide hole is arranged parallel to the long side extension direction of the substrate; the P-type charge carriers flow into the active region along the first oxide hole and the second oxide hole respectively; the photons oscillate between the first reflective layer and the second reflective layer, thereby generating a first optical signal and a second optical signal, the first optical signal being output from the first oxide hole perpendicular to the substrate surface, and the second optical signal being output from the second oxide hole perpendicular to the substrate surface.

2. The laser chip according to claim 1, wherein, When the oxide layer includes oxide pores, the refractive index of the oxide pores is greater than the refractive index of the first oxide region, and the conductivity of the oxide pores is greater than the conductivity of the first oxide region. The first oxidation arc faces the first trench portion, and the second oxidation arc faces the second trench portion; The third oxidation arc is disposed toward the first connecting portion, and the fourth oxidation arc is disposed toward the second connecting portion; the size of the first connecting portion is larger than the size of the second connecting portion. The radius of curvature of the third oxidation arc is greater than that of the fourth oxidation arc.

3. The laser chip according to claim 1, wherein, When the oxide layer includes oxide holes, the first trench portion and the second trench portion are configured to expose the internal sidewalls of the oxide layer to perform oxidation etching on the oxide layer to form the first oxide region; at the same time, the second reflective layer is oxidized to generate the second oxide region; The first oxide region includes aluminum oxide and arsenic oxide, the second oxide region includes aluminum oxide and arsenic oxide, and the oxide pores do not include aluminum oxide or arsenic oxide.

4. The laser chip according to claim 3, wherein, The first oxidation zone is located between the first trench portion and the second trench portion, and the second oxidation zone is located between the first trench portion and the second trench portion; The inner contour line of the second oxide region is further away from the oxide hole than the inner contour line of the first oxide region; The outer contours of the first oxidation zone and the second oxidation zone are both formed by the first groove portion and the second groove portion.

5. The laser chip according to claim 3, wherein, The oxide layer includes a third oxide region, and the second reflective layer includes a fourth oxide region; The third oxidation zone is symmetrically arranged relative to the first oxidation zone, and the area enclosed by the first trench portion and the second trench portion is symmetrically arranged. The fourth oxidation zone is symmetrically arranged relative to the second oxidation zone, and the area enclosed by the first groove portion and the second groove portion is symmetrically arranged.

6. The laser chip according to claim 1, wherein, When the oxide layer includes oxide holes, and the crystal plane index of the substrate surface forms a 15° angle with its {111} crystal plane, then the crystal plane index of the oxide layer and the second reflective layer form a 15° angle with their {111} crystal planes.

7. The laser chip according to claim 1, wherein, When the oxide layer includes oxide pores, the oxide layer and the second reflective layer each comprise AlGaAs, and the molar content of Al in the oxide layer is greater than the molar content of Al in the second reflective layer.

8. The laser chip according to claim 1, wherein, When the oxide layer includes a first oxide hole and a second oxide hole, and the crystal plane index of the substrate surface is at a preset angle to the crystal plane, then the crystal plane index of the oxide layer and the second reflective layer surface are at a preset angle to the crystal plane. The first oxide hole is surrounded by a first oxide region, the refractive index of the first oxide hole is greater than the refractive index of the first oxide region, and the conductivity of the first oxide hole is greater than the conductivity of the first oxide region. The laser chip includes: The first trench extends downward along the surface of the second reflective layer to above the active region, and the first trench is located on one side of the first oxide region; The second trench extends downward along the surface of the second reflective layer to above the active region, and the second trench is located on the other side of the first oxide region; a first connecting portion is connected between one end of the second trench and one end of the first trench, and a second connecting portion is connected between the other end of the second trench and the other end of the first trench.

9. The laser chip according to claim 1, wherein, When the oxide layer includes a first oxide hole and a second oxide hole, and the crystal plane index of the substrate surface is at a preset angle to the crystal plane, then the crystal plane index of the oxide layer and the second reflective layer surface are at a preset angle to the crystal plane. The second oxide hole is surrounded by the fifth oxide region, the refractive index of the second oxide hole is greater than the refractive index of the fifth oxide region, and the conductivity of the second oxide hole is greater than the conductivity of the fifth oxide region. The laser chip includes: The third trench extends downward along the surface of the second reflective layer to above the active region, and the third trench is located on one side of the fifth oxide region; The fourth trench extends downward along the surface of the second reflective layer to above the active region, and the fourth trench is located on the other side of the fifth oxide region; a third connecting portion is connected between one end of the fourth trench and one end of the third trench, and a fourth connecting portion is connected between the other end of the fourth trench and the other end of the third trench.

10. The laser chip according to claim 8, wherein, The first oxidation pore includes a first oxidation arc and a second oxidation arc; The first oxidation arc faces the first trench portion, and the second oxidation arc faces the second trench portion; The third oxidation arc is disposed toward the first connecting portion, and the fourth oxidation arc is disposed toward the second connecting portion; the size of the first connecting portion is larger than the size of the second connecting portion. The radius of curvature of the third oxidation arc is greater than that of the fourth oxidation arc.

11. The laser chip according to claim 9, wherein, The second oxidation pore includes a fifth oxidation arc and a sixth oxidation arc; The fifth oxidation arc faces the third trench portion, and the sixth oxidation arc faces the fourth trench portion; The seventh oxidation arc is disposed toward the third connecting portion, and the eighth oxidation arc is disposed toward the fourth connecting portion; the size of the third connecting portion is larger than the size of the fourth connecting portion; The radius of curvature of the seventh oxidation arc is greater than that of the eighth oxidation arc.

12. The laser chip according to claim 8, wherein, The first trench portion and the second trench portion are configured to expose both sides of the oxide layer to oxidize the oxide layer and generate the first oxide region; at the same time, the second reflective layer is oxidized to generate the second oxide region; The first oxide region includes aluminum oxide and arsenic oxide, the second oxide region includes aluminum oxide and arsenic oxide, and the first oxide pore does not include aluminum oxide or arsenic oxide.

13. The laser chip according to claim 12, wherein, The first oxidation zone is located between the first trench portion and the second trench portion, and the second oxidation zone is located between the first trench portion and the second trench portion; The inner contour line of the second oxide region is further away from the first oxide hole than the inner contour line of the first oxide region; The outer contours of the first oxidation zone and the second oxidation zone are both formed by the first groove portion and the second groove portion.

14. A method for fabricating a laser chip, the method comprising: A first reflective layer, an active region, an oxide layer, and a second reflective layer are sequentially grown on the substrate surface, and the crystal plane index of the substrate surface is at a preset angle to the crystal plane. The second reflective layer is etched downwards along its surface to above the active region to form a first trench and a second trench, thereby exposing the inner sidewalls of the oxide layer for oxidation etching. A first connection is provided between one end of the second trench and one end of the first trench, and a second connection is provided between the other end of the second trench and the other end of the first trench. When placed in a high-temperature water vapor oxidation environment, the oxygen in the first groove and the second groove comes into contact with the oxide layer and oxidizes the oxide layer inward, forming a first oxidation zone in the oxidized area; When the oxide layer includes oxide pores, the unoxidized area forms oxide pores, and the oxide pores are surrounded by the first oxide area; wherein the oxide pores include a first oxide arc, a second oxide arc, a third oxide arc and a fourth oxide arc, the first oxide arc and the second oxide arc are arranged opposite to each other, the third oxide arc and the fourth oxide arc are arranged opposite to each other, and the third oxide arc and the fourth oxide arc have different radii of curvature. When the oxide layer includes a first oxide pore and a second oxide pore, the unoxidized area forms the first oxide pore, and the first oxide pore is surrounded by the first oxide region; the oxygen in the third trench and the fourth trench comes into contact with the oxide layer and oxidizes the oxide layer inward, the oxidized area forms the fifth oxide region, the unoxidized area forms the second oxide pore, and the second oxide pore is surrounded by the fifth oxide region; The first oxide hole includes a third oxide arc and a fourth oxide arc arranged opposite to each other, the third oxide arc and the fourth oxide arc having different radii of curvature; the long axis of the first oxide hole is arranged parallel to the long side extension direction of the substrate; The second oxide hole includes a seventh oxide arc and an eighth oxide arc arranged opposite each other, the seventh oxide arc and the eighth oxide arc having different radii of curvature; the long axis of the second oxide hole is arranged parallel to the long side extension direction of the substrate.

15. The method for fabricating a laser chip according to claim 14, wherein, When the oxide layer includes oxide pores, the refractive index of the oxide pores is greater than the refractive index of the first oxide region, and the conductivity of the oxide pores is greater than the conductivity of the first oxide region. The first oxidation arc faces the first trench portion, and the second oxidation arc faces the second trench portion; The third oxidation arc is disposed toward the first connecting portion, and the fourth oxidation arc is disposed toward the second connecting portion; the size of the first connecting portion is larger than the size of the second connecting portion. The radius of curvature of the third oxidation arc is greater than that of the fourth oxidation arc.

16. The method for fabricating a laser chip according to claim 14, wherein, The oxygen in the first and second trenches comes into contact with the second reflective layer and oxidizes the second reflective layer to form a second oxidation zone.

17. The method for fabricating a laser chip according to claim 16, wherein, The first oxidation zone is located on the inner side between the first trench portion and the second trench portion; The second oxidation zone is located on the inner side between the first trench portion and the second trench portion; The inner contour line of the second oxide region is further away from the oxide hole than the inner contour line of the first oxide region; The outer contours of the first oxidation zone and the second oxidation zone are both formed by the first groove portion and the second groove portion.

18. The method for fabricating a laser chip according to claim 16, wherein, The oxide layer includes a third oxide region, and the second reflective layer includes a fourth oxide region; The third oxidation zone is symmetrically arranged relative to the first oxidation zone, and the area enclosed by the first trench portion and the second trench portion is symmetrically arranged. The fourth oxidation zone is symmetrically arranged relative to the second oxidation zone, and the area enclosed by the first groove portion and the second groove portion is symmetrically arranged.

19. The method for fabricating a laser chip according to claim 14, wherein, The oxide layer and the second reflective layer each comprise AlGaAs, and the molar content of Al in the oxide layer is greater than the molar content of Al in the second reflective layer.

20. The method for fabricating a laser chip according to claim 14, wherein, When the oxide layer includes a first oxide pore and a second oxide pore, the first oxide pore includes a first oxide arc and a second oxide arc; The first oxidation arc faces the first trench portion, and the second oxidation arc faces the second trench portion; The third oxidation arc is disposed toward the first connecting portion, and the fourth oxidation arc is disposed toward the second connecting portion; the size of the first connecting portion is larger than the size of the second connecting portion. The radius of curvature of the third oxidation arc is greater than that of the fourth oxidation arc.

21. The method for fabricating a laser chip according to claim 14, wherein, When the oxide layer includes a first oxide pore and a second oxide pore, the second oxide pore includes a fifth oxide arc and a sixth oxide arc; The fifth oxidation arc faces the third trench portion, and the sixth oxidation arc faces the fourth trench portion; The seventh oxidation arc is disposed toward the third connecting portion, and the eighth oxidation arc is disposed toward the fourth connecting portion; the size of the third connecting portion is larger than the size of the fourth connecting portion; The radius of curvature of the seventh oxidation arc is greater than that of the eighth oxidation arc.

22. The method for fabricating a laser chip according to claim 14, wherein, When the oxide layer includes a first oxide hole and a second oxide hole, the first trench portion and the second trench portion are configured to expose both sides of the oxide layer to oxidize the oxide layer and generate the first oxide region; at the same time, the second reflective layer is oxidized to generate the second oxide region; The first oxide region includes aluminum oxide and arsenic oxide, the second oxide region includes aluminum oxide and arsenic oxide, and the first oxide pore does not include aluminum oxide or arsenic oxide.

23. The method for fabricating a laser chip according to claim 22, wherein, The first oxidation zone is located between the first trench portion and the second trench portion, and the second oxidation zone is located between the first trench portion and the second trench portion; The inner contour line of the second oxide region is further away from the first oxide hole than the inner contour line of the first oxide region; The outer contours of the first oxidation zone and the second oxidation zone are both formed by the first groove portion and the second groove portion.