Light-emitting device

Abstract

A semiconductor device includes a block and a light-emitting element mounted to the block, wherein the light-emitting element includes a ridge part disposed on a first plane, the first plane is opposite to the block, along a ridge axis orthogonal to a light emission surface of the light-emitting element, a first trench portion which is recessed from the first plane and is disposed adjacent and parallel to the ridge part, and a second trench portion which is recessed from the first plane and is disposed parallel to the ridge part on a side of the ridge part opposite the first trench portion, wherein the first trench portion and the second trench portion each include a first region which is recessed from the first plane by a first distance and a second region which is recessed from the first plane by a second distance which is greater than the first distance.

Description

LIGHT-EMITTING DEVICECROSS REFERENCE TO RELATED APPLICATIONS

[0001] This application claims the benefit of priority of U.S. Provisional Patent Application No. 63 / 739,319 filed December 27, 2024, and U.S. Provisional Patent Application No. 63 / 739,364 filed December 27, 2024, the entire contents of each of which are incorporated herein by reference.

[0002] The present disclosure relates to a light-emitting device.

[0003] For example, PTL 1 discloses a semiconductor laser element having a Gaussian-shaped far-field pattern. The semiconductor laser element is provided with a mesa extending from one end to another end of a semiconductor substrate. The mesa is sandwiched between two trenches formed from a surface of a contact layer to a predetermined depth of a second clad layer. The contact layer sandwiched between the two trenches has a width smaller than a width (a mesa width) of the second clad layer similarly sandwiched between the two trenches.

[0004] [PTL 1] Japanese Unexamined Patent Application Publication No. 2008-305957Summary

[0005] Incidentally, what is desired of a light-emitting device is to reduce a characteristic variation.

[0006] It is desirable to provide a light-emitting device that makes it possible to reduce a characteristic variation.

[0007] A semiconductor device according to an embodiment of the present disclosure includes a block and a light-emitting element mounted to the block, wherein the light-emitting element includes a ridge part disposed on a first plane, wherein the first plane is opposite to the block, along a ridge axis orthogonal to a light emission surface of the light-emitting element, a first trench portion which is recessed from the first plane and is disposed adjacent and parallel to the ridge part, and a second trench portion which is recessed from the first plane and is disposed parallel to the ridge part on a side of the ridge part opposite the first trench portion, wherein the first trench portion and the second trench portion each include a first region which is recessed from the first plane by a first distance and a second region which is recessed from the first plane by a second distance which is greater than the first distance.

[0008] In the light-emitting device according to the embodiment of the present disclosure, the step part is provided on the bottom surface of each of the pair of trenches that allows the ridge part to be provided. The ridge part is provided on the semiconductor layer including the first-conductivity-type layer, the active layer, and the second-conductivity-type layer in this order, and extends in the first direction in the stacking plane. The step part is configured to be deeper at the location close to the ridge part in the second direction orthogonal to the first direction in which the ridge part extends. This prevents a current flowing from the ridge part to the active layer from spreading in the second direction.

[0009] Fig. 1 is a perspective diagram illustrating a configuration example of a light-emitting device according to a first embodiment of the present disclosure.Fig. 2 is an exploded perspective diagram of the light-emitting device illustrated in Fig. 1.Fig. 3 is a schematic diagram illustrating a front configuration example of the light-emitting device illustrated in Fig. 1.Fig. 4 includes an upper surface diagram (A) and a cross-sectional diagram (B) of a semiconductor laser element illustrated in Fig. 1.Fig. 5A is a cross-sectional diagram for describing a method of manufacturing the light-emitting device illustrated in Fig. 1.Fig. 5B is a cross-sectional diagram illustrating a step subsequent to Fig. 5A.Fig. 5C is a cross-sectional diagram illustrating a step subsequent to Fig. 5B.Fig. 5D is a cross-sectional diagram illustrating a step subsequent to Fig. 5C.Fig. 5E is a cross-sectional diagram illustrating a step subsequent to Fig. 5D.Fig. 5F is a cross-sectional diagram illustrating a step subsequent to Fig. 5E.Fig. 5G is a cross-sectional diagram illustrating a step subsequent to Fig. 5F.Fig. 6 includes an upper surface diagram (A) and a cross-sectional diagram (B) illustrating a configuration example of a semiconductor laser element according to Modification Example 1 of the present disclosure.Fig. 7 includes an upper surface diagram (A) and a cross-sectional diagram (B) illustrating a configuration example of a semiconductor laser element according to Modification Example 2 of the present disclosure.Fig. 8 includes an upper surface diagram (A) and a cross-sectional diagram (B) illustrating a configuration example of a semiconductor laser element according to a second embodiment of the present disclosure.Fig. 9 includes an upper surface diagram (A) and a cross-sectional diagram (B) illustrating a configuration example of a semiconductor laser element according to Modification Example 3 of the present disclosure.Fig. 10 is a perspective diagram illustrating a configuration example of a light-emitting device according to another modification example of the present disclosure.

[0010] Hereinafter, description is given in detail of embodiments of the present disclosure with reference to the drawings.

[0011] The drawings to be referred to in the following description are intended to describe embodiments of the present disclosure and facilitate understanding thereof; shapes, dimensions, ratios, and the like illustrated in the drawings may differ from actual ones, in some cases, for better understanding. Further, the design of the light-emitting device illustrated in the drawings can be modified as appropriate by taking into consideration the following description and known techniques. In addition, in the description using the cross-sectional diagram of the light-emitting device, the up / down direction of the stacked structure of the light-emitting device corresponds to a relative direction in a case where an external electrode to be wire-bonded is defined as being the top. The up / down direction may differ, in some cases, from an up / down direction that is compliant with the actual gravitational acceleration.

[0012] In the following description, expressions regarding a size and a shape do not only mean the same values as a numerical value defined mathematically or a shape defined geometrically. The expressions regarding a size and a shape also include a shape in a case of having an industrially acceptable difference in a step of manufacturing the light-emitting device or even a shape similar thereto.

[0013] In the description of the light-emitting device, unless otherwise specified, "coupling" means electrical coupling between a plurality of elements. Additionally, "coupling" in the following description includes not only a case of coupling a plurality of elements directly and electrically, but also a case of coupling the plurality of elements indirectly and electrically via another element. It is to be noted that the description is given in the following order. 1. First Embodiment (An example of a light-emitting device including a step part that is provided on a bottom surface of each of a pair of trenches allowing a ridge part to be provided and is deeper at a location close to the ridge part) 2. Modification Examples 2-1. Modification Example 1 (Another example of a configuration of a semiconductor laser element) 2-2. Modification Example 2 (Another example of the configuration of the semiconductor laser element) 3. Second Embodiment (An example of a light-emitting device in which the ridge part has an eave shape) 4. Modification Example 4-1. Modification Example 3 (Another example of the configuration of the semiconductor laser element) 5. Other Modification Examples (Other examples of the configuration of the light-emitting device) 1. Embodiment

[0014] Fig. 1 is a perspective diagram illustrating a configuration example of a light-emitting device 1 according to a first embodiment of the present disclosure. Fig. 2 is an exploded perspective diagram of the light-emitting device 1 illustrated in Fig. 1. Fig. 3 schematically illustrates a front configuration of the light-emitting device 1 illustrated in Fig. 1. The light-emitting device 1 is used as, for example, a light source or a heat source for an electronic device.

[0015] The light-emitting device 1 is mounted with, for example, a semiconductor laser element 10 on a mounting surface Sb1 of a submount 20. The semiconductor laser element 10 includes, for example, a semiconductor stack section 110 including a lower clad layer 113, an active layer 114, and an upper clad layer 115 in this order. The upper clad layer 115 is provided with: a ridge part 11 extending in, for example, a Y-axis direction; and a pair of trenches 12 that allows the ridge part 11 to be provided. Each of the pair of trenches 12 is provided with a step part 12X on a bottom surface 12S1. The step part 12X is configured to be deeper at a location close to the ridge part 11 in, for example, an X-axis direction orthogonal to the Y-axis direction that is an extending direction of the ridge part 11.

[0016] Here, the light-emitting device 1 corresponds to a specific example of a "light-emitting device" according to one embodiment of the present disclosure. The semiconductor stack section 110 corresponds to a specific example of a "semiconductor layer" according to one embodiment of the present disclosure. The lower clad layer 113 corresponds to a specific example of a "first-conductivity-type layer" according to one embodiment of the present disclosure. The active layer 114 corresponds to a specific example of an "active layer" according to one embodiment of the present disclosure. The upper clad layer 115 corresponds to a specific example of a "second-conductivity-type layer" according to one embodiment of the present disclosure. The ridge part 11 corresponds to a specific example of a "ridge part" according to one embodiment of the present disclosure. The Y-axis direction corresponds to a specific example of a "first direction" according to one embodiment of the present disclosure, and the X-axis direction corresponds to a specific example of a "second direction" according to one embodiment of the present disclosure. The trench 12 corresponds to a specific example of a "trench" according to one embodiment of the present disclosure. The step part 12X corresponds to a specific example of a "step part" according to one embodiment of the present disclosure. <Configuration of Light-Emitting Device>

[0017] The light-emitting device 1 includes the semiconductor laser element 10, the submount 20, solder 30, external electrodes Ea and Eb, and a coupling electrode Ec.

[0018] The semiconductor laser element 10 is, for example, a type of edge-emitting semiconductor laser element, and includes a pair of end surfaces (resonator end surfaces Sa1 and Sa2) opposed to each other in a resonator direction. The resonator end surface Sa1 is, for example, a light output surface through which a laser beam is outputted to the outside. The semiconductor laser element 10 further includes: the ridge part 11 extending in a direction in which the resonator end surfaces Sa1 and Sa2 are opposed to each other (here, the Y-axis direction); and the pair of trenches 12 that allows the ridge part 11 to be provided. The resonator end surfaces Sa1 and Sa2 are surfaces formed by cleaving. The resonator end surfaces Sa1 and Sa2 serve as resonator mirrors, and the ridge part 11 serves as an optical waveguide. The semiconductor laser element 10 further includes a pair of side surfaces Sa3 and Sa4 opposed to each other in a direction orthogonal to the extending direction of the ridge part 11.

[0019] As illustrated in Fig. 3, the semiconductor laser element 10 includes, for example, a semiconductor stack section 110 in which a substrate 111, a buffer layer 112, the lower clad layer 113, the active layer 114, the upper clad layer 115, and a contact layer 116 are stacked in this order. An upper surface of the semiconductor stack section 110 (an upper surface of the contact layer 116) is referred to as an upper surface 10S1 of the semiconductor laser element 10, and a lower surface of the semiconductor stack section 110 (a surface, of the substrate 111, opposite to a surface on which the above-described semiconductor layers are formed) is referred to as a lower surface 10S2. The ridge part 11 is provided on the upper surface 10S1 of the semiconductor laser element 10. For example, each of the pair of trenches 12 allowing the ridge part 11 to be provided penetrates the contact layer 116, and includes the bottom surface 12S1 in layers of the upper clad layer 115. The step part 12X is provided on the bottom surface 12S1 of each of the pair of trenches 12 to be deeper at the location close to the ridge part 11, which will be described in detail later. The semiconductor laser element 10 further includes an upper electrode 117 on the contact layer 116 of the ridge part 11, and further includes a lower electrode 118 on a back surface of the substrate 111. The semiconductor laser element 10 further includes a dielectric film 13. The dielectric film 13 is provided on the bottom surfaces and side surfaces of the pair of trenches 12 as well as the contact layer 116 positioned outside the pair of trenches 12.

[0020] The semiconductor stack section 110 includes, for example, a group III-V compound semiconductor such as gallium arsenide (GaAs). Here, the term "group III-V semiconductor" refers to a semiconductor including: at least one element out of group 3B elements (at least one element out of Ga, Al, In, and B) in the short-form periodic table; and at least As out of group 5B elements in the short-form periodic table. Examples of the group III-V compound semiconductor include gallium arsenide-based compounds including gallium (Ga) and arsenic (As). Examples of the gallium arsenide-based compounds include gallium arsenide (GaAs), aluminum gallium arsenide (AlGaAs), indium gallium arsenide (InGaAs), and the like. The group III-V compound semiconductor is doped with an n-type impurity of a group IV or group VI element such as silicon (Si), germanium (Ge), oxygen (O), or selenium (Se), or with a p-type impurity of a group II or group IV element such as magnesium (Mg), zinc (Zn), or carbon (C), as necessary.

[0021] For example, the substrate 111 may be a group III-V compound semiconductor substrate such as a GaAs substrate. The substrate 111 may be an aluminum nitride (AlN) substrate, a sapphire substrate, a silicon carbide (SiC) substrate, a Si substrate, or a zirconium oxide (ZrO) substrate.

[0022] The buffer layer 112 is adapted to mitigate a lattice mismatch between the substrate 111 and the lower clad layer 113. In a case where the substrate 111 and the lower clad layer 113 have different lattice constants, the buffer layer 112 is controlled in the lattice constant to have a more favorable crystalline state. This makes it possible to suppress a crystal defect and further prevent warping of the substrate 111. The buffer layer 112 is formed on, for example, a main surface of the substrate 111, and includes, for example, a semiconductor layer (an n-type semiconductor layer) having n-type conductivity. The buffer layer 112 includes, for example, a GaAs layer, an AlGaAs layer, or both. The buffer layer 112 includes, for example, Si as a dopant adapted to provide n-type conductivity.

[0023] The lower clad layer 113 is formed on, for example, the buffer layer 112, and includes, for example, a semiconductor layer (an n-type semiconductor layer) having n-type conductivity. The lower clad layer 113 includes, for example, an AlGaAs layer. The lower clad layer 113 includes, for example, Si as a dopant adapted to provide n-type conductivity.

[0024] The active layer 114 is formed on, for example, the lower clad layer 113. The active layer 114 is provided between the lower clad layer 113 and the upper clad layer 115. The active layer 114 has, for example, a multi-well structure in which barrier layers and well layers are alternately stacked. The active layer 114 may have a multi-quantum well structure.

[0025] Each well layer includes Ga and a group III-V compound semiconductor. Each well layer includes a non-doped semiconductor layer. Each well layer generates a photon having a wavelength of 810 nm to 840 nm, for example.

[0026] Each barrier layer includes a group III-V compound semiconductor. Each barrier layer includes a non-doped semiconductor layer. The barrier layer has a bandgap having a value greater than or equal to, for example, a maximum bandgap of each well layer.

[0027] The upper clad layer 115 is formed on the active layer 114. The upper clad layer 115 includes, for example, a semiconductor layer (a p-type semiconductor layer) having p-type conductivity. The upper clad layer 115 includes, for example, an AlGaAs layer. The upper clad layer 115 includes, for example, C as a dopant adapted to provide p-type conductivity.

[0028] In the present embodiment, the upper clad layer 115 has, for example, a three-layer structure in which a first clad layer 115A, an intermediate layer 115B, and a second clad layer 115C are stacked in this order from a side close to the active layer 114. The first clad layer 115A and the second clad layer 115C have an etching rate different from that of the intermediate layer 115B. For example, the first clad layer 115A, the intermediate layer 115B, and the second clad layer 115C each include an AlGaAs layer, and the AlGaAs layers of the first clad layer 115A and the second clad layer 115C have an impurity concentration different from that of the AlGaAs layer of the intermediate layer 115B.

[0029] The contact layer 116 is formed on, for example, the upper clad layer 115, and includes, for example, a semiconductor layer (a p-type semiconductor layer) having p-type conductivity. The contact layer 116 includes, for example, a GaAs layer, an AlGaAs layer, or both. The contact layer 116 includes, for example, C as a dopant adapted to provide p-type conductivity.

[0030] Fig. 4 schematically illustrates configurations of an upper surface (A) and a cross-section (B) of the semiconductor laser element 10 illustrated in Fig. 1. The ridge part 11 is provided by the pair of trenches 12, on an upper portion of the semiconductor stack section 110, specifically, the contact layer 116 and a portion of the upper clad layer 115. The ridge part 11 extends in one direction (the resonator direction) in a stacking plane of the semiconductor stack section 110. In other words, the ridge part 11 extends in the direction in which the resonator end surfaces Sa1 and Sa2 are opposed to each other (here, the Y-axis direction), as described above. Further, in other words, the ridge part 11 is considered as being sandwiched between the pair of resonator end surfaces Sa1 and Sa2 of the semiconductor stack section 110. The ridge part 11 is formed by, for example, performing etching removal from the upper surface of the contact layer 116 to the middle of the upper clad layer 115.

[0031] The step part 12X is provided on the bottom surface 12S1 of each of the pair of trenches 12. As described above, the step part 12X is configured to be deeper at the location close to the ridge part 11 in, for example, the X-axis direction. The step part 12X extends in the Y-axis direction, similarly to the ridge part 11. In other words, each of the pair of trenches 12 has two regions, i.e., regions R1 and R2 provided with the step part 12X as a boundary and extending in the Y-axis direction. The region R1 is provided at the location close to the ridge part 11, on the bottom surface 12S1 of each of the pair of trenches 12. In the region R1, the bottom surface 12S1 of each of the pair of trenches 12 forms a deeper bottom surface 121S. The bottom surface 121S corresponds to a "first bottom surface" according to one embodiment of the present disclosure. The first clad layer 115A is exposed on the bottom surface 121S. The region R2 is provided at a location distant from the ridge part 11, on the bottom surface 12S1 of each of the pair of trenches 12. In the region R2, the bottom surface 12S1 of each of the pair of trenches 12 forms a bottom surface 122S shallower than the bottom surface 121S. The bottom surface 122S corresponds to a "second bottom surface" according to one embodiment of the present disclosure. The intermediate layer 115B is exposed on the bottom surface 122S.

[0032] That is, in the present embodiment, a film thickness of the upper clad layer 115 on the bottom surface 12S1 of each of the pair of trenches 12 that allows the ridge part 11 to be provided is smaller in the region R1 close to the ridge part 11 than in the region R2 distant from the ridge part 11. This prevents the current flowing from the ridge part 11 to the active layer 114 from spreading in a lateral direction (here, the X-axis direction).

[0033] The step part 12X is formed to be continuous in, for example, the X-axis direction on the bottom surface 12S1 of each of the pair of trenches 12. A height difference of the step part 12X, specifically, a height difference h between the bottom surface 121S in the region R1 and the bottom surface 122S in the region R2 is preferably 10 nm or greater and 30 nm or less, for example. This reduces a variation, among the semiconductor laser elements 10, of a radiation angle in a horizontal direction of the active layer 114.

[0034] It is to be noted that, in Fig. 1, (A) of Fig. 4, and the like, the example has been described in which the step part 12X is formed to be continuous in, for example, the X-axis direction; however, this is non-limiting. For example, the step part 12X may be formed at intervals in the X-axis direction.

[0035] The upper electrode 117 is formed on the contact layer 116 and in contact with an upper surface of the ridge part 11. The upper electrode 117 has, for example, a configuration in which a titanium (Ti) layer, a platinum (Pt) layer, and a gold (Au) layer are stacked in this order from a side close to the contact layer 116. It is sufficient for the upper electrode 117 to be electrically coupled to the contact layer 116, and a layer configuration of the upper electrode 117 is not limited to the configuration described above. Further, the upper electrode 117 may be in contact with the entirety of the upper surface of the contact layer 116, or may be in contact with only a portion of the upper surface of the contact layer 116.

[0036] For example, the lower electrode 118 is formed in contact with a lower surface of the substrate 111. The lower electrode 118 has, for example, a configuration in which an AuGe layer, a Ni layer, a Ti layer, a Pt layer, and an Au layer are stacked in this order from a side close to the substrate 111. It is sufficient for the lower electrode 118 to be electrically coupled to the substrate 111, and a layer configuration of the lower electrode 118 is not limited to the configuration described above. Further, the lower electrode 118 may be in contact with the entirety of the lower surface of the substrate 111, or may be in contact with only a portion of the lower surface of the substrate 111.

[0037] The dielectric film 13 covers the bottom surfaces and the side surfaces of the pair of trenches 12, as well as a portion, of the upper surface 10S1 of the semiconductor stack section 110, positioned outside the pair of trenches 12 that allows the ridge part 11 to be provided. The dielectric film 13 includes, for example, silicon oxide (SiO2).

[0038] The resonator end surfaces Sa1 and Sa2 may each be provided with an end surface coating film. The end surface coating film is, for example, a multilayer reflective film or an antireflection film. The multilayer reflective film includes, for example, a dielectric such as SiO2, titanium oxide (TiO2), tantalum oxide (Ta2O5), or silicon nitride (SiN). The multilayer reflective film is provided on the resonator end surface Sa1 serving as the light output surface. The antireflection film includes, for example, a dielectric (e.g., SiO2, TiO2, Ta2O5, SiN, or the like) and Si. The antireflection film is provided on the resonator end surface Sa2.

[0039] In the semiconductor laser element 10 of the present embodiment, when a predetermined voltage is applied between the upper electrode 117 and the lower electrode 118, a current is injected into the active layer 114, which causes light emission to be generated due to recombination of electrons and holes. The light is repeatedly reflected by the pair of resonator end surfaces Sa1 and Sa2 and then outputted from one of the end surfaces (the resonator end surface Sa1) as a laser beam of a predetermined wavelength. In this way, laser oscillation is performed.

[0040] The external electrode Ea is provided on the upper surface 10S1 of the semiconductor laser element 10. The external electrode Ea is, for example, a metal layer to which a bonding wire is bonded. The external electrode Ea includes, for example, Ti and Au in this order from a side close to the upper electrode 117 and the dielectric film 13. The external electrode Ea is electrically coupled to the upper surface of the ridge part 11 with the upper electrode 117 interposed therebetween. The external electrode Ea may be formed collectively with the upper electrode 117.

[0041] The submount 20 includes a block 21. The block 21 includes the mounting surface Sb1 on which the semiconductor laser element 10 is mounted and a bonding end surface Sb2 having a normal line that intersects a normal line of the mounting surface Sb1. The block 21 further includes, as surfaces thereof, a non-bonding end surface Sb3 and a pair of side surfaces Sb4 and Sb5. The non-bonding end surface Sb3 is opposed to the bonding end surface Sb2. The side surfaces Sb4 and Sb5 each have a normal line that intersects each of the normal line of the mounting surface Sb1 and the normal line of the bonding end surface Sb2. The block 21 includes an insulating material having a high heat dissipation property. The block 21 includes, for example, AlN, Si, SiC, copper (Cu), tungsten (W), molybdenum (Mo), aluminum (Al), diamond, a composite material including any of these materials, or the like. Examples of such a composite material include Cu-W, Al-SiC, and the like.

[0042] The bonding end surface Sb2, the non-bonding end surface Sb3, and the side surfaces Sb4 and Sb5 are side surfaces of the block 21. The block 21 is larger in size than the semiconductor laser element 10. Specifically, the mounting surface Sb1 of the block 21 is larger in size than the lower electrode 118 of the semiconductor laser element 10. The semiconductor laser element 10 is so bonded to the mounting surface Sb1 that, for example, the ridge part 11 is at a position opposed to a center position, of the mounting surface Sb1, in a width direction of the ridge part 11. For example, the resonator end surface Sa1 is disposed at a position close to the bonding end surface Sb2. For example, the resonator end surface Sa2 is disposed at a position distant from the non-bonding end surface Sb3, as compared with a distance between the resonator end surface Sa1 and the bonding end surface Sb2. For example, the side surface Sa3 is disposed at a position close to the side surface Sb4. For example, the side surface Sa4 is disposed at a position distant from the side surface Sb5, as compared with a distance between the side surface Sa3 and the side surface Sb4. The position of the semiconductor laser element 10 on the mounting surface Sb1 is not limited to the position described above.

[0043] The bonding end surface Sb2 is, for example, a bonding surface to be bonded to an external component. The semiconductor laser element 10 is bonded to the external component via the submount 20.

[0044] The bonding end surface Sb2 is provided with a bonding metal layer 22. The bonding metal layer 22 is bonded to the external component via, for example, solder. The bonding metal layer 22 includes, for example, Ti, Pt, and Au in this order from a side close to the bonding end surface Sb2. It is sufficient for the bonding metal layer 22 to be able to be in close contact with the bonding end surface Sb2, and a layer configuration of the bonding metal layer 22 is not limited to the configuration described above.

[0045] The mounting surface Sb1 is provided with the coupling electrode Ec and the external electrode Eb. The lower electrode 118 of the semiconductor laser element 10 is bonded to the coupling electrode Ec via the solder 30. The external electrode Eb is, for example, a metal layer to which the bonding wire is bonded. The coupling electrode Ec and the external electrode Eb each include, for example, Ti, Pt, and Au in this order from a side close to the block 21. It is sufficient for each of the coupling electrode Ec and the external electrode Eb to be able to be in close contact with the mounting surface Sb1 of the block 21, and a layer configuration of each of the coupling electrode Ec and the external electrode Eb is not limited to the configuration described above.

[0046] The solder 30 is adapted to mount the semiconductor laser element 10 on the submount 20. The solder 30 is, for example, so provided between the lower electrode 118 and the coupling electrode Ec as to bond the lower surface 10S2 of the semiconductor laser element 10 and the mounting surface Sb1 of the submount 20 to each other. The solder 30 includes, for example, AuSn (gold-tin). That is, the semiconductor laser element 10 and the submount 20 are eutectically bonded to each other by, for example, AuSn. The semiconductor laser element 10 and the submount 20 may be bonded to each other by a silver (Ag) paste, sintered gold (Au), sintered silver (Ag), or the like. <Method of Manufacturing Semiconductor Laser Element>

[0047] The semiconductor laser element 10 is manufacturable, for example, as follows. Figs. 5A to 5G each illustrate an example of a method of manufacturing the semiconductor laser element 10.

[0048] First, the substrate 111 including, for example, GaAs is prepared in a reactor, as illustrated in Fig. 5A. Thereafter, the buffer layer 112, the lower clad layer 113, the active layer 114, the upper clad layer 115, and the contact layer 116 are formed in this order on an upper surface (a crystal-growth surface) of the substrate 111 by, for example, organometallic chemical vapor deposition (MOCVD). Thereafter, a film of a SiO2film 121 is formed on the contact layer 116.

[0049] When MOCVD is performed, used as a source gas of gallium is, for example, trimethylgallium ((CH3)3Ga), and used as a source gas of aluminum is, for example, trimethylaluminum ((CH3)3Al). Further, used as a source gas of arsenic is arsine (AsH3). Further, used as a source gas of silicon is, for example, monosilane (SiH4), and used as a source gas of carbon is, for example, carbon tetrabromide (CBr4).

[0050] Thereafter, a resist film 122 is patterned on the SiO2film 121 by, for example, a photolithography method, as illustrated in Fig. 5B.

[0051] Thereafter, openings H are provided in the SiO2film 121 by, for example, reactive ion-etching (RIE) to expose the contact layer 116, as illustrated in Fig. 5C.

[0052] Thereafter, the resist film 122 is removed, as illustrated in Fig. 5D.

[0053] Thereafter, the second clad layer 115C and the contact layer 116 exposed in the openings H are removed by, for example, RIE to form the pair of trenches 12, as illustrated in Fig. 5E. The intermediate layer 115B is exposed on the bottom surface 12S1 of each of the pair of trenches 12. As a result, the ridge part 11 having a thin band shape is formed on the second clad layer 115C and the contact layer 116.

[0054] Thereafter, a resist film is patterned by, for example, a photolithography method, on the SiO2film 121 and the intermediate layer 115B exposed on the bottom surface 12S1 of each of the pair of trenches 12. At this time, the resist film is so patterned that the intermediate layer 115B is exposed in the region R1 positioned close to the ridge part 11, inside the pair of trenches 12. Thereafter, the intermediate layer 115B exposed from the resist film in the pair of trenches 12 is removed by, for example, RIE to expose the first clad layer 115A. As a result, the step part 12X in which the bottom surface 121S in the region R1 close to the ridge part 11 is deeper than the bottom surface 122S in the region R2 distant from the ridge part 11 is formed on the bottom surface 12S1 of each of the pair of trenches 12, as illustrated in Fig. 5F.

[0055] Thereafter, a film of the dielectric film 13 is formed on the upper clad layer 115 and the contact layer 116, following which an opening is provided correspondingly to an upper surface of the ridge part 11, as illustrated in Fig. 5G. Thereafter, a film of the metal material is formed by, for example, a vapor deposition method or a sputtering method, following which the film is patterned into a desired shape by, for example, etching using a photolithography method to thereby form the upper electrode 117. Thereafter, a back surface side of the substrate 111 is lapped and polished, for example, to cause the substrate 111 to have a predetermined thickness, following which the lower electrode 118 is formed on the back surface of the substrate 111. In this way, the semiconductor laser element 10 is completed. <Workings and Effects>

[0056] In the light-emitting device 1 of the present embodiment, the semiconductor laser element 10 is provided with the step part 12X on the bottom surface 12S1 of each of the pair of trenches 12 that allows the ridge part 11 extending in, for example, the Y-axis direction to be provided. The step part 12X is configured to be deeper at the location close to the ridge part 11 in, for example, the X-axis direction orthogonal to the extending direction of the ridge part 11. This prevents the current flowing from the ridge part 11 to the active layer 114 from spreading in the lateral direction (here, the X-axis direction). Description is given of this point below.

[0057] A typical semiconductor laser element independently performs current constriction control and optical confinement control in a transverse mode of oscillation light to improve a kink level and reduce an operating current.

[0058] To perform the current constriction control and the optical confinement control in the transverse mode of the oscillation light, the semiconductor laser element described above, for example, is provided with a mesa on a second clad layer and a contact layer that are formed on an active layer. The mesa extends from one end to another end of a semiconductor substrate. Further, the semiconductor laser element described above has a configuration in which the contact layer sandwiched between two trenches allowing the mesa to be provided has a width smaller than a width of the second clad layer similarly sandwiched between the two trenches to form a Gaussian-shaped far-field pattern.

[0059] Incidentally, the two trenches that allow the mesa to be provided are formed by, for example, dry etching. The semiconductor laser element including the mesa to perform the current constriction control and the optical confinement control in the transverse mode of the oscillation light has a problem of a characteristic fluctuation caused by a variation in depth of the two trenches formed by etching.

[0060] To address this, in the light-emitting device 1 of the present embodiment, the step part 12X configured to be deeper at the location close to the ridge part 11 is provided on the bottom surface 12S1 of each of the pair of trenches 12 that allows the ridge part 11 to be provided, as described above.

[0061] Specifically, for example, the upper clad layer 115 has a three-layer structure in which the first clad layer 115A, the intermediate layer 115B, and the second clad layer 115C are stacked in this order from the side close to the active layer 114. The first clad layer 115A and the second clad layer 115C have an etching rate different from that of the intermediate layer 115B. Two-step etching using the difference in the etching rate between the intermediate layer 115B and the first clad layer 115A as well as the second clad layer 115C causes the film thickness of the upper clad layer 115 on the bottom surface 12S1 of each of the pair of trenches 12 allowing the ridge part 11 to be provided to be smaller in the region R1 close to the ridge part 11 than in the region R2 distant from the ridge part 11.

[0062] This prevents the current flowing from the ridge part 11 to the active layer 114 from spreading in the lateral direction. This makes it possible to improve an effect, provided by the ridge part 11, of optical confinement in the transverse mode in the horizontal direction of the active layer 114 (here, the X-axis direction).

[0063] As described above, the light-emitting device 1 of the present embodiment makes it possible to reduce a characteristic variation among the semiconductor laser elements 10.

[0064] Next, description is given of a second embodiment, Modification Examples 1 to 3, and other modification examples of the present disclosure. It is to be noted that components corresponding to the light-emitting device 1 of the first embodiment described above are denoted by the same reference numerals, and description thereof is omitted. 2. Modification Examples (2-1. Modification Example 1)

[0065] Fig. 6 schematically illustrates configurations of an upper surface (A) and a cross-section (B) of a semiconductor laser element 10A according to Modification Example 1 of the present disclosure.

[0066] In the first embodiment described above, the example has been described in which the step part 12X includes a side surface 12S2 perpendicular to the bottom surface 12S1; however, this is non-limiting. In the semiconductor laser element 10A of the present modification example, the side surface 12S2 of the step part 12X provided in each of the pair of trenches 12 that allows the ridge part 11 to be provided has a tapered shape. Except for this point, the semiconductor laser element 10A has a configuration substantially similar to that of the semiconductor laser element 10 of the first embodiment described above.

[0067] It is to be noted that, as illustrated in (B) of Fig. 6, a side surface 12S3, constituting the ridge part 11, of each of the pair of trenches 12 may have a tapered shape similar to the side surface 12S2 of the step part 12X.

[0068] The semiconductor laser element 10A of the present modification example having such a configuration also makes it possible to achieve effects similar to those of the first embodiment described above. (2-2. Modification Example 2)

[0069] Fig. 7 schematically illustrates configurations of an upper surface (A) and a cross-section (B) of a semiconductor laser element 10B according to Modification Example 2 of the present disclosure.

[0070] In the semiconductor laser element 10B of the present modification example, a plurality of ridge parts 11 (here, two ridge parts, i.e., ridge parts 11A and 11B) is formed side by side. Except for this point, the semiconductor laser element 10B has a configuration substantially similar to that of the semiconductor laser element 10 of the first embodiment described above.

[0071] The ridge parts 11A and 11B are each provided by a pair of trenches 12A and 12B, similarly to the ridge part 11 of the first embodiment described above. The trench 12A is provided outside corresponding one of the ridge parts 11A and 11B. The trench 12B is provided between the ridge part 11A and the ridge part 11B. The bottom surface 12S1 of each trench 12A is provided with the step part 12X configured to be deeper at the location close to the ridge part 11 in, for example, the X-axis direction, similarly to the ridge part 11 of the first embodiment described above. That is, each trench 12A has two regions, i.e., the regions R1 and R2 provided with the step part 12X as a boundary and extending in the Y-axis direction, the first clad layer 115A is exposed on the bottom surface 121S in the region R1, and the intermediate layer 115B is exposed on the bottom surface 122S in the region R2, similarly to the ridge part 11 of the first embodiment described above. The trench 12B includes a flat bottom surface 12S4, and the first clad layer 115A is exposed on the bottom surface 12S4, similarly to the region R1. A distance W between the ridge part 11A and the ridge part 11B is, for example, 10 nm or greater and 50 nm or less.

[0072] The semiconductor laser element 10B of the present modification example having such a configuration also makes it possible to achieve effects similar to those of the first embodiment described above. 3. Second Embodiment

[0073] Fig. 8 schematically illustrates configurations of an upper surface (A) and a cross-section (B) of a semiconductor laser element 10C according to the second embodiment of the present disclosure.

[0074] In the semiconductor laser element 10C of the present embodiment, the ridge part 11 has an eave shape 116X. Specifically, in the semiconductor laser element 10C, of the upper clad layer 115 and the contact layer 116 constituting the ridge part 11, the contact layer 116 is formed with a width W1 in the X-axis direction larger than a width W2 in the X-axis direction of the upper clad layer 115. In other words, in the semiconductor laser element 10C, of the upper clad layer 115 and the contact layer 116 constituting the ridge part 11, the upper clad layer 115 is formed with the width W2 in the X-axis direction smaller than the width W1 in the X-axis direction of the contact layer 116, and the contact layer 116 protrudes more than the upper clad layer 115 in the X-axis direction.

[0075] The eave shape 116X is formed, for example, across the ridge part 11 extending in the X-axis direction. In addition, the eave shape 116X may be formed only on a portion, of the ridge part 11 extending in the X-axis direction, in a region R3 adjacent to each of the resonator end surfaces Sa1 and Sa2 opposed to each other. Alternatively, the eave shape 116X may be formed only on a portion, of the ridge part 11 extending in the X-axis direction, in a region R4 inside a location adjacent to each of the resonator end surfaces Sa1 and Sa2 opposed to each other.

[0076] For example, the eave shape 116X may be formed simultaneously in the step of forming the ridge part 11. Specifically, the eave shape 116X may be formed by causing the upper clad layer 115 and the contact layer 116 to have mutually different compositions and causing the upper clad layer 115 and the contact layer 116 to have mutually different etching rates. The eave shape 116X may be easily formed by wet etching; however, this is non-limiting. The eave shape 116X may also be formed by dry etching such as RIE by selecting an etching condition that promotes side etching.

[0077] Further, in a case where the eave shape 116X is partially formed as described above, a resist film is patterned by, for example, a photolithography method, in a region (e.g., the region R4) other than a region (e.g., the region R3) in which the eave shape 116X is to be formed. Thereafter, the ridge part 11 is formed, following which additional etching is performed. This allows the eave shape 116X to be formed only at a desired position (e.g., the region R3).

[0078] It is to be noted that, in Fig. 8, the example has been described in which the upper electrode 117 is omitted and the external electrode Ea is formed directly on the contact layer 116; however, this is non-limiting. The upper electrode 117 may be formed on the contact layer 116, similarly to the semiconductor laser element 10 of the first embodiment described above.

[0079] As described above, in the semiconductor laser element 10C of the present embodiment, of the upper clad layer 115 and the contact layer 116 constituting the ridge part 11, the contact layer 116 is formed to be wider than the upper clad layer 115. This reduces contact resistance between the contact layer 116 and the external electrode Ea, as compared with the semiconductor laser element 10 of the first embodiment described above and the like.

[0080] Further, in the semiconductor laser element 10C of the present embodiment, of the upper clad layer 115 and the contact layer 116 constituting the ridge part 11, the upper clad layer 115 is formed to be narrower than the contact layer 116. As a result, the current flowing from the ridge part 11 to the active layer 114 is further constricted as compared with the semiconductor laser element 10 of the first embodiment described above and the like, which makes it possible to improve luminous efficiency. 4. Modification Example (4-1. Modification Example 3)

[0081] Fig. 9 schematically illustrates configurations of an upper surface (A) and a cross-section (B) of a semiconductor laser element 10D according to Modification Example 3 of the present disclosure.

[0082] The semiconductor laser element 10D of the present modification example is, for example, a combination of the semiconductor laser element 10 of the first embodiment described above and the semiconductor laser element 10C of the second embodiment described above. In the semiconductor laser element 10D: the step part 12X is provided on the bottom surface 12S1 of each of the pair of trenches 12 that allows the ridge part 11 to be provided; and of the upper clad layer 115 and the contact layer 116 constituting the ridge part 11, the contact layer 116 is formed to be wider than the upper clad layer 115. Except for this point, the semiconductor laser element 10D has a configuration substantially similar to that of each of the semiconductor laser element 10 of the first embodiment described above and the semiconductor laser element 10C of the second embodiment described above.

[0083] The semiconductor laser element 10D of the present modification example makes it possible to improve the luminous efficiency while reducing the characteristic variation among the semiconductor laser elements 10D. 5. Other Modification Examples

[0084] Fig. 10 is a perspective diagram illustrating a configuration example of a light-emitting device 1A according to another modification example of the present disclosure.

[0085] In the first embodiment described above, the example has been described in which the semiconductor laser element 10 is mounted on the submount 20; however, this is non-limiting. In the light-emitting device 1A of the present modification example, the semiconductor laser element 10 is mounted on a heat sink 40 instead of the submount 20. Except for this point, the light-emitting device 1A has a configuration substantially similar to that of the light-emitting device 1 of the first embodiment described above.

[0086] As with the submount 20, the heat sink 40 includes, for example, a block including, as surfaces thereof, the mounting surface Sb1, the bonding end surface Sb2, the non-bonding end surface Sb3, and the side surfaces Sb4 and Sb5, as illustrated in Fig. 10. In the block of the heat sink 40, the mounting surface Sb1 is provided with the coupling electrode Ec and the external electrode Eb. In the block of the heat sink 40, the bonding end surface Sb2 is provided with the bonding metal layer 22. The block of the heat sink 40 includes, for example, Cu, Fe, Al, Au, W, Mo, a composite material including any of these materials, or the like. Examples of such a composite material include Cu-W, Cu-Mo, and the like.

[0087] The light-emitting device 1A of the present modification example having such a configuration also makes it possible to achieve effects similar to those of the first embodiment and the second embodiment described above.

[0088] Although the present disclosure has been described above with reference to the embodiments and Modification Examples 1 to 4, the present disclosure is not limited to the embodiments and the like described above, and various modifications may be made. For example, any two or more of the respective configurations of the embodiments and Modification Examples 1 to 4 described above may be appropriately combined with each other.

[0089] For example, the light-emitting device and the semiconductor laser element of the present disclosure do not necessarily have to include all of the components described in the embodiments and the like above, and conversely, may include any other layer. In one example, the semiconductor laser element 10 may further include, for example, a spacer layer adapted to adjust the optical confinement in a stacking direction.

[0090] Further, in the first embodiment described above, the example has been described in which the buffer layer 112 and the lower clad layer 113 each include an n-type semiconductor layer, and the upper clad layer 115 and the contact layer 116 each include a p-type semiconductor layer; however, this is non-limiting. The buffer layer 112, the lower clad layer 113, the upper clad layer 115, and the contact layer 116 may each include a semiconductor layer having opposite electric conductivity. That is, the buffer layer 112 and the lower clad layer 113 may each include a p-type semiconductor layer, and the upper clad layer 115 and the contact layer 116 may each include an n-type semiconductor layer.

[0091] Furthermore, not all of the configurations and the operations described in the embodiments and the like described above are necessarily essential as the configurations and the operations of the present disclosure. For example, among the components in the embodiments and the like described above, the components not recited in the independent claim representing the broadest concept of the present disclosure should be understood as optional components.

[0092] The terms used throughout this specification and the appended claims are to be interpreted as "non-limiting" terms. For example, the terms "include" or "be included" are to be interpreted as "not limited to the example described as being included". For example, the term "have" is to be interpreted as "not limited to the example described as having".

[0093] The terms in this specification are used merely for convenience of description, and include terms that are not used to limit the configurations and the operations. For example, the terms "right", "left", "up", "down", and the like merely indicate the directions in the drawing to which reference is made. Further, the terms "inner" and "outer" merely indicate a direction toward the center of the component of interest and a direction away from the center of the component of interest, respectively. This similarly applies to terms similar to the above-described terms, terms having meanings similar to those of the above-described terms, and the like.

[0094] It is to be noted that the effects described in this specification are mere examples and description thereof is non-limiting. Any other effect may also be achieved.

[0095] It is to be noted that the present disclosure may have any of the following configurations. According to the present technology having any of the following configurations, it is possible to reduce a characteristic variation. (1) A light-emitting device including: a semiconductor layer including a first-conductivity-type layer, an active layer, and a second-conductivity-type layer in this order; a ridge part provided on the second-conductivity-type layer and extending in a first direction in a stacking plane; a pair of trenches that is provided in the second-conductivity-type layer and allows the ridge part to be provided; and a step part provided on a bottom surface of each of the pair of trenches to be deeper at a location close to the ridge part in a second direction orthogonal to the first direction. (2) The light-emitting device according to (1), in which the step part has a height difference of 10 nm or greater and 30 nm or less. (3) The light-emitting device according to (1) or (2), in which the step part is formed to be continuous in the first direction. (4) The light-emitting device according to any one of (1) to (3), in which the step part is formed at intervals in the first direction. (5) The light-emitting device according to any one of (1) to (4), in which the step part includes a side surface having a tapered shape. (6) The light-emitting device according to any one of (1) to (5), in which the second-conductivity-type layer includes a single-layer film or a stacked film. (7) The light-emitting device according to any one of (1) to (6), in which the second-conductivity-type layer includes a first layer, a second layer, and a third layer in this order from a side close to the active layer, and the second layer has a composition different from a composition of the first layer and a composition of the third layer. (8) The light-emitting device according to (7), in which the second layer has an etching rate different from an etching rate of the first layer and an etching rate of the third layer, and the second layer serves as an etching stopper film. (9) The light-emitting device according to (7) or (8), in which the pair of trenches each includes a first bottom surface and a second bottom surface, the first bottom surface extending in the first direction at the location close to the ridge part with the step part as a boundary, the second bottom surface extending in the first direction at a location distant from the ridge part with the step part as the boundary, the first layer is exposed on the first bottom surface, and the second layer is exposed on the second bottom surface. (10) The light-emitting device according to any one of (1) to (9), in which the first-conductivity-type layer includes a group III-V compound semiconductor having n-type conductivity, and the second-conductivity-type layer includes a group III-V compound semiconductor having p-type conductivity. (11) The light-emitting device according to any one of (1) to (10), in which the first-conductivity-type layer includes a group III-V compound semiconductor having p-type conductivity, and the second-conductivity-type layer includes a group III-V compound semiconductor having n-type conductivity. (12) The light-emitting device according to any one of (1) to (11), in which the semiconductor layer further includes a contact layer on the second-conductivity-type layer, the contact layer has a width in the second direction larger than a width in the second direction of the second-conductivity-type layer, and the ridge part has an eave shape. (13) The light-emitting device according to (12), in which the semiconductor layer includes a pair of resonator end surfaces on which respective end surfaces of the first-conductivity-type layer, the active layer, the second-conductivity-type layer, and the contact layer are exposed, and the eave shape is selectively formed at a location adjacent to each of the pair of resonator end surfaces. (14) The light-emitting device according to (12) or (13), in which the semiconductor layer includes a pair of resonator end surfaces on which respective end surfaces of the first-conductivity-type layer, the active layer, the second-conductivity-type layer, and the contact layer are exposed, and the eave shape is selectively formed in a region excluding a location adjacent to each of the pair of resonator end surfaces. (15) A semiconductor device, comprising a block and a light-emitting element mounted to the block, wherein the light-emitting element includes a ridge part disposed on a first plane, wherein the first plane is opposite to the block, along a ridge axis orthogonal to a light emission surface of the light-emitting element, a first trench portion which is recessed from the first plane and is disposed adjacent and parallel to the ridge part, and a second trench portion which is recessed from the first plane and is disposed parallel to the ridge part on a side of the ridge part opposite the first trench portion, wherein the first trench portion and the second trench portion each include a first region which is recessed from the first plane by a first distance and a second region which is recessed from the first plane by a second distance which is greater than the first distance. (16) The semiconductor device according to (15), wherein the light-emitting element is a laser. (17) The semiconductor device according to (15) or (16), wherein the second region of each of the first trench portion and the second trench portion is adjacent to the ridge part. (18) The semiconductor device according to (15) to (17), wherein a difference in the recessed distance between the first region and the second region is between 10 nanometers (nm) and 30 nm. (19) The semiconductor device according to (15) to (18), wherein the light-emitting element further includes a clad layer which includes at least three sub-layers, wherein at least two of the sub-layers have differing etching rates. (20) The semiconductor device of (19), wherein a greater number of sub-layers are present in the first region than in the second region. (21) The semiconductor device according to (15) to (20), wherein the first region and the second region are continuous along the ridge axis. (22) The semiconductor device according to (15) to (20), wherein the second region is discontinuous along the ridge axis at intervals. (23) The semiconductor device according to (15) to (22), wherein a dielectric film is disposed along the first plane and surfaces of each of the first trench portion and the second trench portion. (24) The semiconductor device according to (15) to (23), wherein a metal layer is disposed along the first plane and surfaces of each of the first trench portion and the second trench portion. (25) The semiconductor device according to (15) to (24), wherein a transition between the first region and the second region includes a side surface which is orthogonal to the first plane. (26) The semiconductor device according to (15) to (24), wherein a transition between the first region and the second region includes a side surface which has a tapered shape. (27) The semiconductor device according to (15) to (26), wherein the light-emitting element further includes an additional ridge part, a third trench portion is disposed between the ridge part and the additional ridge part, and wherein the second trench portion is adjacent to the additional ridge part. (28) The semiconductor device according to (27), wherein a distance between the ridge part and the additional ridge part is between 10 nanometers (nm) and 50nm. (29) The semiconductor device according to (27) or (28), wherein a recessed distance of the third trench portion is substantially equal to the second distance. (30) The semiconductor device according to (15) to (29), wherein the block is a submount. (31) The semiconductor device according to (15) to (29), wherein the block is a heat sink. (32) The semiconductor device according to (15) to (31), wherein a cross section of the ridge part includes an eave shape along at least a portion of the ridge part. (33) The semiconductor device according to (32), wherein the cross section of the ridge part includes an eave shape along a full length of the ridge part. (34) The semiconductor device according to (15) to (33), wherein a contact layer of the ridge part has a greater cross-sectional width than a clad layer of the ridge part.

[0096] It should be understood by those skilled in the art that various modifications, combinations, sub-combinations and alterations may occur depending on design requirements and other factors insofar as they are within the scope of the appended claims or the equivalents thereof.Reference Numerals List

[0097] 1, 1A light-emitting device 10, 10A, 10B, 10C, 10D semiconductor laser element 11, 11A, 11B ridge part 12, 12A, 12B trench 12X step part 13 dielectric film 20 submount 21 block 22 bonding metal layer 30 solder 40 heat sink 110 semiconductor stack section 111 substrate 112 buffer layer 113 lower clad layer 114 active layer 115 upper clad layer 115A first clad layer 115B intermediate layer 115C second clad layer 116 contact layer 116X eave shape 117 upper electrode 118 lower electrode 121 SiO2film 122 resist film 10S1 upper surface 10S2 lower surface 12S1, 12S4, 121S, 122S bottom surface 12S2, 12S3, Sa3, Sa4, Sb4, Sb5 side surface Ea, Eb external electrode Ec coupling electrode H opening R1, R2, R3, R4 region Sa1, Sa2 resonator end surface Sb1 mounting surface Sb2 bonding end surface Sb3 non-bonding end surface

Claims

1. A semiconductor device, comprising: a block; and a light-emitting element mounted to the block, wherein the light-emitting element includes: a ridge part disposed on a first plane, wherein the first plane is opposite to the block, along a ridge axis orthogonal to a light emission surface of the light-emitting element, a first trench portion which is recessed from the first plane and is disposed adjacent and parallel to the ridge part, and a second trench portion which is recessed from the first plane and is disposed parallel to the ridge part on a side of the ridge part opposite the first trench portion, wherein the first trench portion and the second trench portion each include a first region which is recessed from the first plane by a first distance and a second region which is recessed from the first plane by a second distance which is greater than the first distance.

2. The semiconductor device of claim 1, wherein the light-emitting element is a laser.

3. The semiconductor device of claim 1, wherein the second region of each of the first trench portion and the second trench portion is adjacent to the ridge part.

4. The semiconductor device of claim 1, wherein a difference in the recessed distance between the first region and the second region is between 10 nanometers (nm) and 30 nm.

5. he semiconductor device of claim 1, wherein the light-emitting element further includes a clad layer which includes at least three sub-layers, wherein at least two of the sub-layers have differing etching rates.

6. The semiconductor device of claim 5, wherein a greater number of sub-layers are present in the first region than in the second region.

7. The semiconductor device of claim 1, wherein the first region and the second region are continuous along the ridge axis.

8. The semiconductor device of claim 1, wherein the second region is discontinuous along the ridge axis at intervals.

9. The semiconductor device of claim 1, wherein a dielectric film is disposed along the first plane and surfaces of each of the first trench portion and the second trench portion.

10. The semiconductor device of claim 1, wherein a metal layer is disposed along the first plane and surfaces of each of the first trench portion and the second trench portion.

11. The semiconductor device of claim 1, wherein a transition between the first region and the second region includes a side surface which is orthogonal to the first plane.

12. The semiconductor device of claim 1, wherein a transition between the first region and the second region includes a side surface which has a tapered shape.

13. The semiconductor device of claim 1, wherein the light-emitting element further includes an additional ridge part, a third trench portion is disposed between the ridge part and the additional ridge part, and wherein the second trench portion is adjacent to the additional ridge part.

14. The semiconductor device of claim 13, wherein a distance between the ridge part and the additional ridge part is between 10 nanometers (nm) and 50nm.

15. The semiconductor device of claim 13, wherein a recessed distance of the third trench portion is substantially equal to the second distance.

16. The semiconductor device of claim 1, wherein the block is a submount.

17. The semiconductor device of claim 1, wherein the block is a heat sink.

18. The semiconductor device of claim 1, wherein a cross section of the ridge part includes an eave shape along at least a portion of the ridge part.

19. The semiconductor device of claim 18, wherein the cross section of the ridge part includes an eave shape along a full length of the ridge part.

20. The semiconductor device of claim 1, wherein a contact layer of the ridge part has a greater cross-sectional width than a clad layer of the ridge part.

Images