Data processing method and related apparatus

Abstract

A data processing method, comprising: a processing module of a first computing device generating a first data request on the basis of request-related data stored in a storage space of the processing module; an I / O (input / output) module of the first computing device sending the first data request to a second computing device; when the second computing device fails to respond to the first data request, the processing module generating a second data request on the basis of the request-related data, wherein the second data request is a repeat request for the first data request, and both the second data request and the first data request are requests expressed on the basis of memory semantics; and the I / O module sending the second data request to the second computing device. In the method, the I / O module is not required to generate a repeat request, which can result in a reduced occupancy of storage resources by the I / O module; moreover, both an original request (the first data request) and the repeat request (the second data request) are requests expressed on the basis of memory semantics, which can improve on-chip affinity.

Description

A data processing method and related apparatus

[0001] This application claims priority to Chinese Patent Application No. 202411996902.5, filed with the State Intellectual Property Office of China on December 31, 2024, entitled “A Data Processing Method and Related Apparatus”, the entire contents of which are incorporated herein by reference. Technical Field

[0002] This application relates to the field of communication technology, and in particular to a data processing method, a computer-readable storage medium, and a computer program product. Background Technology

[0003] Interconnection scenarios involving multiple computing devices often result in cross-chip request timeouts or data errors due to cross-optical interconnection and frequent intermittent outages, affecting the normal operation of services. To ensure the normal operation of the system, retransmission is required, but the retransmission mechanism can have a significant impact on system performance and robustness.

[0004] Currently, the mainstream request retransmission technology is mainly based on the Remote Direct Memory Access (RDMA) network protocol. Specifically, the processing module of the computing device can generate the original data request, which can then be sent to other computing devices through the I / O module (e.g., an I / O module). Simultaneously, the I / O module needs to record the context information of the data request. When scenarios affecting system robustness occur, such as packet errors or missing packets, the RDMA-based retransmission mechanism requires the I / O module to generate a retransmission request based on the data request context information. This leads to the following problems:

[0005] The I / O module requires a large amount of on-chip resources to store context information, resulting in significant storage overhead. Furthermore, the semantics of the requests generated by the I / O module differ from those generated by the processing module, leading to low on-chip affinity. Summary of the Invention

[0006] In a first aspect, this application provides a data processing method, comprising: a processing module of a first computing device generating a first data request based on request-related data (e.g., request type, request destination address, etc.) stored in the storage space of the processing module; an I / O (input / output) module of the first computing device sending the first data request to a second computing device; when the second computing device fails to respond to the first data request, the processing module generating a second data request based on the request-related data; the second data request being a retransmission request of the first data request, both the second data request and the first data request being requests based on memory semantics; and the I / O module sending the second data request to the second computing device.

[0007] In this embodiment, both the original request (first data request) and the retransmission request (second data request) are generated by the computing module of the computing device based on the data obtained from the storage space of the processing module, and both requests are based on memory semantics. On the one hand, the I / O module does not need to generate retransmission requests, which can reduce the I / O module's occupation of storage resources. On the other hand, the fact that both the original request (first data request) and the retransmission request (second data request) are based on memory semantics can improve on-chip affinity.

[0008] In one possible implementation, failure to respond to the first data request includes: the response data for the first data request not being received after a timeout, a communication link failure between the first computing device and the second computing device, or the response data for the first data request being erroneous.

[0009] In one possible implementation, the processing module can retrieve the relevant data from the same storage space when generating the original request and the retransmission request, thus eliminating the need for additional storage space to store the data required to generate the request. For example, the processing module can retrieve the requested data from the storage space and generate a first data request based on the requested data; the processing module can also retrieve the requested data from the storage space and generate a second data request based on the requested data.

[0010] In one possible implementation, memory semantics specifically refers to load store semantics.

[0011] In one possible implementation, the second data request carries indication information of the second computing device (e.g., the identifier of the second computing device); the I / O module can send the second data request to the second computing device via unicast based on the indication information of the second computing device.

[0012] In existing technologies, since the retransmission request is generated by the I / O module, and this retransmission request is based on a network protocol expression, it does not support single-point transmission but is sent in the form of broadcast. This leads to some additional communication overhead. However, the request based on memory semantic expression can carry the indication information of the sending destination of the request (e.g., the indication information of the second computing device). Therefore, it can support single-point transmission, that is, send the second data request to the second computing device in a unicast manner, thereby reducing communication overhead.

[0013] In one possible implementation, the method further includes: a processing module generating a third data request; an I / O module sending the third data request to a third computing device; the processing module generating a fourth data request when the second computing device fails to respond to the third data request; the fourth data request being a retransmission request of the third data request, both the third and fourth data requests being requests based on memory semantics; and the I / O module sending the fourth data request to the third computing device in parallel while sending the second data request to the second computing device.

[0014] In this embodiment, only the requests that need to be retransmitted can be retransmitted, so multiple requests that need to be retransmitted can be sent in parallel, thereby reducing the overall time overhead of retransmission requests.

[0015] In existing technologies, when it is determined that a request needs to be retransmitted, all requests following that request are retransmitted. In this embodiment, only the requests that need to be retransmitted are retransmitted, thereby reducing communication overhead. In one possible implementation, the processing module generates a fifth data request; the fifth data request is a request following the first data request; if the second computing device successfully responds to the fifth data request, the processing module does not retransmit the fifth data request.

[0016] In one possible implementation, the processing module is memory, direct memory access (DMA), a memory manager, or a central processing unit. In another possible implementation, the first data request and the second data request are either read requests or write requests.

[0017] In one possible implementation, the method further includes: when the second computing device successfully responds to the first data request, the processing module writes the response data of the second computing device to the first data request into main memory.

[0018] Secondly, this application provides a data processing method, the method comprising: receiving a first data request sent by a first computing device; receiving a second data request sent by the first computing device; the second data request being a retransmission request of the first data request, both the second data request and the first data request being requests based on memory semantics; and sending reply data of the second data request to the first computing device.

[0019] Thirdly, this application provides a system comprising: a first computing device and a second computing device; the first computing device and the second computing device communicating;

[0020] The first computing device is used to perform any of the methods described in the first aspect above;

[0021] The second computing device is used to execute the method described in the second aspect above.

[0022] Fourthly, this application provides a data processing device, including a processing module and an I / O module;

[0023] The processing module is configured to generate a first data request based on request-related data, the request-related data being stored in the storage space of the processing module, and sending the first data request to a second computing device through the I / O module; and to generate a second data request based on the request-related data, the second data request being a retransmission request of the first data request, both the second data request and the first data request being requests based on memory semantics, and sending the second data request to the second computing device through the I / O module.

[0024] In one possible implementation, failure to respond to the first data request includes:

[0025] The response data for the first data request timed out and was not received, the communication link between the first computing device and the second computing device failed, or the response data for the first data request was incorrect.

[0026] In one possible implementation, the first data request is generated based on the requested data retrieved from storage space;

[0027] The processing module is specifically used to: retrieve the requested data from the storage space and generate a second data request based on the requested data.

[0028] In one possible implementation, memory semantics specifically refers to load store semantics.

[0029] In one possible implementation, the second data request carries indication information of the second computing device;

[0030] I / O module, specifically used for:

[0031] Based on the instructions from the second computing device, a second data request is sent to the second computing device via unicast.

[0032] In one possible implementation, the processing module is also used for:

[0033] A third data request is generated and sent to a third computing device via an I / O module. If the second computing device fails to respond to the third data request, a fourth data request is generated. The fourth data request is a retransmission request of the third data request. Both the third and fourth data requests are requests based on memory semantics. The fourth data request is sent to the third computing device in parallel via the I / O module while the second data request is being sent to the second computing device.

[0034] In one possible implementation, the processing module is further configured to: generate a fifth data request; the fifth data request is a request following the first data request;

[0035] The I / O module is also used to prevent the retransmission of the fifth data request if the second computing device successfully responds to the fifth data request.

[0036] In one possible implementation, the processing module is memory, direct memory access (DMA), a memory manager, or a central processing unit. In another possible implementation, the first data request and the second data request are either read requests or write requests.

[0037] In one possible implementation, the processing module is further configured to write the response data of the second computing device to the first data request into main memory when the second computing device successfully responds to the first data request.

[0038] Fifthly, this application provides a data processing apparatus, which may include a memory, a processor, and a bus system, wherein the memory is used to store a program, and the processor is used to execute the program in the memory to perform the methods described in the first aspect above and any optional methods thereof, or the methods described in the second aspect above and any optional methods thereof.

[0039] Sixthly, embodiments of this application provide a computer-readable storage medium storing a computer program that, when run on a computer, causes the computer to perform the methods described in the first aspect and any optional methods thereof, or the methods described in the second aspect and any optional methods thereof.

[0040] In a seventh aspect, embodiments of this application provide a computer program that, when run on a computer, causes the computer to perform the methods described in the first aspect and any optional methods thereof, or the methods described in the second aspect and any optional methods thereof.

[0041] Eighthly, this application provides a chip system including a processor for supporting the implementation of the functions involved in the foregoing aspects, such as transmitting or processing data or information involved in the foregoing methods. In one possible design, the chip system further includes a memory for storing program instructions and data necessary for execution or training devices. This chip system may be composed of chips or may include chips and other discrete devices. Attached Figure Description

[0042] To more clearly illustrate the technical methods of the embodiments of this application, the accompanying drawings used in the embodiments will be briefly described below.

[0043] Figure 1 is a schematic diagram of an application architecture provided in an embodiment of this application;

[0044] Figures 2 to 5 are schematic diagrams of a data processing method provided in an embodiment of this application;

[0045] Figure 6 is a schematic diagram of the structure of a device provided in an embodiment of this application;

[0046] Figure 7 is a schematic diagram of a device provided in an embodiment of this application;

[0047] Figure 8 is a schematic diagram of the structure of a server provided in an embodiment of this application. Detailed Implementation

[0048] The embodiments of this application are described below with reference to the accompanying drawings. The terminology used in the implementation section of this application is for explaining specific embodiments only and is not intended to limit the scope of this application.

[0049] The embodiments of this application will now be described with reference to the accompanying drawings. Those skilled in the art will recognize that, with technological advancements and the emergence of new scenarios, the technical solutions provided in the embodiments of this application are equally applicable to similar technical problems.

[0050] The terms "first," "second," etc., used in the specification, claims, and accompanying drawings of this application are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such terms are interchangeable where appropriate; this is merely a way of distinguishing objects with the same attributes in the embodiments of this application. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion, so that a process, method, system, product, or apparatus that comprises a series of elements is not necessarily limited to those elements, but may include other elements not explicitly listed or inherent to those processes, methods, products, or apparatuses.

[0051] This application provides a data processing method applicable to the implementation environment shown in FIG1. ​​As shown in FIG1, the implementation environment includes at least two devices, such as a first computing device 101 and a second computing device 102. The first computing device 101 and the second computing device 102 are communicatively connected. Exemplarily, the first computing device 101 sends a data request to the second computing device 102, and the second computing device 102 sends a response to the data request to the first computing device 101.

[0052] Optionally, in this embodiment, the first computing device 101 is a data transmission sender or receiver, used to send data requests or receive responses to data requests. The first computing device 101 and the second computing device 102 can be terminals or servers. Terminals can be mobile phones, tablets, computers with wireless transceiver capabilities, personal communication service (PCS) phones, desktop computers, personal digital assistants (PDAs), wearable devices, virtual reality (VR) terminal devices, augmented reality (AR) terminal devices, wireless terminals in industrial control, self-driving, remote medical surgery, smart grids, transportation safety, smart cities, smart homes, etc. Servers can be independent physical servers, server clusters composed of multiple physical servers, or distributed systems, etc.

[0053] The first computing device 101 and the second computing device 102 can be a single chip in a fully packaged server.

[0054] More specifically, the first computing device 101 and the second computing device 102 can be nodes in a large-scale computing cluster. For example, referring to Figure 2, the first computing device 101 and the second computing device 102 can be server nodes. Multiple server nodes can form an AI matrix, an AI matrix can form an AI rack, and an AI rack can form an AI data center.

[0055] In multi-chip interconnected scenarios, data errors, random packet loss, packet corruption, and intermittent physical link (optical module) outages often occur, significantly impacting system robustness. Different types of errors have different characteristics and often require different response strategies.

[0056] Interconnection scenarios involving multiple computing devices often result in cross-chip request timeouts or data errors due to cross-optical interconnection and frequent intermittent outages, affecting the normal operation of services. To ensure the normal operation of the system, retransmission is required, but the retransmission mechanism can have a significant impact on system performance and robustness.

[0057] Currently, the mainstream request retransmission technology is mainly based on the Remote Direct Memory Access (RDMA) network protocol. Specifically, the processing module of the computing device can generate the original data request, which can then be sent to other computing devices through the I / O module (e.g., an I / O module). Simultaneously, the I / O module needs to record the context information of the data request. When scenarios affecting system robustness occur, such as packet errors or missing packets, the RDMA-based retransmission mechanism requires the I / O module to generate a retransmission request based on the data request context information. This leads to the following problems:

[0058] The I / O module requires a large amount of on-chip resources to store context information, resulting in significant storage overhead. Furthermore, the semantics of the requests generated by the I / O module differ from those generated by the processing module, leading to low on-chip affinity.

[0059] To address the aforementioned problems, this application provides a data processing method. Referring to Figure 3, which is a schematic illustration of an embodiment of the data processing method provided by this application, the data processing method provided by this application may include:

[0060] 301. The processing module of the first computing device generates a first data request based on the request-related data; the request-related data is stored in the storage space of the processing module.

[0061] The embodiments of this application can be applied to a first computing device. The first computing unit includes a processing module and an I / O module. The processing module is a memory management unit or a central processing unit. For example, the processing module can be a cache, a cache management unit, a DMA module, or a central processing unit (CPU).

[0062] In this embodiment of the application, when the first computing device needs to read data from or write data to the second computing device, the processing module can receive a data request task and then generate a data request (e.g., a first data request) based on the relevant data of the request task (e.g., request type, device to which the request needs to be sent, etc.).

[0063] 302. The I / O (input / output) module of the first computing device sends a first data request to the second computing device;

[0064] After the processing module generates the first data request, the I / O module can send the first data request to the second computing device. It should be understood that the first data request sent by the I / O module may differ from the first data request generated by the processing module, for example, in terms of encapsulation information.

[0065] 303. When the second computing device fails to respond to the first data request, the processing module generates a second data request based on the data related to the request; the second data request is a retransmission request of the first data request, and both the second data request and the first data request are requests based on memory semantic expression.

[0066] In this embodiment of the application, when the processing module determines that the second computing device has failed to respond to the first data request, it can generate a retransmission request for the first data request (that is, a second data request). Both the second data request and the first data request can be requests based on memory semantics.

[0067] In one possible implementation, the processing module can determine that the first data request needs to be retransmitted based on the following: the response data to the first data request has timed out and not been received; the communication link between the first and second computing devices has failed; or the response data to the first data request is erroneous. This indicates that the second computing device has failed to respond to the first data request. By directly determining the timing of the retransmission request and proactively sending a retransmission request, the efficiency and reliability of the retransmission request are greatly improved. Furthermore, this saves significant area resources for the system's I / O module, preventing it from storing invalid context information.

[0068] Generally speaking, semantics refers to a combination of one or more operations used for interaction in an interconnect, usually defined at the transaction layer. Memory semantics can refer to operations performed by multiple threads on shared memory areas, or to memory access operations, etc.

[0069] For example, memory semantics can also be called semantics based on memory message transfer, and memory semantics can be based on Load / Store semantics. Generally speaking, Load / Store (L / S) instructions are processor core access operations on memory space, including the Load operation, which reads data from memory space into registers within the processor core; and the Store operation, which writes data from registers within the processor core into memory space. In the x86 architecture, the typical instruction for accessing memory space is the MOV instruction; in the ARM architecture, the typical instructions for accessing memory space are LDR / STR. Because a significant amount of space is mapped to memory space, i.e., memory space access instructions are used, Load / Store instructions can access not only actual memory but also other devices and device memory.

[0070] In this embodiment, both the original request (first data request) and the retransmission request (second data request) are generated by the computing module of the computing device, and both requests are based on memory semantics. On the one hand, the I / O module is not required to generate retransmission requests, which can reduce the occupation of storage resources. On the other hand, the fact that both the original request (first data request) and the retransmission request (second data request) are based on memory semantics can improve on-chip affinity.

[0071] In one possible implementation, the processing module can retrieve the relevant data from the same storage space when generating the original request and the retransmission request, thus eliminating the need for additional storage space to store the data required to generate the request. For example, the processing module can retrieve the requested data from the storage space and generate a first data request based on the requested data; the processing module can also retrieve the requested data from the storage space and generate a second data request based on the requested data.

[0072] In one possible implementation, the second data request carries indication information of the second computing device (e.g., the identifier of the second computing device); the I / O module can send the second data request to the second computing device via unicast based on the indication information of the second computing device.

[0073] In existing technologies, since the retransmission request is generated by the I / O module, and this retransmission request is based on a network protocol expression, it does not support single-point transmission but is sent in the form of broadcast. This leads to some additional communication overhead. However, the request based on memory semantic expression can carry the indication information of the sending destination of the request (e.g., the indication information of the second computing device). Therefore, it can support single-point transmission, that is, send the second data request to the second computing device in a unicast manner, thereby reducing communication overhead.

[0074] 304. The I / O module sends a second data request to the second computing device.

[0075] Referring to Figure 4, which illustrates an application architecture of an embodiment of this application, the first computing device can correspond to chip 0 in Figure 4, the second computing device can correspond to chip 1 in Figure 4, and the processing module can be the Master (Process Element) in Figure 4. In the Master-based request retransmission task, the DMA transfer task is directly sent to the Process Element. After receiving the upstream request, the Process Element splits the task and sends the read request to the I / O module. Under normal circumstances, when the Process Element receives correct data, it generates a write request to the HA to complete the data transfer task and releases the queue information to receive the next request after completing the task. If the Process Element (Master) determines that the data is incorrect or that packets are lost due to timeout, the Process Element generates a retransmission request with the same identifier to the I / O module based on the original request information.

[0076] In existing technologies, when it is determined that a request needs to be retransmitted, all requests following that request are retransmitted. In this embodiment, only the requests that need to be retransmitted are retransmitted, thereby reducing communication overhead. In one possible implementation, the processing module generates a fifth data request; the fifth data request is a request following the first data request; if the second computing device successfully responds to the fifth data request, the processing module does not retransmit the fifth data request.

[0077] In one possible implementation, the processing module generates a third data request; the I / O module sends the third data request to a third computing device; when the second computing device fails to respond to the third data request, the processing module generates a fourth data request; the fourth data request is a retransmission request of the third data request, and both the third and fourth data requests are requests based on memory semantics; the I / O module sends the second data request to the second computing device while simultaneously sending the fourth data request to the third computing device.

[0078] In this embodiment, only the requests that need to be retransmitted can be retransmitted, so multiple requests that need to be retransmitted can be sent in parallel, thereby reducing the overall time overhead of retransmission requests.

[0079] The following describes the overall process of a retransmission request in an embodiment of this application. Referring to Figure 5, the Master (Process Element) unit initiates a data transfer request task, which sends a read request to the bus and waits for a response (data return). When the request receives a correct data packet, it is considered that the normal data transfer task is complete. At this point, a write operation is initiated to the DMC to write the transferred data back to main memory, completing the request and ending the task. If a timeout or data error event occurs, triggering the retransmission condition, the Master re-initiates a read request task with the same Transaction ID based on Load / Store instructions. At this time, multiple transactions with the same Transaction ID may be running on the bus. When the Master receives the first correct and valid data, it is considered that the data transfer task is complete. At this point, a write operation is initiated to the DMC to write the transferred data back to main memory. Only the first returned valid data is accepted / written for any request; therefore, subsequent duplicate data is discarded. During this process, if a retransmission request continues to wait for a response timeout or a data error occurs, the Master will continue to re-initiate read requests for the same Txnid based on Load / Store commands until the maximum number of outgoing requests for the same Txnid is exceeded (user-configured). Subsequent duplicate data will extend the cooldown time of that Transaction ID / Entry. If all retransmission requests are used up and the cooldown timeout occurs, the Master module will report an abnormal interruption and clear the task queue to ensure the system does not hang. The Master can release resources when it receives all retransmission data (count of packets). The starting point for measuring the system cooldown time is: 1) if at least one data packet is received, it is the time of receiving the last data packet; 2) if no data packet is received, it is the time of sending the last retry.

[0080] Referring to Figure 6, which is a schematic diagram of an embodiment of a computing device provided in this application, as shown in Figure 6, the computing device 600 provided in this application embodiment may include:

[0081] Processing module 601 and I / O module 602;

[0082] The processing module 601 is configured to generate a first data request based on request-related data, wherein the request-related data is stored in the storage space of the processing module, and send the first data request to a second computing device through the I / O module 602; and generate a second data request based on the request-related data, wherein the second data request is a retransmission request of the first data request, both the second data request and the first data request are requests based on memory semantics, and send the second data request to the second computing device through the I / O module 602.

[0083] The specific description of the processing module 601 can be referred to the actions performed by the processing module in the first computing device in the above embodiment, and the similarities will not be repeated.

[0084] For a detailed description of the I / O module 602, please refer to the actions performed by the I / O module in the first computing device in the above embodiment. The similarities will not be repeated here.

[0085] In one possible implementation, failure to respond to the first data request includes:

[0086] The response data for the first data request timed out and was not received, the communication link between the first computing device and the second computing device failed, or the response data for the first data request was incorrect.

[0087] In one possible implementation, the first data request is generated based on the requested data retrieved from storage space;

[0088] The processing module 601 is specifically used to: retrieve the requested data from the storage space and generate a second data request based on the requested data.

[0089] In one possible implementation, memory semantics specifically refers to load store semantics.

[0090] In one possible implementation, the second data request carries indication information of the second computing device;

[0091] I / O module 602, specifically used for:

[0092] Based on the instructions from the second computing device, a second data request is sent to the second computing device via unicast.

[0093] In one possible implementation, processing module 601 is further configured to:

[0094] A third data request is generated and sent to a third computing device via I / O module 602. If the second computing device fails to respond to the third data request, a fourth data request is generated. The fourth data request is a retransmission request of the third data request. Both the third and fourth data requests are requests based on memory semantics. Simultaneously with the I / O module 602 sending the second data request to the second computing device, the fourth data request is also sent in parallel to the third computing device via the I / O module 602.

[0095] In one possible implementation, processing module 601 is further configured to:

[0096] Generate the fifth data request; the fifth data request is the request following the first data request;

[0097] I / O module 602 is also configured to not retransmit the fifth data request if the second computing device successfully responds to the fifth data request.

[0098] In one possible implementation, the processing module 601 is memory, direct memory access DMA, a memory manager, or a central processing unit.

[0099] In one possible implementation, the first data request and the second data request are either read requests or write requests.

[0100] In one possible implementation, the processing module is further configured to write the response data of the second computing device to the first data request into main memory when the second computing device successfully responds to the first data request.

[0101] It should be understood that the device shown in Figure 6 above is only illustrated by the division of the above-described functional modules. In practical applications, the functions can be assigned to different functional modules as needed, that is, the internal structure of the device can be divided into different functional modules to complete all or part of the functions described above. In addition, the device and method embodiments provided in the above embodiments are based on the same concept, and their specific implementation process can be found in the method embodiments, which will not be repeated here.

[0102] Referring to Figure 7, Figure 7 shows a schematic diagram of the structure of a data processing device 2000 provided in one embodiment of this application. The data processing device 2000 shown in Figure 7 is used to perform the operations involved in the data processing methods shown in Figures 2-4 above. This data processing device 2000 is, for example, a server, a chip, etc.

[0103] As shown in Figure 7, the data processing device 2000 includes at least one processor 2001, a memory 2003, and at least one communication interface 2004.

[0104] The processor 2001 may be a processing module in the embodiments of this application, and the communication interface may be an I / O module in the embodiments of this application.

[0105] Processor 2001 may be, for example, a general-purpose central processing unit (CPU), a digital signal processor (DSP), a network processor (NP), a graphics processing unit (GPU), a neural-network processing unit (NPU), a data processing unit (DPU), a microprocessor, or one or more integrated circuits for implementing the solutions of this application. For example, processor 2001 includes application-specific integrated circuits (ASICs), programmable logic devices (PLDs), or other programmable logic devices, transistor logic devices, hardware components, or any combination thereof. A PLD may be, for example, a complex programmable logic device (CPLD), a field-programmable gate array (FPGA), generic array logic (GAL), or any combination thereof. It can implement or execute the various logic blocks, modules, and circuits described in connection with the embodiments of this application. A processor may also be a combination that implements computational functions, such as including one or more microprocessor combinations, a combination of a DSP and a microprocessor, etc.

[0106] Optionally, the data processing device 2000 also includes a bus. The bus is used to transfer information between the components of the data processing device 2000. The bus can be a peripheral component interconnect (PCI) bus or an extended industry standard architecture (EISA) bus, etc. Buses can be categorized as address buses, data buses, control buses, etc. For ease of illustration, only one thick line is used in Figure 7, but this does not indicate that there is only one bus or one type of bus.

[0107] Memory 2003 may be, for example, read-only memory (ROM) or other types of static storage devices capable of storing static information and instructions; random access memory (RAM) or other types of dynamic storage devices capable of storing information and instructions; electrically erasable programmable read-only memory (EEPROM); compact disc read-only memory (CD-ROM) or other optical disc storage, optical disc storage (including compressed discs, laser discs, optical discs, digital versatile discs, Blu-ray discs, etc.); magnetic disk storage media or other magnetic storage devices; or any other medium capable of carrying or storing desired program code in the form of instructions or data structures and accessible by a computer, but not limited thereto. Memory 2003 may exist independently and be connected to processor 2001 via a bus. Memory 2003 may also be integrated with processor 2001.

[0108] The communication interface 2004 uses any transceiver-like device for communicating with other devices or communication networks, such as Ethernet, radio access network (RAN), or wireless local area networks (WLAN). The communication interface 2004 can include wired and wireless communication interfaces. Specifically, the communication interface 2004 can be an Ethernet interface, a Fast Ethernet (FE) interface, a Gigabit Ethernet (GE) interface, an Asynchronous Transfer Mode (ATM) interface, a WLAN interface, a cellular network communication interface, or a combination thereof. The Ethernet interface can be an optical interface, an electrical interface, or a combination thereof. In this embodiment, the communication interface 2004 can be used by the data processing device 2000 to communicate with other devices.

[0109] In a specific implementation, as one example, processor 2001 may include one or more CPUs, such as CPU0 and CPU1 as shown in FIG7. Each of these processors may be a single-core CPU processor or a multi-core CPU processor.

[0110] In a specific implementation, as one example, the data processing device 2000 may include multiple processors, such as processor 2001 and processor 2005 as shown in FIG7.

[0111] In a specific implementation, as one embodiment, the data processing device 2000 may further include an output device and an input device. The output device communicates with the processor 2001 and can display information in various ways. For example, the output device may be a liquid crystal display (LCD), a light-emitting diode (LED) display device, a cathode ray tube (CRT) display device, or a projector, etc. The input device communicates with the processor 2001 and can receive user input in various ways. For example, the input device may be a mouse, a keyboard, a touchscreen device, or a sensor device, etc.

[0112] In some embodiments, the memory 2003 stores program code 2010 for executing the solution of this application, and the processor 2001 can execute the program code 2010 stored in the memory 2003. That is, the data processing device 2000 can implement the data processing method provided in the method embodiment through the processor 2001 and the program code 2010 in the memory 2003. The program code 2010 may include one or more software modules. Optionally, the processor 2001 itself may also store program code or instructions for executing the solution of this application.

[0113] In a specific embodiment, the data processing device 2000 of this application embodiment may correspond to the first computing device in the above-described method embodiments. The processor 2001 in the data processing device 2000 reads the instructions in the memory 2003, so that the data processing device 2000 shown in FIG7 can perform all or part of the operations performed by the first computing device.

[0114] Other alternative implementation methods will not be described in detail here for the sake of brevity.

[0115] Alternatively, the steps of the data processing method shown in Figures 2-4 can also be completed by the integrated logic circuitry of the hardware in the processor of the data processing device 2000.

[0116] Figure 8 is a schematic diagram of a server structure provided in an embodiment of this application. The server 1100 can vary significantly due to different configurations or performance. It may include one or more processors 1101 and one or more memories 1102. The one or more memories 1102 store at least one computer program, which is loaded and executed by the one or more processors 1101 to enable the server to implement the data processing methods provided in the above-described method embodiments. Of course, the server 1100 may also have wired or wireless network interfaces, a keyboard, and input / output interfaces for input and output. The server 1100 may also include other components for implementing device functions, which will not be elaborated upon here.

[0117] This application also provides a data processing system, which includes a first computing device and a second computing device.

[0118] The data processing methods performed by the first computing device and the second computing device can be found in the relevant descriptions of the embodiments shown in Figures 2-4 above, and will not be repeated here.

[0119] This application also provides a computer-readable storage medium storing at least one instruction, which is loaded and executed by a processor to enable the computer to implement any of the data processing methods described above.

[0120] The computer-readable medium can be any tangible medium that contains or stores programs for or relating to an instruction execution system, apparatus, or device. The machine-readable medium can be a machine-readable signal medium or a machine-readable storage medium. Machine-readable media can include, but is not limited to, electronic, magnetic, optical, electromagnetic, infrared, or semiconductor systems, apparatuses, or devices, or any suitable combination thereof. More detailed examples of machine-readable storage media include electrical connections with one or more wires, portable computer disks, hard disks, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical storage devices, magnetic storage devices, or any suitable combination thereof.

[0121] This application also provides a computer program (product) that, when executed by a computer, causes the processor or computer to perform the corresponding steps and / or processes in the above method embodiments.

[0122] The computer program product includes one or more computer program instructions. As an example, the method of this application embodiment can be described in the context of machine-executable instructions, such as program modules included in a device executing on a real or virtual processor of the target. Generally, program modules include routines, programs, libraries, objects, classes, components, data structures, etc., which perform specific tasks or implement specific abstract data structures. In various embodiments, the functionality of program modules can be combined or divided among the described program modules. The machine-executable instructions for the program module can execute within a local or distributed device. In a distributed device, the program module can reside on both local and remote storage media.

[0123] Computer program code used to implement the methods of the embodiments of this application may be written in one or more programming languages. This computer program code may be provided to a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing apparatus, such that when executed by the computer or other programmable data processing apparatus, the program code causes the functions / operations specified in the flowcharts and / or block diagrams to be implemented. The program code may be executed entirely on a computer, partially on a computer, as a standalone software package, partially on a computer and partially on a remote computer, or entirely on a remote computer or server.

[0124] In the context of the embodiments of this application, computer program code or related data may be carried by any suitable carrier to enable a device, apparatus, or processor to perform the various processes and operations described above. Examples of carriers include signals, computer-readable media, etc.

[0125] Examples of signals may include electrical, optical, radio, sound, or other forms of propagation signals, such as carrier waves, infrared signals, etc.

[0126] This application also provides a chip for performing any of the data processing methods described above.

[0127] Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the specific working processes of the systems, devices, and modules described above can be found in the corresponding processes in the foregoing method embodiments, and will not be repeated here.

[0128] In the embodiments provided in this application, it should be understood that the disclosed systems, devices, and methods can be implemented in other ways. For example, the device embodiments described above are merely illustrative; for instance, the division of modules is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple modules or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the couplings or direct couplings or communication connections shown or discussed may be indirect couplings or communication connections through some interfaces, devices, or modules, or they may be electrical, mechanical, or other forms of connection.

[0129] The modules described as separate components may or may not be physically separate. The components shown as modules may or may not be physical modules; that is, they may be located in one place or distributed across multiple network modules. Some or all of the modules can be selected to achieve the purpose of the embodiments of this application, depending on actual needs.

[0130] Furthermore, the functional modules in the various embodiments of this application can be integrated into one processing module, or each module can exist physically separately, or two or more modules can be integrated into one module. The integrated modules described above can be implemented in hardware or as software functional modules.

[0131] In this application, the terms "first," "second," etc., are used to distinguish identical or similar items with substantially the same function. It should be understood that there is no logical or temporal dependency between "first," "second," and "nth," nor does it limit the quantity or order of execution. It should also be understood that although the following description uses the terms "first," "second," etc., to describe various elements, these elements should not be limited by the terms. These terms are merely used to distinguish one element from another.

[0132] It should also be understood that, in the various embodiments of this application, the sequence number of each process does not imply the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of this application.

[0133] In this application, the term "at least one" means one or more, and the term "multiple" means two or more. The terms "system" and "network" are often used interchangeably.

[0134] It should be understood that the terminology used in the description of the various examples herein is for the purpose of describing particular examples only and is not intended to be limiting. As used in the description of the various examples and the appended claims, the singular forms “a” and “the” are intended to include the plural forms as well, unless the context clearly indicates otherwise.

[0135] It should also be understood that the term “comprising” (also referred to as “includes”, “including”, “comprises” and / or “comprising”) as used in this specification specifies the presence of the stated features, integers, steps, operations, elements, and / or components, but does not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or others.

[0136] It should also be understood that the terms “if” and “if” can be interpreted as meaning “when” or “upon”, or “in response to determination” or “in response to detection”. Similarly, depending on the context, the phrases “if determination…” or “if detection [the stated condition or event]” can be interpreted as meaning “when determination…”, or “in response to determination…”, or “when detection [the stated condition or event]” or “in response to detection [the stated condition or event]”.

[0137] It should be understood that determining B based on A does not mean determining B solely based on A; B can also be determined based on A and / or other information.

[0138] It should also be understood that the phrases "an embodiment," "an embodiment," and "a possible implementation" used throughout the specification mean that a specific feature, structure, or characteristic related to an embodiment or implementation is included in at least one embodiment of this application. Therefore, the phrases "in an embodiment," "an embodiment," or "a possible implementation" appearing throughout the specification do not necessarily refer to the same embodiment. Furthermore, these specific features, structures, or characteristics can be combined in any suitable manner in one or more embodiments.

[0139] The above description is only an optional embodiment of this application and is not intended to limit this application. Any modifications, equivalent substitutions, improvements, etc., made within the principles of this application should be included within the protection scope of this application.

Claims

1. A data processing method, characterized in that, The method includes: The processing module of the first computing device generates a first data request based on the request-related data; the request-related data is stored in the storage space of the processing module. The I / O (input / output) module of the first computing device sends the first data request to the second computing device; When the second computing device fails to respond to the first data request, the processing module generates a second data request based on the data related to the request; the second data request is a retransmission request of the first data request, and both the second data request and the first data request are requests based on memory semantics. The I / O module sends the second data request to the second computing device.

2. The method according to claim 1, characterized in that, The failure to respond to the first data request includes: The response data for the first data request is not received after a timeout, the communication link between the first computing device and the second computing device fails, or the response data for the first data request is incorrect.

3. The method according to claim 1 or 2, characterized in that, The processing module generates a second data request based on the data related to the request, including: The processing module retrieves the request-related data from the storage space and generates a second data request based on the request-related data.

4. The method according to any one of claims 1 to 3, characterized in that, The memory semantics mentioned above specifically refer to load store semantics.

5. The method according to any one of claims 1 to 4, characterized in that, The second data request carries indication information from the second computing device; The I / O module sends the second data request to the second computing device, including: The I / O module sends the second data request to the second computing device via unicast according to the instruction information of the second computing device.

6. The method according to any one of claims 1 to 5, characterized in that, The method further includes: The processing module generates a third data request; The I / O module sends the third data request to the third computing device; When the second computing device fails to respond to the third data request, the processing module generates a fourth data request; the fourth data request is a retransmission request of the third data request, and both the third data request and the fourth data request are requests based on memory semantics. While sending the second data request to the second computing device, the I / O module simultaneously sends the fourth data request to the third computing device.

7. The method according to any one of claims 1 to 6, characterized in that, The method further includes: The processing module generates a fifth data request; the fifth data request is a request following the first data request; If the second computing device successfully responds to the fifth data request, the processing module will not retransmit the fifth data request.

8. The method according to any one of claims 1 to 7, characterized in that, The processing module is memory, direct memory access (DMA), a memory manager, or a central processing unit.

9. The method according to any one of claims 1 to 8, characterized in that, The first data request and the second data request are either read requests or write requests.

10. The method according to any one of claims 1 to 9, characterized in that, The method further includes: When the second computing device successfully responds to the first data request, the processing module writes the response data from the second computing device to the first data request into the main memory.

11. A data processing method, characterized in that, The method includes: Received a first data request sent by the first computing device; A second data request is received from the first computing device; the second data request is a retransmission request of the first data request, and both the second data request and the first data request are requests based on memory semantics. Send the response data of the second data request to the first computing device.

12. A system, characterized in that, include: First computing device and second computing device; The first computing device and the second computing device communicate with each other; The first computing device is used to perform the method according to any one of claims 1 to 10; The second computing device is used to perform the method of claim 11.

13. A computing device, characterized in that, This includes processing modules and I / O modules; The processing module is configured to generate a first data request based on request-related data, the request-related data being stored in the storage space of the processing module, and sending the first data request to a second computing device through the I / O module; and to generate a second data request based on the request-related data, the second data request being a retransmission request of the first data request, both the second data request and the first data request being requests based on memory semantics, and sending the second data request to the second computing device through the I / O module.

14. The device according to claim 13, characterized in that, The failure to respond to the first data request includes: The response data for the first data request is not received after a timeout, the communication link between the first computing device and the second computing device fails, or the response data for the first data request is incorrect.

15. The device according to claim 13 or 14, characterized in that, The processing module is specifically used to: obtain the request-related data from the storage space, and generate a second data request based on the request-related data.

16. The device according to any one of claims 13 to 15, characterized in that, The memory semantics mentioned above specifically refer to load store semantics.

17. The device according to any one of claims 13 to 15, characterized in that, The second data request carries indication information from the second computing device; The I / O module is specifically used for: Based on the instructions from the second computing device, the second data request is sent to the second computing device via unicast.

18. The device according to any one of claims 13 to 17, characterized in that, The processing module is further configured to: A third data request is generated and sent to a third computing device via an I / O module. If the second computing device fails to respond to the third data request, a fourth data request is generated. The fourth data request is a retransmission request of the third data request. Both the third and fourth data requests are requests based on memory semantics. The fourth data request is sent to the third computing device in parallel via the I / O module while the second data request is being sent to the second computing device.

19. The device according to any one of claims 13 to 18, characterized in that, The processing module is further configured to: Generate a fifth data request; the fifth data request is a request following the first data request; The processing module is further configured to not retransmit the fifth data request if the second computing device successfully responds to the fifth data request.

20. The device according to any one of claims 13 to 19, characterized in that, The processing module is memory, direct memory access (DMA), a memory manager, or a central processing unit.

21. The device according to any one of claims 13 to 20, characterized in that, The first data request and the second data request are either read requests or write requests.

22. The device according to any one of claims 13 to 21, characterized in that, The processing module is further configured to write the response data of the second computing device to the first data request into the main memory when the second computing device successfully responds to the first data request.

23. A computer storage medium, characterized in that, The computer storage medium stores one or more instructions, which, when executed by one or more computers, cause the one or more computers to perform the operation of the method according to any one of claims 1 to 11.

24. A computer program product, characterized in that, Includes computer-readable instructions that, when executed on a computer device, cause the computer device to perform the method as described in any one of claims 1 to 11.

25. A system, characterized in that, It includes at least one processor and at least one memory; the processor and the memory are connected via a communication bus and communicate with each other. The at least one memory is used to store code; The at least one processor is used to execute the code to perform the method as described in any one of claims 1 to 11.

26. A chip, characterized in that, It includes at least one processing unit and an interface circuit, the interface circuit being used to provide program instructions or data to the at least one processing unit, the at least one processing unit being used to execute the program instructions to implement the method of any one of claims 1 to 11.

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