Electronic device for displaying content, operation method thereof, and storage medium

Abstract

According to one embodiment, an electronic device (201) may comprise: a display (210); a first memory (221) having a first characteristic; a second memory (223) having a second characteristic different from the first characteristic; an application processor (231) for determining, from among the first memory (221) and the second memory (223), a memory area in which image data corresponding to an application is to be stored; and an offloading processor (233). The offloading processor (233) can be configured to: identify an event for displaying a plurality of objects including a first object and a second object; on the basis of a memory address corresponding to the first object, display, on the display (210), the first object stored on the first memory (221); and, on the basis of a memory address corresponding to the second object, display, on the display (210), the second object stored on the second memory (223).

Description

Electronic device for displaying content, method of operation thereof, and storage medium

[0001] Embodiments of the present disclosure relate to an electronic device for displaying content, and a method of operation and a storage medium thereof.

[0002] Driven by the remarkable advancements in information and communication technology and semiconductor technology, the distribution and use of various electronic devices are increasing rapidly. Electronic devices are being developed to enable users to carry them around and communicate. The term "electronic device" may refer to a device that performs specific functions according to an installed program, such as mobile communication terminals, tablet PCs, video / audio devices, desktop / laptop computers, in-vehicle navigation systems, or wearable devices.

[0003] An electronic device may consist of two aspects: hardware and software. In terms of hardware, the electronic device may include a processor (CPU, or SOC) for the computation and processing of a process, and memory where data for the process is loaded. In terms of software, the electronic device may include an operating system (or kernel) that performs basic system management, and an application that runs on the operating system and executes a process. For example, the processor (CPU) loads data corresponding to the operating system into memory and executes it, and while the operating system is running, loads an application into memory and executes it on the operating system, so that the process is ultimately performed by the execution of the application.

[0004] Recently, as electronic devices provide various services, they can include various applications, and as multiple applications run simultaneously, the management of memory where applications are loaded and executed has also become important. An electronic device includes at least one memory with different operating characteristics.

[0005] According to one embodiment of the present disclosure, an electronic device may include a display, a first memory having a first characteristic, a second memory having a second characteristic different from the first characteristic, an application processor configured to determine a memory area for storing image data corresponding to an application among the first memory or the second memory, and an offloading processor.

[0006] According to one embodiment of the present disclosure, the offloading processor may be configured to check for an event for displaying a plurality of objects including a first object and a second object.

[0007] According to one embodiment of the present disclosure, the offloading processor may be configured to display the first object stored in the first memory through the display based on a memory address corresponding to the first object.

[0008] According to one embodiment of the present disclosure, the offloading processor may be configured to display the second object stored in the second memory through the display based on a memory address corresponding to the second object.

[0009] The above application processor may be configured to determine the memory area based at least partially on the access attributes of the image data.

[0010] The offloading processor may be configured to provide the image data to the display instead of the application processor, at least temporarily, so that the image data is displayed through the display while the electronic device is operating in a power saving mode.

[0011] The application processor may be configured to identify at least one of the size of the image data, a task attribute for the image data, or an access frequency for the image data as an access attribute, determine the first memory as a memory area to store the image data based at least partially on the fact that the access attribute corresponds to a first access frequency, and determine the second memory as a memory area to store the image data based at least partially on the fact that the access attribute corresponds to a second access frequency.

[0012] The offloading processor may be configured to display a plurality of objects corresponding to the image data through the display based on activating the first memory and the second memory when the power saving mode corresponds to a first power saving mode, display the plurality of objects corresponding to the image data through the display based on activating the first memory and deactivating the second memory when the power saving mode corresponds to a second power saving mode, and display the plurality of objects corresponding to the image data through the display based on deactivating the first memory and activating the second memory when the power saving mode corresponds to a third power saving mode.

[0013] The application processor may be configured to store image data corresponding to the set screen in the memory area based on the occurrence of an event for setting the screen displayed in power saving mode, and to provide address information corresponding to the memory area to the offloading processor so that the offloading processor accesses the image data stored in the first memory or the second memory. The first characteristic of the first memory and the second characteristic of the second memory may each (respectively) include a first power consumption characteristic and a second power consumption characteristic different from the first power consumption characteristic, and the application processor may be configured to perform the operation of determining the memory area based at least partially on the first power consumption characteristic or the second power consumption characteristic.

[0014] The application processor may be configured to perform the operation of determining the memory area based further on the first power consumption and the second power consumption, which are estimated to be consumed respectively by the first memory and the second memory in order to access the memory area storing the image data.

[0015] The operating power consumption of the first memory can correspond to the first operating power consumption, and the operating power consumption of the second memory can correspond to a second operating power consumption that is smaller than the first operating power consumption. The idle power consumption of the first memory can correspond to the first idle power consumption, and the idle power consumption of the second memory can correspond to a second idle power consumption that is larger than the first idle power consumption.

[0016] The access speed of the first memory can correspond to the first access speed, and the access speed of the second memory can correspond to a second access speed higher than the first access speed.

[0017] The application processor may form at least a part of the first chip, the offloading processor may form at least a part of the second chip separate from the first chip, the first memory may be placed outside the first chip and the second chip, and the second memory may be placed inside the second chip.

[0018] The above display may further include a display driver integrated circuit (DDI), and the second chip may be formed separately from the DDI.

[0019] The second chip above can form at least a part of a display driver integrated circuit (DDI).

[0020] According to one embodiment of the present disclosure, a method of an electronic device may include an operation of checking an event for displaying a plurality of objects including a first object and a second object by an offloading processor of the electronic device.

[0021] According to one embodiment of the present disclosure, the method may include an operation of displaying the first object stored in the first memory of the electronic device through the display of the electronic device, based on a memory address corresponding to the first object, by the offloading processor.

[0022] According to one embodiment of the present disclosure, the method may include an operation of displaying the second object stored in the second memory of the electronic device through the display, based on a memory address corresponding to the second object, by the offloading processor.

[0023] The above method may further include an operation to determine the memory area based at least partially on the access attributes of the image data by the application processor.

[0024] The above method may further include an operation in which, by means of an offloading processor of the electronic device, the image data is provided to the display instead of the application processor so that the image data is displayed through the display at least temporarily while the electronic device is operating in a power saving mode.

[0025] The above method may further include the operation of storing image data corresponding to a set screen in the memory area based on the occurrence of an event for setting a screen displayed in power saving mode by the application processor, and the operation of providing address information corresponding to the memory area to the offloading processor so that the offloading processor accesses the image data stored in the first memory or the second memory by the application processor.

[0026] According to one embodiment of the present disclosure, a storage medium for storing computer-readable instructions may be provided.

[0027] According to one embodiment of the present disclosure, the instructions may cause the electronic device to perform at least one operation when executed individually or collectively by an application processor including processing circuitry of the electronic device.

[0028] According to one embodiment of the present disclosure, the at least one operation may include an operation to check an event for displaying a plurality of objects including a first object and a second object.

[0029] According to one embodiment of the present disclosure, the at least one operation may include an operation of displaying the first object stored in the first memory of the electronic device through the display of the electronic device based on a memory address corresponding to the first object.

[0030] According to one embodiment of the present disclosure, the at least one operation may include an operation of displaying the second object stored in the second memory of the electronic device through the display based on a memory address corresponding to the second object.

[0031] According to one embodiment of the present disclosure, the electronic device may include a display, a first memory, a second memory, an application processor, and an offloading processor.

[0032] According to one embodiment of the present disclosure, the storage capacity of the second memory may be smaller than the storage capacity of the first memory.

[0033] According to one embodiment of the present disclosure, the application processor may be configured to check information related to the power consumption of the first memory and the second memory.

[0034] According to one embodiment of the present disclosure, the application processor may be configured to identify a memory area in which a plurality of objects displayed in a low-power state are stored among the first memory and the second memory, based on information related to the power consumption of the first memory and the second memory.

[0035] According to one embodiment of the present disclosure, the application processor may be configured to store the plurality of objects in the identified memory area.

[0036] According to one embodiment of the present disclosure, the offloading processor may include an operation of displaying the plurality of objects through the display in the low-power state based on information associated with the stored plurality of objects.

[0037] According to one embodiment of the present disclosure, an electronic device comprises a display, a first memory, a second memory—the storage capacity of the second memory is smaller than the storage capacity of the first memory—an application processor, and an offloading processor. The application processor identifies information related to the power consumption of the first memory and the second memory, and based on the information related to the power consumption of the first memory and the second memory, identifies a memory area in which a plurality of objects displayed in a low-power state are stored among the first memory and the second memory, and is configured to store the plurality of objects in the identified memory area. The offloading processor is configured to display the plurality of objects through the display in a low-power state based on information related to the stored plurality of objects. According to one embodiment of the present disclosure, a method of the electronic device may include an operation of identifying information related to the power consumption of the first memory and the second memory of the electronic device by the application processor of the electronic device.

[0038] According to one embodiment of the present disclosure, the method may include an operation by which the application processor identifies a memory area in which a plurality of objects displayed in a low-power state among the first memory and the second memory are stored, based on information associated with the power consumption of the first memory and the second memory.

[0039] According to one embodiment of the present disclosure, the method may include the operation of storing the plurality of objects in the identified memory area by the application processor.

[0040] According to one embodiment of the present disclosure, the method may be configured to display the plurality of objects through a display of the electronic device in a low-power state, based on information associated with the stored plurality of objects, by an offloading processor of the electronic device.

[0041] According to one embodiment of the present disclosure, a storage medium for storing computer-readable instructions may be provided.

[0042] When the above instructions are executed individually or collectively by an application processor including the processing circuitry of an electronic device, they may cause the electronic device to perform at least one operation.

[0043] According to one embodiment of the present disclosure, the at least one operation may include an operation of checking information related to the power consumption of the first memory of the electronic device and the second memory of the electronic device.

[0044] According to one embodiment of the present disclosure, the at least one operation may include an operation of identifying a memory area in which a plurality of objects displayed in a low-power state among the first memory and the second memory are stored, based on information related to the power consumption of the first memory and the second memory.

[0045] According to one embodiment of the present disclosure, the at least one operation may include the operation of storing the plurality of objects in the identified memory area.

[0046] According to one embodiment of the present disclosure, the at least one operation may include an operation of displaying the plurality of objects through a display of the electronic device in a low-power state based on information associated with the stored plurality of objects.

[0047] FIG. 1 is a block diagram of an electronic device in a network environment according to one embodiment of the present disclosure.

[0048] FIG. 2 is a block diagram illustrating an example of the configuration of an electronic device according to one embodiment of the present disclosure.

[0049] FIG. 3 is a drawing for explaining an example in which at least one processor of an electronic device provides image data stored in memory to a display, according to one embodiment of the present disclosure.

[0050] FIG. 4 is a drawing for explaining a method for managing a memory area in which image data of an electronic device is stored, according to one embodiment of the present disclosure.

[0051] FIG. 5a is a drawing for explaining the operation characteristics of a memory of an electronic device according to one embodiment of the present disclosure.

[0052] FIG. 5b is a drawing for explaining the operation characteristics of a memory of an electronic device according to one embodiment of the present disclosure.

[0053] FIG. 5c is a drawing for explaining the operation characteristics of a memory of an electronic device according to one embodiment of the present disclosure.

[0054] FIG. 6 is a flowchart illustrating a method for displaying a plurality of objects of an electronic device according to one embodiment of the present disclosure.

[0055] FIG. 7 is a drawing for explaining an example in which at least one processor of an electronic device provides image data stored in memory to a display, according to one embodiment of the present disclosure.

[0056] FIG. 8 is a flowchart illustrating a method for providing image data of an electronic device to a display according to one embodiment of the present disclosure.

[0057] FIG. 9 is a drawing for explaining an example in which at least one processor of an electronic device provides image data stored in memory to a display, according to one embodiment of the present disclosure.

[0058] FIG. 10 is a drawing for explaining a method for managing a memory area in which image data of an electronic device is stored, according to one embodiment of the present disclosure.

[0059] FIG. 11a is a drawing for explaining an example in which at least one processor of an electronic device provides image data stored in memory to a display, according to one embodiment of the present disclosure.

[0060] FIG. 11b is a drawing for explaining an example in which at least one processor of an electronic device, according to an embodiment of the present disclosure, provides image data stored in memory to a display.

[0061] FIG. 12 is a flowchart illustrating a method for displaying a plurality of objects of an electronic device according to one embodiment of the present disclosure.

[0062] An embodiment of the present disclosure will be described in detail below with reference to the attached drawings. In describing an embodiment of the present disclosure, if it is determined that a detailed description of related known functions or configurations could unnecessarily obscure the essence of the embodiment, such detailed description will be omitted. Furthermore, the terms described below are defined considering the functions in an embodiment of the present disclosure, and these may vary depending on the intentions or conventions of the user or operator. Therefore, their definitions should be based on the content throughout this specification.

[0063] It should be noted that technical terms used in this specification are used merely to describe specific embodiments and are not intended to limit the embodiments of this disclosure. Alternatively, unless specifically defined otherwise in this specification, technical terms used in this specification shall be interpreted in the sense generally understood by those skilled in the art to which this disclosure pertains, and shall not be interpreted in an overly broad or overly narrow sense. Furthermore, if a technical term used in this specification is an incorrect technical term that fails to accurately express the spirit of this disclosure, it shall be understood as being replaced by a technical term that can be correctly understood by those skilled in the art. Alternatively, general terms used in an embodiment of this disclosure shall be interpreted according to their prior definitions or according to the context, and shall not be interpreted in an overly narrow sense.

[0064] Alternatively, singular expressions used in this specification include plural expressions unless the context clearly indicates otherwise. In this application, terms such as "composed of" or "comprising" should not be interpreted as necessarily including all of the various components or operations described in the specification, and should be interpreted as meaning that some of the components or operations may not be included, or that additional components or operations may be included.

[0065] Alternatively, terms including ordinal numbers, such as first, second, etc., as used herein may be used to describe various components, but said components shall not be limited by said terms. Such terms are used solely for the purpose of distinguishing one component from another. For example, without departing from the scope of the present disclosure, the first component may be named the second component, and similarly, the second component may be named the first component.

[0066] When it is stated that one component is "connected" or "connected" to another component, it may be directly connected or connected to that other component, or there may be other components in between. On the other hand, when it is stated that one component is "directly connected" or "directly connected" to another component, it should be understood that there are no other components in between.

[0067] Hereinafter, an embodiment according to the present disclosure will be described in detail with reference to the attached drawings. Identical or similar components regardless of drawing symbols are given the same reference number, and redundant descriptions thereof will be omitted. Alternatively, in describing an embodiment of the present disclosure, if it is determined that a detailed description of related prior art may obscure the essence of the present disclosure, such detailed description will be omitted. Furthermore, it should be noted that the attached drawings are intended only to facilitate an easy understanding of the concept of the present disclosure and should not be interpreted as limiting the concept of the present disclosure. The concept of the present disclosure should be interpreted as extending to all modifications, equivalents, and substitutions in addition to the attached drawings.

[0068] Hereinafter, in one embodiment of the present disclosure, an electronic device will be described as an example, but the electronic device may be referred to as a terminal, mobile station, mobile equipment (ME), user equipment (UE), user terminal (UT), subscriber station (SS), wireless device, handheld device, or access terminal (AT). Alternatively, in one embodiment of the present disclosure, the electronic device may be a device equipped with communication functions, such as a mobile phone, personal digital assistant (PDA), smartphone, wireless modem, or laptop.

[0069] FIG. 1 is a block diagram of an electronic device (101) in a network environment (100) according to one embodiment of the present disclosure.

[0070] Referring to FIG. 1, in a network environment (100), an electronic device (101) may communicate with an electronic device (102) through a first network (198) (e.g., a short-range wireless communication network) or with at least one of an electronic device (104) or a server (108) through a second network (199) (e.g., a long-range wireless communication network). According to one embodiment, the electronic device (101) may communicate with the electronic device (104) through a server (108). According to one embodiment, the electronic device (101) may include a processor (120), memory (130), input module (150), sound output module (155), display module (160), audio module (170), sensor module (176), interface (177), connection terminal (178), haptic module (179), camera module (180), power management module (188), battery (189), communication module (190), subscriber identification module (196), or antenna module (197). In some embodiments, at least one of these components (e.g., connection terminal (178)) may be omitted from the electronic device (101), or one or more other components may be added. In some embodiments, some of these components (e.g., sensor module (176), camera module (180), or antenna module (197)) may be integrated into a single component (e.g., display module (160)).

[0071] The processor (120) can control at least one other component (e.g., a hardware or software component) of the electronic device (101) connected to the processor (120) by executing software (e.g., a program (140)), and can perform various data processing or operations. According to one embodiment, as at least part of the data processing or operations, the processor (120) can store commands or data received from other components (e.g., a sensor module (176) or a communication module (190)) in volatile memory (132), process the commands or data stored in volatile memory (132), and store the resulting data in non-volatile memory (134). According to one embodiment, the processor (120) may include a main processor (121) (e.g., a central processing unit or an application processor) or an auxiliary processor (123) that can operate independently or together with it (e.g., a graphics processing unit, a neural processing unit (NPU), an image signal processor, a sensor hub processor, or a communication processor). For example, if the electronic device (101) includes a main processor (121) and an auxiliary processor (123), the auxiliary processor (123) may be configured to use less power than the main processor (121) or to be specialized for a designated function. The auxiliary processor (123) may be implemented separately from the main processor (121) or as part thereof.

[0072] The auxiliary processor (123) may control at least some of the functions or states associated with at least one component of the electronic device (101) (e.g., display module (160), sensor module (176), or communication module (190)) on behalf of the main processor (121) while the main processor (121) is in an inactive (e.g., sleep) state, or together with the main processor (121) while the main processor (121) is in an active (e.g., application execution) state. According to one embodiment, the auxiliary processor (123) (e.g., image signal processor or communication processor) may be implemented as part of another functionally related component (e.g., camera module (180) or communication module (190)). According to one embodiment, the auxiliary processor (123) (e.g., neural network processing unit) may include a hardware structure specialized for processing an artificial intelligence model. The artificial intelligence model may be generated through machine learning. Such learning may be performed, for example, on the electronic device (101) itself where the artificial intelligence model is executed, or through a separate server (e.g., server (108)). The learning algorithm may include, for example, supervised learning, unsupervised learning, semi-supervised learning, or reinforcement learning, but is not limited to the examples described above. The artificial intelligence model may include a plurality of artificial neural network layers.An artificial neural network may be a deep neural network (DNN), a convolutional neural network (CNN), a recurrent neural network (RNN), a restricted Boltzmann machine (RBM), a deep belief network (DBN), a bidirectional recurrent deep neural network (BRDNN), a deep Q-network, or a combination of two or more of the above, but is not limited to the examples described above. In addition to the hardware structure, the artificial intelligence model may include a software structure, either additionally or substantially.

[0073] The memory (130) can store various data used by at least one component of the electronic device (101) (e.g., processor (120) or sensor module (176)). The data may include, for example, input data or output data for software (e.g., program (140)) and related commands. The memory (130) may include volatile memory (132) or non-volatile memory (134).

[0074] The program (140) may be stored as software in memory (130) and may include, for example, an operating system (142), middleware (144), or an application (146).

[0075] The input module (150) can receive commands or data to be used for a component of the electronic device (101) (e.g., processor (120)) from outside the electronic device (101) (e.g., user). The input module (150) may include, for example, a microphone, a mouse, a keyboard, a key (e.g., a button), or a digital pen (e.g., a stylus pen).

[0076] The sound output module (155) can output a sound signal to the outside of the electronic device (101). The sound output module (155) may include, for example, a speaker or a receiver. The speaker may be used for general purposes, such as multimedia playback or recording playback. The receiver may be used to receive incoming calls. According to one embodiment, the receiver may be implemented separately from the speaker or as part thereof.

[0077] The display module (160) can visually provide information to an external (e.g., user) of the electronic device (101). The display module (160) may include, for example, a display, a holographic device, or a projector and a control circuit for controlling said device. According to one embodiment, the display module (160) may include a touch sensor configured to detect a touch, or a pressure sensor configured to measure the intensity of the force generated by said touch.

[0078] The audio module (170) can convert sound into an electrical signal or, conversely, convert an electrical signal into sound. According to one embodiment, the audio module (170) can acquire sound through the input module (150) or output sound through the sound output module (155) or an external electronic device (e.g., electronic device (102)) (e.g., speaker or headphones) connected directly or wirelessly to the electronic device (101).

[0079] The sensor module (176) can detect the operating state of the electronic device (101) (e.g., power or temperature) or the external environmental state (e.g., user state) and generate an electrical signal or data value corresponding to the detected state. According to one embodiment, the sensor module (176) may include, for example, a gesture sensor, a gyroscope sensor, a barometric pressure sensor, a magnetic sensor, an accelerometer sensor, a grip sensor, a proximity sensor, a color sensor, an IR (infrared) sensor, a biosensor, a temperature sensor, a humidity sensor, or an illuminance sensor.

[0080] The interface (177) may support one or more specified protocols that can be used for the electronic device (101) to be connected directly or wirelessly to an external electronic device (e.g., electronic device (102)). According to one embodiment, the interface (177) may include, for example, a high definition multimedia interface (HDMI), a universal serial bus (USB) interface, an SD card interface, or an audio interface.

[0081] The connection terminal (178) may include a connector through which the electronic device (101) can be physically connected to an external electronic device (e.g., electronic device (102)). According to one embodiment, the connection terminal (178) may include, for example, an HDMI connector, a USB connector, an SD card connector, or an audio connector (e.g., a headphone connector).

[0082] The haptic module (179) can convert an electrical signal into a mechanical stimulus (e.g., vibration or movement) or an electrical stimulus that can be perceived by the user through tactile or kinesthetic senses. According to one embodiment, the haptic module (179) may include, for example, a motor, a piezoelectric element, or an electric stimulation device.

[0083] The camera module (180) can capture still images and video. According to one embodiment, the camera module (180) may include one or more lenses, image sensors, image signal processors, or flashes.

[0084] The power management module (188) can manage power supplied to the electronic device (101). According to one embodiment, the power management module (188) can be implemented, for example, as at least part of a power management integrated circuit (PMIC).

[0085] The battery (189) can supply power to at least one component of the electronic device (101). According to one embodiment, the battery (189) may include, for example, a non-rechargeable primary battery, a rechargeable secondary battery, or a fuel cell.

[0086] The communication module (190) can support the establishment of a direct (e.g., wired) communication channel or a wireless communication channel between an electronic device (101) and an external electronic device (e.g., electronic device (102), electronic device (104), or server (108)), and the performance of communication through the established communication channel. The communication module (190) may include one or more communication processors that operate independently of the processor (120) (e.g., application processor) and support direct (e.g., wired) communication or wireless communication. According to one embodiment, the communication module (190) may include a wireless communication module (192) (e.g., cellular communication module, short-range wireless communication module, or GNSS (global navigation satellite system) communication module) or a wired communication module (194) (e.g., LAN (local area network) communication module, or power line communication module). The corresponding communication module among these communication modules can communicate with an external electronic device (104) through a first network (198) (e.g., a short-range communication network such as Bluetooth, WiFi (wireless fidelity) direct, or IrDA (infrared data association)) or a second network (199) (e.g., a legacy cellular network, a 5G network, a next-generation communication network, the Internet, or a computer network (e.g., a LAN or WAN)). These various types of communication modules may be integrated into a single component (e.g., a single chip) or implemented as multiple separate components (e.g., multiple chips). The wireless communication module (192) can identify or authenticate the electronic device (101) within a communication network such as the first network (198) or the second network (199) using subscriber information (e.g., International Mobile Subscriber Identifier (IMSI)) stored in the subscriber identification module (196).

[0087] The wireless communication module (192) can support 5G networks and next-generation communication technologies following 4G networks, for example, new radio access technology. NR access technology can support high-speed transmission of high-capacity data (enhanced mobile broadband (eMBB)), minimization of terminal power and connection of multiple terminals (massive machine type communications (mMTC)), or high reliability and low latency (ultra-reliable and low-latency communications (URLLC)). The wireless communication module (192) can support a high-frequency band (e.g., mmWave band) to achieve a high data transmission rate, for example. The wireless communication module (192) can support various technologies for securing performance in the high-frequency band, such as beamforming, massive MIMO (multiple-input and multiple-output), full-dimensional MIMO (FD-MIMO), array antenna, analog beam-forming, or large-scale antenna. The wireless communication module (192) can support various requirements specified in the electronic device (101), external electronic device (e.g., electronic device (104)), or network system (e.g., second network (199)). According to one embodiment, the wireless communication module (192) may support a Peak data rate (e.g., 20 Gbps or more) for eMBB realization, loss coverage (e.g., 164 dB or less) for mMTC realization, or U-plane latency (e.g., downlink (DL) and uplink (UL) each 0.5 ms or less, or round trip 1 ms or less) for URLLC realization.

[0088] An antenna module (197) can transmit a signal or power to or from an external source (e.g., an external electronic device). According to one embodiment, the antenna module (197) may include an antenna comprising a radiator made of a conductor or a conductive pattern formed on a substrate (e.g., a PCB). According to one embodiment, the antenna module (197) may include a plurality of antennas (e.g., an array antenna). In this case, at least one antenna suitable for a communication method used in a communication network, such as a first network (198) or a second network (199), may be selected from the plurality of antennas, for example, by a communication module (190). A signal or power may be transmitted or received between the communication module (190) and an external electronic device through the selected at least one antenna. According to some embodiments, in addition to the radiator, other components (e.g., a radio frequency integrated circuit (RFIC)) may be additionally formed as part of the antenna module (197).

[0089] According to one embodiment, the antenna module (197) may form a mmWave antenna module. According to one embodiment, the mmWave antenna module may include a printed circuit board, an RFIC disposed on or adjacent to a first surface (e.g., bottom surface) of the printed circuit board and capable of supporting a specified high frequency band (e.g., mmWave band), and a plurality of antennas (e.g., array antennas) disposed on or adjacent to a second surface (e.g., top surface or side surface) of the printed circuit board and capable of transmitting or receiving a signal of the specified high frequency band.

[0090] At least some of the above components can be connected to each other via a communication method between peripheral devices (e.g., bus, GPIO (general purpose input and output), SPI (serial peripheral interface), or MIPI (mobile industry processor interface)) and exchange signals (e.g., commands or data) with each other.

[0091] According to one embodiment, commands or data may be transmitted or received between an electronic device (101) and an external electronic device (104) through a server (108) connected to a second network (199). Each of the external electronic devices (102, or 104) may be the same or a different type of device as the electronic device (101). According to one embodiment, all or part of the operations performed on the electronic device (101) may be performed on one or more of the external electronic devices (102, 104, or 108). For example, if the electronic device (101) needs to perform a function or service automatically or in response to a request from a user or another device, the electronic device (101) may request one or more external electronic devices to perform at least part of the function or service instead of performing the function or service itself or additionally. One or more external electronic devices that receive the above request may execute at least part of the requested function or service, or additional function or service related to the request, and transmit the result of the execution to the electronic device (101). The electronic device (101) may provide the result as is or additionally processed as at least part of the response to the request. For this purpose, for example, cloud computing, distributed computing, mobile edge computing (MEC), or client-server computing technology may be used. The electronic device (101) may provide ultra-low latency services using, for example, distributed computing or mobile edge computing. In another embodiment, the external electronic device (104) may include an Internet of Things (IoT) device. The server (108) may be an intelligent server using machine learning and / or neural networks. According to one embodiment, the external electronic device (104) or the server (108) may be included within a second network (199).The electronic device (101) can be applied to intelligent services (e.g., smart home, smart city, smart car, or healthcare) based on 5G communication technology and IoT-related technology.

[0092] FIG. 2 is a block diagram illustrating an example of the configuration of an electronic device (201) (e.g., the electronic device (101) of FIG. 1) according to an embodiment of the present disclosure.

[0093] Referring to FIG. 2, in one embodiment, the electronic device (201) may include a display (210), a first memory (221), a second memory (223), an application processor (231), and an offloading processor (233).

[0094] In one embodiment, the display (210) may be included in the display module (160) of FIG. 1. The display (210) may visually provide image data.

[0095] In one embodiment, the first memory (221) may be included in the memory (130) of FIG. 1. The first memory (221) may be a system memory (e.g., dynamic random access memory (DRAM)) for the operation of the application processor (231) and / or the offloading processor (233). The first memory (221) may be a large-capacity memory for storing data. For example, the capacity of the first memory (221) may be in gigabytes ("GB") (e.g., 1 gigabyte to 64 gigabytes), and there is no limitation on the specific numerical value of the memory capacity. The memory area of ​​the first memory (221) may be divided into a code area, a data area, a stack area, and a heap area. The code area may be a memory area for storing instructions provided to the application processor (231) and / or the offloading processor (233). The data area may be a memory area for allocating variables. The stack area may be a memory area for static allocation. The heap area may be a memory area for dynamic allocation. The first memory (221) may be accessed by the application processor (231). The first memory (221) may be used for data transfer between the application processor (231) and the offloading processor (223). The first memory (221) may also be accessed by the offloading processor (223) in a power saving mode (or "offloading scenario"). The first memory (221) may be used as auxiliary memory for the offloading processor (223).

[0096] In one embodiment, the second memory (223) may be included in the memory (130) of FIG. 1. The second memory (223) may be a system memory (e.g., static random access memory (SRAM)) for the operation of the offloading processor (233) and / or the application processor (231). The second memory (223) may be a low-capacity memory for storing data. For example, the capacity of the second memory (223) may be in megabytes ("MB") (e.g., 1 megabyte to 16 megabytes), and there is no limitation on the specific numerical value of the memory capacity. The memory area of ​​the second memory (223) may be divided into a code area, a data area, a stack area, and a heap area. The second memory (223) may be accessed by the offloading processor (223) in a power saving mode (or, "offloading scenario"). The second memory (223) may be used for data transfer between the offloading processor (223) and the application processor (231). The second memory (223) may be accessed by the application processor (231).

[0097] In one embodiment, the application processor (231) may be included in the main processor (121) of FIG. 1. The application processor (231) may display image data corresponding to the application through the display (210). The image data corresponding to the application may be stored in at least one of the first memory (221) or the second memory (223). The application processor (231) may perform overall operations to determine a memory area to store the image data corresponding to the application among the first memory (221) or the second memory (223). The application processor (231) may include one or more processors to determine a memory area to store the image data corresponding to the application among the first memory (221) or the second memory (223). One or more processors may be operatively connected to the first memory (221) and / or the second memory (223).

[0098] In one embodiment, the offloading processor (233) may be included in the auxiliary processor (123) of FIG. 1. The offloading processor (233) may provide image data to the display (210) instead of the application processor (231) so that the image data is displayed through the display (210) at least temporarily while the electronic device (201) is operating in power saving mode. The offloading processor (233) may perform overall operations to provide image data stored in the first memory (221) and / or the second memory (223) to the display (210) in power saving mode.

[0099] In one embodiment, the electronic device (201) in FIG. 2 is illustrated as including a display (210), a first memory (221), a second memory (223), an application processor (231), and / or an offloading processor (233), but is not limited thereto. The electronic device (201) may further include at least one configuration shown in FIG. 1. For example, the electronic device (201) may further include a power management module (e.g., power management module (188) in FIG. 1) and a battery (e.g., battery (189) in FIG. 1). The power management module and the application processor (231) may be implemented as an integrated system on chip (SoC). The power management module may also be implemented as an integrated circuit different from the application processor (231). The application processor (231) can determine a memory area to store image data corresponding to the application in either the first memory (221) or the second memory (223) based on checking the power consumption (or current consumption) of the first memory (221) and the second memory (223).

[0100] FIG. 3 is a drawing for explaining an example in which at least one processor of an electronic device provides image data stored in memory to a display, according to one embodiment of the present disclosure.

[0101] Referring to FIG. 3, in one embodiment, an electronic device (201) (e.g., the electronic device (101) of FIG. 1 and / or the electronic device (201) of FIG. 2) comprises offloading hardware (340), an application processor (231), a GPU (graphic processing unit) (320), a first memory (221), a DPU (display processing unit) (310), and / or a display (210). The offloading hardware (340) comprises a second memory (223), an M-GPU (mobile graphic processing unit) (343), and / or an offloading processor (233).

[0102] In one embodiment, the first memory (221) may be a system memory for operating an application processor (231) or an auxiliary memory of an offloading processor (233). The second memory (223) may be a system memory for operating an offloading processor (233).

[0103] In one embodiment, the electronic device (201) may further include memory(s) other than the memories (221, 223) shown in FIG. 3. For example, the electronic device (201) may further include a tight-coupled memory (TCM), a pseudo-SRAM (PSRAM), and / or non-volatile memory.

[0104] In one embodiment, the GPU (320) may be configured to support the graphics function of the application processor (231). The M-GPU (343) may be configured to support the graphics function of the offloading processor (233). The power consumed by the M-GPU (343) may be lower than the power consumed by the GPU (320). The M-GPU (343) may draw a screen with a relatively low FPS (frames per second) into the frame buffer.

[0105] In one embodiment, the DPU (310) can synthesize a screen drawn by the GPU (320) or M-GPU (343). Based on synthesizing the image drawn in the frame buffer, the DPU (310) can provide the synthesized image to a display (210) (e.g., OLED (organic light emitting diode), TFT, or LCD (liquid crystal display)) through a display interface.

[0106] In one embodiment, the display interface may be included in the offloading processor (233).

[0107] In one embodiment, the application processor (231) may provide image data to the display (210) based on accessing the first memory (221) (e.g., DRAM). For example, the application processor (231) may control the GPU (320) to draw an image into the frame buffer (331) of the first memory (221). The GPU (320) may update pixel values ​​based on accessing the frame buffer (331). The DPU (310) may display the image data of the frame buffer (331) through the display (210).

[0108] In one embodiment, the application processor (231) may determine a memory area where image data is stored based on the characteristics of the memories (221, 223) and / or the characteristics of the image data. For example, the application processor (231) may store at least a portion of the image data in the first memory (221) and store the remainder of the image data in the second memory (223). The application processor (231) may optimize the current consumed in an offloading scenario by dynamically allocating a memory area where image data is stored based on considering the current consumption characteristics of each of the memories (221, 223) according to system requirements (e.g., FPS and / or memory usage) corresponding to the offloading scenario.

[0109] In one embodiment, the offloading processor (233) (e.g., offloading MCU (micro control unit)) can perform an operation that requires less power than the power consumed by the application processor (231).

[0110] The power consumption of the offloading processor (233) may be lower than the power consumption of the application processor (231). The offloading processor (233) may operate in a power saving mode. An electronic device (e.g., a smartphone or a wearable electronic device) may reduce power consumption by displaying a screen with a relatively simple configuration based on the operation of the offloading processor (233). In power saving mode, the power consumption may be improved as the offloading processor (233), which has relatively low power consumption, is operated.

[0111] The operation of the offloading processor (233) displaying a screen requiring relatively little power through the display (210) may be referred to as "display offloading." The offloading processor (233) may periodically display a screen containing a relatively small number of objects instead of the application processor (231) in an offloading scenario, for example. The screen displayed through the display (210) in power saving mode may contain multiple objects. The addresses of the objects (or image data) displayed on the display (210) may be provided to the offloading processor (233) in the active state of the application processor (231).

[0112] In one embodiment, the screen provided by the offloading processor (233) may include a screen displaying at least one of the current time, a notification, a calendar, or an image. The screen provided by the offloading processor (233) may include a screen displaying user data. The user data may include data associated with user actions of the electronic device (201), such as the number of steps detected based on sensing information from a sensor (e.g., sensor module (176)). The screen provided by the offloading processor (233) may be referred to as an "always on display (AOD) screen" or an "offloading display screen." The offloading processor (233) may display the AOD screen based on the occurrence of an event for displaying the screen.

[0113] In one embodiment, an AOD screen may be displayed based on accessing the first memory (221) and / or the second memory (223) in an offloading processor (233) in a power saving mode (or, "offloading scenario"). When the operating mode of the electronic device (201) is changed from one power saving mode to another power saving mode, the state of at least one configuration shown in FIG. 3 (e.g., active state or inactive state) may be changed.

[0114] In one embodiment, in a first power saving mode, the offloading processor (233) can access both the first memory (221) and the second memory (223). In the first power saving mode, the first memory (221), offloading hardware (340), DPU (310), and display (210) can operate in an active state. In the first power saving mode, the GPU (320) and the application processor (231) can be in an inactive state.

[0115] In one embodiment, in the second power saving mode, the offloading processor (233) can access only the first memory (221). In the second power saving mode, at least some of the DPU (310), display (210), first memory (221), and offloading hardware (340) (e.g., offloading processor (233) and M-GPU (343)) may operate in an active state. In the second power saving mode, the GPU (320), application processor (231), and second memory (223) may be in an inactive state.

[0116] In one embodiment, in the third power saving mode, the offloading processor (233) can access only the second memory (223). In the third power saving mode, the DPU (310), display (210), second memory (223), and offloading hardware (340) can operate in an active state. In the third power saving mode, the GPU (320), application processor (231), and first memory (221) can be in an inactive state.

[0117] In one embodiment, the offloading processor (233) can display image data through the display (210) on behalf of the application processor (231) while the application processor (231) is in an inactive (e.g., sleep) state. The offloading processor (233) can provide image data to the display (210) based on, for example, accessing the first memory (221) and / or the second memory (223) (e.g., SRAM).

[0118] In one embodiment, when image data displayed on an offloading display screen is stored in a second memory (223), the offloading processor (233) can control the M-GPU (343) to draw an image into a frame buffer (341) of the second memory (223). The M-GPU (343) can update pixel values ​​based on accessing the frame buffer (341). The DPU (310) can display the image data of the frame buffer (341) through the display (210).

[0119] In one embodiment, when image data displayed on an offloading display screen is stored in the first memory (221), the offloading processor (233) can control the M-GPU (343) to draw an image into the frame buffer (333) of the first memory (221). The M-GPU (343) can update pixel values ​​based on accessing the frame buffer (333). The DPU (310) can display the image data of the frame buffer (333) through the display (210).

[0120] In one embodiment, when at least a portion of the image data displayed on the offloading display screen is stored in the first memory (221) and the remainder of the image data is stored in the second memory (223), the offloading processor (233) can control the M-GPU (343) to draw images into the frame buffer (333) of the first memory (221) and the frame buffer (341) of the second memory (223). The M-GPU (343) can update pixel values ​​based on accessing the frame buffers (333, 341). The DPU (310) can display the image data of the frame buffers (333, 341) through the display (210).

[0121] In one embodiment, the application processor (231) and the offloading processor (233) may each form at least a portion of different chips. For example, the application processor (231) may form at least a portion of the first chip. The offloading processor (233) may form at least a portion of the second chip (e.g., offloading hardware (340)) which is separate from the first chip.

[0122] In one embodiment, the first memory (221) may be placed outside the first chip and the second chip. The second memory (223) may be placed inside the second chip. In one embodiment, the display (210) may further include a display driver integrated circuit (display driver IC, "DDI"). The second chip, including the offloading processor (233) and the second memory (223), may be formed separately from the DDI.

[0123] In one embodiment, the hardware structure of the electronic device (201) is not limited to that shown in FIG. 3. For example, the second chip may form at least a part of the display driver integrated circuit (DDI).

[0124] FIG. 4 is a drawing for explaining a method for managing a memory area in which image data of an electronic device is stored, according to one embodiment of the present disclosure.

[0125] In one embodiment, the modules implemented (or stored) in the electronic device (201) may be implemented in the form of an application, program, computer code, instructions, routine, process, software, firmware, or a combination of at least two of these, which are executable by an application processor (e.g., the application processor (231) of FIG. 2 or 3) and / or an offloading processor (e.g., the offloading processor (233) of FIG. 2 or 3). For example, when the modules are executed, the application processor and / or the offloading processor may perform an operation corresponding to each of the modules. Accordingly, the description "a specific module performs an operation" below may be understood as "the application processor and / or the offloading processor perform an operation corresponding to the specific module as the specific module is executed." In one embodiment, at least some of the modules may include a plurality of programs, but are not limited to those described. Meanwhile, at least some of the modules may be implemented in a hardware form (e.g., a processing circuit (not shown)). In one embodiment, the modules may be implemented as a service or an application when implemented on an Android operating system.

[0126] In one embodiment, the application processor may include a plurality of modules. The plurality of modules may include offloading resources (411), offloading MCU's binary (412), offloading application (413), offloading platform (414), offloading hardware abstraction layer (HAL) (415), offloading driver (416), memory's power data (417), and / or offloading memory allocator (418). The offloading resources (411) may manage resources displayed on the screen when display offloading is performed.

[0127] In one embodiment, resources used in the offloading scenario may include objects such as images and / or fonts, for example. The offloading MCU binary (412) may manage code executed by the offloading processor. The application processor may load the binary into a set memory and reset the offloading processor prior to the operation of the offloading processor. The offloading processor may perform display offloading by executing the binary.

[0128] In one embodiment, the offloading application (413) may be a user application program based on an application program interface (API) provided by the platform. The offloading application (413) may output the current time and / or a set screen.

[0129] In one embodiment, the offloading platform (414) may provide an API for using the offloading function. The offloading platform (414) may manage information, resources, and / or internal state associated with the offloading function.

[0130] In one embodiment, the offloading application (413) can operate without implementing complex functions based on APIs provided by the offloading platform (414). The offloading HAL (415) can provide abstracted information to the offloading platform (414) based on abstracting the operation of hardware associated with the offloading function. The offloading HAL (415) can reduce the risk of platform fragmentation caused by hardware configuration based on abstracting the hardware. The offloading driver (416) can control hardware used for display offloading operations. For example, the offloading driver (416) can manage hardware including an offloading processor (e.g., offloading hardware (340)). The offloading driver (416) may also manage at least one piece of hardware for communication (e.g., exchange of events and / or data) between the application processor and the offloading processor.

[0131] In one embodiment, memory power data (417) may manage current consumption data associated with the operation of memories (e.g., first memory (221) and second memory (223)). The current consumption data may be data based on variables that affect the current consumption of the memory. Variables that affect the current consumption of the memory may include, for example, memory usage and / or memory access cycles. The current consumption data may be data stored in the electronic device (201). The current consumption data may also be data calculated (or predicted) by the electronic device (201).

[0132] In one embodiment, the offloading memory allocator (418) can relocate memory blocks for display offloading. For example, the offloading memory allocator (418) can classify memory blocks based on the type of memory block. The offloading memory allocator (418) can determine the location of memory blocks by using current consumption data calculated based on memory requirements (e.g., FPS and / or memory size). Location information of memory blocks relocated by the offloading memory allocator (418) (e.g., entry address and / or memory size) can be provided to the offloading processor through the memory map (421). The offloading processor can access image data to be displayed on the display based on referencing the memory blocks relocated by the offloading memory allocator (418).

[0133] In one embodiment, the offloading processor may include a plurality of modules. The plurality of modules may include an offloading engine (422), an offloading rendering engine (423), an offloading display driver (424), an offloading memory manager (425) and / or a memory map (421).

[0134] In one embodiment, the offloading engine (422) can perform various operations for display offloading. The offloading engine (422) may be implemented as a software engine (e.g., an operating system) for display offloading, but is not limited thereto.

[0135] In one embodiment, the offloading rendering engine (423) can perform operations associated with graphics for rendering.

[0136] In one embodiment, the offloading display driver (424) can control at least one hardware used for the display offloading operation. The offloading display driver (424) can process data transmitted through at least one hardware for communication between the application processor and the offloading processor.

[0137] In one embodiment, the offloading memory manager (425) can identify a memory block relocated by an application processor (e.g., offloading memory allocator (418)). For example, the offloading memory manager (425) can convert the information of the memory block to an address accessible by the offloading processor based on reading the address information of the memory block from the memory map (421).

[0138] In one embodiment, the memory map (421) may store location information of objects displayed during a display offloading operation. The offloading processor may access the first memory and / or the second memory based on reading the location information stored in the memory map (421).

[0139] In one embodiment, a display device (431) (e.g., a display module (160) and / or a display (210)) can output an image that is visually recognizable by a user of the electronic device (201) based on a frame buffer (or pixel values ​​contained in the frame buffer) provided by an application processor or an offloading processor. The first type of memory (432) may have different power consumption characteristics than the second type of memory (433).

[0140] In one embodiment, the application processor may determine the memory area of ​​the image data to be displayed in power saving mode based on the power consumption characteristics of the first type of memory (432) and the power consumption characteristics of the second type of memory (433). The application processor may store image data corresponding to the set screen in the memory area based on the occurrence of an event for setting the screen displayed in power saving mode. The application processor may change the memory area of ​​the image data to be displayed in power saving mode (or relocate the location of the memory block) based on confirming user input for changing the screen displayed in power saving mode. The application processor may provide address information corresponding to the memory area to the offloading processor so that the offloading processor can access the image data stored in the first memory (e.g., the first memory (221)) and / or the second memory (e.g., the second memory (223)). The offloading processor can display image data through the display device (431) instead of the application processor based on accessing the first type of memory (432) and / or the second type of memory (433) in power saving mode.

[0141] FIG. 5a is a drawing for explaining the operation characteristics of a memory of an electronic device according to one embodiment of the present disclosure.

[0142] FIG. 5b is a drawing for explaining the operation characteristics of a memory of an electronic device according to one embodiment of the present disclosure.

[0143] FIG. 5c is a drawing for explaining the operation characteristics of a memory of an electronic device according to one embodiment of the present disclosure.

[0144] In one embodiment, the electronic device (201) can optimize the current consumed by the display offloading operation by determining a memory area of ​​image data based on the current consumption characteristics of the memories (e.g., first memory (221) and second memory (223)) included in the electronic device (201). For example, the first characteristic of the first memory may be different from the second characteristic of the second memory. The first characteristic may include a first power consumption characteristic. The second characteristic may include a second power consumption characteristic. The application processor may perform an operation to determine a memory area based at least partially on the first power consumption characteristic or the second power consumption characteristic.

[0145] Referring to FIG. 5a, in one embodiment, the power consumption characteristics (510) (or current consumption characteristics) of the system when using the first memory during a display offloading operation and the power consumption characteristics (520) of the system when using the second memory are shown.

[0146] In one embodiment, the memory capacity of the first memory may be greater than the memory capacity of the second memory. The access speed of the first memory may be slower than the access speed of the second memory. For example, the access speed of the first memory may correspond to the first access speed. The access speed of the second memory may correspond to the second access speed. The second access speed may be higher than the first access speed. The operating speed of the first memory may be slower than the operating speed of the second memory because additional operating time is required due to the dynamic voltage scaling (DVS) operation of the application processor. The peak current of the first memory may be greater than the peak current of the second memory. The power consumption of the second memory may increase due to leakage current when memory usage is relatively high.

[0147] Referring again to FIG. 5a, in one embodiment, the power (P3) (or current) consumed by the electronic device (201) when using the first memory during the run period (511) of the first memory may be greater than the power (P4) (or current) consumed by the electronic device (201) when using the second memory during the run period (521) of the second memory. In terms of power consumption, the operating power consumption of the first memory may correspond to the first operating power consumption. The operating power consumption of the second memory may correspond to the second operating power consumption. The second operating power consumption may be smaller than the first operating power consumption.

[0148] In one embodiment, the power (P2) (or current) consumed by the electronic device (201) when using the second memory during the idle period (523) of the second memory may be greater than the power (P1) consumed by the electronic device (201) when using the first memory during the idle period (513) of the first memory. The idle power consumption of the first memory may correspond to the first idle power consumption. The idle power consumption of the second memory may correspond to the second idle power consumption. The second idle power consumption may be higher than the first idle power consumption.

[0149] Referring to reference numeral 530 in FIG. 5b, in one embodiment, power consumption graphs are shown when the execution period (T1) is relatively long (or when the FPS is low). When the execution period (T1) is relatively long, if the first memory, which has relatively low idle power consumption, is used, the total power consumption of the system may be reduced. For example, the power (P2) (or current) consumed by the second memory during the idle period (533) of the second memory may be higher than the power (P1) (or current) consumed by the first memory during the idle period (531) of the first memory. When the idle period (531, 533) is relatively longer than the execution period (535, 537) within the execution period T1, the use of the first memory may have an advantage in terms of power consumption.

[0150] Referring to reference numeral 540 in FIG. 5b, in one embodiment, power consumption graphs are shown when the execution period (T2) is relatively short (or when the FPS is high). When the execution period (T2) is relatively short, there is a possibility that the total power consumption of the system may be reduced when using a second memory with relatively low operating power consumption. For example, when the execution period T2 is relatively short compared to the execution period T1, the execution intervals (545, 547) may be repeated frequently. When the execution intervals (545, 547) are repeated frequently, the power (P1) (or current) consumed by the first memory during the idle interval (541) of the first memory is lower than the power (P2) (or current) consumed by the second memory during the idle interval (543) of the second memory, but the average power consumption due to the operation of the second memory may be lower than the average power consumption due to the operation of the first memory. In the case where the execution cycle is relatively short, the use of the second memory may have an advantage in terms of power consumption because the power (P4) (or current) consumed by the second memory in the execution period (547) of the second memory is lower than the power (P3) (or current) consumed by the first memory in the execution period (545) of the first memory.

[0151] In one embodiment, an application processor (e.g., application processor (231)) may determine the memory (or memory area) used during a display offloading operation based on memory characteristics (e.g., operating power consumption characteristics and / or idle power consumption characteristics). The application processor may optimize the power consumption of the entire system due to the display offloading operation by dynamically configuring the memory for display offloading based on system requirements (e.g., FPS, memory usage frequency, and / or memory usage).

[0152] Referring to FIG. 5c, in one embodiment, the power consumption characteristics (or current consumption characteristics) of the memory according to the driving FPS during the display offloading operation are illustrated. For example, at a relatively low driving FPS (FPS_low) (555), the power (P1') consumed by the electronic device (201) when using the first memory may be smaller than the power (P2') consumed by the electronic device (201) when using the second memory.

[0153] In one embodiment, the application processor can reduce the total power consumption of the system by allocating image data to the first memory based on determining that a relatively low driving FPS (555) is required in power saving mode. At a relatively high driving FPS (FPS_high) (553), the power (P4') consumed by the electronic device (201) when using the second memory may be less than the power (P3') consumed by the electronic device (201) when using the first memory.

[0154] In one embodiment, the application processor can reduce the total power consumption of the system by allocating image data to the second memory based on confirming that a relatively high driving FPS (553) is required in power saving mode. The application processor can determine a threshold FPS (FPS_Th) (551) based on information related to the current consumption characteristics of the memories. At the threshold FPS (551), the amount of power consumed by the electronic device (201) when using the first memory may correspond to the amount of power consumed by the electronic device (201) when using the second memory.

[0155] In one embodiment, the electronic device (201) may partition the memory required during an offloading operation in accordance with memory characteristics. The electronic device (201) may perform memory configuration (e.g., partitioning) for optimal power consumption implementation based on requirements (e.g., FPS, memory usage frequency, and / or memory usage). The electronic device (201) may minimize the power consumption of the entire system based on dynamic memory configuration optimized for power consumption.

[0156] In one embodiment, the electronic device (201) can reduce the total power consumption of the system compared to when a memory area of ​​image data displayed in power saving mode is allocated regardless of the update cycle (or refresh cycle) of the display screen (e.g., watchface). The application processor can obtain (e.g., calculate) a threshold FPS (551) (or FPS_Th) illustrated in FIG. 5c based on power consumption data resulting from the use of the system's memory (e.g., DRAM and SRAM).

[0157] In one embodiment, the application processor may perform memory partitioning such that it primarily uses the first memory (e.g., DRAM) at FPS lower than the threshold FPS (551) and primarily uses the second memory (e.g., SRAM) at FPS higher than the threshold FPS (551). For example, the application processor may reduce the total power consumption of the system by allocating most of the image data to the first memory based on confirming that the driving FPS (555) (or, FPS_low) (e.g., an update cycle of 60 seconds) required in power saving mode is lower than the threshold FPS. The application processor may reduce the total power consumption of the system by allocating most of the image data to the second memory based on confirming that the driving FPS (e.g., an update cycle of 1 second) (553) (or, FPS_high) required in power saving mode is higher than the threshold FPS.

[0158] FIG. 6 is a flowchart illustrating a method for displaying a plurality of objects of an electronic device according to one embodiment of the present disclosure.

[0159] The embodiment of FIG. 6 will be explained with reference to FIG. 7.

[0160] FIG. 7 is a drawing for explaining an example in which at least one processor of an electronic device provides image data stored in memory to a display, according to one embodiment of the present disclosure.

[0161] In one embodiment, the operations illustrated in FIG. 6 may be performed in various orders, not limited to the order illustrated. For example, the order of each operation may be changed, and at least two operations may be performed in parallel. According to one embodiment, more operations may be performed than those illustrated in FIG. 6, or at least one fewer operation may be performed.

[0162] Referring to FIG. 6, in operation 601, in one embodiment, an electronic device (201) (e.g., offloading processor (233)) may detect an event for displaying a plurality of objects including a first object and a second object. In power saving mode, the electronic device (201) may detect user input for displaying a plurality of objects or detect that a cycle for displaying a plurality of objects has arrived. The event for displaying a plurality of objects is not limited to the examples described above. In one embodiment, the update cycle of the first object may be different from the update cycle of the second object. For example, the update cycle of the first object may be longer than the update cycle of the second object.

[0163] In operation 603, in one embodiment, the electronic device (201) can display a first object stored in a first memory (e.g., first memory (221)) through a display (e.g., display (210)) based on a memory address corresponding to a first object, and display a second object stored in a second memory (e.g., second memory (223)) through a display based on a memory address corresponding to a second object. In one embodiment, the electronic device (201) can check the memory address corresponding to each of a plurality of objects included in a screen displayed in power saving mode.

[0164] Referring to FIG. 7, in one embodiment, in power saving mode, the application processor (231) and GPU (320) may remain in an inactive state.

[0165] In one embodiment, in a power saving mode, the offloading processor (233) may operate in an active state. The offloading processor (233) may check a memory area determined by the application processor (231). Based on checking the memory area, the offloading processor (233) may acquire image data corresponding to the application. The offloading processor (233) may display the acquired image data through the display (210). For example, the offloading processor (233) may display a plurality of objects through the display (210), including a first object stored in the first memory (221) and a second object stored in the second memory (223). For example, due to the current consumption characteristics of the first memory (221), a first object with a relatively long update cycle may be stored in the first memory (221). Due to the current consumption characteristics of the second memory (223), a second object with a relatively short update cycle can be stored in the second memory (223).

[0166] In one embodiment, the offloading processor (233) can display a first object stored in a first memory (221) based on the memory address of a first object through a display (210), and display a second object stored in a second memory (223) based on the memory address of a second object. The offloading processor (233) can optimize the power consumed by the electronic device (201) by performing a display offloading operation based on memory addresses corresponding to the objects.

[0167] FIG. 8 is a flowchart illustrating a method for providing image data of an electronic device to a display according to one embodiment of the present disclosure.

[0168] The embodiment of FIG. 8 will be described with reference to FIG. 9, FIG. 10, FIG. 11a, and FIG. 11b.

[0169] FIG. 9 is a drawing for explaining an example in which at least one processor of an electronic device provides image data stored in memory to a display, according to one embodiment of the present disclosure.

[0170] FIG. 10 is a drawing for explaining a method for managing a memory area in which image data of an electronic device is stored, according to one embodiment of the present disclosure.

[0171] FIG. 11a is a drawing for illustrating an example in which at least one processor of an electronic device provides image data stored in memory to a display, according to an embodiment of the present disclosure.

[0172] FIG. 11b is a drawing for explaining an example in which at least one processor of an electronic device provides image data stored in memory to a display, according to an embodiment of the present disclosure.

[0173] In one embodiment, the operations illustrated in FIG. 8 may be performed in various orders, not limited to the order illustrated. For example, the order of each operation may be changed, and at least two operations may be performed in parallel. According to one embodiment, more operations may be performed than those illustrated in FIG. 8, or at least one fewer operation may be performed.

[0174] Referring to FIG. 8, in operation 801, in one embodiment, an electronic device (201) (e.g., an application processor (231)) may determine a memory area based at least some of the access attributes of the image data. The application processor (231) may identify at least one of the size of the image data, the task attributes for the image data, or the access frequency for the image data as the access attributes.

[0175] Referring to FIG. 9, while the application processor (231) performs the operation of determining a memory area of ​​image data, the offloading processor (233) may remain in an inactive state. The electronic device (201) may determine the first memory (221) as a memory area to store image data based at least partially on the access attribute corresponding to a first access frequency. The electronic device (201) may store image data in the first memory (221), for example, when the driving FPS of the power saving mode (e.g., FPS_low (555) in FIG. 5c) is lower than the threshold FPS (e.g., FPS_Th (551) in FIG. 5c). The electronic device (201) may also store image data in the first memory (221) when the size of the image data is relatively large. The electronic device (201) may determine the second memory (223) as a memory area to store image data based at least partially on the access attribute corresponding to a second access frequency. The electronic device (201) may store image data in the second memory (223) when, for example, the driving FPS of the power saving mode (e.g., FPS_high (553) in FIG. 5c) is higher than the threshold FPS (e.g., FPS_Th (551) in FIG. 5c). The electronic device (201) may also store image data in the second memory (223) when the size of the image data is relatively small.

[0176] In one embodiment, the application processor (231) may perform an operation to determine a memory area based on a first power consumption and a second power consumption that are respectively estimated to be consumed by the first memory (221) and the second memory (223) in order to access a memory area for storing image data. The application processor (231) may store image data in the first memory (221) if the first power consumption estimated to be consumed by the first memory (221) in power saving mode is less than the second power consumption estimated to be consumed by the second memory (223) in power saving mode. The application processor (231) may store image data in the second memory (223) if the second power consumption estimated to be consumed by the second memory (223) in power saving mode is less than the first power consumption estimated to be consumed by the first memory (221) in power saving mode.

[0177] Referring to FIG. 10, in one embodiment, an application processor may store image data (1010) in at least one of a plurality of memories (1020) included in an electronic device (201). The image data (1010) may include data (1011) associated with a frame buffer of offloading hardware (e.g., offloading hardware (340)), data (1012) associated with a heap area of ​​offloading hardware, data (1013) associated with a stack area of ​​offloading hardware, data (1014) associated with a code area of ​​offloading hardware, image data (1015) associated with an hour's hand, image data (1016) associated with a second's hand, and image data (1017) associated with a font, and the specific data included in the image data (1010) is not limited to the examples described above. In FIG. 10, a first memory (221), a second memory (223), and a third memory (1021) are shown as examples of multiple memories (1020) included in an electronic device (201), but are not limited thereto. For example, an application processor may determine a memory area where image data (1010) is to be stored among at least one of the first memory (221) or the second memory (223). An application processor may also determine a memory area where image data (1010) is to be stored among four or more memories.

[0178] In one embodiment, the application processor may secure a memory area required for the display offloading operation before the display offloading operation is performed. The application processor may classify image data (1010) required for the display offloading operation. The application processor may relocate image data (or resources) to the secured memory area so that the offloading processor can access the image data in power saving mode. For example, an offloading memory allocator (e.g., offloading memory allocator (418)) may acquire (1001) information associated with memory attributes and / or image data. Information associated with memory attributes may include information indicating memory attributes such as read-only, write-only, or read / write. Information associated with image data may include information associated with the maximum size of memory required in the display offloading operation, the minimum size of memory, and the access frequency.

[0179] In one embodiment, the offloading memory allocator may obtain information (1003) associated with the memory's current consumption characteristics from memory power data (417). Based on obtaining information associated with memory attributes, information associated with image data, and / or information associated with the memory's current consumption characteristics, the offloading memory allocator may determine a memory area where the image data is physically placed. For example, the offloading memory allocator may determine the first memory (221) as a memory area where the image data (1015) associated with the hour's hands is to be stored, based on the fact that the driving FPS for the image data (1015) associated with the hour's hands is relatively low.

[0180] In one embodiment, the offloading memory allocator may determine the first memory (221) as the memory area where the image data (1017) associated with the font is to be stored, based on the fact that the driving FPS for the image data (1017) associated with the font is relatively low. The offloading memory allocator may determine the second memory (223) as the memory area where the image data (1016) associated with the second's hands is to be stored, based on the fact that the driving FPS for the image data (1016) associated with the second's hands is relatively high. The offloading memory allocator may determine the second memory (223) as the memory area where the data (1011) associated with the frame buffer is to be stored, and there is no specific limitation on the memory area where the data (1011) associated with the frame buffer is to be stored.

[0181] In one embodiment, the offloading memory allocator may determine the third memory (1021) as a memory area where data (1013) associated with the stack area and data (1014) associated with the code area are to be stored, and there are no specific limitations on the memory area where data (1013) associated with the stack area and data (1014) associated with the code area are to be stored. The offloading memory allocator may record (1005) information associated with memory locations and information associated with memory blocks in the memory map (421). The offloading memory allocator may store (1007) data of memory blocks in the determined memory area. The offloading memory allocator may relocate partitioned memory blocks by performing operations to acquire information (1001, 1003) for all memory blocks, to record (1005) in the memory map, and to store (1007) in memory.

[0182] In operation 803, in one embodiment, an electronic device (201) (e.g., an offloading processor (233)) may provide image data to a display (210) instead of an application processor (231) so that image data is displayed through the display (210) at least temporarily while the electronic device (201) is operating in a power saving mode. Power saving modes may be distinguished based on the memory(s) that are activated among the first memory (221) or the second memory (223).

[0183] In one embodiment, when the power saving mode corresponds to the first power saving mode, the electronic device (201) can display a plurality of objects corresponding to image data through the display (210) based on activating the first memory (221) and the second memory (223). For example, as shown in FIG. 7, the offloading processor (233) can provide the first object stored in the first memory (221) and the second object stored in the second memory (223) to the display (210) in the first power saving mode.

[0184] Referring to FIG. 11a, in one embodiment, when the power saving mode corresponds to a second power saving mode, the electronic device (201) can display a plurality of objects corresponding to image data through the display (210) based on activating the first memory (221) and deactivating the second memory (223). For example, when image data for a screen displayed in the power saving mode is stored in the first memory (221), the offloading processor (223) can provide a plurality of objects stored in the first memory (221) to the display (210) in the second power saving mode.

[0185] Referring to FIG. 11b, in one embodiment, when the power saving mode corresponds to a third power saving mode, the electronic device (201) can display a plurality of objects corresponding to image data through the display (210) based on deactivating the first memory (221) and activating the second memory (223). For example, when image data for a screen displayed in the power saving mode is stored in the second memory (223), the offloading processor (223) can provide a plurality of objects stored in the second memory (223) to the display (210) in the second power saving mode.

[0186] FIG. 12 is a flowchart illustrating a method for displaying a plurality of objects of an electronic device according to one embodiment of the present disclosure.

[0187] In one embodiment, the operations illustrated in FIG. 12 may be performed in various orders, not limited to the order illustrated. For example, the order of each operation may be changed, and at least two operations may be performed in parallel. According to one embodiment, more operations may be performed than those illustrated in FIG. 12, or at least one fewer operation may be performed.

[0188] Referring to FIG. 12, in operation 1201, in one embodiment, an electronic device (201) (e.g., application processor (231)) can check information related to the power consumption of the first memory and the second memory. For example, the electronic device (201) can check information related to the power consumption of the memory according to the driving FPS. The second memory may be a memory having a smaller storage capacity than the first memory.

[0189] In operation 1203, in one embodiment, the electronic device (201) can identify a memory area in which a plurality of objects displayed in a low-power state among the first memory and the second memory are stored, based on information related to the power consumption of the first memory and the second memory. The electronic device (201) can determine a memory area corresponding to each of the plurality of objects based on identifying the power predicted to be consumed in a low-power state (or power saving mode). In operation 1205, in one embodiment, the electronic device (201) can store a plurality of objects in the identified memory area.

[0190] In operation 1207, in one embodiment, an electronic device (201) (e.g., an offloading processor (233)) can display a plurality of objects through a display (210) in a low-power state based on information associated with a plurality of stored objects. The electronic device (201) can optimize power consumption by determining a memory area where image data (or data blocks) is stored based on the memory's current consumption characteristics and by displaying the image data in a low-power state.

[0191] According to one embodiment of the present disclosure, an electronic device (e.g., electronic device (201)) may include a display (e.g., display (210)), a first memory having a first characteristic (e.g., first memory (221)), a second memory having a second characteristic different from the first characteristic (e.g., second memory (223)), an application processor (e.g., application processor (231)) configured to determine a memory area for storing image data corresponding to an application among the first memory (221) or the second memory (223), and an offloading processor (e.g., offloading processor (233)).

[0192] According to one embodiment of the present disclosure, the offloading processor (233) may be configured to check for an event to display a plurality of objects including a first object and a second object.

[0193] According to one embodiment of the present disclosure, the offloading processor (233) may be configured to display the first object stored in the first memory (221) through the display (210) based on a memory address corresponding to the first object.

[0194] According to one embodiment of the present disclosure, the offloading processor (233) may be configured to display the second object stored in the second memory (223) through the display (210) based on a memory address corresponding to the second object.

[0195] According to one embodiment of the present disclosure, the application processor (231) may be configured to determine the memory area based at least partially on the access attributes of the image data.

[0196] According to one embodiment of the present disclosure, the offloading processor (233) may be configured to provide the image data to the display (210) instead of the application processor (231) so that the image data is displayed through the display (210), at least temporarily, while the electronic device (201) is operating in a power saving mode.

[0197] According to one embodiment of the present disclosure, the application processor (231) may be configured to check at least one of the size of the image data, the task attribute for the image data, or the access frequency for the image data as the access attribute.

[0198] According to one embodiment of the present disclosure, the application processor (231) may be configured to determine the first memory (221) as a memory area to store the image data, based at least in part on the fact that the access attribute corresponds to a first access frequency.

[0199] According to one embodiment of the present disclosure, the application processor (231) may be configured to determine the second memory (223) as a memory area to store the image data, based at least in part on the fact that the access attribute corresponds to a second access frequency.

[0200] According to one embodiment of the present disclosure, the offloading processor (233) may be configured to display a plurality of objects corresponding to the image data through the display (210) based on activating the first memory (221) and the second memory (223) when the power saving mode corresponds to the first power saving mode.

[0201] According to one embodiment of the present disclosure, the offloading processor (233) may be configured to display the plurality of objects corresponding to the image data through the display (210) based on activating the first memory (221) and deactivating the second memory (223) when the power saving mode corresponds to a second power saving mode.

[0202] According to one embodiment of the present disclosure, the offloading processor (233) may be configured to display the plurality of objects corresponding to the image data through the display (210) based on deactivating the first memory (221) and activating the second memory (223) when the power saving mode corresponds to a third power saving mode.

[0203] According to one embodiment of the present disclosure, the application processor (231) may be configured to store image data corresponding to the set screen in the memory area based on the occurrence of an event for setting the screen displayed in power saving mode.

[0204] According to one embodiment of the present disclosure, the application processor (231) may be configured to provide address information corresponding to the memory area to the offloading processor (233) so that the offloading processor (233) can access the image data stored in the first memory (221) or the second memory (223).

[0205] According to one embodiment of the present disclosure, the first characteristic of the first memory (221) and the second characteristic of the second memory (223) may each (respectively) include a first power consumption characteristic and a second power consumption characteristic different from the first power consumption characteristic.

[0206] According to one embodiment of the present disclosure, the application processor (231) may be configured to perform the operation of determining the memory area based at least partially on the first power consumption characteristic or the second power consumption characteristic.

[0207] According to one embodiment of the present disclosure, the application processor (231) may be configured to perform the operation of determining the memory area based further on the first power consumption and the second power consumption estimated to be consumed, respectively, by the first memory (221) and the second memory (223) in order to access the memory area storing the image data.

[0208] According to one embodiment of the present disclosure, the operating power consumption of the first memory (221) can correspond to the first operating power consumption.

[0209] According to one embodiment of the present disclosure, the operating power of the second memory (223) can correspond to a second operating power that is smaller than the first operating power.

[0210] According to one embodiment of the present disclosure, the idle power consumption of the first memory (221) can correspond to the first idle power consumption.

[0211] According to one embodiment of the present disclosure, the idle power consumption of the second memory (223) can correspond to a second idle power consumption that is higher than the first idle power consumption.

[0212] According to one embodiment of the present disclosure, the access speed of the first memory (221) may correspond to the first access speed.

[0213] According to one embodiment of the present disclosure, the access speed of the second memory (223) may correspond to a second access speed higher than the first access speed.

[0214] According to one embodiment of the present disclosure, the application processor (231) may form at least a portion of the first chip.

[0215] According to one embodiment of the present disclosure, the offloading processor (233) may form at least a portion of a second chip separate from the first chip.

[0216] According to one embodiment of the present disclosure, the first memory (221) may be disposed outside the first chip and the second chip.

[0217] According to one embodiment of the present disclosure, the second memory (223) may be placed inside the second chip.

[0218] According to one embodiment of the present disclosure, the display (210) may further include a display driver integrated circuit (DDI).

[0219] According to one embodiment of the present disclosure, the second chip may be formed separately from the DDI.

[0220] According to one embodiment of the present disclosure, the second chip may form at least a part of a display driver integrated circuit (DDI).

[0221] According to one embodiment of the present disclosure, the electronic device (201) may include a display (210), a first memory (221), a second memory (223), an application processor (231), and an offloading processor (233).

[0222] According to one embodiment of the present disclosure, the storage capacity of the second memory (223) may be smaller than the storage capacity of the first memory (221).

[0223] According to one embodiment of the present disclosure, the application processor (231) may be configured to check information related to the power consumption of the first memory (221) and the second memory (223).

[0224] According to one embodiment of the present disclosure, the application processor (231) may be configured to identify a memory area in which a plurality of objects displayed in a low-power state among the first memory (221) and the second memory (223) are stored, based on information associated with the power consumption of the first memory (221) and the second memory (223).

[0225] According to one embodiment of the present disclosure, the application processor (231) may be configured to store the plurality of objects in the identified memory area.

[0226] According to one embodiment of the present disclosure, the offloading processor (233) may be configured to display the plurality of objects through the display (210) in the low-power state based on information associated with the plurality of stored objects.

[0227] According to one embodiment of the present disclosure, a method of an electronic device (201) may include an operation of confirming an event for displaying a plurality of objects including a first object and a second object by an application processor (231) of the electronic device (201).

[0228] According to one embodiment of the present disclosure, the method may include an operation in which the application processor (231) displays the first object stored in the first memory (221) of the electronic device (201) through the display (210) of the electronic device (201) based on a memory address corresponding to the first object.

[0229] According to one embodiment of the present disclosure, the method may include an operation in which the application processor (231) displays the second object stored in the second memory (223) of the electronic device (201) through the display (210) based on a memory address corresponding to the second object.

[0230] According to one embodiment of the present disclosure, the method may include an operation by which the application processor (231) determines the memory area based at least partially on the access attributes of the image data.

[0231] According to one embodiment of the present disclosure, the method may include an operation in which the image data is provided to the display (210) instead of the application processor (231) by the offloading processor (233) of the electronic device (201) so that the image data is displayed through the display (210) at least temporarily while the electronic device (201) is operating in a power saving mode.

[0232] According to one embodiment of the present disclosure, the method may include an operation of displaying a plurality of objects corresponding to image data through the display (210) based on activating the first memory (221) and the second memory (223) by the offloading processor (233) when the power saving mode corresponds to the first power saving mode.

[0233] According to one embodiment of the present disclosure, the method may include an operation of displaying a plurality of objects corresponding to image data through the display (210) based on activating the first memory (221) and deactivating the second memory (223) by the offloading processor (233) when the power saving mode corresponds to a second power saving mode.

[0234] According to one embodiment of the present disclosure, the method may include an operation of displaying a plurality of objects corresponding to image data through the display (210) based on deactivating the first memory (221) and activating the second memory (223) by the offloading processor (233) when the power saving mode corresponds to a third power saving mode.

[0235] According to one embodiment of the present disclosure, the method may include the operation of storing image data corresponding to a set screen in the memory area based on the occurrence of an event for setting a screen displayed in power saving mode by the application processor (231).

[0236] According to one embodiment of the present disclosure, the method may further include the operation of providing address information corresponding to the memory area to the offloading processor (233) so that the offloading processor (233) can access the image data stored in the first memory (221) or the second memory (223) by the application processor (231).

[0237] According to one embodiment of the present disclosure, the first characteristic of the first memory (221) and the second characteristic of the second memory (223) may each (respectively) include a first power consumption characteristic and a second power consumption characteristic different from the first power consumption characteristic.

[0238] According to one embodiment of the present disclosure, the method may include an operation of determining the memory area by the application processor (231) based at least partially on the first power consumption characteristic or the second power consumption characteristic.

[0239] According to one embodiment of the present disclosure, a storage medium for storing computer-readable instructions may be provided.

[0240] According to one embodiment of the present disclosure, when the instructions are executed individually or collectively by an application processor (231) including processing circuitry of an electronic device (201), the electronic device (201) may cause the electronic device (201) to perform at least one operation.

[0241] According to one embodiment of the present disclosure, the at least one operation may include an operation to check an event for displaying a plurality of objects including a first object and a second object.

[0242] According to one embodiment of the present disclosure, the at least one operation may include an operation of displaying the first object stored in the first memory (221) of the electronic device (201) through the display (210) of the electronic device (201) based on a memory address corresponding to the first object.

[0243] According to one embodiment of the present disclosure, the at least one operation may include displaying the second object stored in the second memory (223) of the electronic device (201) through the display (210) based on the memory address corresponding to the second object.

[0244] An electronic device according to one embodiment disclosed in this document may be of various forms. The electronic device may include, for example, a portable communication device (e.g., a smartphone), a computer device, a portable multimedia device, a portable medical device, a camera, a wearable device, or a consumer electronics device. The electronic device according to the embodiment of this document is not limited to the aforementioned devices.

[0245] The embodiments of this document and the terms used therein are not intended to limit the technical features described in this document to specific embodiments, and should be understood to include various modifications, equivalents, or substitutions of said embodiments. In connection with the description of the drawings, similar reference numerals may be used for similar or related components. The singular form of a noun corresponding to an item may include one or more of said items unless the relevant context clearly indicates otherwise. In this document, phrases such as "A or B," "at least one of A and B," "at least one of A or B," "A, B or C," "at least one of A, B and C," and "at least one of A, B, or C" may each include any one of the items listed together in the corresponding phrase, or all possible combinations thereof. Terms such as "first," "second," or "first" or "second" may be used simply to distinguish said components from other said components and do not limit said components in any other aspect (e.g., importance or order). Where any (e.g., 1st) component is referred to as “coupled” or “connected” to another (e.g., 2nd) component, with or without the terms “functionally” or “communicationly,” it means that said any component may be connected to said other component directly (e.g., via a wire), wirelessly, or through a third component.

[0246] As used in one embodiment of this document, the term “module” may include a unit implemented in hardware, software, or firmware, and may be used interchangeably with terms such as logic, logic block, component, or circuit, for example. A module may be a component formed integrally, or a minimum unit of said component or a part thereof that performs one or more functions. For example, according to one embodiment, a module may be implemented in the form of an application-specific integrated circuit (ASIC).

[0247] One embodiment of the present document may be implemented as software (e.g., program (140)) comprising one or more instructions stored in a storage medium (e.g., internal memory (136) or external memory (138)) readable by a machine (e.g., electronic device (101)). For example, a processor (e.g., processor (120)) of the machine (e.g., electronic device (101)) may call at least one of the one or more instructions stored in the storage medium and execute it. This enables the machine to be operated to perform at least one function according to the at least one called instruction. The one or more instructions may include code generated by a compiler or code that can be executed by an interpreter. The storage medium readable by the machine may be provided in the form of a non-transitory storage medium. Here, 'non-temporary' simply means that the storage medium is a tangible device and does not contain a signal (e.g., electromagnetic waves), and the term does not distinguish between cases where data is stored semi-permanently and cases where it is stored temporarily.

[0248] According to one embodiment, the method according to one embodiment disclosed herein may be provided by being included in a computer program product. The computer program product may be traded between a seller and a buyer as a product. The computer program product may be distributed in the form of a device-readable storage medium (e.g., compact disc read-only memory (CD-ROM)) or an application store (e.g., Play Store). TM It can be distributed online (e.g., downloaded or uploaded) through ) or directly between two user devices (e.g., smartphones). In the case of online distribution, at least a portion of the computer program product may be temporarily stored or temporarily created on a device-readable storage medium, such as the memory of a manufacturer's server, an application store's server, or a relay server.

[0249] According to one embodiment, each component (e.g., module or program) of the components described above may include a singular or multiple entities, and some of the multiple entities may be separated and placed in other components. According to one embodiment, one or more of the components or operations among the aforementioned components may be omitted, or one or more other components or operations may be added. Generally or additionally, multiple components (e.g., module or program) may be integrated into a single component. In this case, the integrated component may perform one or more functions of each of the multiple components in the same or similar manner as those performed by the corresponding component among the multiple components prior to integration. According to one embodiment, operations performed by the module, program, or other components may be executed sequentially, in parallel, iteratively, or heuristically, or one or more of the operations may be executed in a different order, omitted, or one or more other operations may be added.

[0250] In addition, the structure of the data used in the above-described embodiment of the present invention may be recorded on a computer-readable recording medium through various means. The computer-readable recording medium includes storage media such as magnetic storage media (e.g., ROM, floppy disk, hard disk, etc.) and optical reading media (e.g., CD-ROM, DVD, etc.).

[0251] The present invention has been described above with reference to its preferred embodiments. Those skilled in the art will understand that the present invention may be embodied in modified forms without departing from the essential characteristics of the invention. Therefore, the disclosed embodiments should be considered in an illustrative rather than a restrictive sense. The scope of the invention is defined by the claims, not by the foregoing description, and all variations within the scope of the claims should be interpreted as being included in the invention.

Claims

1. In an electronic device (201), Display (210); A first memory (221) having a first characteristic; A second memory (223) having a second characteristic different from the first characteristic above; An application processor (231) configured to determine a memory area for storing image data related to the application; and Includes an offloading processor (233), The above offloading processor (233) is: Checking an event for displaying a plurality of objects including a first object and a second object on the display (210), and Based on the memory address associated with the first object stored in the first memory (221), the first object is displayed through the display (210), and An electronic device (201) configured to display the second object through the display (210) based on a memory address associated with the second object stored in the second memory (223).

2. In Paragraph 1, The application processor (231) is an electronic device (201) configured to determine the memory area based at least some of the access attributes of the image data.

3. In Paragraph 1 or 2, The above offloading processor (233) is: An electronic device (201) configured to provide the image data to the display (210) instead of the application processor (231) so that the image data is displayed through the display (210) at least temporarily while the electronic device (201) is operating in a power saving mode.

4. In any one of paragraphs 1 to 3, The above application processor (231) is: Identify at least one of the size of the image data, the task attribute for the image data, or the access frequency for the image data as the access attribute, and Based at least partially on the fact that the above access attribute corresponds to a first access frequency, the first memory (221) is determined as a memory area to store the image data, and An electronic device (201) configured to determine the second memory (223) as a memory area to store the image data, based at least in part on the fact that the above access attribute corresponds to a second access frequency.

5. In any one of paragraphs 1 to 4, The above offloading processor (233) is: When the above power saving mode corresponds to the first power saving mode, based on activating the first memory (221) and the second memory (223), a plurality of objects corresponding to the image data are displayed through the display (210), and When the above power saving mode corresponds to a second power saving mode, based on activating the first memory (221) and deactivating the second memory (223), the plurality of objects corresponding to the image data are displayed through the display (210), and An electronic device (201) configured to display the plurality of objects corresponding to the image data through the display (210) based on deactivating the first memory (221) and activating the second memory (223) when the above power saving mode corresponds to the third power saving mode.

6. In any one of paragraphs 1 to 5, The above application processor (231) is: Based on the occurrence of an event for setting the screen displayed in power saving mode, image data corresponding to the set screen is stored in the memory area, and An electronic device (201) configured to provide address information corresponding to the memory area to the offloading processor (233) so that the offloading processor (233) accesses the image data stored in the first memory (221) or the second memory (223).

7. In any one of paragraphs 1 through 6, The first characteristic of the first memory (221) and the second characteristic of the second memory (223) respectively include a first power consumption characteristic and a second power consumption characteristic different from the first power consumption characteristic; and The above application processor (231) is: An electronic device (201) configured to perform the operation of determining the memory area based at least partially on the first power consumption characteristic or the second power consumption characteristic.

8. In any one of paragraphs 1 through 7, The above application processor (231) is: An electronic device (201) configured to perform the operation of determining the memory area, further based on the first power consumption and the second power consumption estimated to be consumed respectively by the first memory (221) and the second memory (223) in order to access the memory area storing the image data.

9. In any one of paragraphs 1 through 8, The operating power consumption of the first memory (221) corresponds to the first operating power consumption, and The electronic device (201) whose operating power consumption of the second memory (223) corresponds to a second operating power consumption that is smaller than the first operating power consumption.

10. In any one of paragraphs 1 through 9, The idle power consumption of the first memory (221) corresponds to the first idle power consumption, and The electronic device (201) whose idle power consumption of the second memory (223) corresponds to a second idle power consumption greater than the first idle power consumption.

11. In any one of paragraphs 1 through 10, The access speed of the first memory (221) corresponds to the first access speed, and The electronic device (201) wherein the access speed of the second memory (223) corresponds to a second access speed higher than the first access speed.

12. In any one of paragraphs 1 to 11, The above application processor (231) forms at least a part of the first chip, and The offloading processor (233) forms at least a part of a second chip separate from the first chip, and The first memory (221) is disposed outside the first chip and the second chip, and The second memory (223) is an electronic device (201) placed inside the second chip.

13. In any one of paragraphs 1 through 12, The above display (210) further includes a display driver integrated circuit (DDI), and The above second chip is an electronic device (201) formed separately from the above DDI.

14. In the method of the electronic device (201), An operation to confirm an event for displaying a plurality of objects including a first object and a second object by the offloading processor (233) of the electronic device (201); The operation of displaying the first object stored in the first memory (221) of the electronic device (201) through the display (210) of the electronic device (201) based on the memory address corresponding to the first object by the offloading processor (233); and The operation of displaying the second object stored in the second memory (223) of the electronic device (201) through the display (210) based on the memory address corresponding to the second object by the offloading processor (233). A method including 15. In a storage medium for storing computer-readable instructions, When the above instructions are executed individually or collectively by an application processor (231) including the processing circuitry of the electronic device (201), they cause the electronic device (201) to perform at least one operation: The above at least one operation is: An operation to check for an event to display a plurality of objects including a first object and a second object; An operation of displaying the first object stored in the first memory (221) of the electronic device (201) through the display (210) of the electronic device (201) based on the memory address associated with the first object; and An electronic device (201) comprising the operation of displaying the second object stored in the second memory (223) of the electronic device (201) through the display (210) based on the memory address associated with the second object.

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