Display module, display device, and display driving method
Patent Information
- Application Number
- PCT/CN2025/078641
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2025-02-21
- Publication Date
- 2026-08-27
Smart Images
Figure CN2025078641_27082026_PF_FP_ABST
Abstract
Description
Display module, display device, and display driving method Technical Field
[0001] This disclosure relates to the field of display technology, and in particular to a display module, display device, and display driving method. Background Technology
[0002] Thin-film transistor liquid crystal displays (TFT-LCDs) are characterized by their light weight, thinness, and low power consumption, and are widely used in devices such as mobile phones, monitors, and televisions. After TFT-LCDs entered the television market dominated by CRTs, the requirements for the dynamic image display quality and response speed of liquid crystal displays became more stringent.
[0003] Overview
[0004] This disclosure provides a display module, including:
[0005] The display panel includes multiple display zones arranged along the scanning direction, wherein the multiple display zones include a first display zone and a second display zone;
[0006] A backlight source, located on the backlight side of the display panel, is configured to provide backlight to the display panel; and
[0007] The driving circuit, which is connected to the plurality of display zones and the backlight respectively, is configured to provide a pulse signal to the backlight in a first display mode and to perform overshoot driving on the plurality of display zones, wherein the overshoot rate of the first display zone is different from the overshoot rate of the second display zone, and the overshoot rate is the proportion of the actual driving value of the display zone deviating from the target driving value.
[0008] In some embodiments, the first display partition and the second display partition are arranged sequentially along the scanning direction, and the overshoot rate of the second display partition is greater than the overshoot rate of the first display partition.
[0009] In some embodiments, the overshoot rate of multiple display zones in the display panel increases sequentially along the scanning direction.
[0010] In some embodiments, the plurality of display partitions further includes: a third display partition located on the side of the second display partition away from the first display partition, wherein the overshoot rate of the third display partition is less than the overshoot rate of the second display partition; or
[0011] The fourth display partition is located on the side of the first display partition that is far from the second display partition, and the overshoot rate of the fourth display partition is greater than that of the first display partition.
[0012] In some embodiments, a display cycle of the display panel includes a refresh phase and a hold phase, and the effective pulse of the pulse signal is located within the time range of the hold phase; and
[0013] Along the scanning direction, the overshoot rate of multiple display zones in the display panel increases sequentially.
[0014] In some embodiments, the plurality of display zones further includes a fifth display zone and a sixth display zone arranged sequentially along the scanning direction, wherein the effective pulse of the pulse signal overlaps with the refresh of the fifth display zone but does not overlap with the refresh of the sixth display zone; and
[0015] The overshoot rate of the fifth display partition is greater than that of the sixth display partition, and along the scanning direction, the overshoot rate of the sixth display partition and at least one display partition located on the side of the sixth display partition away from the fifth display partition increases sequentially.
[0016] In some embodiments, the display panel includes multiple display units, each display unit including the same number of display partitions, and the multiple display partitions in each display unit are sorted along the scanning direction, with the overshoot rate of the display partitions with the same sequence number in different display units being approximately the same.
[0017] In some embodiments, a display cycle of the display panel includes a refresh phase and a hold phase. When the refresh frequency of the display panel is a first refresh frequency, a display cycle of the display panel includes a first refresh phase and a first hold phase. The pulse signal includes a first pulse signal, and the duty cycle of the first pulse signal is less than or equal to the duration of the first hold phase in a display cycle.
[0018] In some embodiments, when the refresh rate of the display panel is a second refresh rate and the second refresh rate is less than the first refresh rate, the pulse signal further includes:
[0019] The second pulse signal includes a second effective pulse, the first pulse signal includes a first effective pulse, the duty cycle of the second effective pulse is the same as the duty cycle of the first effective pulse, and the duration of one second effective pulse is the same as the duration of one first effective pulse.
[0020] In some embodiments, the second pulse signal further includes a third effective pulse, the duty cycle of which is the same as that of the first effective pulse, and the duration of one third effective pulse is less than the duration of one first effective pulse.
[0021] In some implementations, the first effective pulse overlaps with the first display cycle, and the start time of the first effective pulse is delayed by a first preset duration relative to the start time of the first display cycle.
[0022] The second valid pulse overlaps with the second display cycle, and the start time of the second valid pulse is delayed by the first preset duration relative to the start time of the second display cycle;
[0023] The start time of the third effective pulse adjacent to the second effective pulse is delayed by a second preset duration relative to the start time of the second effective pulse, and the second preset duration is equal to the duration of the first display cycle.
[0024] In some implementations, the first valid pulse overlaps with the first refresh phase;
[0025] The second display cycle includes a second refresh phase and a second hold phase, the second valid pulse overlaps with the second refresh phase, and the third valid pulse overlaps with the second hold phase.
[0026] In some implementations, the first effective pulse overlaps with the first hold phase;
[0027] The second display cycle includes a second refresh phase and a second hold phase, and the second effective pulse and the third effective pulse overlap with the second hold phase.
[0028] In some implementations, the first valid pulse is located within the time range of the first hold phase, and the second valid pulse and the third valid pulse are both located within the time range of the second hold phase.
[0029] In some implementations, the duty cycle of the first pulse signal is equal to the proportion of the duration of the first hold phase in a display cycle;
[0030] When the refresh rate of the display panel is a third refresh rate, one display cycle of the display panel includes a third refresh phase and a third hold phase. The pulse signal also includes a third pulse signal, the duty cycle of which is equal to the proportion of the duration of the third hold phase in one display cycle.
[0031] The third refresh frequency is different from the first refresh frequency, the third refresh phase has the same duration as the first refresh phase, and the third hold phase has a different duration than the first hold phase.
[0032] In some implementations, the duty cycle of the first pulse signal is less than the duration of the first hold phase in a display cycle.
[0033] The first pulse signal includes a first valid pulse, which is located within the time range of the first hold phase. The duration of the first valid pulse is less than the duration of the first hold phase, and the end time of the first valid pulse is the same as the end time of the first hold phase.
[0034] In some implementations, when the first refresh frequency is greater than or equal to the first threshold, the frequency of the first pulse signal is equal to the first refresh frequency; when the first refresh frequency is less than the first threshold, the frequency of the first pulse signal is greater than the first refresh frequency and less than or equal to ten times the first refresh frequency.
[0035] In some embodiments, the frequency of the pulse signal is greater than or equal to 200 Hz and less than or equal to 25 kHz.
[0036] In some embodiments, the backlight source includes a light-emitting diode (LED) using non-KSF phosphor.
[0037] In some embodiments, the driving circuit includes a timing controller configured to receive a display command, and if the command indicates entry into the first display mode, to provide a pulse signal to the backlight and perform overshoot driving on a plurality of display zones, wherein the overshoot rate of the first display zone is different from that of the second display zone; if the display command indicates entry into the second display mode, to provide a DC signal to the backlight and perform overshoot driving on a plurality of display zones, wherein the overshoot rate of different display zones is the same.
[0038] This disclosure provides a display device, including a display module as described in any of the above.
[0039] This disclosure provides a display driving method applied to a display module, the display module including a display panel and a backlight, the display panel including a plurality of display zones arranged along a scanning direction, the plurality of display zones including a first display zone and a second display zone; the display driving method includes:
[0040] Get the display command;
[0041] If the display command indicates entry into the first display mode, a pulse signal is provided to the backlight and overshoot driving is performed on the multiple display zones. The overshoot rate of the first display zone is different from the overshoot rate of the second display zone. The overshoot rate is the proportion of the actual driving value of the display zone deviating from the target driving value.
[0042] In some embodiments, after the step of obtaining the display instruction, the display driving method further includes:
[0043] If the display command indicates entry into the second display mode, a DC signal is provided to the backlight and overshoot drive is performed on multiple display zones, with the overshoot rate being the same for different display zones.
[0044] The above description is merely an overview of the technical solution disclosed herein. In order to better understand the technical means of this disclosure and to implement it in accordance with the contents of the specification, and to make the above and other objects, features and advantages of this disclosure more apparent and understandable, specific embodiments of this disclosure are described below.
[0045] Brief description of the attached diagram
[0046] To more clearly illustrate the technical solutions in the embodiments or related technologies of this disclosure, the accompanying drawings used in the description of the embodiments or related technologies will be briefly introduced below. Obviously, the accompanying drawings described below are some embodiments of this disclosure. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort. It should be noted that the scale in the drawings is for illustration only and does not represent the actual scale.
[0047] Figure 1 illustrates a schematic diagram of a display partition structure in a display panel;
[0048] Figure 2 illustrates an exemplary schematic diagram of a display partition structure in another display panel;
[0049] Figure 3 illustrates, for example, a curve showing the change in the driving value of a display partition;
[0050] Figure 4 illustrates, for example, the actual drive value lookup table and the target drive value lookup table;
[0051] Figure 5 illustrates an exemplary timing diagram of the first pulse signal and the second pulse signal;
[0052] Figure 6 illustrates another timing diagram of the first pulse signal and the second pulse signal;
[0053] Figure 7 illustrates the timing diagrams of the first and third pulse signals;
[0054] Figure 8 illustrates an exemplary timing diagram of the first pulse signal;
[0055] Figure 9 illustrates, by way of example, a schematic diagram of the structure of a display unit in a display panel;
[0056] Figure 10 illustrates a schematic diagram of the connection structure of two display modules;
[0057] Figure 11 illustrates, for example, the timing diagram of the display mode command and pulse signal.
[0058] Detailed description
[0059] To make the objectives, technical solutions, and advantages of the embodiments of this disclosure clearer, the technical solutions of the embodiments of this disclosure will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this disclosure, and not all embodiments. Based on the embodiments of this disclosure, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this disclosure.
[0060] As refresh rates continue to increase, users' demands for display quality are becoming increasingly stringent. Game consoles generally require overdrive (OD) technology to reduce the response time of the display panel. OD technology works by changing the driving voltage during grayscale changes in the display panel, increasing the torque on the liquid crystal molecules, accelerating their rotation, and forcing them to change their alignment to a predetermined transmittance within a short time. This improves response speed, reduces response time, and minimizes motion blur.
[0061] This disclosure provides a display module, as shown in FIG10. The display module includes: a display panel PNL, as shown in FIG1 or FIG2, the display panel PNL including a plurality of display partitions A0 arranged along the scanning direction fs, the plurality of display partitions A0 including a first display partition A01 and a second display partition A02; a backlight BL, located on the backlight side of the display panel PNL (i.e. the side away from the light-emitting surface), configured to provide backlight to the display panel PNL; and a driving circuit DR, connected to the plurality of display partitions A0 and the backlight BL of the display panel PNL respectively, configured to provide a pulse signal to the backlight BL in a first display mode and perform overshoot driving on the plurality of display partitions A0, wherein the overshoot rate of the first display partition A01 is different from the overshoot rate of the second display partition A02, and the overshoot rate is the proportion of the actual driving value of the display partition A0 deviating from the target driving value.
[0062] Overshoot includes overshoot and undershoot. As shown in Figure 3, overshoot occurs when a pixel changes from a darker grayscale to a brighter grayscale, and the actual driving value provided to the pixel is greater than the target driving value, thus reducing the response time during the rising phase. Overshoot rate = (actual driving value - target driving value) / target driving value. Undershoot occurs when a pixel changes from a brighter grayscale to a darker grayscale, and the actual driving value provided to the pixel is less than the target driving value, thus reducing the response time during the falling phase. Undershoot rate = (target driving value - actual driving value) / target driving value. It should be noted that both overshoot rate and undershoot rate are positive values, i.e., overshoot rate / undershoot rate = |target driving value - actual driving value| / target driving value.
[0063] Figure 4 illustrates the actual driving value lookup table and the target driving value lookup table. As shown in Figure 4a, the first row of the actual driving value lookup table represents the grayscale data of the current frame, and the first column represents the grayscale data of the previous frame. The actual driving value lookup table records the actual driving values corresponding to the change from the grayscale data of the previous frame to the grayscale data of the current frame. Each actual driving value is related to the grayscale data of the previous frame and the grayscale data of the current frame, and can be obtained through calculation or experimentation. For example, for a certain pixel, if the grayscale data of the previous frame is L1 and the grayscale data of the current frame is L254, the intersection of row L1 and column L254 in the actual driving value lookup table can be found to obtain the actual driving value a(1,254) corresponding to the change from grayscale L1 to grayscale L254.
[0064] As shown in Figure 4b, the first row of the target driving value lookup table represents the grayscale data of the current frame, and the first column represents the grayscale data of the previous frame. The target driving value lookup table records the target driving value corresponding to the change from the grayscale data of the previous frame to the grayscale data of the current frame. Each target driving value is related to the grayscale data of the previous frame and the grayscale data of the current frame, and can be obtained through calculation or experimentation. For example, for a certain pixel, if the grayscale data of the previous frame is L1 and the grayscale data of the current frame is L254, the intersection of row L1 and column L254 in the target driving value lookup table can be found to obtain the target driving value b(1,254) corresponding to the change from grayscale L1 to grayscale L254.
[0065] It should be noted that the actual driving value and the target driving value can be driving voltage value, grayscale value, or display brightness value, etc.
[0066] For each display partition A0, the overshoot rate and undershoot rate corresponding to multiple gray-to-gray (G2G) values can be calculated. The overshoot rate of display partition A0 can be, for example, the average of multiple overshoot rates and multiple undershoot rates. It can be understood that the larger the overshoot rate, the shorter the response time, and the smaller the overshoot rate, the longer the response time.
[0067] In this disclosure, since a pulse signal is provided to the backlight BL in the first display mode, and the first display partition A01 and the second display partition A02 have different overshoot rates, the overshoot rate of the first display partition A01 and the overshoot rate of the second display partition A02 can be adjusted according to the position of the effective pulse in the pulse signal, thereby adjusting the response time of the first display partition A01 and the second display partition A02 respectively. This helps to reduce the trailing problem of high refresh rate models and improve the display image quality.
[0068] In addition, by providing pulse signals to the backlight BL, it is beneficial to eliminate motion blur caused by residual images of objects on the eyes. Backlight flicker further reduces the trailing problem of high refresh rate models and improves the display quality.
[0069] For example, a display panel PNL may include 20 or fewer display zones A0, such as 10. Each display zone A0 may include the same number of pixel rows, such as 160 pixel rows. Of course, different display zones A0 may also include different numbers of pixel rows. For example, each display zone A0 may include 200 or fewer pixel rows.
[0070] For example, the overshoot rate of display partition A0 can be greater than or equal to 5% and less than or equal to 100%. It should be noted that the overshoot rate of each display partition A0 can be adjusted according to the actual display effect, and this disclosure does not specifically limit the overshoot rate value of each display partition A0.
[0071] For each display partition A0, the absolute value of the difference between the average of the multiple overshoot rates and the average of the multiple undershoot rates can be, for example, less than or equal to 10% or 5%.
[0072] For example, the first display mode may be a game mode or a video playback mode, in which the user hopes to be able to accurately locate the target and reduce ghosting.
[0073] In some implementations, as shown in Figure 1 or Figure 2, the first display partition A01 and the second display partition A02 are arranged sequentially along the scanning direction fs, and the overshoot rate of the second display partition A02 is greater than the overshoot rate of the first display partition A01.
[0074] As shown in Figure 1 or Figure 2, the first display partition A01 and the second display partition A02 are arranged sequentially along the scanning direction fs and the overshoot rate increases sequentially.
[0075] For example, along the scanning direction fs, the overshoot rates of multiple display partitions A0 in the display panel PNL increase sequentially, for example, from 20% to 100%. In some embodiments, as shown in FIG1, the multiple display partitions A0 further include: a third display partition A03, located on the side of the second display partition A02 away from the first display partition A01, and the overshoot rate of the third display partition A03 is less than the overshoot rate of the second display partition A02.
[0076] As shown in Figure 1, the first display partition A01, the second display partition A02, and the third display partition A03 are arranged sequentially along the scanning direction fs, with the overshoot increasing first and then decreasing.
[0077] In some implementations, as shown in FIG2, the plurality of display partitions A0 further includes: a fourth display partition A04, located on the side of the first display partition A01 away from the second display partition A02, wherein the overshoot rate of the fourth display partition A04 is greater than the overshoot rate of the first display partition A01.
[0078] As shown in Figure 2, the fourth display partition A04, the first display partition A01, and the second display partition A02 are arranged sequentially along the scanning direction fs, with the overshoot decreasing first and then increasing.
[0079] In some implementations, as shown in FIG1, a display cycle of the display panel PNL includes a refresh phase and a hold phase, and the effective pulse of the pulse signal is located within the time range of the hold phase; and along the scanning direction fs, the overshoot rate of multiple display zones A0 in the display panel PNL increases sequentially, for example from 20% to 100%.
[0080] In this context, the effective pulse of the pulse signal being within the hold phase time range means that the backlight is only turned on during the hold phase. As shown in Figure 1, the scanning direction fs is from top to bottom, meaning that multiple pixel rows in the display panel PNL are sequentially opened and refreshed from top to bottom. The deflection time of each pixel row is from the time it finishes refreshing until the backlight is turned on. Since the backlight is only turned on during the hold phase, that is, after the last pixel row finishes refreshing, the deflection time of the topmost pixel row is the longest, and the deflection time of the last pixel row is the shortest. This means that the first display partition A0 has more time for the liquid crystal to reach the target position. By setting the overshoot rate of multiple display partitions A0 to increase sequentially along the scanning direction fs, the response time of multiple display partitions A0 is sequentially decreased along the scanning direction fs. This ensures that the liquid crystal of each display partition A0 has reached the target position when the backlight is turned on, thereby reducing or eliminating the display trailing problem in high refresh rate models.
[0081] In some embodiments, as shown in FIG2, the plurality of display partitions A0 further include a fifth display partition A05 and a sixth display partition A06 arranged sequentially along the scanning direction fs. The effective pulse of the pulse signal overlaps with the refresh of the fifth display partition A05, but does not overlap with the refresh of the sixth display partition A06. In order to reduce or eliminate the display trailing problem of high refresh rate models, the overshoot rate of the fifth display partition A05 is greater than that of the sixth display partition A06, and along the scanning direction fs, the overshoot rate of the sixth display partition A06 and at least one display partition A0 located on the side of the sixth display partition A06 away from the fifth display partition A05 increases sequentially.
[0082] As shown in Figure 2, when at least one display partition A0 is provided on the side of the fifth display partition A05 away from the sixth display partition A06, in order to further reduce or eliminate the display trailing problem of high refresh rate models, the overshoot rate of at least one display partition A0 located on the side of the fifth display partition A05 away from the sixth display partition A06 and the overshoot rate of the fifth display partition A05 are increased sequentially.
[0083] In some implementations, as shown in FIG9, the display panel PNL includes multiple display units UN, and different display units UN include the same number of display partitions A0 (5 as shown in FIG9). The multiple display partitions A0 in each display unit UN are sorted along the scanning direction fs, and the overshoot rates of display partitions A0 with the same sequence number in different display units UN are approximately the same.
[0084] As shown in Figure 9, the multiple display partitions A0 in each display unit UN are sorted along the scanning direction fs, with the serial numbers s0, s1, s2, s3, and s4 respectively. In display units UN1 and UN2, the overshoot rates of the two display partitions A0 with serial number s0 are approximately the same, the overshoot rates of the two display partitions A0 with serial number s1 are approximately the same, the overshoot rates of the two display partitions A0 with serial number s2 are approximately the same, the overshoot rates of the two display partitions A0 with serial number s3 are approximately the same, and the overshoot rates of the two display partitions A0 with serial number s4 are approximately the same.
[0085] In some implementations, as shown in Figures 5 to 8, when the refresh frequency of the display panel PNL is a first refresh frequency f1 (f1 = 240Hz as shown in Figures 5 to 7, and f1 = 360Hz as shown in Figure 8), one display cycle of the display panel PNL includes a first refresh phase SX1 and a first hold phase BC1. The pulse signal includes a first pulse signal PWM1, and the duty cycle of the first pulse signal PWM1 is less than or equal to the duration of the first hold phase BC1 in one display cycle.
[0086] For example, when the first refresh frequency f1 is the highest refresh frequency of the display panel PNL, the duty cycle of the first pulse signal PWM1 is equal to the proportion of the duration of the first hold phase BC1 in one display cycle. When the first refresh frequency f1 is less than the highest refresh frequency of the display panel PNL, the duty cycle of the first pulse signal PWM1 is less than the proportion of the duration of the first hold phase BC1 in one display cycle.
[0087] As shown in Figures 5 to 7, the first refresh frequency f1 is 240Hz, the duration of the first hold phase BC1 in one display cycle is 25%, and the duty cycle of the first pulse signal PWM1 is equal to the duration of the first hold phase BC1 in one display cycle, that is, the duty cycle of the first pulse signal PWM1 is 25%. Furthermore, the effective pulses of the first pulse signal PWM1 completely overlap with the first hold phase BC1.
[0088] As shown in Figure 8, the first refresh rate f1 is 360Hz, and the display panel PNL includes, for example, 1600 pixel rows. The duration of the first hold phase BC1 is the sum of the refresh times of 600 pixel rows. The duration of the first hold phase BC1 in one display cycle accounts for 27%. The duty cycle of the first pulse signal PWM1 is less than the duration of the first hold phase BC1 in one display cycle, and the duty cycle of the first pulse signal PWM1 is 25%. Furthermore, the effective pulse of the first pulse signal PWM1 is within the time range of the first hold phase BC1.
[0089] In some implementations, as shown in FIG7, when the refresh frequency of the display panel PNL is a third refresh frequency f3 (120Hz as shown in FIG7), one display cycle of the display panel PNL includes a third refresh phase SX3 and a third hold phase BC3. The pulse signal also includes a third pulse signal PWM3, and the duty cycle of the third pulse signal PWM3 is equal to the proportion of the duration of the third hold phase BC3 in one display cycle. Specifically, the third refresh frequency f3 is different from the first refresh frequency f1, the duration of the third refresh phase SX3 is the same as that of the first refresh phase SX1, and the duration of the third hold phase BC3 is different from that of the first hold phase BC1.
[0090] When the frequency conversion function is enabled, the refresh frequency of the display panel PNL changes. The refresh frequency includes, for example, a first refresh frequency f1 and a third refresh frequency f3. As shown in Figure 7, at the first refresh frequency f1, a first pulse signal PWM1 is provided to the backlight BL, and the duty cycle of the first pulse signal PWM1 is equal to the proportion of the duration of the first hold phase BC1 in one display cycle, as shown in Figure 7 (25%). At the third refresh frequency f3, a third pulse signal PWM3 is provided to the backlight BL, and the duty cycle of the third pulse signal PWM3 is equal to the proportion of the duration of the third hold phase BC3 in one display cycle, as shown in Figure 7 (62.5%). When the frequency conversion function is enabled, the refresh frequency continuously changes. The different proportions of the hold phase in one display cycle at different refresh frequencies cause the duty cycle of the pulse signal to constantly change, which can easily lead to flickering.
[0091] For example, as shown in Figure 10, the driving circuit DR includes a timing controller TCON and a light source driver LED Driver. In a specific implementation, the timing controller TCON can determine the corresponding backlight current based on the duty cycle of the pulse signal, and control the light source driver LED Driver to output the backlight current corresponding to the duty cycle via I2C commands.
[0092] To ensure that the backlight brightness remains constant under different modes, the backlight current I under pulse drive can be calculated using the following formula. ED = I0*(1 / PWM DUTY), where PWM DUTY is the duty cycle of the pulse signal driving the backlight, I0 is the backlight current corresponding to the DC drive, and I ED This is the backlight current corresponding to the pulse drive.
[0093] With the duty cycle of the first pulse signal PWM1 being 25%, the backlight current corresponding to the first pulse signal PWM1 can be determined to be 4 times the DC drive backlight current I0. Assuming the DC drive backlight current I0 is 6mA, then the amplitude of the backlight current (I1 as shown in Figure 7) corresponding to the first pulse signal PWM1 is 24mA.
[0094] With the duty cycle of the third pulse signal PWM3 at 62.5%, the backlight current corresponding to the third pulse signal PWM3 can be determined to be 1.6 times the DC drive backlight current I0. Assuming the DC drive backlight current I0 is 6mA, the amplitude of the backlight current (I3 as shown in Figure 7) corresponding to the third pulse signal PWM3 is 9.6mA.
[0095] For example, as shown in FIG7, the effective pulse of the third pulse signal PWM3 completely overlaps with the third hold phase BC3.
[0096] For example, the duration of the third holding phase BC3 can be greater than (as shown in Figure 7) or less than the duration of the first holding phase BC1.
[0097] To address the flickering issue, in some implementations, as shown in Figure 5 or Figure 6, when the refresh frequency of the display panel PNL is a second refresh frequency f2 and the second refresh frequency f2 is less than the first refresh frequency f1, the pulse signal further includes: a second pulse signal PWM2, the second pulse signal PWM2 including a second effective pulse PL2, the first pulse signal PWM1 including a first effective pulse PL1, the duty cycle of the second effective pulse PL2 being the same as the duty cycle of the first effective pulse PL1, and the duration of one second effective pulse PL2 being the same as the duration of one first effective pulse PL1.
[0098] In this embodiment, since the duty cycle of the second effective pulse PL2 is the same as that of the first effective pulse PL1, the duty cycles of the second effective pulse PL2 and the first effective pulse PL1 will not change with the refresh frequency, and the corresponding backlight current will not change with the refresh frequency, thereby eliminating the flicker problem.
[0099] To finely adjust the duty cycle of the second pulse signal PWM2, in some embodiments, as shown in Figure 5 or Figure 6, the second pulse signal PWM2 further includes a third effective pulse PL3. The duty cycle of the third effective pulse PL3 is the same as that of the first effective pulse PL1, and the duration of the third effective pulse PL3 is less than the duration of the first effective pulse PL1.
[0100] For example, as shown in Figure 5 or Figure 6, the duty cycles of the first effective pulse PL1, the second effective pulse PL2, and the third effective pulse PL3 are all 25%. The durations of the second effective pulse PL2 and the third effective pulse PL3 are the same, while the duration of the third effective pulse PL3 is shorter than that of the second effective pulse PL2 and the third effective pulse PL3. This allows for a more precise adjustment of the output quantity of the third effective pulse PL3 based on the duration of the second hold phase BC2, making the effective duty cycle of the second pulse signal PWM2 closer to the duty cycle of the first pulse signal PWM1.
[0101] For example, as shown in Figure 5 or Figure 6, the first effective pulse PL1 overlaps with the first display period T1, and the start time of the first effective pulse PL1 is delayed by a first preset duration t1 relative to the start time of the first display period T1. The first preset duration t1 is, for example, greater than or equal to 0. The start time of the first display period T1 is, for example, the time point at which the first pixel row begins to refresh within the first display period T1 or the output time point of the frame start signal.
[0102] As shown in Figure 5, the first preset duration t1 is greater than 0 and less than the duration of the first refresh phase SX1. As shown in Figure 6, the first preset duration t1 is equal to the duration of the first refresh phase SX1.
[0103] For example, as shown in Figure 5 or Figure 6, the second effective pulse PL2 overlaps with the second display period T2, and the start time of the second effective pulse PL2 is also delayed by a first preset time t1 relative to the start time of the second display period T2. The start time of the second display period T2 is, for example, the time point at which the first pixel row begins to refresh within the second display period T2 or the output time point of the frame start signal.
[0104] For example, as shown in FIG5 or FIG6, the start time of the third effective pulse PL3 adjacent to the second effective pulse PL2 is delayed by a second preset duration t2 relative to the start time of the second effective pulse PL2, and the second preset duration t2 is equal to the duration of the first display cycle T1.
[0105] As shown in Figure 5 or Figure 6, when the refresh frequency of the display panel PNL is the second refresh frequency f2, within one display cycle (such as the second display cycle T2), the second pulse signal PWM2 first outputs a second valid pulse PL2, and then outputs one or more third valid pulses PL3 until the end of the display cycle.
[0106] For example, the duration of the third effective pulse PL3 and the center interval duration of two adjacent third effective pulses PL3 can be calculated in units of pixel rows. For example, the center interval duration of two adjacent third effective pulses PL3 is the sum of the refresh duration of 32 pixel rows, and the duration of the third effective pulse PL3 is the sum of the refresh duration of 8 pixel rows.
[0107] Since the duty cycles of the first effective pulse PL1, the second effective pulse PL2, and the third effective pulse PL3 are the same, the amplitudes of the first effective pulse PL1, the second effective pulse PL2, and the third effective pulse PL3 can be set to be the same, that is, the backlight current corresponding to the first effective pulse PL1, the second effective pulse PL2, and the third effective pulse PL3 is the same.
[0108] In some implementations, as shown in FIG5, the first effective pulse PL1 overlaps with the first refresh phase SX1 but does not overlap with the first hold phase BC1.
[0109] In some implementations, as shown in FIG5, the second display period T2 includes a second refresh phase SX2 and a second hold phase BC2, the second effective pulse PL2 overlaps with the second refresh phase SX2, and the third effective pulse PL3 overlaps with the second hold phase BC2.
[0110] For example, as shown in FIG5, the second effective pulse PL2 does not overlap with the second hold phase BC2, and the third effective pulse PL3 does not overlap with the second refresh phase SX2.
[0111] For example, as shown in Figure 5, the second refresh phase SX2 has the same duration as the first refresh phase SX1, and the second hold phase BC2 has a longer duration than the first hold phase BC1.
[0112] In some implementations, as shown in FIG6, the first effective pulse PL1 overlaps with the first hold phase BC1. Further, as shown in FIG6, the first effective pulse PL1 is within the time range of the first hold phase BC1.
[0113] In some implementations, as shown in FIG6, the second display period T2 includes a second refresh phase SX2 and a second hold phase BC2, and the second effective pulse PL2 and the third effective pulse PL3 overlap with the second hold phase BC2. Further, as shown in FIG6, both the second effective pulse PL2 and the third effective pulse PL3 are within the time range of the second hold phase BC2.
[0114] For example, the frequency of the third effective pulse PL3 is greater than or equal to 0.5KHz and less than or equal to 100KHz or 25KHz.
[0115] For example, the frequency of the first effective pulse PL1 is greater than or equal to the first refresh frequency f1, and less than or equal to ten times the first refresh frequency f1, such as the frequency of the first effective pulse PL1 being equal to twice the first refresh frequency f1.
[0116] For example, as shown in Figure 7, the effective pulse frequency of the third pulse signal PWM3 is equal to the third refresh frequency f3.
[0117] In some implementations, as shown in FIG8, the first pulse signal PWM1 includes a first effective pulse PL1, the first effective pulse PL1 is within the time range of the first hold phase BC1, the duration of the first effective pulse PL1 is less than the duration of the first hold phase BC1, and the end time of the first effective pulse PL1 is the same as the end time of the first hold phase BC1.
[0118] In this embodiment, the liquid crystal can continue to deflect during the time between the end of the first refresh phase SX1 and the start of the first effective pulse PL1, so that the liquid crystal can be better deflected to the target position, further reducing the trailing problem and improving the display effect.
[0119] For example, when the first refresh frequency f1 is greater than or equal to the first threshold, the frequency of the first pulse signal PWM1 is equal to the first refresh frequency f1. The first threshold is, for example, greater than or equal to 100Hz, such as 120Hz or 200Hz.
[0120] As shown in Figures 5 to 7, since the first refresh frequency f1 is 240Hz, which is greater than the first threshold of 200Hz, the effective pulse frequency of the first pulse signal PWM1 is equal to the first refresh frequency f1.
[0121] To avoid flickering, in some implementations, when the first refresh frequency f1 is less than a first threshold, the frequency of the first pulse signal PWM1 is greater than the first refresh frequency f1, but less than or equal to ten times the first refresh frequency f1. As shown in Figure 9, the frequency of the first pulse signal PWM1 is equal to twice the first refresh frequency f1, that is, two first valid pulses PL1 are output within the first display period T1.
[0122] For example, the frequency of the third effective pulse PL3 is greater than or equal to 200Hz.
[0123] As shown in Figure 9, the display panel PNL includes two display units UN. In one display cycle, the first pulse signal PWM1 includes two first effective pulses PL1. One first effective pulse PL1 is located in the first refresh stage SX1, and the other first effective pulse PL1 is located in the first hold stage BC1. The first effective pulse PL1 located in the first refresh stage SX1 overlaps with the refresh at the junction of the two display units UN.
[0124] For example, for each display unit UN, the overshoot rate of multiple display partitions A0 can be increased sequentially along the scanning direction fs, for example from 40% to 100%.
[0125] For example, the frequency of the pulse signal is greater than or equal to 200 Hz and less than or equal to 25 kHz.
[0126] In some implementations, the backlight BL includes a light-emitting diode (LED). The inventors discovered that when KSF phosphor is used in the LED, there is afterglow when the LED is off, and a red flickering problem occurs when the backlight is pulsed. To solve this red flickering problem, by way of example, non-KSF phosphor is used in the LED.
[0127] To achieve high brightness display, the LED lamp is, for example, a dual-crystal LED lamp. A dual-crystal LED lamp is an LED lighting product that uses dual-chip packaging technology. By integrating two independent light-emitting chips (usually with different color temperatures or colors) in the same package structure, it achieves more flexible light efficiency control and performance improvement.
[0128] For example, an LED light can achieve 100% DCI-P3 color gamut while reaching a brightness of 1000 nits.
[0129] For example, the driving circuit DR includes a timing controller TCON, which is configured to receive a display command. If the command indicates entering a first display mode, a pulse signal is provided to the backlight BL, and overshoot driving is performed on the display partition A0. The overshoot rate of the first display partition A01 is different from that of the second display partition A02. If the display command indicates entering a second display mode, a DC signal is provided to the backlight BL, and overshoot driving is performed on multiple display partitions A0. The overshoot rates of the different display partitions are the same.
[0130] For example, as shown in Figure 10, the driving circuit DR also includes a light source driver (LED Driver). In a specific implementation, the timing controller (TCON) can determine the corresponding backlight current based on the duty cycle of the pulse signal, and control the light source driver (LED Driver) to output a backlight driving signal corresponding to the duty cycle and backlight current to the backlight source BL via I2C commands.
[0131] For example, the display panel PNL includes two display modes, namely a first display mode and a second display mode. The first display mode can be used for video playback or playing games, while the second display mode can be used for regular browsing or office work.
[0132] For example, a user cannot enter the second display mode at a refresh rate of 100Hz. To improve the display effect, the user can enter the second display mode at a refresh rate of 200Hz or higher.
[0133] As shown in Figure 10a, the first display mode and the second display mode can be switched by controlling the BOOST pin. In this case, the display command is the BOOST command input by the BOOST pin. When the BOOST command switches from low level to high level, it indicates that the first display mode is switched to the second display mode.
[0134] As shown in Figure 10b, the first display mode and the second display mode can also be switched using AUX commands. In this case, the AUX commands include the AUX-P command and the AUX-N command. The AUX-P command indicates entering the first display mode, and the AUX-N command indicates entering the second display mode.
[0135] This disclosure provides a display device, including a display module as provided in any of the above.
[0136] Those skilled in the art will understand that the display device provided in this disclosure has the advantages of the above-described display module.
[0137] The display device disclosed herein can be any product or component with display function, such as a game console, mobile phone, tablet computer, television, monitor, laptop computer, digital photo frame, in-vehicle display device, smartwatch, fitness wristband, personal digital assistant, etc.
[0138] This disclosure provides a display driving method applied to a display module, as shown in Figure 10. The display module includes a display panel PNL and a backlight BL. The display panel PNL includes multiple display partitions A0 arranged along the scanning direction fs. The multiple display partitions A0 include a first display partition A01 and a second display partition A02. The display driving method includes:
[0139] Step S01: Obtain the display command.
[0140] Step S02: If the display command indicates to enter the first display mode, a pulse signal is provided to the backlight BL, and overshoot driving is performed on multiple display zones A0. The overshoot rate of the first display zone A01 is different from the overshoot rate of the second display zone A02. The overshoot rate is the proportion of the actual driving value of the display zone A0 deviating from the target driving value.
[0141] The execution entity of the display driving method provided in this disclosure can be, for example, the driving circuit DR in the aforementioned display module.
[0142] In some embodiments, after step S01, the display driving method further includes:
[0143] Step S03: If the display command indicates that the second display mode is entered, a DC signal is provided to the backlight BL, and overshoot drive is performed on multiple display zones A0, and the overshoot rate of different display zones A0 is the same.
[0144] In the second display mode, since the backlight driving signal is a DC signal, the backlight remains constantly on throughout the display process. Therefore, to improve the display effect, for example, the overshoot rate of each display zone A0 can be between 12% and 20%. If the overshoot rate is too high, ghosting (i.e., shadows with reversed colors) will be seen; if the overshoot rate is too low, motion blur (i.e., shadows of the same color but lighter) will appear.
[0145] For example, the display panel PNL has two display modes, namely a first display mode and a second display mode. The first display mode can be used for video playback or playing games, while the second display mode can be used for regular browsing or office work.
[0146] For example, a user cannot enter the second display mode at a refresh rate of 100Hz. To improve the display effect, the user can enter the second display mode at a refresh rate of 200Hz or higher.
[0147] As shown in Figure 10a, the first display mode and the second display mode can be switched by controlling the BOOST pin. In this case, the display command is the BOOST command input by the BOOST pin. When the BOOST command switches from low level to high level, it indicates that the first display mode is switched to the second display mode.
[0148] As shown in Figure 10b, the first display mode and the second display mode can also be switched using AUX commands. In this case, the AUX commands include the AUX-P command and the AUX-N command. The AUX-P command indicates entering the first display mode, and the AUX-N command indicates entering the second display mode.
[0149] As shown in Figure 11, when switching from the first display mode to the second display mode, the BOOST instruction switches from low level to high level. The effective pulse of the pulse signal PWM is delayed by about 1.6ms relative to the switching time of the BOOST instruction. This delay causes the backlight to dim briefly, which can cover up the brightness change caused by the backlight switching from DC drive to pulse drive.
[0150] In this disclosure, relational terms such as first and second are used merely to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations.
[0151] In this specification, "electrical connection" and "coupling" include situations where components are connected together by elements that have some electrical function. There are no particular limitations on what constitutes an "electrical function," as long as it allows for the transmission and reception of electrical signals between the connected components. Examples of "electrical functions" include not only electrodes and wiring, but also switching elements such as transistors, resistors, inductors, capacitors, and other components with various functions.
[0152] In this disclosure, "multiple" means two or more, and "at least one" means one or more, unless otherwise explicitly specified. "At least one of A, B, and C" has the same meaning as "at least one of A, B, or C," both including the following combinations of A, B, and C: A only, B only, C only, a combination of A and B, a combination of A and C, a combination of B and C, and a combination of A, B, and C. "A and / or B" includes the following three combinations: A only, B only, and a combination of A and B.
[0153] The use of “for” or “configured to” in this disclosure implies an open and inclusive language that does not preclude applicability to or configuration to devices for performing additional tasks or steps.
[0154] As used in this disclosure, “about,” “approximately,” or “approximately” includes the stated value and the average value within an acceptable range of deviation from the given value, wherein the acceptable range of deviation is determined by a person skilled in the art taking into account the measurement under discussion and the error associated with the measurement of the given quantity (i.e., the limitations of the measurement system).
[0155] As used in this disclosure, "parallel," "perpendicular," "equal," and "flush" include the described situation and situations that are similar to the described situation, within an acceptable deviation range, which is determined by those skilled in the art taking into account the measurement under discussion and the error associated with the measurement of a particular quantity (i.e., the limitations of the measurement system). For example, "parallel" includes absolute parallelism and approximate parallelism, wherein an acceptable deviation range for approximate parallelism may be, for example, within 10° or 5°; "perpendicular" includes absolute perpendicularity and approximate perpendicularity, wherein an acceptable deviation range for approximate perpendicularity may also be, for example, within 10° or 5°. "Equal" includes absolute equality and approximate equality, wherein an acceptable deviation range for approximate equality may be, for example, a difference between the two equals being less than or equal to 5% of either one. "Flush" includes absolute flush and approximate flush, wherein an acceptable deviation range for approximate flush may be, for example, a distance between the flushes being less than or equal to 5% of either one's dimension.
[0156] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of this disclosure, and are not intended to limit them. Although this disclosure has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this disclosure.
Claims
1. A display module, comprising: The display panel includes multiple display zones arranged along the scanning direction, wherein the multiple display zones include a first display zone and a second display zone; A backlight source, located on the backlight side of the display panel, is configured to provide backlight to the display panel; as well as The driving circuit, which is connected to the plurality of display zones and the backlight respectively, is configured to provide a pulse signal to the backlight in a first display mode and to perform overshoot driving on the plurality of display zones, wherein the overshoot rate of the first display zone is different from the overshoot rate of the second display zone, and the overshoot rate is the proportion of the actual driving value of the display zone deviating from the target driving value.
2. The display module according to claim 1, wherein, The first display partition and the second display partition are arranged sequentially along the scanning direction, and the overshoot rate of the second display partition is greater than that of the first display partition.
3. The display module according to claim 2, wherein, Along the scanning direction, the overshoot rate of multiple display zones in the display panel increases sequentially.
4. The display module according to claim 2, wherein, The plurality of display partitions further includes: a third display partition located on the side of the second display partition away from the first display partition, wherein the overshoot rate of the third display partition is less than the overshoot rate of the second display partition; or The fourth display partition is located on the side of the first display partition that is far from the second display partition, and the overshoot rate of the fourth display partition is greater than that of the first display partition.
5. The display module according to claim 1, wherein, One display cycle of the display panel includes a refresh phase and a hold phase, and the effective pulse of the pulse signal is located within the time range of the hold phase; and Along the scanning direction, the overshoot rate of multiple display zones in the display panel increases sequentially.
6. The display module according to claim 1, wherein, The plurality of display zones also includes a fifth display zone and a sixth display zone arranged sequentially along the scanning direction. The effective pulse of the pulse signal overlaps with the refresh of the fifth display zone but does not overlap with the refresh of the sixth display zone. and The overshoot rate of the fifth display partition is greater than that of the sixth display partition, and along the scanning direction, the overshoot rate of the sixth display partition and at least one display partition located on the side of the sixth display partition away from the fifth display partition increases sequentially.
7. The display module according to claim 1, wherein, The display panel includes multiple display units, and different display units include the same number of display partitions. The multiple display partitions in each display unit are sorted along the scanning direction, and the overshoot rates of display partitions with the same sequence number in different display units are approximately the same.
8. The display module according to claim 1, wherein, A display cycle of the display panel includes a refresh phase and a hold phase. When the refresh frequency of the display panel is a first refresh frequency, a display cycle of the display panel includes a first refresh phase and a first hold phase. The pulse signal includes a first pulse signal, and the duty cycle of the first pulse signal is less than or equal to the duration of the first hold phase in a display cycle.
9. The display module according to claim 8, wherein, When the refresh rate of the display panel is a second refresh rate and the second refresh rate is less than the first refresh rate, the pulse signal further includes: The second pulse signal includes a second effective pulse, the first pulse signal includes a first effective pulse, the duty cycle of the second effective pulse is the same as the duty cycle of the first effective pulse, and the duration of one second effective pulse is the same as the duration of one first effective pulse.
10. The display module according to claim 9, wherein, The second pulse signal also includes a third effective pulse, the duty cycle of which is the same as that of the first effective pulse, and the duration of one third effective pulse is less than the duration of one first effective pulse.
11. The display module according to claim 10, wherein, The first effective pulse overlaps with the first display cycle, and the start time of the first effective pulse is delayed by a first preset time relative to the start time of the first display cycle; The second valid pulse overlaps with the second display cycle, and the start time of the second valid pulse is delayed by the first preset duration relative to the start time of the second display cycle; The start time of the third effective pulse adjacent to the second effective pulse is delayed by a second preset duration relative to the start time of the second effective pulse, and the second preset duration is equal to the duration of the first display cycle.
12. The display module according to claim 11, wherein, The first valid pulse overlaps with the first refresh phase; The second display cycle includes a second refresh phase and a second hold phase, the second valid pulse overlaps with the second refresh phase, and the third valid pulse overlaps with the second hold phase.
13. The display module according to claim 11, wherein, The first effective pulse overlaps with the first hold phase; The second display cycle includes a second refresh phase and a second hold phase, and the second valid pulse and the third valid pulse overlap with the second hold phase.
14. The display module according to claim 13, wherein, The first valid pulse is within the time range of the first hold phase, and the second valid pulse and the third valid pulse are both within the time range of the second hold phase.
15. The display module according to claim 8, wherein, The duty cycle of the first pulse signal is equal to the proportion of the duration of the first hold phase in a display cycle; When the refresh frequency of the display panel is the third refresh frequency, one display cycle of the display panel includes a third refresh phase and a third hold phase. The pulse signal also includes a third pulse signal, and the duty cycle of the third pulse signal is equal to the duration of the third hold phase in one display cycle. and The third refresh frequency is different from the first refresh frequency, the third refresh phase has the same duration as the first refresh phase, and the third hold phase has a different duration than the first hold phase.
16. The display module according to claim 8, wherein, The duty cycle of the first pulse signal is less than the duration of the first hold phase in a display cycle; The first pulse signal includes a first valid pulse, which is located within the time range of the first hold phase. The duration of the first valid pulse is less than the duration of the first hold phase, and the end time of the first valid pulse is the same as the end time of the first hold phase.
17. The display module according to claim 8, wherein, When the first refresh frequency is greater than or equal to the first threshold, the frequency of the first pulse signal is equal to the first refresh frequency; when the first refresh frequency is less than the first threshold, the frequency of the first pulse signal is greater than the first refresh frequency and less than or equal to ten times the first refresh frequency.
18. The display module according to claim 1, wherein, The frequency of the pulse signal is greater than or equal to 200Hz and less than or equal to 25KHz.
19. The display module according to claim 1, wherein, The backlight source includes a light-emitting diode, which uses non-KSF phosphor.
20. The display module according to any one of claims 1 to 19, wherein, The driving circuit includes a timing controller configured to receive a display command. If the command indicates entry into the first display mode, a pulse signal is provided to the backlight, and overshoot driving is performed on multiple display zones, wherein the overshoot rate of the first display zone is different from that of the second display zone. If the display command indicates entry into the second display mode, a DC signal is provided to the backlight, and overshoot driving is performed on multiple display zones, wherein the overshoot rate of different display zones is the same.
21. A display device comprising a display module as described in any one of claims 1 to 20.
22. A display driving method applied to a display module, the display module including a display panel and a backlight, the display panel including a plurality of display zones arranged along a scanning direction, the plurality of display zones including a first display zone and a second display zone; the display driving method comprising: Get the display command; If the display command indicates entry into the first display mode, a pulse signal is provided to the backlight and overshoot driving is performed on the multiple display zones. The overshoot rate of the first display zone is different from the overshoot rate of the second display zone. The overshoot rate is the proportion of the actual driving value of the display zone deviating from the target driving value.
23. The display driving method according to claim 22, wherein, After the step of obtaining the display instruction, the display driving method further includes: If the display command indicates entry into the second display mode, a DC signal is provided to the backlight and overshoot drive is performed on multiple display zones, with the overshoot rate being the same for different display zones.