Optoelectronic semiconductor device and method for producing at least one optoelectronic semiconductor device
Patent Information
- Application Number
- PCT/EP2026/051415
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2025-02-18
- Filing Date
- 2026-01-21
- Publication Date
- 2026-08-27
Smart Images
Figure EP2026051415_27082026_PF_FP_ABST
Abstract
Description
[0001] 2024PF01001 January 21, 2026
[0002] P2024, 1013 WO N - 1 -
[0003] Description
[0004] OPTOELECTRONIC SEMICONDUCTOR DEVICE AND METHOD FOR PRODUCING AT LEAST ONE OPTOELECTRONIC SEMICONDUCTOR DEVICE
[0005] An optoelectronic semiconductor device, which can be a radiation emitting device, for example, is specified. The optoelectronic semiconductor device may comprise an optoelectronic semiconductor chip suited for emitting mixed-colored radiation having different spectral components, for example from the visible to infrared spectral range . However, it is also possible for the optoelectronic semiconductor device to be a radiation detecting device .
[0006] With semiconductor devices comprising semiconductor chips electrically connected by means of wire bonds, the problem can arise that the wire bonds are visible or protrude from an encapsulation in which they are embedded due to their
[0007] so-called loop height . This leads to cosmetic defects and entails the risk of damage to the wire bonds .
[0008] One obj ect inter alia is to specify an optoelectronic semiconductor device having improved reliability. Another obj ect is to specify a method for producing at least one optoelectronic semiconductor device having improved reliability .
[0009] These obj ects are achieved inter alia by the optoelectronic semiconductor device and the method according to the independent claims .2024PF01001 January 21, 2026
[0010] P2024, 1013 WO N - 2 -
[0011] Further embodiments, configurations and developments of the optoelectronic semiconductor device and the method are the subj ect-matter of the dependent claims .
[0012] According to at least one embodiment of an optoelectronic semiconductor device, it comprises an optoelectronic semiconductor chip . For example, the optoelectronic semiconductor chip comprises a semiconductor body with a top surface and an electric contact region of first polarity arranged on the semiconductor body, for example arranged on the top surface of the semiconductor body. For example, the electric contact region of first polarity is a metallization applied to the semiconductor body. The electric contact region of first polarity can form a first electrode, such as a p- or n-electrode, of the optoelectronic semiconductor chip . Furthermore, the semiconductor body can comprise an active zone, which is provided for generating electromagnetic radiation with a wavelength for example in the visible to infrared spectral range, for example blue light .
[0013] Alternatively, the active zone can be provided for detecting electromagnetic radiation with a wavelength for example in the visible to infrared spectral range .
[0014] Moreover, the optoelectronic semiconductor device may comprise an electric connection region of first polarity laterally adj acent to the optoelectronic semiconductor chip . "Lateral" in the context of the present application may denote directions that are parallel or essentially parallel to a main extension plane of the optoelectronic semiconductor device, wherein "essentially" for example means within common production tolerances . The electric connection region of first polarity may form a first electrode, such as a p- or n-electrode, of the optoelectronic semiconductor device .2024PF01001 January 21, 2026
[0015] P2024, 1013 WO N - 3 -
[0016] For example, the optoelectronic semiconductor device can comprise a carrier element, wherein the optoelectronic semiconductor chip is mounted on the carrier element .
[0017] Moreover, the electric connection region of first polarity can be arranged on or be a part of the carrier element .
[0018] Furthermore, the optoelectronic semiconductor device may comprise a connecting element electrically connecting the electric contact region of first polarity to the electric connection region of first polarity. For example, the connecting element has a kinked or curved shape . As an example, the connecting element comprises at least one kink. The at least one kink can have a profile similar or equal to a convex curvature or a concave curvature . It is possible for the optoelectronic semiconductor device to comprise more than one connecting element including at least one kink. For example, a further kinked shape connecting element, which is suitable for electrical connection between regions of second polarity, may be provided.
[0019] Apart from that, the optoelectronic semiconductor device may comprise an enclosure, in which the optoelectronic semiconductor chip and the connecting element are embedded. The enclosure can laterally surround the optoelectronic semiconductor chip . Furthermore, the connecting element can be completely embedded in the enclosure so that it does not protrude from the enclosure at any point . Advantageously, the various components of the optoelectronic semiconductor device, such as the optoelectronic semiconductor chip and the connecting element, can be protected from damage by the enclosure .2024PF01001 January 21, 2026
[0020] P2024, 1013 WO N 4
[0021] According to at least one embodiment of an optoelectronic semiconductor device, it comprises :
[0022] - an optoelectronic semiconductor chip comprising
[0023] - a semiconductor body having a top surface and
[0024] - an electric contact region of first polarity arranged on the semiconductor body,
[0025] - an electric connection region of first polarity laterally adj acent to the optoelectronic semiconductor chip,
[0026] - a connecting element electrically connecting the electric contact region of first polarity to the electric connection region of first polarity,
[0027] - an enclosure, in which the optoelectronic semiconductor chip and the connecting element are embedded, wherein the connecting element falls below a level of the top surface in an interspace extending between the electric contact region of first polarity and the electric connection region of first polarity and excluding the electric connection region of first polarity.
[0028] In the context of the application, "below" can mean "vertically set back", wherein "vertical" can denote a direction running transverse, for example perpendicular to a main extension plane of the optoelectronic semiconductor device . Moreover, in the context of the application, the interspace extending between the electric contact region of first polarity and the electric connection region of first polarity and excluding the electric connection region of first polarity can mean that the interspace does not laterally overlap with the electric connection region of first polarity.
[0029] For example, the connecting element is as close as possible to an edge of a composite including the carrier element if2024PF01001 January 21, 2026
[0030] P2024, 1013 WO N - 5 -
[0031] appropriate, the optoelectronic semiconductor chip and the electric connection region of first polarity. It is even possible for the connecting element to touch an edge of the semiconductor body, for example an edge at the top side of the semiconductor body.
[0032] According to at least one embodiment or configuration, a first kink is arranged in a first section of the connecting element facing the electric contact region of first polarity. As an example, the first kink has a profile similar or equal to a convex curvature . Starting from the electric contact region of first polarity, the connecting element in the first section can be bent around an edge of the semiconductor body towards a plane where the connecting element is connected to the electric connection region of first polarity. For example, the plane where the connecting element is connected to the electric connection region of first polarity lies lower than a plane where the connecting element is connected to the electric contact region of first polarity. In the context of the application, "lower" can mean "vertically set back" .
[0033] According to at least one embodiment or configuration, a second kink is arranged in a second section of the connecting element facing the electric connection region. As an example, the second kink has a profile similar or equal to a convex curvature or a concave curvature . Starting from the electric connection region of first polarity, the connecting element in the second section can be led out of the plane where the connecting element is connected to the electric connection region of first polarity and bent back towards the plane or can be bent towards the semiconductor chip . It is possible2024PF01001 January 21, 2026
[0034] P2024, 1013 WO N 6
[0035] for the second kink to be the only kink of the connecting element .
[0036] According to at least one embodiment or configuration, a third kink is arranged between the first kink and the second kink and / or in the interspace extending between the electric contact region of first polarity and the electric connection region of first polarity. For example, the third kink serves to adapt the first kink to the second kink. As an example, the third kink has a profile similar or equal to a concave curvature .
[0037] According to at least one embodiment or configuration, a fourth kink is arranged between the first kink and the third kink and / or in the interspace extending between the electric contact region of first polarity and the electric connection region of first polarity. The fourth kink may serve to adapt the first kink to the third kink. As an example, the fourth kink has a profile similar or equal to a concave curvature .
[0038] According to at least one embodiment or configuration, the connecting element comprises a top section above the top surface of the semiconductor body. For example, the top section follows the top surface in a vertical direction. The top surface may delimit the semiconductor body on a side facing a top side of the optoelectronic semiconductor device . The top side of the optoelectronic semiconductor device can be opposite to a bottom side of the optoelectronic semiconductor device . For example, the top side of the optoelectronic semiconductor device is a radiation transmission surface, where radiation exits or enters the optoelectronic semiconductor device . Moreover, the bottom side of the optoelectronic semiconductor device can be a2024PF01001 January 21, 2026
[0039] P2024, 1013 WO N - 7 -
[0040] mounting surface, where the optoelectronic semiconductor device is mounted on a base, for example a printed circuit board and, if appropriate, is electrically connected to the base .
[0041] According to at least one embodiment or configuration, a lateral extension of the top section is at most twice the lateral extension of the electric contact region. In addition or alternatively, the lateral extension of the top section can be at most five times the thickness of the connecting element . The lateral extension is measured along a lateral direction, for example along the lateral direction in which the electric connection region follows the electric contact region. The lateral extension of the top section may range from 100 to 200 pm, wherein tolerances of ± 10% are possible . Hence, the lateral extension of the top section is relatively small, resulting in less visibility and a reduced risk of exposure of the connecting element on a top side of the optoelectronic semiconductor device . Besides, the optoelectronic semiconductor device may comprise a data matrix code on its top side . Reducing the lateral extension of the top section of the connecting element allows that more space is made available for the data matrix code, for example .
[0042] According to at least one embodiment or configuration, the top section includes the first kink. For example, the first kink enables the relatively small lateral extension of the top section.
[0043] According to at least one embodiment or configuration, the connecting element is a bond wire . Suitable materials for the connecting element are Au or compounds of Au like an Au-Ag2024PF01001 January 21, 2026
[0044] P2024, 1013 WO N - 8 -
[0045] alloy, which appears more whitish and thus reduces the visibility of the connecting element compared to Au.
[0046] According to at least one embodiment or configuration, the optoelectronic semiconductor device comprises security bond means arranged at an end of the connecting element bonded to the electric connection region of first polarity. For example, the security bond means comprise or consist of a metal layer arranged on the connecting element . The security bond means reduce the risk of losing electric contact for example if the bond at the end of the connecting element is broken or damaged. The security bond means can be arranged on the connecting element in such a way that the number of kinks is reduced. For example, the number of kinks can be reduced from four to three by means of the security bond means .
[0047] According to at least one embodiment or configuration, the optoelectronic semiconductor chip comprises a conversion element . The conversion element is provided for wavelength conversion of the radiation emitted by the semiconductor body or the active zone of the semiconductor body. At least part of the radiation can be converted into radiation of a longer wavelength, for example yellow light . The optoelectronic semiconductor chip can therefore emit mixed-colored radiation, for example white light .
[0048] The conversion element can be arranged on the top surface of the semiconductor body. As an example, the connecting element does not protrude beyond the conversion element on a top side of the optoelectronic semiconductor device . This has advantages when producing the enclosure by a molding process, for example by a foil assisted molding (FAM) process .
[0049] Moreover, it is possible for the conversion element not to2024PF01001 January 21, 2026
[0050] P2024, 1013 WO N - 9 -
[0051] proj ect laterally beyond the top surface of the semiconductor body. The conversion element can be a ceramic plate made of conversion material or a plastic layer with embedded conversion particles .
[0052] According to at least one embodiment or configuration, the connecting element does not protrude beyond the enclosure on the top side of the optoelectronic semiconductor device . This can be achieved by lowering the connecting element under the level of the top surface in the interspace between the electric contact region of first polarity and the electric connection region of first polarity and thus reducing a height or vertical extension of the connecting element . The height or vertical extension is measured along the vertical direction. Moreover, the height of the conversion element can be reduced by reducing the height of the connecting element . Advantageously, with a thinner conversion element, a higher conversion efficiency and optical performance and a higher contrast of the semiconductor device can be achieved.
[0053] Overall, the measures described, such as lowering the connecting element under the level of the top surface in the interspace between the electric contact region of first polarity and the electric connection region of first polarity, reducing the lateral extension of the top section and the vertical extension of the connecting element and, if appropriate, using a thinner conversion element, lead to an improvement of the optical properties and reliability of the optoelectronic semiconductor device .
[0054] According to at least one embodiment or configuration, the enclosure is embodied in a step-free way, for example in a planar manner, on the top side of the optoelectronic2024PF01001 January 21, 2026
[0055] P2024, 1013 WO N - 10 -
[0056] semiconductor device . This can be achieved by using a flat forming tool as it is the case, for example, with the above-mentioned FAM process . It is possible for the enclosure not to cover the conversion element on a top side facing the top side of the optoelectronic semiconductor device . However, it is also possible that the enclosure covers the conversion element on its top side .
[0057] According to at least one embodiment or configuration, the enclosure is formed from an enclosure material comprising a base material, for example a radiation transmissive base material like silicone and / or epoxy. Moreover, the enclosure material can comprise reflective particles that are embedded in the base material such that the enclosure appears white, for example . Suitable materials for the reflective particles are, for example, TiO2 and ZrO2 .
[0058] According to at least one embodiment or configuration, the optoelectronic semiconductor device comprises an electric connection region of second polarity. For example, the electric connection region of second polarity is provided for further electrical contacting of the optoelectronic semiconductor chip and forms a second electrode of the optoelectronic semiconductor device . In the context of the present application, the second polarity is different from the first polarity. The optoelectronic semiconductor chip can be arranged on the electric connection region of second polarity .
[0059] According to at least one embodiment or configuration, the semiconductor body of the optoelectronic semiconductor chip comprises a first and a second semiconductor region of different conductivities, wherein the active zone is arranged2024PF01001 January 21, 2026
[0060] P2024, 1013 WO N 11
[0061] between the first and second semiconductor regions . The first and second semiconductor regions and the active zone can each be formed from one or more semiconductor layers . The semiconductor layers can be epitaxial layers deposited on a growth substrate . The growth substrate can remain in the semiconductor chip or be at least partially detached. The first semiconductor region can be arranged on a side of the semiconductor body facing the electrical connection region of second polarity. The second semiconductor region can be arranged on a side of the semiconductor body facing away from the electrical connection region of second polarity. For example, the first semiconductor region has a p-type conductivity, while the second semiconductor region has an n-type conductivity. However, it is also possible that the first semiconductor region has an n-type conductivity and the second semiconductor region has a p-type conductivity.
[0062] For example, the electric contact region of first polarity can be electrically conductively connected to the first semiconductor region. Furthermore, the second semiconductor region can be electrically conductively connected to an electric contact region or structure of second polarity of the semiconductor chip . As an example, the electric contact region or structure of second polarity is electrically conductively connected to the electric connection region of second polarity.
[0063] For the semiconductor regions or semiconductor layers of the semiconductor body, for example, materials based on arsenide, phosphide or nitride compound semiconductors can be considered. "Based on arsenide, phosphide or nitride compound semiconductors" in the present context means that the semiconductor layers contain AlnGamIn]__n-mAs , AlnGamIn]__n-mP2024PF01001 January 21, 2026
[0064] P2024, 1013 WO N - 12 -
[0065] or AlnGamIn]__n-mN, where 0 < n < 1, 0 < m < 1 und n+m < 1. This material does not necessarily have to have a mathematically exact composition according to the above formula . Rather, it can have one or more dopants as well as additional components that essentially do not change the characteristic physical properties of the AlnGamIn]__n-mAs , AlnGamIn]__n-mP or AlnGamIn]__n-mN material . For the sake of simplicity, however, the above formula only contains the essential components of the crystal lattice (Al, Ga, In, As or P or N) , even if these may be partially replaced by small amounts of other substances .
[0066] The method described below is suitable for the production of an optoelectronic semiconductor device described here . The features described in connection with the optoelectronic semiconductor device can therefore also apply to the method, and vice versa .
[0067] According to at least one embodiment of a method for producing at least one optoelectronic semiconductor device as described above, the method comprises the following steps : - providing at least one optoelectronic semiconductor chip comprising a semiconductor body having a top surface and comprising an electric contact region of first polarity arranged on the semiconductor body,
[0068] - providing at least one electric connection region of first polarity laterally adj acent to the at least one optoelectronic semiconductor chip,
[0069] - providing at least one connecting element, which connects the electric contact region of first polarity to the at least one electric connection region of first polarity,2024PF01001 January 21, 2026
[0070] P2024, 1013 WO N - 13 -
[0071] - producing an enclosure, in which the at least one optoelectronic semiconductor chip and the at least one connecting element are embedded, wherein
[0072] providing the at least one connecting element comprises forming the at least one connecting element such that the connecting element falls below a level of the top surface in an interspace extending between the electric contact region of first polarity and the electric connection region of first polarity and excluding the electric connection region of first polarity.
[0073] According to at least one embodiment or configuration, the step of forming the at least one connecting element includes kinking or bending the at least one connecting element at least once such that an orientation or direction of the at least one connecting element is changed.
[0074] According to at least one embodiment or configuration, the step of providing the at least one connecting element includes a connection process, wherein the at least one connecting element is mechanically and electrically connected to both the electric contact region and the electric connection region of first polarity. For example, the connection process is a wire bond process . It is possible for the connection process to be executed by a tool like a capillary. The at least one kink can be formed during the connection and / or below described approaching processes .
[0075] According to at least one embodiment or configuration, the step of providing the at least one connecting element comprises starting the connection process at the at least one electric connection region of first polarity and moving the at least one connecting element to the electric contact2024PF01001 January 21, 2026
[0076] P2024, 1013 WO N - 14 -
[0077] region of first polarity. An overtravel can be performed, which means, for example, that the movement of the at least one connecting element is continued beyond the electric contact region of first polarity. As an example, the overtravel is performed before fixing the at least one connecting element to the electric contact region of first polarity. The movement can be performed along a diagonal path from the at least one electric connection region of first polarity to the electric contact region of first polarity. This kind of connection process may result in one kink or two kinks .
[0078] According to at least one embodiment or configuration, an approaching process is conducted after the overtravel and before fixing the at least one connecting element to the electric contact region of first polarity. The approaching process may include pushing the at least one connecting element closer to the at least one optoelectronic semiconductor chip . This kind of connection process may result in three or four kinks . The number of three kinks can be achieved, for example, by providing security bond means on the at least one connecting element and thus reducing the number of kinks for example from four kinks to three kinks .
[0079] According to at least one embodiment or configuration, the step of providing the at least one connecting element comprises carrying out an approaching process after finishing the connection process, wherein the approaching process may include pressing down the at least one connecting element, for example by the tool used for the connection process . The tool used for pressing down may leave a characteristic, noticeable imprint on the at least one connecting element . Hence, the at least one connecting element produced in this2024PF01001 January 21, 2026
[0080] P2024, 1013 WO N - 15 -
[0081] way can have a characteristic, noticeable imprint indicating the involved process . The whole process may result in four kinks of the at least one connecting element . As an example, the connection process may include a curved movement of the at least one connecting element starting from the electric contact region of first polarity and ending at the electric connection region of first polarity.
[0082] An even flatter design can be achieved, for example, by bonding the at least one connecting element without a bump, for example on the electric contact region of first polarity. In this case, the second kink can be the only kink of the connecting element .
[0083] According to at least one embodiment or configuration, the step of producing the enclosure includes at least one of the following processes : molding, for example foil-assisted molding, casting, dispensing. The kinked or bent shape of the at least one connecting element may reduce a flow speed of the enclosure material during the production process and thus a force on the at least one connecting element . Consequently, the risk of damage to the at least one connecting element is reduced and the reliability of the optoelectronic semiconductor device is improved.
[0084] The optoelectronic semiconductor device presented here is suitable for example as high-power converted LED enabling a flat design or as mid-power QFN- (Quad Flat No Leads) LED or as low-power LED including a silicone-f illed cavity. Possible applications include automotive, lighting, proj ection and signaling applications .2024PF01001 January 21, 2026
[0085] P2024, 1013 WO N 16
[0086] Further advantages, advantageous embodiments and developments will become apparent from the exemplary embodiments explained below in conjunction with the Figures .
[0087] Figure 1A shows a schematic cross-sectional view of an exemplary embodiment of an optoelectronic semiconductor device, and Figure IB shows a schematic illustration of an exemplary embodiment of a method for producing the optoelectronic semiconductor device shown in Figure 1A,
[0088] Figure 2 shows a comparative example of an optoelectronic semiconductor device,
[0089] Figure 3 shows a schematic illustration of a further exemplary embodiment of a method for producing the optoelectronic semiconductor device shown in Figure 1A,
[0090] Figure 4A shows a schematic cross-sectional view of a further exemplary embodiment of an optoelectronic semiconductor device, and Figure 4B shows a schematic illustration of an exemplary embodiment of a method for producing the optoelectronic semiconductor device shown in Figure 4A,
[0091] Figures 5 and 6 show schematic cross-sectional views of further exemplary embodiments of optoelectronic semiconductor devices .
[0092] The Figures each show only a section of the optoelectronic semiconductor device, wherein the missing part is illustrated by a dashed rectangle .2024PF01001 January 21, 2026
[0093] P2024, 1013 WO N 17
[0094] Identical, equivalent or equivalently acting elements may be indicated with the same reference numerals in the figures . The figures are schematic illustrations and thus not necessarily true to scale . Comparatively small elements and particularly layer thicknesses can rather be illustrated exaggeratedly large for the purpose of better clarification.
[0095] In connection with Figures 1A and IB an exemplary embodiment of an optoelectronic semiconductor device 100, which is a radiation emitting device, and a method of producing the optoelectronic semiconductor device 100 are described. Even though all exemplary embodiments relate to radiation emitting devices, the teaching also applies to other semiconductor devices like radiation detection devices, for example .
[0096] The optoelectronic semiconductor device 100 comprises an optoelectronic semiconductor chip 10, wherein the optoelectronic semiconductor chip 10 includes a semiconductor body 1 with a top surface 1A and an electric contact region of first polarity 2 arranged on the semiconductor body 1, for example arranged on the top surface 1A of the semiconductor body 1. The electric contact region of first polarity 2 can be a metallization applied to the semiconductor body 1 and can form a first electrode, such as a p- or n-electrode, of the optoelectronic semiconductor chip 10. The optoelectronic semiconductor body 1 can comprise a first semiconductor region (not shown) of a first conductivity, a second semiconductor region of a second conductivity (not shown) different from the first conductivity, and an active zone (not shown) arranged between the first and second semiconductor regions and provided for generating electromagnetic radiation with a wavelength for example in the visible to infrared spectral range, for example blue2024PF01001 January 21, 2026
[0097] P2024, 1013 WO N - 18 -
[0098] light . For example, the first semiconductor region has a p-type conductivity, while the second semiconductor region has an n-type conductivity. However, it is also possible that the first semiconductor region has an n-type conductivity and the second semiconductor region has a p-type conductivity. As mentioned above, suitable materials for the semiconductor regions or semiconductor layers of the semiconductor body 1 are, for example, materials based on arsenide, phosphide or nitride compound semiconductors .
[0099] The optoelectronic semiconductor device 100 further comprises an electric connection region of first polarity 11 laterally adj acent to the optoelectronic semiconductor chip 10. The electric connection region of first polarity 11 may form a first electrode, such as a p- or n-electrode of the optoelectronic semiconductor device 100. As mentioned above, "lateral" may denote directions parallel or essentially parallel to a main extension plane of the optoelectronic semiconductor device 100. For example, "laterally adj acent" means that the electric connection region of first polarity 11 follows the optoelectronic semiconductor chip 10 in a lateral direction L without any lateral overlaps .
[0100] The optoelectronic semiconductor device 100 further comprises a connecting element 12 electrically connecting the electric contact region of first polarity 2 to the electric connection region of first polarity 11. For example, the connecting element 12 is a bond wire . As an example, the bond wire is a metal wire made of Au or made of a compound of Au like an Au-Ag alloy, which appears more whitish and thus reduces the visibility of the bond wire compared to Au.2024PF01001 January 21, 2026
[0101] P2024, 1013 WO N - 19 -
[0102] The connecting element 12 falls below a level of the top surface 1A in an interspace s extending between the electric contact region of first polarity 2 and the electric connection region of first polarity 11 and excluding the electric connection region of first polarity 11. This is the case with all exemplary embodiments described in connection with the Figures .
[0103] The connecting element 12 has a multi-kinked or multi-curved shape with more than one kink. As an example, the connecting element 12 has four kinks KI, K2, K3, K4 characterized by a profile similar or equal to a convex curvature or a concave curvature . A first kink KI is arranged in a first section of the connecting element 12 facing the electric contact region 2. A second kink K2 is arranged in a second section of the connecting element 12 facing the electric connection region 11. A third kink K3 is arranged between the first kink KI and the second kink K2 . A fourth kink K4 is arranged between the first kink KI and the third kink K3 and in the interspace s extending between the electric contact region of first polarity 2 and the electric connection region of first polarity 11. The first and second kinks KI, K2 each have a profile similar or equal to a convex curvature . The third and fourth kinks K3, K4 each have a profile similar or equal to a concave curvature .
[0104] The optoelectronic semiconductor device 100 further comprises a carrier element 15, on which the optoelectronic semiconductor chip 10 is mounted. An electric connection region of second polarity 13 is arranged between the optoelectronic semiconductor chip 10 and the carrier element 15. Moreover, the electric connection region of first polarity 11 is arranged on the carrier element 15. For2024PF01001 January 21, 2026
[0105] P2024, 1013 WO N - 20 -
[0106] example, the electric connection regions 11, 13 are metallizations applied to the carrier element 15.
[0107] The electric connection region of second polarity 13 is provided for further electrical contacting of the optoelectronic semiconductor chip 10 and forms a second electrode of the optoelectronic semiconductor device 100. The first semiconductor region can be arranged on a side of the semiconductor body 1 facing the electrical connection region of the second polarity 13. The second semiconductor region can be arranged on a side of the semiconductor body 1 facing away from the electrical connection region of second polarity 13. For example, the electric contact region of first polarity 2 can be electrically conductively connected to the first semiconductor region. Furthermore, the second semiconductor region can be electrically conductively connected to an electric contact region or structure of second polarity of the semiconductor chip 10, wherein the electric contact region or structure of second polarity is electrically conductively connected to the electric connection region of second polarity 13.
[0108] The kinks KI, K2, K3, K4 are embodied in such a way that the connecting element 12 is as close as possible to an edge of a composite including the carrier element 15, the optoelectronic semiconductor chip 10 and the electric connection region of first polarity 11. Starting from the electric contact region of first polarity 2, the connecting element 12 in the first section is bent around an edge of the semiconductor body 1 towards a plane A-A where the connecting element 12 is connected to the electric connection region of first polarity 11. Plane A-A, for example, is close to a top side 15A of the carrier element 15. Starting from the2024PF01001 January 21, 2026
[0109] P2024, 1013 WO N - 21 -
[0110] electric connection region of first polarity 11, the connecting element 12 in the second section is led out of plane A-A and bent back towards plane A-A. The third and fourth kinks K3, K4 are arranged such that the first and second kinks KI, K2 are adapted to one another .
[0111] Plane A-A lies lower than a plane B-B where the connecting element 12 is connected to the electric contact region of first polarity 2. For example, a vertical distance between the planes A-A, B-B correlates to a vertical extension or height hl of the semiconductor body 1, wherein the vertical extension or height is measured along a vertical direction V, which runs traverse, for example perpendicular to the lateral direction L . The vertical extension or height hl of the semiconductor body 1 may range from 110 to 130 pm, wherein tolerances of ± 10% are possible .
[0112] The connecting element 12 comprises a top section 12A above a top surface 1A of the semiconductor body 1, wherein the top section 12A follows the top surface 1A in the vertical direction V. The top surface 1A delimits the semiconductor body 1 on a side facing a top side 100A of the optoelectronic semiconductor device 100, which is opposite to a bottom side 100B of the optoelectronic semiconductor device 100 formed by a bottom surface of the carrier element 15 and serving for mounting the optoelectronic semiconductor device 100 on a base, for example a printed circuit board. The top side 100A is a radiation transmission surface, where radiation exits the optoelectronic semiconductor device 100.
[0113] A lateral extension al of the top section 12A is at most twice the lateral extension a2 of the electric contact region 2 and / or at most five times the thickness d of the connecting2024PF01001 January 21, 2026
[0114] P2024, 1013 WO N 22
[0115] element 12, wherein the thickness d may denote an extension perpendicular to a main extension direction of the connecting element 12. The lateral extension al of the top section 12A may range from 100 to 200 pm, wherein tolerances of ± 10% are possible . The thickness d may range from 18 to 30 pm, wherein tolerances of ± 10% are possible .
[0116] In relation to the comparative example of Figure 2, which shows an optoelectronic semiconductor device 100' including a connecting element 12' having a single kink outside an interspace s' extending between an electric contact region of first polarity 2' and an electric connection region of first polarity 11' and excluding the electric connection region of first polarity 11' and having a lateral extension al' of a top section 12A' ranging from 500 to 800 pm, the lateral extension al of the top section 12A is relatively small, resulting in less visibility and a reduced risk of exposure of the connecting element 12 on the top side 100A of the optoelectronic semiconductor device 100. The top section 12A includes the first kink KI, which enables the relatively small lateral extension al of the top section 12A.
[0117] The optoelectronic semiconductor device 100 further comprises a conversion element 3, which is provided for wavelength conversion of the radiation emitted by the semiconductor body 1 or the active zone of the semiconductor body 1. At least part of the radiation can be converted into radiation of a longer wavelength, for example yellow light . The optoelectronic semiconductor chip 1 can therefore emit mixed-colored radiation, for example white light .
[0118] The conversion element 3 is arranged on the top surface 1A of the semiconductor body 1 and may have a vertical extension or2024PF01001 January 21, 2026
[0119] P2024, 1013 WO N - 23 -
[0120] height h2 of 30 gm, wherein tolerances of ± 10% are possible . The connecting element 12 does not protrude beyond the conversion element 3 on a top side 100A of the optoelectronic semiconductor device 100. Moreover, the conversion element 3 does not proj ect laterally beyond the top surface 1A of the semiconductor body 1. As mentioned above, the conversion element 3 can be a ceramic plate made of conversion material or a plastic layer with embedded conversion particles .
[0121] The optoelectronic semiconductor device 100 further comprises an enclosure 14, in which the optoelectronic semiconductor chip 10 and the connecting element 12 are embedded. The enclosure 14 laterally surrounds the optoelectronic semiconductor chip 10. Furthermore, the connecting element 12 is embedded, for example completely, in the enclosure 14. Advantageously, the connecting element 12 does not protrude beyond the enclosure 14 on the top side 100A of the optoelectronic semiconductor device 100. This can be achieved by lowering the connecting element 12 under the level of the top surface 1A in the interspace s and providing the connecting element 12 with kinks and thus reducing a vertical extension or height h3 (see Figure IB) of the connecting element 12, wherein the height h3 may be at most 160 gm with possible tolerances of ± 10% . Moreover, the height h2 of the conversion element 3 can be reduced by reducing the height h3 of the connecting element 12. Advantageously, with a thinner conversion element 3, a higher conversion efficiency and optical performance and a higher contrast of the semiconductor device 100 can be achieved.
[0122] The enclosure 14 can be embodied in a step-free way, for example in a planar manner on the top side 100A of the optoelectronic semiconductor device 100. As an example, the2024PF01001 January 21, 2026
[0123] P2024, 1013 WO N 24
[0124] enclosure 14 does not cover the conversion element 3 on a top side 3A facing the top side 100A of the optoelectronic semiconductor device 100. However, it is also possible that the enclosure 14 covers the conversion element 3 on its top side 3A.
[0125] As mentioned above, the enclosure 14 can be formed from an enclosure material comprising a base material, for example a radiation transmissive base material like silicone and / or epoxy, wherein reflective particles formed from a material including TiO2 and / or ZrO2 can be embedded in the base material such that the enclosure 14 appears white, for example .
[0126] In summary, the optoelectronic semiconductor device
[0127] 100 described herein has improved optical properties and an improved reliability due to the reduced lateral extension al of the top section 12A and the reduced vertical extension h3 of the connecting element 12.
[0128] The optoelectronic semiconductor device 100 may be produced by a method comprising steps of providing the semiconductor chip 10 and providing the electric connection region of first polarity 11 laterally adj acent to the optoelectronic semiconductor chip 10. The method may further comprise a step of providing the connecting element 12, which includes forming the connecting element 12 with at least one kink, for example with four kinks KI, K2, K3, K4 . The step of forming the connecting element 12 with at least one kink includes kinking or bending the connecting element 12 at least once such that an orientation or direction of the at least one connecting element 12 is changed.2024PF01001 January 21, 2026
[0129] P2024, 1013 WO N - 25 -
[0130] The step of providing the connecting element 12 includes a connection process, for example a wire bond process, wherein the connecting element 12 is mechanically and electrically connected to both the electric contact region 2 and the electric connection region of first polarity 11. The connecting process can be executed by a tool 20 like a capillary (see Figure 3) .
[0131] As becomes evident from Figure IB, the step of providing the connecting element 12 includes a first stage I, wherein the connection process is started at the electric connection region of first polarity 11 and the connecting element 12 is moved to the electric contact region of first polarity 2 and the movement is continued beyond the electric contact region of first polarity 2, thus performing an overtravel . The movement can be conducted along a curved path.
[0132] As becomes evident from Figure IB, the step of providing the connecting element 12 includes a second stage II, which follows the first stage I and includes an approaching process, wherein the approaching process comprises pushing the connecting element 12 closer to the optoelectronic semiconductor chip 1 and the carrier element 15.
[0133] As becomes evident from Figure IB, the step of providing the connecting element 12 includes a third stage III, which follows the second stage II and ends the connection process by fixing the connecting element 12 to the electric contact region of first polarity 2. The kinks KI, K2, K3, K4 can be at least partially formed during one of the connection and approaching processes .2024PF01001 January 21, 2026
[0134] P2024, 1013 WO N - 26 -
[0135] Advantageously, the three-stage process as described leads to an ultra-low loop form of the connecting element 12.
[0136] The method may further comprise a step of producing the enclosure 14, in which the optoelectronic semiconductor chip 1 and the connecting element 12 are embedded. This step can include at least one of the following processes : molding, for example foil-assisted molding (FAM) , casting, dispensing. The multi-kinked or multi-bent shape of the connecting element 12 may reduce a flow speed of the enclosure material during the production process and thus a force on the connecting element 12 in comparison to the comparative example of Figure 2 showing a high loop form of the connecting element 12' .
[0137] Consequently, the risk of damage to the at least one connecting element 12 is reduced and the reliability of the optoelectronic semiconductor device 100 is improved compared to the comparative example of Figure 2.
[0138] The method may be extended to the production of more than one optoelectronic semiconductor device 100 by providing more than one semiconductor chip 10, more than one connecting element 12, more than one electric connection region of first polarity 11 and an overall enclosure 14, wherein one semiconductor chip 10 is connected to one electric connection region of first polarity 11 by one connecting element 12.
[0139] Besides, the optoelectronic semiconductor device
[0140] 100 and the method for producing it may have any of the features, characteristics and advantages mentioned in connection with the further exemplary embodiments .
[0141] In connection with Figure 3, a further exemplary embodiment of a method for producing the optoelectronic semiconductor2024PF01001 January 21, 2026
[0142] P2024, 1013 WO N - 27 -
[0143] device 100 shown in Figure 1A is described. The method differs from the one described in connection with Figure IB inter alia by the order of the method steps . According to the exemplary embodiment of Figure 3, the step of providing the connecting element 12 comprises carrying out the approaching process after finishing the connection process . For example, the connection process, which may be a wire bond process using a tool 20 like a capillary, can be started at the electric contact region of first polarity 2, performing a curved movement of the connecting element 12, and ended at the electric connection region of first polarity 11.
[0144] Afterwards, the tool 20 can be moved on top of the connecting element 12 pressing it down in a force-controlled touchdown (see arrows) . The tool 20 may leave a characteristic, noticeable imprint on the connecting element 12. Hence, the connecting element 12 can have a characteristic, noticeable imprint indicating the involved production process . Four kinks can be formed at least partially during one of the connection and approaching processes .
[0145] Besides, the method may have any of the features, characteristics and advantages mentioned in connection with the further exemplary embodiments .
[0146] In connection with Figures 4A and 4B, a further exemplary embodiment of an optoelectronic semiconductor device
[0147] 100 and a method for producing it is described. The connecting element 12 has precisely two kinks KI, K2, wherein each kink KI, K2 has a profile similar or equal to a convex curvature . The optoelectronic semiconductor device 100 differs from the one of Figure 1A in that the connecting element 12 has a linear rather than a curved shape between the first and second kinks KI, K2 . The connecting element 122024PF01001 January 21, 2026
[0148] P2024, 1013 WO N - 28 -
[0149] can be bonded without a bump, for example on the electric contact region of first polarity 2. In this case, the second kink K2 can be the only kink of the connecting element 12.
[0150] In accordance with the exemplary embodiment described in connection with Figure IB, the step of providing the connecting element 12 may comprise starting the connection process at the electric connection region of first polarity 11 and moving the connecting element 12 along a diagonal path to the electric contact region of first polarity 2, wherein a temporary touch of the semiconductor chip 10 by the connecting element 12 is allowed. An overtravel is performed (see stage I ) before fixing the connecting element 12 to the electric contact region of first polarity 2 in a backward movement (see stage II ) . Differing from the method described in connection with Figure IB, the approaching process is omitted .
[0151] Besides, the optoelectronic semiconductor device
[0152] 100 and the method may have any of the features, characteristics and advantages mentioned in connection with the further exemplary embodiments .
[0153] Figure 5 shows a further exemplary embodiment of an optoelectronic semiconductor device 100. The connecting element 12 of the optoelectronic semiconductor device 100 has precisely three kinks KI, K2, K3, wherein the first kink KI has a profile similar or equal to a convex curvature and the second and third kinks K2, K3 each have a profile similar or equal to a concave curvature . The optoelectronic semiconductor device 100 differs from the one of Figure 1A in that it comprises security bond means 16 arranged at the end of the connecting element 12 bonded to the electric2024PF01001 January 21, 2026
[0154] P2024, 1013 WO N - 29 -
[0155] connection region of first polarity 11. The security bond means 16, which may be a metal layer, suppress the kink at the end of the connecting element 12 so that the number of kinks is reduced from four to three, for example . The security bond means 16 reduce the risk of losing electric contact for example if the bond at the end of the connecting element 12 is broken or damaged.
[0156] Besides, the optoelectronic semiconductor device
[0157] 100 and the method may have any of the features, characteristics and advantages mentioned in connection with the further exemplary embodiments .
[0158] In connection with Figure 6, a further exemplary embodiment of an optoelectronic semiconductor device 100 is described. A bump 17 (see Figure 1A, for example) underneath the end of the connecting element 12 fixed to the electric contact region of first polarity 2 is omitted such that the top section 12A of the connecting element 12 has a smaller vertical extension and the height h3 of the connecting element 12 is reduced. Moreover, the optoelectronic semiconductor device 100 comprises a data matrix code 18 on its top side 100A. Reducing the lateral extension al of the top section 12A of the connecting element 12 as described above makes more space available for the data matrix code 18.
[0159] Besides, the optoelectronic semiconductor device
[0160] 100 may have any of the features, characteristics and advantages mentioned in connection with the further exemplary embodiments .
[0161] The invention is not limited to these embodiments by the description based on the embodiments . Rather, the invention2024PF01001 January 21, 2026
[0162] P2024, 1013 WO N 30
[0163] includes any new feature and any combination of features, which includes in particular any combination of features in the patent claims, even if this feature or this combination itself is not explicitly indicated in the patent claims or embodiments .
[0164] This patent application claims the priority of German patent application 102025106021.5, the disclosure content of which is hereby incorporated by reference .2024PF01001 January 21, 2026
[0165] P2024, 1013 WO N 31
[0166] References
[0167] 1 semiconductor body
[0168] 1A top surface
[0169] 2, 2 ' electric contact region of first polarity 3 conversion element
[0170] 3A top side
[0171] 10 optoelectronic semiconductor chip
[0172] 11, 11 ' electric connection region of first polarity 12, 12 ' connecting element
[0173] 12A, 12A' top section
[0174] 13 electric connection region of second polarity 14 enclosure
[0175] 15 carrier element
[0176] 16 security bond means
[0177] 17 bump
[0178] 18 data matrix code
[0179] 20 tool
[0180] 100, 100' optoelectronic semiconductor device 100A top side
[0181] 100B bottom side
[0182] al, al' , a2 lateral extension
[0183] d thickness
[0184] hl, h2, h3 height, vertical extension
[0185] s, s' interspace
[0186] A-A, B-B plane
[0187] K1-K4 first, second, third, fourth kink
[0188] L lateral direction2024PF01001 January 21, 2026
[0189] P2024, 1013 WO N
[0190] - 32 - V vertical direction
Claims
2024PF01001 January 21 , 2026P2024 , 1013 WO N - 33 -Claims1 . An optoelectronic semiconductor device ( 100 ) comprising - an optoelectronic semiconductor chip ( 10 ) comprising- a semiconductor body ( 1 ) having a top surface ( 1A) and - an electric contact region of first polarity ( 2 ) arranged on the semiconductor body ( 1 ) ,- an electric connection region of first polarity ( 11 ) laterally adj acent to the optoelectronic semiconductor chip ( 10 ) ,- a connecting element ( 12 ) electrically connecting the electric contact region of first polarity ( 2 ) to the electric connection region of first polarity ( 11 ) ,- an enclosure ( 14 ) , in which the optoelectronic semiconductor chip ( 10 ) and the connecting element ( 12 ) are embedded, whereinthe connecting element ( 12 ) falls below a level of the top surface ( 1A) in an interspace ( s ) extending between the electric contact region of first polarity ( 2 ) and the electric connection region of first polarity ( 11 ) and excluding the electric connection region of first polarity ( 11 ) , and whereinthe connecting element ( 12 ) comprises a first kink (KI ) arranged in a first section of the connecting element ( 12 ) facing the electric contact region of first polarity ( 2 ) , a second kink (K2 ) arranged in a second section of the connecting element ( 12 ) facing the electric connection region of first polarity ( 11 ) and a third kink (K3 ) arranged between the first kink (KI ) and the second kink (K2 ) and / or in the interspace ( s ) extending between the electric contact region of first polarity ( 2 ) and the electric connection region of first polarity ( 11 ) .2024PF01001 January 21, 2026P2024, 1013 WO N 342. The optoelectronic semiconductor device ( 100) according to the preceding claim, wherein at least one of the first and second kinks (KI, K2 ) has a profile similar or equal to a convex curvature or a concave curvature .
3. The optoelectronic semiconductor device ( 100) according to any of the preceding claims, wherein a fourth kink (K4 ) is arranged between the first kink (KI ) and the third kink (K3) and / or in the interspace (s) extending between the electric contact region of first polarity (2 ) and the electric connection region of first polarity ( 11 ) .
4. The optoelectronic semiconductor device ( 100) according to any of the preceding claims, wherein the connecting element ( 12 ) comprises a top section ( 12A) above the top surface ( 1A) of the semiconductor body ( 1 ) .
5. The optoelectronic semiconductor device ( 100) according to the preceding claim, wherein the top section ( 12A) includes the first kink (KI ) .
6. The optoelectronic semiconductor device ( 100) according to one of the two preceding claims, wherein a lateral extension (al ) of the top section ( 12A) is at most twice the lateral extension (a2 ) of the electric contact region (2 ) and / or at most five times the thickness (d) of the connecting element ( 12 ) .
7. The optoelectronic semiconductor device ( 100) according to any of the preceding claims, wherein the connecting element ( 12 ) is a bond wire .2024PF01001 January 21 , 2026P2024 , 1013 WO N - 35 -8 . The optoelectronic semiconductor device ( 100 ) according to any of the preceding claims , wherein the optoelectronic semiconductor chip ( 10 ) comprises a conversion element ( 3 ) on the top surface ( 1A) of the semiconductor body ( 1 ) and the connecting element ( 12 ) does not protrude beyond the conversion element ( 3 ) on a top side ( 100A) of the optoelectronic semiconductor device ( 100 ) .9 . The optoelectronic semiconductor device ( 100 ) according to any of the preceding claims , wherein the connecting element ( 12 ) does not protrude beyond the enclosure ( 14 ) on a top side ( 100A) of the optoelectronic semiconductor device ( 100 ) .10 . The optoelectronic semiconductor device ( 100 ) according to any of the preceding claims , wherein the enclosure ( 14 ) is embodied in a step- free way on a top side ( 100A) of the optoelectronic semiconductor device ( 100 ) .11 . The optoelectronic semiconductor device ( 100 ) according to any of the preceding claims , wherein a plane (A-A) where the connecting element ( 12 ) is connected to the electric connection region of first polarity ( 11 ) lies lower than a plane (B-B ) where the connecting element ( 12 ) is connected to the electric contact region of first polarity ( 2 ) .12 . The optoelectronic semiconductor device ( 100 ) according to any of the preceding claims , which comprises security bond means ( 16 ) arranged at an end of the connecting element ( 12 ) bonded to the electric connection region of first polarity ( 11 ) •2024PF01001 January 21 , 2026P2024 , 1013 WO N 3613 . Method for producing at least one optoelectronic semiconductor device ( 100 ) according to any of the preceding claims , wherein the method comprises :- providing at least one optoelectronic semiconductor chip ( 10 ) comprising a semiconductor body ( 1 ) having a top surface ( 1A) and comprising an electric contact region of first polarity ( 2 ) arranged on the semiconductor body ( 1 ) , - providing at least one electric connection region of first polarity ( 11 ) laterally adj acent to the at least one optoelectronic semiconductor chip ( 10 ) ,- providing at least one connecting element ( 12 ) , which connects the electric contact region of first polarity ( 2 ) to the at least one electric connection region of first polarity ( 11 ) ,- producing an enclosure ( 14 ) , in which the at least one optoelectronic semiconductor chip ( 10 ) and the at least one connecting element ( 12 ) are embedded, wherein providing the at least one connecting element ( 12 ) comprises forming the at least one connecting element ( 12 ) such that the connecting element ( 12 ) falls below a level of the top surface ( 1A) in an interspace ( s ) extending between the electric contact region of first polarity ( 2 ) and the electric connection region of first polarity ( 11 ) and excluding the electric connection region of first polarity ( 11 ) and forming the at least one connecting element ( 12 ) such that the connecting element ( 12 ) comprises a first kink (KI ) arranged in a first section of the connecting element ( 12 ) facing the electric contact region of first polarity ( 2 ) , a second kink (K2 ) arranged in a second section of the connecting element ( 12 ) facing the electric connection region of first polarity ( 11 ) and a third kink (K3 ) arranged between the first kink (KI ) and the second kink (K2 ) and / or in the interspace ( s ) extending between the electric contact region2024PF01001 January 21, 2026P2024, 1013 WO N - 37 -of first polarity (2 ) and the electric connection region of first polarity ( 11 ) .
14. The method according to the preceding claim, wherein providing the at least one connecting element ( 12 ) comprises starting a connection process at the at least one electric connection region of first polarity ( 11 ) and moving the at least one connecting element to the electric contact region of first polarity (2 ) and performing an overtravel before fixing the at least one connecting element ( 12 ) to the electric contact region of first polarity (2 ) .
15. The method according to the preceding claim, wherein an approaching process is conducted after the overtravel and before fixing the at least one connecting element ( 12 ) to the electric contact region of first polarity (2 ) , wherein the approaching process includes pushing the at least one connecting element ( 12 ) closer to the at least one optoelectronic semiconductor chip ( 10) .
16. The method according to claim 13, wherein providing the at least one connecting element ( 12 ) comprises carrying out an approaching process after finishing a connection process, wherein the approaching process includes pressing down the at least one connecting element ( 12 ) .