This invention relates to the field of three-dimensional integrated
chip technology, specifically a locally passively cooled
chip and its fabrication method, as well as its integration structure and method with a
chip. The chip includes a first base layer, a portion of which is bonded to
a diamond layer. In this invention, the
diamond layer overlaps only with the logic computing region in the
vertical projection. Due to the high
thermal conductivity of single-
crystal diamond (2200 W / (m·K), heat is diffused laterally through the
diamond's high
thermal conductivity, rapidly expanding local hotspots laterally, reducing local
heat flux density, avoiding localized high temperatures, and lowering the hotspot temperature in the logic computing region. The storage region is covered by a second base layer made of single-
crystal silicon with a
thermal conductivity of 140 W / (m·K), thus hindering the
lateral expansion of heat. Furthermore, a filler layer further prevents the
lateral expansion of heat to the second base layer, avoiding the
impact of localized high temperatures in the logic computing region, maintaining low temperatures, and preventing high temperatures from affecting the performance of the storage region.