Static Indicating Devices TRIZ Cases

Monochromatic sub-hogels aligned with partitioned metasurface regions improve light field angular resolution while avoiding chromatic aberrations.

Overlapping capacitor and transistor connections in a staged scan circuit reduce clock coupling fluctuations and stabilize display gate driving signals.

A mesh common-voltage layout inside and outside the display area limits voltage drop while enabling thinner bezels and better uniformity.

Independent stage transfer and scan clocks let selected pixel rows refresh at different frequencies, cutting display panel power use.

Using same-polarity electrophoretic particles with matched threshold voltage enables stable custom colors with less flicker and simpler driving.

An overlapping gate driver and lower-density edge pixels shrink bezel area while allowing a curved display perimeter and dense central pixels.

Charged particles are confined into grid regions to keep smart glass clear and low-haze while preserving a visible pattern and dark-state attenuation.

A single conductive pattern layer places dense drive units and sensor connections together, enabling Mini-LED driving and substrate temperature monitoring.

Overlapping each green subpixel electrode with its own drive-transistor gate equalizes parasitic capacitance and improves display uniformity.

Spacers on the pixel-circuit metal layers shield gate-line coupling, reducing voltage jumps that shorten AMOLED light-emitting diode life.

Patterned edge regions and a dam contain protection layer spread, protecting driving circuits, touch sensitivity, and narrow bezel display quality.

A compensation unit stores threshold and supply voltage at each pixel to stabilize OLED driving current and improve brightness uniformity.

Auxiliary electrode lines and optimized signal spacing cut IR drop, RC delay, and color shift in high-resolution OLED substrates.

Different region refresh rates cut power in still-image areas while preserving image quality for moving content on the same display.

A sparse interconnected power-line layout raises transmittance in the camera region while preserving OLED sub-pixel power delivery.

Separated light-emitting control lines on different conductive layers cut interference and improve PWM dimming accuracy in display pixel circuits.

Different pixel densities above two under-display cameras preserve active screen area while supporting better image capture under changing light.

A frequency division control line lets cascaded gate driving circuits set different refresh rates in different display areas.

Capacitance electrodes in the bezel track cell gap and panel stress in real time, helping prevent yellow mura and bright spots.

Sensor-based posture and fold-angle detection rotates a foldable sub-display for correct tabletop viewing and fewer unintended flips.

Frequency-division gate driving lets display areas run at different refresh rates, cutting panel power use without sacrificing dynamic image quality.

Multiple scan drivers use block-specific pulse widths to offset RC load differences and keep display panel charging ratios uniform.

Protruding insulating patterns simplify LED-to-electrode connection steps, reducing mask variation and short-circuit risk.

Shared data lines, switching elements, and separate gate drivers let one display chip control multiple panel areas with lower cost.

Vertical transistor stacking with via coupling and shielding frees sub-pixel layout space while stabilizing voltage and signal transmission.

Alternating odd and even scan-line timing prevents adjacent signal overlap, improving pixel driving efficiency and brightness uniformity.

One shift register unit generates opposite-level gate signals from shared inputs, reducing clock lines, circuit complexity, and display frame width.

Image-based scan timing gives each OLED sub-pixel row enough charging time, improving refresh rate without undercharging low-grayscale rows.

A separator-adjacent connection electrode improves second-electrode contact, reducing deterioration impact and afterimage defects.

Selective overlap between pixel electrodes and power/data line boundaries reduces color cast and dispersion while preserving light transmission.

Dummy-pixel sensing updates compensation values to correct aging in display transistors and emitters, preserving image consistency over time.

A laser absorption layer and insulated pad structure protect display layers during etching while shrinking tiled display seams.

Frame-based synchronization separates touch scanning from light emission on a shared display stack, preventing signal interference and improving reliability.

Dual switch transistors extend pixel data-voltage charging with non-overlapping scan pulses, reducing bezel area, power use, and heat.

Light-transmissive areas between adjacent pixels raise transmittance while symmetric transistor overlap preserves pixel integrity and connectivity.

Split data lines and intermediary wirings route signals around the functional device region to cut lower bezel width and keep transmission stable.

Additional electrodes on the opposite substrate create series capacitance that offsets TFT-LCD parasitics and improves liquid crystal alignment.

Zigzag display lines and spaced disconnection points preserve light-transmitting sensor areas while reducing RC delay in large thin displays.

Grouped pixel updates with LMS correction compensate transistor aging faster than individual tuning, keeping display output accurate.

Stored sampling signals and common-mode noise removal let display pixels compensate transistor threshold and mobility variation with less sensing time and power.

Projecting one terminal's interface onto another enables direct drag, copy, and control actions, reducing manual steps in file transfer.

Adjacent pixel units alternate frame reception within each display period, raising electrophoretic display refresh rate and reducing screen stutter.

Neutral gray regions are replaced with dithered black-and-white data to cut visible artifacts and preserve fine detail in color electrophoretic displays.

Hazard-aware AR output ranks nearby objects by safety relevance, highlighting critical cues and suppressing distracting content.

By adjusting initialization potential and non-emission timing, this OLED pixel circuit suppresses low-luminance flicker and gradation loss.

Memory-mapped clock generation in a level shifter cuts input pins and simplifies display signal control while improving driving quality.

Stacked overlapping capacitor electrodes raise pixel capacitance to hold voltage longer, reducing leakage and supporting higher OLED image quality.

A bias wire linked to a bottom metal layer lets component areas keep displaying images while preserving light transmittance and ESD protection.

Multiple scan-driven initialization periods stabilize pixel voltages and current flow to improve luminance consistency and grayscale display quality.

Electrically isolated lower conductive patterns apply different voltages to suppress polarization, reducing stains and afterimages in displays.