A power semiconductor device high temperature bias test system and method

Abstract

The application provides a high-temperature bias test system and method for a power semiconductor device, which comprises a control module (1), a temperature control module (3), a detection module (4), a test channel (5) and a power module (2); the detection module (4) is used for simultaneously detecting the gate leakage current, the gate voltage, the collector-emitter leakage current and the collector-emitter voltage of the power semiconductor device, and can realize single or double test of high-temperature gate bias test and high-temperature blocking test of power semiconductor devices with the same or different specifications, has good compatibility, can meet the batch test demand, does not need to be equipped with multiple test systems, has low cost, high test efficiency, convenient maintenance, independent test branches, safe isolation, small mutual influence, accurate detection and high reliability; the requirements of test voltage and test junction temperature are strictly guaranteed, and the compatibility, utilization rate and accuracy of the test system are improved.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of semiconductor, in particular to a high-temperature bias test system and method for power semiconductor device. BACKGROUND

[0002] In system applications, the factors affecting the life of IGBT module are electrical load and environmental conditions (temperature, humidity, dust, cosmic rays, mechanical vibration, etc.). The influence of environmental factors may vary greatly and is uncertain in different applications. Existing research mainly focuses on the life or failure of IGBT module under the mutual coupling of electric field, thermal field and structural field. When IGBT module is running, each part generates heat due to loss, causing the temperature of the module to rise, and the change of temperature will also cause the change of electrical properties of each layer of material of the module, which in turn will affect the temperature distribution. At the same time, the thermal stress caused by temperature rise will cause fatigue failure of IGBT module. During the fatigue crack propagation period, local cracks will cause the reduction of electrical conductivity and thermal conductivity in that area, thereby causing temperature rise and voltage change. In order to meet the performance and life requirements in applications, a series of durability and reliability tests need to be carried out on IGBT devices during the development process, that is, through the comprehensive action of stress to accelerate the process of various physical changes and chemical reactions inside the device, and to expose potential defects in the early stage. According to relevant standards, high-temperature gate bias test and high-temperature blocking test are two very important reliability tests for IGBT devices. High-temperature gate bias test is mainly used to verify the stability of gate leakage current under the highest junction temperature and other test conditions, and the test object is mainly the IGBT gate oxide layer, which needs to be continuously monitored during the test. High-temperature blocking test is mainly used to verify the collector-emitter leakage current under the highest junction temperature, high voltage and other test conditions, and the test object is mainly the weakness or degradation effect of IGBT edge structure and passivation layer.

[0003] Due to the different test principles and test conditions of high-temperature gate bias test and high-temperature blocking test, the existing high-temperature bias test for power semiconductor devices can generally only perform single test, and the function is single, and the compatibility of different specifications and different temperatures is poor, which cannot meet the batch test demand. If batch testing is required, a certain number of different types of test equipment need to be equipped, and the production cost and maintenance cost are relatively high. SUMMARY

[0004] In order to overcome the shortcomings of the prior art that the function is single, the compatibility is poor and cannot meet the batch test demand, the present application provides a high-temperature bias test system for power semiconductor device, which comprises a control module (1), a temperature control module (3), a detection module (4), a test channel (5) and a power supply module (2); the control module (1) is connected with the temperature control module (3), the detection module (4) and the power supply module (2) respectively.

[0005] The measured power semiconductor device is arranged on a test channel (5);

[0006] The control module (1) issues temperature control instructions to the temperature control module (3) and controls the temperature control module (3), and simultaneously detects the gate leakage current, gate voltage, collector-emitter leakage current and collector-emitter voltage of the power semiconductor device by using the detection module (4).

[0007] The power supply module (2) comprises a low-voltage power supply unit (21) and a high-voltage power supply unit (22);

[0008] The test channel (5) comprises a plurality of test branches, which are connected in parallel between the low-voltage power supply unit (21) and the high-voltage power supply unit (22).

[0009] A gate protection resistor is arranged between the low-voltage power supply unit (21) and the test branch, and the gate protection resistor is used to limit the gate current of the power semiconductor device and protect the low-voltage power supply unit (21);

[0010] A collector protection resistor is arranged between the high-voltage power supply unit (22) and the test branch, and the collector protection resistor is used to limit the collector current of the power semiconductor device and protect the high-voltage power supply unit (22).

[0011] The detection module (4) comprises a gate bias detection unit (41) and a blocking detection unit (42);

[0012] The gate bias detection unit (41) comprises:

[0013] A gate bias sampling resistor is connected in the test branch (5) and is used to detect the gate leakage current and gate voltage of the power semiconductor device;

[0014] A first analog conversion board is connected to both ends of the gate bias sampling resistor and is used to convert the gate leakage current and gate voltage detected by the gate bias sampling resistor into digital signals;

[0015] A first analog isolation terminal board is connected to the first analog conversion board and is used to transmit the digital signals converted by the first analog conversion board to the control module (1).

[0016] The blocking detection unit (42) comprises:

[0017] A blocking sampling resistor is connected in the test branch (5) and is used to detect the collector-emitter leakage current and collector-emitter voltage of the power semiconductor device;

[0018] A second analog conversion board is connected to both ends of the blocking sampling resistor and is used to convert the collector-emitter leakage current and collector-emitter voltage detected by the blocking sampling resistor into digital signals.

[0019] The second analog isolation terminal plate is connected with the second analog conversion plate, and is used for transmitting the digital signal converted by the second analog conversion plate to the control module (1).

[0020] The test branch comprises a gate access switch, a collector access switch, a gate shorting switch, a collector shorting switch and a selection switch.

[0021] One end of the gate bias sampling resistor and the blocking sampling resistor is connected to the negative electrode of the power module (2), and the other end thereof is connected to the emitter of the power semiconductor device through the selection switch; one end of the gate access switch is connected to the gate protection resistor, and the other end thereof is connected to the emitter of the power semiconductor device through the gate shorting switch; one end of the collector access switch is connected to the collector protection resistor, and the other end thereof is connected to the emitter of the power semiconductor device through the collector shorting switch; the gate of the power semiconductor device is connected between the gate access switch and the gate shorting switch, the collector of the power semiconductor device is connected between the collector access switch and the collector shorting switch, and the emitter thereof is grounded.

[0022] When the system is in the working state, the opening and closing states of the gate access switch and the collector shorting switch are consistent, the opening and closing states of the collector access switch and the gate shorting switch are consistent, and the opening and closing states of the gate access switch and the collector access switch are opposite.

[0023] When the gate access switch and the collector shorting switch are both in the closed state, and the collector access switch and the gate shorting switch are both in the open state, the selection switch connects the gate bias sampling resistor to the test branch, and the test branch is used for gate bias test; when the gate access switch and the collector shorting switch are both in the open state, and the collector access switch and the gate shorting switch are both in the closed state, the selection switch connects the blocking sampling resistor to the test branch, and the test branch is used for blocking test.

[0024] The temperature control module (3) comprises a thermostat, and the thermostat is used for heating the power semiconductor device, and the power semiconductor device is installed in the thermostat.

[0025] The temperature control module (3) further comprises a heating unit.

[0026] The heating unit is arranged in the mounting station of the power semiconductor device, and is used for independently heating the power semiconductor device with a junction temperature lower than the maximum junction temperature.

[0027] The low-voltage power supply unit (21) and the high-voltage power supply unit (22) both comprise a plurality of direct-current voltage units, and the number of the direct-current voltage units is equal to the number of the test branches.

[0028] The output voltage of the direct current voltage unit in the low-voltage power supply unit (21) is not higher than 100V, and the output current is not greater than 12A;

[0029] The output voltage of the direct current voltage unit in the high-voltage power supply unit (22) is not lower than 1000V and not higher than 6000V, and the output current is not greater than 2A.

[0030] The power supply module (2) supplies power for the test channel (5) based on the state control command issued by the control module (1), and feeds back the state information of itself to the control module (1).

[0031] The control module (1) determines the working state of the power supply module (2) based on the state information fed back by the power supply module (2).

[0032] The power semiconductor device includes IGBT, triode or MOSFET.

[0033] In another aspect, the present application provides a high-temperature bias test method for a power semiconductor device, comprising:

[0034] The power semiconductor device to be tested is arranged on the test channel (5).

[0035] The control module (1) issues a temperature control command to the temperature control module (3).

[0036] The temperature control module (3) controls the temperature of the temperature control module (3) based on the temperature control command, and detects the gate leakage current, gate voltage, collector-emitter leakage current and collector-emitter voltage of the power semiconductor device by using the detection module (4).

[0037] The technical solution provided by the present application has the following beneficial effects:

[0038] The power semiconductor device high-temperature bias test system provided by the present application comprises a control module (1), a temperature control module (3), a detection module (4), a test channel (5) and a power supply module (2); the control module (1) is connected with the temperature control module (3), the detection module (4) and the power supply module (2) respectively; the power semiconductor device to be tested is arranged on the test channel (5); the control module (1) issues a temperature control command to the temperature control module (3) and controls the temperature of the temperature control module (3); the detection module (4) in the present application simultaneously detects the gate leakage current, gate voltage, collector-emitter leakage current and collector-emitter voltage of the power semiconductor device, has good compatibility and can meet the batch test demand.

[0039] The technical scheme provided by the application comprises a grid bias detection unit and a grid bias detection unit, the grid bias detection unit is used for detecting the grid leakage current and the grid voltage of the power semiconductor device, the blocking detection unit is used for detecting the collector-emitter leakage current and the collector-emitter voltage of the power semiconductor device, and the single or double test of the high-temperature grid bias test and the high-temperature blocking test of the power semiconductor device can be simultaneously realized;

[0040] The technical scheme provided by the application can not only test a plurality of power semiconductor devices of the same specification in batches through a plurality of test branches in a test channel, but also test power semiconductor devices of different specifications, without the need to equip a plurality of test systems, so that the cost is low, the test efficiency is high, and the maintenance is convenient;

[0041] In the technical scheme provided by the application, each test branch in the test channel is independent of each other, is safely isolated from each other, has little influence on each other, is accurate in detection, and is high in reliability;

[0042] In the technical scheme provided by the application, the low-voltage power supply unit, the high-voltage power supply unit and the temperature control module can be used to simultaneously realize the high-temperature bias test of power semiconductor devices of different specifications, strictly guarantee the requirements of test voltage and test junction temperature, and improve the compatibility, utilization rate and accuracy of the test system;

[0043] In the technical scheme provided by the application, the independent heating unit is arranged in the mounting station of the power semiconductor device, and can independently heat the power semiconductor device with a junction temperature lower than the maximum junction temperature;

[0044] In the technical scheme provided by the application, the plurality of test branches in the test channel are each provided with a mounting station of the power semiconductor device, the plurality of mounting stations are arranged in parallel, and the high-temperature grid bias test and the high-temperature blocking test are realized according to different opening and closing states of switches. BRIEF DESCRIPTION OF DRAWINGS

[0045] Figure 1 is a high-temperature bias test system structure diagram of the power semiconductor device in the embodiment of the application;

[0046] Figure 2 is a test channel structure diagram in the embodiment of the application;

[0047] Figure 3 is a test channel principle diagram in the embodiment of the application;

[0048] Figure 4 is a high-temperature bias test method flow chart of the power semiconductor device in the embodiment of the application. DETAILED DESCRIPTION

[0049] The application will be further described in detail below with reference to the drawings.

[0050] Embodiment 1

[0051] Embodiment 1 of the present invention provides a high-temperature bias testing system for power semiconductor devices, such as... Figure 1 As shown, it includes a control module 1, a temperature control module 3, a detection module 4, a test channel 5, and a power supply module 2; the control module 1 is connected to the temperature control module 3, the detection module 4, and the power supply module 2 respectively.

[0052] The power semiconductor device under test is placed on test channel 5;

[0053] The control module 1 sends a temperature control command to the temperature control module 3 and performs temperature control on the temperature control module 3. At the same time, the detection module 4 detects the gate leakage current, gate voltage, collector-emitter leakage current, and collector-emitter voltage of the power semiconductor device.

[0054] The aforementioned power semiconductor devices include IGBTs, transistors, or MOSFETs. In Embodiment 1 of this invention, an IGBT high-temperature bias test system is introduced as an example.

[0055] Power module 2 includes a low-voltage power supply unit 21 and a high-voltage power supply unit 22;

[0056] Test channel 5 includes multiple test branches, which are connected in parallel between the low-voltage power supply unit 21 and the high-voltage power supply unit 22.

[0057] The test channel structure diagram is as follows Figure 2 As shown, test channel 5 includes multiple test branches. These test branches are connected in parallel between the low-voltage power supply unit 21 and the high-voltage power supply unit 22. In embodiment 1 of this invention, the test channel includes n test branches. Figure 1 V in cc1 For low-voltage power supply unit 21, V cc2 For high-voltage power supply unit 22, R Gp R is the gate protection resistor. Cp R is the collector protection resistor. Gs1 To R Gsn R is the gate bias sampling resistor. Cs1 To R Csn To block the sampling resistor, KA G1 to KA Gn For gate-connected switches, KA C1 to KA Cn For collector connection to switch, KA GG1 to KA GGn KA is a gate short-circuit switch. CG1 to KA CGn For collector short-circuit switches, Se1 to Sen are selector switches, DUT1 to DUTn are IGBTs, RT1 to RTn are heating units, V TA power supply for the heating unit.

[0058] The low-voltage power supply unit 21 and the high-voltage power supply unit 22 each include a plurality of DC voltage units, each of which has independent constant voltage, current limiting, etc. functions, and the number of DC voltage units is equal to the number of test branches;

[0059] The output voltage of the DC voltage unit in the low-voltage power supply unit 21 is not higher than 100V, and the output current is not greater than 12A;

[0060] The output voltage of the DC voltage unit in the high-voltage power supply unit 22 is not lower than 1000V and not higher than 6000V, and the output current is not greater than 2A.

[0061] In the high-temperature bias test system for the power semiconductor device provided by Embodiment 1, a gate protection resistor is arranged between the low-voltage power supply unit 21 and the test branch, and the gate protection resistor is used to limit the gate current of the power semiconductor device and protect the low-voltage power supply unit 21;

[0062] A collector protection resistor is arranged between the high-voltage power supply unit 22 and the test branch, and the collector protection resistor is used to limit the collector current of the power semiconductor device and protect the high-voltage power supply unit 22.

[0063] The detection module 4 includes a gate bias detection unit 41 and a blocking detection unit 42;

[0064] The gate bias detection unit 41 includes:

[0065] A gate bias sampling resistor is connected in the test branch 5 and used to detect the gate leakage current and the gate voltage of the power semiconductor device;

[0066] A first analog conversion board is connected to both ends of the gate bias sampling resistor and used to convert the gate leakage current and the gate voltage detected by the gate bias sampling resistor into digital signals;

[0067] A first analog isolation terminal board is connected to the first analog conversion board and used to transmit the digital signals converted by the first analog conversion board to the control module 1.

[0068] The blocking detection unit 42 includes:

[0069] A blocking sampling resistor is connected in the test branch 5 and used to detect the collector leakage current and the collector voltage of the power semiconductor device;

[0070] A second analog conversion board is connected to both ends of the blocking sampling resistor and used to convert the collector leakage current and the collector voltage detected by the blocking sampling resistor into digital signals;

[0071] The second analog isolation terminal plate is connected with the second analog conversion plate, and is used for transmitting the digital signal converted by the second analog conversion plate to the control module 1.

[0072] The test branch includes a gate access switch, a collector access switch, a gate shorting switch, a collector shorting switch and a selection switch.

[0073] One end of the gate bias sampling resistor and the blocking sampling resistor is connected with the negative electrode of the power module 2, and the other end thereof is connected with the emitter of the power semiconductor device through the selection switch; one end of the gate access switch is connected with the gate protection resistor, and the other end thereof is connected with the emitter of the power semiconductor device through the gate shorting switch; one end of the collector access switch is connected with the collector protection resistor, and the other end thereof is connected with the emitter of the power semiconductor device through the collector shorting switch; the gate of the power semiconductor device is connected between the gate access switch and the gate shorting switch, the collector of the power semiconductor device is connected between the collector access switch and the collector shorting switch, and the emitter thereof is grounded.

[0074] The gate access switch and the collector shorting switch are in the same opening and closing state, the collector access switch and the gate shorting switch are in the same opening and closing state, and the gate access switch and the collector access switch are in opposite opening and closing states when the power semiconductor device high-temperature bias test system provided by the embodiment 1 of the present application is in the working state.

[0075] As shown in the figure, Figure 3 The gate access switch and the collector shorting switch in the test branch 1 and the test branch 2 are both in the closed state, and the collector access switch and the gate shorting switch in the test branch 1 and the test branch 2 are both in the open state, the selection switch connects the gate bias sampling resistor to the test branch, the test branch 1 and the test branch 2 are the gate bias test branch and are used for gate bias test, the gate access switch and the collector shorting switch in the test branch 3 are both in the open state, and the collector access switch and the gate shorting switch in the test branch 3 are both in the closed state, the selection switch connects the blocking sampling resistor to the test branch, and the test branch 3 is the blocking test branch and is used for blocking test.

[0076] The power module 2 supplies power for the test channel 5 based on the state control command issued by the control module 1, and feeds back the state information of itself to the control module 1.

[0077] The control module 1 determines the working state of the power module 2 based on the state information fed back by the power module 2.

[0078] The temperature control module 3 includes a thermostat, and the thermostat is used for heating the power semiconductor device, and the power semiconductor device is installed in the thermostat.

[0079] The temperature control module 3 further includes a heating unit.

[0080] The heating unit is arranged inside the mounting station of the power semiconductor device, and is used for independently heating the power semiconductor device with a junction temperature lower than the maximum junction temperature.

[0081] Embodiment 2

[0082] Based on the same inventive concept, the embodiment 2 of the present application also provides a high-temperature bias test method of a power semiconductor device. The power semiconductor device includes an IGBT, a triode or a MOSFET. The embodiment 2 of the present application takes the IGBT as an example to introduce the high-temperature bias test method of the IGBT. The specific flow chart is shown in FIG. 5, and the specific process is as follows: Figure 4

[0083] S101: The power semiconductor device to be tested is arranged on the test channel 5.

[0084] S102: The temperature control module 3 is controlled by the control module 1 to issue a temperature control command.

[0085] S103: The temperature control module 3 controls the temperature of the temperature control module 3 based on the temperature control command, and detects the gate leakage current, the gate voltage, the collector-emitter leakage current and the collector-emitter voltage of the power semiconductor device by using the detection module 4.

[0086] The power supply module 2 includes a low-voltage power supply unit 21 and a high-voltage power supply unit 22.

[0087] The test channel 5 includes a plurality of test branches. After the plurality of test branches are connected in parallel, the plurality of test branches are connected between the low-voltage power supply unit 21 and the high-voltage power supply unit 22.

[0088] The low-voltage power supply unit 21 and the high-voltage power supply unit 22 each include a plurality of direct-current voltage units. Each direct-current voltage unit has independent constant voltage and current limiting functions. The number of direct-current voltage units is equal to the number of test branches.

[0089] The output voltage of the direct-current voltage unit in the low-voltage power supply unit 21 is not higher than 100V, and the output current is not greater than 12A.

[0090] The output voltage of the direct-current voltage unit in the high-voltage power supply unit 22 is not lower than 1000V and not higher than 6000V, and the output current is not greater than 2A.

[0091] The gate protection resistor is connected between the low-voltage power supply unit 21 and the test branch, and is used for limiting the gate current of the power semiconductor device and protecting the low-voltage power supply unit 21.

[0092] The collector protection resistor is connected between the high-voltage power supply unit 22 and the test branch, and is used for limiting the collector current of the power semiconductor device and protecting the high-voltage power supply unit 22.

[0093] The gate bias detection unit 41 includes:​

[0094] A gate bias sampling resistor is connected in the test branch 5 for detecting the gate leakage current and the gate voltage of the power semiconductor device.

[0095] A first analog conversion board is connected to both ends of the gate bias sampling resistor for converting the gate leakage current and the gate voltage detected by the gate bias sampling resistor into digital signals.

[0096] A first analog isolation terminal board is connected to the first analog conversion board for transmitting the digital signals converted by the first analog conversion board to the control module 1.

[0097] The blocking detection unit 42 comprises:

[0098] A blocking sampling resistor is connected in the test branch 5 for detecting the collector-emitter leakage current and the collector-emitter voltage of the power semiconductor device.

[0099] A second analog conversion board is connected to both ends of the blocking sampling resistor for converting the collector-emitter leakage current and the collector-emitter voltage detected by the blocking sampling resistor into digital signals.

[0100] A second analog isolation terminal board is connected to the second analog conversion board for transmitting the digital signals converted by the second analog conversion board to the control module 1.

[0101] The test branch comprises the gate bias sampling resistor, the blocking sampling resistor, the gate access switch, the collector access switch, the gate shorting switch, the collector shorting switch and the selection switch.

[0102] One end of the gate bias sampling resistor and the blocking sampling resistor is connected to the negative pole of the power module 2, and the other end thereof is connected to the emitter of the power semiconductor device through the selection switch; one end of the gate access switch is connected to the gate protection resistor, and the other end thereof is connected to the emitter of the power semiconductor device through the gate shorting switch; one end of the collector access switch is connected to the collector protection resistor, and the other end thereof is connected to the emitter of the power semiconductor device through the collector shorting switch; the gate of the power semiconductor device is connected between the gate access switch and the gate shorting switch, the collector of the power semiconductor device is connected between the collector access switch and the collector shorting switch, and the emitter of the power semiconductor device is grounded.

[0103] When the high-temperature bias test system provided by the embodiment 1 of the present application is in the non-working state, all the switches are disconnected, and when the high-temperature bias test system is in the working state, the opening and closing states of the gate access switch and the collector shorting switch are consistent, the opening and closing states of the collector access switch and the gate shorting switch are consistent, and the opening and closing states of the gate access switch and the collector access switch are opposite.

[0104] When the gate access switch and the collector shorting switch are both in the closed state, and the collector access switch and the gate shorting switch are both in the open state, the selection switch connects the gate bias sampling resistor into the test branch, and the test branch is used for gate bias test; when the gate access switch and the collector shorting switch are both in the open state, and the collector access switch and the gate shorting switch are both in the closed state, the selection switch connects the blocking sampling resistor into the test branch, and the test branch is used for blocking test.

[0105] The temperature control module 3 comprises an oven for heating the power semiconductor device, and the power semiconductor device is installed inside the oven.

[0106] The temperature control module 3 further comprises a heating unit;

[0107] The heating unit is arranged inside the installation station of the power semiconductor device, and is used for independently heating the power semiconductor device with a junction temperature lower than the maximum junction temperature.

[0108] For the convenience of description, each part of the above-described device is described as various modules or units in function. Of course, the functions of each module or unit can be implemented in the same or multiple software or hardware in the implementation of the present application.

[0109] Those skilled in the art should understand that the embodiments of the present application can be provided as a method, a system, or a computer program product. Therefore, the present application can take the form of an entirely hardware embodiment, an entirely software embodiment, or an embodiment combining software and hardware aspects. Moreover, the present application can take the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.

[0110] The present application is described with reference to flowcharts and / or block diagrams according to the methods, devices (systems), and computer program products of the embodiments of the present application. It should be understood that each flow and / or block in the flowcharts and / or block diagrams, and the combination of flows and / or blocks in the flowcharts and / or block diagrams can be implemented by computer program instructions. These computer program instructions can be provided to a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing apparatus to produce a machine, so that the instructions executed by the computer or other programmable data processing apparatus produce a device that implements the functions specified in the flowcharts and / or block diagrams. Figure 1 The device that implements the functions specified in one flow or multiple flows and / or blocks Figure 1 The device that implements the functions specified in one flow or multiple flows and / or blocks

[0111] These computer program instructions can also be stored in a computer readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer readable memory produce an article of manufacture including instructions which implement the flow Figure 1 The functions described can be implemented in one or more flow(s) and / or block(s) and combinations thereof. Figure 1 The functions described can be implemented in one or more flow(s) and / or block(s) and combinations thereof.

[0112] These computer program instructions can also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flow Figure 1 The functions described can be implemented in one or more flow(s) and / or block(s) and combinations thereof. Figure 1 The functions described can be implemented in one or more flow(s) and / or block(s) and combinations thereof.

[0113] Finally, it should be noted that the above-mentioned embodiments are merely used to illustrate the technical solutions of the present application, rather than limit the present application. Based on the above-mentioned embodiments, the ordinary skilled in the art can still make modifications or equivalent replacements to the specific embodiments of the present application. Any modifications or equivalent replacements, which do not depart from the spirit and scope of the present application, are within the protection scope of the present application.

Claims

1. A high temperature bias test system for power semiconductor devices, characterized by, The device comprises a control module (1), a temperature control module (3), a detection module (4), a test channel (5) and a power module (2); the control module (1) is connected with the temperature control module (3), the detection module (4) and the power module (2) respectively; The power semiconductor device to be tested is arranged on the test channel (5); The control module (1) sends a temperature control instruction to the temperature control module (3) and controls the temperature of the temperature control module (3), and detects the gate leakage current, gate voltage, collector-emitter leakage current and collector-emitter voltage of the power semiconductor device by using the detection module (4); The power module (2) comprises a low-voltage power supply unit (21) and a high-voltage power supply unit (22); The test channel (5) comprises a plurality of test branches, and the plurality of test branches are connected between the low-voltage power supply unit (21) and the high-voltage power supply unit (22) in parallel; The positive pole of the low-voltage power supply unit (21) is connected with the gate of each power semiconductor device through each test branch, the positive pole of the high-voltage power supply unit (22) is connected with the collector of each power semiconductor device through each test branch, and the negative pole of the low-voltage power supply unit (21) and the negative pole of the high-voltage power supply unit (22) are connected with the emitter of each power semiconductor device through each test branch; The detection module (4) comprises a gate bias detection unit (41) and a blocking detection unit (42), the gate bias detection unit (41) is used for detecting the gate leakage current and gate voltage of the power semiconductor device, and the blocking detection unit (42) is used for detecting the collector-emitter leakage current and collector-emitter voltage of the power semiconductor device. A gate protection resistor (7) is arranged between the low-voltage power supply unit (21) and the test branch, and the gate protection resistor (7) is used for limiting the gate current of the power semiconductor device and protecting the low-voltage power supply unit (21); 2. The power semiconductor device high temperature bias test system of claim 1, wherein, A collector protection resistor (9) is arranged between the high-voltage power supply unit (22) and the test branch, and the collector protection resistor (9) is used for limiting the collector current of the power semiconductor device and protecting the high-voltage power supply unit (22). The gate bias detection unit (41) comprises:

3. The power semiconductor device high temperature bias test system of claim 2, wherein, A gate bias sampling resistor (8) connected in the test branch, used for detecting the gate leakage current and gate voltage of the power semiconductor device; A first analog conversion board connected at both ends of the gate bias sampling resistor (8), used for converting the gate leakage current and gate voltage detected by the gate bias sampling resistor (8) into a digital signal; A first analog isolation terminal board connected with the first analog conversion board, used for transmitting the digital signal converted by the first analog conversion board to the control module (1); The blocking detection unit (42) comprises: A blocking sampling resistor (10) connected in the test branch, used for detecting the collector-emitter leakage current and collector-emitter voltage of the power semiconductor device; A second analog conversion board connected at both ends of the blocking sampling resistor (10), used for converting the collector-emitter leakage current and collector-emitter voltage detected by the blocking sampling resistor (10) into a digital signal; ​ A second analog isolation terminal board is connected with the second analog conversion board, and is used for transmitting the digital signal converted by the second analog conversion board to the control module (1).

4. The power semiconductor device high temperature bias test system of claim 3, wherein, The test branch comprises a gate access switch (11), a collector access switch (12), a gate shorting switch (13), a collector shorting switch (14) and a selection switch (15); The gate bias sampling resistor (8) and the blocking sampling resistor (10) are connected at one end to the negative pole of the power module (2), and are connected at the other end to the emitter of the power semiconductor device through the selection switch (15); the gate access switch (11) is connected at one end to the gate protection resistor (7), and is connected at the other end to the emitter of the power semiconductor device through the gate shorting switch (13); the collector access switch (12) is connected at one end to the collector protection resistor (9), and is connected at the other end to the emitter of the power semiconductor device through the collector shorting switch (14); the gate of the power semiconductor device is connected between the gate access switch (11) and the gate shorting switch (13), the collector of the power semiconductor device is connected between the collector access switch (12) and the collector shorting switch (14), and the emitter of the power semiconductor device is grounded.

5. The power semiconductor device high temperature bias test system of claim 4, wherein, When the system is in the working state, the opening and closing states of the gate access switch (11) and the collector shorting switch (14) are consistent, the opening and closing states of the collector access switch (12) and the gate shorting switch (13) are consistent, and the opening and closing states of the gate access switch (11) and the collector access switch (12) are opposite.

6. The power semiconductor device high temperature bias test system of claim 5, wherein, When the gate access switch (11) and the collector shorting switch (14) are both in the closed state, and the collector access switch (12) and the gate shorting switch (13) are both in the open state, the selection switch (15) connects the gate bias sampling resistor (8) to the test branch, and the test branch is used for gate bias testing; when the gate access switch (11) and the collector shorting switch (14) are both in the open state, and the collector access switch (12) and the gate shorting switch (13) are both in the closed state, the selection switch (15) connects the blocking sampling resistor (10) to the test branch, and the test branch is used for blocking testing.

7. The power semiconductor device high temperature bias test system of claim 1, wherein, The temperature control module (3) comprises a thermostat, and the thermostat is used for heating the power semiconductor device, and the power semiconductor device is installed in the thermostat.

8. The power semiconductor device high temperature bias test system of claim 7, wherein, The temperature control module (3) further comprises a heating unit; The heating unit is arranged in the installation station of the power semiconductor device, and is used for independently heating the power semiconductor device with a junction temperature lower than the maximum junction temperature.

9. The power semiconductor device high temperature bias test system of claim 2, wherein, The low-voltage power supply unit (21) and the high-voltage power supply unit (22) each comprise a plurality of DC voltage units, and the number of the DC voltage units is equal to the number of the test branches; The output voltage of the DC voltage unit in the low-voltage power supply unit (21) is not higher than 100V, and the output current is not greater than 12A; The output voltage of the DC voltage unit in the high-voltage power supply unit (22) is not lower than 1000V and not higher than 6000V, and the output current is not greater than 2A.

10. The power semiconductor device high temperature bias test system of claim 1, wherein, The power module (2) supplies power to the test channel (5) based on the state control command issued by the control module (1) and feeds back the state information of itself to the control module (1); The control module (1) determines the working state of the power module (2) based on the state information fed back by the power module (2).

11. The power semiconductor device high temperature bias test system of claim 1, wherein, The power semiconductor device includes IGBT, triode or MOSFET.

12. A method of high temperature bias testing of a power semiconductor device, characterized by, Comprise: The power semiconductor device to be tested is arranged on the test channel (5); The control module (1) issues a temperature control command to the temperature control module (3); The temperature control module (3) controls the temperature of the temperature control module (3) based on the temperature control command, and detects the gate leakage current, gate voltage, collector-emitter leakage current and collector-emitter voltage of the power semiconductor device by using the detection module (4); The control module (1) issues a conduction instruction to the test channel, so that the power semiconductor device forms a loop between the test branch in the test channel (5) and the low-voltage power supply unit (21) or the high-voltage power supply unit (22); The control module (1) issues a state control command to the low-voltage power supply unit (21) or the high-voltage power supply unit (22); The low-voltage power supply unit (21) or the high-voltage power supply unit (22) supplies power to the test channel (5) based on the state control command; The gate bias detection unit (41) detects the gate leakage current and gate voltage of the power semiconductor device; The blocking detection unit (42) detects the collector-emitter leakage current and collector-emitter voltage of the power semiconductor device.

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