Qubit tuning via magnetic fields in superconductors

Abstract

An embodiment of a method for qubit tuning includes generating a first magnetic field through a portion of a first layer, the first layer including a material that exhibits superconductivity in a cryogenic temperature range, the portion of the first layer being above a critical temperature. In an embodiment, the method includes cooling the portion of the first layer to at least the critical temperature. In an embodiment, the method includes generating a second magnetic field in response to cooling the portion of the first layer to at least the critical temperature, the second magnetic field magnetically interacting with a qubit of a quantum processor chip such that a first magnetic flux of the first layer causes a first change in a first resonant frequency of the qubit by a first frequency shift value.

Description

Technical Field

[0001] The present invention generally relates to devices, methods and systems for adjusting the resonant frequency of quantum bits in quantum processors. More specifically, the present invention relates to an apparatus, method and system for quantum bit tuning via magnetic fields in superconductors. Background Art

[0002] In the following, the "Q" prefix in a word or phrase indicates reference to the word or phrase in the context of quantum computing, unless explicitly distinguished when used.

[0003] Molecules and subatomic particles obey the laws of quantum mechanics, a branch of physics that explores how the physical world works at a fundamental level. At this level, particles behave in strange ways, assume more than one state at the same time, and interact with other particles that are very far away. Quantum computing exploits these quantum phenomena to process information.

[0004] The computers we use today are called classical computers (also referred to herein as "conventional" computers or conventional nodes, or "CNs"). Conventional computers use conventional processors, semiconductor memories, and magnetic or solid-state storage devices, manufactured using semiconductor materials and techniques, in the so-called Von Neumann architecture. Specifically, the processors in conventional computers are binary processors, i.e., they operate on binary data represented in 1s and 0s.

[0005] A quantum processor (Q processor) uses the odd properties of quantum bit devices (complexly referred to herein as "qubits" or "qubits") to perform computational tasks. In the specific domain where quantum mechanics operates, particles of matter can exist in multiple states, such as an "on" state, an "off" state, and both "on" and "off" at the same time. Where classical computing using semiconductor processors is limited to using only on and off states (equivalent to 1 and 0 in binary code), Q processors exploit these quantum states of matter to output signals that are useful in data computation.

[0006] Conventional computers encode information in bits. Each bit can take on a value of either 1 or 0. These 1s and 0s act as on / off switches that ultimately drive the computer's functions. Quantum computers, on the other hand, are based on qubits, which differ from classical computers based on two key principles of quantum physics: superposition and entanglement. Superposition means that each qubit can represent both 1 and 0 at the same time. Entanglement means that qubits in superposition can be related to each other in a nonclassical way; that is, the state of one qubit (whether it is a 1 or a 0 or both) can depend on the state of another qubit, and there is more information that can be ascertained about the two qubits when they are entangled than when they are processed separately.

[0007] Using these two principles, qubits operate as more complex information processors, enabling quantum computers to function in a way that allows them to solve problems that are difficult to handle using conventional computers. IBM has successfully built and demonstrated the operability of a Q processor using superconducting qubits (IBM is a registered trademark of International Business Machines Corporation in the United States and other countries.)

[0008] A superconducting qubit includes a Josephson junction. A Josephson junction is formed by separating two thin-film superconducting metal layers with a non-superconducting material. When the metal in the superconducting layer is made superconducting - for example by lowering the temperature of the metal to a specific cryogenic temperature - electron pairs can tunnel from one superconducting layer through the non-superconducting layer to the other superconducting layer. In a qubit, the Josephson junction (which acts as a dispersed nonlinear inductor) is electrically connected in parallel with one or more capacitive devices that form a nonlinear microwave oscillator. The oscillator has a resonant / transition frequency determined by the inductance and capacitance values ​​in the qubit. Any reference to the term "qubit" is a reference to a superconducting qubit oscillator circuit that employs a Josephson junction, unless explicitly distinguished when used.

[0009] In the superconducting state, the material firstly offers no resistance to the passage of electric current. When the resistance drops to zero, the current can circulate inside the material without dissipating any energy. Secondly, the material exhibits the Meissner effect, i.e., external magnetic fields do not penetrate the superconductor, but remain on its surface, as long as they are weak enough. When the material no longer exhibits one or both of these properties, it is said to no longer be superconducting.

[0010] The critical temperature of a superconducting material is the temperature at which the material begins to exhibit superconducting properties. Superconducting materials exhibit very low or zero resistivity to the flow of electric current. A critical field is the highest magnetic field for a given temperature at which a material remains superconducting.

[0011] Superconductors are generally classified into one of two types. Type I superconductors exhibit a single transition at a critical field. When the critical field is reached, a Type I superconductor changes from a non-superconducting state to a superconducting state. Type II superconductors include two critical fields and two transition regions. At or below the lower critical field, Type II superconductors exhibit a superconducting state. Above the upper critical field, Type II superconductors do not exhibit superconducting properties. Between the upper and lower critical fields, Type II superconductors exhibit a mixed state. In the mixed state, Type II superconductors exhibit an incomplete Meissner effect, where an external magnetic field in quantized packets at specific locations penetrates the superconducting material.

[0012] The Meissner effect is due to the generation of a persistent current at the surface of a superconducting material. A persistent current is a permanent current that does not require an external power source. The persistent current generates an opposite magnetic field to cancel the external magnetic field throughout the body of the superconducting material. In the superconducting state, the persistent current does not decay over time due to the zero resistance characteristic.

[0013] Superconducting materials above a critical temperature allow penetration of an external magnetic field. Cooling the superconducting material to or below the critical temperature while maintaining an external magnetic field results in the generation of a persistent current. Since the superconducting material offers no resistance to the passage of current, the persistent current flows indefinitely. The external magnetic field can be turned off or removed completely and the persistent current maintained. The persistent current generates a magnetic field outside the superconducting material. The magnetic field generated by these persistent currents compensates for the changes in magnetic flux from the turned off external magnetic field. Superconducting materials act as permanent magnets as long as the temperature does not rise above the critical temperature.

[0014] The information processed by the qubit is carried or transmitted in the form of microwave signals / photons in the microwave frequency range. The microwave frequency output by a qubit is determined by the resonant frequency of the qubit. These microwave signals are captured, processed and analyzed to decipher the quantum information encoded therein. A readout circuit is a circuit coupled to the qubit in order to capture, read and measure the quantum state of the qubit. The output of the readout circuit is information that the Q processor can use to perform calculations.

[0015] A superconducting qubit has two quantum states - |0> and |1>. These two states can be the two energy states of an atom, such as the ground (|0>) and first excited state (|1>) of a superconducting artificial atom (superconducting qubit). Other examples include spin-up and spin-down of a nuclear or electron spin, the two positions of a crystal defect, and the two states of a quantum dot. Because the system is quantum in nature, any combination of these two states is allowed and valid.

[0016] In order for qubits to perform reliable quantum computations, quantum circuits, such as the qubits themselves, readout circuits associated with these qubits, and other parts of the Q processor must not change the energy state of the qubit, such as by injecting or dissipating energy, in any significant way or affect the relative phase between the |0> and |1> states of the qubit. This operational constraint on any circuit that operates with quantum information necessitates special considerations in the fabrication of semiconductor and superconducting structures used in such circuits.

[0017] The illustrative embodiments recognize that the resonant frequency of a qubit is inherently fixed when the qubit is manufactured, i.e., when the Josephson junction and capacitive elements of the qubit oscillator are manufactured on a Q processor chip. The illustrative embodiments further recognize that in the simplest implementation of a Q processor, at least two qubits are required to implement a quantum logic gate. Therefore, a Q processor chip is typically manufactured with at least 2, but often 8, 16, or more qubits on a single Q processor chip.

[0018] Some qubits are fixed-frequency qubits, i.e., their resonant frequency is immutable. Other qubits are frequency-tunable qubits. A Q processor can employ fixed-frequency qubits, frequency-tunable qubits, or a combination of these.

[0019] These illustrative embodiments recognize that it is difficult to manufacture single junction transmons or fixed frequency superconducting qubits with a specific exact frequency or exact frequency difference between adjacent qubits. This is primarily because the critical current of the Josephson junction is not a well controlled parameter during the manufacturing process. This results in a relatively wide spread in the critical current of Josephson junctions of the same design and area and manufactured on the same chip.

[0020] The illustrative embodiments recognize that when the resonant frequencies of two adjacent coupled qubits on a chip are the same or within a threshold frequency band or their higher transition frequencies are at or near resonance, then negative effects may occur, such as crosstalk, quantum decoherence, energy decay, generation of mixed states, unintended information transfer, quantum state leakage, etc. Having such qubits may also negatively impact the performance or utility of certain quantum gates (such as cross-resonance gates) that have strict requirements on the resonant frequency spectrum of the qubit on which the gate operates. Thus, the illustrative embodiments recognize that one challenge of coupled fixed-frequency qubit-based qubits in Q processors is frequency crowding or frequency conflict between adjacent qubits, especially when cross-resonance gates are used.

[0021] It is important to note that while the proposed qubit tuning technique is motivated by the need to resolve frequency conflicts for multiple coupled qubits on the same chip operating with cross-resonant gates, the proposed qubit tuning technique is general and can be applied to other kinds of quantum devices on a chip that require qubit tuning without penetrating the device package.

[0022] The illustrative embodiments recognize that a frequency tunable qubit (hereinafter referred to briefly as a "tunable qubit") has a flux-dependent inductance. Frequency tunability can be achieved, for example, by replacing the single Josephson junction of a fixed frequency qubit with a superconducting loop comprising one or more Josephson junctions. By changing the magnetic field passing through the loop, the inductance of the loop changes, which in turn changes the resonant frequency of the qubit, thereby making the qubit tunable. The illustrative embodiments recognize that one challenge in Q-processors based on tunable frequency qubits is the sensitivity to flux noise that causes phase shifts.

[0023] Currently, when the frequency of a flux-tunable qubit on a chip must be changed, there are two main methods used in the prior art to apply or change the flux of the loop through the qubit. The first method is to use a global superconducting coil attached to the qubit chip package. This method has the following advantages: having an external fully controllable magnetic source that does not penetrate the device package. Such an external source can be well filtered and avoids several negative effects. The disadvantage of this method is that the qubits cannot be controlled and tuned individually.

[0024] The second approach is to use on-chip magnetic field lines or flux lines placed on the Q processor chip and routed near the qubits. The advantages of this approach are: 1- it is scalable, 2- enables high density flux line systems for large Q processors, 3- allows tuning and control of individual qubits. The disadvantages of this approach are: 1- it introduces additional noise channels between the Q processor and the external environment, which can negatively affect the coherence and performance of the Q processor; 2- it is difficult to manufacture and route on-chip flux lines near the qubits inside the device package. Summary of the invention

[0025] Illustrative embodiments provide a superconducting device, method of manufacturing the same, and system. A superconducting qubit tuning apparatus of one embodiment includes a first layer configured to generate a magnetic field, the first layer including a material that exhibits superconductivity in a cryogenic temperature range. In one embodiment, the device includes a qubit of a Q processor chip, wherein the first layer is configured to magnetically interact with the qubit such that a first magnetic flux of the first layer causes a first change in a first resonant frequency of the qubit by a first frequency shift value.

[0026] In an embodiment, the apparatus comprises a heating element configured to heat a portion of the first layer to above a critical temperature. In an embodiment, the apparatus comprises a magnetic element configured to apply a magnetic field to the first layer. In an embodiment, the heating element is a resistor. In an embodiment, the heating element is a light source.

[0027] In one embodiment, the device comprises a wire of superconducting material formed into a coil structure. In one embodiment, the heating element is one of a plurality of heating elements, each heating element being configured to heat a corresponding portion of the first layer above a critical temperature.

[0028] In one embodiment, each portion of the first layer is configured to magnetically interact with a corresponding qubit of the plurality of qubits of the Q processor such that a magnetic flux of each portion causes a change in a resonant frequency of the corresponding qubit. In an embodiment, the first layer generates a first magnetic flux when operated within a temperature range between 20 Kelvin and 0.01 Kelvin, inclusive.

[0029] In one embodiment, the apparatus comprises a second layer configured to generate a magnetic field, the second layer comprising a material exhibiting superconductivity in a cryogenic temperature range. In an embodiment, the device comprises a magnetic element disposed on a surface of a chip, wherein the first layer is formed on an opposite surface of the chip. In one embodiment, the qubit is formed on a first surface of the Q processor chip. In an embodiment, the first layer is formed on an opposite surface of the Q processor chip.

[0030] In one embodiment, the apparatus comprises a magnetic element configured to apply a magnetic field to the first layer, the magnetic element being arranged on the first chip. In an embodiment, the first layer is arranged on the second chip.

[0031] One embodiment includes a method of making a qubit tuning device. In an implementation, the method includes forming a first layer configured to generate a magnetic field, the first layer including a material that exhibits superconductivity in a cryogenic temperature range. In one embodiment, the method includes forming a qubit on a Q processor chip, wherein the first layer is configured to magnetically interact with the qubit such that a first magnetic flux of the first layer causes a first change in a first resonant frequency of the qubit by the first frequency shift value.

[0032] In one embodiment, the method includes forming a second layer configured to generate a magnetic field, the second layer including a material that exhibits superconductivity in a cryogenic temperature range. In an embodiment, the first layer generates a first magnetic flux when operating in a temperature range between 20 Kelvin and 0.01 Kelvin, inclusive.

[0033] In one embodiment, the method includes arranging magnetic elements on a surface of a chip, wherein a first layer is formed on an opposing surface of the chip. In one embodiment, the qubits are formed on a first surface of the Q processor chip. In an embodiment, the first layer is formed on an opposing surface of the Q processor chip.

[0034] One embodiment includes a method of tuning a qubit. In one embodiment, the method includes generating a first magnetic field through a portion of a first layer, the first layer including a material that exhibits superconductivity in a cryogenic temperature range, the portion of the first layer being above a critical temperature. In an embodiment, the method includes cooling the portion of the first layer to at least the critical temperature. In an embodiment, the method includes generating a second magnetic field in response to cooling the portion of the first layer to at least the critical temperature, the second magnetic field magnetically interacting with a qubit of a Q processor chip such that a first magnetic flux of the first layer causes a first change in a first resonant frequency of the qubit by the first frequency shift value.

[0035] In one embodiment, the method includes heating the portion of the first layer above a critical temperature with a heating element before cooling the portion of the first layer. In one embodiment, the heating element is a resistor. In an embodiment, the heating element is embedded in the Q processor chip.

[0036] In one embodiment, the method comprises, after cooling the portion, shutting down a first magnetic field through the portion of the first layer.In an embodiment, the method comprises generating a third magnetic field through a second portion of the first layer.

[0037] In one embodiment, the method includes cooling a second portion of the first layer at or below the critical temperature. In one embodiment, the method includes generating a fourth magnetic field in response to cooling the second portion to magnetically interact with a second qubit of the Q processor chip such that a second magnetic flux of the first layer induces a first change in a second resonant frequency of the second qubit by a second frequency shift value.

[0038] In one embodiment, the method includes maintaining the first magnetic field while cooling the portion of the first layer. In one embodiment, the method includes forming the qubit on a first surface of the Q processor chip.

[0039] In one embodiment, the method includes forming a first layer on opposing surfaces of a Q processor chip. In one embodiment, the method includes forming a coil structure from a superconducting material wire, the coil structure being configured to generate the first magnetic field.

[0040] In one embodiment, the method includes forming a first layer on a first surface of a chip. In one embodiment, the method includes forming the coil structure on an opposite surface of the chip. In one embodiment, the method includes heating a portion of the first layer to above a critical temperature using a light source.

[0041] In one embodiment, the critical temperature of the first layer is between 20 Kelvin and 0.01 Kelvin, inclusive. In one embodiment, the method includes measuring a set of qubits to determine a set of qubit frequencies. In one embodiment, the method includes analyzing the set of qubit frequencies to determine instances of frequency crowding among the set of qubits.

[0042] In one embodiment, the method includes forming a plurality of coil structures configured to generate the first magnetic field. In one embodiment, the method includes heating portions of the first layer to above a critical temperature.

[0043] In one embodiment, the method includes generating a plurality of magnetic fields, each magnetic field corresponding to a portion of the plurality of portions of the first layer. In an embodiment, the method includes cooling the plurality of portions of the first layer to at least a critical temperature. In an embodiment, the method includes generating a second plurality of magnetic fields in response to cooling the plurality of portions of the first layer to at least a critical temperature, the second plurality of magnetic fields magnetically interacting with the plurality of qubits of the Q processor chip such that each of the plurality of magnetic fluxes of the first layer induces a first change in a first resonant frequency of a corresponding qubit in the plurality of qubits by a first frequency shift value.

[0044] Embodiments include a computer usable program product. The computer usable program product includes a computer readable storage device and program instructions stored on the storage device.

[0045] In one embodiment, the computer usable code is stored in a computer readable storage device in a data processing system, and wherein the computer usable code is transmitted from a remote data processing system over a network. In an embodiment, the computer usable code is stored in a computer readable storage device in a server data processing system, and wherein the computer usable code is downloaded to the remote data processing system over a network for use in a computer readable storage device associated with the remote data processing system.

[0046] Embodiments include a computer system. The computer system includes a processor, a computer-readable memory and a computer-readable storage device, and program instructions stored on the storage device for execution by the processor via the memory. BRIEF DESCRIPTION OF THE DRAWINGS

[0047] The novel features which are believed to be characteristic of the invention are set forth in the appended claims. However, the invention itself, as well as the preferred mode of use, other objects and advantages thereof, will be best understood by reference to the following detailed description of illustrative embodiments when read in conjunction with the accompanying drawings, in which:

[0048] Figure 1 depicts a block diagram of an example prior art configuration of a global superconducting coil that may be improved in accordance with one illustrative embodiment;

[0049] Figure 2 depicts a block diagram of an example configuration of an apparatus for qubit tuning using magnetic fields in a superconductor according to an illustrative embodiment;

[0050] Figure 3 depicts a cross-sectional view of an exemplary configuration of a qubit tuning device according to one illustrative embodiment;

[0051] Figure 4 depicts a cross-sectional view of an exemplary configuration of a qubit tuning device according to one illustrative embodiment;

[0052] Figure 5 depicts a cross-sectional view of an exemplary configuration of a qubit tuning device according to one illustrative embodiment;

[0053] Figure 6 depicts a cross-sectional view of an exemplary configuration of a qubit tuning device according to one illustrative embodiment;

[0054] Figure 7 depicts a cross-sectional view of an exemplary configuration of a qubit tuning device according to one illustrative embodiment;

[0055] Figure 8 depicts a cross-sectional view of an exemplary configuration of a qubit tuning device according to one illustrative embodiment;

[0056] Fig. 9 depicts a cross-sectional view of an exemplary configuration of a qubit tuning device according to one illustrative embodiment;

[0057] Fig.10 depicts a cross-sectional view of an exemplary configuration of a qubit tuning device according to one illustrative embodiment;

[0058] Fig.11 depicts a cross-sectional view of an exemplary configuration of a qubit tuning device according to one illustrative embodiment;

[0059] Fig.12 depicts a cross-sectional view of an exemplary configuration of a qubit tuning device according to one illustrative embodiment;

[0060] Fig.13depicts a cross-sectional view of an exemplary configuration of a qubit tuning device according to one illustrative embodiment;

[0061] Fig.14 depicts a cross-sectional view of an exemplary configuration of a qubit tuning device according to one illustrative embodiment;

[0062] Fig.15 depicts a block diagram of an example configuration of an apparatus for qubit tuning using magnetic fields in a superconductor according to an illustrative embodiment;

[0063] Fig.16 depicts a cross-sectional view of an exemplary configuration of a qubit tuning device according to one illustrative embodiment;

[0064] Fig.17 depicts a cross-sectional view of an exemplary configuration of a qubit tuning device according to one illustrative embodiment;

[0065] Fig.18 depicts a cross-sectional view of an exemplary configuration of a qubit tuning device according to one illustrative embodiment;

[0066] Fig.19 depicts a cross-sectional view of an exemplary configuration of a qubit tuning device according to one illustrative embodiment;

[0067] Fig. 20 depicts a block diagram of an example configuration of an apparatus for qubit tuning using magnetic fields in a superconductor according to an illustrative embodiment;

[0068] Fig.21 depicts a cross-sectional view of an exemplary configuration of a qubit tuning device according to one illustrative embodiment;

[0069] Fig. 22 depicts a cross-sectional view of an exemplary configuration of a qubit tuning device according to one illustrative embodiment;

[0070] Fig.23 depicts a flow chart of an example process for tuning a qubit according to an illustrative embodiment;

[0071] Fig.24 depicts a flow chart of an example process for tuning qubits according to one illustrative embodiment; and

[0072] Fig.25 Depicted is a flow diagram of an example process for tuning qubits in accordance with an illustrative embodiment. DETAILED DESCRIPTION

[0073] The illustrative embodiments used to describe the invention generally address and solve the above described need for individually tunable qubits on a single chip.The illustrative embodiments provide a method and apparatus for qubit tuning using magnetic fields in superconductors.

[0074] Operations described herein as occurring with respect to one or more frequencies should be interpreted as occurring with respect to signals of the one or more frequencies. All references to "signals" are references to microwave signals unless explicitly distinguished when used. Within the scope of the illustrative embodiments, temperatures at and below ninety-three Kelvin are considered cryogenic temperatures.

[0075] One embodiment provides a configuration of an apparatus for qubit tuning using magnetic fields in a superconductor. Another embodiment provides a method for manufacturing an apparatus for qubit tuning using magnetic fields in a superconductor, such that the method can be implemented as a software application. The application implementing the manufacturing method embodiment can be configured to operate in conjunction with an existing superconductor manufacturing system (such as a lithography system).

[0076] For clarity of description, and without implying any limitation thereto, some example configurations are used to describe the illustrative embodiments. In light of this disclosure, those of ordinary skill in the art will be able to conceive of many changes, adaptations, and modifications of the described configurations for achieving the described purposes, and these changes, adaptations, and modifications are considered within the scope of the illustrative embodiments.

[0077] Additionally, simplified diagrams of these example qubits, coils or flux sensing structures, housings, casings, and other circuit components are used in these figures and these illustrative embodiments. In actual manufacturing or circuits, there may be additional structures or components not shown or described herein, or different structures or components than those shown but for purposes described herein, without departing from the scope of the illustrative embodiments.

[0078] Furthermore, the illustrative embodiments are described with respect to specific actual or hypothetical components only as examples. The steps described by the different illustrative embodiments may be adapted to fabricate circuits using different components that may be purposed or repurposed to provide functionality in the manner described, and such adaptations are contemplated within the scope of the illustrative embodiments.

[0079] The illustrative embodiments are described with respect to certain types of materials, electrical properties, steps, shapes, sizes, quantities, frequencies, circuits, components, and applications by way of example only. Any particular representation of these and other similar products is not intended to limit the invention. Any suitable representation of these and other similar products may be selected within the scope of the illustrative embodiments.

[0080] The examples in this disclosure are only for clarity of description and are not limited to the illustrative embodiments. Any advantages listed here are only examples and are not intended to limit these illustrative embodiments. Additional or different advantages can be achieved by specific illustrative embodiments. In addition, specific illustrative embodiments may have some, all or no advantages listed above.

[0081] See also Figure 1 , which depicts a block diagram of an example configuration of a prior art global superconducting coil that may be improved according to an illustrative embodiment. A printed circuit board (PCB) 100 includes a microwave connector 101, a chip 102, and other components that may be required in an implementation. Chip 102 is an example of a Q processor that includes a plurality of qubits (e.g., qubits 104 and 106). In one embodiment, chip 102 may be mounted on printed circuit board 100 using a housing, a non-limiting example of which is described herein.

[0082] The global superconducting coil 108 is a flux inducing structure that is placed near the chip 102 to provide bias flux to all qubits on the chip 102. The global superconducting coil 108 is distinct from and separate from the chip 102. The global superconducting coil 108 is formed by winding a superconducting wire with a very thin insulating coating around a metal core or a metal rod, with both ends of the superconducting wire terminating at contacts 110 and 112. A direct current (DC) - current A - flows through the coil to generate a magnetic flux Φ. The flux Φ changes the output frequency of the qubits 104 and 106 by a certain amount. The flux dependence of this superconducting loop is periodic. The magnitude of the flux passing through these qubit loops depends on their distance from the global superconducting coil 108, and also on the background magnetic field, which may not be equal for these different qubits. In general, once the position of global superconducting coil 108 is fixed relative to chip 102 and the magnetic environment of chip 102 is stable in one facility, the frequency variations of qubits 104 and 106 on chip 102 cannot be tuned independently of each other using one global superconducting coil 108 .

[0083] See also Figure 2 , which depicts a block diagram of an example configuration of an apparatus for qubit tuning using magnetic fields in a superconductor according to an illustrative embodiment. Configuration 200 includes chip 202 and other components that may be required in an implementation. Chip 202 is an example of a Q processor that includes multiple qubits (e.g., qubits 204 and 206).

[0084] and Figure 1 Compared with the global superconducting coil 108, Figure 2Configuration 200 depicts a chip 208 including a first layer 210. The first layer 210 includes a material that exhibits superconductivity in a portion of the cryogenic temperature range. In an embodiment, the first layer 210 is a thin film layer. For example, the first layer 210 can be a patterned film or a blanket film. In an embodiment, the first layer 210 includes a material that exhibits superconductivity in a temperature range of approximately 0.01-20 Kelvin (including both ends of the temperature range). For example, the first layer 210 can be formed using a type II superconductor material.

[0085] Coil 214 is configured to generate a magnetic field acting at first layer 210. In an embodiment, a plurality of coils are configured to generate a magnetic field acting at first layer 210. For example, a plurality of coils may be configured to generate a uniform magnetic field at first layer 210. In an embodiment, each coil is configured to generate a specific magnetic field at a specific portion of first layer 210. In an embodiment, each specific portion of first layer 210 corresponds to a separate qubit on chip 202. For example, coil 214 generates a first magnetic field at a first portion of first layer 210 and the first portion flux biases qubit 204 (and is therefore associated with qubit 204).

[0086] Hereinafter, the group of qubit-specific coils, qubit-specific portions, and corresponding qubits is referred to as a "Q-group". One embodiment forms and positions such a qubit-specific coil relative to the corresponding portion of the first layer in a manner such that magnetic field lines from the qubit-specific coil interact primarily with the corresponding portion and any magnetic interference with neighboring portions corresponding to other qubit-specific coils is maintained within an acceptable tolerance limit. One embodiment forms and positions such a qubit-specific portion relative to the corresponding qubit in a manner such that magnetic field lines forming the qubit-specific portion interact primarily with the corresponding qubit and any magnetic interference with neighboring qubits is maintained within an acceptable tolerance limit.

[0087] Each coil is optionally mounted on a platform 212, which is a separate removable platform, such as a separate PCB. The platform 212 can be used to position each coil relative to the first layer 210 in a movable manner, a removable manner, or both. For example, in one embodiment, one coil can be moved or repositioned relative to the first layer, such as to improve magnetic interaction with a portion of the first layer, reduce undesirable interference with a second portion of the first layer, or some combination of these and other objectives.

[0088] The first layer 210 is configured to act as a permanent magnet in response to exposure to an external magnetic field generated by the coil and cooling to below a critical temperature of the first layer 210. The first layer 210 generates magnetic flux that passes through (or through) a superconducting loop of a qubit, which includes the inductance of a Josephson junction. The flux passing through the loop of the qubit causes a change in the inductance of the Josephson junction, which in turn causes a change in the resonant frequency of the qubit loop. Operating in this manner, a portion of the first layer 210 interacts with the qubit 204 in a manner so as to cause a substantial (greater than the threshold) amount of change or shift in the frequency of the qubit 204. In one embodiment, a second portion of the first layer 210 operates in a similar manner relative to the qubit 206.

[0089] Figure 2 The orientation shown (which shows qubit-specific coils 214-216 located below qubits 204-206, respectively) is a preferred orientation, but is not intended to be limiting. As will become clear from this disclosure, a qubit-specific coil may be oriented in other directions relative to the corresponding qubit in order to achieve a qubit-specific frequency shifting effect for the corresponding qubit. Different orientations of coils and combinations of coils produce different amounts of flux ranging from significant to negligible. While some orientations are useful in currently available superconducting Q processor implementations, other orientations may find application in other potential quantum devices employing non-superconducting qubits.

[0090] Furthermore, in one embodiment, the magnetic flux of each qubit-specific coil is independently and dynamically controlled by adjusting the current provided to the qubit-specific coil through a pair of dedicated contacts for that qubit-specific coil. In one embodiment, each qubit-specific coil is turned off after first layer 210 is cooled to or below a critical temperature. In an embodiment, chip 212 is removed after first layer 210 is cooled to or below a critical temperature. In another embodiment, chip 212 remains in place, but the coil on chip 212 is no longer biased after first layer 210 is cooled to or below a critical temperature.

[0091] Without implying that any particular embodiment provides any particular advantage or property, some advantages or properties that may be achieved by implementing an embodiment in a particular manner include, but are not limited to: 1 - each coil is independent of the other coils allowing simultaneous tuning of an entire plurality of qubits; 2 - each coil primary flux biases a portion of the first layer; 3 - the first layer can be cooled to below a critical temperature; 4 - the chip 208 can be maintained in thermal equilibrium; and 5 - the chip 212 can be removed or the coils 214-216 turned off while the first layer 210 acts as a permanent magnet.

[0092] Different quantum processing applications may have different requirements for flux biasing of qubits. In some implementations, it may be necessary to apply a magnetic field bias perpendicular to the plane of the superconducting qubit. In some other implementations, it may be necessary to apply a magnetic field bias parallel to the plane of the superconducting qubit or other quantum device. These other requirements and implementations are contemplated within the scope of the illustrative embodiments. The coils in the Q groups of an embodiment may be oriented differently relative to their corresponding portions of the superconducting material. The portions in the Q groups of an embodiment may be oriented differently relative to their corresponding qubits. In addition, in one embodiment, one coil may have a one-to-one correspondence with one qubit; in another embodiment, one coil may have a one-to-n correspondence with multiple qubits; in another embodiment, n coils may have an n-to-one correspondence with one qubit, where several coils correspond to a single qubit; in another embodiment, n coils may have an n-to-m correspondence with qubits, where a group of n coils corresponds to a group of m qubits. In another embodiment, one coil may have a zero-to-one correspondence with one qubit, where no coils correspond to certain qubits on the chip. A set of four coils can provide full vector control of the magnetic field at the location of the qubit, allowing all three space vector components (ie, magnitude and direction) of the magnetic field at a particular location of the corresponding qubit to be set.

[0093] As can be seen from the various configurations disclosed, each qubit can be independently controlled for resonant frequency shift. Furthermore, the shift can be statically set or iteratively changed for an individual qubit on a multi-qubit chip. Additionally, the qubits and coils can be oriented and grouped differently relative to each other to achieve these shifts, giving multiple implementation alternatives in space-constrained implementations.

[0094] See also Figure 3 , which depicts a cross-section of an exemplary configuration of a qubit tuning device according to an illustrative embodiment. Configuration 300 depicts a chip 302 including a qubit 304, a chip 306 including a first layer 308, and a chip 310 including a coil 312. In one embodiment, chip 306 is disposed between chip 310 and chip 302. First layer 308 includes a material that exhibits superconductivity in a portion of the cryogenic temperature range. In an embodiment, first layer 308 includes a material that exhibits superconductivity in a temperature range of about 1-10 Kelvin (including both ends of the temperature range). For example, first layer 308 can be formed using a type II superconductor material. In one embodiment, first layer 308 is disposed on a surface of chip 306 that faces chip 310. In an embodiment, coil 312 is disposed on a surface of chip 310 that faces away from first layer 308.

[0095] Coil 312 is configured to generate a magnetic field that acts on first layer 308. In an embodiment, a plurality of coils are configured to generate a magnetic field that acts on first layer 308. For example, a plurality of coils may be configured to generate a uniform magnetic field at first layer 308. In an embodiment, each coil is configured to generate a specific magnetic field at a specific portion of first layer 308. In an embodiment, each specific portion of first layer 308 corresponds to a separate qubit on chip 302. For example, coil 312 generates a first magnetic field at a first portion of first layer 308 and the first portion flux biases qubit 304 (and is therefore associated with qubit 304).

[0096] See also Figure 4 , which depicts a cross-section of an exemplary configuration of a qubit tuning device according to an illustrative embodiment. Configuration 400 depicts a chip 402 including a qubit 404, a chip 406 including a first layer 408, and a chip 410 including a coil 412. Configuration 400 is illustrated with Figure 3 Configuration 300 and Figure 2 404. In one embodiment, the first layer 408 is disposed on a surface of the chip 406 that faces the qubits 404. In an embodiment, the coil 412 is disposed on a surface of the chip 410 that faces away from the first layer 408.

[0097] See also Figure 5 , which depicts a cross-section of an exemplary configuration of a qubit tuning device according to an illustrative embodiment. Configuration 500 depicts a chip 502 including a qubit 504, a chip 506 including a first layer 508, and a chip 510 including a coil 512. Configuration 500 is illustrated with Figure 3 Configuration 300 and Figure 4 5. In an embodiment, the first layer 508 is disposed on a surface of the chip 506 that faces the coil 512. In an embodiment, the coil 512 is disposed on a surface of the chip 510 that faces the qubit 504.

[0098] See also Figure 6 , which depicts a cross-section of an exemplary configuration of a qubit tuning device according to an illustrative embodiment. Configuration 600 depicts a chip 602 including a qubit 604, a chip 606 including a first layer 608 and a second layer 614, and a chip 610 including a coil 612. Configuration 600 is illustrated with Figure 3 Configuration 300 and Figure 4602. In one embodiment, chip 606 is arranged between chip 610 and chip 602. First layer 608 includes a material that exhibits superconductivity in a portion of the cryogenic temperature range. In one embodiment, first layer 608 includes a material that exhibits superconductivity in a temperature range of about 1-10 Kelvin, including both ends of the temperature range. For example, first layer 608 can be formed using a type II superconductor material. In one embodiment, first layer 608 is arranged on a surface of chip 606 that faces chip 602. In an embodiment, coil 612 is arranged on a surface of chip 610 that faces away from first layer 608.

[0099] The second layer 614 includes a material that exhibits superconductivity in a portion of the cryogenic temperature range. In an embodiment, the second layer 614 includes a material that exhibits superconductivity in a temperature range of about 1-10 Kelvin (including both ends of the temperature range). For example, the second layer 614 can be formed using a type II superconductor material. In an embodiment, the second layer 614 is arranged on a surface of the chip 606 that faces the chip 610.

[0100] The coil 612 is configured to generate a magnetic field acting on the first layer 608 and the second layer 614. In one embodiment, the plurality of coils are configured to generate a magnetic field acting on the first layer 608 and the second layer 614. For example, the plurality of coils may be configured to generate a uniform magnetic field at the first layer 608 and the second layer 614.

[0101] See also Figure 7 , which depicts a cross-section of an exemplary configuration of a qubit tuning device according to an illustrative embodiment. Configuration 700 depicts a chip 702 including a qubit 704, a chip 706 including a first layer 708 and a second layer 714, and a chip 710 including a coil 712. Configuration 700 is illustrated with Figure 3 Configuration 300 and Figure 4 The configuration 400 in FIG. 4 operates in a similar manner. In one embodiment, the chip 706 is arranged between the chip 710 and the chip 702. In one embodiment, the coil 712 is arranged on a surface of the chip 710 facing the chip 706.

[0102] See also Figure 8 , which depicts a cross-section of an exemplary configuration of a qubit tuning device according to an illustrative embodiment. Configuration 800 depicts a chip 802 including qubits 804 and a first layer 806, and a chip 808 including a coil 810. Configuration 800 is illustrated with Figure 3 Configuration 300 and Figure 2808. In one embodiment, qubits 804 are formed and configured on a first surface of chip 802. In an embodiment, chip 802 is disposed above chip 808. In one embodiment, first layer 806 is disposed on a surface of chip 802 opposite to qubits 804. In an embodiment, coil 810 is disposed on a surface of chip 808 facing first layer 806.

[0103] See also Fig. 9 , which depicts a cross-section of an exemplary configuration of a qubit tuning device according to an illustrative embodiment. Configuration 900 depicts a chip 902 including qubits 904 and a first layer 906, and a chip 908 including a coil 910. Configuration 900 is illustrated with Figure 3 Configuration 300 and Figure 2 908. In one embodiment, qubits 904 are formed and configured on a first surface of chip 902. In one embodiment, first layer 906 is disposed on a surface of chip 902 opposite to qubits 904. In an embodiment, coil 910 is disposed on a surface of chip 908 facing away from first layer 906.

[0104] See also Fig.10 , which depicts a cross-section of an exemplary configuration of a qubit tuning device according to an illustrative embodiment. Configuration 1000 depicts chip 1002 including qubit 1004 and first layer 1006 and chip 1008 including coil 1010. Configuration 1000 is illustrated with Figure 3 Configuration 300 and Figure 2 1004. In one embodiment, qubits 1004 are formed and configured on a first surface of chip 1002. In one embodiment, chip 1002 is positioned below chip 1008. In one embodiment, first layer 1006 is disposed on a surface of chip 1002 opposite qubits 1004. In one embodiment, coil 1010 is disposed on a surface of chip 1008 facing away from first layer 1006.

[0105] See also Fig.11 , which depicts a cross-section of an exemplary configuration of a qubit tuning device according to an illustrative embodiment. Configuration 1100 depicts a chip 1102 including qubits 1104 and a first layer 1106, and a chip 1108 including a coil 1110. Configuration 1100 is illustrated with Figure 3 Configuration 300 and Figure 21108. In one embodiment, qubits 1104 are formed and configured on a first surface of chip 1102. In one embodiment, chip 1102 is disposed below chip 1108. In one embodiment, first layer 1006 is disposed on a surface of chip 1102 opposite qubits 1104. In one embodiment, coil 1110 is disposed on a surface of chip 1108 facing chip 1102.

[0106] See also Fig.12 , which depicts a cross-section of an exemplary configuration of a qubit tuning device according to an illustrative embodiment. Configuration 1200 depicts a chip 1202 including a qubit 1204 and a chip 1208 including a first layer 1206 and a coil 1210. Configuration 1200 is illustrated with Figure 3 Configuration 300 and Figure 2 1208. In one embodiment, the first layer 1206 is formed and arranged on a first surface of the chip 1208. In one embodiment, the chip 1202 is disposed below the chip 1208. In one embodiment, the coil 1210 is arranged on a surface of the chip 1208 opposite to the first layer 1206. In one embodiment, the first layer 1206 is arranged on a surface of the chip 1208 facing the chip 1202.

[0107] See also Fig.13 , which depicts a cross-section of an exemplary configuration of a qubit tuning device according to an illustrative embodiment. Configuration 1300 depicts a chip 1302 including a qubit 1304 and a chip 1308 including a first layer 1306 and a coil 1310. Configuration 1300 is illustrated with Figure 3 Configuration 300 and Figure 2 1308. In an embodiment, the first layer 1306 is formed and configured on a first surface of the chip 1308. In an embodiment, the chip 1302 is arranged below the chip 1308. In an embodiment, the coil 1310 is arranged on a surface of the chip 1308 opposite to the first layer 1306. In an embodiment, the first layer 1306 is disposed on a surface of the chip 1308 facing away from the chip 1302.

[0108] See also Fig.14 , which depicts a cross-section of an exemplary configuration of a qubit tuning device according to an illustrative embodiment. Configuration 1400 depicts a chip 1402 including a qubit 1404, a chip 1406 including a first layer 1408, and a chip 1410 including a coil 1412. Configuration 1400 is illustrated with Figure 3 Configuration 300 and Figure 2The chip 1402 is arranged between the chip 1410 and the chip 1402 in a similar manner to the configuration 200 in FIG.

[0109] Figure 2-14 The orientation is not intended to be limiting. Based on this disclosure, one of ordinary skill in the art will be able to imagine different orientations of one or more qubits, one or more layers, one or more coils, and chips, and combinations of features from different configurations and the same configuration are contemplated within the scope of these illustrative embodiments.

[0110] See also Fig.15 , which depicts a block diagram of an example configuration of an apparatus for qubit tuning using magnetic fields in a superconductor according to an illustrative embodiment. Configuration 1500 includes chip 1502 and other components that may be required in an implementation. Chip 1502 is an example of a Q processor that includes multiple qubits (e.g., qubit 1504).

[0111] and Figure 1 Compared with the global superconducting coil 108, Fig.15 Configuration 1500 depicts a chip 1506 including a first layer 1508. The first layer 1508 includes a material that exhibits superconductivity in a portion of the cryogenic temperature range. In an embodiment, the first layer 1508 is a thin film layer. For example, the first layer 1508 can be a patterned film or a blanket film. In an embodiment, the first layer 1508 includes a material that exhibits superconductivity in a temperature range of approximately 1-10 Kelvin (including both ends of the temperature range). For example, the first layer 1508 can be formed using a type II superconductor material.

[0112] The coils 1512, 1514 are configured to generate a magnetic field that acts on the first layer 1508. For example, the coils 1512, 1514 may be configured to generate a uniform magnetic field at the first layer 1508. As another example, the coils 1512, 1514 may be configured in a Helmholtz coil configuration.

[0113] Chip 1506 includes a plurality of resistors 1510 disposed on a surface opposite first layer 1508. Each resistor is configured to heat a portion of first layer 1508 above a critical temperature of first layer 1508. In an embodiment, each resistor operates independently of other resistors on chip 1506. In an embodiment, each resistor corresponds to a separate portion of first layer 1508. For example, each resistor may heat a portion of first layer 1508 associated with a different qubit on chip 1502.

[0114] The first layer 1508 is configured to act as a permanent magnet in response to exposure to an external magnetic field generated by the coil and cooling to below a critical temperature of the first layer 1508. The first layer 1508 generates a magnetic flux that passes through (or through) a superconducting loop of a qubit, which includes the inductance of a Josephson junction. The flux passing through the loop of the qubit causes a change in the inductance of the Josephson junction, which in turn causes a change in the resonant frequency of the qubit loop. Operating in this manner, a portion of the first layer 1508 interacts with the qubit 1504 in a manner that causes a change or shift in the frequency of the qubit 1504 by a substantial (greater than the threshold) amount.

[0115] The chip 1506 positioned above the chip 1502 is shown. Fig.15 The depicted orientations are preferred orientations but are not intended to be limiting. Different orientations produce different amounts of flux ranging from significant to negligible. While some orientations are useful in currently available superconducting q-processor implementations, other orientations may find application in other potential quantum devices employing non-superconducting qubits.

[0116] In addition, in one embodiment, the heat generated by each resistor is independently and dynamically controlled by adjusting the current supplied to the resistor through a dedicated contact pair for the resistor. In one embodiment, each resistor is turned off after the magnetic field generated by the coils 1512, 1514 stabilizes and the portion of the first layer 1508 heated by the resistor drops below a critical temperature. In one embodiment, the heated portion of the first layer 1508 is cooled to or below the critical temperature to lock the magnetic field generated in that portion of the first layer 1508. In an embodiment, the process of heating to above the critical temperature and cooling to at or below the critical temperature is repeated for other portions of the first layer 1508 using corresponding resistors. In one embodiment, the magnetic field generated is changed before heating subsequent portions of the first layer 1508 so as to tune different qubits at different frequencies.

[0117] Without implying that any particular embodiment provides any particular advantage or property, some advantages or properties that may be achieved by implementing the embodiments in a particular manner include, but are not limited to: 1-only one coil is required to generate the magnetic field; and 2-the coil can be turned off when the first layer acts as a permanent magnet.

[0118] Different quantum processing applications may have different requirements for flux biasing of qubits. In some implementations, it may be necessary to apply a magnetic field bias perpendicular to the plane of the superconducting qubit. In some other implementations, it may be necessary to apply a magnetic field bias parallel to the plane of the superconducting qubit or other quantum device. These other requirements and implementations are contemplated within the scope of the illustrative embodiments. A set of four positions of the magnetic field generated (in the first layer 1508) can provide full vector control of the magnetic field at the location of a qubit, enabling all three space vector components (i.e., magnitude and direction) of the magnetic field to be set at a specific location of the corresponding qubit.

[0119] As can be seen from the various configurations disclosed, each qubit can be independently controlled for resonant frequency shift. In addition, for an individual qubit on a multi-qubit chip, the shift can be statically set or iteratively changed.

[0120] See also Fig.16 , which depicts a cross-section of an exemplary configuration of a qubit tuning device according to an illustrative embodiment. Configuration 1600 depicts a chip 1602 including a qubit 1604, a chip 1606 including a first layer 1608 and a resistor 1610, and coils 1612-1614. Configuration 1600 is used with Fig.15 1602 is arranged below chip 1606. The first layer 1608 includes a material that exhibits superconductivity in a portion of the cryogenic temperature range. In an embodiment, the first layer 1608 includes a material that exhibits superconductivity in a temperature range of approximately 1-10 Kelvin (including both ends of the temperature range). For example, the first layer 1608 can be formed using a type II superconductor material and can be a patterned film or a cover film. In one embodiment, the first layer 1608 is arranged on a surface of chip 1606 that faces chip 1602. In an embodiment, resistor 1610 is arranged on a surface of chip 1606 opposite to the first layer 1608.

[0121] The resistor 1610 is configured to heat a portion of the first layer 1608 above a critical temperature. In an embodiment, each resistor is configured to heat a separate portion of the first layer. The coils 1612-1614 are configured to generate a magnetic field that acts on the first layer 1608. For example, the coils may be configured to generate a uniform magnetic field at the first layer 1608.

[0122] See also Fig.17, which depicts a cross-section of an exemplary configuration of a qubit tuning device according to an illustrative embodiment. Configuration 1700 depicts a chip 1702 including a qubit 1704, a chip 1706 including a first layer 1708 and a resistor 1710, and coils 1712-1714. Configuration 1700 is used with Fig.15 1706. In an embodiment, chip 1702 is arranged below chip 1706. In an embodiment, resistor 1710 is embedded in chip 1706. In an embodiment, first layer 1708 is arranged on a surface of chip 1706 that faces chip 1702.

[0123] See also Fig.18 , which depicts a cross section of an exemplary configuration of a qubit tuning device according to an illustrative embodiment. Configuration 1800 depicts a chip 1802 that includes a qubit 1804, a first layer 1806, and a resistor 1808, and a plurality of coils 1810-1812. Configuration 1800 is used with Fig.15 1500. In one embodiment, qubits 1804 are formed and arranged on a first surface of chip 1802. In one embodiment, first layer 1806 is arranged on an opposite surface of chip 1802. In an embodiment, resistor 1808 is disposed on first layer 1806.

[0124] See also Fig.19 , which depicts a cross section of an exemplary configuration of a qubit tuning device according to an illustrative embodiment. Configuration 1900 depicts a chip 1902 that includes a qubit 1904, a first layer 1906, and a resistor 1908, and a plurality of coils 1910-1912. Configuration 1900 is used with Fig.15 1902. In one embodiment, qubits 1904 are formed and disposed on a first surface of chip 1902. In one embodiment, first layer 1906 is disposed on an opposite surface of chip 1902. In an embodiment, resistor 1908 is embedded in chip 1902.

[0125] Figure 15-19 The orientations are not intended to be limiting. Based on this disclosure, one of ordinary skill in the art will be able to imagine different orientations of one or more qubits, one or more layers, one or more resistors, one or more coils, and chips, as well as combinations of features from different figures, and these orientations are contemplated to be within the scope of these illustrative embodiments.

[0126] See also Fig. 20, which depicts a block diagram of an example configuration of an apparatus for qubit tuning using magnetic fields in a superconductor according to an illustrative embodiment. Configuration 2000 includes chip 2002 and other components that may be required in an implementation. Chip 2002 is an example of a Q processor that includes multiple qubits (e.g., qubit 2004).

[0127] and Figure 1 Compared with the global superconducting coil 108, Fig. 20 Configuration 2000 depicts a chip 2006 including a first layer 2008. The first layer 2008 includes a material that exhibits superconductivity in a portion of the cryogenic temperature range. In an embodiment, the first layer 2008 is a thin film layer. For example, the first layer 2008 can be a patterned film or a blanket film. In an embodiment, the first layer 2008 includes a material that exhibits superconductivity in a temperature range of about 1-10 Kelvin (including both ends of the temperature range). For example, the first layer 2008 can be formed using a type II superconductor material.

[0128] The coils 2014, 2016 are configured to generate a magnetic field acting on the first layer 2008. For example, the coils 2014, 2016 may be configured to generate a uniform magnetic field at the first layer 2008. As another example, the coils 2014, 2016 may be configured as a Helmholtz coil configuration.

[0129] Laser 2010 is configured to generate heat at portion 2012 of first layer 2008. Light source (e.g., laser) 2010 is configured to locally heat a portion of first layer 2008 to above a critical temperature of first layer 2008. In an embodiment, a light absorbing layer (not shown) is placed on the chip 2006 on the face of the chip on which the light shines. In an embodiment, the laser source generating the laser light can be moved and positioned to target different portions of first layer 2008. For example, laser 2010 can heat a portion of first layer 2008 associated with a different qubit on chip 2002.

[0130] The first layer 2008 is configured to act as a permanent magnet in response to exposure to an external magnetic field generated by the coil and cooling to below a critical temperature of the first layer 2008. The first layer 2008 generates a magnetic flux that passes through (or through) a superconducting loop of a qubit, which includes the inductance of a Josephson junction. The flux passing through the loop of the qubit causes a change in the inductance of the Josephson junction, which in turn causes a change in the resonant frequency of the qubit including the loop. Operating in this manner, a portion (or a group of portions) of the first layer 2008 interacts with the qubit 2004 in a manner that causes a change or shift in the frequency of the qubit 2004 by a substantial (greater than a threshold) amount.

[0131] Fig. 20 The depicted orientations (showing chip 2006 positioned above chip 2002, respectively) are preferred orientations but are not intended to be limiting. Different orientations produce different amounts of flux ranging from significant to negligible. While some orientations are useful in currently available superconducting q-processor implementations, other orientations may find application in other potential quantum devices employing non-superconducting qubits.

[0132] In addition, in one embodiment, the heat generated by the laser is independently and dynamically controlled. In an embodiment, after the magnetic field generated by the coils 2014, 2016 stabilizes and the portion of the first layer 2008 heated by the light beam or laser 2010 drops below a critical temperature, the light source or laser 2010 is turned off. In an embodiment, the heated portion of the first layer 2008 is cooled to or below the critical temperature to pin the generated magnetic field in the portion of the first layer 2008. In an embodiment, the process of heating to above the critical temperature and cooling to at or below the critical temperature is repeated for other portions of the first layer 2008 using the light source or laser 2010. In one embodiment, the generated magnetic field is changed before heating a subsequent portion of the first layer 2008 to tune a different qubit at a different frequency.

[0133] Without implying that any particular embodiment provides any particular advantage or property, some advantages or properties that may be achieved by implementing the embodiments in a particular manner include, but are not limited to: 1-only one coil is required to generate the magnetic field; and 2-the coil can be turned off when the first layer acts as a permanent magnet.

[0134] Different quantum processing applications may have different requirements for flux biasing of qubits. In some implementations, it may be necessary to apply a magnetic field bias perpendicular to the plane of the superconducting qubit. In some other implementations, it may be necessary to apply a magnetic field bias parallel to the plane of the superconducting qubit or other quantum device. These other requirements and implementations are contemplated to be within the scope of the illustrative embodiments.

[0135] As can be seen from the various configurations disclosed, each qubit can be independently controlled for resonant frequency shift. In addition, for an individual qubit on a multi-qubit chip, the shift can be statically set or iteratively changed.

[0136] See also Fig.21 , which depicts a cross section of an exemplary configuration of a qubit tuning device according to an illustrative embodiment. Configuration 2100 depicts a chip 2102 including a qubit 2104, a chip 2106 including a first layer 2108, and coils 2112, 2114. Configuration 2100 is used with Fig. 202106. In an embodiment, a first layer 2108 is formed and disposed on a first surface of the chip 2106. In an embodiment, a light absorbing layer is deposited on top of the first layer 2108. In an embodiment, the chip 2102 is disposed below the chip 2106. In an embodiment, the coils 2112, 2114 are configured to generate a magnetic field. In an embodiment, the light beam or laser 2110 is configured to heat a portion of the first layer 2108.

[0137] See also Fig. 22 , which depicts a cross-section of an exemplary configuration of a qubit tuning device according to an illustrative embodiment. Configuration 2200 depicts a chip 2202 including a qubit 2204, a first layer 2206, and coils 2210, 2212. Configuration 2200 is used with Fig. 20 2202. In one embodiment, qubits 2204 are formed and disposed on a first surface of chip 2202. In one embodiment, first layer 2206 is formed and disposed on a surface of chip 2202 opposite qubits 2204. In one embodiment, a light absorbing layer is deposited on a surface of first layer 2206. In one embodiment, coils 2210, 2212 are configured to generate a magnetic field. In one embodiment, laser 2208 is configured to heat a portion of first layer 2206.

[0138] Figure 20-22 The orientation of is not intended to be limiting. Based on this disclosure, one of ordinary skill in the art will be able to envision different orientations of qubits, layers, light and laser sources, coils, and chips, and these orientations are considered within the scope of these illustrative embodiments.

[0139] See also Fig.23 , which depicts a flow chart of an example process for tuning a qubit according to an illustrative embodiment. Process 2300 may be implemented in a manufacturing system, such as in a software application that operates the manufacturing system, to cause the described operations.

[0140] The embodiment measures a set of qubits to determine a set of qubit frequencies (block 2302). In response to the determined set of qubit frequencies, the embodiment analyzes the set of frequencies to determine frequency crowding (block 2304). In one embodiment, frequency crowding occurs when adjacent qubits on a Q processor chip have resonant frequencies within a threshold frequency range. For example, the threshold frequency range is 500 MHz. In one embodiment, the application identifies qubit candidates for tuning based on the frequency crowding analysis. If frequency crowding exists and a qubit candidate is identified (the YES path of block 2304), the application configures a superconducting material to produce a specific magnetic flux to cause a shift in the resonant frequency of a qubit (block 2306). The application returns to block 2304 to determine additional instances of frequency crowding. The embodiment repeats block 2306 as many times as necessary to tune different qubits in a given implementation. If it is determined that frequency crowding does not occur (the NO path of block 2304), the embodiment then ends process 2300.

[0141] See also Fig.24 , which depicts an exemplary process for configuring an apparatus for tuning a qubit according to an illustrative embodiment. Process 2400 may be implemented as Fig.23 Box 2306 in.

[0142] When a shift in the resonant frequency of a qubit is desired, the embodiment heats a portion of a superconducting material above a critical temperature (block 2402). For example, a resistor disposed on or adjacent to the superconducting material may heat a portion of the superconducting material above the critical temperature. As another example, a light source (such as a laser) may heat a portion of the superconducting material above the critical temperature. In one embodiment, a portion of a superconducting material is already above the critical temperature. In one embodiment, the entire superconducting material is above a critical temperature. The applying creates a magnetic field through the portion of the superconducting material above the critical temperature (block 2404). The application cools the portion of the superconducting material to below the critical temperature while maintaining the applied magnetic field (block 2406). The embodiment thereafter ends process 2400.

[0143] See also Fig.25 , which depicts an example process for configuring an apparatus for tuning qubits according to an illustrative embodiment. Process 2500 may be implemented as Fig.23 Box 2306 in.

[0144] When a shift in the resonant frequency of a qubit is desired, the embodiment generates a magnetic field through a first portion of a superconducting material at a temperature above a critical temperature (block 2502). For example, multiple coils may be configured to generate a magnetic field comprising a superposition of magnetic fields generated by each individual coil. An application configures the magnetic field through the portion (block 2504). In one embodiment, the application configures the magnetic field by controlling the vector components (magnitude and direction) of the magnetic field in three spatial dimensions at the portion of the superconducting material. For example, the application may adjust the position of the first portion of the superconducting material, adjust the current (amplitude and direction) through any coil, or other operations to configure the magnetic field generated by the multiple coils. The application cools the first portion of the superconducting material below the critical temperature while maintaining the applied magnetic field (block 2506). The embodiment then ends process 2500.

[0145] The circuit elements of the flux bias device and their connections can be made of superconducting materials. Examples of superconducting materials (at low temperatures, such as about 10-100 millikelvin (mK), or about 4K) include niobium, aluminum, tantalum, etc. For example, the Josephson junctions are made of superconducting materials, and their tunnel junctions can be made of a thin tunnel barrier (such as an aluminum oxide). Capacitors can be made of superconducting materials separated by low-loss dielectric materials. Transmission lines (i.e., wires) connecting different elements can be made of superconducting materials.

[0146] Different embodiments of the present invention are described herein with reference to the relevant drawings. Without departing from the scope of the present invention, alternative embodiments may be designed. Although different connections and positional relationships (e.g., above, below, adjacent, etc.) are described between elements in the following description and the drawings, it will be appreciated by those skilled in the art that many positional relationships described herein are orientation-independent when the function is maintained even if the orientation changes. Unless otherwise indicated, these connections and / or positional relationships may be direct or indirect, and the present invention is not limited in this respect by schematic diagrams. Thus, the coupling of entities may refer to direct or indirect coupling, and the positional relationship between entities may be direct or indirect positional relationship. As an example of an indirect positional relationship, the reference to forming layer "A" on layer "B" in this specification includes the case where one or more intermediate layers (e.g., layer "C") are between layer "A" and layer "B", as long as the relevant features and functions of layer "A" and layer "B" are not substantially changed by this or these intermediate layers.

[0147] The following definitions and abbreviations are used to interpret the claims and specification. As used herein, the terms "comprises," "comprising," "includes," "including," "has," "having," "contains," or "containing," or any other variation thereof, are intended to cover a non-exclusive inclusion. For example, a composition, mixture, process, method, article, or apparatus that includes a list of elements is not necessarily limited to only those elements but may include other elements not expressly listed or inherent to such composition, mixture, process, method, article, or apparatus.

[0148] Additionally, the term "illustrative" is used herein to mean "serving as an example, instance, or illustration." Any embodiment or design described herein as "illustrative" is not necessarily to be construed as preferred or advantageous over other embodiments or designs. The terms "at least one" and "one or more" should be understood to include any integer greater than or equal to one, i.e., one, two, three, four, etc. The term "plurality" should be understood to include any integer greater than or equal to 2, i.e., two, three, four, five, etc. The term "connected" may include both indirect "connected" and direct "connected."

[0149] References in the specification to "one embodiment," "an embodiment," "an example embodiment," etc. indicate that the described embodiment may include a particular feature, structure, or characteristic, but each embodiment may or may not include the particular feature, structure, or characteristic. Moreover, such phrases do not necessarily refer to the same embodiment. Further, when a particular feature, structure, or characteristic is described in conjunction with an embodiment, it is considered to be within the knowledge of those skilled in the art to affect such feature, structure, or characteristic in conjunction with other embodiments, whether or not explicitly described.

[0150] The terms "about", "substantially", "approximately" and variations thereof are intended to include the degree of error associated with the measurement of a particular quantity based on the equipment available at the time of filing this application. For example, "about" may include a range of ±8% or 5%, or 2% of a given value.

[0151] The description of different embodiments of the present invention has been presented for the purpose of illustration, but is not intended to be exhaustive or limited to the disclosed embodiments. Many modifications and variations will be apparent to those of ordinary skill in the art without departing from the scope and spirit of the described embodiments. The terms used herein are selected to best explain the principles of the embodiments, practical applications, or technical improvements over technologies found in the marketplace, or to enable other persons of ordinary skill in the art to understand the embodiments described herein.

Claims

1. A method for tuning a quantum bit, comprising: generating a first magnetic field through a portion of a first layer, the first layer being a thin film extending over the entire surface of a chip on which the first layer is formed, the first layer comprising a material exhibiting superconductivity in a cryogenic temperature range, the portion of the first layer being above a critical temperature, the critical temperature being between 20 Kelvin and 0.01 Kelvin, both ends of the range included; cooling the portion of the first layer to at least the critical temperature, wherein the first magnetic field is turned off or removed after the portion of the first layer is cooled; and In response to cooling the portion of the first layer to at least the critical temperature, a second magnetic field is generated through the first layer to magnetically interact with a qubit of a quantum processor chip such that a first magnetic flux of the first layer causes a first change in a first resonant frequency of the qubit by a first frequency shift value.

2. The method of claim 1, further comprising: Prior to cooling the portion of the first layer, the portion of the first layer is heated with a heating element to above the critical temperature.

3. The method of claim 2, wherein: The heating element is a resistor.

4. The method of claim 2, wherein: The heating element is embedded in the quantum processor chip.

5. The method of claim 1, further comprising: generating a third magnetic field through a second portion of the first layer; cooling the second portion of the first layer to at or below the critical temperature; In response to cooling the second portion, a fourth magnetic field is generated to magnetically interact with a second qubit of the quantum processor chip such that a second magnetic flux of the first layer induces a first change in a second resonant frequency of the second qubit by a second frequency shift value.

6. The method of claim 1, further comprising: The first magnetic field is maintained while cooling the portion of the first layer.

7. The method of claim 1, further comprising: forming the qubits on a first surface of the quantum processor chip; and The first layer is formed on opposite surfaces of the quantum processor chip.

8. The method of claim 1, further comprising: A coil structure is formed by a superconducting material wire, and the coil structure is configured to generate the first magnetic field.

9. The method of claim 8, further comprising: forming the first layer on the first surface of the chip; and The coil structure is formed on opposite surfaces of the chip.

10. The method of claim 1, further comprising: The portion of the first layer is heated above the critical temperature using a light source.

11. The method of claim 1, further comprising: measuring a set of qubits to determine a set of qubit frequencies; and The set of qubit frequencies is analyzed to determine instances of frequency crowding among the set of qubits.

12. The method of claim 1, further comprising: A plurality of coil structures are formed, the plurality of coil structures being configured to generate the first magnetic field.

13. The method of claim 1, further comprising: Portions of the first layer are heated above the critical temperature.

14. The method of claim 13, further comprising: generating a plurality of magnetic fields, each magnetic field corresponding to a portion of the plurality of portions of the first layer; cooling the portions of the first layer to at least the critical temperature; and In response to cooling the plurality of portions of the first layer to at least the critical temperature, a second plurality of magnetic fields are generated to magnetically interact with a plurality of qubits of the quantum processor chip such that each of the plurality of magnetic fluxes of the first layer induces a first change in a first resonant frequency of a corresponding qubit of the plurality of qubits by a first frequency shift value.

15. A computer program product for tuning a qubit, the computer program product comprising a computer readable storage device, and program instructions stored on the computer readable storage device, the stored program instructions comprising: program instructions for generating a first magnetic field through a portion of a first layer, the first layer being a thin film extending over the entire surface of a chip on which the first layer is formed, the first layer comprising a material that exhibits superconductivity in a cryogenic temperature range, the portion of the first layer being above a critical temperature, the critical temperature being between 20 Kelvin and 0.01 Kelvin, inclusive; program instructions to cool the portion of the first layer to at least the critical temperature, wherein the first magnetic field is turned off or removed after the portion of the first layer is cooled; and and program instructions to generate a second magnetic field through the first layer to magnetically interact with a qubit of a quantum processor chip in response to cooling the portion of the first layer to at least the critical temperature, such that a first magnetic flux of the first layer causes a first change in a first resonant frequency of the qubit by a first frequency shift value.

16. The computer program product of claim 15, wherein: The computer usable code is stored in a computer readable storage device in the data processing system and wherein the computer usable code is transmitted from a remote data processing system over a network.

17. The computer program product of claim 15, wherein: The computer usable code is stored in a computer readable storage device in a server data processing system and wherein the computer usable code is downloaded over a network to a remote data processing system for use in a computer readable storage device associated with the remote data processing system.

18. A computer system for tuning a qubit, the computer system comprising a processor, a computer readable memory, and a computer readable storage device, and program instructions stored on the computer readable storage device for execution by the processor via the computer readable memory, the stored program instructions comprising: program instructions for generating a first magnetic field through a portion of a first layer, the first layer being a thin film extending over the entire surface of a chip on which the first layer is formed, the first layer comprising a material that exhibits superconductivity in a cryogenic temperature range, the portion of the first layer being above a critical temperature, the critical temperature being between 20 Kelvin and 0.01 Kelvin, inclusive; program instructions to cool the portion of the first layer to at least the critical temperature, wherein the first magnetic field is turned off or removed after the portion of the first layer is cooled; and and program instructions to generate a second magnetic field through the first layer to magnetically interact with a qubit of a quantum processor chip in response to cooling the portion of the first layer to at least the critical temperature, such that a first magnetic flux of the first layer causes a first change in a first resonant frequency of the qubit by a first frequency shift value.

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