Boost converter for electric load power supply device, power supply device and method for boosting input voltage in electric load power supply device
By using a single measurement resistor in the boost converter for current measurement and pre-calculation of the adjustment cycle time in combination with the signal generation unit, the problems of complex current measurement and large switching losses in the prior art are solved, and the switching effect with low cost and low loss is achieved.
Patent Information
- Application Number
- CN202110724832.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Priority Date
- 2020-06-30
- Filing Date
- 2021-06-29
- Publication Date
- 2025-05-13
- Estimated Expiration
- 2041-06-29
AI Technical Summary
The prior art has high cost and low bandwidth problems when measuring and controlling circuit potentials, and the current measurement method is complex, making it difficult to achieve low loss switching.
Lossless switching of semiconductor switches is achieved by using a single measuring resistor in the boost converter, combining a signal generation unit to detect the current and pre-calculate the adjustment cycle time.
Reduces the cost and complexity of current measurement, and realizes the lossless switching of semiconductor switches as possible, reducing switching losses.
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Figure CN113872455B_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to a boost converter for a power supply device for supplying power to an electrical load. The present invention also relates to a power supply device having a boost converter according to the present invention. In this case, the boost converter can be used in particular as a power factor pre-regulator in a switching power supply device. The present invention also relates to a method for boosting an input voltage in a power supply device for an electrical load. Background Art
[0002] Power supplies are needed in many fields and for many purposes. Since the term power supply is widely used, the term converter is used in the following text. Their task is to control the current flow between the power source and the load or to convert the current flow from one current type to another. They belong to the subfield of power electronics within electronics. There are the following types of converters: rectifiers, inverters, DC converters and AC converters. Power supply devices Power supplies also belong to these different converters and are also called power supplies. Their task is to supply electronic equipment with a DC voltage. A distinction is made between linear power supplies and switched-mode power supplies. Switched-mode power supplies are also regulated power supplies.
[0003] Figure 1 The basic structure of the switching power supply device is shown. It consists of components such as an active PFC circuit 10, a DC regulator 20, a power transfer stage 30, a smoother 40, a regulating stage 50, a potential separator 60 and a controller 70. The network voltage from the public power supply network is provided at the input of the switching power supply device. Take an AC voltage with an effective value of 230V and a grid frequency of 50Hz as an example. In the active PFC circuit 10, the following three components may be present, namely a power filter 1, a boost regulator 2 and a filter capacitor 3. There is a high DC voltage on the output side of the active PFC circuit 10, and the high DC voltage, for example, involves a voltage value of 400V. The DC voltage is chopped into a rectangular signal by the DC regulator 20. There are power transistors therein, such as bipolar transistors 4, MOSFET transistors (i.e. Metal Oxide Semiconductor Field Effect Transistor, Metal Oxide Semiconductor Field Effect Transistor), thyristors or IGBTs (i.e. Insulated Gate Bipolar Transistor, Insulated Gate Bipolar Transistor), which generate rectangular signals through a switching process. By varying the duty cycle of the square wave signal, different voltages and currents and thus also different powers can be set. For driving the power switches, mainly pulse width modulation (PWM) and pulse train modulation (PFM) techniques are used.
[0004] For power supply devices designed for power ranges of 75W and above, it is stipulated that they are equipped with PFC technology, i.e. Power Factor Correction, to avoid reacting to the power supply network due to the generation of harmonics. This is also defined in the European standard EN61000-3-2. For this reason, an active PFC circuit is usually used. It consists of an additional switching power supply, which is connected upstream and is responsible for making the received current conform to the sinusoidal grid voltage. As a result, the current follows the trend caused by the resistor on the current grid voltage. Therefore, in the case of non-precisely sinusoidal grid voltages that often occur in the grid, the actual trend of the grid voltage (not idealized) is tracked. The power factor is kept close to one here and fewer harmonics are generated. Otherwise, this will lead to "enhanced oscillations (Aufschaukeln)" and cause grid overload. The power factor here represents the ratio of active power to apparent power. If the phase shift between current and voltage is zero, the active power and apparent power are the same and the power factor is kept at one. If there is a significant phase difference between voltage and current, power flows back to the power plant and the power factor is reduced to below unity. An active PFC circuit usually consists of a rectifier with a boost converter connected directly downstream, which charges a capacitor with a large capacitance to a voltage higher than the peak voltage of the grid AC voltage, for example 400V. The real load (switching power supply or electronic ballast such as a fluorescent lamp) is then powered by this capacitor. The boost converter is also called a boost regulator. It is a flyback converter in which the coil drives current through the load when the switching transistor is turned off.
[0005] Figure 2 The schematic circuit diagram of a boost converter is shown, which can be used in such an active PFC circuit. By operating the boost regulator circuit in the so-called boundary conduction mode (Boundary Conduction Mode), low-loss switching of the commonly used MOSFET semiconductor switch S is achieved. In this case, the boost regulator 100 is switched at the choke coil current I L The step-up regulator 100 operates near the intermittent boundary (Lückgrenze), so that not only the switch S can be switched on without current, the so-called "zero current switching" (ZCS), but also the switch S can be switched on without voltage, the so-called "zero voltage switching" (ZVS). The choke coil L1 of the step-up regulator 100 and the output capacitor C of the semiconductor switch OSS This forms a series resonant oscillating circuit. This oscillating circuit is reversely charged during the duration of half a period of its natural frequency, so that the choke coil current I L When the positive and negative conversion occurs, the output capacitor C OSS is reverse charged to the boost regulator input voltage Vin Double the value, minus the boost regulator output voltage V out . As a result, when the semiconductor switch S is switched on again, the switching voltage and the switch-on current are reduced and thus the switching losses are reduced. Such switching losses occur when a current flows through the semiconductor switch S. According to Ohm's law, P=U*I. The power loss P converted into heat in the semiconductor switch S is therefore dependent on the magnitude of the applied voltage.
[0006] exist Figure 3 : shows the voltage and current curves over the entire switching cycle of the semiconductor switch S. Current curve I L is triangular. In the on phase t on During this period, the current through the choke coil L1 increases linearly. off During this period, the current through the choke coil L1 decreases linearly. In the phase t corresponding to the half cycle length of the resonant frequency of the oscillating circuit composed of the choke coil L1 and the capacitance of the semiconductor switch S Res In this case, the current direction even changes. The time relationship is as follows:
[0007]
[0008]
[0009]
[0010] Here, P in is the input power, and L is the inductance of the choke coil L1. In order to ensure that the semiconductor switch is turned on as loss-free as possible, the period length T of the switching cycle s Not allowed to be shorter than:
[0011] T smin =t On +t Off +t Res
[0012] This therefore ensures that the transistor capacitance of the semiconductor switch S can be discharged for lossless switching.
[0013] In particularly loss-optimized applications, it replaces the conventional Figure 2 The boost converter of FIG. 1 uses a half-bridge PFC circuit having at least two active semiconductor switches S1 and S2. Figure 4 Here, Figure 2 The diode D in is replaced by another semiconductor switch S2.
[0014] Applicable according to Figure 2The time relationship of the circuit is described in US Pat. No. 8,766,605 B2 for the use of a half-bridge PFC circuit. Here, the term "half-bridge PFC circuit" is used to indicate that both the positive half-wave and the negative half-wave are boosted via the same semiconductor switch branch. However, this requires a closed current loop commutation circuit.
[0015] exist Figure 5 The positive input voltage V in The time sequence of the control signals of the semiconductor switches S1 and S2 is shown in FIG. h and I l To generate the control signal, the current must be detected by measuring technology and compared with a predetermined value.
[0016] The condition for S1 to be disconnected and S2 to be connected is that the choke current I L The current threshold I h Here, the current threshold I for the corresponding operating point h The condition for S2 to be switched off and S1 to be switched on is that the choke current I L The current threshold I l . Current threshold I l is statically predetermined and its position is used to adjust the capacitance C of the semiconductor switch S1. osc Perform full reverse charging.
[0017] Here, with Figure 2 In contrast to the circuit in (where diode D determines the reverse charging process), switch S2 is always on until capacitor C osc After that, the semiconductor switch S1 is turned on and S2 is turned off, so that the current I L can be switched from S2 to S1 and the current I L The direction of the current changes again. A new cycle begins with the magnetizing choke coil.
[0018] The details of this manipulation method are described in detail in documents US 20070109822 A1 and US 8026704 B2.
[0019] An alternative method for generating actuation signals for semiconductor switches S1 and S2 is known from the doctoral thesis “Current Mode Control structure: Current-Mode Control: Modeling and Digital Application”, author Jian Li, April 14, 2009, Blacksburg, Virginia Polytechnic Institute and State University. In this case, in order to generate the switching time t onS1 and t onS2 Using a comparator, the comparator will measure the current I in the resistor. L The resulting voltage drop is compared with a voltage threshold.
[0020] From the document “LED Application Design Using BCM Power Factor Correction (PFC) Controller for 100W Lightning System”; AN-9731, O2011 Fairchild Semiconductor Corporation Rev. 1.0.0, 3 / 24 / 11 a circuit design for a PFC circuit is known which operates in the so-called “boundary conduction mode” (BCM).
[0021] The method mentioned for generating a control signal for a step-up converter topology, which is operated with two current switches S1, S2, requires all information about the current profile through the inductor L in order to generate a control signal by means of a comparator. However, the proposed solution can only achieve this with considerable disadvantages.
[0022] In one solution, the I is used directly under the condition that a circuit for potential separation is used to bring the signal to the measuring potential. L The measuring resistor (shunt) in the current path is used to realize the current I L measurement.
[0023] shortcoming:
[0024] a. Circuits for potential separation lead to higher costs
[0025] b. Circuits used for potential separation usually have only a small bandwidth and reflect the signals in a distorted manner.
[0026] In another solution, the current is measured by means of the current transformers in the individual current switching paths, using additional switching devices for demagnetizing the current transformers and additional switching devices for bidirectional current measurement.
[0027] shortcoming:
[0028] c. Involves expensive switchgear with many components
[0029] d. Current transformers are usually more expensive than current measuring resistors (shunts). They usually measure current indirectly by measuring the magnetic field strength of the magnetic field generated by the current using a coil or Hall sensor. Summary of the invention
[0030] The object of the present invention is therefore to provide a step-up converter for a power supply device which avoids the above-mentioned disadvantages. The inventors have recognized that the potential for the measuring and control circuit should be set to a low-interference potential of the negative intermediate circuit voltage as usual. In addition, the current measurement is achieved as cost-effectively as possible with only one measuring resistor in the current path and with little additional wiring for current detection.
[0031] This object is achieved by a step-up converter according to claim 1 , a power supply device for an electrical load according to claim 12 , and a method for stepping up an input voltage in a power supply device according to claim 14 .
[0032] The dependent claims contain advantageous embodiments and developments of the invention corresponding to the following description.
[0033] In a general embodiment, the invention relates to a step-up converter for an electrical load power supply device, which has a rectifier circuit or a pole converter circuit, an inductor and a filter capacitor, wherein the inductor is connected to a pole of an AC voltage source and to a junction between two semiconductor switches. The step-up converter is characterized in that a first semiconductor switch is connected in series with a measuring resistor and has a signal generation unit for generating actuation signals for the two semiconductor switches, wherein, in order to step up the input voltage in the case of a positive input voltage, the first semiconductor switch is closed and the second semiconductor switch is opened in order to drive a current through the inductor to magnetize the inductor. For demagnetization of the inductor, the first semiconductor switch is opened and the second semiconductor switch is closed, and the filter capacitor is charged accordingly. In this case, the signal generation unit has a device for detecting a current flowing through the measuring resistor at the beginning of the phase of the magnetizing inductor, and a filter capacitor, wherein the inductor is connected to a pole of the AC voltage source and to a junction between the two semiconductor switches. In a preferred embodiment, the first semiconductor switch is connected in series with the measuring resistor to measure the current flowing through the first semiconductor switch. Here, a signal generation unit is provided in the boost converter for generating actuation signals for two semiconductor switches. In order to boost the input voltage in the case of a positive input voltage, the first semiconductor switch is closed and the second semiconductor switch is opened so as to drive a current through the inductor to magnetize the inductor. In order to demagnetize the inductor, the first semiconductor switch is opened and the second semiconductor switch is closed. Therefore, in the demagnetization phase, the filter capacitor is charged accordingly. In addition, the signal generation unit has a device for detecting the current flowing through the measuring resistor at the beginning of the phase of magnetizing the inductor in the case of a positive input voltage. The advantage provided by the present invention is that the semiconductor switch is switched as lossless as possible. What is particularly disturbing for the lossless switch is the capacitance of the semiconductor switch. It causes a voltage during the switching process, which together with the remaining current in the semiconductor switch causes power loss. In order to switch losslessly, the capacitance of the semiconductor switch needs to be discharged as completely as possible. For this purpose, current measurement is required. A particular advantage of this circuit is that a simple measuring resistor is sufficient for current measurement.
[0034] In an extension of the invention, in order to boost the input AC voltage in the case of a negative input voltage, the first semiconductor switch is opened and the second semiconductor switch is closed in order to drive a current through the inductor to magnetize the inductor, wherein the first semiconductor switch is closed and the second semiconductor switch is opened for demagnetizing the inductor. In the demagnetization phase, the filter capacitor is charged accordingly. In this case, the signal generation unit has a device for detecting the current flowing through the measuring resistor at the end of the phase of demagnetizing the inductor. This variant of the invention enables lossless switching of the semiconductor switch by matching the control signal of the semiconductor switch even when a negative half-wave of the input AC voltage is applied. Therefore, the invention can save the half-oscillation rectification that would cause additional costs.
[0035] Furthermore, it is advantageous for the switch to be as lossless as possible that the signal generation unit has a calculation unit, which precalculates the adjustment cycle time for the magnetization and demagnetization phases of each adjustment cycle based on the input voltage and the output voltage. Here, the adjustment cycle consists of the phases for magnetization and demagnetization. Here, the signal generation unit also has an adjustment stage, which calculates the correction value for the adjustment cycle time based on the difference between the current value flowing through the measuring resistor and the current reference value. Therefore, various factors required for more accurate calculation of the adjustment cycle time can be ignored. Some factors such as component deviations are unavoidable and can only be detected at high cost. In addition, some factors may be caused by aging, which means more expenses for considering these factors.
[0036] For lossless switching, it is particularly advantageous if the correction value is used in a timer unit of the signal generating unit for a subsequent control cycle, so that the timer unit shortens or lengthens the control cycle time accordingly. The signal generating unit generates actuation signals for the semiconductor switches.
[0037] It is also advantageous if the signal generating unit has a further control stage which calculates the magnetization time from the difference between the predetermined output voltage and the measured output voltage. This corresponds to a voltage regulator which outputs a control variable in order to keep the output voltage constant.
[0038] In order to generate the control signal for the semiconductor switch, it is advantageous if the signal generation unit has a further timer unit to which the calculated magnetization time is transmitted and in which the calculated magnetization time is used for a plurality of subsequent control cycles. The control signal is generated in the form of a PWM signal. The duty cycle of the PWM signal can be variably set by means of a separate timer unit.
[0039] An advantageous variant here is that a plurality of control cycles resulting from the calculated magnetization time is valid for a half-wave of the input AC voltage. For simplification, the magnetization time is kept constant over a half-wave, while the demagnetization time is adjusted.
[0040] It is also advantageous for this purpose that the signal generation unit is equipped with an input AC voltage detection unit, which is configured to determine the phase of the input AC voltage and to provide information about the phase, in particular whether there is a positive half-wave or a negative half-wave of the input AC voltage, to a configuration unit of the signal generation unit. The operating mode of the boost converter according to the invention is different for the positive half-wave and the negative half-wave of the input AC voltage. Therefore, the detection of the phase is advantageous.
[0041] In this connection, another advantageous variant is that the configuration unit is provided for configuring a plurality of components of the signal generating unit to operate with a positive input voltage or a negative input voltage, depending on what the information about the phase of the input AC voltage indicates. The different components are usually configured via register entries, which can be performed by the configuration unit.
[0042] In order to detect the current when the capacitance of the semiconductor switch is discharged, it is advantageous if a measuring resistor is connected between the first semiconductor switch and a return line to the input AC voltage source, to which return line no inductance is connected.
[0043] Typically, a choke coil is used as the inductor in a step-up converter. This can be adjusted exactly via the number of turns and the extension or compression as well as the geometrical design.
[0044] In another form, the invention is a power supply device for an electrical load, which has a step-up converter according to the invention. The step-up converter according to the invention can be used particularly advantageously as a step-up converter for power factor pre-regulation in a power supply device.
[0045] Such a power factor pre-regulation stage can be used particularly advantageously in switched mode power supplies.
[0046] Another form of the invention is a method for stepping up an input voltage in a power supply device for an electrical load. In this case, a step-up converter has a rectifier circuit, an inductor and a filter capacitor, wherein the inductor is connected to one pole of an input voltage source and to a junction between two semiconductor switches. In addition, there is a signal generation unit for generating a control signal for the semiconductor switches, wherein in order to step up the input voltage in the case of a positive input voltage, the first semiconductor switch is closed and the second semiconductor switch is opened so as to drive a current through the inductor in order to magnetize the inductor, and wherein for demagnetization of the inductor, the first semiconductor switch is opened and the second semiconductor switch is closed and the filter capacitor is charged accordingly. The method is characterized in that the current through the measuring resistor is measured at the beginning of the phase for magnetizing the inductor, and the control cycle time for the magnetization and demagnetization phases of each control cycle is precalculated based on the input voltage and the output voltage. A correction value for the control cycle time is calculated by the control stage based on the difference between the measured current value flowing through the measuring resistor and the current reference value to correct the precalculated control cycle time. Deviations from the precalculated control cycle time are therefore compensated and after a number of control cycles a desired demagnetization time is reached which results in a complete discharge of the capacitance of the semiconductor switch.
[0047] In this context, it is particularly advantageous that in this method the current through the measuring resistor is measured at predetermined times which are predefined by a precalculated control cycle time and corrected with a correction value. It is sufficient for the invention to measure the current only at these points in time, which is achievable with a cost-effective AD converter. BRIEF DESCRIPTION OF THE DRAWINGS
[0048] Several exemplary embodiments of the present invention are explained in more detail below with reference to the diagrams shown in the drawings. The drawings show:
[0049] Figure 1 The schematic circuit diagram of the switching power supply device is shown;
[0050] Figure 2 A schematic circuit diagram of a half-bridge PFC circuit with a semiconductor switch is shown;
[0051] Figure 3 Shown by Figure 2 The current trend of the inductor of the half-bridge PFC circuit, and the voltage trend on the semiconductor switch S due to its drain-source capacitance;
[0052] Figure 4 A schematic circuit diagram of a half-bridge PFC circuit with two semiconductor switches is shown;
[0053] Figure 5 Shown by Figure 4The current trend of the inductor of the half-bridge PFC circuit, and the voltage trend of the semiconductor switch S1 due to its drain-source capacitance;
[0054] Figure 6 A schematic circuit diagram of a half-bridge PFC circuit having two semiconductor switches and a commutator circuit is shown;
[0055] Figure 7 A principle circuit diagram of a half-bridge PFC circuit with two semiconductor switches is shown, wherein a diode is used to implement a pole converter circuit;
[0056] Figure 8 shows that in the case of a positive half-wave of the input voltage, the Figure 7 The current trend of the inductor of the half-bridge PFC circuit;
[0057] Fig. 9 shows the negative half-wave of the input voltage. Figure 7 The current trend of the inductor of the half-bridge PFC circuit in; and
[0058] Fig.10 A block diagram of a signal generation unit of a half-bridge PFC circuit is shown. DETAILED DESCRIPTION
[0059] This specification illustrates the principles of the present invention. Therefore, it should be understood that those skilled in the art will be able to design various embodiments that, although not explicitly described herein, embody the principles of the present invention and should also be protected within the scope of the present invention.
[0060] As described, there is a method for operating a PFC circuit in boundary conduction mode (BCM). Here, the time t for re-magnetizing the inductance L on the sine half-wave of the AC line voltage is on This time is proportional to the power output of the switched mode power supply and is predetermined by a voltage regulator which is intended to keep the output voltage of the circuit constant, ie, for example, 400V.
[0061] In addition, the time for demagnetizing the inductor L must also be adjusted. In the publication, this is done by generating a zero current detection (ZCD) signal, which is caused by the reverse charging process of the diode. However, this cannot be generated in a boost converter circuit in which the function of the diode is realized by a current switch, because the current switch cannot block itself.
[0062] In order to solve this problem, the present invention proposes to precalculate the time point at which the second current switch should be turned off, and adjust the time for demagnetization accordingly.
[0063] The demagnetization time (off time) when the first current switch S1 is open and the second current switch S2 is closed is as follows from the time t for magnetization on Calculate:
[0064]
[0065] Since the calculation may deviate due to component tolerances and other factors such as delays in the generation of the control signal in the driver stage, it must be checked whether the desired current value in the inductance L is also achieved with the calculated closing time.
[0066] For this purpose, the required information about the current in the path from the first semiconductor switch S1 can be taken into account.A measuring voltage can be generated by means of a current measuring resistor, which is proportional to the current through the semiconductor switch S1.
[0067] Figure 6 The schematic diagram of the half-bridge PFC circuit according to the present invention is shown. A sinusoidal grid voltage with an effective value of 230V and a grid frequency of 50Hz is applied to the input terminal AC in On. The choke coil L1 is connected in the upper conductor. In this example, it has an inductance of 64 μH. The conductor leads to the node P1, which is connected to the drain output of the first semiconductor switch S1 on the one hand. On the other hand, the node P1 is connected to the source input of the second semiconductor switch S2. Both semiconductor switches S1 and S2 are implemented as field effect transistors of the nMOSFET type. Alternatively, other semiconductor switches can be used, such as bipolar transistors, thyristors or IGBTs. They are used to rectify the input signal and chop it. To this end, they are switched at a relatively high frequency, for example 100 kHz. The control signal CTRL1 is applied to the gate of the field effect transistor S1. The control signal CTRL2 is applied to the gate of the field effect transistor S2. The specific times of these control signals are calculated in the digital circuit, which has no Figure 6 , but it will be explained in detail below. A filter capacitor C1 is connected to the output of the half-bridge PFC circuit 100, which is charged during the on-phase of the semiconductor switch S2 and provides a high voltage of, for example, 400V for the DC regulator of the subsequent switching power supply device. The filter capacitor C1 has a capacitance of, for example, 600μF. 2The current that flows in the reverse direction to discharge the transistor capacitance of the semiconductor switch S1 during disconnection flows through the measuring resistor R1, which is arranged in the lower switch branch of the series circuit of the two semiconductor switches S1 and S2. The measuring resistor R1 has a resistance value of 20mΩ, for example. The transistor capacitance is discharged by means of this current, which is required for lossless switches. In order to achieve this, it is first necessary to detect the current in terms of measurement technology. Therefore, the voltage drop of the measuring resistor R1 is detected. This is done in the following way, the voltage at the node P3 is delivered to the input of the digital circuit, and the voltage is measured by the digital circuit. For this purpose, the A / D input of the digital circuit can be used. Two other semiconductor switches S3 and S4 are arranged in the second branch. For example, it also involves nMOS field effect transistors. The node P2 to which these two transistors are connected is connected to the return wire leading to the power plant. The two semiconductor switches S3 and S4 are used for the change of poles of the circuit. In order to realize the positive half-wave of the input voltage, S4 is blocked and S3 is turned on. In order to realize the negative half-wave of the input voltage, S3 is blocked and S4 is turned on. The switching signals CTRL3 and CTRL4 are therefore switched at a grid frequency of 50 Hz.
[0068] Figure 7 Another variant of the circuit is shown, in which the two semiconductor switches S3 and S4 are replaced by diodes. The advantage of this variant is that these diodes do not require a dedicated switching signal. The diodes are self-locking and show the desired polarity reversal behavior even without a control signal. Figure 7 With Figure 6 Other components with the same reference numerals in the drawings represent the same components.
[0069] With the help of Figure 7 The circuit is expanded by the following publicly known method:
[0070] LED Application Design Using BCM Power Factor Correction(PFC)Controller for 100W Lightning System; AN-9731, O2011 Fairchild Semiconductor Corporation Rev.1.0.0, 3 / 24 / 11.
[0071] With this circuit design, the PFC circuit is operated in the so-called "boundary conduction mode" (BCM). Here, the time T is arranged at about 100 kHz to chop the input voltage. onThe PFC circuit includes a current control loop whose task is to maintain the instantaneous value of the input current I L (t) (choke coil current) and the instantaneous value of input voltage V in (t). The power factor can then be kept close to unity. This time is proportional to the power and is predetermined by the voltage regulator, which is intended to keep the output voltage of the circuit constant at, for example, 400 V.
[0072] In order to adjust the time for demagnetizing the choke coil L, the aforementioned publication uses a zero current detection (ZCD) signal, which is caused by the reverse charging process of the diode. However, this cannot be generated in a boost converter circuit that uses a low-loss semiconductor switch S2 to implement the diode function, because these semiconductor switches do not block themselves when a gate voltage is present.
[0073] Therefore, according to the present invention, the time point at which the second semiconductor switch S2 should be disconnected is calculated in advance, and the calculation is corrected by means of an additional current regulation process. This precalculation and correction can be performed based on a positive input voltage (positive half-wave) or a negative input voltage (negative half-wave), because in both cases the information required for adjusting the current threshold is contained.
[0074] Figure 8 The current control process is shown for a positive input voltage. The current measured by the measuring resistor is plotted along the ordinate. The time t is plotted along the abscissa. The course of the current measured via the measuring resistor R1 is plotted with I b The time T used to magnetize the choke coil L is on During the positive half-wave of the input AC voltage, the semiconductor switch S1 is closed and the semiconductor switch S2 is open. P The remaining time of T is variable and is used to demagnetize the choke coil L and discharge the transistor capacitance of the semiconductor switch S1 to a precalculated value and to adjust the deviation. P During the remaining time, semiconductor switch S1 is open and semiconductor switch S2 is closed. Figure 8 The adjustment time during the second adjustment cycle shown is shown in FIG. 1 and is denoted by T Offset This corresponds to a correction value, which is used to correct the time T calculated in advance after the last adjustment process. P .exist Figure 8 It can also be seen that in the second adjustment cycle shown, the period T P Because the previous adjustment process has already shown that the pre-calculated time TP is indeed too long, because the measured current I b Does not meet the defined reference value I ref , but deviates from the value Ierr(t-1) and the reference value I can only be achieved by shortening the period ref In the third adjustment cycle, the desired reference value I ref The detection time points of the current value are indicated by the "+" symbol. These time points correspond to T P The pre-calculated and corrected value of
[0075] Fig. 9 The corresponding control process at the end of the current flank is shown for a negative input voltage. In this case, three correction values T are shown. Offset (t-2), T Offset (t-1). Thus, the precalculated length of the control cycle is corrected in each of the three shown control cycles. The precalculated value is shortened in the first cycle, extended in the second cycle and shortened again in the third control cycle. The current measurement value is also detected at the point indicated by the "+" sign. Here, the AD converter triggers the measurement value detection at the precalculated and corrected time point.
[0076] at last, Fig.10 The block diagram of an integrated circuit 110 is shown, with which this type of regulation is implemented. The integrated circuit can be implemented in the form of a DSP (digital signal processor), an FPGA (field programmable gate array) or an ASIC (application specific integrated circuit), or can be implemented with the aid of a standard microcontroller and corresponding software. In this case, the regulator structure is suitable for the case where a positive input voltage (half-wave) is applied.
[0077] With this regulator, control signals CTRL1 and CTRL2 are generated for the semiconductor switches S1 and S2 of the step-up converter 100. The block diagram contains the following components: Two subtraction stages are denoted by reference numerals 111a and 111b. In stage 111a, a reference voltage V out_ref Subtract the output voltage V out The output voltage should be kept as constant as possible to a value of 400 V. Therefore, the deviation from the rated value is determined in the subtraction stage 111a. Depending on the load of the switched-mode power supply, the intermediate circuit voltage may vary from 400 V and must be subsequently regulated. In the subtraction stage 111b, the voltage is subtracted from the specified reference value I refSubtract the current I flowing through the measuring resistor R1 from the current I b As described, the current is always measured at a precalculated and corrected point in time. No other current measurement values need to be detected. Therefore, the difference with the setpoint value I is determined in the subtraction stage 111b. ref The corresponding deviation I err This is essential information for the subsequent control stage 113 in which the precalculated cycle duration T for the control cycle is calculated. P Correction value T offset For this purpose, a PI controller or a PID controller can be used, for example. Other controllers can also be used, depending on how quickly the difference should be adjusted as required. The control stage 113 converts the correction value T Offset The output is to the main timer unit 116 connected downstream. It corresponds to a programmable timer unit, which outputs an event after each set time. The event can also be output in the form of a generated signal. In digital technology, the event can also be output in the form of a software event, by which a specific program routine is called similarly to the case of interrupt generation by software. A timer for calculating the duty cycle for the control signals CTRL1 and CTRL2 is provided in the main timer unit 116. The actual signal generation occurs in the PWM signal generation unit 119. In order to be able to generate both the control signals CTRL1 and CTRL2 with the desired duty cycle, it is also necessary to calculate the pre-calculated magnetization time T on This information is provided by the control stage 112. This time remains constant for the positive half-wave. Therefore, it is a control stage that only subsequently adjusts the setpoint relatively slowly. It has been shown that even a 10 Hz PI controller is sufficient for this purpose. Magnetization time T on It can be calculated with the following formula
[0078]
[0079] This formula has already been explained at the beginning. It always applies when the current profile through the choke coil L1 runs at the intermittent limit. The control stage 112 works with the input information from the subtraction stage 111a about the difference between the desired intermediate circuit voltage of, for example, 400 V and the actually measured intermediate circuit voltage. The adjusted magnetization time T on On the one hand, it is provided to the second timer unit 115, which outputs the corresponding event to the PWM signal generation unit 119. On the other hand, the magnetization time T on is supplied to the calculation unit 114, which calculates the time for the total length of the magnetization time and the demagnetization time using the following formula.
[0080]
[0081] The first part of the formula corresponds to the formula described at the outset for calculating the demagnetization time t off formula.
[0082] The state of the input voltage is detected by means of a state machine 117. This is raster scanned at a time of 25 kHz. The state machine 117 determines whether a positive half-wave or a negative half-wave of the input voltage is present. The determined state is forwarded to a configuration unit 118, which performs corresponding register settings for the different blocks of the integrated circuit 110 according to the state. At least the PWM signal generation unit 119 must be reconfigured, since the functions of the semiconductor switches S1 and S2 are swapped in the case of a negative input voltage.
[0083] In summary, the working method of the integrated circuit is explained again. With the help of the integrated circuit 110, according to the input voltage V in and output voltage V out And adjust the magnetization time T on The voltage regulator 112 is provided with information, and the regulation cycle time T is pre-calculated in the calculation unit 114. P , choke coil current I L The lower current threshold value must be reached with this control cycle time. After the end of this control cycle time, the two semiconductor switches S1 and S2 are switched off and a short time later, the first semiconductor switch S1 is switched on again. The measuring resistor R1 is now current-carrying and the current currently flowing through the measuring resistor is measured directly after S1 is switched on. If this current differs from the nominal reference value that must be set in order to completely discharge the transistor capacitance, the further control stage 113 sets the correction value T Offset , which correction value is added to the pre-calculated regulation cycle time T for the next regulation cycle P This results in adjusting the cycle time T according to the correction value. P Thus, in the next regulation cycle, the current approaches the reference value. Therefore, the regulation stage 113 adapts the current at the measurement point to the reference current. The selected reference value I ref It is constant over the sine half wave.
[0084] However, it is also possible in this method to consider another point from the current side for regulation. For this purpose, the calculation of the current reference value must be adjusted. This can have different advantages. For example, average current regulation can also be achieved, in which the circuit is not operated in BCM mode, but for example in CCM mode, i.e. Continuous Conduction Mode.
[0085] The present disclosure is not limited to the embodiments described herein. Various modifications and changes will occur to those skilled in the art based on their expertise and the present disclosure.
[0086] Description of Reference Numerals
[0087] Network filter 1
[0088] Boost Regulator 2
[0089] Filter capacitor 3
[0090] Switching level 4
[0091] Transmitter 5
[0092] Regulator 6
[0093] Optocoupler 7
[0094] Active PFC circuit 10
[0095] DC regulator 20
[0096] Power delivery level 30
[0097] Smoothness level 40
[0098] Adjustment level 50
[0099] Potential separator 60
[0100] Controller 70
[0101] Boost converter 100
[0102] Signal generating unit 110
[0103] Subtraction stages 111a, 111b
[0104] Additional regulation stage 112
[0105] Regulation level 113
[0106] Computing unit 114
[0107] Additional timer unit 115
[0108] Timer unit 116
[0109] Input AC voltage detection unit 117
[0110] Configuration unit 118
[0111] PWM signal generating unit 119
[0112] Filter capacitor C1
[0113] Control signals CTRL1, CTRL2
[0114] Diode D
[0115] Rectifier diodes D1, D2
[0116] Transistor Capacitance C osc
[0117] The measured current I b
[0118] Wire I for current measurement b_sense
[0119] Deviation from rated current I err
[0120] Coil current I L
[0121] Rated current I ref
[0122] Choke coil L1
[0123] Semiconductor switches S1, S2, S3, S4
[0124] Switching power supply equipment SNG
[0125] Magnetization time t on
[0126] Demagnetization time t off
[0127] Resonance time t Res
[0128] Correction value T Offset
[0129] Magnetization time T on
[0130] Adjustment cycle time T P
[0131] Input voltage V in
[0132] Output voltage V out
[0133] Output voltage reference value V out_ref
Claims
1. A step-up converter for a power supply device for an electrical load, the step-up converter comprising a rectifier circuit or a converter circuit (D1, D2; S3, S4), an inductor (L1) and a filter capacitor (C1), wherein the inductor (L1) is connected to an AC voltage source (AC in ) and connected to the node between two semiconductor switches (S1 and S2), characterized in that: The first semiconductor switch (S1) is connected in series with a measuring resistor (R1), the step-up converter has a signal generating unit (110) for generating actuation signals for the two semiconductor switches (S1, S2), wherein in order to in ), the input voltage is boosted in the case of a first semiconductor switch (S1) being closed and the second semiconductor switch (S2) being opened to drive a current through the inductor (L1) to magnetize the inductor (L1), wherein in order to demagnetize the inductor (L1), the first semiconductor switch (S1) is opened and the second semiconductor switch (S2) is closed and the filter capacitor (C1) is charged accordingly, wherein the signal generation unit (110) has a device for detecting a current flowing through the measuring resistor (R1) at a selected time point in the phase of magnetizing the inductor (L1), wherein the signal generation unit (110) has a calculation unit (114) which calculates the current flowing through the measuring resistor (R1) according to the input voltage (V in ) and output voltage (V out ) to pre-calculate the regulation cycle time (T) for the magnetization and demagnetization phases of each regulation cycle P ), and the signal generation unit (110) also has a regulation stage (113) which is based on the measured current value (I b ) and the current reference value (I ref ) to calculate the adjustment cycle time (T P ) correction value (T Offset ).
2. The boost converter according to claim 1, wherein: The selected time point is when the magnetization phase begins.
3. The boost converter according to claim 1, wherein: In order to in ), the input AC voltage is boosted in the case of a first semiconductor switch (S1) being opened and the second semiconductor switch (S2) being closed so as to drive a current through an inductor (L1) to magnetize the inductor (L1), wherein, in order to demagnetize the inductor (L1), the first semiconductor switch (S1) is closed and the second semiconductor switch (S2) is opened and the filter capacitor (C1) is charged accordingly, and the signal generating unit (110) has a device for detecting a current flowing through a measuring resistor (R1) at a selected time point in the phase of demagnetizing the inductor (L1).
4. The boost converter according to claim 3, wherein: The selected time point is when the demagnetization phase ends.
5. The boost converter according to claim 1, wherein: The correction value (T Offset ) is used in the timer unit (116) of the signal generating unit (110) for the subsequent regulation cycle, so that the timer unit (116) shortens or lengthens the regulation cycle time accordingly.
6. The boost converter according to claim 5, wherein: The signal generation unit (110) has a further control stage (112) which calculates the magnetization time (T on ).
7. The boost converter according to claim 6, wherein: The signal generating unit (110) has a further timer unit (115) which calculates the magnetization time (T on ) is forwarded to the further timer unit, in which the magnetization time (T on ) is applied to multiple subsequent adjustment cycles.
8. The boost converter according to claim 7, wherein: The calculated magnetization time (T on ) is applied to multiple regulation cycles that are valid for half-waves of the input AC voltage.
9. The boost converter according to claim 1, wherein: The signal generating unit (110) is equipped with an input AC voltage detecting unit (117) which is configured to determine the phase of the input AC voltage and provide information on the phase to a configuring unit (118) of the signal generating unit (110).
10. The boost converter according to claim 9, wherein: The information about the phase is about whether a positive or negative half-wave of the input AC voltage is present.
11. The boost converter according to claim 9, wherein: The configuration unit (118) is configured to configure components of the signal generation unit (110) for operation at a positive input voltage or at a negative input voltage, depending on what the information about the phase of the input AC voltage indicates.
12. The boost converter according to claim 1, wherein: The measuring resistor (R1) is connected between the first semiconductor switch (S1) and the input AC voltage source (AC in ) between the return conductors, and the inductor (L1) is not connected to the return conductor.
13. The boost converter according to claim 1, wherein: The step-up converter has a choke coil (L1) as inductor.
14. A power supply device for an electrical load, characterized in that The power supply device comprises a step-up converter according to one of the preceding claims, wherein the step-up converter is used for power factor pre-regulation in the power supply device.
15. The power supply device according to claim 14, wherein: The power supply device is designed as a switching power supply device.
16. A method for stepping up an input voltage in a power supply device for an electrical load, the power supply device comprising a step-up converter (100) with a rectifier circuit or inverter circuit (D1, D2; S3, S4), an inductor (L1) and a filter capacitor (C1), wherein: The inductor (L1) is connected to the input voltage source (AC in ) and connected to a node between two semiconductor switches (S1 and S2), and the boost converter has a signal generating unit (110) for generating actuation signals (CTRL1, CTRL2) for the semiconductor switches (S1, S2), wherein in order to in ), the input voltage is stepped up, the first semiconductor switch (S1) is closed and the second semiconductor switch (S2) is opened, so as to drive a current through the inductor (L1) to magnetize the inductor (L1), and wherein, in order to demagnetize the inductor (L1), the first semiconductor switch (S1) is opened and the second semiconductor switch (S2) is closed and the filter capacitor (C1) is charged accordingly, characterized in that the current flowing through the measuring resistor (R1) is measured at a selected time point in the phase of magnetizing the inductor (L1), and according to the input voltage (V in ) and output voltage (V out ) to pre-calculate the regulation cycle time (T) for the magnetization and demagnetization phases of each regulation cycle P ), and the regulating stage (113) is based on the measured current value (I b ) and the current reference value (I ref ) to calculate the adjustment cycle time (T P ) correction value (T Offset ) to correct the pre-calculated adjustment cycle time (T P ).
17. The method according to claim 16, wherein: The selected point in time is at the beginning of the phase of magnetizing the inductor (L1).
18. The method according to claim 16, wherein: The current (I) flowing through the measuring resistor (R1) is measured at a preset time. b ), the preset time is calculated by the pre-calculated adjustment cycle time (T P ) and the correction value (T Offset ) is pre-set correctly.
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