A two-stage low noise amplifier based on flexible substrate and its manufacturing method

Abstract

The present invention discloses a two-stage low noise amplifier based on a flexible PET substrate and a manufacturing method thereof. The circuit topology structure includes six inductors, namely a first inductor L1, a second inductor L2, a third inductor L3, a fourth inductor L4, a fifth inductor L5 and a sixth inductor L6, three capacitors, namely a first capacitor C1, a second capacitor C2 and a third capacitor C3, two transistors, namely a first transistor T1 and a second transistor T2 and a plurality of interconnecting wires. Compared with the prior art, the present invention has the advantages of excellent design performance, accurate model and less influence of non-ideal characteristics such as parasitic on the actual circuit.

Description

Technical Field

[0001] The present invention belongs to the field of flexible radio frequency circuit design, and in particular relates to an ADS combined with HFSS design method for flexible capacitors and inductors and a flexible device manufacturing process. Background Art

[0002] In recent years, unlike the rigidity and brittleness of traditional semiconductor devices, flexible / stretchable electronic devices based on flexible materials have opened up new application spaces that rigid chips themselves cannot solve due to their outstanding advantages such as small size, light weight, and conformal adhesion to irregular surfaces (including digital medicine, electronic skin, human brain interface, wearable electronic products, etc.). In these applications, wireless communication modules play a vital role. Flexible electronic devices, especially high-speed flexible devices (such as radio frequency devices), have received more and more attention. A large number of semiconductor materials have been studied and used in the field of high-speed flexible electronics (such as organic materials, polycrystalline or amorphous silicon, and metal oxides). Among them, high-speed flexible transistors require bendable high-performance semiconductor materials, and single-crystal silicon has price and technical advantages that other materials do not have in most cases. Thin film transfer technology is to transfer ultra-thin single-crystal silicon films to flexible substrates through wet transfer. Traditional device manufacturing processes can be applied to flexible devices, making flexible devices have broader application prospects in the field of high frequency and high speed. Although there have been many studies in the field of high-speed flexible electronics at home and abroad, most of the research results focus on the design and manufacture of high-speed transistors and high-speed flexible electronic discrete devices. The research on flexible circuit design and the impact of flexible devices on circuit performance is still very limited, making the production of flexible RF integrated circuits difficult. Therefore, the research on flexible two-stage low-noise amplifiers has important research value and significance. Summary of the invention

[0003] The purpose of the present invention is to overcome the shortcomings of existing flexible circuit technology, propose a two-stage low-noise amplifier based on a flexible substrate and a manufacturing method thereof, realize the design of a flexible two-stage low-noise amplifier, an ADS combined with HFSS design method for flexible capacitors and inductors, and a flexible device manufacturing process.

[0004] The present invention is achieved by adopting the following technical solutions:

[0005] A two-stage low-noise amplifier based on a flexible PET substrate, the circuit topology of the low-noise amplifier includes six inductors, namely a first inductor L1, a second inductor L2, a third inductor L3, a fourth inductor L4, a fifth inductor L5 and a sixth inductor L6, three capacitors, namely a first capacitor C1, a second capacitor C2, and a third capacitor C3, two transistors, namely a first transistor T1 and a second transistor T2, and a plurality of interconnecting wires; wherein,

[0006] The first inductor L1, the second inductor L2 and the first capacitor C1 form a T-type input matching network, the fourth inductor L4 and the second capacitor C2 form an inter-stage matching network, and the sixth inductor L6 and the third capacitor C3 form an output L-type matching network. The third inductor L3 and the inductor L5 respectively play a negative feedback role on the first transistor T1 and the second transistor T2 to ensure the stability of the circuit; the two-stage low-noise amplifier based on the flexible PET substrate is manufactured according to the following process:

[0007] Step 1: Use ADS RF circuit simulation software to generate the low noise amplifier circuit topology;

[0008] Step 2: Optimize the capacitance and inductance values ​​in the ADS RF circuit;

[0009] Step 3: Draw a mask plate, and make the ion implantation area, hole layer area, top metal layer, capacitor and inductor areas on the flexible PET substrate respectively;

[0010] Step 4: First, a high concentration of phosphorus ions are implanted on the silicon SOI on the insulating substrate to form source and drain regions, and then annealed to obtain higher mobility and lower internal resistance to help achieve higher frequency response;

[0011] Step 5: Then pattern the top silicon on the SOI into a silicon strip with a width of about 45 μm, and use hydrofluoric acid to etch the buried oxide sacrificial layer on the SOI until it is completely etched away by the 49% concentration of hydrofluoric acid; use wet transfer technology to transfer the silicon strip to a 250 μm poly-PET substrate, with a transfer rate of more than 99%; then use vacuum electron beam evaporation to grow the gate dielectric layer SiO and the gate dielectric layer Ti / Au in the gate region; finally, grow the source and drain in the source and drain region to form a flexible thin film transistor;

[0012] Step 6: Deposit and photolithograph a 30nm / 400nm thick Ti / Au metal layer M1 on the PET substrate using electron beam evaporation. During the manufacturing process, the spiral inductor is fully compatible with the manufacturing process of the bottom metal layer M1 of the metal-insulator-metal MIM capacitor, and is used as the bottom electrode of the MIM capacitor and the lead of the spiral inductor.

[0013] Step 7: A dielectric layer SiO with a thickness of 200 nm is evaporated by vacuum electron beam at room temperature, and then another layer of 30 nm / 400 nm thick Ti / Au metal M2 is evaporated and deposited on the dielectric layer SiO as the upper plate layer M2 of the MIM capacitor;

[0014] Step 8: Spin-coat a layer of SU-8 on the M2 layer as an interlayer dielectric between the bottom metal and the top metal to form a MIM capacitor. After the inductor forms the lead layer M1, spin-coat a dielectric layer again, and expose it to connect the lead layer M1 with the top through hole, and then cure it under ultraviolet irradiation and 115°C;

[0015] Step 9: Grow a 30nm / 1.5μm thick Ti / Au layer as the top metal layer M3 by electron beam evaporation.

[0016] Compared with the prior art, the present invention has the advantages of excellent design performance, accurate model, and little influence of non-ideal characteristics such as parasitics on the actual circuit. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Figure 1 A circuit topology diagram of a two-stage low noise amplifier based on a flexible substrate of the present invention;

[0018] Figure 2 is a schematic diagram of a transistor cross-sectional structure;

[0019] Figure 3 is a schematic diagram of the inductor structure;

[0020] Figure 4 Schematic diagram of capacitor structure.

[0021] Reference numerals:

[0022] 1. Substrate layer (flexible PET material) 2. Dielectric layer (SU-8 photoresist) 3. Channel, 41, 42, source S (source), 51, 52, gate G (gate), 6. Drain D (drain), 7. Metal layer M3, 8. Lead layer M1, 9. Center electrode (via layer), 10. Dielectric layer SiO, 11. Top plate layer M2, 12. GND. DETAILED DESCRIPTION

[0023] The technical solution of the present invention is described in detail below in conjunction with the accompanying drawings and specific embodiments.

[0024] like Figure 1As shown, it is a circuit topology diagram of a two-stage low noise amplifier based on a flexible PET substrate of the present invention. The circuit topology structure includes six inductors, namely the first inductor L1, the second inductor L2, the third inductor L3, the fourth inductor L4, the fifth inductor L5 and the sixth inductor L6, three capacitors, namely the first capacitor C1, the second capacitor C2, the third capacitor C3, two transistors, namely the first transistor T1, the second transistor T2 and a number of interconnecting lines. Among them, the first inductor L1, the second inductor L2 and the first capacitor C1 constitute a T-type input matching network, the fourth inductor L4 and the second C2 constitute an inter-stage matching network, and the sixth inductor L6 and the third capacitor C3 constitute an output L-type matching network. The third inductor L3 and the inductor L5 respectively play a negative feedback role on the first transistor T1 and the second transistor T2 to ensure the stability of the circuit. Among them, the inductor is a spiral inductor on a flexible substrate, the transistor is a flexible transistor (such as a flexible dual-gate TFT), and the capacitor is a flexible MIM capacitor.

[0025] like Figure 2 As shown, it is a schematic diagram of the cross-sectional structure of the transistor. The present invention adopts a flexible thin film transistor, and its structure includes: a substrate layer 1, which is made of flexible PET material. A dielectric layer 2, for the inductor, the smaller the dielectric parasitic capacitance of this layer is, the higher the frequency of the inductor is. SU-8 with a smaller dielectric constant is selected as the intermetallic dielectric layer. A channel 3, including an N+ channel and a silicon carbide c-Si channel arranged at intervals. In addition, it also includes two source electrodes S (source) 41, 42, two gate electrodes G (gate) 51, 52, and a drain electrode D (drain) 6.

[0026] like Figure 3 As shown, it is a schematic diagram of the inductor structure. The inductor of the present invention takes the spiral inductor on the flexible substrate as an example, and the structure is divided into 5 parts, namely: substrate layer 1, which adopts flexible PET material, substrate layer: flexible PET material, with a thickness of about 125 μm. Intermetallic dielectric layer 2, for the inductor, the smaller the dielectric parasitic capacitance of this layer, the higher the frequency of the inductor. The key selects SU-8 with a smaller dielectric constant as the intermetallic dielectric layer. The bottom lead layer M1 layer 8 is used for the connection metal between the center of the octagonal spiral inductor and the electric shock, and the opening area can be obtained by controlling the photoresist. Metal layer M3: The spiral inductor is formed by winding.

[0027] The manufacturing process steps of the spiral inductor on the flexible substrate of the above structure are as follows: On the bottom lead layer M1, a 30nm / 400nm thick Ti / Au metal is deposited and photolithographed on PET using electron beam evaporation, which is used as the connecting metal at the center of the octagonal spiral inductor. Then, a low dielectric constant SU-8 photoresist is spin-coated on the M1 layer, photolithography is performed, and a through hole is formed to connect the central metal of the spiral inductor. The SU-8 photoresist is then hardened by ultraviolet light (115 °C), and finally, a 30nm / 1.5 μm thick Ti / Au metal is grown by electron beam evaporation as in the first step to become metal M3. The thicker metal layer M3 is to reduce the parasitic resistance of the spiral inductor when working at RF.

[0028] Among them, the reason for choosing the octagonal spiral inductor is not only because of the convenience of parameter design and debugging and the higher quality factor compared to the square one, but also because the octagonal spiral inductor can reduce the microwave loss caused by RF operation. The entire flexible octagonal spiral inductor is fully compatible with the flexible thin film transistor and the flexible MIM capacitor substrate process to be introduced later.

[0029] like Figure 4 As shown, it is a schematic diagram of the capacitor structure. The capacitor of the present invention takes a flexible MIM capacitor as an example. The structure of the capacitor is relatively simple compared to the inductor. There are two commonly used capacitor structures: Metal-Insulator-Metal (MIM) capacitor and Vertically-Interdigitated-Capacitor (VIC) capacitor. The present invention uses a MIM capacitor based on a PET substrate, that is, a parallel plate capacitor, which is the most widely used on-chip capacitor form. The structure of the flexible MIM capacitor is divided into 6 parts, including: a substrate layer 1, a flexible PET material, with a thickness of about 125μm. A dielectric layer 2, using a 1.5 μm photoresist SU-8 photoresist. The bottom lead layer M1 8, as the lower plate metal of the MIM capacitor. The central electrode (via layer) 9, this layer uses a metal through hole to connect the bottom lead layer M1 lead and the central electrode of the upper plate layer M2. The upper plate layer M2, as the upper plate of the MIM capacitor. The dielectric layer 10, using SiO with a high dielectric constant.

[0030] In order to integrate the electrodes of the MIM capacitor and the spiral inductor at the same height, the electrodes of the capacitor are placed in the metal layer M3.

[0031] The process steps of the above-mentioned flexible MIM capacitor are as follows: As with the spiral inductor process steps, a 30nm / 400nm thick Ti / Au metal is deposited and photolithographically formed as the lower plate layer M2 of the MIM capacitor using electron beam evaporation. Subsequently, a layer of SiO with a thickness of 200nm is deposited on the lower plate of the capacitor by vacuum electron beam evaporation as a dielectric layer. It is worth noting that the dielectric layer of the MIM capacitor on a hard substrate is generally generated by enhanced chemical vapor deposition (PECVD), but the traditional PECVD requires 300-350 °C, while the temperature that the PET substrate layer can withstand is only 170°C. Therefore, a vacuum electron beam method that can be used at room temperature is selected to form SiO. After the dielectric layer is completed, a 30nm / 400nm thick Ti / Au layer is evaporated and precipitated on it as the upper plate layer M2 of the MIM capacitor. Subsequently, SU-8 photoresist is spin-coated on the upper plate layer M2 of the capacitor and photolithography is used to form the connecting wires that lead out the upper and lower plates of the capacitor. Finally, a 30nm / 1.5μm thick Ti / Au metal layer M3 is evaporated to serve as the external interconnection line of the MIM capacitor. The manufacturing processes of single-crystal silicon thin-film transistors, flexible spiral inductors and flexible MIM capacitors on flexible PET substrates are fully compatible, which greatly facilitates the design and manufacture of high-performance flexible RF circuits.

[0032] A two-stage low noise amplifier based on a flexible PET substrate of the present invention comprises the following steps:

[0033] Step 1: Use ADS RF circuit simulation software to generate the low noise amplifier circuit topology;

[0034] Step 2: Optimize the capacitance and inductance values ​​in the ADS RF circuit, and balance the noise, gain, and reflection coefficient to achieve the best effect.

[0035] Step 3: First draw a mask plate, and then make the ion implantation area, hole layer area, top metal layer, capacitor and inductor areas on the flexible PET substrate respectively.

[0036] Step 4: First, high-concentration phosphorus ions are implanted on the silicon on insulating substrate (SOI) to form the source and drain regions, which are then annealed (annealing furnace at 950°C) to obtain higher mobility and lower internal resistance, which helps achieve higher frequency response.

[0037] Step 5. Then pattern the top silicon on SOI into silicon strips with a width of about 45μm, and use hydrofluoric acid (HF) to etch the buried oxide sacrificial layer on SOI until it is completely etched away by 49% concentration of hydrofluoric acid. Use wet transfer technology to transfer the silicon strips to a 250μm polyethylene terephthalate (PET) substrate with a transfer rate of more than 99%. Subsequently, vacuum electron beam evaporation is used to grow the gate dielectric layer of SiO and the gate electrode of Ti / Au in the gate region. Finally, source and drain electrodes are grown in the source and drain regions to form a flexible thin film transistor, such as Figure 2 As shown, it is a schematic diagram of the flexible transistor structure; Figure 3 Shown is an optical microscope image of a flexible transistor.

[0038] Step 6: Deposit and photolithograph a 30nm / 400nm thick Ti / Au metal layer M1 on a PET (5 mil) substrate using electron beam evaporation. During the manufacturing process, the spiral inductor is fully compatible with the bottom metal layer M1 of the MIM (metal-insulator-metal) capacitor and is used as the bottom electrode of the MIM capacitor and the lead of the spiral inductor. Figure 4 ;

[0039] Step 7: A 200 nm thick dielectric layer SiO is evaporated by vacuum electron beam at room temperature. After that, another 30 nm / 400 nm thick Ti / Au metal layer is evaporated and deposited on the interlayer dielectric layer as the upper plate layer M2 of the MIM capacitor;

[0040] Step 8: Spin-coat a layer of SU-8 (1.5μm) on the M2 layer as the interlayer dielectric between the bottom metal and the top metal to form a MIM capacitor. After the inductor M1 is formed, spin-coat another layer of SU-8 and expose it to connect M1 with the top through hole, and then cure it under ultraviolet irradiation and 115°C.

[0041] Step 9: Grow a 30nm / 1.5μm thick Ti / Au layer as the top metal layer M3 by electron beam evaporation.

Claims

1. A two-stage low noise amplifier based on a flexible PET substrate, characterized in that: The low noise amplifier circuit topology structure includes six inductors, namely a first inductor L1, a second inductor L2, a third inductor L3, a fourth inductor L4, a fifth inductor L5 and a sixth inductor L6, three capacitors, namely a first capacitor C1, a second capacitor C2 and a third capacitor C3, two transistors, namely a first transistor T1 and a second transistor T2, and a number of interconnecting wires; wherein, The first inductor L1, the second inductor L2 and the first capacitor C1 constitute a T-type input matching network, the fourth inductor L4 and the second capacitor C2 constitute an inter-stage matching network, the sixth inductor L6 and the third capacitor C3 constitute an output L-type matching network, and the third inductor L3 and the inductor L5 respectively play a negative feedback role on the first transistor T1 and the second transistor T2 to ensure circuit stability; the two-stage low-noise amplifier based on the flexible PET substrate is manufactured according to the following process: Step 1: Use ADS RF circuit simulation software to generate the low noise amplifier circuit topology; Step 2: Optimize the capacitance and inductance values ​​in the ADS RF circuit; Step 3: Draw a mask plate, and make the ion implantation area, hole layer area, top metal layer, capacitor and inductor areas on the flexible PET substrate respectively; Step 4: First, a high concentration of phosphorus ions are implanted on the silicon SOI on the insulating substrate to form source and drain regions, and then annealed to obtain higher mobility and lower internal resistance to help achieve higher frequency response; Step 5: Then pattern the top silicon on the SOI into a silicon strip with a width of about 45 μm, and use hydrofluoric acid to etch the buried oxide sacrificial layer on the SOI until it is completely etched away by the 49% concentration of hydrofluoric acid; use wet transfer technology to transfer the silicon strip to a 250 μm poly-PET substrate, with a transfer rate of more than 99%; then use vacuum electron beam evaporation to grow the gate dielectric layer SiO and the gate dielectric layer Ti / Au in the gate region; finally, grow the source and drain in the source and drain region to form a flexible thin film transistor; Step 6: Deposit and photolithograph a 30nm / 400nm thick Ti / Au metal layer M1 on the PET substrate using electron beam evaporation. During the manufacturing process, the spiral inductor is fully compatible with the manufacturing process of the bottom metal layer M1 of the metal-insulator-metal MIM capacitor, and is used as the bottom electrode of the MIM capacitor and the lead of the spiral inductor. Step 7: A dielectric layer SiO with a thickness of 200 nm is evaporated by vacuum electron beam at room temperature, and then another layer of Ti / Au metal with a thickness of 30 nm / 400 nm is evaporated and deposited on the dielectric layer SiO as the upper plate layer M2 of the MIM capacitor; Step 8: Spin-coat a layer of SU-8 on the upper plate layer M2 as an interlayer dielectric between the bottom metal and the top metal to form a MIM capacitor. After the inductor forms the lead layer M1, spin-coat a dielectric layer again, and expose it to connect the lead layer M1 with the top through hole, and then cure it under ultraviolet irradiation and 115°C; Step 9: Grow a 30nm / 1.5μm thick Ti / Au layer as the top metal layer M3 by electron beam evaporation.

2. A two-stage low noise amplifier based on a flexible PET substrate as claimed in claim 1, characterized in that: The inductor is a spiral inductor on a flexible substrate, the transistor is a flexible transistor, and the capacitor is a flexible MIM capacitor.

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