Method for processing pathological network connection of cortico-cortical evoked potential
Through the pathological network connection method that deals with the induced potential of the cortex-cortical intercort, the problem of insufficient data generalization ability in the prior art is solved, and more efficient brain interval connection relationship analysis is achieved, supporting the treatment of brain diseases such as epilepsy.
Patent Information
- Application Number
- CN202011418726.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2020-12-07
- Publication Date
- 2025-07-29
- Estimated Expiration
- 2040-12-07
AI Technical Summary
The prior art lacks generalization ability when processing cortical-intercortical evoked potential data, making it difficult to effectively analyze and extract features such as latency of stimulus-response signals, resulting in unclear connection relationships of electrode sites or brain intervals.
By obtaining the original data of the cortex-cortical evoked potential, event marking, signal superposition averaging, threshold calculation and error discovery rate verification were carried out, stimulus-response matrix graph and connection relationship graph were constructed, and the location of electrode sites in the brain region was determined using CT and nuclear magnetic resonance images to aggregate the connection relationship between the brain regions of the cerebral cortex.
It improves the analysis efficiency of induced potential data between cortex and cortex, helps to more accurately determine the connection relationship between brain intervals during surgical treatment, and improves work efficiency.
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Figure CN114587386B_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the technical field of biomedical engineering, and particularly relates to a pathological network connection method, device, equipment and storage medium for processing cortico-cortical evoked potentials. Background Art
[0002] In recent years, with the development of functional neuroscience, evoked potential technology has been widely developed in the field of epilepsy surgery. Cortico–Cortical Evoked Potential (CCEP) is an electrophysiological technique based on intracranial electrodes, which refers to the evoked potential recorded in other brain regions by stimulating a local brain region. This method was first proposed by Japanese scholar Riki Maustmoto in 2004, and can assist in the treatment of brain diseases such as epilepsy, and has good clinical usability and high scientific research value.
[0003] Since the cortico-cortical evoked potential data is large in quantity and contains a lot of information, a method and system are needed to effectively process and analyze it, extract features such as the latency of the stimulus-response signal, and finally obtain the effective connection relationship between electrode sites or brain regions.
[0004] However, the existing method with the publication number CN110833407A for processing cortico-cortical evoked potential data based on MATLAB only preprocesses and basically analyzes the cortico-cortical evoked potential data, and has weak generalization ability. Summary of the Invention
[0005] In view of the above defects or deficiencies in the prior art, it is expected to provide a pathological network connection method, device, equipment and storage medium for processing cortico-cortical evoked potentials.
[0006] In a first aspect, an embodiment of the present application provides a pathological network connection method for processing cortico-cortical evoked potentials, and the method includes:
[0007] Obtain the original cortico-cortical evoked potential data;
[0008] Obtain the event markers of all channels at the time of evoked stimulation through the event marker channels in the original cortico-cortical evoked potential data, and the event marker is the moment when the stimulus is given at the evoked electrode;
[0009] Superpose and average the electroencephalogram signals obtained from multiple repeated stimulations of the same evoked stimulation, obtain the correct stimulus-response signal through the superposition and averaging, and obtain the latency t1 and t2 of the electroencephalogram signal and the corresponding peak values M1 and M2 according to the stimulus-response signal;
[0010] Calculate the baseline mean and the stimulus response mean for N repetitions of the same evoked stimulus, obtaining N points of the electrode baseline and N points of the stimulus response, and obtaining the threshold of the evoked response of the current electrode according to the hypothesis testing method;
[0011] Perform false discovery rate calibration on the thresholds obtained for all evoked stimuli, and obtain the connection relationship between the evoked electrode and the current electrode according to the calibration;
[0012] Construct a matrix diagram of stimulus-response and a connection relationship diagram between all brain electrode sites;
[0013] Obtain the position of the electrode site in the brain region through CT and magnetic resonance imaging registration methods, aggregate the stimulus responses of the electrode sites between the same brain regions, and obtain the connection relationship between the cerebral cortex brain regions.
[0014] In one embodiment, after obtaining the raw data of the cortico-cortical evoked potential, the method further includes:
[0015] Perform an outlier removal operation on the raw data through the 3sigma principle.
[0016] In one embodiment, after performing the outlier removal operation on the raw data through the 3sigma principle, the method further includes:
[0017] Remove bad channels to retain correct signal channels, downsample to reduce the time-domain signal dimension when the sampling rate is too high, filter to remove low-frequency noise and 50hz power frequency interference, and perform a detrending operation of subtracting the mean of the electroencephalogram signal to reduce the linear growth trend that occurs when collecting the electroencephalogram signal and remove the DC component in the signal.
[0018] In one embodiment, after constructing the matrix diagram of stimulus-response and the connection relationship diagram between all brain electrode sites, the method further includes:
[0019] Select the absolute maximum value in M1 and M2 as the weight of the node in the matrix diagram, and construct a weighted undirected network graph.
[0020] In a second aspect, an embodiment of the present application further provides a pathological network connection device for processing cortico-cortical evoked potentials, and the device includes:
[0021] An acquisition unit, configured to acquire raw data of cortico-cortical evoked potentials;
[0022] A marking unit, configured to obtain event marks of all channels during evoked stimuli through the event marking channels in the raw data of the cortico-cortical evoked potentials, and the event marks are the moments when the stimulus is given when the electrode is evoked;
[0023] An overlay unit for averaging the superposition of EEG signals obtained from multiple repeated stimulations of the same evoked stimulus, obtaining a correct stimulus-response signal through superposition averaging, and obtaining the latency t1 and t2 of the EEG signal, as well as the corresponding peaks M1 and M2, based on the stimulus-response signal;
[0024] A calculation unit for calculating the baseline mean and stimulus-response mean under N repetitions of the same evoked stimulus, obtaining N points of the electrode baseline and N points of the stimulus response, and obtaining the threshold of the evoked response of the current electrode according to the hypothesis testing device;
[0025] A verification unit for performing false discovery rate verification on the thresholds obtained from all evoked stimuli, and obtaining the connection relationship between the evoked electrode and the current electrode according to the verification;
[0026] A construction unit for constructing a matrix diagram of stimulus-response and a connection relationship diagram between all brain electrode sites;
[0027] An aggregation unit for obtaining the position of the electrode site in the brain region through a CT and nuclear magnetic resonance imaging registration device, aggregating the stimulus responses of the electrode sites between the same brain regions together, and obtaining the connection relationship between the cerebral cortex brain regions.
[0028] In one embodiment, after obtaining the original data of the cortico-cortical evoked potential, the device further includes:
[0029] An outlier removal operation unit for performing outlier removal operation on the original data through the 3sigma principle.
[0030] In one embodiment, after performing the outlier removal operation on the original data through the 3sigma principle, the device further includes:
[0031] A bad channel removal unit for removing bad channels to retain correct signal channels, downsampling to reduce the time-domain signal dimension when the sampling rate is too high, filtering to remove low-frequency noise and 50hz power frequency interference, and a detrending operation of subtracting the mean of the EEG signal to reduce the linear growth trend occurring during EEG signal acquisition and remove the DC component in the signal.
[0032] In one embodiment, after constructing the matrix diagram of stimulus-response and the connection relationship diagram between all brain electrode sites, the device further includes:
[0033] A selection unit for selecting the absolute maximum value from M1 and M2 as the weight of the node in the matrix diagram, and constructing a weighted undirected network graph.
[0034] In a third aspect, an embodiment of the present application further provides a computer device, including a memory, a processor, and a computer program stored on the memory and executable on the processor. When the processor executes the program, the methods described in any of the embodiments of the present application are implemented.
[0035] In a fourth aspect, an embodiment of the present application further provides a computer-readable storage medium with a computer program stored thereon. The computer program is used for: when the computer program is executed by a processor, the methods described in any of the embodiments of the present application are implemented.
[0036] Advantages of the present invention:
[0037] A pathological network connection method for processing cortico-cortical evoked potentials provided by the present invention obtains the positions of electrode sites in brain regions through CT and magnetic resonance imaging registration methods, aggregates the stimulation responses of electrode sites between the same brain regions, and obtains the connection relationships between cerebral cortex brain regions, so that higher-level brain connection relationships can be abstractly analyzed, which helps surgical treatments that require evoked stimulation and improves work efficiency. BRIEF DESCRIPTION OF THE DRAWINGS
[0038] By reading the detailed description of the non-limiting embodiments with reference to the following drawings, other features, objectives, and advantages of the present application will become more apparent:
[0039] Figure 1 The flowchart showing the pathological network connection method for processing cortico-cortical evoked potentials provided by the embodiment of the present application;
[0040] Figure 2 The flowchart showing the pathological network connection method for processing cortico-cortical evoked potentials provided by another embodiment of the present application;
[0041] Figure 3 The exemplary structural block diagram showing the pathological network connection device 300 for processing cortico-cortical evoked potentials according to an embodiment of the present application;
[0042] Figure 4 The exemplary structural block diagram showing the pathological network connection device 400 for processing cortico-cortical evoked potentials provided by another embodiment of the present application;
[0043] Figure 5 The structural diagram showing the computer system of the terminal device suitable for implementing the embodiment of the present application. DETAILED DESCRIPTION OF THE EMBODIMENTS
[0044] To make the above objects, features, and advantages of the present invention more apparent and understandable, the following provides a detailed description of the specific embodiments of the present invention in conjunction with the accompanying drawings. Many specific details are set forth in the following description to facilitate a full understanding of the present invention. However, the present invention can be implemented in many other ways different from those described herein, and those skilled in the art can make similar improvements without departing from the spirit of the present invention. Therefore, the present invention is not limited by the specific embodiments disclosed below.
[0045] In the description of the present invention, it is to be understood that the terms "center", "longitudinal", "transverse", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", "axial", "radial", "circumferential", etc. indicate the orientation or positional relationship based on the orientation or positional relationship shown in the drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and thus should not be construed as limiting the present invention.
[0046] In addition, the terms "first" and "second" are used only for descriptive purposes and cannot be construed as indicating or implying relative importance or implicitly specifying the quantity of the indicated technical features. Thus, features defined with "first" and "second" may explicitly or implicitly include at least one of such features. In the description of the present invention, "a plurality of" means at least two, such as two, three, etc., unless otherwise specifically defined.
[0047] In the present invention, unless otherwise clearly specified and limited, the terms "mounted", "connected", "coupled", "fixed", etc. shall be construed in a broad sense. For example, it may be a fixed connection, a detachable connection, or an integral body; it may be a mechanical connection or an electrical connection; it may be directly connected or indirectly connected through an intermediate medium, and it may be the internal communication of two elements or the interaction relationship between two elements, unless otherwise clearly limited. For those of ordinary skill in the art, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.
[0048] In the present invention, unless otherwise clearly specified and limited, the first feature being "on" or "under" the second feature may be that the first and second features are in direct contact, or the first and second features are indirectly in contact through an intermediate medium. Moreover, the first feature being "above", "over", and "on top of" the second feature may be that the first feature is directly above or obliquely above the second feature, or merely indicates that the first feature has a higher horizontal height than the second feature. The first feature being "below", "beneath", and "underneath" the second feature may be that the first feature is directly below or obliquely below the second feature, or merely indicates that the first feature has a lower horizontal height than the second feature.
[0049] It should be noted that when an element is referred to as "fixed to" or "disposed on" another element, it can be directly on the other element or there may also be an intermediate element. When an element is considered to be "connected" to another element, it can be directly connected to the other element or there may be an intermediate element at the same time. The terms "vertical", "horizontal", "upper", "lower", "left", "right" and similar expressions used herein are only for the purpose of illustration and do not represent the only implementation.
[0050] Please refer to Figure 1 , Figure 1 which shows a schematic flowchart of a method for processing pathological network connections of cortico-cortical evoked potentials provided by an embodiment of the present application.
[0051] As Figure 1 shown, the method includes:
[0052] Step 110, obtaining raw cortico-cortical evoked potential data;
[0053] Step 120, obtaining event markers of all channels during evoked stimulation through the event marker channel in the raw cortico-cortical evoked potential data, where the event marker is the moment when the stimulus is given at the evoked electrode;
[0054] Step 130, superimposing and averaging the electroencephalogram signals obtained from multiple repeated stimulations of the same evoked stimulation, obtaining the correct stimulus-response signal through the superimposition and averaging, and obtaining the latency t1 and t2 of the electroencephalogram signal, as well as the corresponding peak values M1 and M2, according to the stimulus-response signal;
[0055] Step 140, calculating the baseline mean value and the stimulus-response mean value under N repetitions of the same evoked stimulation, obtaining N points of the electrode baseline and N points of the stimulus response, and obtaining the threshold of the evoked response of the current electrode according to the hypothesis testing method;
[0056] Step 150, performing false discovery rate verification on the thresholds obtained from all evoked stimulations, and obtaining the connection relationship between the evoked electrode and the current electrode according to the verification;
[0057] Step 160, constructing a matrix diagram of stimulus-response and constructing a connection relationship diagram between all brain electrode sites;
[0058] Step 170, obtaining the position of the electrode site in the brain region through the CT and magnetic resonance imaging registration method, aggregating the stimulus responses of the electrode sites between the same brain regions together, and obtaining the connection relationship between the brain regions of the cerebral cortex.
[0059] In the embodiments of the present application, the position of the electrode site in the brain region is obtained through a CT and magnetic resonance imaging registration method, and the stimulation responses of the electrode sites between the same brain regions are aggregated together to obtain the connection relationship between the cerebral cortex brain regions, so that the brain connection relationship at a higher level can be abstractly analyzed, which helps the surgical treatment that requires induced stimulation and improves work efficiency.
[0060] In some embodiments, in order to make the acquisition of the original data of the cortico-cortical evoked potential more accurate, please refer to Figure 2 , Figure 2 which gives a schematic flowchart of a pathological network connection method for processing cortico-cortical evoked potentials provided by another embodiment of the present application.
[0061] As Figure 2 shown, the method includes:
[0062] Step 110, obtaining the original data of the cortico-cortical evoked potential;
[0063] Step 1101, performing an outlier removal operation on the original data through the 3sigma principle;
[0064] Step 120, obtaining the event markers of all channels during the evoked stimulation through the event marker channels in the original data of the cortico-cortical evoked potential, and the event marker is the moment when the stimulus is given during the evoked electrode;
[0065] Specifically, due to the characteristics of the cortico-cortical evoked potential, a rapid high-amplitude artifact will appear at the moment of the evoked stimulation in the recorded electroencephalogram (EEG) signal. Therefore, an outlier removal operation needs to be performed on the EEG signal to remove the artifact. The method can use the 3sigma test method. Since the 3sigma test method is a prior art, it will not be elaborated here. By continuously moving the sliding window, the points in the sliding window that exceed the mean + / - 3 times the standard deviation are replaced by the mean to ensure the correctness of the obtained signal.
[0066] In some embodiments, after performing the outlier removal operation on the original data through the 3sigma principle, the method further includes:
[0067] Removing the bad channels to retain the correct signal channels, downsampling to reduce the time-domain signal dimension when the sampling rate is too high, filtering to remove low-frequency noise and 50Hz power frequency interference, and a detrending operation of subtracting the mean of the EEG signal to reduce the linear growth trend that occurs during the acquisition of the EEG signal and remove the DC component in the signal.
[0068] Specifically, after performing outlier removal on the original data using the 3-sigma principle, the original data is further preprocessed, which includes but is not limited to: removing bad channels to retain correct signal channels; downsampling to reduce the time-domain signal dimension when the sampling rate is too high; filtering to remove possible low-frequency noise and 50 Hz power frequency interference; detrending by subtracting the mean of the EEG signal to reduce the possible linear growth trend during EEG signal acquisition and remove the DC component in the signal; normalization and standardization operations or baseline correction to obtain event change responses and prevent the influence of data drift.
[0069] In some embodiments, after constructing the stimulus-response matrix diagram and the connection relationship diagram between all-brain electrode sites, the method further includes: selecting the maximum absolute value in M1 and M2 as the weight of the node in the matrix diagram, and constructing a weighted undirected network diagram.
[0070] Specifically, by selecting the value with the largest absolute value in the obtained M1 and M2 as the weight of the node in the matrix diagram, a weighted undirected network diagram can be constructed to represent the connection relationship network between electrode sites or brain regions. If the time sequence of the latency is considered, a directed connection network diagram can be constructed to obtain the network propagation mode in the evoked stimulus.
[0071] Further, referring to Figure 3 , Figure 3 FIG. shows an exemplary structural block diagram of a pathological network connection device 300 for processing cortico-cortical evoked potentials according to an embodiment of the present application.
[0072] As Figure 3 shown, the device includes:
[0073] An acquisition unit 310, configured to acquire raw cortico-cortical evoked potential data;
[0074] A marking unit 320, configured to obtain event markers of all channels during evoked stimulation through the event marker channels in the raw cortico-cortical evoked potential data, where the event marker is the moment when the stimulus is given at the evoked electrode;
[0075] An overlay unit 330, configured to overlay and average the EEG signals obtained from multiple repeated stimulations of the same evoked stimulus, obtain the correct stimulus-response signal through overlay and averaging, and obtain the latencies t1 and t2 of the EEG signal and the corresponding peaks M1 and M2 according to the stimulus-response signal;
[0076] A calculation unit 340, configured to calculate the baseline mean and the stimulus-response mean under N repetitions of the same evoked stimulus, obtain N points of the electrode baseline and N points of the stimulus response, and obtain the threshold of the current electrode evoked response according to the hypothesis testing device;
[0077] The verification unit 350 is used to perform false discovery rate verification on the thresholds obtained from all induced stimuli, and determine the connection relationship between the evoked electrodes and the current electrodes according to the verification.
[0078] The construction unit 360 is used to construct a stimulus-response matrix diagram and a connection relationship diagram between all brain electrode sites.
[0079] The aggregation unit 370 is used to obtain the positions of the electrode sites in the brain regions through a CT and nuclear magnetic resonance imaging registration device, aggregate the stimulus responses of the electrode sites between the same brain regions together, and obtain the connection relationship between the cerebral cortex brain regions.
[0080] To make the acquisition of the original data of the cortical-cortical evoked potential more accurate, please refer to Figure 4 , Figure 4 FIG. shows an exemplary structural block diagram of a pathological network connection device 400 for processing cortical-cortical evoked potentials according to another embodiment of the present application.
[0081] As Figure 4 shown, the device includes:
[0082] The outlier removal operation unit 410 is used to perform outlier removal operation on the original data through the 3sigma principle.
[0083] The bad channel removal unit 420 is used to remove bad channels to retain correct signal channels, downsample to reduce the time-domain signal dimension when the sampling rate is too high, filter to remove low-frequency noise and 50hz power frequency interference, and perform a detrending operation of subtracting the mean value of the electroencephalogram signal to reduce the linear growth trend occurring during the acquisition of the electroencephalogram signal and remove the DC component in the signal.
[0084] It should be understood that the units or modules described in devices 300-400 correspond to the respective steps in the method described with reference to Figure 1-2 Accordingly, the operations and features described above for the method also apply to devices 300-400 and the units included therein, and will not be repeated here. Devices 300-400 can be pre-implemented in the browser or other secure applications of an electronic device, or can be loaded into the browser or its secure application of the electronic device by means of downloading or the like. The corresponding units in devices 300-400 can cooperate with the units in the electronic device to implement the solutions of the embodiments of the present application.
[0085] Next, refer to Figure 5 , which shows a schematic structural diagram of a computer system 500 of a terminal device or server suitable for implementing the embodiments of the present application.
[0086] As Figure 5As shown, computer system 500 includes a central processing unit (CPU) 501, which can perform various appropriate actions and processes according to a program stored in a read-only memory (ROM) 502 or a program loaded from a storage section 508 into a random access memory (RAM) 503. In the RAM 503, various programs and data required for the operation of the system 500 are also stored. The CPU 501, ROM 502, and RAM 503 are connected to each other via a bus 504. An input / output (I / O) interface 505 is also connected to the bus 504.
[0087] The following components are connected to the I / O interface 505: an input section 506 including a keyboard, a mouse, etc.; an output section 507 including, for example, a cathode ray tube (CRT), a liquid crystal display (LCD), etc. and a speaker, etc.; a storage section 508 including a hard disk, etc.; and a communication section 509 including a network interface card such as a LAN card, a modem, etc. The communication section 509 performs communication processing via a network such as the Internet. A drive 510 is also connected to the I / O interface 505 as needed. A removable medium 511, such as a magnetic disk, an optical disk, a magneto-optical disk, a semiconductor memory, etc., is installed on the drive 510 as needed so that a computer program read from it can be installed into the storage section 508 as needed.
[0088] Specifically, according to an embodiment of the present disclosure, the process described above with reference to Figure 1-2 can be implemented as a computer software program. For example, an embodiment of the present disclosure includes a method for processing pathological network connections of cortico-cortical evoked potentials, which includes a computer program tangibly embodied on a machine-readable medium, the computer program including program code for performing Figure 1-2 the method. In such an embodiment, the computer program can be downloaded and installed from a network via the communication section 509, and / or installed from the removable medium 511.
[0089] The flowcharts and block diagrams in the accompanying drawings illustrate the possible architectures, functions, and operations of systems, methods, and computer program products according to various embodiments of the present invention. In this regard, each block in the flowchart or block diagram may represent a module, a segment of a program, or a part of code, and the foregoing module, segment of a program, or part of code contains one or more executable instructions for implementing the specified logical function. It should also be noted that in some alternative implementations, the functions marked in the blocks may occur in a different order than that marked in the accompanying drawings. For example, two consecutive blocks shown may actually be executed substantially in parallel, and they may sometimes be executed in the reverse order, depending on the functions involved. It should also be noted that each block in the block diagram and / or flowchart, as well as combinations of blocks in the block diagram and / or flowchart, can be implemented by a dedicated hardware-based system that performs the specified functions or operations, or can be implemented by a combination of dedicated hardware and computer instructions.
[0090] The units or modules involved in the embodiments described in this application can be implemented in software or in hardware. The described units or modules can also be provided in a processor. For example, it can be described as: a processor includes a first sub-region generation unit, a second sub-region generation unit, and a display region generation unit. Among them, the names of these units or modules do not constitute a limitation on the units or modules themselves in some cases. For example, the display region generation unit can also be described as "a unit for generating a display region of text based on the first sub-region and the second sub-region".
[0091] On the other hand, this application also provides a computer-readable storage medium. The computer-readable storage medium can be the computer-readable storage medium included in the foregoing device in the above embodiments; or it can exist separately and be a computer-readable storage medium not assembled into the device. The computer-readable storage medium stores one or more programs, and the foregoing programs are used by one or more processors to execute the text generation method applied to the transparent window envelope described in this application.
[0092] The above description is only the preferred embodiments of this application and an explanation of the technical principles applied. Those skilled in the art should understand that the scope of the invention involved in this application is not limited to the technical solutions formed by the specific combination of the above technical features, and should also cover other technical solutions formed by any combination of the above technical features or their equivalent features without departing from the foregoing inventive concept. For example, the technical solutions formed by mutually replacing the above features with the (but not limited to) technical features having similar functions disclosed in this application.
Claims
1. A pathological network connection method for processing cortico-cortical evoked potentials, characterized in that, The method includes: Obtaining the original data of cortico-cortical evoked potential; Obtaining the event markers of all channels during the evoked stimulus through the event marker channels in the original data of cortico-cortical evoked potential, where the event marker is the moment when the stimulus is given to the evoked electrode; Superposing and averaging the EEG signals obtained from multiple repeated stimulations of the same evoked stimulus, obtaining the correct stimulus-response signal through superposition and averaging, and obtaining the latency t1 and t2 of the EEG signal, and the corresponding peak values M1 and M2 according to the stimulus-response signal; Calculating the baseline mean and the stimulus-response mean for N repetitions of the same evoked stimulus, obtaining N points of the electrode baseline and N points of the stimulus response, and obtaining the threshold of the evoked response of the current electrode according to the hypothesis testing method; Performing false discovery rate verification on the thresholds obtained from all evoked stimuli, and obtaining the connection relationship between the evoked electrode and the current electrode according to the verification; Constructing a matrix diagram of stimulus-response and constructing a connection relationship diagram between all brain electrode sites; Obtaining the position of the electrode site in the brain region through CT and magnetic resonance imaging registration methods, aggregating the stimulus responses of the electrode sites between the same brain regions together, and obtaining the connection relationship between the cerebral cortex brain regions.
2. The pathological network connection method for processing cortico-cortical evoked potential according to claim 1, wherein After obtaining the original data of cortico-cortical evoked potential, the method further includes: Performing an outlier removal operation on the original data through the 3sigma principle.
3. The pathological network connection method for processing cortico-cortical evoked potential according to claim 2, wherein After performing the outlier removal operation on the original data through the 3sigma principle, the method further includes: Removing bad channels to retain correct signal channels, downsampling to reduce the time-domain signal dimension when the sampling rate is too high, filtering to remove low-frequency noise and 50hz power frequency interference, and performing a detrending operation of subtracting the mean value of the EEG signal to reduce the linear growth trend occurring during the acquisition of the EEG signal and removing the DC component in the signal.
4. The pathological network connection method for processing cortico-cortical evoked potential according to claim 1, wherein After constructing the matrix diagram of stimulus-response and constructing the connection relationship diagram between all brain electrode sites, the method further includes: Selecting the maximum absolute value in M1 and M2 as the weight of the node in the matrix diagram, and constructing a weighted undirected network diagram.
5. A pathological network connection device for processing cortico-cortical evoked potentials, characterized in that, The device includes: An acquisition unit for acquiring the original data of cortico-cortical evoked potential; A marking unit for obtaining the event markers of all channels during the evoked stimulus through the event marker channels in the original data of cortico-cortical evoked potential, where the event marker is the moment when the stimulus is given to the evoked electrode; A superposition unit for superposing and averaging the EEG signals obtained from multiple repeated stimulations of the same evoked stimulus, obtaining the correct stimulus-response signal through superposition and averaging, and obtaining the latency t1 and t2 of the EEG signal, and the corresponding peak values M1 and M2 according to the stimulus-response signal; A calculation unit for calculating the baseline mean and the stimulus-response mean for N repetitions of the same evoked stimulus, obtaining N points of the electrode baseline and N points of the stimulus response, and obtaining the threshold of the evoked response of the current electrode according to the hypothesis testing device; A verification unit for performing false discovery rate verification on the thresholds obtained from all evoked stimuli, and obtaining the connection relationship between the evoked electrode and the current electrode according to the verification; A construction unit for constructing a matrix diagram of stimulus-response and constructing a connection relationship diagram between all brain electrode sites; An aggregation unit, configured to obtain the positions of electrode sites in brain regions through a CT and nuclear magnetic resonance imaging registration device, aggregate the stimulation responses of electrode sites between the same brain regions together, and obtain the connection relationships between cerebral cortex brain regions.
6. The pathological network connection device for processing cortico-cortical evoked potentials according to claim 5, wherein After obtaining the original data of the cortico-cortical evoked potential, the device further includes: An outlier removal operation unit, configured to perform an outlier removal operation on the original data by the 3sigma principle.
7. The pathological network connection device for processing cortico-cortical evoked potential according to claim 6, characterized in that, After performing the outlier removal operation on the original data by the 3sigma principle, the device further includes: A bad channel removal unit, configured to remove bad channels to retain correct signal channels, downsample to reduce the time-domain signal dimension when the sampling rate is too high, filter to remove low-frequency noise and 50hz power frequency interference, and perform a detrending operation of subtracting the mean value of the electroencephalogram signal to reduce the linear growth trend occurring during the acquisition of the electroencephalogram signal and remove the DC component in the signal.
8. The pathological network connection device for processing cortico-cortical evoked potentials according to claim 5, characterized in that, After constructing the matrix diagram of the stimulus-response and the connection relationship diagram between all-brain electrode sites, the device further includes: A selection unit, configured to select the maximum absolute value in M1 and M2 as the weight of the node in the matrix diagram and construct a weighted undirected network diagram.
9. A computer device, comprising a memory, a processor, and a computer program stored on the memory and executable on the processor, characterized in that, When the processor executes the program, it implements the method according to any one of claims 1-4.
10. A computer-readable storage medium, on which a computer program is stored, and the computer program is used for: When the computer program is executed by a processor, it implements the method according to any one of claims 1-4.
Citation Information
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