Micro & mini-led architecture and manufacturing method thereof

Abstract

The application discloses a kind of Micro&Mini-LED architecture and its manufacturing method, including SiO2 layer, the bottom of the SiO2 layer is provided with Gate gate layer, the top of SiO2 layer is provided with a layer of graphene layer, one end of the graphene layer is provided with Source&Drain electrode and N-type electrode, the top of graphene layer is provided with a layer of N-type GaN layer, and N-type GaN layer extends to N-type electrode, the outside of Source&Drain electrode is provided with a layer of PMMA film layer, and PMMA film layer extends to graphene layer between Source&Drain electrode and N-type electrode, and is fixed by high temperature pyrolysis method on overflow method glass substrate and attached graphene film, and utilize graphene film as graphene field effect transistor to compose Micro-LED drive circuit, simultaneously, utilize PMMA material film formation to protect graphene layer, to prevent ultraviolet light exposure and etching to graphene cause damage, directly epitaxial growth GaN on graphene layer can realize the purpose of epitaxial LED chip on glass substrate.

Description

TECHNICAL FIELD

[0001] The application belongs to the technical field of LED display, and particularly relates to a Micro&Mini-LED architecture and a manufacturing method thereof. BACKGROUND

[0002] With the vigorous development of semiconductor display technology, Micro-LED technology is mentioned more and more. Micro-LED is a small LED, and its size is between 1um-100um. It is a new generation of semiconductor display technology that is most likely to replace LCD and OLED. According to the current development status of Micro-LED technology, the biggest problem encountered by Micro-LED and Micro&Mini-LED derived in the research is that a large number of small LED monomer chips cannot be transferred from an epitaxial wafer to a substrate of a driving circuit. Therefore, the application provides a Micro&Mini-LED architecture and a manufacturing method thereof. SUMMARY

[0003] The application aims to provide a Micro&Mini-LED architecture and a manufacturing method thereof to solve the problems in the background.

[0004] To achieve the above-mentioned purpose, the application provides the following technical scheme: a Micro&Mini-LED architecture, comprising a SiO2 layer, a Gate gate layer is arranged at the bottom of the SiO2 layer, a graphene layer is arranged at the top of the SiO2 layer, a Source&Drain electrode and an N-type electrode are arranged at one end of the graphene layer, an N-type GaN layer is arranged at the top of the graphene layer, and the N-type GaN layer extends to the N-type electrode, a PMMA film layer is arranged at the outer side of the Source&Drain electrode, and the PMMA film layer extends to the graphene layer between the Source&Drain electrode and the N-type electrode, a Gaas quantum well layer is arranged at the top of the N-type GaN layer, a P-type GaN layer is arranged at the top of the Gaas quantum well layer, and a P-type electrode is arranged at the top of the P-type GaN layer.

[0005] Preferably, the Source&Drain electrode, the N-type electrode and the P-type electrode are all rectangular structures.

[0006] Preferably, the top surface of the PMMA film layer and the top surface of the N-type GaN layer are at the same horizontal height.

[0007] A Micro&Mini-LED architecture manufacturing method, a graphene film is attached and fixed on a SiO2 layer by a high-temperature pyrolysis method to form a graphene layer.

[0008] Utilize graphene as a carrier, epitaxy of GaN on the graphene layer, form an epitaxial structure including N-type GaN layer, Gaas quantum well layer and P-type GaN layer, the bottom layer of SiO2 layer is formed by a metal material as a Gate gate layer; N-type GaN layer takes graphene layer as a carrier, a part of MOCVD film is directly covered on the N-type electrode; ensure that the heterojunction of graphene and MOCVD is stably bonded at the crystal interface;

[0009] Use PMMA material to protect graphene, reserve the film layer of the channel part through ultraviolet photoresist, take the graphene layer as a semiconductor layer, form a field effect transistor through Source &Drain electrode, and film formation.

[0010] Compared with the prior art, the beneficial effects of the present application are: a kind of Micro&Mini-LED architecture and manufacturing method of the present application, graphene film is attached and fixed on overflow method glass substrate by high temperature pyrolysis method, and graphene film is used as graphene field effect transistor to form Micro-LED drive circuit, PMMA material film formation is used to protect graphene layer to prevent damage to graphene during ultraviolet exposure and etching, epitaxial growth of GaN on graphene layer can realize the purpose of epitaxial LED chip on glass substrate. BRIEF DESCRIPTION OF DRAWINGS

[0011] Figure 1 It is the structure diagram of single integrated LED chip of the present application;

[0012] In the figure: 1, Gate gate layer;2, SiO2 layer;3, graphene layer;4, N-type GaN layer;5, Source &Drain electrode;6, N-type electrode;7, PMMA film layer;8, Gaas quantum well layer;9, P-type GaN layer;10, P-type electrode. DETAILED DESCRIPTION

[0013] The technical solutions in the embodiments of the present application will be described clearly and completely below with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative labor are within the scope of protection of the present application.

[0014] Please refer to Figure 1The application provides a technical scheme: a Micro&Mini-LED architecture, comprising a SiO2 layer 2, a Gate gate layer 1 arranged at the bottom of the SiO2 layer 2, a graphene layer 3 arranged at the top of the SiO2 layer 2, a Source&Drain electrode 5 and an N-type electrode 6 arranged at one end of the graphene layer 3, an N-type GaN layer 4 arranged at the top of the graphene layer 3 and extending to the N-type electrode 6, a PMMA film layer 7 arranged at the outer side of the Source&Drain electrode 5 and extending to the graphene layer 3 between the Source&Drain electrode 5 and the N-type electrode 6, a Gaas quantum well layer 8 arranged at the top of the N-type GaN layer 4, a P-type GaN layer 9 arranged at the top of the Gaas quantum well layer 8, and a P-type electrode 10 arranged at the top of the P-type GaN layer 9.

[0015] Preferably, the Source&Drain electrode 5, the N-type electrode 6 and the P-type electrode 10 are in a rectangular structure in the embodiment, so as to ensure compactness of the structure.

[0016] A manufacturing method of the Micro&Mini-LED architecture, the graphene film is attached and fixed on the SiO2 layer 2 by high-temperature pyrolysis to form the graphene layer 3; the GaN epitaxy is performed on the graphene layer 3 by taking the graphene as a carrier to form an epitaxial structure comprising the N-type GaN layer 4, the Gaas quantum well layer 8 and the P-type GaN layer 9; the metal material is formed on the bottom layer of the SiO2 layer 2 as the Gate gate layer 1; the N-type GaN layer 4 takes the graphene layer 3 as a carrier, and a part of the MOCVD film is directly covered on the N-type electrode 6; the heterojunction of the graphene and the MOCVD is stably bonded at the crystal interface; the PMMA material is used to protect the graphene, the film layer of the channel part is reserved by the ultraviolet photoresist, the graphene layer 3 is taken as a semiconductor layer, the field effect transistor is formed by the Source&Drain electrode 5, and the film is formed.

[0017] Although the embodiments of the application have been shown and described, it is to be understood that the application is not limited to these embodiments. It will be obvious to a person skilled in the art that various changes, modifications, replacements and variations can be made to the embodiments without departing from the principles and spirit of the application, and the scope of the application is defined by the appended claims and their equivalents.

Claims

1. A Micro & Mini-LED architecture comprising a SiO2 layer (2), characterized in that: The bottom of the SiO2 layer (2) is provided with a Gate gate layer (1), the top of the SiO2 layer (2) is provided with a graphene layer (3), one end of the graphene layer (3) is provided with a Source&Drain electrode (5) and an N-type electrode (6), the top of the graphene layer (3) is provided with an N-type GaN layer (4), and the N-type GaN layer (4) extends to the N-type electrode (6), the outer side of the Source&Drain electrode (5) is provided with a PMMA film layer (7), and the PMMA film layer (7) extends to the graphene layer (3) between the Source&Drain electrode (5) and the N-type electrode (6), the top of the N-type GaN layer (4) is provided with a Gaas quantum well layer (8), the top of the Gaas quantum well layer (8) is provided with a P-type GaN layer (9), and the top of the P-type GaN layer (9) is provided with a P-type electrode (10).

2. The micro & mini LED architecture of claim 1, wherein: The Source&Drain electrode (5), the N-type electrode (6) and the P-type electrode (10) are all rectangular structures.

3. The micro & mini LED architecture of claim 1, wherein: The top surface of the PMMA film layer (7) and the top surface of the N-type GaN layer (4) are at the same horizontal height.

4. The manufacturing method of a Micro & Mini-LED architecture according to any one of claims 1-3, wherein: The graphene film is attached and fixed on the SiO2 layer (2) by high temperature pyrolysis to form the graphene layer (3); The graphene is used as a carrier to perform GaN epitaxy on the graphene layer (3) to form an epitaxial structure including the N-type GaN layer (4), the Gaas quantum well layer (8) and the P-type GaN layer (9), and a metal material is formed on the bottom layer of the SiO2 layer (2) as the Gate gate layer (1); the N-type GaN layer (4) takes the graphene layer (3) as a carrier, and a part of MOCVD film is directly covered on the N-type electrode (6); the heterojunction of graphene and MOCVD is stably bonded at the crystal interface; The graphene is protected by using PMMA material, the film layer of the channel part is reserved by ultraviolet photoresist, the graphene layer (3) is used as a semiconductor layer, a field effect transistor is formed by the Source&Drain electrode (5), and film formation is performed.

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