Electrostatic discharge testing method, device and preparation method thereof
Through the cooperation of the charge and discharge conversion module and the second test board, batch electrostatic discharge testing of the light emitting diode chip is realized, solving the problems of low testing efficiency and high cost in the prior art, improving the testing efficiency and saving costs.
Patent Information
- Application Number
- CN202210551692.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-05-20
- Publication Date
- 2025-08-08
- Estimated Expiration
- 2042-05-20
AI Technical Summary
The existing electrostatic discharge testing methods are inefficient and costly for light-emitting diode chips, and require tests one by one, which consumes a lot of manpower and material resources.
An electrostatic discharge test method and device is adopted to charge the first test board through a charge-discharge conversion module and a second test board. After storing the charge, it is connected to the electrode of the wafer to be tested, adjust the charge-discharge conversion module to the discharge mode, release the charge to the wafer, and realize batch testing. Each chip has an independent electrostatic discharge test loop.
The batch test of all chips on the wafer is realized, the electrostatic discharge test efficiency is improved, the cost is reduced, and the inefficiency and high cost of chip-by-chip testing is avoided.
Smart Images

Figure CN114879016B_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of semiconductor technology, and in particular to an electrostatic discharge testing method, a device and a preparation method thereof. Background Art
[0002] Electrostatic discharge (ESD) refers to the transfer of charge caused by objects with different electrostatic potentials coming into close proximity or direct contact. When a statically charged object (also known as a static source) comes into contact with another object, the two objects with different electrostatic potentials experience charge flow based on the principle of charge neutralization, transferring enough energy to offset the voltage. This transfer generates potentially damaging voltages, currents, and electromagnetic fields, which can, in severe cases, damage objects. ESD is a common occurrence during the manufacturing, transportation, and use of LED chips, and is a major cause of damage or failure. Therefore, every LED chip requires ESD testing to ensure that the static discharge is released.
[0003] Currently, there are two common ESD testing methods. One is contact-type ESD testing of LED chips, which involves connecting a probe or wire to specific pins on the LED chip and using an ESD tester to discharge the ESD. The other is gun-type non-contact ESD testing, which involves discharging the ESD at a specific distance from the specific pins of the LED chip. However, both methods require testing each LED chip individually. Each LED wafer contains tens or hundreds of thousands of chips, and testing each chip individually is time-consuming and inefficient. Furthermore, to improve testing efficiency, a large amount of testing equipment is required, which also requires significant investment in manpower and material resources, resulting in high testing costs.
[0004] Therefore, existing electrostatic discharge testing methods generally have technical problems of low efficiency and high cost in testing electrostatic discharge of each LED chip. Summary of the Invention
[0005] In view of the shortcomings of the existing technology, the purpose of the present invention is to provide an electrostatic discharge testing method, device and preparation method thereof, aiming to solve the technical problems of low efficiency and high cost of electrostatic discharge testing of each light emitting diode chip in the existing technology.
[0006] A first aspect of the present invention is to provide an electrostatic discharge testing method, which is applied to a light-emitting diode chip whose electrodes are located on the same side. The electrostatic discharge testing method comprises:
[0007] Align and connect the first electrodes of the first test plate with the charging electrodes at corresponding positions of the second test plate one by one;
[0008] Connecting the first electrode area of the first test board and the charging electrode area of the second test board to the charge-discharge conversion module through wires respectively;
[0009] Adjusting the charge-discharge conversion module to a charging mode to charge the first test board;
[0010] Aligning and connecting the two electrodes of each chip on the wafer to be tested with the first electrode and the second electrode of the first test board respectively;
[0011] Connecting the first electrode area of the first test board and the second electrode area of the first test board to the charge-discharge conversion module through wires respectively;
[0012] The charge-discharge conversion module is adjusted to a discharge mode to perform an electrostatic discharge test on the wafer to be tested.
[0013] Compared with the prior art, the beneficial effect of the present invention is that: through the electrostatic discharge test method provided by the present invention, there is no need to test each chip one by one. Specifically, the first test board is charged by the charge-discharge conversion module and the second test board so that the first test board stores charge, and then the first electrode and the second electrode of the first test board are respectively connected to the electrodes of the wafer to be tested, and the charge-discharge conversion module is adjusted to the discharge mode to release the charge stored in the first test board to the wafer to be tested to achieve electrostatic discharge testing of the wafer to be tested. The method is simple and convenient. The wafer to be tested includes several chips, and all chips on the wafer to be tested can be batch tested, and each chip has an independent electrostatic discharge test circuit. The electrostatic discharge test is stable and reliable, greatly improving the efficiency of the electrostatic discharge test, saving costs, and avoiding the traditional electrostatic discharge test of each chip, which requires a lot of manpower and material resources, has low test efficiency, and increases the cost of electrostatic discharge testing. Thus, the technical problems of low efficiency and high cost of electrostatic discharge testing of light-emitting diode chips are solved.
[0014] According to one aspect of the above technical solution, the step of adjusting the charge-discharge conversion module to a charging mode to charge the first test board specifically includes:
[0015] Setting a preset voltage value of the charge-discharge conversion module to adjust to a charging mode;
[0016] The first test board is charged by a charging circuit so that charges are stored in the first test board.
[0017] According to one aspect of the above technical solution,
[0018] The step of adjusting the charge-discharge conversion module to a discharge mode to perform an electrostatic discharge test on the wafer to be tested specifically includes:
[0019] Setting a preset resistance value of the charge-discharge conversion module to adjust to a discharge mode;
[0020] The charge stored in the first test board is released to the wafer to be tested through a discharge circuit, so that the wafer to be tested undergoes an electrostatic discharge test.
[0021] A second aspect of the present invention is to provide an electrostatic discharge testing device, the electrostatic discharge testing device comprising:
[0022] A first test board, configured to perform an electrostatic discharge test on a wafer to be tested, the first test board comprising a plurality of first electrodes and second electrodes, wherein a first electrode region and a second electrode region are provided at an edge of the first test board, the first electrodes being electrically connected to the first electrode regions, any adjacent second electrodes being electrically connected via leads, and the second electrodes being electrically connected to the second electrode regions via leads;
[0023] a second test plate, configured to charge the first test plate, the second test plate comprising a plurality of charging electrodes, the charging electrodes corresponding one-to-one with the positions of the first electrodes, a charging electrode region being defined at an edge of the second test plate, any adjacent charging electrodes being electrically connected via leads, the charging electrodes being electrically connected to the charging electrode region via leads, and the charging electrodes being connected to the first electrodes;
[0024] The charge-discharge conversion module is connected to the first electrode area and the charging electrode area through wires, and the first test board is charged by adjusting a preset voltage of the charge-discharge conversion module;
[0025] The charge-discharge conversion module is connected to the first electrode area and the second electrode area of the first test board that has been charged through wires. The first test board is arranged on the wafer to be tested, and is connected to the first electrode and the second electrode one by one through the positions of the two electrodes of each chip on the wafer to be tested. By adjusting the preset resistance of the charge-discharge conversion module, the electrostatic discharge test of the wafer to be tested is performed.
[0026] According to one aspect of the above technical solution, an isolation layer is provided on a side of the first electrode close to the second electrode to block the connection between the first electrode and the second electrode.
[0027] According to one aspect of the above technical solution, a dielectric layer is provided on a side of the first electrode close to the first electrode region, so that the first electrode and the first electrode region form a capacitor to store charge.
[0028] According to one aspect of the above technical solution, the dielectric constant of the dielectric layer is 10-10000C 2 / (N·M 2), thickness is 0.1um-10mm.
[0029] According to one aspect of the above technical solution, the first electrode is provided with an electrode layer facing the first electrode region, and a capacitor is formed by the electrode layer and the first electrode region to store charge.
[0030] According to one aspect of the above technical solution, the sizes of the first test board and the second test board are larger than the size of the wafer to be tested.
[0031] A third aspect of the present invention is to provide a method for preparing an electrostatic discharge test device, which is used to prepare the electrostatic discharge test device described in the above-mentioned redemption solution. The preparation method comprises:
[0032] providing a first substrate;
[0033] sequentially growing a first electrode region, a dielectric layer, a first electrode, an isolation layer, a second electrode, and a second electrode region on the first substrate to form a first test board;
[0034] providing a second substrate;
[0035] A charging electrode, a charging electrode region and protection are sequentially grown on the second substrate to form a second test plate. BRIEF DESCRIPTION OF THE DRAWINGS
[0036] The above and / or additional aspects and advantages of the present invention will become apparent and readily understood from the following description of the embodiments with reference to the accompanying drawings, in which:
[0037] Figure 1 Flowchart of the electrostatic discharge testing method according to the first embodiment of the present invention;
[0038] Figure 2 2 is a schematic structural diagram of a first test board at a first viewing angle in a second embodiment of the present invention;
[0039] Figure 3 2. It is a structural schematic diagram of the first test board at a second viewing angle in the second embodiment of the present invention;
[0040] Figure 4 2 is a schematic structural diagram of a second test board in a second embodiment of the present invention;
[0041] Figure 5 Schematic diagram of the structure of the wafer to be tested in the second embodiment of the present invention;
[0042] Figure 6 Schematic diagram of the structure of the connection between the first test board and the second test board in the second embodiment of the present invention;
[0043] Figure 7 Schematic diagram of the structure of the connection between the first test board and the wafer to be tested in the second embodiment of the present invention;
[0044] Figure 8 2 is a circuit diagram of a charging mode of an electrostatic discharge testing device according to a second embodiment of the present invention;
[0045] Figure 9 A circuit diagram of a discharge mode of an electrostatic discharge test device according to a second embodiment of the present invention;
[0046] Figure 10 is a flow chart of a method for preparing an electrostatic discharge testing device according to a third embodiment of the present invention;
[0047] Component symbol description in the attached figure:
[0048] First test board 10, first substrate 11, first electrode region 12, dielectric layer 13, first electrode 14, electrode layer 140, second electrode 15, isolation layer 16, second electrode region 17, second test board 20, second substrate 21, charging electrode 22, charging electrode region 23, protective layer 24, wafer to be tested 30, chip 31, electrode 310. DETAILED DESCRIPTION
[0049] To make the objectives, features, and advantages of the present invention more readily apparent, the following detailed description of specific embodiments of the present invention is provided in conjunction with the accompanying drawings. The accompanying drawings illustrate several embodiments of the present invention. However, the present invention may be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided to provide a more thorough and comprehensive understanding of the present invention.
[0050] It should be noted that when an element is referred to as being "fixed to" another element, it may be directly on the other element or there may be an element centered thereon. When an element is considered to be "connected to" another element, it may be directly connected to the other element or there may be an element centered thereon. The terms "vertical", "horizontal", "left", "right", "up", "down" and similar expressions used herein are for illustrative purposes only and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operate in a specific orientation, and therefore should not be understood as limiting the present invention.
[0051] In the present invention, unless otherwise expressly specified or limited, terms such as "installed," "connected," "connect," and "fixed" should be understood broadly. For example, they can refer to fixed, removable, or integral connections; mechanical or electrical connections; direct or indirect connections through an intermediary; and internal communication between two components. Those skilled in the art will understand the specific meanings of these terms in the present invention based on the specific circumstances. As used herein, the term "and / or" includes any and all combinations of one or more of the relevant listed items.
[0052] Example 1
[0053] See also Figure 1 , shown is an electrostatic discharge test method provided by the first embodiment of the present invention, which is applied to a light-emitting diode chip whose electrodes are located on the same side. The electrostatic discharge test method includes steps S10-S15:
[0054] Step S10, aligning and connecting the first electrodes of the first test board with the charging electrodes at corresponding positions of the second test board one by one;
[0055] The first test board includes a plurality of first and second electrodes, the positions of which correspond one-to-one with the positions of the two electrodes on the chip on the wafer, for performing electrostatic discharge testing on the chip. The second test board includes a plurality of charging electrodes, the positions of which correspond one-to-one with the positions of the first electrodes. The first electrodes of the first test board are aligned and connected to the charging electrodes of the second test board to facilitate charging of the first test board.
[0056] Step S11, connecting the first electrode area of the first test board and the charging electrode area of the second test board to a charge-discharge conversion module through wires respectively;
[0057] The first test board has a first electrode region and a second electrode region at its edge. The first electrode region forms a capacitor with the first electrode. When the first test board is charged, the capacitor formed by the first electrode region and the first electrode will store charge. The second electrode region is electrically connected to the second electrode via a lead, and adjacent second electrodes are electrically connected via leads to facilitate connection of a discharge circuit. The second test board includes a plurality of charging electrodes, the positions of the charging electrodes correspond one-to-one to the positions of the second electrodes, and any adjacent charging electrodes are connected via leads. The second test board has a charging electrode region at its edge, and the charging electrodes are connected to the charging electrode region via leads.
[0058] The first electrode is connected to the charging electrode, the first electrode and the first electrode area form a capacitor, the charging electrode lead is connected to the charging electrode area, and the first electrode area and the charging electrode area are respectively connected to the charge-discharge conversion module through wires to form a charging circuit.
[0059] Step S12, adjusting the charge-discharge conversion module to a charging mode to charge the first test board;
[0060] After the first test board, the second test board and the charge-discharge conversion module form a charging loop, the charge-discharge conversion module is started to conduct the circuit to charge the first test board.
[0061] Specifically, the charge-discharge conversion module is set to a preset voltage value to adjust to the charging mode; wherein the charge-discharge conversion module is adjusted to a DC power supply to provide a preset voltage value to the first test board, which should meet the requirements of standards such as IEC61000-4-2, HBM human body model or MM mechanical model. The preset voltage value can be adjusted according to the conditions required by customers and users, and the preset voltage range is 50V to 10000V;
[0062] The first test board is charged by the charging circuit to store charge in the first test board. The first test board stores charge through the capacitance formed by the first electrode and the first electrode region, generating a voltage signal having the same value as the preset voltage provided by the charge-discharge conversion module.
[0063] Step S13, aligning and connecting the two electrodes of each chip on the wafer to be tested with the first electrode and the second electrode of the first test board respectively;
[0064] Among them, the wafer to be tested includes several chips, and the electrodes of each chip have two electrodes. The positions of the two electrodes of each chip correspond to the positions of the first electrode and the second electrode respectively. The two electrodes are connected one by one to the first electrode and the second electrode of the first test board respectively, so that the voltage stored in the first test board can be released to each chip of the wafer to be tested.
[0065] Step S14, connecting the first electrode area of the first test board and the second electrode area of the first test board to the charge-discharge conversion module through wires respectively;
[0066] Among them, the electrodes of the wafer are aligned and connected to the first electrode and the second electrode of the first test board. The capacitor formed by the first electrode and the first electrode area stores charge. The second electrode and the second electrode area are connected through a lead. The first electrode area and the second electrode area are respectively connected to the charge and discharge conversion module through wires to form a discharge circuit.
[0067] Step S15 , adjusting the charge-discharge conversion module to a discharge mode to perform an electrostatic discharge test on the wafer to be tested.
[0068] Specifically, a preset resistance value is set for the charge-discharge conversion module to adjust it to the discharge mode; wherein, the preset resistance can be set according to the test requirements and should meet the requirements of standards such as IEC61000-4-2, HBM human body model or MM mechanical model.
[0069] The charge stored in the first test board is released to the wafer to be tested through the discharge circuit, so that the wafer to be tested undergoes an electrostatic discharge test. After the charge-discharge conversion module is set to a preset resistance value, the capacitor formed by the first electrode and the first electrode area stores a voltage equal to the preset voltage value, and the voltage stored in the capacitor is released to each chip of the wafer to be tested through the discharge circuit to achieve an electrostatic discharge test of the wafer to be tested. This method can realize the whole-wafer test of the wafer, and each chip has an independent discharge circuit. The electrostatic discharge test is stable and reliable, and there is no need to test each chip one by one, which reduces the cost of the electrostatic discharge test and greatly improves the efficiency of the electrostatic discharge test.
[0070] Compared with the prior art, the electrostatic discharge test method provided by this embodiment has the following beneficial effects: the electrostatic discharge test method provided by the present invention does not require chip-by-chip testing. Specifically, the first test board is charged by the charge-discharge conversion module and the second test board so that the first test board stores charge. The first electrode and the second electrode of the first test board are respectively connected to the electrodes of the wafer to be tested. The charge-discharge conversion module is adjusted to a discharge mode to release the charge stored in the first test board to the wafer to be tested, so as to realize the electrostatic discharge test of the wafer to be tested. The method is simple and convenient. The wafer to be tested includes several chips. All chips on the wafer can be batch tested, and each chip has an independent electrostatic discharge test circuit. The electrostatic discharge test is stable and reliable, greatly improving the efficiency of the electrostatic discharge test and saving costs. It avoids the traditional electrostatic discharge test of each chip, which requires a lot of manpower and material resources, has low test efficiency, and increases the cost of electrostatic discharge testing. Thus, it solves the technical problems of low efficiency and high cost of electrostatic discharge testing of light-emitting diode chips.
[0071] Example 2
[0072] See also Figure 2-Figure 9, shown is an electrostatic discharge test device provided by a second embodiment of the present invention, which is applied to a light-emitting diode chip 31 located on the same side as an electrode 310. The electrostatic discharge test device includes a first test board 10 for performing an electrostatic discharge test on a wafer 30 to be tested. The shape of the first test board 10 can be circular, square, elliptical, or any other arbitrary polygon. The size of the first test board 10 is larger than the size of the wafer 30 to be tested, so as to cover the entire wafer 30 to be tested and test each chip 31 on the wafer 30 to be tested. The first test board 10 includes a plurality of first electrodes 14 and second electrodes 15, wherein the material of the first electrode 14 includes but is not limited to Cr, Al, Ni, Ti, Pt, Au, and materials composed of the above metals. The first electrode 14 extends an electrode layer 140 toward a layer of the dielectric layer 13 to form a capacitive connection with the first electrode region 12 to store charge. The material of the second electrode 15 includes but is not limited to Cr, Al, Ni, Ti, Pt, Au and materials composed of the above metals. Any adjacent second electrodes 15 are connected by leads. The edge of the first test board 10 is provided with a first electrode area 12 and a second electrode area 17. The electrode layer 140 and the first electrode area 12 form a capacitor to store charge. The second electrode 15 is electrically connected to the second electrode area 17 through a lead. The various second electrodes 15 are concentrated in the second electrode area 17 to facilitate batch testing, avoiding the need for each second electrode 15 to be connected to the charge and discharge module with a wire, which makes it impossible to quickly implement batch testing and is inefficient.
[0073] In addition, the first electrode region 12 is provided on the first substrate 11. The first substrate 11 serves as a supporting substrate of the first test board 10. The material thereof can be Cu, Al, Si, Al2O3, SiO2, GaN, etc., and the thickness thereof is 150um-10mm.
[0074] Among them, the first electrode 14 is provided with an isolation layer 16 on the side close to the second electrode 15 to block the connection between the first electrode 14 and the second electrode 15, causing a short circuit. The material of the isolation layer 16 includes but is not limited to SiO2, Ti3O5, SiN, Al2O3, and the thickness of the isolation layer 16 is 0.05um-5mm. In addition, the electrode layer 140 is provided with a dielectric layer 13 on the side close to the first electrode region 12 to form a capacitor between the electrode layer 140 and the first electrode region 12 to store charge. The material of the dielectric layer 13 includes but is not limited to SiO2, Ti3O5, SiN, Al2O3 and a mixture of the above substances. The dielectric constant of the dielectric layer 13 is 10-10000C 2 / (N·M 2 ), with a thickness of 0.1um-10mm, so that a capacitor is formed between the electrode layer 140 and the first electrode region 12 to store charge.
[0075] The second test plate 20 is used to charge the first test plate 10. The shape of the second test plate 20 can be circular, square, elliptical or any other polygon. The size of the second test plate 20 is the same as that of the first test plate 10 to charge the capacitance formed between the electrode layer 140 and the first electrode area 12 on the first test plate 10. The first test board 10 includes a plurality of charging electrodes 22. The materials of the charging electrodes 22 include, but are not limited to, Cr, Al, Ni, Ti, Pt, Au, and materials composed of the aforementioned metals. The charging electrodes 22 correspond one-to-one with the first electrodes 14 of the first test board 10. A charging electrode region 23 is provided at the edge of the second test board 20. Any adjacent charging electrodes 22 are electrically connected via leads. The charging electrodes 22 and the charging electrode region 23 are electrically connected via leads. This allows the individual charging electrodes 22 to be concentrated in the charging electrode region 23 to facilitate charging of the capacitance formed by a large number of electrode layers 140 and the first electrode region 12. This avoids the need for individual charging electrodes 22 to be connected to a charging module with wires, which would hinder the rapid charging of the capacitance formed by the large number of electrode layers 140 and the first electrode region 12 of the first test board 10. Furthermore, the charging electrodes 22 are provided on a second substrate 21, which serves as the supporting substrate for the second test board 20. The second substrate 21 can be made of materials such as Cu, Al, Si, Al2O3, SiO2, GaN, etc., and has a thickness ranging from 150 μm to 10 mm. A protective layer 24 is provided between the charging electrode 22 and the charging electrode region 23 to prevent the capacitors formed by the first test board 10 from being connected in series during charging, thereby preventing the charge stored in each capacitor from being unstable and uneven.
[0076] When the charging electrode 22 is connected to the first electrode 14, and the first electrode region 12 and the charging electrode region 23 are respectively connected to the charge-discharge conversion module via wires, a charging circuit will be formed. By adjusting the preset voltage of the charge-discharge conversion module, the first test board 10 is charged so that a voltage value equal to the preset voltage is formed between the electrode layer 140 of the first test board 10 and the first electrode region 12.
[0077] When the capacitance formed between the electrode layer 140 and the first electrode region 12 reaches a preset voltage, the second test board 20 and the charge-discharge module stop charging the first test board 10. The first test board 10 is then placed on the wafer 30 to be tested. The wafer 30 to be tested includes a plurality of chips 31, each of which is provided with two electrodes 310. The positions of the two electrodes 310 correspond to the first electrode 14 and the second electrode 15 of the first test board 10, respectively. The electrodes 310 on the chips 31 are connected to the first electrode 14 and the second electrode 15. The first electrode region 12 and the second electrode region 17 are connected to the charge-discharge conversion module via wires. By adjusting the preset resistance of the charge-discharge conversion module, the voltage stored in the first test board 10 is released to each chip 31 on the wafer 30 to be tested, thereby performing an electrostatic discharge test on the chips 31. This allows for testing of the entire wafer 30 to be tested, with each chip 31 having an independent discharge circuit. This stable and reliable electrostatic discharge test eliminates the need to test each chip 31 individually, reducing the cost of the electrostatic discharge test and significantly improving its efficiency. The charge-discharge conversion module switches the circuit connection direction through an internal switch to achieve charge and discharge conversion.
[0078] Compared to the prior art, the electrostatic discharge test device provided in this embodiment has the following beneficial effects: the electrostatic discharge test device provided by the present invention does not require chip-by-chip testing. Specifically, the first test board is connected to the second test board via a charge-discharge conversion module to charge the first test board so that the first test board stores charge. Then, the first test board is placed on the wafer to be tested, and the first electrode and the second electrode are respectively connected to the electrodes of each chip on the wafer to be tested. The charge-discharge conversion module adjusts the preset resistance, and the charge stored in the first test board is released to the wafer to be tested to perform electrostatic discharge testing on the wafer to be tested. The device is simple and efficient. The wafer to be tested includes multiple chips. The device performs batch testing on all chips on the wafer, and each chip has an independent electrostatic discharge test circuit. The electrostatic discharge test is stable and reliable, greatly improving the efficiency of the electrostatic discharge test and saving costs. It avoids the traditional electrostatic discharge test of each chip, which requires a lot of manpower and material resources, has low test efficiency, and increases the cost of electrostatic discharge testing. Thus, it solves the common technical problems of low efficiency and high cost of electrostatic discharge testing of light-emitting diode chips.
[0079] Example 3
[0080] See also Figure 10 , which shows a method for preparing an electrostatic discharge testing device provided by the first embodiment of the present invention, the preparation method includes steps S20-S23:
[0081] Step S20, providing a first substrate;
[0082] The first test plate comprises a composite film structure. The first substrate of the first test plate serves as its supporting substrate and can be made of materials such as Cu, Al, Si, Al2O3, SiO2, and GaN, with a thickness ranging from 150 μm to 10 mm. When the first substrate is made of a conductive material, a first electrode region can be positioned on the back of the first substrate to provide conductivity. Pretreatment of the first substrate is generally required. Specifically, the first substrate is polished with a polishing pad or slurry to achieve a smooth surface. The total thickness ranges from 0.001 μm to 2 μm, facilitating the subsequent uniform growth of the first electrode region.
[0083] Step S21, sequentially growing a first electrode region, a dielectric layer, a first electrode, an isolation layer, a second electrode, and a second electrode region on the first substrate to form a first test board;
[0084] The first electrode region is grown on the first substrate by evaporation or sputtering, with a thickness of 0.05um-1mm.
[0085] A dielectric layer is grown on the first electrode region by chemical vapor deposition or atomic layer deposition, and the dielectric constant of the dielectric layer is 10-10000C. 2 / (N·M 2 ), thickness is 0.1um-10mm.
[0086] Through photolithography and etching, a first electrode is grown on the dielectric layer by evaporation or sputtering, and then an isolation layer is grown on the dielectric layer by chemical vapor deposition or atomic layer deposition, with a thickness of 0.05um-5mm.
[0087] The second electrode and the second electrode region are grown on the isolation layer by evaporation or sputtering.
[0088] At this point, the first test board is complete. It features several first and second electrodes, corresponding one-to-one with the electrodes of each chip on the wafer. The first and second electrodes are connected to the electrodes of the chips. The first and second electrode areas are connected to the charge-discharge conversion module via wires to form a discharge circuit, allowing ESD testing of each chip on the wafer. This simple preparation method enables batch testing of chips, significantly improving the efficiency of ESD testing and saving costs by eliminating the need for chip-by-chip ESD testing.
[0089] Step S22, providing a second substrate;
[0090] The second test plate comprises a composite film structure. The substrate of the second test plate serves as its supporting substrate and can be made of materials such as Cu, Al, Si, Al2O3, SiO2, and GaN, with a thickness ranging from 150 μm to 10 mm. When the second substrate is made of a conductive material, the charging electrode region can be positioned on the back of the substrate to provide a conductive surface. Furthermore, the second substrate is typically pretreated before growing the charging electrode. Specifically, the second substrate is polished using a polishing pad or a polishing solution to achieve a smooth surface. The total thickness ranges from 0.001 μm to 2 μm, facilitating the subsequent uniform growth of the charging electrode.
[0091] Step S23 , sequentially growing a charging electrode, a charging electrode region, and a protective layer on the second substrate to form a second test board.
[0092] The charging electrode and the charging electrode region are grown on the second substrate by evaporation or sputtering, with a thickness of 0.05um-1mm.
[0093] A protective layer is grown between the charging electrode and the charging electrode region by chemical vapor deposition or atomic layer deposition. The material of the protective layer includes but is not limited to SiO2, Ti3O5, SiN, Al2O3, and its thickness is 0.05um-5mm.
[0094] At this point, the second test board is prepared, and several charging electrodes are provided on it. The positions of the charging electrodes correspond one-to-one to the first electrodes of the first test board. When the first electrodes are connected to the charging electrodes, and the first electrode areas and the charging electrode areas are respectively connected to the charge-discharge conversion module through wires, a charging circuit will be formed to charge the first test board.
[0095] Compared to the prior art, the method for preparing an electrostatic discharge test device provided in this embodiment has the following beneficial effects: the preparation method of the electrostatic discharge test device provided by the present invention is simple, and the prepared electrostatic discharge test device does not need to test each chip one by one. Specifically, by growing a first electrode and a second electrode, the electrodes of each chip on the wafer to be tested correspond one to one to the electrodes of each chip, and the wafer to be tested includes several chips, so as to realize batch testing of chips, and each chip has an independent electrostatic discharge test circuit. The electrostatic discharge test is stable and reliable, greatly improving the efficiency of the electrostatic discharge test and saving costs, avoiding the traditional electrostatic discharge test of each chip, which requires a lot of manpower and material resources, has low test efficiency, and increases the cost of electrostatic discharge testing. Thus, the technical problem of low efficiency and high cost of electrostatic discharge testing of each light-emitting diode chip is solved.
[0096] Throughout this specification, reference to terms such as "one embodiment," "some embodiments," "examples," "specific examples," or "some examples" means that a specific feature, structure, material, or characteristic described in conjunction with that embodiment or example is included in at least one embodiment or example of the present invention. In this specification, schematic representations of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.
[0097] The above-described embodiments merely illustrate several implementations of the present invention. While the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the present invention. It should be noted that a person skilled in the art would be able to make numerous modifications and improvements without departing from the spirit of the present invention, all of which fall within the scope of protection of the present invention. Therefore, the scope of protection of the present invention shall be determined by the appended claims.
Claims
1. An electrostatic discharge test method, applied to a light-emitting diode chip with electrodes located on the same side, characterized in that: The electrostatic discharge test method includes: Align and connect the first electrodes of the first test plate with the charging electrodes at corresponding positions of the second test plate one by one; The first electrode area of the first test board and the charging electrode area of the second test board are respectively connected to the charge-discharge conversion module through wires. The first test board includes a plurality of first electrodes and second electrodes. The first electrode area and the second electrode area are provided at the edge of the first test board. The first electrode is provided with an electrode layer facing the first electrode area. The first electrode is provided with a dielectric layer on the side close to the first electrode area. The capacitor is formed by the electrode layer and the first electrode area to store charge. The dielectric constant of the dielectric layer is 10-10000C. 2 / (N·M 2 ), thickness is 0.1um-10mm, Any adjacent second electrodes are electrically connected via a lead, and the second electrode and the second electrode region are electrically connected via a lead, The first electrode is provided with an isolation layer on a side close to the second electrode to block the connection between the first electrode and the second electrode. A charging electrode area is provided at an edge of the second test plate, any adjacent charging electrodes are electrically connected via leads, the charging electrodes are electrically connected to the charging electrode area via leads, and a protective layer is provided between the charging electrodes and the charging electrode area; Adjusting the charge-discharge conversion module to a charging mode to charge the first test board; Aligning and connecting the two electrodes of each chip on the wafer to be tested with the first electrode and the second electrode of the first test board respectively; Connecting the first electrode area of the first test board and the second electrode area of the first test board to the charge-discharge conversion module through wires respectively; The charge-discharge conversion module is adjusted to a discharge mode to perform an electrostatic discharge test on the wafer to be tested.
2. The electrostatic discharge testing method according to claim 1, wherein: The step of adjusting the charge-discharge conversion module to a charging mode to charge the first test board specifically includes: Setting a preset voltage value of the charge-discharge conversion module to adjust to a charging mode; The first test board is charged by a charging circuit so that charges are stored in the first test board.
3. The electrostatic discharge testing method according to claim 1, wherein: The step of adjusting the charge-discharge conversion module to a discharge mode to perform an electrostatic discharge test on the wafer to be tested specifically includes: Setting a preset resistance value of the charge-discharge conversion module to adjust to a discharge mode; The charge stored in the first test board is released to the wafer to be tested through a discharge circuit, so that the wafer to be tested undergoes an electrostatic discharge test.
4. An electrostatic discharge testing device, characterized in that: The electrostatic discharge testing device is used to perform the electrostatic discharge testing method according to any one of claims 1 to 3, and the device includes: A first test board, configured to perform an electrostatic discharge test on a wafer to be tested, the first test board comprising a plurality of first electrodes and second electrodes, wherein a first electrode region and a second electrode region are provided at an edge of the first test board, the first electrodes being electrically connected to the first electrode regions, any adjacent second electrodes being electrically connected via leads, and the second electrodes being electrically connected to the second electrode regions via leads; a second test plate, configured to charge the first test plate, the second test plate comprising a plurality of charging electrodes, the charging electrodes corresponding one-to-one with the positions of the first electrodes, a charging electrode region being defined at an edge of the second test plate, any adjacent charging electrodes being electrically connected via leads, the charging electrodes being electrically connected to the charging electrode region via leads, and the charging electrodes being connected to the first electrodes; The charge-discharge conversion module is connected to the first electrode area and the charging electrode area through wires, and the first test board is charged by adjusting a preset voltage of the charge-discharge conversion module; The charge-discharge conversion module is connected to the first electrode area and the second electrode area of the first test board that has been charged through wires. The first test board is arranged on the wafer to be tested, and is connected to the first electrode and the second electrode one by one through the positions of the two electrodes of each chip on the wafer to be tested. By adjusting the preset resistance of the charge-discharge conversion module, the electrostatic discharge test of the wafer to be tested is performed.
5. The electrostatic discharge testing method according to claim 4, wherein: The sizes of the first test board and the second test board are larger than the size of the wafer to be tested.
6. A method for preparing an electrostatic discharge test device, characterized in that: For preparing the electrostatic discharge testing device according to any one of claims 4-5, the preparation method comprises: providing a first substrate; sequentially growing a first electrode region, a dielectric layer, a first electrode, an isolation layer, a second electrode, and a second electrode region on the first substrate to form a first test board; providing a second substrate; A charging electrode, a charging electrode region and a protective layer are sequentially grown on the second substrate to form a second test plate.
Citation Information
Patent Citations
Multi-source parallel electrostatic generator
CN214150821U
